21 Core(Bus
& bus
, unsigned int ioSpaceSize
,
22 unsigned int ramSize
, unsigned int flashSize
,
23 word stackMask
, int pcBytes
= 2, ERam
*eram
= 0);
28 void loadFlash(unsigned char *data
, unsigned int offset
, unsigned int size
);
33 void reset(unsigned int type
);
36 * Executes a single cpu cycle.
40 void setDebugInterface(DebugInterface
*dbgi
);
43 void addIOReg(unsigned int address
,
44 const std::string
& name
, byte initial
= 0);
45 const Register
& getR(int r
) const { return R
[r
]; }
46 IORegister
& getIoreg(unsigned int offset
);
47 IORegister
*getIoreg(const std::string
& name
);
50 byte
readRegister(int r
) const;
51 void writeRegister(int r
, byte val
);
52 byte
readStatus() const;
53 void writeStatus(byte val
);
54 byte
readIORegister(int r
) const;
55 void writeIORegister(int r
, byte val
);
56 byte
readByte(unsigned int addr
) const;
57 void writeByte(unsigned int addr
, byte val
);
58 byte
readFlash(unsigned int addr
) const;
59 int writeFlash(unsigned int addr
, word data
);
63 int pcBytes() const { return pc_bytes
; }
66 void jump(sbyte offset
, bool push
= false);
68 void call(dword address
, bool push
= true);
69 void ret(bool interrupt
= false);
73 bool interrupt(unsigned int vector
, unsigned int addr
);
88 static const unsigned int registerSpaceSize
= 32;
89 Register R
[registerSpaceSize
];
96 SLEEP_MODE_ADC_REDUX
= 1,
97 SLEEP_MODE_PWR_DOWN
= 2,
98 SLEEP_MODE_PWR_SAVE
= 3,
99 SLEEP_MODE_reserved1
= 4,
100 SLEEP_MODE_reserved2
= 5,
101 SLEEP_MODE_STANDBY
= 6,
102 SLEEP_MODE_EXT_STANDBY
= 7
106 DebugInterface
*dbgi
;
109 friend class DebugInterface
;
112 inline void Core::loadFlash(unsigned char *data
, unsigned int offset
, unsigned int size
) {
113 flash
.write(offset
, data
, size
);
116 inline void Core::setDebugInterface(DebugInterface
*dbgi
) {
120 inline IORegister
& Core::getIoreg(unsigned int offset
) {
121 return regs
.getIoreg(offset
);
124 inline IORegister
*Core::getIoreg(const std::string
& name
) {
125 return regs
.getIoreg(name
);
128 inline byte
Core::readStatus() const {
129 return readIORegister(SReg
);
132 inline void Core::writeStatus(byte val
) {
133 writeIORegister(SReg
, val
);
136 inline byte
Core::readIORegister(int r
) const {
137 IORegister
& reg
= regs
.getIoreg(r
);
141 inline void Core::writeIORegister(int r
, byte val
) {
142 IORegister
& reg
= regs
.getIoreg(r
);
146 inline byte
Core::readByte(unsigned int addr
) const {
147 return mmu
.readByte(addr
);
150 inline void Core::writeByte(unsigned int addr
, byte val
) {
151 mmu
.writeByte(addr
, val
);
154 inline byte
Core::readFlash(unsigned int addr
) const {
155 return flash
.readByte(addr
);
158 inline void Core::push(byte val
) {
162 inline byte
Core::pop() {
168 #endif /*AVR_CORE_H*/