Bug fix: check if vm exists
[avr-sim.git] / Core.h
blobc614cdff9f24fd3d98a540d2777b6ab3b079a37b
1 #ifndef AVR_CORE_H
2 #define AVR_CORE_H
4 #include "Types.h"
5 #include "SRam.h"
6 #include "Registers.h"
7 #include "Flash.h"
8 #include "Eeprom.h"
9 #include "MMU.h"
10 #include "Stack.h"
11 #include "Decoder.h"
13 namespace avr {
15 class ERam;
16 class Bus;
17 class DebugInterface;
19 class Core {
20 public:
21 Core(Bus & bus, unsigned int ioSpaceSize,
22 unsigned int ramSize, unsigned int flashSize,
23 word stackMask, int pcBytes = 2, ERam *eram = 0);
24 ~Core();
26 public:
27 void init();
28 void loadFlash(unsigned char *data, unsigned int offset, unsigned int size);
30 /**
31 * Resets the core
33 void reset(unsigned int type);
35 /**
36 * Executes a single cpu cycle.
38 bool step();
40 void setDebugInterface(DebugInterface *dbgi);
42 public:
43 void addIOReg(unsigned int address,
44 const std::string & name, byte initial = 0);
45 const Register & getR(int r) const { return R[r]; }
46 IORegister & getIoreg(unsigned int offset);
47 IORegister *getIoreg(const std::string & name);
49 public:
50 byte readRegister(int r) const;
51 void writeRegister(int r, byte val);
52 byte readStatus() const;
53 void writeStatus(byte val);
54 byte readIORegister(int r) const;
55 void writeIORegister(int r, byte val);
56 byte readByte(unsigned int addr) const;
57 void writeByte(unsigned int addr, byte val);
58 byte readFlash(unsigned int addr) const;
59 int writeFlash(unsigned int addr, word data);
60 word fetchOperand();
62 public:
63 int pcBytes() const { return pc_bytes; }
64 void push(byte val);
65 byte pop();
66 void jump(sbyte offset, bool push = false);
67 int skip();
68 void call(dword address, bool push = true);
69 void ret(bool interrupt = false);
71 public:
72 void sleep();
73 bool interrupt(unsigned int vector, unsigned int addr);
75 private:
76 IORegisters regs;
77 SRam sram;
78 Flash flash;
79 ERam *eram;
81 private:
82 MMU mmu;
83 Stack stack;
84 Decoder decoder;
85 Bus & bus;
87 private:
88 static const unsigned int registerSpaceSize = 32;
89 Register R[registerSpaceSize];
90 unsigned char SReg;
91 dword PC;
92 int pc_bytes;
94 enum SleepMode {
95 SLEEP_MODE_IDLE = 0,
96 SLEEP_MODE_ADC_REDUX = 1,
97 SLEEP_MODE_PWR_DOWN = 2,
98 SLEEP_MODE_PWR_SAVE = 3,
99 SLEEP_MODE_reserved1 = 4,
100 SLEEP_MODE_reserved2 = 5,
101 SLEEP_MODE_STANDBY = 6,
102 SLEEP_MODE_EXT_STANDBY = 7
103 } sleepMode;
105 private:
106 DebugInterface *dbgi;
107 int cpuCycles;
109 friend class DebugInterface;
112 inline void Core::loadFlash(unsigned char *data, unsigned int offset, unsigned int size) {
113 flash.write(offset, data, size);
116 inline void Core::setDebugInterface(DebugInterface *dbgi) {
117 this->dbgi = dbgi;
120 inline IORegister & Core::getIoreg(unsigned int offset) {
121 return regs.getIoreg(offset);
124 inline IORegister *Core::getIoreg(const std::string & name) {
125 return regs.getIoreg(name);
128 inline byte Core::readStatus() const {
129 return readIORegister(SReg);
132 inline void Core::writeStatus(byte val) {
133 writeIORegister(SReg, val);
136 inline byte Core::readIORegister(int r) const {
137 IORegister & reg = regs.getIoreg(r);
138 return reg;
141 inline void Core::writeIORegister(int r, byte val) {
142 IORegister & reg = regs.getIoreg(r);
143 reg = val;
146 inline byte Core::readByte(unsigned int addr) const {
147 return mmu.readByte(addr);
150 inline void Core::writeByte(unsigned int addr, byte val) {
151 mmu.writeByte(addr, val);
154 inline byte Core::readFlash(unsigned int addr) const {
155 return flash.readByte(addr);
158 inline void Core::push(byte val) {
159 stack.push(val);
162 inline byte Core::pop() {
163 return stack.pop();
168 #endif /*AVR_CORE_H*/