2 <!DOCTYPE device SYSTEM
"device.dtd">
5 <interrupt vector=
"1" address=
"$000" name=
"RESET">External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.
</interrupt>
6 <interrupt vector=
"2" address=
"$002" name=
"INT0">External Interrupt Request
0</interrupt>
7 <interrupt vector=
"3" address=
"$004" name=
"PCINT0">Pin Change Interrupt Request
0</interrupt>
8 <interrupt vector=
"4" address=
"$006" name=
"PCINT1">Pin Change Interrupt Request
1</interrupt>
9 <interrupt vector=
"5" address=
"$008" name=
"TIMER2 COMP">Timer/Counter2 Compare Match
</interrupt>
10 <interrupt vector=
"6" address=
"$00A" name=
"TIMER2 OVF">Timer/Counter2 Overflow
</interrupt>
11 <interrupt vector=
"7" address=
"$00C" name=
"TIMER1 CAPT">Timer/Counter1 Capture Event
</interrupt>
12 <interrupt vector=
"8" address=
"$00E" name=
"TIMER1 COMPA">Timer/Counter1 Compare Match A
</interrupt>
13 <interrupt vector=
"9" address=
"$010" name=
"TIMER1 COMPB">Timer/Counter Compare Match B
</interrupt>
14 <interrupt vector=
"10" address=
"$012" name=
"TIMER1 OVF">Timer/Counter1 Overflow
</interrupt>
15 <interrupt vector=
"11" address=
"$014" name=
"TIMER0 COMP">Timer/Counter0 Compare Match
</interrupt>
16 <interrupt vector=
"12" address=
"$016" name=
"TIMER0 OVF">Timer/Counter0 Overflow
</interrupt>
17 <interrupt vector=
"13" address=
"$018" name=
"SPI, STC">SPI Serial Transfer Complete
</interrupt>
18 <interrupt vector=
"14" address=
"$01A" name=
"USART, RX">USART, Rx Complete
</interrupt>
19 <interrupt vector=
"15" address=
"$01C" name=
"USART, UDRE">USART Data register Empty
</interrupt>
20 <interrupt vector=
"16" address=
"$01E" name=
"USART0, TX">USART0, Tx Complete
</interrupt>
21 <interrupt vector=
"17" address=
"$020" name=
"USI START">USI Start Condition
</interrupt>
22 <interrupt vector=
"18" address=
"$022" name=
"USI OVERFLOW">USI Overflow
</interrupt>
23 <interrupt vector=
"19" address=
"$024" name=
"ANALOG COMP">Analog Comparator
</interrupt>
24 <interrupt vector=
"20" address=
"$026" name=
"ADC">ADC Conversion Complete
</interrupt>
25 <interrupt vector=
"21" address=
"$028" name=
"EE_READY">EEPROM Ready
</interrupt>
26 <interrupt vector=
"22" address=
"$02A" name=
"SPM_READY">Store Program Memory Read
</interrupt>
27 <interrupt vector=
"23" address=
"$02C" name=
"NOT_USED">RESERVED
</interrupt>
28 <interrupt vector=
"24" address=
"$02E" name=
"PCINT2">Pin Change Interrupt Request
2</interrupt>
29 <interrupt vector=
"25" address=
"$030" name=
"PCINT3">Pin Change Interrupt Request
3</interrupt>
32 <package name=
"TQFP" pins=
"100">
42 <pin id=
"10" name=
""/>
43 <pin id=
"11" name=
""/>
44 <pin id=
"12" name=
""/>
45 <pin id=
"13" name=
""/>
46 <pin id=
"14" name=
""/>
47 <pin id=
"15" name=
""/>
48 <pin id=
"16" name=
""/>
49 <pin id=
"17" name=
""/>
50 <pin id=
"18" name=
""/>
51 <pin id=
"19" name=
""/>
52 <pin id=
"20" name=
""/>
53 <pin id=
"21" name=
""/>
54 <pin id=
"22" name=
""/>
55 <pin id=
"23" name=
""/>
56 <pin id=
"24" name=
""/>
57 <pin id=
"25" name=
""/>
58 <pin id=
"26" name=
""/>
59 <pin id=
"27" name=
""/>
60 <pin id=
"28" name=
""/>
61 <pin id=
"29" name=
""/>
62 <pin id=
"30" name=
""/>
63 <pin id=
"31" name=
""/>
64 <pin id=
"32" name=
""/>
65 <pin id=
"33" name=
""/>
66 <pin id=
"34" name=
""/>
67 <pin id=
"35" name=
""/>
68 <pin id=
"36" name=
""/>
69 <pin id=
"37" name=
""/>
70 <pin id=
"38" name=
""/>
71 <pin id=
"39" name=
""/>
72 <pin id=
"40" name=
""/>
73 <pin id=
"41" name=
""/>
74 <pin id=
"42" name=
""/>
75 <pin id=
"43" name=
""/>
76 <pin id=
"44" name=
""/>
77 <pin id=
"45" name=
""/>
78 <pin id=
"46" name=
""/>
79 <pin id=
"47" name=
""/>
80 <pin id=
"48" name=
""/>
81 <pin id=
"49" name=
""/>
82 <pin id=
"50" name=
""/>
83 <pin id=
"51" name=
""/>
84 <pin id=
"52" name=
""/>
85 <pin id=
"53" name=
""/>
86 <pin id=
"54" name=
""/>
87 <pin id=
"55" name=
""/>
88 <pin id=
"56" name=
""/>
89 <pin id=
"57" name=
""/>
90 <pin id=
"58" name=
""/>
91 <pin id=
"59" name=
""/>
92 <pin id=
"60" name=
""/>
93 <pin id=
"61" name=
""/>
94 <pin id=
"62" name=
""/>
95 <pin id=
"63" name=
""/>
96 <pin id=
"64" name=
""/>
97 <pin id=
"65" name=
""/>
98 <pin id=
"66" name=
""/>
99 <pin id=
"67" name=
""/>
100 <pin id=
"68" name=
""/>
101 <pin id=
"69" name=
""/>
102 <pin id=
"70" name=
""/>
103 <pin id=
"71" name=
""/>
104 <pin id=
"72" name=
""/>
105 <pin id=
"73" name=
""/>
106 <pin id=
"74" name=
""/>
107 <pin id=
"75" name=
""/>
108 <pin id=
"76" name=
""/>
109 <pin id=
"77" name=
""/>
110 <pin id=
"78" name=
""/>
111 <pin id=
"79" name=
""/>
112 <pin id=
"80" name=
""/>
113 <pin id=
"81" name=
""/>
114 <pin id=
"82" name=
""/>
115 <pin id=
"83" name=
""/>
116 <pin id=
"84" name=
""/>
117 <pin id=
"85" name=
""/>
118 <pin id=
"86" name=
""/>
119 <pin id=
"87" name=
""/>
120 <pin id=
"88" name=
""/>
121 <pin id=
"89" name=
""/>
122 <pin id=
"90" name=
""/>
123 <pin id=
"91" name=
""/>
124 <pin id=
"92" name=
""/>
125 <pin id=
"93" name=
""/>
126 <pin id=
"94" name=
""/>
127 <pin id=
"95" name=
""/>
128 <pin id=
"96" name=
""/>
129 <pin id=
"97" name=
""/>
130 <pin id=
"98" name=
""/>
131 <pin id=
"99" name=
""/>
132 <pin id=
"100" name=
""/>
136 <flash size=
"32768"/>
137 <iospace start=
"$20" stop=
"$FF"/>
142 <ioreg name=
"PINA" address=
"$00"/>
143 <ioreg name=
"DDRA" address=
"$01"/>
144 <ioreg name=
"PORTA" address=
"$02"/>
145 <ioreg name=
"PINB" address=
"$03"/>
146 <ioreg name=
"DDRB" address=
"$04"/>
147 <ioreg name=
"PORTB" address=
"$05"/>
148 <ioreg name=
"PINC" address=
"$06"/>
149 <ioreg name=
"DDRC" address=
"$07"/>
150 <ioreg name=
"PORTC" address=
"$08"/>
151 <ioreg name=
"PIND" address=
"$09"/>
152 <ioreg name=
"DDRD" address=
"$0A"/>
153 <ioreg name=
"PORTD" address=
"$0B"/>
154 <ioreg name=
"PINE" address=
"$0C"/>
155 <ioreg name=
"DDRE" address=
"$0D"/>
156 <ioreg name=
"PORTE" address=
"$0E"/>
157 <ioreg name=
"PINF" address=
"$0F"/>
158 <ioreg name=
"DDRF" address=
"$10"/>
159 <ioreg name=
"PORTF" address=
"$11"/>
160 <ioreg name=
"PING" address=
"$12"/>
161 <ioreg name=
"DDRG" address=
"$13"/>
162 <ioreg name=
"PORTG" address=
"$14"/>
163 <ioreg name=
"TIFR0" address=
"$15"/>
164 <ioreg name=
"TIFR1" address=
"$16"/>
165 <ioreg name=
"TIFR2" address=
"$17"/>
166 <ioreg name=
"EIFR" address=
"$1C"/>
167 <ioreg name=
"EIMSK" address=
"$1D"/>
168 <ioreg name=
"GPIOR0" address=
"$1E"/>
169 <ioreg name=
"EECR" address=
"$1F"/>
170 <ioreg name=
"EEDR" address=
"$20"/>
171 <ioreg name=
"EEARL" address=
"$21"/>
172 <ioreg name=
"EEARH" address=
"$22"/>
173 <ioreg name=
"GTCCR" address=
"$23"/>
174 <ioreg name=
"TCCR0A" address=
"$24"/>
175 <ioreg name=
"TCNT0" address=
"$26"/>
176 <ioreg name=
"OCR0A" address=
"$27"/>
177 <ioreg name=
"GPIOR1" address=
"$2A"/>
178 <ioreg name=
"GPIOR2" address=
"$2B"/>
179 <ioreg name=
"SPCR" address=
"$2C"/>
180 <ioreg name=
"SPSR" address=
"$2D"/>
181 <ioreg name=
"SPDR" address=
"$2E"/>
182 <ioreg name=
"ACSR" address=
"$30"/>
183 <ioreg name=
"OCDR" address=
"$31"/>
184 <ioreg name=
"SMCR" address=
"$33"/>
185 <ioreg name=
"MCUSR" address=
"$34"/>
186 <ioreg name=
"MCUCR" address=
"$35"/>
187 <ioreg name=
"SPMCSR" address=
"$37"/>
188 <ioreg name=
"SPL" address=
"$3D"/>
189 <ioreg name=
"SPH" address=
"$3E"/>
190 <ioreg name=
"SREG" address=
"$3F"/>
191 <ioreg name=
"WDTCR" address=
"$60"/>
192 <ioreg name=
"CLKPR" address=
"$61"/>
193 <ioreg name=
"PRR" address=
"$64"/>
194 <ioreg name=
"OSCCAL" address=
"$66"/>
195 <ioreg name=
"EICRA" address=
"$69"/>
196 <ioreg name=
"PCMSK0" address=
"$6B"/>
197 <ioreg name=
"PCMSK1" address=
"$6C"/>
198 <ioreg name=
"PCMSK2" address=
"$6D"/>
199 <ioreg name=
"TIMSK0" address=
"$6E"/>
200 <ioreg name=
"TIMSK1" address=
"$6F"/>
201 <ioreg name=
"TIMSK2" address=
"$70"/>
202 <ioreg name=
"PCMSK3" address=
"$73"/>
203 <ioreg name=
"ADCL" address=
"$78"/>
204 <ioreg name=
"ADCH" address=
"$79"/>
205 <ioreg name=
"ADCSRA" address=
"$7A"/>
206 <ioreg name=
"ADCSRB" address=
"$7B"/>
207 <ioreg name=
"ADMUX" address=
"$7C"/>
208 <ioreg name=
"DIDR0" address=
"$7E"/>
209 <ioreg name=
"DIDR1" address=
"$7F"/>
210 <ioreg name=
"TCCR1A" address=
"$80"/>
211 <ioreg name=
"TCCR1B" address=
"$81"/>
212 <ioreg name=
"TCCR1C" address=
"$82"/>
213 <ioreg name=
"TCNT1L" address=
"$84"/>
214 <ioreg name=
"TCNT1H" address=
"$85"/>
215 <ioreg name=
"ICR1L" address=
"$86"/>
216 <ioreg name=
"ICR1H" address=
"$87"/>
217 <ioreg name=
"OCR1AL" address=
"$88"/>
218 <ioreg name=
"OCR1AH" address=
"$89"/>
219 <ioreg name=
"OCR1BL" address=
"$8A"/>
220 <ioreg name=
"OCR1BH" address=
"$8B"/>
221 <ioreg name=
"TCCR2A" address=
"$B0"/>
222 <ioreg name=
"TCNT2" address=
"$B2"/>
223 <ioreg name=
"OCR2A" address=
"$B3"/>
224 <ioreg name=
"ASSR" address=
"$B6"/>
225 <ioreg name=
"USICR" address=
"$B8"/>
226 <ioreg name=
"USISR" address=
"$B9"/>
227 <ioreg name=
"USIDR" address=
"$BA"/>
228 <ioreg name=
"UCSR0A" address=
"$C0"/>
229 <ioreg name=
"UCSR0B" address=
"$C1"/>
230 <ioreg name=
"UCSR0C" address=
"$C2"/>
231 <ioreg name=
"UBRR0L" address=
"$C4"/>
232 <ioreg name=
"UBRR0H" address=
"$C5"/>
233 <ioreg name=
"UDR0" address=
"$C6"/>
234 <ioreg name=
"PINH" address=
"$D8"/>
235 <ioreg name=
"DDRH" address=
"$D9"/>
236 <ioreg name=
"PORTH" address=
"$DA"/>
237 <ioreg name=
"PINJ" address=
"$DB"/>
238 <ioreg name=
"DDRJ" address=
"$DC"/>
239 <ioreg name=
"PORTJ" address=
"$DD"/>
242 <!--Everything after this needs editing!!!-->
243 <module class=
"FUSE">
244 <registers name=
"FUSE" memspace=
"FUSE">
245 <reg size=
"1" name=
"EXTENDED" offset=
"0x02">
246 <bitfield name=
"BODLEVEL" mask=
"0x06" text=
"Brown-out Detector trigger level" icon=
"" enum=
"ENUM_BODLEVEL"/>
247 <bitfield name=
"RSTDISBL" mask=
"0x01" text=
"External Reset Disable" icon=
""/>
249 <reg size=
"1" name=
"HIGH" offset=
"0x01">
250 <bitfield name=
"OCDEN" mask=
"0x80" text=
"On-Chip Debug Enabled" icon=
""/>
251 <bitfield name=
"JTAGEN" mask=
"0x40" text=
"JTAG Interface Enabled" icon=
""/>
252 <bitfield name=
"SPIEN" mask=
"0x20" text=
"Serial program downloading (SPI) enabled" icon=
""/>
253 <bitfield name=
"WDTON" mask=
"0x10" text=
"Watchdog timer always on" icon=
""/>
254 <bitfield name=
"EESAVE" mask=
"0x08" text=
"Preserve EEPROM memory through the Chip Erase cycle" icon=
""/>
255 <bitfield name=
"BOOTSZ" mask=
"0x06" text=
"Select Boot Size" icon=
"" enum=
"ENUM_BOOTSZ"/>
256 <bitfield name=
"BOOTRST" mask=
"0x01" text=
"Boot Reset vector Enabled" icon=
""/>
258 <reg size=
"1" name=
"LOW" offset=
"0x00">
259 <bitfield name=
"CKDIV8" mask=
"0x80" text=
"Divide clock by 8 internally" icon=
""/>
260 <bitfield name=
"CKOUT" mask=
"0x40" text=
"Clock output on PORTE7" icon=
""/>
261 <bitfield name=
"SUT_CKSEL" mask=
"0x3F" text=
"Select Clock Source" icon=
"" enum=
"ENUM_SUT_CKSEL"/>
265 <module class=
"LOCKBIT">
266 <registers name=
"LOCKBIT" memspace=
"LOCKBIT">
267 <reg size=
"1" name=
"LOCKBIT" offset=
"0x00">
268 <bitfield name=
"LB" mask=
"0x03" text=
"Memory Lock" icon=
"" enum=
"ENUM_LB"/>
269 <bitfield name=
"BLB0" mask=
"0x0C" text=
"Boot Loader Protection Mode" icon=
"" enum=
"ENUM_BLB"/>
270 <bitfield name=
"BLB1" mask=
"0x30" text=
"Boot Loader Protection Mode" icon=
"" enum=
"ENUM_BLB2"/>
274 <module class=
"TIMER_COUNTER_0">
275 <registers name=
"TIMER_COUNTER_0" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
276 <reg size=
"1" name=
"TCCR0A" offset=
"0x44" text=
"Timer/Counter0 Control Register" icon=
"io_flag.bmp">
277 <bitfield name=
"FOC0A" mask=
"0x80" text=
"Force Output Compare" icon=
""/>
278 <bitfield name=
"WGM00" mask=
"0x40" text=
"Waveform Generation Mode 0" icon=
"" enum=
"WAVEFORM_GEN_MODE"/>
279 <bitfield name=
"COM0A" mask=
"0x30" text=
"Compare Match Output Modes" icon=
""/>
280 <bitfield name=
"WGM01" mask=
"0x08" text=
"Waveform Generation Mode 1" icon=
""/>
281 <bitfield name=
"CS0" mask=
"0x07" text=
"Clock Selects" icon=
"" enum=
"CLK_SEL_3BIT_EXT"/>
283 <reg size=
"1" name=
"TCNT0" offset=
"0x46" text=
"Timer/Counter0" icon=
"io_timer.bmp" mask=
"0xFF"/>
284 <reg size=
"1" name=
"OCR0A" offset=
"0x47" text=
"Timer/Counter0 Output Compare Register" icon=
"io_timer.bmp" mask=
"0xFF"/>
285 <reg size=
"1" name=
"TIMSK0" offset=
"0x6E" text=
"Timer/Counter0 Interrupt Mask Register" icon=
"io_flag.bmp">
286 <bitfield name=
"OCIE0A" mask=
"0x02" text=
"Timer/Counter0 Output Compare Match Interrupt Enable" icon=
""/>
287 <bitfield name=
"TOIE0" mask=
"0x01" text=
"Timer/Counter0 Overflow Interrupt Enable" icon=
""/>
289 <reg size=
"1" name=
"TIFR0" offset=
"0x35" text=
"Timer/Counter0 Interrupt Flag register" icon=
"io_flag.bmp">
290 <bitfield name=
"OCF0A" mask=
"0x02" text=
"Timer/Counter0 Output Compare Flag 0" icon=
""/>
291 <bitfield name=
"TOV0" mask=
"0x01" text=
"Timer/Counter0 Overflow Flag" icon=
""/>
293 <reg size=
"1" name=
"GTCCR" offset=
"0x43" text=
"General Timer/Control Register" icon=
"io_cpu.bmp">
294 <bitfield name=
"TSM" mask=
"0x80" text=
"Timer/Counter Synchronization Mode" icon=
""/>
295 <bitfield name=
"PSR310" mask=
"0x01" text=
"Prescaler Reset Timer/Counter1 and Timer/Counter0" icon=
""/>
299 <module class=
"TIMER_COUNTER_1">
300 <registers name=
"TIMER_COUNTER_1" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
301 <reg size=
"1" name=
"TCCR1A" offset=
"0x80" text=
"Timer/Counter1 Control Register A" icon=
"io_flag.bmp">
302 <bitfield name=
"COM1A" mask=
"0xC0" text=
"Compare Output Mode 1A, bits" icon=
""/>
303 <bitfield name=
"COM1B" mask=
"0x30" text=
"Compare Output Mode 1B, bits" icon=
""/>
304 <bitfield name=
"WGM1" mask=
"0x03" text=
"Waveform Generation Mode" icon=
""/>
306 <reg size=
"1" name=
"TCCR1B" offset=
"0x81" text=
"Timer/Counter1 Control Register B" icon=
"io_flag.bmp">
307 <bitfield name=
"ICNC1" mask=
"0x80" text=
"Input Capture 1 Noise Canceler" icon=
""/>
308 <bitfield name=
"ICES1" mask=
"0x40" text=
"Input Capture 1 Edge Select" icon=
""/>
309 <bitfield name=
"WGM1" mask=
"0x18" text=
"Waveform Generation Mode" icon=
"" lsb=
"2"/>
310 <bitfield name=
"CS1" mask=
"0x07" text=
"Prescaler source of Timer/Counter 1" icon=
"" enum=
"CLK_SEL_3BIT_EXT"/>
312 <reg size=
"1" name=
"TCCR1C" offset=
"0x82" text=
"Timer/Counter 1 Control Register C" icon=
"io_flag.bmp">
313 <bitfield name=
"FOC1A" mask=
"0x80" text=
"Force Output Compare 1A" icon=
""/>
314 <bitfield name=
"FOC1B" mask=
"0x40" text=
"Force Output Compare 1B" icon=
""/>
316 <reg size=
"2" name=
"TCNT1" offset=
"0x84" text=
"Timer/Counter1 Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
317 <reg size=
"2" name=
"OCR1A" offset=
"0x88" text=
"Timer/Counter1 Outbut Compare Register A Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
318 <reg size=
"2" name=
"OCR1B" offset=
"0x8A" text=
"Timer/Counter1 Output Compare Register B Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
319 <reg size=
"2" name=
"ICR1" offset=
"0x86" text=
"Timer/Counter1 Input Capture Register Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
320 <reg size=
"1" name=
"TIMSK1" offset=
"0x6F" text=
"Timer/Counter1 Interrupt Mask Register" icon=
"io_flag.bmp">
321 <bitfield name=
"ICIE1" mask=
"0x20" text=
"Timer/Counter1 Input Capture Interrupt Enable" icon=
""/>
322 <bitfield name=
"OCIE1B" mask=
"0x04" text=
"Timer/Counter1 Output Compare B Match Interrupt Enable" icon=
""/>
323 <bitfield name=
"OCIE1A" mask=
"0x02" text=
"Timer/Counter1 Output Compare A Match Interrupt Enable" icon=
""/>
324 <bitfield name=
"TOIE1" mask=
"0x01" text=
"Timer/Counter1 Overflow Interrupt Enable" icon=
""/>
326 <reg size=
"1" name=
"TIFR1" offset=
"0x36" text=
"Timer/Counter1 Interrupt Flag register" icon=
"io_flag.bmp">
327 <bitfield name=
"ICF1" mask=
"0x20" text=
"Input Capture Flag 1" icon=
""/>
328 <bitfield name=
"OCF1B" mask=
"0x04" text=
"Output Compare Flag 1B" icon=
""/>
329 <bitfield name=
"OCF1A" mask=
"0x02" text=
"Output Compare Flag 1A" icon=
""/>
330 <bitfield name=
"TOV1" mask=
"0x01" text=
"Timer/Counter1 Overflow Flag" icon=
""/>
334 <module class=
"TIMER_COUNTER_2">
335 <registers name=
"TIMER_COUNTER_2" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
336 <reg size=
"1" name=
"TCCR2A" offset=
"0xB0" text=
"Timer/Counter2 Control Register" icon=
"io_flag.bmp">
337 <bitfield name=
"FOC2A" mask=
"0x80" text=
"Force Output Compare A" icon=
""/>
338 <bitfield name=
"WGM20" mask=
"0x40" text=
"Waveform Generation Mode" icon=
"" enum=
"WAVEFORM_GEN_MODE"/>
339 <bitfield name=
"COM2A" mask=
"0x30" text=
"Compare Output Mode bits" icon=
""/>
340 <bitfield name=
"WGM21" mask=
"0x08" text=
"Waveform Generation Mode" icon=
""/>
341 <bitfield name=
"CS2" mask=
"0x07" text=
"Clock Select bits" icon=
"" enum=
"CLK_SEL_3BIT"/>
343 <reg size=
"1" name=
"TCNT2" offset=
"0xB2" text=
"Timer/Counter2" icon=
"io_timer.bmp" mask=
"0xFF"/>
344 <reg size=
"1" name=
"OCR2A" offset=
"0xB3" text=
"Timer/Counter2 Output Compare Register" icon=
"io_timer.bmp" mask=
"0xFF"/>
345 <reg size=
"1" name=
"TIMSK2" offset=
"0x70" text=
"Timer/Counter2 Interrupt Mask register" icon=
"io_flag.bmp">
346 <bitfield name=
"OCIE2A" mask=
"0x02" text=
"Timer/Counter2 Output Compare Match Interrupt Enable" icon=
""/>
347 <bitfield name=
"TOIE2" mask=
"0x01" text=
"Timer/Counter2 Overflow Interrupt Enable" icon=
""/>
349 <reg size=
"1" name=
"TIFR2" offset=
"0x37" text=
"Timer/Counter2 Interrupt Flag Register" icon=
"io_flag.bmp">
350 <bitfield name=
"OCF2A" mask=
"0x02" text=
"Timer/Counter2 Output Compare Flag 2" icon=
""/>
351 <bitfield name=
"TOV2" mask=
"0x01" text=
"Timer/Counter2 Overflow Flag" icon=
""/>
353 <reg size=
"1" name=
"GTCCR" offset=
"0x43" text=
"General Timer/Counter Control Register" icon=
"io_cpu.bmp">
354 <bitfield name=
"PSR2" mask=
"0x02" text=
"Prescaler Reset Timer/Counter2" icon=
""/>
356 <reg size=
"1" name=
"ASSR" offset=
"0xB6" text=
"Asynchronous Status Register" icon=
"io_flag.bmp">
357 <bitfield name=
"EXCLK" mask=
"0x10" text=
"Enable External Clock Interrupt" icon=
""/>
358 <bitfield name=
"AS2" mask=
"0x08" text=
"AS2: Asynchronous Timer/Counter2" icon=
""/>
359 <bitfield name=
"TCN2UB" mask=
"0x04" text=
"TCN2UB: Timer/Counter2 Update Busy" icon=
""/>
360 <bitfield name=
"OCR2UB" mask=
"0x02" text=
"Output Compare Register2 Update Busy" icon=
""/>
361 <bitfield name=
"TCR2UB" mask=
"0x01" text=
"TCR2UB: Timer/Counter Control Register2 Update Busy" icon=
""/>
365 <module class=
"WATCHDOG">
366 <registers name=
"WATCHDOG" memspace=
"DATAMEM" text=
"" icon=
"io_watch.bmp">
367 <reg size=
"1" name=
"WDTCR" offset=
"0x60" text=
"Watchdog Timer Control Register" icon=
"io_flag.bmp">
368 <bitfield name=
"WDCE" mask=
"0x10" text=
"Watchdog Change Enable" icon=
""/>
369 <bitfield name=
"WDE" mask=
"0x08" text=
"Watch Dog Enable" icon=
""/>
370 <bitfield name=
"WDP" mask=
"0x07" text=
"Watch Dog Timer Prescaler bits" icon=
"" enum=
"WDOG_TIMER_PRESCALE_3BITS"/>
374 <module class=
"EEPROM">
375 <registers name=
"EEPROM" memspace=
"DATAMEM" text=
"" icon=
"io_cpu.bmp">
376 <reg size=
"2" name=
"EEAR" offset=
"0x41" text=
"EEPROM Read/Write Access Bytes" icon=
"io_cpu.bmp" mask=
"0x03FF"/>
377 <reg size=
"1" name=
"EEDR" offset=
"0x40" text=
"EEPROM Data Register" icon=
"io_cpu.bmp" mask=
"0xFF"/>
378 <reg size=
"1" name=
"EECR" offset=
"0x3F" text=
"EEPROM Control Register" icon=
"io_flag.bmp">
379 <bitfield name=
"EERIE" mask=
"0x08" text=
"EEPROM Ready Interrupt Enable" icon=
""/>
380 <bitfield name=
"EEMWE" mask=
"0x04" text=
"EEPROM Master Write Enable" icon=
""/>
381 <bitfield name=
"EEWE" mask=
"0x02" text=
"EEPROM Write Enable" icon=
""/>
382 <bitfield name=
"EERE" mask=
"0x01" text=
"EEPROM Read Enable" icon=
""/>
387 <registers name=
"SPI" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
388 <reg size=
"1" name=
"SPCR" offset=
"0x4C" text=
"SPI Control Register" icon=
"io_flag.bmp">
389 <bitfield name=
"SPIE" mask=
"0x80" text=
"SPI Interrupt Enable" icon=
""/>
390 <bitfield name=
"SPE" mask=
"0x40" text=
"SPI Enable" icon=
""/>
391 <bitfield name=
"DORD" mask=
"0x20" text=
"Data Order" icon=
""/>
392 <bitfield name=
"MSTR" mask=
"0x10" text=
"Master/Slave Select" icon=
""/>
393 <bitfield name=
"CPOL" mask=
"0x08" text=
"Clock polarity" icon=
""/>
394 <bitfield name=
"CPHA" mask=
"0x04" text=
"Clock Phase" icon=
""/>
395 <bitfield name=
"SPR" mask=
"0x03" text=
"SPI Clock Rate Selects" icon=
"" enum=
"COMM_SCK_RATE_3BIT"/>
397 <reg size=
"1" name=
"SPSR" offset=
"0x4D" text=
"SPI Status Register" icon=
"io_flag.bmp">
398 <bitfield name=
"SPIF" mask=
"0x80" text=
"SPI Interrupt Flag" icon=
""/>
399 <bitfield name=
"WCOL" mask=
"0x40" text=
"Write Collision Flag" icon=
""/>
400 <bitfield name=
"SPI2X" mask=
"0x01" text=
"Double SPI Speed Bit" icon=
""/>
402 <reg size=
"1" name=
"SPDR" offset=
"0x4E" text=
"SPI Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
405 <module class=
"PORTA">
406 <registers name=
"PORTA" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
407 <reg size=
"1" name=
"PORTA" offset=
"0x22" text=
"Port A Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
408 <reg size=
"1" name=
"DDRA" offset=
"0x21" text=
"Port A Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
409 <reg size=
"1" name=
"PINA" offset=
"0x20" text=
"Port A Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
412 <module class=
"PORTB">
413 <registers name=
"PORTB" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
414 <reg size=
"1" name=
"PORTB" offset=
"0x25" text=
"Port B Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
415 <reg size=
"1" name=
"DDRB" offset=
"0x24" text=
"Port B Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
416 <reg size=
"1" name=
"PINB" offset=
"0x23" text=
"Port B Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
419 <module class=
"PORTC">
420 <registers name=
"PORTC" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
421 <reg size=
"1" name=
"PORTC" offset=
"0x28" text=
"Port C Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
422 <reg size=
"1" name=
"DDRC" offset=
"0x27" text=
"Port C Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
423 <reg size=
"1" name=
"PINC" offset=
"0x26" text=
"Port C Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
426 <module class=
"PORTD">
427 <registers name=
"PORTD" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
428 <reg size=
"1" name=
"PORTD" offset=
"0x2B" text=
"Port D Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
429 <reg size=
"1" name=
"DDRD" offset=
"0x2A" text=
"Port D Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
430 <reg size=
"1" name=
"PIND" offset=
"0x29" text=
"Port D Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
433 <module class=
"ANALOG_COMPARATOR">
434 <registers name=
"ANALOG_COMPARATOR" memspace=
"DATAMEM" text=
"" icon=
"io_analo.bmp">
435 <reg size=
"1" name=
"ADCSRB" offset=
"0x7B" text=
"ADC Control and Status Register B" icon=
"io_flag.bmp">
436 <bitfield name=
"ACME" mask=
"0x40" text=
"Analog Comparator Multiplexer Enable" icon=
""/>
438 <reg size=
"1" name=
"ACSR" offset=
"0x50" text=
"Analog Comparator Control And Status Register" icon=
"io_analo.bmp">
439 <bitfield name=
"ACD" mask=
"0x80" text=
"Analog Comparator Disable" icon=
""/>
440 <bitfield name=
"ACBG" mask=
"0x40" text=
"Analog Comparator Bandgap Select" icon=
""/>
441 <bitfield name=
"ACO" mask=
"0x20" text=
"Analog Compare Output" icon=
""/>
442 <bitfield name=
"ACI" mask=
"0x10" text=
"Analog Comparator Interrupt Flag" icon=
""/>
443 <bitfield name=
"ACIE" mask=
"0x08" text=
"Analog Comparator Interrupt Enable" icon=
""/>
444 <bitfield name=
"ACIC" mask=
"0x04" text=
"Analog Comparator Input Capture Enable" icon=
""/>
445 <bitfield name=
"ACIS" mask=
"0x03" text=
"Analog Comparator Interrupt Mode Select bits" icon=
"" enum=
"ANALOG_COMP_INTERRUPT"/>
447 <reg size=
"1" name=
"DIDR1" offset=
"0x7F" text=
"Digital Input Disable Register 1" icon=
"io_analo.bmp">
448 <bitfield name=
"AIN1D" mask=
"0x02" text=
"AIN1 Digital Input Disable" icon=
""/>
449 <bitfield name=
"AIN0D" mask=
"0x01" text=
"AIN0 Digital Input Disable" icon=
""/>
453 <module class=
"PORTE">
454 <registers name=
"PORTE" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
455 <reg size=
"1" name=
"PORTE" offset=
"0x2E" text=
"Data Register, Port E" icon=
"io_port.bmp" mask=
"0xFF"/>
456 <reg size=
"1" name=
"DDRE" offset=
"0x2D" text=
"Data Direction Register, Port E" icon=
"io_flag.bmp" mask=
"0xFF"/>
457 <reg size=
"1" name=
"PINE" offset=
"0x2C" text=
"Input Pins, Port E" icon=
"io_port.bmp" mask=
"0xFF"/>
460 <module class=
"PORTF">
461 <registers name=
"PORTF" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
462 <reg size=
"1" name=
"PORTF" offset=
"0x31" text=
"Data Register, Port F" icon=
"io_port.bmp" mask=
"0xFF"/>
463 <reg size=
"1" name=
"DDRF" offset=
"0x30" text=
"Data Direction Register, Port F" icon=
"io_flag.bmp" mask=
"0xFF"/>
464 <reg size=
"1" name=
"PINF" offset=
"0x2F" text=
"Input Pins, Port F" icon=
"io_port.bmp" mask=
"0xFF"/>
467 <module class=
"PORTG">
468 <registers name=
"PORTG" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
469 <reg size=
"1" name=
"PORTG" offset=
"0x34" text=
"Port G Data Register" icon=
"io_port.bmp" mask=
"0x1F"/>
470 <reg size=
"1" name=
"DDRG" offset=
"0x33" text=
"Port G Data Direction Register" icon=
"io_flag.bmp" mask=
"0x1F"/>
471 <reg size=
"1" name=
"PING" offset=
"0x32" text=
"Port G Input Pins" icon=
"io_port.bmp" mask=
"0x3F"/>
474 <module class=
"JTAG">
475 <registers name=
"JTAG" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
476 <reg size=
"1" name=
"OCDR" offset=
"0x51" text=
"On-Chip Debug Related Register in I/O Memory" icon=
"io_com.bmp" mask=
"0xFF"/>
477 <reg size=
"1" name=
"MCUCR" offset=
"0x55" text=
"MCU Control Register" icon=
"io_flag.bmp">
478 <bitfield name=
"JTD" mask=
"0x80" text=
"JTAG Interface Disable" icon=
""/>
480 <reg size=
"1" name=
"MCUSR" offset=
"0x54" text=
"MCU Status Register" icon=
"io_flag.bmp">
481 <bitfield name=
"JTRF" mask=
"0x10" text=
"JTAG Reset Flag" icon=
""/>
485 <module class=
"EXTERNAL_INTERRUPT">
486 <registers name=
"EXTERNAL_INTERRUPT" memspace=
"DATAMEM" text=
"" icon=
"io_ext.bmp">
487 <reg size=
"1" name=
"EICRA" offset=
"0x69" text=
"External Interrupt Control Register A" icon=
"io_flag.bmp">
488 <bitfield name=
"ISC01" mask=
"0x02" text=
"External Interrupt Sense Control 0 Bit 1" icon=
""/>
489 <bitfield name=
"ISC00" mask=
"0x01" text=
"External Interrupt Sense Control 0 Bit 0" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL"/>
491 <reg size=
"1" name=
"EIMSK" offset=
"0x3D" text=
"External Interrupt Mask Register" icon=
"io_flag.bmp">
492 <bitfield name=
"PCIE" mask=
"0xF0" text=
"Pin Change Interrupt Enables" icon=
""/>
493 <bitfield name=
"INT0" mask=
"0x01" text=
"External Interrupt Request 0 Enable" icon=
""/>
495 <reg size=
"1" name=
"EIFR" offset=
"0x3C" text=
"External Interrupt Flag Register" icon=
"io_flag.bmp">
496 <bitfield name=
"PCIF" mask=
"0xF0" text=
"Pin Change Interrupt Flags" icon=
""/>
497 <bitfield name=
"INTF0" mask=
"0x01" text=
"External Interrupt Flag 0" icon=
""/>
499 <reg size=
"1" name=
"PCMSK3" offset=
"0x73" text=
"Pin Change Mask Register 3" icon=
"io_flag.bmp" mask=
"0x7F"/>
500 <reg size=
"1" name=
"PCMSK2" offset=
"0x6D" text=
"Pin Change Mask Register 2" icon=
"io_flag.bmp" mask=
"0xFF"/>
501 <reg size=
"1" name=
"PCMSK1" offset=
"0x6C" text=
"Pin Change Mask Register 1" icon=
"io_flag.bmp" mask=
"0xFF"/>
502 <reg size=
"1" name=
"PCMSK0" offset=
"0x6B" text=
"Pin Change Mask Register 0" icon=
"io_flag.bmp" mask=
"0xFF"/>
506 <registers name=
"CPU" memspace=
"DATAMEM" text=
"" icon=
"io_cpu.bmp">
507 <reg size=
"1" name=
"SREG" offset=
"0x5F" text=
"Status Register" icon=
"io_sreg.bmp">
508 <bitfield name=
"I" mask=
"0x80" text=
"Global Interrupt Enable" icon=
""/>
509 <bitfield name=
"T" mask=
"0x40" text=
"Bit Copy Storage" icon=
""/>
510 <bitfield name=
"H" mask=
"0x20" text=
"Half Carry Flag" icon=
""/>
511 <bitfield name=
"S" mask=
"0x10" text=
"Sign Bit" icon=
""/>
512 <bitfield name=
"V" mask=
"0x08" text=
"Two's Complement Overflow Flag" icon=
""/>
513 <bitfield name=
"N" mask=
"0x04" text=
"Negative Flag" icon=
""/>
514 <bitfield name=
"Z" mask=
"0x02" text=
"Zero Flag" icon=
""/>
515 <bitfield name=
"C" mask=
"0x01" text=
"Carry Flag" icon=
""/>
517 <reg size=
"2" name=
"SP" offset=
"0x5D" text=
"Stack Pointer " icon=
"io_sph.bmp" mask=
"0xFFFF"/>
518 <reg size=
"1" name=
"MCUCR" offset=
"0x55" text=
"MCU Control Register" icon=
"io_flag.bmp">
519 <bitfield name=
"PUD" mask=
"0x10" text=
"Pull-up disable" icon=
""/>
520 <bitfield name=
"IVSEL" mask=
"0x02" text=
"Interrupt Vector Select" icon=
""/>
521 <bitfield name=
"IVCE" mask=
"0x01" text=
"Interrupt Vector Change Enable" icon=
""/>
523 <reg size=
"1" name=
"MCUSR" offset=
"0x54" text=
"MCU Status Register" icon=
"io_flag.bmp">
524 <bitfield name=
"JTRF" mask=
"0x10" text=
"JTAG Reset Flag" icon=
""/>
525 <bitfield name=
"WDRF" mask=
"0x08" text=
"Watchdog Reset Flag" icon=
""/>
526 <bitfield name=
"BORF" mask=
"0x04" text=
"Brown-out Reset Flag" icon=
""/>
527 <bitfield name=
"EXTRF" mask=
"0x02" text=
"External Reset Flag" icon=
""/>
528 <bitfield name=
"PORF" mask=
"0x01" text=
"Power-on reset flag" icon=
""/>
530 <reg size=
"1" name=
"OSCCAL" offset=
"0x66" text=
"Oscillator Calibration Value" icon=
"io_cpu.bmp" mask=
"0xFF"/>
531 <reg size=
"1" name=
"CLKPR" offset=
"0x61" text=
"Clock Prescale Register" icon=
"io_cpu.bmp">
532 <bitfield name=
"CLKPCE" mask=
"0x80" text=
"Clock Prescaler Change Enable" icon=
""/>
533 <bitfield name=
"CLKPS" mask=
"0x0F" text=
"Clock Prescaler Select Bits" icon=
"" enum=
"CPU_CLK_PRESCALE_4_BITS_SMALL"/>
535 <reg size=
"1" name=
"PRR" offset=
"0x64" text=
"Power Reduction Register" icon=
"io_cpu.bmp">
536 <bitfield name=
"PRLCD" mask=
"0x10" text=
"Power Reduction LCD" icon=
""/>
537 <bitfield name=
"PRTIM1" mask=
"0x08" text=
"Power Reduction Timer/Counter1" icon=
""/>
538 <bitfield name=
"PRSPI" mask=
"0x04" text=
"Power Reduction Serial Peripheral Interface" icon=
""/>
539 <bitfield name=
"PRUSART0" mask=
"0x02" text=
"Power Reduction USART" icon=
""/>
540 <bitfield name=
"PRADC" mask=
"0x01" text=
"Power Reduction ADC" icon=
""/>
542 <reg size=
"1" name=
"SMCR" offset=
"0x53" text=
"Sleep Mode Control Register" icon=
"io_cpu.bmp">
543 <bitfield name=
"SM" mask=
"0x0E" text=
"Sleep Mode Select bits" icon=
"" enum=
"CPU_SLEEP_MODE_3BITS2"/>
544 <bitfield name=
"SE" mask=
"0x01" text=
"Sleep Enable" icon=
""/>
546 <reg size=
"1" name=
"GPIOR2" offset=
"0x4B" text=
"General Purpose IO Register 2" icon=
"io_cpu.bmp" mask=
"0xFF"/>
547 <reg size=
"1" name=
"GPIOR1" offset=
"0x4A" text=
"General Purpose IO Register 1" icon=
"io_cpu.bmp" mask=
"0xFF"/>
548 <reg size=
"1" name=
"GPIOR0" offset=
"0x3E" text=
"General Purpose IO Register 0" icon=
"io_cpu.bmp" mask=
"0xFF"/>
552 <registers name=
"USI" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
553 <reg size=
"1" name=
"USIDR" offset=
"0xBA" text=
"USI Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
554 <reg size=
"1" name=
"USISR" offset=
"0xB9" text=
"USI Status Register" icon=
"io_flag.bmp">
555 <bitfield name=
"USISIF" mask=
"0x80" text=
"Start Condition Interrupt Flag" icon=
""/>
556 <bitfield name=
"USIOIF" mask=
"0x40" text=
"Counter Overflow Interrupt Flag" icon=
""/>
557 <bitfield name=
"USIPF" mask=
"0x20" text=
"Stop Condition Flag" icon=
""/>
558 <bitfield name=
"USIDC" mask=
"0x10" text=
"Data Output Collision" icon=
""/>
559 <bitfield name=
"USICNT" mask=
"0x0F" text=
"USI Counter Value Bits" icon=
""/>
561 <reg size=
"1" name=
"USICR" offset=
"0xB8" text=
"USI Control Register" icon=
"io_flag.bmp">
562 <bitfield name=
"USISIE" mask=
"0x80" text=
"Start Condition Interrupt Enable" icon=
""/>
563 <bitfield name=
"USIOIE" mask=
"0x40" text=
"Counter Overflow Interrupt Enable" icon=
""/>
564 <bitfield name=
"USIWM" mask=
"0x30" text=
"USI Wire Mode Bits" icon=
"" enum=
"COMM_USI_OP"/>
565 <bitfield name=
"USICS" mask=
"0x0C" text=
"USI Clock Source Select Bits" icon=
""/>
566 <bitfield name=
"USICLK" mask=
"0x02" text=
"Clock Strobe" icon=
""/>
567 <bitfield name=
"USITC" mask=
"0x01" text=
"Toggle Clock Port Pin" icon=
""/>
571 <module class=
"AD_CONVERTER">
572 <registers name=
"AD_CONVERTER" memspace=
"DATAMEM" text=
"" icon=
"io_analo.bmp">
573 <reg size=
"1" name=
"ADMUX" offset=
"0x7C" text=
"The ADC multiplexer Selection Register" icon=
"io_analo.bmp">
574 <bitfield name=
"REFS" mask=
"0xC0" text=
"Reference Selection Bits" icon=
"" enum=
"ANALOG_ADC_V_REF3"/>
575 <bitfield name=
"ADLAR" mask=
"0x20" text=
"Left Adjust Result" icon=
""/>
576 <bitfield name=
"MUX" mask=
"0x1F" text=
"Analog Channel and Gain Selection Bits" icon=
""/>
578 <reg size=
"1" name=
"ADCSRA" offset=
"0x7A" text=
"The ADC Control and Status register" icon=
"io_flag.bmp">
579 <bitfield name=
"ADEN" mask=
"0x80" text=
"ADC Enable" icon=
""/>
580 <bitfield name=
"ADSC" mask=
"0x40" text=
"ADC Start Conversion" icon=
""/>
581 <bitfield name=
"ADATE" mask=
"0x20" text=
"ADC Auto Trigger Enable" icon=
""/>
582 <bitfield name=
"ADIF" mask=
"0x10" text=
"ADC Interrupt Flag" icon=
""/>
583 <bitfield name=
"ADIE" mask=
"0x08" text=
"ADC Interrupt Enable" icon=
""/>
584 <bitfield name=
"ADPS" mask=
"0x07" text=
"ADC Prescaler Select Bits" icon=
"" enum=
"ANALIG_ADC_PRESCALER"/>
586 <reg size=
"2" name=
"ADC" offset=
"0x78" text=
"ADC Data Register Bytes" icon=
"io_analo.bmp" mask=
"0xFFFF"/>
587 <reg size=
"1" name=
"ADCSRB" offset=
"0x7B" text=
"ADC Control and Status Register B" icon=
"io_analo.bmp">
588 <bitfield name=
"ADTS" mask=
"0x07" text=
"ADC Auto Trigger Sources" icon=
""/>
590 <reg size=
"1" name=
"DIDR0" offset=
"0x7E" text=
"Digital Input Disable Register 0" icon=
"io_analo.bmp">
591 <bitfield name=
"ADC7D" mask=
"0x80" text=
"ADC7 Digital input Disable" icon=
""/>
592 <bitfield name=
"ADC6D" mask=
"0x40" text=
"ADC6 Digital input Disable" icon=
""/>
593 <bitfield name=
"ADC5D" mask=
"0x20" text=
"ADC5 Digital input Disable" icon=
""/>
594 <bitfield name=
"ADC4D" mask=
"0x10" text=
"ADC4 Digital input Disable" icon=
""/>
595 <bitfield name=
"ADC3D" mask=
"0x08" text=
"ADC3 Digital input Disable" icon=
""/>
596 <bitfield name=
"ADC2D" mask=
"0x04" text=
"ADC2 Digital input Disable" icon=
""/>
597 <bitfield name=
"ADC1D" mask=
"0x02" text=
"ADC1 Digital input Disable" icon=
""/>
598 <bitfield name=
"ADC0D" mask=
"0x01" text=
"ADC0 Digital input Disable" icon=
""/>
602 <module class=
"BOOT_LOAD">
603 <registers name=
"BOOT_LOAD" memspace=
"DATAMEM" text=
"" icon=
"io_cpu.bmp">
604 <reg size=
"1" name=
"SPMCSR" offset=
"0x57" text=
"Store Program Memory Control Register" icon=
"io_flag.bmp">
605 <bitfield name=
"SPMIE" mask=
"0x80" text=
"SPM Interrupt Enable" icon=
""/>
606 <bitfield name=
"RWWSB" mask=
"0x40" text=
"Read While Write Section Busy" icon=
""/>
607 <bitfield name=
"RWWSRE" mask=
"0x10" text=
"Read While Write section read enable" icon=
""/>
608 <bitfield name=
"BLBSET" mask=
"0x08" text=
"Boot Lock Bit Set" icon=
""/>
609 <bitfield name=
"PGWRT" mask=
"0x04" text=
"Page Write" icon=
""/>
610 <bitfield name=
"PGERS" mask=
"0x02" text=
"Page Erase" icon=
""/>
611 <bitfield name=
"SPMEN" mask=
"0x01" text=
"Store Program Memory Enable" icon=
""/>
615 <module class=
"USART0">
616 <registers name=
"USART0" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
617 <reg size=
"1" name=
"UDR0" offset=
"0xC6" text=
"USART I/O Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
618 <reg size=
"1" name=
"UCSR0A" offset=
"0xC0" text=
"USART Control and Status Register A" icon=
"io_flag.bmp">
619 <bitfield name=
"RXC0" mask=
"0x80" text=
"USART Receive Complete" icon=
""/>
620 <bitfield name=
"TXC0" mask=
"0x40" text=
"USART Transmit Complete" icon=
""/>
621 <bitfield name=
"UDRE0" mask=
"0x20" text=
"USART Data Register Empty" icon=
""/>
622 <bitfield name=
"FE0" mask=
"0x10" text=
"Framing Error" icon=
""/>
623 <bitfield name=
"DOR0" mask=
"0x08" text=
"Data OverRun" icon=
""/>
624 <bitfield name=
"UPE0" mask=
"0x04" text=
"USART Parity Error" icon=
""/>
625 <bitfield name=
"U2X0" mask=
"0x02" text=
"Double the USART Transmission Speed" icon=
""/>
626 <bitfield name=
"MPCM0" mask=
"0x01" text=
"Multi-processor Communication Mode" icon=
""/>
628 <reg size=
"1" name=
"UCSR0B" offset=
"0xC1" text=
"USART Control and Status Register B" icon=
"io_flag.bmp">
629 <bitfield name=
"RXCIE0" mask=
"0x80" text=
"RX Complete Interrupt Enable" icon=
""/>
630 <bitfield name=
"TXCIE0" mask=
"0x40" text=
"TX Complete Interrupt Enable" icon=
""/>
631 <bitfield name=
"UDRIE0" mask=
"0x20" text=
"USART Data Register Empty Interrupt Enable" icon=
""/>
632 <bitfield name=
"RXEN0" mask=
"0x10" text=
"Receiver Enable" icon=
""/>
633 <bitfield name=
"TXEN0" mask=
"0x08" text=
"Transmitter Enable" icon=
""/>
634 <bitfield name=
"UCSZ02" mask=
"0x04" text=
"Character Size" icon=
""/>
635 <bitfield name=
"RXB80" mask=
"0x02" text=
"Receive Data Bit 8" icon=
""/>
636 <bitfield name=
"TXB80" mask=
"0x01" text=
"Transmit Data Bit 8" icon=
""/>
638 <reg size=
"1" name=
"UCSR0C" offset=
"0xC2" text=
"USART Control and Status Register C" icon=
"io_flag.bmp">
639 <bitfield name=
"UMSEL0" mask=
"0x40" text=
"USART Mode Select" icon=
"" enum=
"COMM_USART_MODE"/>
640 <bitfield name=
"UPM0" mask=
"0x30" text=
"Parity Mode Bits" icon=
"" enum=
"COMM_UPM_PARITY_MODE"/>
641 <bitfield name=
"USBS0" mask=
"0x08" text=
"Stop Bit Select" icon=
"" enum=
"COMM_STOP_BIT_SEL"/>
642 <bitfield name=
"UCSZ0" mask=
"0x06" text=
"Character Size" icon=
""/>
643 <bitfield name=
"UCPOL0" mask=
"0x01" text=
"Clock Polarity" icon=
""/>
645 <reg size=
"2" name=
"UBRR0" offset=
"0xC4" text=
"USART Baud Rate Register Bytes" icon=
"io_com.bmp" mask=
"0x0FFF"/>
648 <module class=
"PORTH">
649 <registers name=
"PORTH" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
650 <reg size=
"1" name=
"PORTH" offset=
"0xDA" text=
"PORT H Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
651 <reg size=
"1" name=
"DDRH" offset=
"0xD9" text=
"PORT H Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
652 <reg size=
"1" name=
"PINH" offset=
"0xD8" text=
"PORT H Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
655 <module class=
"PORTJ">
656 <registers name=
"PORTJ" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
657 <reg size=
"1" name=
"PORTJ" offset=
"0xDD" text=
"PORT J Data Register" icon=
"io_port.bmp" mask=
"0x7F"/>
658 <reg size=
"1" name=
"DDRJ" offset=
"0xDC" text=
"PORT J Data Direction Register" icon=
"io_flag.bmp" mask=
"0x7F"/>
659 <reg size=
"1" name=
"PINJ" offset=
"0xDB" text=
"PORT J Input Pins" icon=
"io_port.bmp" mask=
"0x7F"/>