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Devices are printed in a pretty way.
[avr-sim.git] / devices / at90usb647
blob9bef03a64338cca3f4e0475e7fb2f9efe610c779
1 <?xml version="1.0"?>
2 <!DOCTYPE device SYSTEM "device.dtd">
3 <device>
4 <interrupts num="38">
5 <interrupt vector="1" address="$000" name="RESET">External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet. </interrupt>
6 <interrupt vector="2" address="$002" name="INT0">External Interrupt Request 0</interrupt>
7 <interrupt vector="3" address="$004" name="INT1">External Interrupt Request 1</interrupt>
8 <interrupt vector="4" address="$006" name="INT2">External Interrupt Request 2</interrupt>
9 <interrupt vector="5" address="$008" name="INT3">External Interrupt Request 3</interrupt>
10 <interrupt vector="6" address="$00A" name="INT4">External Interrupt Request 4</interrupt>
11 <interrupt vector="7" address="$00C" name="INT5">External Interrupt Request 5</interrupt>
12 <interrupt vector="8" address="$00E" name="INT6">External Interrupt Request 6</interrupt>
13 <interrupt vector="9" address="$010" name="INT7">External Interrupt Request 7</interrupt>
14 <interrupt vector="10" address="$012" name="PCINT0">Pin Change Interrupt Request 0</interrupt>
15 <interrupt vector="11" address="$014" name="USB_GEN">USB General Interrupt Request</interrupt>
16 <interrupt vector="12" address="$016" name="USB_COM">USB Endpoint/Pipe Interrupt Communication Request</interrupt>
17 <interrupt vector="13" address="$018" name="WDT">Watchdog Time-out Interrupt</interrupt>
18 <interrupt vector="14" address="$01A" name="TIMER2_COMPA">Timer/Counter2 Compare Match A</interrupt>
19 <interrupt vector="15" address="$01C" name="TIMER2_COMPB">Timer/Counter2 Compare Match B</interrupt>
20 <interrupt vector="16" address="$01E" name="TIMER2_OVF">Timer/Counter2 Overflow</interrupt>
21 <interrupt vector="17" address="$020" name="TIMER1_CAPT">Timer/Counter1 Capture Event</interrupt>
22 <interrupt vector="18" address="$022" name="TIMER1_COMPA">Timer/Counter1 Compare Match A</interrupt>
23 <interrupt vector="19" address="$024" name="TIMER1_COMPB">Timer/Counter1 Compare Match B</interrupt>
24 <interrupt vector="20" address="$026" name="TIMER1_COMPC">Timer/Counter1 Compare Match C</interrupt>
25 <interrupt vector="21" address="$028" name="TIMER1_OVF">Timer/Counter1 Overflow</interrupt>
26 <interrupt vector="22" address="$02A" name="TIMER0_COMPA">Timer/Counter0 Compare Match A</interrupt>
27 <interrupt vector="23" address="$02C" name="TIMER0_COMPB">Timer/Counter0 Compare Match B</interrupt>
28 <interrupt vector="24" address="$02E" name="TIMER0_OVF">Timer/Counter0 Overflow</interrupt>
29 <interrupt vector="25" address="$030" name="SPI, STC">SPI Serial Transfer Complete</interrupt>
30 <interrupt vector="26" address="$032" name="USART1, RX">USART1, Rx Complete</interrupt>
31 <interrupt vector="27" address="$034" name="USART1, UDRE">USART1 Data register Empty</interrupt>
32 <interrupt vector="28" address="$036" name="USART1, TX">USART1, Tx Complete</interrupt>
33 <interrupt vector="29" address="$038" name="ANALOG_COMP">Analog Comparator</interrupt>
34 <interrupt vector="30" address="$03A" name="ADC">ADC Conversion Complete</interrupt>
35 <interrupt vector="31" address="$03C" name="EE_READY">EEPROM Ready</interrupt>
36 <interrupt vector="32" address="$03E" name="TIMER3_CAPT">Timer/Counter3 Capture Event</interrupt>
37 <interrupt vector="33" address="$040" name="TIMER3_COMPA">Timer/Counter3 Compare Match A</interrupt>
38 <interrupt vector="34" address="$042" name="TIMER3_COMPB">Timer/Counter3 Compare Match B</interrupt>
39 <interrupt vector="35" address="$044" name="TIMER3_COMPC">Timer/Counter3 Compare Match C</interrupt>
40 <interrupt vector="36" address="$046" name="TIMER3_OVF">Timer/Counter3 Overflow</interrupt>
41 <interrupt vector="37" address="$048" name="TWI">2-wire Serial Interface </interrupt>
42 <interrupt vector="38" address="$04A" name="SPM_READY">Store Program Memory Read</interrupt>
43 </interrupts>
44 <memory>
45 <flash size="65536"/>
46 <iospace start="$20" stop="$FF"/>
47 <sram size="4096"/>
48 <eram size="65536"/>
49 </memory>
50 <ioregisters>
51 <ioreg name="PINA" address="$00"/>
52 <ioreg name="DDRA" address="$01"/>
53 <ioreg name="PORTA" address="$02"/>
54 <ioreg name="PINB" address="$03"/>
55 <ioreg name="DDRB" address="$04"/>
56 <ioreg name="PORTB" address="$05"/>
57 <ioreg name="PINC" address="$06"/>
58 <ioreg name="DDRC" address="$07"/>
59 <ioreg name="PORTC" address="$08"/>
60 <ioreg name="PIND" address="$09"/>
61 <ioreg name="DDRD" address="$0A"/>
62 <ioreg name="PORTD" address="$0B"/>
63 <ioreg name="PINE" address="$0C"/>
64 <ioreg name="DDRE" address="$0D"/>
65 <ioreg name="PORTE" address="$0E"/>
66 <ioreg name="PINF" address="$0F"/>
67 <ioreg name="DDRF" address="$10"/>
68 <ioreg name="PORTF" address="$11"/>
69 <ioreg name="TIFR0" address="$15"/>
70 <ioreg name="TIFR1" address="$16"/>
71 <ioreg name="TIFR2" address="$17"/>
72 <ioreg name="TIFR3" address="$18"/>
73 <ioreg name="TIFR4" address="$19"/>
74 <ioreg name="TIFR5" address="$1A"/>
75 <ioreg name="PCIFR" address="$1B"/>
76 <ioreg name="EIFR" address="$1C"/>
77 <ioreg name="EIMSK" address="$1D"/>
78 <ioreg name="GPIOR0" address="$1E"/>
79 <ioreg name="EECR" address="$1F"/>
80 <ioreg name="EEDR" address="$20"/>
81 <ioreg name="EEARL" address="$21"/>
82 <ioreg name="EEARH" address="$22"/>
83 <ioreg name="GTCCR" address="$23"/>
84 <ioreg name="TCCR0A" address="$24"/>
85 <ioreg name="TCCR0B" address="$25"/>
86 <ioreg name="TCNT0" address="$26"/>
87 <ioreg name="OCR0A" address="$27"/>
88 <ioreg name="OCR0B" address="$28"/>
89 <ioreg name="PLLCSR" address="$29"/>
90 <ioreg name="GPIOR1" address="$2A"/>
91 <ioreg name="GPIOR2" address="$2B"/>
92 <ioreg name="SPCR" address="$2C"/>
93 <ioreg name="SPSR" address="$2D"/>
94 <ioreg name="SPDR" address="$2E"/>
95 <ioreg name="ACSR" address="$30"/>
96 <ioreg name="OCDR" address="$31"/>
97 <ioreg name="SMCR" address="$33"/>
98 <ioreg name="MCUSR" address="$34"/>
99 <ioreg name="MCUCR" address="$35"/>
100 <ioreg name="SPMCSR" address="$37"/>
101 <ioreg name="RAMPZ" address="$3B"/>
102 <ioreg name="EIND" address="$3C"/>
103 <ioreg name="SPL" address="$3D"/>
104 <ioreg name="SPH" address="$3E"/>
105 <ioreg name="SREG" address="$3F"/>
106 <ioreg name="WDTCSR" address="$60"/>
107 <ioreg name="CLKPR" address="$61"/>
108 <ioreg name="PRR0" address="$64"/>
109 <ioreg name="PRR1" address="$65"/>
110 <ioreg name="OSCCAL" address="$66"/>
111 <ioreg name="PCICR" address="$68"/>
112 <ioreg name="EICRA" address="$69"/>
113 <ioreg name="EICRB" address="$6A"/>
114 <ioreg name="PCMSK0" address="$6B"/>
115 <ioreg name="PCMSK1" address="$6C"/>
116 <ioreg name="PCMSK2" address="$6D"/>
117 <ioreg name="TIMSK0" address="$6E"/>
118 <ioreg name="TIMSK1" address="$6F"/>
119 <ioreg name="TIMSK2" address="$70"/>
120 <ioreg name="TIMSK3" address="$71"/>
121 <ioreg name="TIMSK4" address="$72"/>
122 <ioreg name="TIMSK5" address="$73"/>
123 <ioreg name="XMCRA" address="$74"/>
124 <ioreg name="XMCRB" address="$75"/>
125 <ioreg name="ADCL" address="$78"/>
126 <ioreg name="ADCH" address="$79"/>
127 <ioreg name="ADCSRA" address="$7A"/>
128 <ioreg name="ADCSRB" address="$7B"/>
129 <ioreg name="ADMUX" address="$7C"/>
130 <ioreg name="DIDR2" address="$7D"/>
131 <ioreg name="DIDR0" address="$7E"/>
132 <ioreg name="DIDR1" address="$7F"/>
133 <ioreg name="TCCR1A" address="$80"/>
134 <ioreg name="TCCR1B" address="$81"/>
135 <ioreg name="TCCR1C" address="$82"/>
136 <ioreg name="TCNT1L" address="$84"/>
137 <ioreg name="TCNT1H" address="$85"/>
138 <ioreg name="ICR1L" address="$86"/>
139 <ioreg name="ICR1H" address="$87"/>
140 <ioreg name="OCR1AL" address="$88"/>
141 <ioreg name="OCR1AH" address="$89"/>
142 <ioreg name="OCR1BL" address="$8A"/>
143 <ioreg name="OCR1BH" address="$8B"/>
144 <ioreg name="OCR1CL" address="$8C"/>
145 <ioreg name="OCR1CH" address="$8D"/>
146 <ioreg name="TCCR3A" address="$90"/>
147 <ioreg name="TCCR3B" address="$91"/>
148 <ioreg name="TCCR3C" address="$92"/>
149 <ioreg name="TCNT3L" address="$94"/>
150 <ioreg name="TCNT3H" address="$95"/>
151 <ioreg name="ICR3L" address="$96"/>
152 <ioreg name="ICR3H" address="$97"/>
153 <ioreg name="OCR3AL" address="$98"/>
154 <ioreg name="OCR3AH" address="$99"/>
155 <ioreg name="OCR3BL" address="$9A"/>
156 <ioreg name="OCR3BH" address="$9B"/>
157 <ioreg name="OCR3CL" address="$9C"/>
158 <ioreg name="OCR3CH" address="$9D"/>
159 <ioreg name="UHCON" address="$9E"/>
160 <ioreg name="UHINT" address="$9F"/>
161 <ioreg name="UHIEN" address="$A0"/>
162 <ioreg name="UHFNUML" address="$A2"/>
163 <ioreg name="UHFNUMH" address="$A3"/>
164 <ioreg name="UHFLEN" address="$A4"/>
165 <ioreg name="UPINRQX" address="$A5"/>
166 <ioreg name="UPINTX" address="$A6"/>
167 <ioreg name="UPNUM" address="$A7"/>
168 <ioreg name="UPRST" address="$A8"/>
169 <ioreg name="UPCONX" address="$A9"/>
170 <ioreg name="UPCFG0X" address="$AA"/>
171 <ioreg name="UPCFG1X" address="$AB"/>
172 <ioreg name="UPSTAX" address="$AC"/>
173 <ioreg name="UPCFG2X" address="$AD"/>
174 <ioreg name="UPIENX" address="$AE"/>
175 <ioreg name="UPDATX" address="$AF"/>
176 <ioreg name="TCCR2A" address="$B0"/>
177 <ioreg name="TCCR2B" address="$B1"/>
178 <ioreg name="TCNT2" address="$B2"/>
179 <ioreg name="OCR2A" address="$B3"/>
180 <ioreg name="OCR2B" address="$B4"/>
181 <ioreg name="ASSR" address="$B6"/>
182 <ioreg name="TWBR" address="$B8"/>
183 <ioreg name="TWSR" address="$B9"/>
184 <ioreg name="TWAR" address="$BA"/>
185 <ioreg name="TWDR" address="$BB"/>
186 <ioreg name="TWCR" address="$BC"/>
187 <ioreg name="TWAMR" address="$BD"/>
188 <ioreg name="UCSR1A" address="$C8"/>
189 <ioreg name="UCSR1B" address="$C9"/>
190 <ioreg name="UCSR1C" address="$CA"/>
191 <ioreg name="UBRR1L" address="$CC"/>
192 <ioreg name="UBRR1H" address="$CD"/>
193 <ioreg name="UDR1" address="$CE"/>
194 <ioreg name="UHWCON" address="$D7"/>
195 <ioreg name="USBCON" address="$D8"/>
196 <ioreg name="USBSTA" address="$D9"/>
197 <ioreg name="USBINT" address="$DA"/>
198 <ioreg name="OTGCON" address="$DD"/>
199 <ioreg name="OTGIEN" address="$DE"/>
200 <ioreg name="OTGINT" address="$DF"/>
201 <ioreg name="UDCON" address="$E0"/>
202 <ioreg name="UDINT" address="$E1"/>
203 <ioreg name="UDIEN" address="$E2"/>
204 <ioreg name="UDFNUML" address="$E4"/>
205 <ioreg name="UDFNUMH" address="$E5"/>
206 <ioreg name="UDMFN" address="$E6"/>
207 <ioreg name="UDTST" address="$E7"/>
208 <ioreg name="UEINTX" address="$E8"/>
209 <ioreg name="UENUM" address="$E9"/>
210 <ioreg name="UERST" address="$EA"/>
211 <ioreg name="UECONX" address="$EB"/>
212 <ioreg name="UECFG0X" address="$EC"/>
213 <ioreg name="UECFG1X" address="$ED"/>
214 <ioreg name="UESTA0X" address="$EE"/>
215 <ioreg name="UESTA1X" address="$EF"/>
216 <ioreg name="UEIENX" address="$F0"/>
217 <ioreg name="UEDATX" address="$F1"/>
218 <ioreg name="UEBCLX" address="$F2"/>
219 <ioreg name="UEBCHX" address="$F3"/>
220 <ioreg name="UEINT" address="$F4"/>
221 <ioreg name="UPERRX" address="$F5"/>
222 <ioreg name="UPBCLX" address="$F6"/>
223 <ioreg name="UPBCHX" address="$F7"/>
224 <ioreg name="UPINT" address="$F8"/>
225 <ioreg name="OTGTCON" address="$F9"/>
226 <ioreg name="TESTPADSTATUS" address="$FD"/>
227 <ioreg name="TESTPADPULL" address="$FE"/>
228 <ioreg name="TESTPADCTRL" address="$FF"/>
229 </ioregisters>
230 <hardware>
231 <!--Everything after this needs editing!!!-->
232 <module class="FUSE">
233 <registers name="FUSE" memspace="FUSE">
234 <reg size="1" name="EXTENDED" offset="0x02">
235 <bitfield name="BODLEVEL" mask="0x07" text="Brown-out Detector trigger level" icon="" enum="ENUM_BODLEVEL"/>
236 <bitfield name="HWBE" mask="0x08" text="Hardware Boot Enable" icon=""/>
237 </reg>
238 <reg size="1" name="HIGH" offset="0x01">
239 <bitfield name="OCDEN" mask="0x80" text="On-Chip Debug Enabled" icon=""/>
240 <bitfield name="JTAGEN" mask="0x40" text="JTAG Interface Enabled" icon=""/>
241 <bitfield name="SPIEN" mask="0x20" text="Serial program downloading (SPI) enabled" icon=""/>
242 <bitfield name="WDTON" mask="0x10" text="Watchdog timer always on" icon=""/>
243 <bitfield name="EESAVE" mask="0x08" text="Preserve EEPROM through the Chip Erase cycle" icon=""/>
244 <bitfield name="BOOTSZ" mask="0x06" text="Select Boot Size" icon="" enum="ENUM_BOOTSZ"/>
245 <bitfield name="BOOTRST" mask="0x01" text="Boot Reset vector Enabled" icon=""/>
246 </reg>
247 <reg size="1" name="LOW" offset="0x00">
248 <bitfield name="CKDIV8" mask="0x80" text="Divide clock by 8 internally" icon=""/>
249 <bitfield name="CKOUT" mask="0x40" text="Clock output on PORTC7" icon=""/>
250 <bitfield name="SUT_CKSEL" mask="0x3F" text="Select Clock Source" icon="" enum="ENUM_SUT_CKSEL"/>
251 </reg>
252 </registers>
253 </module>
254 <module class="LOCKBIT">
255 <registers name="LOCKBIT" memspace="LOCKBIT">
256 <reg size="1" name="LOCKBIT" offset="0x00">
257 <bitfield name="LB" mask="0x03" text="Memory Lock" icon="" enum="ENUM_LB"/>
258 <bitfield name="BLB0" mask="0x0C" text="Boot Loader Protection Mode" icon="" enum="ENUM_BLB"/>
259 <bitfield name="BLB1" mask="0x30" text="Boot Loader Protection Mode" icon="" enum="ENUM_BLB2"/>
260 </reg>
261 </registers>
262 </module>
263 <module class="WATCHDOG">
264 <registers name="WATCHDOG" memspace="DATAMEM" text="" icon="io_watch.bmp">
265 <reg size="1" name="WDTCSR" offset="0x60" text="Watchdog Timer Control Register" icon="io_flag.bmp">
266 <bitfield name="WDIF" mask="0x80" text="Watchdog Timeout Interrupt Flag" icon=""/>
267 <bitfield name="WDIE" mask="0x40" text="Watchdog Timeout Interrupt Enable" icon=""/>
268 <bitfield name="WDP" mask="0x27" text="Watchdog Timer Prescaler Bits" icon="" enum="WDOG_TIMER_PRESCALE_4BITS"/>
269 <bitfield name="WDCE" mask="0x10" text="Watchdog Change Enable" icon=""/>
270 <bitfield name="WDE" mask="0x08" text="Watch Dog Enable" icon=""/>
271 </reg>
272 </registers>
273 </module>
274 <module class="PORTA">
275 <registers name="PORTA" memspace="DATAMEM" text="" icon="io_port.bmp">
276 <reg size="1" name="PORTA" offset="0x22" text="Port A Data Register" icon="io_port.bmp" mask="0xFF"/>
277 <reg size="1" name="DDRA" offset="0x21" text="Port A Data Direction Register" icon="io_flag.bmp" mask="0xFF"/>
278 <reg size="1" name="PINA" offset="0x20" text="Port A Input Pins" icon="io_port.bmp" mask="0xFF"/>
279 </registers>
280 </module>
281 <module class="PORTB">
282 <registers name="PORTB" memspace="DATAMEM" text="" icon="io_port.bmp">
283 <reg size="1" name="PORTB" offset="0x25" text="Port B Data Register" icon="io_port.bmp" mask="0xFF"/>
284 <reg size="1" name="DDRB" offset="0x24" text="Port B Data Direction Register" icon="io_flag.bmp" mask="0xFF"/>
285 <reg size="1" name="PINB" offset="0x23" text="Port B Input Pins" icon="io_port.bmp" mask="0xFF"/>
286 </registers>
287 </module>
288 <module class="PORTC">
289 <registers name="PORTC" memspace="DATAMEM" text="" icon="io_port.bmp">
290 <reg size="1" name="PORTC" offset="0x28" text="Port C Data Register" icon="io_port.bmp" mask="0xFF"/>
291 <reg size="1" name="DDRC" offset="0x27" text="Port C Data Direction Register" icon="io_flag.bmp" mask="0xFF"/>
292 <reg size="1" name="PINC" offset="0x26" text="Port C Input Pins" icon="io_port.bmp" mask="0xFF"/>
293 </registers>
294 </module>
295 <module class="PORTD">
296 <registers name="PORTD" memspace="DATAMEM" text="" icon="io_port.bmp">
297 <reg size="1" name="PORTD" offset="0x2B" text="Port D Data Register" icon="io_port.bmp" mask="0xFF"/>
298 <reg size="1" name="DDRD" offset="0x2A" text="Port D Data Direction Register" icon="io_flag.bmp" mask="0xFF"/>
299 <reg size="1" name="PIND" offset="0x29" text="Port D Input Pins" icon="io_port.bmp" mask="0xFF"/>
300 </registers>
301 </module>
302 <module class="PORTE">
303 <registers name="PORTE" memspace="DATAMEM" text="" icon="io_port.bmp">
304 <reg size="1" name="PORTE" offset="0x2E" text="Data Register, Port E" icon="io_port.bmp" mask="0xFF"/>
305 <reg size="1" name="DDRE" offset="0x2D" text="Data Direction Register, Port E" icon="io_flag.bmp" mask="0xFF"/>
306 <reg size="1" name="PINE" offset="0x2C" text="Input Pins, Port E" icon="io_port.bmp" mask="0xFF"/>
307 </registers>
308 </module>
309 <module class="PORTF">
310 <registers name="PORTF" memspace="DATAMEM" text="" icon="io_port.bmp">
311 <reg size="1" name="PORTF" offset="0x31" text="Data Register, Port F" icon="io_port.bmp" mask="0xFF"/>
312 <reg size="1" name="DDRF" offset="0x30" text="Data Direction Register, Port F" icon="io_flag.bmp" mask="0xFF"/>
313 <reg size="1" name="PINF" offset="0x2F" text="Input Pins, Port F" icon="io_port.bmp" mask="0xFF"/>
314 </registers>
315 </module>
316 <module class="CPU">
317 <registers name="CPU" memspace="DATAMEM" text="" icon="io_cpu.bmp">
318 <reg size="1" name="SREG" offset="0x5F" text="Status Register" icon="io_sreg.bmp">
319 <bitfield name="I" mask="0x80" text="Global Interrupt Enable" icon=""/>
320 <bitfield name="T" mask="0x40" text="Bit Copy Storage" icon=""/>
321 <bitfield name="H" mask="0x20" text="Half Carry Flag" icon=""/>
322 <bitfield name="S" mask="0x10" text="Sign Bit" icon=""/>
323 <bitfield name="V" mask="0x08" text="Two's Complement Overflow Flag" icon=""/>
324 <bitfield name="N" mask="0x04" text="Negative Flag" icon=""/>
325 <bitfield name="Z" mask="0x02" text="Zero Flag" icon=""/>
326 <bitfield name="C" mask="0x01" text="Carry Flag" icon=""/>
327 </reg>
328 <reg size="2" name="SP" offset="0x5D" text="Stack Pointer " icon="io_sph.bmp" mask="0xFFFF"/>
329 <reg size="1" name="MCUCR" offset="0x55" text="MCU Control Register" icon="io_flag.bmp">
330 <bitfield name="JTD" mask="0x80" text="JTAG Interface Disable" icon=""/>
331 <bitfield name="PUD" mask="0x10" text="Pull-up disable" icon=""/>
332 <bitfield name="IVSEL" mask="0x02" text="Interrupt Vector Select" icon=""/>
333 <bitfield name="IVCE" mask="0x01" text="Interrupt Vector Change Enable" icon=""/>
334 </reg>
335 <reg size="1" name="MCUSR" offset="0x54" text="MCU Status Register" icon="io_flag.bmp">
336 <bitfield name="JTRF" mask="0x10" text="JTAG Reset Flag" icon=""/>
337 <bitfield name="WDRF" mask="0x08" text="Watchdog Reset Flag" icon=""/>
338 <bitfield name="BORF" mask="0x04" text="Brown-out Reset Flag" icon=""/>
339 <bitfield name="EXTRF" mask="0x02" text="External Reset Flag" icon=""/>
340 <bitfield name="PORF" mask="0x01" text="Power-on reset flag" icon=""/>
341 </reg>
342 <reg size="1" name="XMCRA" offset="0x74" text="External Memory Control Register A" icon="io_cpu.bmp">
343 <bitfield name="SRE" mask="0x80" text="External SRAM Enable" icon=""/>
344 <bitfield name="SRL" mask="0x70" text="Wait state page limit" icon="" enum="CPU_SECTOR_LIMITS3"/>
345 <bitfield name="SRW1" mask="0x0C" text="Wait state select bit upper page" icon="" enum="CPU_WAIT_STATES"/>
346 <bitfield name="SRW0" mask="0x03" text="Wait state select bit lower page" icon="" enum="CPU_WAIT_STATES"/>
347 </reg>
348 <reg size="1" name="XMCRB" offset="0x75" text="External Memory Control Register B" icon="io_cpu.bmp">
349 <bitfield name="XMBK" mask="0x80" text="External Memory Bus Keeper Enable" icon=""/>
350 <bitfield name="XMM" mask="0x07" text="External Memory High Mask" icon="" enum="CPU_PIN_RELEASE"/>
351 </reg>
352 <reg size="1" name="OSCCAL" offset="0x66" text="Oscillator Calibration Value" icon="io_cpu.bmp" mask="0xFF"/>
353 <reg size="1" name="CLKPR" offset="0x61" text="" icon="io_cpu.bmp">
354 <bitfield name="CLKPCE" mask="0x80" text="" icon=""/>
355 <bitfield name="CLKPS" mask="0x0F" text="" icon="" enum="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
356 </reg>
357 <reg size="1" name="SMCR" offset="0x53" text="Sleep Mode Control Register" icon="io_cpu.bmp">
358 <bitfield name="SM" mask="0x0E" text="Sleep Mode Select bits" icon="" enum="CPU_SLEEP_MODE_3BITS"/>
359 <bitfield name="SE" mask="0x01" text="Sleep Enable" icon=""/>
360 </reg>
361 <reg size="1" name="EIND" offset="0x5C" text="Extended Indirect Register" icon="io_cpu.bmp" mask="0x01"/>
362 <reg size="1" name="RAMPZ" offset="0x5B" text="RAM Page Z Select Register" icon="io_cpu.bmp" mask="0x01"/>
363 <reg size="1" name="GPIOR2" offset="0x4B" text="General Purpose IO Register 2" icon="io_cpu.bmp">
364 <bitfield name="GPIOR" mask="0xFF" text="General Purpose IO Register 2 bis" icon="" lsb="20"/>
365 </reg>
366 <reg size="1" name="GPIOR1" offset="0x4A" text="General Purpose IO Register 1" icon="io_cpu.bmp">
367 <bitfield name="GPIOR" mask="0xFF" text="General Purpose IO Register 1 bis" icon="" lsb="10"/>
368 </reg>
369 <reg size="1" name="GPIOR0" offset="0x3E" text="General Purpose IO Register 0" icon="io_cpu.bmp">
370 <bitfield name="GPIOR07" mask="0x80" text="General Purpose IO Register 0 bit 7" icon=""/>
371 <bitfield name="GPIOR06" mask="0x40" text="General Purpose IO Register 0 bit 6" icon=""/>
372 <bitfield name="GPIOR05" mask="0x20" text="General Purpose IO Register 0 bit 5" icon=""/>
373 <bitfield name="GPIOR04" mask="0x10" text="General Purpose IO Register 0 bit 4" icon=""/>
374 <bitfield name="GPIOR03" mask="0x08" text="General Purpose IO Register 0 bit 3" icon=""/>
375 <bitfield name="GPIOR02" mask="0x04" text="General Purpose IO Register 0 bit 2" icon=""/>
376 <bitfield name="GPIOR01" mask="0x02" text="General Purpose IO Register 0 bit 1" icon=""/>
377 <bitfield name="GPIOR00" mask="0x01" text="General Purpose IO Register 0 bit 0" icon=""/>
378 </reg>
379 <reg size="1" name="PRR1" offset="0x65" text="Power Reduction Register1" icon="io_cpu.bmp">
380 <bitfield name="PRUSB" mask="0x80" text="Power Reduction USB" icon=""/>
381 <bitfield name="PRTIM3" mask="0x08" text="Power Reduction Timer/Counter3" icon=""/>
382 <bitfield name="PRUSART1" mask="0x01" text="Power Reduction USART1" icon=""/>
383 </reg>
384 <reg size="1" name="PRR0" offset="0x64" text="Power Reduction Register0" icon="io_cpu.bmp">
385 <bitfield name="PRTWI" mask="0x80" text="Power Reduction TWI" icon=""/>
386 <bitfield name="PRTIM2" mask="0x40" text="Power Reduction Timer/Counter2" icon=""/>
387 <bitfield name="PRTIM0" mask="0x20" text="Power Reduction Timer/Counter0" icon=""/>
388 <bitfield name="PRTIM1" mask="0x08" text="Power Reduction Timer/Counter1" icon=""/>
389 <bitfield name="PRSPI" mask="0x04" text="Power Reduction Serial Peripheral Interface" icon=""/>
390 <bitfield name="PRUSART0" mask="0x02" text="Power Reduction USART" icon=""/>
391 <bitfield name="PRADC" mask="0x01" text="Power Reduction ADC" icon=""/>
392 </reg>
393 </registers>
394 </module>
395 <module class="TWI">
396 <registers name="TWI" memspace="DATAMEM" text="" icon="io_com.bmp">
397 <reg size="1" name="TWAMR" offset="0xBD" text="TWI (Slave) Address Mask Register" icon="io_com.bmp">
398 <bitfield name="TWAM" mask="0xFE" text="" icon=""/>
399 </reg>
400 <reg size="1" name="TWBR" offset="0xB8" text="TWI Bit Rate register" icon="io_com.bmp" mask="0xFF"/>
401 <reg size="1" name="TWCR" offset="0xBC" text="TWI Control Register" icon="io_flag.bmp">
402 <bitfield name="TWINT" mask="0x80" text="TWI Interrupt Flag" icon=""/>
403 <bitfield name="TWEA" mask="0x40" text="TWI Enable Acknowledge Bit" icon=""/>
404 <bitfield name="TWSTA" mask="0x20" text="TWI Start Condition Bit" icon=""/>
405 <bitfield name="TWSTO" mask="0x10" text="TWI Stop Condition Bit" icon=""/>
406 <bitfield name="TWWC" mask="0x08" text="TWI Write Collition Flag" icon=""/>
407 <bitfield name="TWEN" mask="0x04" text="TWI Enable Bit" icon=""/>
408 <bitfield name="TWIE" mask="0x01" text="TWI Interrupt Enable" icon=""/>
409 </reg>
410 <reg size="1" name="TWSR" offset="0xB9" text="TWI Status Register" icon="io_flag.bmp">
411 <bitfield name="TWS" mask="0xF8" text="TWI Status" icon="" lsb="3"/>
412 <bitfield name="TWPS" mask="0x03" text="TWI Prescaler" icon="" enum="COMM_TWI_PRESACLE"/>
413 </reg>
414 <reg size="1" name="TWDR" offset="0xBB" text="TWI Data register" icon="io_com.bmp" mask="0xFF"/>
415 <reg size="1" name="TWAR" offset="0xBA" text="TWI (Slave) Address register" icon="io_com.bmp">
416 <bitfield name="TWA" mask="0xFE" text="TWI (Slave) Address register Bits" icon=""/>
417 <bitfield name="TWGCE" mask="0x01" text="TWI General Call Recognition Enable Bit" icon=""/>
418 </reg>
419 </registers>
420 </module>
421 <module class="SPI">
422 <registers name="SPI" memspace="DATAMEM" text="" icon="io_com.bmp">
423 <reg size="1" name="SPCR" offset="0x4C" text="SPI Control Register" icon="io_flag.bmp">
424 <bitfield name="SPIE" mask="0x80" text="SPI Interrupt Enable" icon=""/>
425 <bitfield name="SPE" mask="0x40" text="SPI Enable" icon=""/>
426 <bitfield name="DORD" mask="0x20" text="Data Order" icon=""/>
427 <bitfield name="MSTR" mask="0x10" text="Master/Slave Select" icon=""/>
428 <bitfield name="CPOL" mask="0x08" text="Clock polarity" icon=""/>
429 <bitfield name="CPHA" mask="0x04" text="Clock Phase" icon=""/>
430 <bitfield name="SPR" mask="0x03" text="SPI Clock Rate Selects" icon="" enum="COMM_SCK_RATE_3BIT"/>
431 </reg>
432 <reg size="1" name="SPSR" offset="0x4D" text="SPI Status Register" icon="io_flag.bmp">
433 <bitfield name="SPIF" mask="0x80" text="SPI Interrupt Flag" icon=""/>
434 <bitfield name="WCOL" mask="0x40" text="Write Collision Flag" icon=""/>
435 <bitfield name="SPI2X" mask="0x01" text="Double SPI Speed Bit" icon=""/>
436 </reg>
437 <reg size="1" name="SPDR" offset="0x4E" text="SPI Data Register" icon="io_com.bmp" mask="0xFF"/>
438 </registers>
439 </module>
440 <module class="USART1">
441 <registers name="USART1" memspace="DATAMEM" text="" icon="io_com.bmp">
442 <reg size="1" name="UDR1" offset="0xCE" text="USART I/O Data Register" icon="io_com.bmp" mask="0xFF"/>
443 <reg size="1" name="UCSR1A" offset="0xC8" text="USART Control and Status Register A" icon="io_flag.bmp">
444 <bitfield name="RXC1" mask="0x80" text="USART Receive Complete" icon=""/>
445 <bitfield name="TXC1" mask="0x40" text="USART Transmitt Complete" icon=""/>
446 <bitfield name="UDRE1" mask="0x20" text="USART Data Register Empty" icon=""/>
447 <bitfield name="FE1" mask="0x10" text="Framing Error" icon=""/>
448 <bitfield name="DOR1" mask="0x08" text="Data overRun" icon=""/>
449 <bitfield name="UPE1" mask="0x04" text="Parity Error" icon=""/>
450 <bitfield name="U2X1" mask="0x02" text="Double the USART transmission speed" icon=""/>
451 <bitfield name="MPCM1" mask="0x01" text="Multi-processor Communication Mode" icon=""/>
452 </reg>
453 <reg size="1" name="UCSR1B" offset="0xC9" text="USART Control and Status Register B" icon="io_flag.bmp">
454 <bitfield name="RXCIE1" mask="0x80" text="RX Complete Interrupt Enable" icon=""/>
455 <bitfield name="TXCIE1" mask="0x40" text="TX Complete Interrupt Enable" icon=""/>
456 <bitfield name="UDRIE1" mask="0x20" text="USART Data register Empty Interrupt Enable" icon=""/>
457 <bitfield name="RXEN1" mask="0x10" text="Receiver Enable" icon=""/>
458 <bitfield name="TXEN1" mask="0x08" text="Transmitter Enable" icon=""/>
459 <bitfield name="UCSZ12" mask="0x04" text="Character Size" icon=""/>
460 <bitfield name="RXB81" mask="0x02" text="Receive Data Bit 8" icon=""/>
461 <bitfield name="TXB81" mask="0x01" text="Transmit Data Bit 8" icon=""/>
462 </reg>
463 <reg size="1" name="UCSR1C" offset="0xCA" text="USART Control and Status Register C" icon="io_flag.bmp">
464 <bitfield name="UMSEL1" mask="0xC0" text="USART Mode Select" icon="" enum="COMM_USART_MODE_2BIT"/>
465 <bitfield name="UPM1" mask="0x30" text="Parity Mode Bits" icon="" enum="COMM_UPM_PARITY_MODE"/>
466 <bitfield name="USBS1" mask="0x08" text="Stop Bit Select" icon="" enum="COMM_STOP_BIT_SEL"/>
467 <bitfield name="UCSZ1" mask="0x06" text="Character Size" icon=""/>
468 <bitfield name="UCPOL1" mask="0x01" text="Clock Polarity" icon=""/>
469 </reg>
470 <reg size="2" name="UBRR1" offset="0xCC" text="USART Baud Rate Register Bytes" icon="io_com.bmp" mask="0x0FFF"/>
471 </registers>
472 </module>
473 <module class="USB_DEVICE">
474 <registers name="USB_DEVICE" memspace="DATAMEM" text="" icon="io_com.bmp">
475 <reg size="1" name="UEINT" offset="0xF4" text="" icon="io_flag.bmp" mask="0x7F"/>
476 <reg size="1" name="UEBCHX" offset="0xF3" text="" icon="io_flag.bmp" mask="0x07"/>
477 <reg size="1" name="UEBCLX" offset="0xF2" text="" icon="io_flag.bmp" mask="0xFF"/>
478 <reg size="1" name="UEDATX" offset="0xF1" text="" icon="io_flag.bmp" mask="0xFF"/>
479 <reg size="1" name="UEIENX" offset="0xF0" text="" icon="io_flag.bmp">
480 <bitfield name="FLERRE" mask="0x80" text="" icon=""/>
481 <bitfield name="NAKINE" mask="0x40" text="" icon=""/>
482 <bitfield name="NAKOUTE" mask="0x10" text="" icon=""/>
483 <bitfield name="RXSTPE" mask="0x08" text="" icon=""/>
484 <bitfield name="RXOUTE" mask="0x04" text="" icon=""/>
485 <bitfield name="STALLEDE" mask="0x02" text="" icon=""/>
486 <bitfield name="TXINE" mask="0x01" text="" icon=""/>
487 </reg>
488 <reg size="1" name="UESTA1X" offset="0xEF" text="" icon="io_flag.bmp">
489 <bitfield name="CTRLDIR" mask="0x04" text="" icon=""/>
490 <bitfield name="CURRBK" mask="0x03" text="" icon=""/>
491 </reg>
492 <reg size="1" name="UESTA0X" offset="0xEE" text="" icon="io_flag.bmp">
493 <bitfield name="CFGOK" mask="0x80" text="" icon=""/>
494 <bitfield name="OVERFI" mask="0x40" text="" icon=""/>
495 <bitfield name="UNDERFI" mask="0x20" text="" icon=""/>
496 <bitfield name="ZLPSEEN" mask="0x10" text="" icon=""/>
497 <bitfield name="DTSEQ" mask="0x0C" text="" icon=""/>
498 <bitfield name="NBUSYBK" mask="0x03" text="" icon=""/>
499 </reg>
500 <reg size="1" name="UECFG1X" offset="0xED" text="" icon="io_flag.bmp">
501 <bitfield name="EPSIZE" mask="0x70" text="" icon=""/>
502 <bitfield name="EPBK" mask="0x0C" text="" icon=""/>
503 <bitfield name="ALLOC" mask="0x02" text="" icon=""/>
504 </reg>
505 <reg size="1" name="UECFG0X" offset="0xEC" text="" icon="io_flag.bmp">
506 <bitfield name="EPTYPE" mask="0xC0" text="" icon=""/>
507 <bitfield name="EPDIR" mask="0x01" text="" icon=""/>
508 </reg>
509 <reg size="1" name="UECONX" offset="0xEB" text="" icon="io_flag.bmp">
510 <bitfield name="STALLRQ" mask="0x20" text="" icon=""/>
511 <bitfield name="STALLRQC" mask="0x10" text="" icon=""/>
512 <bitfield name="RSTDT" mask="0x08" text="" icon=""/>
513 <bitfield name="EPEN" mask="0x01" text="" icon=""/>
514 </reg>
515 <reg size="1" name="UERST" offset="0xEA" text="" icon="io_flag.bmp">
516 <bitfield name="EPRST" mask="0x7F" text="" icon=""/>
517 </reg>
518 <reg size="1" name="UENUM" offset="0xE9" text="" icon="io_flag.bmp" mask="0x07"/>
519 <reg size="1" name="UEINTX" offset="0xE8" text="" icon="io_flag.bmp">
520 <bitfield name="FIFOCON" mask="0x80" text="" icon=""/>
521 <bitfield name="NAKINI" mask="0x40" text="" icon=""/>
522 <bitfield name="RWAL" mask="0x20" text="" icon=""/>
523 <bitfield name="NAKOUTI" mask="0x10" text="" icon=""/>
524 <bitfield name="RXSTPI" mask="0x08" text="" icon=""/>
525 <bitfield name="RXOUTI" mask="0x04" text="" icon=""/>
526 <bitfield name="STALLEDI" mask="0x02" text="" icon=""/>
527 <bitfield name="TXINI" mask="0x01" text="" icon=""/>
528 </reg>
529 <reg size="1" name="UDMFN" offset="0xE6" text="" icon="io_flag.bmp">
530 <bitfield name="FNCERR" mask="0x10" text="" icon=""/>
531 </reg>
532 <reg size="2" name="UDFNUM" offset="0xE4" text="" icon="io_flag.bmp" mask="0x07FF"/>
533 <reg size="1" name="UDADDR" offset="0xE3" text="" icon="io_flag.bmp">
534 <bitfield name="ADDEN" mask="0x80" text="" icon=""/>
535 <bitfield name="UDADDR" mask="0x7F" text="" icon=""/>
536 </reg>
537 <reg size="1" name="UDIEN" offset="0xE2" text="" icon="io_flag.bmp">
538 <bitfield name="UPRSME" mask="0x40" text="" icon=""/>
539 <bitfield name="EORSME" mask="0x20" text="" icon=""/>
540 <bitfield name="WAKEUPE" mask="0x10" text="" icon=""/>
541 <bitfield name="EORSTE" mask="0x08" text="" icon=""/>
542 <bitfield name="SOFE" mask="0x04" text="" icon=""/>
543 <bitfield name="MSOFE" mask="0x02" text="" icon=""/>
544 <bitfield name="SUSPE" mask="0x01" text="" icon=""/>
545 </reg>
546 <reg size="1" name="UDINT" offset="0xE1" text="" icon="io_flag.bmp">
547 <bitfield name="UPRSMI" mask="0x40" text="" icon=""/>
548 <bitfield name="EORSMI" mask="0x20" text="" icon=""/>
549 <bitfield name="WAKEUPI" mask="0x10" text="" icon=""/>
550 <bitfield name="EORSTI" mask="0x08" text="" icon=""/>
551 <bitfield name="SOFI" mask="0x04" text="" icon=""/>
552 <bitfield name="MSOFI" mask="0x02" text="" icon=""/>
553 <bitfield name="SUSPI" mask="0x01" text="" icon=""/>
554 </reg>
555 <reg size="1" name="UDCON" offset="0xE0" text="" icon="io_flag.bmp">
556 <bitfield name="LSM" mask="0x04" text="" icon=""/>
557 <bitfield name="RMWKUP" mask="0x02" text="" icon=""/>
558 <bitfield name="DETACH" mask="0x01" text="" icon=""/>
559 </reg>
560 </registers>
561 </module>
562 <module class="USB_GLOBAL">
563 <registers name="USB_GLOBAL" memspace="DATAMEM" text="" icon="io_com.bmp">
564 <reg size="1" name="OTGINT" offset="0xDF" text="" icon="io_flag.bmp">
565 <bitfield name="STOI" mask="0x20" text="" icon=""/>
566 <bitfield name="HNPERRI" mask="0x10" text="" icon=""/>
567 <bitfield name="ROLEEXI" mask="0x08" text="" icon=""/>
568 <bitfield name="BCERRI" mask="0x04" text="" icon=""/>
569 <bitfield name="VBERRI" mask="0x02" text="" icon=""/>
570 <bitfield name="SRPI" mask="0x01" text="" icon=""/>
571 </reg>
572 <reg size="1" name="OTGIEN" offset="0xDE" text="" icon="io_flag.bmp">
573 <bitfield name="STOE" mask="0x20" text="" icon=""/>
574 <bitfield name="HNPERRE" mask="0x10" text="" icon=""/>
575 <bitfield name="ROLEEXE" mask="0x08" text="" icon=""/>
576 <bitfield name="BCERRE" mask="0x04" text="" icon=""/>
577 <bitfield name="VBERRE" mask="0x02" text="" icon=""/>
578 <bitfield name="SRPE" mask="0x01" text="" icon=""/>
579 </reg>
580 <reg size="1" name="OTGCON" offset="0xDD" text="" icon="io_flag.bmp">
581 <bitfield name="HNPREQ" mask="0x20" text="" icon=""/>
582 <bitfield name="SRPREQ" mask="0x10" text="" icon=""/>
583 <bitfield name="SRPSEL" mask="0x08" text="" icon=""/>
584 <bitfield name="VBUSHWC" mask="0x04" text="" icon=""/>
585 <bitfield name="VBUSREQ" mask="0x02" text="" icon=""/>
586 <bitfield name="VBUSRQC" mask="0x01" text="" icon=""/>
587 </reg>
588 <reg size="1" name="OTGTCON" offset="0xF9" text="" icon="io_flag.bmp">
589 <bitfield name="OTGTCON_7" mask="0x80" text="" icon=""/>
590 <bitfield name="PAGE" mask="0x60" text="" icon=""/>
591 <bitfield name="VALUE_2" mask="0x07" text="" icon=""/>
592 </reg>
593 <reg size="1" name="USBINT" offset="0xDA" text="" icon="io_flag.bmp">
594 <bitfield name="IDTI" mask="0x02" text="" icon=""/>
595 <bitfield name="VBUSTI" mask="0x01" text="" icon=""/>
596 </reg>
597 <reg size="1" name="USBSTA" offset="0xD9" text="" icon="io_flag.bmp">
598 <bitfield name="SPEED" mask="0x08" text="" icon=""/>
599 <bitfield name="ID" mask="0x02" text="" icon=""/>
600 <bitfield name="VBUS" mask="0x01" text="" icon=""/>
601 </reg>
602 <reg size="1" name="USBCON" offset="0xD8" text="USB General Control Register" icon="io_flag.bmp">
603 <bitfield name="USBE" mask="0x80" text="" icon=""/>
604 <bitfield name="HOST" mask="0x40" text="" icon=""/>
605 <bitfield name="FRZCLK" mask="0x20" text="" icon=""/>
606 <bitfield name="OTGPADE" mask="0x10" text="" icon=""/>
607 <bitfield name="IDTE" mask="0x02" text="" icon=""/>
608 <bitfield name="VBUSTE" mask="0x01" text="" icon=""/>
609 </reg>
610 <reg size="1" name="UHWCON" offset="0xD7" text="USB Hardware Configuration Register" icon="io_flag.bmp">
611 <bitfield name="UIMOD" mask="0x80" text="" icon=""/>
612 <bitfield name="UIDE" mask="0x40" text="" icon=""/>
613 <bitfield name="UVCONE" mask="0x10" text="" icon=""/>
614 <bitfield name="UVREGE" mask="0x01" text="" icon=""/>
615 </reg>
616 </registers>
617 </module>
618 <module class="USB_HOST">
619 <registers name="USB_HOST" memspace="DATAMEM" text="" icon="io_com.bmp">
620 <reg size="1" name="UPERRX" offset="0xF5" text="" icon="io_flag.bmp">
621 <bitfield name="COUNTER" mask="0x60" text="" icon=""/>
622 <bitfield name="CRC16" mask="0x10" text="" icon=""/>
623 <bitfield name="TIMEOUT" mask="0x08" text="" icon=""/>
624 <bitfield name="PID" mask="0x04" text="" icon=""/>
625 <bitfield name="DATAPID" mask="0x02" text="" icon=""/>
626 <bitfield name="DATATGL" mask="0x01" text="" icon=""/>
627 </reg>
628 <reg size="1" name="UPINT" offset="0xF8" text="" icon="io_flag.bmp" mask="0x7F"/>
629 <reg size="1" name="UPBCHX" offset="0xF7" text="" icon="io_flag.bmp" mask="0x07"/>
630 <reg size="1" name="UPBCLX" offset="0xF6" text="" icon="io_flag.bmp" mask="0xFF"/>
631 <reg size="1" name="UPDATX" offset="0xAF" text="" icon="io_flag.bmp" mask="0xFF"/>
632 <reg size="1" name="UPIENX" offset="0xAE" text="" icon="io_flag.bmp">
633 <bitfield name="FLERRE" mask="0x80" text="" icon=""/>
634 <bitfield name="NAKEDE" mask="0x40" text="" icon=""/>
635 <bitfield name="PERRE" mask="0x10" text="" icon=""/>
636 <bitfield name="TXSTPE" mask="0x08" text="" icon=""/>
637 <bitfield name="TXOUTE" mask="0x04" text="" icon=""/>
638 <bitfield name="RXSTALLE" mask="0x02" text="" icon=""/>
639 <bitfield name="RXINE" mask="0x01" text="" icon=""/>
640 </reg>
641 <reg size="1" name="UPCFG2X" offset="0xAD" text="" icon="io_flag.bmp" mask="0xFF"/>
642 <reg size="1" name="UPSTAX" offset="0xAC" text="" icon="io_flag.bmp">
643 <bitfield name="CFGOK" mask="0x80" text="" icon=""/>
644 <bitfield name="OVERFI" mask="0x40" text="" icon=""/>
645 <bitfield name="UNDERFI" mask="0x20" text="" icon=""/>
646 <bitfield name="DTSEQ" mask="0x0C" text="" icon=""/>
647 <bitfield name="NBUSYK" mask="0x03" text="" icon=""/>
648 </reg>
649 <reg size="1" name="UPCFG1X" offset="0xAB" text="" icon="io_flag.bmp">
650 <bitfield name="PSIZE" mask="0x70" text="" icon=""/>
651 <bitfield name="PBK" mask="0x0C" text="" icon=""/>
652 <bitfield name="ALLOC" mask="0x02" text="" icon=""/>
653 </reg>
654 <reg size="1" name="UPCFG0X" offset="0xAA" text="" icon="io_flag.bmp">
655 <bitfield name="PTYPE" mask="0xC0" text="" icon=""/>
656 <bitfield name="PTOKEN" mask="0x30" text="" icon=""/>
657 <bitfield name="PEPNUM" mask="0x0F" text="" icon=""/>
658 </reg>
659 <reg size="1" name="UPCONX" offset="0xA9" text="" icon="io_flag.bmp">
660 <bitfield name="PFREEZE" mask="0x40" text="" icon=""/>
661 <bitfield name="INMODE" mask="0x20" text="" icon=""/>
662 <bitfield name="RSTDT" mask="0x08" text="" icon=""/>
663 <bitfield name="PEN" mask="0x01" text="" icon=""/>
664 </reg>
665 <reg size="1" name="UPRST" offset="0xA8" text="" icon="io_flag.bmp">
666 <bitfield name="PRST" mask="0x7F" text="" icon=""/>
667 </reg>
668 <reg size="1" name="UPNUM" offset="0xA7" text="" icon="io_flag.bmp" mask="0x07"/>
669 <reg size="1" name="UPINTX" offset="0xA6" text="" icon="io_flag.bmp">
670 <bitfield name="FIFOCON" mask="0x80" text="" icon=""/>
671 <bitfield name="NAKEDI" mask="0x40" text="" icon=""/>
672 <bitfield name="RWAL" mask="0x20" text="" icon=""/>
673 <bitfield name="PERRI" mask="0x10" text="" icon=""/>
674 <bitfield name="TXSTPI" mask="0x08" text="" icon=""/>
675 <bitfield name="TXOUTI" mask="0x04" text="" icon=""/>
676 <bitfield name="RXSTALLI" mask="0x02" text="" icon=""/>
677 <bitfield name="RXINI" mask="0x01" text="" icon=""/>
678 </reg>
679 <reg size="1" name="UPINRQX" offset="0xA5" text="" icon="io_flag.bmp" mask="0xFF"/>
680 <reg size="1" name="UHFLEN" offset="0xA4" text="" icon="io_flag.bmp" mask="0xFF"/>
681 <reg size="2" name="UHFNUM" offset="0xA2" text="" icon="io_flag.bmp" mask="0x07FF"/>
682 <reg size="1" name="UHADDR" offset="0xA1" text="" icon="io_flag.bmp" mask="0x7F"/>
683 <reg size="1" name="UHIEN" offset="0xA0" text="" icon="io_flag.bmp">
684 <bitfield name="HWUPE" mask="0x40" text="" icon=""/>
685 <bitfield name="HSOFE" mask="0x20" text="" icon=""/>
686 <bitfield name="RXRSME" mask="0x10" text="" icon=""/>
687 <bitfield name="RSMEDE" mask="0x08" text="" icon=""/>
688 <bitfield name="RSTE" mask="0x04" text="" icon=""/>
689 <bitfield name="DDISCE" mask="0x02" text="" icon=""/>
690 <bitfield name="DCONNE" mask="0x01" text="" icon=""/>
691 </reg>
692 <reg size="1" name="UHINT" offset="0x9F" text="" icon="io_flag.bmp">
693 <bitfield name="UHUPI" mask="0x40" text="" icon=""/>
694 <bitfield name="HSOFI" mask="0x20" text="" icon=""/>
695 <bitfield name="RXRSMI" mask="0x10" text="" icon=""/>
696 <bitfield name="RSMEDI" mask="0x08" text="" icon=""/>
697 <bitfield name="RSTI" mask="0x04" text="" icon=""/>
698 <bitfield name="DDISCI" mask="0x02" text="" icon=""/>
699 <bitfield name="DCONNI" mask="0x01" text="" icon=""/>
700 </reg>
701 <reg size="1" name="UHCON" offset="0x9E" text="" icon="io_flag.bmp">
702 <bitfield name="RESUME" mask="0x04" text="" icon=""/>
703 <bitfield name="RESET" mask="0x02" text="" icon=""/>
704 <bitfield name="SOFEN" mask="0x01" text="" icon=""/>
705 </reg>
706 </registers>
707 </module>
708 <module class="BOOT_LOAD">
709 <registers name="BOOT_LOAD" memspace="DATAMEM" text="" icon="io_cpu.bmp">
710 <reg size="1" name="SPMCSR" offset="0x57" text="Store Program Memory Control Register" icon="io_flag.bmp">
711 <bitfield name="SPMIE" mask="0x80" text="SPM Interrupt Enable" icon=""/>
712 <bitfield name="RWWSB" mask="0x40" text="Read While Write Section Busy" icon=""/>
713 <bitfield name="SIGRD" mask="0x20" text="Signature Row Read" icon=""/>
714 <bitfield name="RWWSRE" mask="0x10" text="Read While Write section read enable" icon=""/>
715 <bitfield name="BLBSET" mask="0x08" text="Boot Lock Bit Set" icon=""/>
716 <bitfield name="PGWRT" mask="0x04" text="Page Write" icon=""/>
717 <bitfield name="PGERS" mask="0x02" text="Page Erase" icon=""/>
718 <bitfield name="SPMEN" mask="0x01" text="Store Program Memory Enable" icon=""/>
719 </reg>
720 </registers>
721 </module>
722 <module class="EEPROM">
723 <registers name="EEPROM" memspace="DATAMEM" text="" icon="io_cpu.bmp">
724 <reg size="2" name="EEAR" offset="0x41" text="EEPROM Address Register Low Bytes" icon="io_cpu.bmp" mask="0x0FFF"/>
725 <reg size="1" name="EEDR" offset="0x40" text="EEPROM Data Register" icon="io_cpu.bmp" mask="0xFF"/>
726 <reg size="1" name="EECR" offset="0x3F" text="EEPROM Control Register" icon="io_flag.bmp">
727 <bitfield name="EEPM" mask="0x30" text="EEPROM Programming Mode Bits" icon="" enum="EEP_MODE"/>
728 <bitfield name="EERIE" mask="0x08" text="EEPROM Ready Interrupt Enable" icon=""/>
729 <bitfield name="EEMPE" mask="0x04" text="EEPROM Master Write Enable" icon=""/>
730 <bitfield name="EEPE" mask="0x02" text="EEPROM Write Enable" icon=""/>
731 <bitfield name="EERE" mask="0x01" text="EEPROM Read Enable" icon=""/>
732 </reg>
733 </registers>
734 </module>
735 <module class="TIMER_COUNTER_0">
736 <registers name="TIMER_COUNTER_0" memspace="DATAMEM" text="" icon="io_timer.bmp">
737 <reg size="1" name="OCR0B" offset="0x48" text="Timer/Counter0 Output Compare Register" icon="io_timer.bmp" mask="0xFF"/>
738 <reg size="1" name="OCR0A" offset="0x47" text="Timer/Counter0 Output Compare Register" icon="io_timer.bmp" mask="0xFF"/>
739 <reg size="1" name="TCNT0" offset="0x46" text="Timer/Counter0" icon="io_timer.bmp" mask="0xFF"/>
740 <reg size="1" name="TCCR0B" offset="0x45" text="Timer/Counter Control Register B" icon="io_flag.bmp">
741 <bitfield name="FOC0A" mask="0x80" text="Force Output Compare A" icon=""/>
742 <bitfield name="FOC0B" mask="0x40" text="Force Output Compare B" icon=""/>
743 <bitfield name="WGM02" mask="0x08" text="" icon=""/>
744 <bitfield name="CS0" mask="0x07" text="Clock Select" icon="" enum="CLK_SEL_3BIT_EXT"/>
745 </reg>
746 <reg size="1" name="TCCR0A" offset="0x44" text="Timer/Counter Control Register A" icon="io_flag.bmp">
747 <bitfield name="COM0A" mask="0xC0" text="Compare Output Mode, Phase Correct PWM Mode" icon=""/>
748 <bitfield name="COM0B" mask="0x30" text="Compare Output Mode, Fast PWm" icon=""/>
749 <bitfield name="WGM0" mask="0x03" text="Waveform Generation Mode" icon=""/>
750 </reg>
751 <reg size="1" name="TIMSK0" offset="0x6E" text="Timer/Counter0 Interrupt Mask Register" icon="io_flag.bmp">
752 <bitfield name="OCIE0B" mask="0x04" text="Timer/Counter0 Output Compare Match B Interrupt Enable" icon=""/>
753 <bitfield name="OCIE0A" mask="0x02" text="Timer/Counter0 Output Compare Match A Interrupt Enable" icon=""/>
754 <bitfield name="TOIE0" mask="0x01" text="Timer/Counter0 Overflow Interrupt Enable" icon=""/>
755 </reg>
756 <reg size="1" name="TIFR0" offset="0x35" text="Timer/Counter0 Interrupt Flag register" icon="io_flag.bmp">
757 <bitfield name="OCF0B" mask="0x04" text="Timer/Counter0 Output Compare Flag 0B" icon=""/>
758 <bitfield name="OCF0A" mask="0x02" text="Timer/Counter0 Output Compare Flag 0A" icon=""/>
759 <bitfield name="TOV0" mask="0x01" text="Timer/Counter0 Overflow Flag" icon=""/>
760 </reg>
761 <reg size="1" name="GTCCR" offset="0x43" text="General Timer/Counter Control Register" icon="io_flag.bmp">
762 <bitfield name="TSM" mask="0x80" text="Timer/Counter Synchronization Mode" icon=""/>
763 <bitfield name="PSRSYNC" mask="0x01" text="Prescaler Reset Timer/Counter1 and Timer/Counter0" icon=""/>
764 </reg>
765 </registers>
766 </module>
767 <module class="TIMER_COUNTER_2">
768 <registers name="TIMER_COUNTER_2" memspace="DATAMEM" text="" icon="io_timer.bmp">
769 <reg size="1" name="TIMSK2" offset="0x70" text="Timer/Counter Interrupt Mask register" icon="io_flag.bmp">
770 <bitfield name="OCIE2B" mask="0x04" text="Timer/Counter2 Output Compare Match B Interrupt Enable" icon=""/>
771 <bitfield name="OCIE2A" mask="0x02" text="Timer/Counter2 Output Compare Match A Interrupt Enable" icon=""/>
772 <bitfield name="TOIE2" mask="0x01" text="Timer/Counter2 Overflow Interrupt Enable" icon=""/>
773 </reg>
774 <reg size="1" name="TIFR2" offset="0x37" text="Timer/Counter Interrupt Flag Register" icon="io_flag.bmp">
775 <bitfield name="OCF2B" mask="0x04" text="Output Compare Flag 2B" icon=""/>
776 <bitfield name="OCF2A" mask="0x02" text="Output Compare Flag 2A" icon=""/>
777 <bitfield name="TOV2" mask="0x01" text="Timer/Counter2 Overflow Flag" icon=""/>
778 </reg>
779 <reg size="1" name="TCCR2A" offset="0xB0" text="Timer/Counter2 Control Register A" icon="io_flag.bmp">
780 <bitfield name="COM2A" mask="0xC0" text="Compare Output Mode bits" icon=""/>
781 <bitfield name="COM2B" mask="0x30" text="Compare Output Mode bits" icon=""/>
782 <bitfield name="WGM2" mask="0x03" text="Waveform Genration Mode" icon=""/>
783 </reg>
784 <reg size="1" name="TCCR2B" offset="0xB1" text="Timer/Counter2 Control Register B" icon="io_flag.bmp">
785 <bitfield name="FOC2A" mask="0x80" text="Force Output Compare A" icon=""/>
786 <bitfield name="FOC2B" mask="0x40" text="Force Output Compare B" icon=""/>
787 <bitfield name="WGM22" mask="0x08" text="Waveform Generation Mode" icon=""/>
788 <bitfield name="CS2" mask="0x07" text="Clock Select bits" icon="" enum="CLK_SEL_3BIT"/>
789 </reg>
790 <reg size="1" name="TCNT2" offset="0xB2" text="Timer/Counter2" icon="io_timer.bmp" mask="0xFF"/>
791 <reg size="1" name="OCR2B" offset="0xB4" text="Timer/Counter2 Output Compare Register B" icon="io_timer.bmp" mask="0xFF"/>
792 <reg size="1" name="OCR2A" offset="0xB3" text="Timer/Counter2 Output Compare Register A" icon="io_timer.bmp" mask="0xFF"/>
793 <reg size="1" name="ASSR" offset="0xB6" text="Asynchronous Status Register" icon="io_flag.bmp">
794 <bitfield name="EXCLK" mask="0x40" text="Enable External Clock Input" icon=""/>
795 <bitfield name="AS2" mask="0x20" text="Asynchronous Timer/Counter2" icon=""/>
796 <bitfield name="TCN2UB" mask="0x10" text="Timer/Counter2 Update Busy" icon=""/>
797 <bitfield name="OCR2AUB" mask="0x08" text="Output Compare Register2 Update Busy" icon=""/>
798 <bitfield name="OCR2BUB" mask="0x04" text="Output Compare Register 2 Update Busy" icon=""/>
799 <bitfield name="TCR2AUB" mask="0x02" text="Timer/Counter Control Register2 Update Busy" icon=""/>
800 <bitfield name="TCR2BUB" mask="0x01" text="Timer/Counter Control Register2 Update Busy" icon=""/>
801 </reg>
802 <reg size="1" name="GTCCR" offset="0x43" text="General Timer Counter Control register" icon="io_flag.bmp">
803 <bitfield name="TSM" mask="0x80" text="Timer/Counter Synchronization Mode" icon=""/>
804 <bitfield name="PSRASY" mask="0x02" text="Prescaler Reset Timer/Counter2" icon=""/>
805 </reg>
806 </registers>
807 </module>
808 <module class="TIMER_COUNTER_3">
809 <registers name="TIMER_COUNTER_3" memspace="DATAMEM" text="" icon="io_timer.bmp">
810 <reg size="1" name="TCCR3A" offset="0x90" text="Timer/Counter3 Control Register A" icon="io_flag.bmp">
811 <bitfield name="COM3A" mask="0xC0" text="Compare Output Mode 1A, bits" icon=""/>
812 <bitfield name="COM3B" mask="0x30" text="Compare Output Mode 3B, bits" icon=""/>
813 <bitfield name="COM3C" mask="0x0C" text="Compare Output Mode 3C, bits" icon=""/>
814 <bitfield name="WGM3" mask="0x03" text="Waveform Generation Mode" icon=""/>
815 </reg>
816 <reg size="1" name="TCCR3B" offset="0x91" text="Timer/Counter3 Control Register B" icon="io_flag.bmp">
817 <bitfield name="ICNC3" mask="0x80" text="Input Capture 3 Noise Canceler" icon=""/>
818 <bitfield name="ICES3" mask="0x40" text="Input Capture 3 Edge Select" icon=""/>
819 <bitfield name="WGM3" mask="0x18" text="Waveform Generation Mode" icon="" lsb="2"/>
820 <bitfield name="CS3" mask="0x07" text="Prescaler source of Timer/Counter 3" icon="" enum="CLK_SEL_3BIT_EXT"/>
821 </reg>
822 <reg size="1" name="TCCR3C" offset="0x92" text="Timer/Counter 3 Control Register C" icon="io_flag.bmp">
823 <bitfield name="FOC3A" mask="0x80" text="Force Output Compare 3A" icon=""/>
824 <bitfield name="FOC3B" mask="0x40" text="Force Output Compare 3B" icon=""/>
825 <bitfield name="FOC3C" mask="0x20" text="Force Output Compare 3C" icon=""/>
826 </reg>
827 <reg size="2" name="TCNT3" offset="0x94" text="Timer/Counter3 Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
828 <reg size="2" name="OCR3A" offset="0x98" text="Timer/Counter3 Outbut Compare Register A Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
829 <reg size="2" name="OCR3B" offset="0x9A" text="Timer/Counter3 Output Compare Register B Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
830 <reg size="2" name="OCR3C" offset="0x9C" text="Timer/Counter3 Output Compare Register B Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
831 <reg size="2" name="ICR3" offset="0x96" text="Timer/Counter3 Input Capture Register Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
832 <reg size="1" name="TIMSK3" offset="0x71" text="Timer/Counter3 Interrupt Mask Register" icon="io_flag.bmp">
833 <bitfield name="ICIE3" mask="0x20" text="Timer/Counter3 Input Capture Interrupt Enable" icon=""/>
834 <bitfield name="OCIE3C" mask="0x08" text="Timer/Counter3 Output Compare C Match Interrupt Enable" icon=""/>
835 <bitfield name="OCIE3B" mask="0x04" text="Timer/Counter3 Output Compare B Match Interrupt Enable" icon=""/>
836 <bitfield name="OCIE3A" mask="0x02" text="Timer/Counter3 Output Compare A Match Interrupt Enable" icon=""/>
837 <bitfield name="TOIE3" mask="0x01" text="Timer/Counter3 Overflow Interrupt Enable" icon=""/>
838 </reg>
839 <reg size="1" name="TIFR3" offset="0x38" text="Timer/Counter3 Interrupt Flag register" icon="io_flag.bmp">
840 <bitfield name="ICF3" mask="0x20" text="Input Capture Flag 3" icon=""/>
841 <bitfield name="OCF3C" mask="0x08" text="Output Compare Flag 3C" icon=""/>
842 <bitfield name="OCF3B" mask="0x04" text="Output Compare Flag 3B" icon=""/>
843 <bitfield name="OCF3A" mask="0x02" text="Output Compare Flag 3A" icon=""/>
844 <bitfield name="TOV3" mask="0x01" text="Timer/Counter3 Overflow Flag" icon=""/>
845 </reg>
846 </registers>
847 </module>
848 <module class="TIMER_COUNTER_1">
849 <registers name="TIMER_COUNTER_1" memspace="DATAMEM" text="" icon="io_timer.bmp">
850 <reg size="1" name="TCCR1A" offset="0x80" text="Timer/Counter1 Control Register A" icon="io_flag.bmp">
851 <bitfield name="COM1A" mask="0xC0" text="Compare Output Mode 1A, bits" icon=""/>
852 <bitfield name="COM1B" mask="0x30" text="Compare Output Mode 1B, bits" icon=""/>
853 <bitfield name="COM1C" mask="0x0C" text="Compare Output Mode 1C, bits" icon=""/>
854 <bitfield name="WGM1" mask="0x03" text="Waveform Generation Mode" icon=""/>
855 </reg>
856 <reg size="1" name="TCCR1B" offset="0x81" text="Timer/Counter1 Control Register B" icon="io_flag.bmp">
857 <bitfield name="ICNC1" mask="0x80" text="Input Capture 1 Noise Canceler" icon=""/>
858 <bitfield name="ICES1" mask="0x40" text="Input Capture 1 Edge Select" icon=""/>
859 <bitfield name="WGM1" mask="0x18" text="Waveform Generation Mode" icon="" lsb="2"/>
860 <bitfield name="CS1" mask="0x07" text="Prescaler source of Timer/Counter 1" icon="" enum="CLK_SEL_3BIT_EXT"/>
861 </reg>
862 <reg size="1" name="TCCR1C" offset="0x82" text="Timer/Counter 1 Control Register C" icon="io_flag.bmp">
863 <bitfield name="FOC1A" mask="0x80" text="Force Output Compare 1A" icon=""/>
864 <bitfield name="FOC1B" mask="0x40" text="Force Output Compare 1B" icon=""/>
865 <bitfield name="FOC1C" mask="0x20" text="Force Output Compare 1C" icon=""/>
866 </reg>
867 <reg size="2" name="TCNT1" offset="0x84" text="Timer/Counter1 Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
868 <reg size="2" name="OCR1A" offset="0x88" text="Timer/Counter1 Outbut Compare Register A Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
869 <reg size="2" name="OCR1B" offset="0x8A" text="Timer/Counter1 Output Compare Register B Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
870 <reg size="2" name="OCR1C" offset="0x8C" text="Timer/Counter1 Output Compare Register C Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
871 <reg size="2" name="ICR1" offset="0x86" text="Timer/Counter1 Input Capture Register Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
872 <reg size="1" name="TIMSK1" offset="0x6F" text="Timer/Counter1 Interrupt Mask Register" icon="io_flag.bmp">
873 <bitfield name="ICIE1" mask="0x20" text="Timer/Counter1 Input Capture Interrupt Enable" icon=""/>
874 <bitfield name="OCIE1C" mask="0x08" text="Timer/Counter1 Output Compare C Match Interrupt Enable" icon=""/>
875 <bitfield name="OCIE1B" mask="0x04" text="Timer/Counter1 Output Compare B Match Interrupt Enable" icon=""/>
876 <bitfield name="OCIE1A" mask="0x02" text="Timer/Counter1 Output Compare A Match Interrupt Enable" icon=""/>
877 <bitfield name="TOIE1" mask="0x01" text="Timer/Counter1 Overflow Interrupt Enable" icon=""/>
878 </reg>
879 <reg size="1" name="TIFR1" offset="0x36" text="Timer/Counter1 Interrupt Flag register" icon="io_flag.bmp">
880 <bitfield name="ICF1" mask="0x20" text="Input Capture Flag 1" icon=""/>
881 <bitfield name="OCF1C" mask="0x08" text="Output Compare Flag 1C" icon=""/>
882 <bitfield name="OCF1B" mask="0x04" text="Output Compare Flag 1B" icon=""/>
883 <bitfield name="OCF1A" mask="0x02" text="Output Compare Flag 1A" icon=""/>
884 <bitfield name="TOV1" mask="0x01" text="Timer/Counter1 Overflow Flag" icon=""/>
885 </reg>
886 </registers>
887 </module>
888 <module class="JTAG">
889 <registers name="JTAG" memspace="DATAMEM" text="" icon="io_com.bmp">
890 <reg size="1" name="OCDR" offset="0x51" text="On-Chip Debug Related Register in I/O Memory" icon="io_com.bmp" mask="0xFF"/>
891 <reg size="1" name="MCUCR" offset="0x55" text="MCU Control Register" icon="io_flag.bmp">
892 <bitfield name="JTD" mask="0x80" text="JTAG Interface Disable" icon=""/>
893 </reg>
894 <reg size="1" name="MCUSR" offset="0x54" text="MCU Status Register" icon="io_flag.bmp">
895 <bitfield name="JTRF" mask="0x10" text="JTAG Reset Flag" icon=""/>
896 </reg>
897 </registers>
898 </module>
899 <module class="EXTERNAL_INTERRUPT">
900 <registers name="EXTERNAL_INTERRUPT" memspace="DATAMEM" text="" icon="io_ext.bmp">
901 <reg size="1" name="EICRA" offset="0x69" text="External Interrupt Control Register A" icon="io_flag.bmp">
902 <bitfield name="ISC3" mask="0xC0" text="External Interrupt Sense Control Bit" icon="" enum="INTERRUPT_SENSE_CONTROL"/>
903 <bitfield name="ISC2" mask="0x30" text="External Interrupt Sense Control Bit" icon="" enum="INTERRUPT_SENSE_CONTROL"/>
904 <bitfield name="ISC1" mask="0x0C" text="External Interrupt Sense Control Bit" icon="" enum="INTERRUPT_SENSE_CONTROL"/>
905 <bitfield name="ISC0" mask="0x03" text="External Interrupt Sense Control Bit" icon="" enum="INTERRUPT_SENSE_CONTROL"/>
906 </reg>
907 <reg size="1" name="EICRB" offset="0x6A" text="External Interrupt Control Register B" icon="io_flag.bmp">
908 <bitfield name="ISC7" mask="0xC0" text="External Interrupt 7-4 Sense Control Bit" icon="" enum="INTERRUPT_SENSE_CONTROL"/>
909 <bitfield name="ISC6" mask="0x30" text="External Interrupt 7-4 Sense Control Bit" icon="" enum="INTERRUPT_SENSE_CONTROL"/>
910 <bitfield name="ISC5" mask="0x0C" text="External Interrupt 7-4 Sense Control Bit" icon="" enum="INTERRUPT_SENSE_CONTROL"/>
911 <bitfield name="ISC4" mask="0x03" text="External Interrupt 7-4 Sense Control Bit" icon="" enum="INTERRUPT_SENSE_CONTROL"/>
912 </reg>
913 <reg size="1" name="EIMSK" offset="0x3D" text="External Interrupt Mask Register" icon="io_flag.bmp">
914 <bitfield name="INT" mask="0xFF" text="External Interrupt Request 7 Enable" icon=""/>
915 </reg>
916 <reg size="1" name="EIFR" offset="0x3C" text="External Interrupt Flag Register" icon="io_flag.bmp">
917 <bitfield name="INTF" mask="0xFF" text="External Interrupt Flags" icon=""/>
918 </reg>
919 <reg size="1" name="PCMSK0" offset="0x6B" text="Pin Change Mask Register 0" icon="io_flag.bmp" mask="0xFF"/>
920 <reg size="1" name="PCIFR" offset="0x3B" text="Pin Change Interrupt Flag Register" icon="io_flag.bmp">
921 <bitfield name="PCIF0" mask="0x01" text="Pin Change Interrupt Flag 0" icon=""/>
922 </reg>
923 <reg size="1" name="PCICR" offset="0x68" text="Pin Change Interrupt Control Register" icon="io_flag.bmp">
924 <bitfield name="PCIE0" mask="0x01" text="Pin Change Interrupt Enable 0" icon=""/>
925 </reg>
926 </registers>
927 </module>
928 <module class="AD_CONVERTER">
929 <registers name="AD_CONVERTER" memspace="DATAMEM" text="" icon="io_analo.bmp">
930 <reg size="1" name="ADMUX" offset="0x7C" text="The ADC multiplexer Selection Register" icon="io_analo.bmp">
931 <bitfield name="REFS" mask="0xC0" text="Reference Selection Bits" icon="" enum="ANALOG_ADC_V_REF2"/>
932 <bitfield name="ADLAR" mask="0x20" text="Left Adjust Result" icon=""/>
933 <bitfield name="MUX" mask="0x1F" text="Analog Channel and Gain Selection Bits" icon=""/>
934 </reg>
935 <reg size="1" name="ADCSRA" offset="0x7A" text="The ADC Control and Status register" icon="io_flag.bmp">
936 <bitfield name="ADEN" mask="0x80" text="ADC Enable" icon=""/>
937 <bitfield name="ADSC" mask="0x40" text="ADC Start Conversion" icon=""/>
938 <bitfield name="ADATE" mask="0x20" text="ADC Auto Trigger Enable" icon=""/>
939 <bitfield name="ADIF" mask="0x10" text="ADC Interrupt Flag" icon=""/>
940 <bitfield name="ADIE" mask="0x08" text="ADC Interrupt Enable" icon=""/>
941 <bitfield name="ADPS" mask="0x07" text="ADC Prescaler Select Bits" icon="" enum="ANALIG_ADC_PRESCALER"/>
942 </reg>
943 <reg size="2" name="ADC" offset="0x78" text="ADC Data Register Bytes" icon="io_analo.bmp" mask="0xFFFF"/>
944 <reg size="1" name="ADCSRB" offset="0x7B" text="ADC Control and Status Register B" icon="io_analo.bmp">
945 <bitfield name="ADHSM" mask="0x80" text="ADC High Speed Mode" icon=""/>
946 <bitfield name="ADTS" mask="0x07" text="ADC Auto Trigger Sources" icon="" enum="ANALIG_ADC_AUTO_TRIGGER2"/>
947 </reg>
948 <reg size="1" name="DIDR0" offset="0x7E" text="Digital Input Disable Register 1" icon="io_analo.bmp">
949 <bitfield name="ADC7D" mask="0x80" text="ADC7 Digital input Disable" icon=""/>
950 <bitfield name="ADC6D" mask="0x40" text="ADC6 Digital input Disable" icon=""/>
951 <bitfield name="ADC5D" mask="0x20" text="ADC5 Digital input Disable" icon=""/>
952 <bitfield name="ADC4D" mask="0x10" text="ADC4 Digital input Disable" icon=""/>
953 <bitfield name="ADC3D" mask="0x08" text="ADC3 Digital input Disable" icon=""/>
954 <bitfield name="ADC2D" mask="0x04" text="ADC2 Digital input Disable" icon=""/>
955 <bitfield name="ADC1D" mask="0x02" text="ADC1 Digital input Disable" icon=""/>
956 <bitfield name="ADC0D" mask="0x01" text="ADC0 Digital input Disable" icon=""/>
957 </reg>
958 </registers>
959 </module>
960 <module class="ANALOG_COMPARATOR">
961 <registers name="ANALOG_COMPARATOR" memspace="DATAMEM" text="" icon="io_analo.bmp">
962 <reg size="1" name="ADCSRB" offset="0x7B" text="ADC Control and Status Register B" icon="io_flag.bmp">
963 <bitfield name="ACME" mask="0x40" text="Analog Comparator Multiplexer Enable" icon=""/>
964 </reg>
965 <reg size="1" name="ACSR" offset="0x50" text="Analog Comparator Control And Status Register" icon="io_analo.bmp">
966 <bitfield name="ACD" mask="0x80" text="Analog Comparator Disable" icon=""/>
967 <bitfield name="ACBG" mask="0x40" text="Analog Comparator Bandgap Select" icon=""/>
968 <bitfield name="ACO" mask="0x20" text="Analog Compare Output" icon=""/>
969 <bitfield name="ACI" mask="0x10" text="Analog Comparator Interrupt Flag" icon=""/>
970 <bitfield name="ACIE" mask="0x08" text="Analog Comparator Interrupt Enable" icon=""/>
971 <bitfield name="ACIC" mask="0x04" text="Analog Comparator Input Capture Enable" icon=""/>
972 <bitfield name="ACIS" mask="0x03" text="Analog Comparator Interrupt Mode Select bits" icon="" enum="ANALOG_COMP_INTERRUPT"/>
973 </reg>
974 <reg size="1" name="DIDR1" offset="0x7F" text="" icon="io_analo.bmp">
975 <bitfield name="AIN1D" mask="0x02" text="AIN1 Digital Input Disable" icon=""/>
976 <bitfield name="AIN0D" mask="0x01" text="AIN0 Digital Input Disable" icon=""/>
977 </reg>
978 </registers>
979 </module>
980 <module class="PLL">
981 <registers name="PLL" memspace="DATAMEM" text="" icon="io_analo.bmp">
982 <reg size="1" name="PLLCSR" offset="0x49" text="PLL Status and Control register" icon="io_analo.bmp">
983 <bitfield name="PLLP" mask="0x1C" text="PLL prescaler Bits" icon="" enum="PLL_INPUT_PRESCALER"/>
984 <bitfield name="PLLE" mask="0x02" text="PLL Enable Bit" icon=""/>
985 <bitfield name="PLOCK" mask="0x01" text="PLL Lock Status Bit" icon=""/>
986 </reg>
987 </registers>
988 </module>
989 </hardware>
990 </device>
Atmel AVR simulator