DTD adjusted

[avr-sim.git] / devices / atmega162

<?xml version="1.0"?>
<!DOCTYPE device SYSTEM "device.dtd">
<device>
  <interrupts num="28">
    <interrupt vector="1" address="$000" name="RESET">External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     </interrupt>
    <interrupt vector="2" address="$002" name="INT0">External Interrupt Request 0</interrupt>
    <interrupt vector="3" address="$004" name="INT1">External Interrupt Request 1</interrupt>
    <interrupt vector="4" address="$006" name="INT2">External Interrupt Request 2</interrupt>
    <interrupt vector="5" address="$008" name="PCINT0">Pin Change Interrupt Request 0</interrupt>
    <interrupt vector="6" address="$00A" name="PCINT1">Pin Change Interrupt Request 1</interrupt>
    <interrupt vector="7" address="$00C" name="TIMER3 CAPT">Timer/Counter3 Capture Event</interrupt>
    <interrupt vector="8" address="$00E" name="TIMER3 COMPA">Timer/Counter3 Compare Match A</interrupt>
    <interrupt vector="9" address="$010" name="TIMER3 COMPB">Timer/Counter3 Compare Match B</interrupt>
    <interrupt vector="10" address="$012" name="TIMER3 OVF">Timer/Counter3 Overflow</interrupt>
    <interrupt vector="11" address="$014" name="TIMER2 COMP">Timer/Counter2 Compare Match</interrupt>
    <interrupt vector="12" address="$016" name="TIMER2 OVF">Timer/Counter2 Overflow</interrupt>
    <interrupt vector="13" address="$018" name="TIMER1 CAPT">Timer/Counter1 Capture Event</interrupt>
    <interrupt vector="14" address="$01A" name="TIMER1 COMPA">Timer/Counter1 Compare Match A</interrupt>
    <interrupt vector="15" address="$01C" name="TIMER1 COMPB">Timer/Counter Compare Match B</interrupt>
    <interrupt vector="16" address="$01E" name="TIMER1 OVF">Timer/Counter1 Overflow</interrupt>
    <interrupt vector="17" address="$020" name="TIMER0 COMP">Timer/Counter0 Compare Match</interrupt>
    <interrupt vector="18" address="$022" name="TIMER0 OVF">Timer/Counter0 Overflow</interrupt>
    <interrupt vector="19" address="$024" name="SPI, STC">SPI Serial Transfer Complete</interrupt>
    <interrupt vector="20" address="$026" name="USART0, RXC">USART0, Rx Complete</interrupt>
    <interrupt vector="21" address="$028" name="USART1, RXC">USART1, Rx Complete</interrupt>
    <interrupt vector="22" address="$02A" name="USART0, UDRE">USART0 Data register Empty</interrupt>
    <interrupt vector="23" address="$02C" name="USART1, UDRE">USART1, Data register Empty</interrupt>
    <interrupt vector="24" address="$02E" name="USART0, TXC">USART0, Tx Complete</interrupt>
    <interrupt vector="25" address="$030" name="USART1, TXC">USART1, Tx Complete</interrupt>
    <interrupt vector="26" address="$032" name="EE_RDY">EEPROM Ready</interrupt>
    <interrupt vector="27" address="$034" name="ANA_COMP">Analog Comparator</interrupt>
    <interrupt vector="28" address="$036" name="SPM_RDY">Store Program Memory Read</interrupt>
  </interrupts>
  <memory>
    <flash size="16384"/>
    <iospace start="$20" stop="$FF"/>
    <sram size="1024"/>
    <eram size="65536"/>
  </memory>
  <ioregisters>
    <ioreg name="UBRR1L" address="$00"/>
    <ioreg name="UCSR1B" address="$01"/>
    <ioreg name="UCSR1A" address="$02"/>
    <ioreg name="UDR1" address="$03"/>
    <ioreg name="OSCCAL" address="$04"/>
    <ioreg name="OCDR" address="$04"/>
    <ioreg name="PINE" address="$05"/>
    <ioreg name="DDRE" address="$06"/>
    <ioreg name="PORTE" address="$07"/>
    <ioreg name="ACSR" address="$08"/>
    <ioreg name="UBRR0L" address="$09"/>
    <ioreg name="UCSR0B" address="$0A"/>
    <ioreg name="UCSR0A" address="$0B"/>
    <ioreg name="UDR0" address="$0C"/>
    <ioreg name="SPCR" address="$0D"/>
    <ioreg name="SPSR" address="$0E"/>
    <ioreg name="SPDR" address="$0F"/>
    <ioreg name="PIND" address="$10"/>
    <ioreg name="DDRD" address="$11"/>
    <ioreg name="PORTD" address="$12"/>
    <ioreg name="PINC" address="$13"/>
    <ioreg name="DDRC" address="$14"/>
    <ioreg name="PORTC" address="$15"/>
    <ioreg name="PINB" address="$16"/>
    <ioreg name="DDRB" address="$17"/>
    <ioreg name="PORTB" address="$18"/>
    <ioreg name="PINA" address="$19"/>
    <ioreg name="DDRA" address="$1A"/>
    <ioreg name="PORTA" address="$1B"/>
    <ioreg name="EECR" address="$1C"/>
    <ioreg name="EEDR" address="$1D"/>
    <ioreg name="EEARL" address="$1E"/>
    <ioreg name="EEARH" address="$1F"/>
    <ioreg name="UBRR0H" address="$20"/>
    <ioreg name="UCSR0C" address="$20"/>
    <ioreg name="WDTCR" address="$21"/>
    <ioreg name="OCR2" address="$22"/>
    <ioreg name="TCNT2" address="$23"/>
    <ioreg name="ICR1L" address="$24"/>
    <ioreg name="ICR1H" address="$25"/>
    <ioreg name="ASSR" address="$26"/>
    <ioreg name="TCCR2" address="$27"/>
    <ioreg name="OCR1BL" address="$28"/>
    <ioreg name="OCR1BH" address="$29"/>
    <ioreg name="OCR1AL" address="$2A"/>
    <ioreg name="OCR1AH" address="$2B"/>
    <ioreg name="TCNT1L" address="$2C"/>
    <ioreg name="TCNT1H" address="$2D"/>
    <ioreg name="TCCR1B" address="$2E"/>
    <ioreg name="TCCR1A" address="$2F"/>
    <ioreg name="SFIOR" address="$30"/>
    <ioreg name="OCR0" address="$31"/>
    <ioreg name="TCNT0" address="$32"/>
    <ioreg name="TCCR0" address="$33"/>
    <ioreg name="MCUCSR" address="$34"/>
    <ioreg name="MCUCR" address="$35"/>
    <ioreg name="EMCUCR" address="$36"/>
    <ioreg name="SPMCR" address="$37"/>
    <ioreg name="TIFR" address="$38"/>
    <ioreg name="TIMSK" address="$39"/>
    <ioreg name="GIFR" address="$3A"/>
    <ioreg name="GICR" address="$3B"/>
    <ioreg name="UBRR1H" address="$3C"/>
    <ioreg name="UCSR1C" address="$3C"/>
    <ioreg name="SPL" address="$3D"/>
    <ioreg name="SPH" address="$3E"/>
    <ioreg name="SREG" address="$3F"/>
    <ioreg name="CLKPR" address="$61"/>
    <ioreg name="PCMSK0" address="$6B"/>
    <ioreg name="PCMSK1" address="$6C"/>
    <ioreg name="ETIFR" address="$7C"/>
    <ioreg name="ETIMSK" address="$7D"/>
    <ioreg name="ICR3L" address="$80"/>
    <ioreg name="ICR3H" address="$81"/>
    <ioreg name="OCR3BL" address="$84"/>
    <ioreg name="OCR3BH" address="$85"/>
    <ioreg name="OCR3AL" address="$86"/>
    <ioreg name="OCR3AH" address="$87"/>
    <ioreg name="TCNT3L" address="$88"/>
    <ioreg name="TCNT3H" address="$89"/>
    <ioreg name="TCCR3B" address="$8A"/>
    <ioreg name="TCCR3A" address="$8B"/>
  </ioregisters>
  <packages>
    <package name="TQFP" pins="44">
      <pin id="1" name="[PB5:MOSI]">MOSI:SPI Master data output,slave data input for SPI channel.When the SPI is enabled as a slave,this pin is configured as an input regardless of the setting of DDB5. When the SPI is enabled as a master,the data direction of this pin is controlled by DDB5.When the pin is forced by the SPI to be an input,the pull-up can still be controlled by the PORTB5 bit.     </pin>
      <pin id="2" name="[PB6:MISO]">MISO:Master data input,slave data output pin for SPI channel.When the SPI is enabled as a master,this pin is configured as an input regardless of the setting of DDB6.When the SPI is enabled as a slave,the data direction of this pin is controlled by DDB6.When the pin is forced by the SPI to be an input,the pull-up can still be controlled by the PORTB6 bit.   </pin>
      <pin id="3" name="[PB7_SCK]">SCK:Master clock output,slave clock input pin for SPI channel.When the SPI is enabled as a slave,this pin is configured as an input regardless of the setting of DDB7. When the SPI is enabled as a master,the data direction of this pin is controlled by DDB7.When the pin is forced by the SPI to be an input,the pull-up can still be controlled by the PORTB7 bit.      </pin>
      <pin id="4" name="['RESET]"/>
      <pin id="5" name="[PDO:RXD0]">RXD0,Receive Data (Data input pin for USART0).When the USART0 receiver is enabled this pin is configured as an input regardless of the value of DDD0.When USART0 forces this pin to be an input,the pull-up can still be controlled by the PORTD0 bit.     </pin>
      <pin id="6" name=""/>
      <pin id="7" name="[PD1:TXD0]">TXD0,Transmit Data (Data output pin for USART0).When the USART0 transmitter is enabled,this pin is configured as an output regardless of the value of DDD1.    </pin>
      <pin id="8" name="[PD2:INT0:XCK1]">INT0,External Interrupt source 0:The PD2 pin can serve as an external interrupt source. XCK1,USART1 external clock.The Data Direction Register (DDD2)controls whether the clock is output (DDD2 set)or input (DDD2 cleared).The XCK1 pin is active only when USART1 operates in synchronous mode.      </pin>
      <pin id="9" name="[PD3:INT1:XCK1]">INT1,External Interrupt source 1:The PD3 pin can serve as an external interrupt source. ICP3 -Input Capture Pin:The PD3 pin can act as an input capture pin for Timer/Counter3.     </pin>
      <pin id="10" name="[PD4:TOSC1:XCK0:OC3A]">TOSC1,Timer Oscillator pin 1:When the AS2 bit in ASSR is set (one)to enable asynchronous clocking of Timer/Counter2,pin PD4 is disconnected from the port,and becomes the input of the inverting oscillator amplifier.In this mode,a crystal oscillator is connected to this pin,and the pin can not be used as an I/O pin. XCK0,USART0 external clock.The Data Direction Register (DDD4)controls whether the clock is output (DDD4 set)or input (DDD4 cleared).The XCK0 pin is active only when USART0 operates in synchronous mode. OC3A,Output Compare matchA output:The PD4 pin can serve as an external output for the Timer/Counter1 output compareA.The pin has to be configured as an output (DDD4 set (one))to serve this function.The OC4A pin is also the output pin for the PWM mode timer function.      </pin>
      <pin id="11" name="[PD5:OC1A:TOSC2]">TOSC2,Timer Oscillator pin 2:When the AS2 bit in ASSR is set (one)to enable asynchronous clocking of Timer/Counter2,pin PD5 is disconnected from the port,and becomes the inverting output of the oscillator amplifier.In this mode,a crystal oscillator is connected to this pin,and the pin can not be used as an I/O pin. OC1A,Output Compare matchA output:The PD5 pin can serve as an external output for the Timer/Counter1 output compareA.The pin has to be configured as an output (DDD5 set (one))to serve this function.The OC1A pin is also the output pin for the PWM mode timer function.    </pin>
      <pin id="12" name="[PD6:'WR]">WR is the external data memory write control strobe.</pin>
      <pin id="13" name="[PD7:RD]">RD is the external data memory read control strobe.</pin>
      <pin id="13" name="XTAL2"/>
      <pin id="15" name="XTAL1"/>
      <pin id="16" name="GND"/>
      <pin id="17" name=""/>
      <pin id="18" name="[PC0:PCINT8:A8]">A8,External memory interface address bit 8. PCINT8:The pin can also serve as a pin change interrupt.    </pin>
      <pin id="19" name="[PC1:PCINT9:A9]">A9,External memory interface address bit 9. PCINT9:The pin can also serve as a pin change interrupt.    </pin>
      <pin id="20" name="[PC2:PCINT10:A10]">A10,External memory interface address bit 10. PCINT11:The pin can also serve as a pin change interrupt.    </pin>
      <pin id="21" name="[PC3:PCINT11:A11]">A11,External memory interface address bit 11. PCINT11:The pin can also serve as a pin change interrupt.     </pin>
      <pin id="22" name="[PC4:PCINT12:A12:TCK]">A12,External memory interface address bit 12. TCK,JTAG Test Clock:JTAG operation is synchronous to TCK.When the JTAG inter-face is enabled,this pin can not be used as an I/O pin. PCINT12:The pin can also serve as a pin change interrupt.     </pin>
      <pin id="23" name="[PC5:PCINT13:A13:TMS]">A13,External memory interface address bit 13. TMS,JTAG Test Mode Select:This pin is used for navigating through the TAP-controller state machine.When the JTAG interface is enabled,this pin can not be used as an I/O pin. PCINT13:The pin can also serve as a pin change interrupt.     </pin>
      <pin id="24" name="[PC6:PCINT14:A14:TDO]">A14,External memory interface address bit 14. TDO,JTAG Test Data Out:Serial output data from Instruction register or Data Register. When the JTAG interface is enabled,this pin can not be used as an I/O pin. PCINT14:The pin can also serve as a pin change interrupt.      </pin>
      <pin id="25" name="[PC7:PCINT15:A15:TDI]">A15,External memory interface address bit 15. TDI,JTAG Test Data In:Serial input data to be shifted into the Instruction Register or Data Register (scan chains).When the JTAG interface is enabled,this pin can not be used as an I/O pin. PCINT15:The pin can also serve as a pin change interrupt.     </pin>
      <pin id="26" name="[PE2:OC1B]">OC1B,Output Compare matchB output:The PE0 pin can serve as an external output for the Timer/Counter1 output compareB.The pin has to be configured as an output (DDE0 set (one))to serve this function.The OC1Bpin is also the output pin for the PWM mode timer function.    </pin>
      <pin id="27" name="[PE1:ALE]">ALE is the external data memory Address Latch Enable signal.</pin>
      <pin id="28" name=""/>
      <pin id="29" name="[PE0:ICP1:INT2]">ICP1 -Input Capture Pin:The PE2 pin can act as an input capture pin for Timer/Counter1. INT2,External Interrupt source 2:The PE2 pin can serve as an external interrupt source.     </pin>
      <pin id="30" name="[PA7:PCINT7:AD7]">AD7 (External memory interface address and data bit 7) PCINT7 (Pin Change INTerrupt 7)      </pin>
      <pin id="31" name="[PA6:PCINT6:AD6]">AD6 (External memory interface address and data bit 6) PCINT6 (Pin Change INTerrupt 6)      </pin>
      <pin id="32" name="[PA5:PCINT5:AD5]">AD5 (External memory interface address and data bit 5) PCINT5 (Pin Change INTerrupt 5)      </pin>
      <pin id="33" name="[PA4:PCINT4:AD4]">AD4 (External memory interface address and data bit 4) PCINT4 (Pin Change INTerrupt 4)      </pin>
      <pin id="34" name="[PA3:PCINT3:AD3]">AD3 (External memory interface address and data bit 3) PCINT3 (Pin Change INTerrupt 3)      </pin>
      <pin id="35" name="[PA2:PCINT2:AD2]">AD2 (External memory interface address and data bit 2) PCINT2 (Pin Change INTerrupt 2)      </pin>
      <pin id="36" name="[PA1:PCINT1:AD1]">AD1 (External memory interface address and data bit 1) PCINT1 (Pin Change INTerrupt 1)      </pin>
      <pin id="37" name="[PA0:PCINT0:AD0]">AD0 (External memory interface address and data bit 0) PCINT0 (Pin Change INTerrupt 0)      </pin>
      <pin id="38" name="[VCC]"/>
      <pin id="39" name=""/>
      <pin id="40" name="[PB0:OC0:T0]">T0,Timer/Counter0 counter source. OC0,Output compare match output:The PB0 pin can serve as an external output for the Timer/Counter0 compare match.The PB0 pin has to be configured as an output (DDB0 set (one))to serve this function.The OC0 pin is also the output pin for the PWM mode timer function.      </pin>
      <pin id="41" name="[PB1:OC2:T1]">T1,Timer/Counter1 counter source. OC2,Output compare match output:The PB1 pin can serve as an external output for the Timer/Counter2 compare match.The PB1 pin has to be configured as an output (DDB1 set (one))to serve this function.The OC2 pin is also the output pin for the PWM mode timer function.     </pin>
      <pin id="42" name="[PB2:RXD1:AIN0]">AIN0,Analog Comparator Positive Input.Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the analog comparator. RXD1,Receive Data (Data input pin for USART1).When the USART1 receiver is enabled this pin is configured as an input regardless of the value of DDB2.When the USART1 forces this pin to be an input,the pull-up can still be controlled by the PORTB2 bit.      </pin>
      <pin id="43" name="[PB3:TXD1:AIN1]">AIN1,Analog Comparator Negative Input.Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the analog comparator. TXD1,Transmit Data (Data output pin for USART1).When the USART1 transmitter is enabled,this pin is configured as an output regardless of the value of DDB3.     </pin>
      <pin id="44" name="[PB4:OC3B:'SS]">SS:Slave Select input.When the SPI is enabled as a slave,this pin is configured as an input regardless of the setting of DDB4.As a slave,the SPI is activated when this pin is driven low.When the SPI is enabled as a master,the data direction of this pin is controlled by DDB4.When the pin is forced by the SPI to be an input,the pull-up can still be controlled by the PORTB4 bit. OC3B,Output Compare matchB output:The PB4 pin can serve as an external output for the Timer/Counter3 output compareB.The pin has to be configured as an output (DDB4 set (one))to serve this function.The OC3B pin is also the output pin for the PWM mode timer function.     </pin>
    </package>
  </packages>

  <hardware>
        <eeprom size="512">
                <eearl>EEARL</eearl>
                <eearh>EEARH</eearh>
                <eecr>EECR</eecr>
                <eedr>EEDR</eedr>
        </eeprom>

        <hwport name="PORTA">
                <port>PORTA</port>
                <pin>PINA</pin>
                <ddr>DDRA</ddr>
        </hwport>

        <hwport name="PORTB">
                <port>PORTB</port>
                <pin>PINB</pin>
                <ddr>DDRB</ddr>
        </hwport>

        <hwport name="PORTC">
                <port>PORTC</port>
                <pin>PINC</pin>
                <ddr>DDRC</ddr>
        </hwport>

        <hwport name="PORTD">
                <port>PORTD</port>
                <pin>PIND</pin>
                <ddr>DDRD</ddr>
        </hwport>

        <hwport name="PORTE">
                <port>PORTE</port>
                <pin>PINE</pin>
                <ddr>DDRE</ddr>
        </hwport>

        <!-- Timer/Counter0 -->
        <timer8 name="Timer/Counter0" tov="0x02" ocf="0x01">
        <!--
                <outputcompareunit bla="1">
                        <ocr>OCR0</ocr>
                </outputcompareunit>

                <outputcompareunit>
                        <ocr>OCR0</ocr>
                </outputcompareunit>
                -->

                <tccr>TCCR0</tccr>
                <tcnt>TCNT0</tcnt>
                <ocr>OCR0</ocr>
                <tifr>TIFR</tifr>
        </timer8>

        <timerirq
                        bit0Vec="17"
                        bit1Vec="18"
                        bit2Vec="12"
                        bit3Vec="13"
                        bit4Vec="11"
                        bit5Vec="15"
                        bit6Vec="14"
                        bit7Vec="16">
                <tifr>TIFR</tifr>
                <timsk>TIMSK</timsk>
        </timerirq>
  </hardware>

</device>