12 * @brief Abstraction of all internal devices
14 * This is an abstraction of all the internal devices inside
15 * an AVR chip. These encompass timers, usart, spi, etc
17 * Hardware can negotiate its timing with the Bus,
18 * \e step is called based on this timing.
22 Hardware(Bus
& bus
) : bus(bus
), holdCycles(0) {}
23 virtual ~Hardware() {}
27 * Attach a register with name \e name to the hardware.
29 virtual bool attachReg(const char *name
, IORegister
*reg
) = 0;
32 * Finishes the construction of the hardware.
33 * This should verify the registers and parameters
34 * @returns true if build was successful.
36 virtual bool finishBuild() { return true; }
39 * An attached register changed state.
41 virtual void regChanged( IORegister
*reg
) = 0;
44 * An attached register is accessed.
46 virtual void regAccess( IORegister
* /*reg*/ ) {}
49 * Perform a single step.
51 virtual void step() {}
54 * Reset the internal hardware.
56 virtual void reset() {}
59 * Called just before an interrupt handler is invoked.
61 virtual void beforeInvokeInterrupt(unsigned int /*vector*/) {}
65 * Are we holding the CPU?
66 * @warning only call this once per CPU cycle.
72 * Set the number of cycles to hold the CPU.
74 void setHoldCycles(unsigned int cycles
);
78 unsigned int holdCycles
;
81 inline void Hardware::setHoldCycles(unsigned int cycles
) {
85 inline bool Hardware::isHoldingCPU() {
89 return (holdCycles
!= 0);
94 #endif /*AVR_HARDWARE_H*/