src/DecoderHelp.h

   1 #ifndef AVR_DECODERHELP_H
   2 #define AVR_DECODERHELP_H
   3
   4 namespace avr {
   5
   6         enum decoder_operand_masks {
   7             /** 2 bit register id  ( R24, R26, R28, R30 ) */
   8             mask_Rd_2     = 0x0030,
   9             /** 3 bit register id  ( R16 - R23 ) */
  10             mask_Rd_3     = 0x0070,
  11             /** 4 bit register id  ( R16 - R31 ) */
  12             mask_Rd_4     = 0x00f0,
  13             /** 5 bit register id  ( R00 - R31 ) */
  14             mask_Rd_5     = 0x01f0,
  15
  16             /** 3 bit register id  ( R16 - R23 ) */
  17             mask_Rr_3     = 0x0007,
  18             /** 4 bit register id  ( R16 - R31 ) */
  19             mask_Rr_4     = 0x000f,
  20             /** 5 bit register id  ( R00 - R31 ) */
  21             mask_Rr_5     = 0x020f,
  22
  23             /** for 8 bit constant */
  24             mask_K_8      = 0x0F0F,
  25             /** for 6 bit constant */
  26             mask_K_6      = 0x00CF,
  27
  28             /** for 7 bit relative address */
  29             mask_k_7      = 0x03F8,
  30             /** for 12 bit relative address */
  31             mask_k_12     = 0x0FFF,
  32             /** for 22 bit absolute address */
  33             mask_k_22     = 0x01F1,
  34
  35             /** register bit select */
  36             mask_reg_bit  = 0x0007,
  37             /** status register bit select */
  38             mask_sreg_bit = 0x0070,
  39             /** address displacement (q) */
  40             mask_q_displ  = 0x2C07,
  41
  42             /** 5 bit register id  ( R00 - R31 ) */
  43             mask_A_5      = 0x00F8,
  44             /** 6 bit IO port id */
  45             mask_A_6      = 0x060F
  46         };
  47
  48         inline int get_rd_2( word opcode ) {
  49             int reg = ((opcode & mask_Rd_2) >> 4) & 0x3;
  50             return (reg * 2) + 24;
  51         }
  52
  53         inline int get_rd_3( word opcode ) {
  54             int reg = opcode & mask_Rd_3;
  55             return ((reg >> 4) & 0x7) + 16;
  56         }
  57
  58         inline int get_rd_4( word opcode ) {
  59             int reg = opcode & mask_Rd_4;
  60             return ((reg >> 4) & 0xf) + 16;
  61         }
  62
  63         inline int get_rd_5( word opcode ) {
  64             int reg = opcode & mask_Rd_5;
  65             return ((reg >> 4) & 0x1f);
  66         }
  67
  68         inline int get_rr_3( word opcode ) {
  69             return (opcode & mask_Rr_3) + 16;
  70         }
  71
  72         inline int get_rr_4( word opcode ) {
  73             return (opcode & mask_Rr_4) + 16;
  74         }
  75
  76         inline int get_rr_5( word opcode ) {
  77             int reg = opcode & mask_Rr_5;
  78             return (reg & 0xf) + ((reg >> 5) & 0x10);
  79         }
  80
  81         inline byte get_K_8( word opcode ) {
  82             int K = opcode & mask_K_8;
  83             return ((K >> 4) & 0xf0) + (K & 0xf);
  84         }
  85
  86         inline byte get_K_6( word opcode ) {
  87             int K = opcode & mask_K_6;
  88             return ((K >> 2) & 0x0030) + (K & 0xf);
  89         }
  90
  91         inline int get_k_7( word opcode ) {
  92             return (((opcode & mask_k_7) >> 3) & 0x7f);
  93         }
  94
  95         inline int get_k_12( word opcode ) {
  96             return (opcode & mask_k_12);
  97         }
  98
  99         inline int get_k_22( word opcode ) {
 100             /* Masks only the upper 6 bits of the address, the other 16 bits
 101              * are in PC + 1. */
 102             int k = opcode & mask_k_22;
 103             return ((k >> 3) & 0x003e) + (k & 0x1);
 104         }
 105
 106         inline int get_reg_bit( word opcode ) {
 107             return opcode & mask_reg_bit;
 108         }
 109
 110         inline int get_sreg_bit( word opcode ) {
 111             return (opcode & mask_sreg_bit) >> 4;
 112         }
 113
 114         inline int get_q( word opcode ) {
 115             /* 00q0 qq00 0000 0qqq : Yuck! */
 116             int q = opcode & mask_q_displ;
 117             int qq = ( ((q >> 1) & 0x1000) + (q & 0x0c00) ) >> 7;
 118             return (qq & 0x0038) + (q & 0x7);
 119         }
 120
 121         inline int get_A_5( word opcode ) {
 122             return (opcode & mask_A_5) >> 3;
 123         }
 124
 125         inline int get_A_6( word opcode ) {
 126             int A = opcode & mask_A_6;
 127             return ((A >> 5) & 0x0030) + (A & 0xf);
 128         }
 129
 130 }
 131
 132 #endif /*AVR_DECODERHELP_H*/