src/Bus.h

   1 #ifndef AVR_BUS_H
   2 #define AVR_BUS_H
   3
   4 #include <list>
   5 #include <vector>
   6 #include <string>
   7 #include "Clock.h"
   8
   9 namespace avr {
  10
  11         class Hardware;
  12
  13         /**
  14          * @author Tom Haber
  15          * @date Apr 27, 2008
  16          * @brief Manages hardware and interrupts
  17          *
  18          * The bus contains the list of all hardware and serves as
  19          * a clock for the hardware (working on CPU ticks).
  20          * Hardware can register callbacks within a number of ticks.
  21          *
  22          * It also encapsulates the functionality related to
  23          * handling the state of interrupts.
  24          */
  25         class Bus : public sim::Clock<Hardware> {
  26                 public:
  27                         Bus();
  28                         ~Bus();
  29
  30                 public:
  31                         /**
  32                          * Reset the bus and all hardware on it.
  33                          */
  34                         void reset();
  35
  36                         /**
  37                          * Adds a bit of hardware to the bus
  38                          */
  39                         void addHardware(Hardware *hw);
  40
  41                         /**
  42                          * Check whether the hardware is holding the CPU.
  43                          * \warning call this only once per CPU tick!
  44                          */
  45                         bool isHoldingCPU();
  46
  47                 public:
  48                         static const unsigned int intVectorsSize = 28;
  49
  50                         /**
  51                          * Post the interrupt with vector \e vector
  52                          */
  53                         void raiseInterrupt(unsigned int vector);
  54
  55                         /**
  56                          * Unpost the interrupt with vector \e vector
  57                          */
  58                         void clearInterrupt(unsigned int vector);
  59
  60                 public:
  61                         /**
  62                          * Returns the pending interrupt with highest priority.
  63                          */
  64                         unsigned int pendingInterrupt() const;
  65
  66                         /**
  67                          * Checks whether an interrupt is pending.
  68                          */
  69                         bool isInterruptPending() const;
  70
  71                         /**
  72                          * Returns the memory address associated with the vector.
  73                          */
  74                         unsigned int interruptVectorAddress(unsigned int vector) const;
  75
  76                         /**
  77                          * Notifies the hardware associated with this interrupt
  78                          * that the handler is about to be invoked.
  79                          */
  80                         void beforeInvokeInterrupt(unsigned int vector);
  81
  82                 public:
  83                         /**
  84                          * Add an interrupt vector.
  85                          */
  86                         void addInterrupt(unsigned int vector, unsigned int address,
  87                                                                 const char *name);
  88
  89                         /**
  90                          * Hardware can claim an interrupt, this means that it is
  91                          * responsible for raising an interrupt. It will from then
  92                          * on be notified before an interrupt vector is executed.
  93                          */
  94                         void claimInterrupt(unsigned int vector, Hardware *hw);
  95
  96                 private:
  97                         std::list<Hardware*> hardware;
  98
  99                 private:
 100                         struct IntVect {
 101                                 IntVect() : hw(0) {}
 102                                 IntVect(unsigned int addr, const std::string & name)
 103                                         : address(addr), name(name), hw(0) {}
 104                                 unsigned int address;
 105                                 std::string name;
 106                                 Hardware *hw;
 107                         };
 108                         typedef std::vector< IntVect > InterruptTable;
 109
 110                 private:
 111                         InterruptTable intVectors;
 112                         unsigned int irqPending;
 113         };
 114
 115         inline void Bus::addHardware(Hardware *hw) {
 116                 hardware.push_back( hw );
 117         }
 118
 119         inline void Bus::raiseInterrupt(unsigned int vector) {
 120                 irqPending |= (1<<vector);
 121         }
 122
 123         inline void Bus::clearInterrupt(unsigned int vector) {
 124                 irqPending &= ~(1<<vector);
 125         }
 126
 127         inline bool Bus::isInterruptPending() const {
 128                 return irqPending != 0;
 129         }
 130
 131         inline unsigned int Bus::pendingInterrupt() const {
 132                 unsigned int vector;
 133                 for(vector = 0; vector < Bus::intVectorsSize; ++vector)
 134                         if( (irqPending & (1<<vector)) != 0 )
 135                                 break;
 136
 137                 return vector;
 138         }
 139
 140         inline unsigned int Bus::interruptVectorAddress(unsigned int vector) const {
 141                 return intVectors[vector].address;
 142         }
 143
 144 }
 145
 146 #endif /*AVR_BUS_H*/