2 <!DOCTYPE device SYSTEM
"device.dtd">
5 <interrupt vector=
"1" address=
"$000" name=
"RESET">External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.
</interrupt>
6 <interrupt vector=
"2" address=
"$002" name=
"INT0">External Interrupt Request
0</interrupt>
7 <interrupt vector=
"3" address=
"$004" name=
"INT1">External Interrupt Request
1</interrupt>
8 <interrupt vector=
"4" address=
"$006" name=
"INT2">External Interrupt Request
2</interrupt>
9 <interrupt vector=
"5" address=
"$008" name=
"INT3">External Interrupt Request
3</interrupt>
10 <interrupt vector=
"6" address=
"$00A" name=
"INT4">External Interrupt Request
4</interrupt>
11 <interrupt vector=
"7" address=
"$00C" name=
"INT5">External Interrupt Request
5</interrupt>
12 <interrupt vector=
"8" address=
"$00E" name=
"INT6">External Interrupt Request
6</interrupt>
13 <interrupt vector=
"9" address=
"$010" name=
"INT7">External Interrupt Request
7</interrupt>
14 <interrupt vector=
"10" address=
"$012" name=
"PCINT0">Pin Change Interrupt Request
0</interrupt>
15 <interrupt vector=
"11" address=
"$014" name=
"PCINT1">Pin Change Interrupt Request
1</interrupt>
16 <interrupt vector=
"12" address=
"$016" name=
"PCINT2">Pin Change Interrupt Request
2</interrupt>
17 <interrupt vector=
"13" address=
"$018" name=
"WDT">Watchdog Time-out Interrupt
</interrupt>
18 <interrupt vector=
"14" address=
"$01A" name=
"TIMER2_COMPA">Timer/Counter2 Compare Match A
</interrupt>
19 <interrupt vector=
"15" address=
"$01C" name=
"TIMER2_COMPB">Timer/Counter2 Compare Match B
</interrupt>
20 <interrupt vector=
"16" address=
"$01E" name=
"TIMER2_OVF">Timer/Counter2 Overflow
</interrupt>
21 <interrupt vector=
"17" address=
"$020" name=
"TIMER1_CAPT">Timer/Counter1 Capture Event
</interrupt>
22 <interrupt vector=
"18" address=
"$022" name=
"TIMER1_COMPA">Timer/Counter1 Compare Match A
</interrupt>
23 <interrupt vector=
"19" address=
"$024" name=
"TIMER1_COMPB">Timer/Counter1 Compare Match B
</interrupt>
24 <interrupt vector=
"20" address=
"$026" name=
"TIMER1_COMPC">Timer/Counter1 Compare Match C
</interrupt>
25 <interrupt vector=
"21" address=
"$028" name=
"TIMER1_OVF">Timer/Counter1 Overflow
</interrupt>
26 <interrupt vector=
"22" address=
"$02A" name=
"TIMER0_COMPA">Timer/Counter0 Compare Match A
</interrupt>
27 <interrupt vector=
"23" address=
"$02C" name=
"TIMER0_COMPB">Timer/Counter0 Compare Match B
</interrupt>
28 <interrupt vector=
"24" address=
"$02E" name=
"TIMER0_OVF">Timer/Counter0 Overflow
</interrupt>
29 <interrupt vector=
"25" address=
"$030" name=
"SPI, STC">SPI Serial Transfer Complete
</interrupt>
30 <interrupt vector=
"26" address=
"$032" name=
"USART0, RX">USART0, Rx Complete
</interrupt>
31 <interrupt vector=
"27" address=
"$034" name=
"USART0, UDRE">USART0 Data register Empty
</interrupt>
32 <interrupt vector=
"28" address=
"$036" name=
"USART0, TX">USART0, Tx Complete
</interrupt>
33 <interrupt vector=
"29" address=
"$038" name=
"ANALOG_COMP">Analog Comparator
</interrupt>
34 <interrupt vector=
"30" address=
"$03A" name=
"ADC">ADC Conversion Complete
</interrupt>
35 <interrupt vector=
"31" address=
"$03C" name=
"EE_READY">EEPROM Ready
</interrupt>
36 <interrupt vector=
"32" address=
"$03E" name=
"TIMER3_CAPT">Timer/Counter3 Capture Event
</interrupt>
37 <interrupt vector=
"33" address=
"$040" name=
"TIMER3_COMPA">Timer/Counter3 Compare Match A
</interrupt>
38 <interrupt vector=
"34" address=
"$042" name=
"TIMER3_COMPB">Timer/Counter3 Compare Match B
</interrupt>
39 <interrupt vector=
"35" address=
"$044" name=
"TIMER3_COMPC">Timer/Counter3 Compare Match C
</interrupt>
40 <interrupt vector=
"36" address=
"$046" name=
"TIMER3_OVF">Timer/Counter3 Overflow
</interrupt>
41 <interrupt vector=
"37" address=
"$048" name=
"USART1, RX">USART1, Rx Complete
</interrupt>
42 <interrupt vector=
"38" address=
"$04A" name=
"USART1, UDRE">USART1 Data register Empty
</interrupt>
43 <interrupt vector=
"39" address=
"$04C" name=
"USART1, TX">USART1, Tx Complete
</interrupt>
44 <interrupt vector=
"40" address=
"$04E" name=
"TWI">2-wire Serial Interface
</interrupt>
45 <interrupt vector=
"41" address=
"$050" name=
"SPM_READY">Store Program Memory Read
</interrupt>
46 <interrupt vector=
"42" address=
"$052" name=
"TIMER4_CAPT">Timer/Counter4 Capture Event
</interrupt>
47 <interrupt vector=
"43" address=
"$054" name=
"TIMER4_COMPA">Timer/Counter4 Compare Match A
</interrupt>
48 <interrupt vector=
"44" address=
"$056" name=
"TIMER4_COMPB">Timer/Counter4 Compare Match B
</interrupt>
49 <interrupt vector=
"45" address=
"$058" name=
"TIMER4_COMPC">Timer/Counter4 Compare Match C
</interrupt>
50 <interrupt vector=
"46" address=
"$05A" name=
"TIMER4_OVF">Timer/Counter4 Overflow
</interrupt>
51 <interrupt vector=
"47" address=
"$05C" name=
"TIMER5_CAPT">Timer/Counter5 Capture Event
</interrupt>
52 <interrupt vector=
"48" address=
"$05E" name=
"TIMER5_COMPA">Timer/Counter5 Compare Match A
</interrupt>
53 <interrupt vector=
"49" address=
"$060" name=
"TIMER5_COMPB">Timer/Counter5 Compare Match B
</interrupt>
54 <interrupt vector=
"50" address=
"$062" name=
"TIMER5_COMPC">Timer/Counter5 Compare Match C
</interrupt>
55 <interrupt vector=
"51" address=
"$064" name=
"TIMER5_OVF">Timer/Counter5 Overflow
</interrupt>
56 <interrupt vector=
"52" address=
"$066" name=
"USART2, RX">USART2, Rx Complete
</interrupt>
57 <interrupt vector=
"53" address=
"$068" name=
"USART2, UDRE">USART2 Data register Empty
</interrupt>
58 <interrupt vector=
"54" address=
"$06A" name=
"USART2, TX">USART2, Tx Complete
</interrupt>
59 <interrupt vector=
"55" address=
"$06C" name=
"USART3, RX">USART3, Rx Complete
</interrupt>
60 <interrupt vector=
"56" address=
"$06E" name=
"USART3, UDRE">USART3 Data register Empty
</interrupt>
61 <interrupt vector=
"57" address=
"$070" name=
"USART3, TX">USART3, Tx Complete
</interrupt>
64 <package name=
"TQFP" pins=
"100">
74 <pin id=
"10" name=
""/>
75 <pin id=
"11" name=
""/>
76 <pin id=
"12" name=
""/>
77 <pin id=
"13" name=
""/>
78 <pin id=
"14" name=
""/>
79 <pin id=
"15" name=
""/>
80 <pin id=
"16" name=
""/>
81 <pin id=
"17" name=
""/>
82 <pin id=
"18" name=
""/>
83 <pin id=
"19" name=
""/>
84 <pin id=
"20" name=
""/>
85 <pin id=
"21" name=
""/>
86 <pin id=
"22" name=
""/>
87 <pin id=
"23" name=
""/>
88 <pin id=
"24" name=
""/>
89 <pin id=
"25" name=
""/>
90 <pin id=
"26" name=
""/>
91 <pin id=
"27" name=
""/>
92 <pin id=
"28" name=
""/>
93 <pin id=
"29" name=
""/>
94 <pin id=
"30" name=
""/>
95 <pin id=
"31" name=
""/>
96 <pin id=
"32" name=
""/>
97 <pin id=
"33" name=
""/>
98 <pin id=
"34" name=
""/>
99 <pin id=
"35" name=
""/>
100 <pin id=
"36" name=
""/>
101 <pin id=
"37" name=
""/>
102 <pin id=
"38" name=
""/>
103 <pin id=
"39" name=
""/>
104 <pin id=
"40" name=
""/>
105 <pin id=
"41" name=
""/>
106 <pin id=
"42" name=
""/>
107 <pin id=
"43" name=
""/>
108 <pin id=
"44" name=
""/>
109 <pin id=
"45" name=
""/>
110 <pin id=
"46" name=
""/>
111 <pin id=
"47" name=
""/>
112 <pin id=
"48" name=
""/>
113 <pin id=
"49" name=
""/>
114 <pin id=
"50" name=
""/>
115 <pin id=
"51" name=
""/>
116 <pin id=
"52" name=
""/>
117 <pin id=
"53" name=
""/>
118 <pin id=
"54" name=
""/>
119 <pin id=
"55" name=
""/>
120 <pin id=
"56" name=
""/>
121 <pin id=
"57" name=
""/>
122 <pin id=
"58" name=
""/>
123 <pin id=
"59" name=
""/>
124 <pin id=
"60" name=
""/>
125 <pin id=
"61" name=
""/>
126 <pin id=
"62" name=
""/>
127 <pin id=
"63" name=
""/>
128 <pin id=
"64" name=
""/>
129 <pin id=
"65" name=
""/>
130 <pin id=
"66" name=
""/>
131 <pin id=
"67" name=
""/>
132 <pin id=
"68" name=
""/>
133 <pin id=
"69" name=
""/>
134 <pin id=
"70" name=
""/>
135 <pin id=
"71" name=
""/>
136 <pin id=
"72" name=
""/>
137 <pin id=
"73" name=
""/>
138 <pin id=
"74" name=
""/>
139 <pin id=
"75" name=
""/>
140 <pin id=
"76" name=
""/>
141 <pin id=
"77" name=
""/>
142 <pin id=
"78" name=
""/>
143 <pin id=
"79" name=
""/>
144 <pin id=
"80" name=
""/>
145 <pin id=
"81" name=
""/>
146 <pin id=
"82" name=
""/>
147 <pin id=
"83" name=
""/>
148 <pin id=
"84" name=
""/>
149 <pin id=
"85" name=
""/>
150 <pin id=
"86" name=
""/>
151 <pin id=
"87" name=
""/>
152 <pin id=
"88" name=
""/>
153 <pin id=
"89" name=
""/>
154 <pin id=
"90" name=
""/>
155 <pin id=
"91" name=
""/>
156 <pin id=
"92" name=
""/>
157 <pin id=
"93" name=
""/>
158 <pin id=
"94" name=
""/>
159 <pin id=
"95" name=
""/>
160 <pin id=
"96" name=
""/>
161 <pin id=
"97" name=
""/>
162 <pin id=
"98" name=
""/>
163 <pin id=
"99" name=
""/>
164 <pin id=
"100" name=
""/>
168 <flash size=
"131072"/>
169 <iospace start=
"$20" stop=
"$1FF"/>
174 <ioreg name=
"PINH" address=
"$100"/>
175 <ioreg name=
"DDRH" address=
"$101"/>
176 <ioreg name=
"PORTH" address=
"$102"/>
177 <ioreg name=
"PINJ" address=
"$103"/>
178 <ioreg name=
"DDRJ" address=
"$104"/>
179 <ioreg name=
"PORTJ" address=
"$105"/>
180 <ioreg name=
"PINK" address=
"$106"/>
181 <ioreg name=
"DDRK" address=
"$107"/>
182 <ioreg name=
"PORTK" address=
"$108"/>
183 <ioreg name=
"PINL" address=
"$109"/>
184 <ioreg name=
"DDRL" address=
"$10A"/>
185 <ioreg name=
"PORTL" address=
"$10B"/>
186 <ioreg name=
"TCCR5A" address=
"$120"/>
187 <ioreg name=
"TCCR5B" address=
"$121"/>
188 <ioreg name=
"TCCR5C" address=
"$122"/>
189 <ioreg name=
"TCNT5L" address=
"$124"/>
190 <ioreg name=
"TCNT5H" address=
"$125"/>
191 <ioreg name=
"ICR5L" address=
"$126"/>
192 <ioreg name=
"ICR5H" address=
"$127"/>
193 <ioreg name=
"OCR5AL" address=
"$128"/>
194 <ioreg name=
"OCR5AH" address=
"$129"/>
195 <ioreg name=
"OCR5BL" address=
"$12A"/>
196 <ioreg name=
"OCR5BH" address=
"$12B"/>
197 <ioreg name=
"OCR5CL" address=
"$12C"/>
198 <ioreg name=
"OCR5CH" address=
"$12D"/>
199 <ioreg name=
"UCSR3A" address=
"$130"/>
200 <ioreg name=
"UCSR3B" address=
"$131"/>
201 <ioreg name=
"UCSR3C" address=
"$132"/>
202 <ioreg name=
"UBRR3L" address=
"$134"/>
203 <ioreg name=
"UBRR3H" address=
"$135"/>
204 <ioreg name=
"UDR3" address=
"$136"/>
205 <ioreg name=
"PINA" address=
"$00"/>
206 <ioreg name=
"DDRA" address=
"$01"/>
207 <ioreg name=
"PORTA" address=
"$02"/>
208 <ioreg name=
"PINB" address=
"$03"/>
209 <ioreg name=
"DDRB" address=
"$04"/>
210 <ioreg name=
"PORTB" address=
"$05"/>
211 <ioreg name=
"PINC" address=
"$06"/>
212 <ioreg name=
"DDRC" address=
"$07"/>
213 <ioreg name=
"PORTC" address=
"$08"/>
214 <ioreg name=
"PIND" address=
"$09"/>
215 <ioreg name=
"DDRD" address=
"$0A"/>
216 <ioreg name=
"PORTD" address=
"$0B"/>
217 <ioreg name=
"PINE" address=
"$0C"/>
218 <ioreg name=
"DDRE" address=
"$0D"/>
219 <ioreg name=
"PORTE" address=
"$0E"/>
220 <ioreg name=
"PINF" address=
"$0F"/>
221 <ioreg name=
"DDRF" address=
"$10"/>
222 <ioreg name=
"PORTF" address=
"$11"/>
223 <ioreg name=
"PING" address=
"$12"/>
224 <ioreg name=
"DDRG" address=
"$13"/>
225 <ioreg name=
"PORTG" address=
"$14"/>
226 <ioreg name=
"TIFR0" address=
"$15"/>
227 <ioreg name=
"TIFR1" address=
"$16"/>
228 <ioreg name=
"TIFR2" address=
"$17"/>
229 <ioreg name=
"TIFR3" address=
"$18"/>
230 <ioreg name=
"TIFR4" address=
"$19"/>
231 <ioreg name=
"TIFR5" address=
"$1A"/>
232 <ioreg name=
"PCIFR" address=
"$1B"/>
233 <ioreg name=
"EIFR" address=
"$1C"/>
234 <ioreg name=
"EIMSK" address=
"$1D"/>
235 <ioreg name=
"GPIOR0" address=
"$1E"/>
236 <ioreg name=
"EECR" address=
"$1F"/>
237 <ioreg name=
"EEDR" address=
"$20"/>
238 <ioreg name=
"EEARL" address=
"$21"/>
239 <ioreg name=
"EEARH" address=
"$22"/>
240 <ioreg name=
"GTCCR" address=
"$23"/>
241 <ioreg name=
"TCCR0A" address=
"$24"/>
242 <ioreg name=
"TCCR0B" address=
"$25"/>
243 <ioreg name=
"TCNT0" address=
"$26"/>
244 <ioreg name=
"OCR0A" address=
"$27"/>
245 <ioreg name=
"OCR0B" address=
"$28"/>
246 <ioreg name=
"GPIOR1" address=
"$2A"/>
247 <ioreg name=
"GPIOR2" address=
"$2B"/>
248 <ioreg name=
"SPCR" address=
"$2C"/>
249 <ioreg name=
"SPSR" address=
"$2D"/>
250 <ioreg name=
"SPDR" address=
"$2E"/>
251 <ioreg name=
"ACSR" address=
"$30"/>
252 <ioreg name=
"OCDR" address=
"$31"/>
253 <ioreg name=
"SMCR" address=
"$33"/>
254 <ioreg name=
"MCUSR" address=
"$34"/>
255 <ioreg name=
"MCUCR" address=
"$35"/>
256 <ioreg name=
"SPMCSR" address=
"$37"/>
257 <ioreg name=
"RAMPZ" address=
"$3B"/>
258 <ioreg name=
"EIND" address=
"$3C"/>
259 <ioreg name=
"SPL" address=
"$3D"/>
260 <ioreg name=
"SPH" address=
"$3E"/>
261 <ioreg name=
"SREG" address=
"$3F"/>
262 <ioreg name=
"WDTCSR" address=
"$60"/>
263 <ioreg name=
"CLKPR" address=
"$61"/>
264 <ioreg name=
"PRR0" address=
"$64"/>
265 <ioreg name=
"PRR1" address=
"$65"/>
266 <ioreg name=
"OSCCAL" address=
"$66"/>
267 <ioreg name=
"PCICR" address=
"$68"/>
268 <ioreg name=
"EICRA" address=
"$69"/>
269 <ioreg name=
"EICRB" address=
"$6A"/>
270 <ioreg name=
"PCMSK0" address=
"$6B"/>
271 <ioreg name=
"PCMSK1" address=
"$6C"/>
272 <ioreg name=
"PCMSK2" address=
"$6D"/>
273 <ioreg name=
"TIMSK0" address=
"$6E"/>
274 <ioreg name=
"TIMSK1" address=
"$6F"/>
275 <ioreg name=
"TIMSK2" address=
"$70"/>
276 <ioreg name=
"TIMSK3" address=
"$71"/>
277 <ioreg name=
"TIMSK4" address=
"$72"/>
278 <ioreg name=
"TIMSK5" address=
"$73"/>
279 <ioreg name=
"XMCRA" address=
"$74"/>
280 <ioreg name=
"XMCRB" address=
"$75"/>
281 <ioreg name=
"ADCL" address=
"$78"/>
282 <ioreg name=
"ADCH" address=
"$79"/>
283 <ioreg name=
"ADCSRA" address=
"$7A"/>
284 <ioreg name=
"ADCSRB" address=
"$7B"/>
285 <ioreg name=
"ADMUX" address=
"$7C"/>
286 <ioreg name=
"DIDR2" address=
"$7D"/>
287 <ioreg name=
"DIDR0" address=
"$7E"/>
288 <ioreg name=
"DIDR1" address=
"$7F"/>
289 <ioreg name=
"TCCR1A" address=
"$80"/>
290 <ioreg name=
"TCCR1B" address=
"$81"/>
291 <ioreg name=
"TCCR1C" address=
"$82"/>
292 <ioreg name=
"TCNT1L" address=
"$84"/>
293 <ioreg name=
"TCNT1H" address=
"$85"/>
294 <ioreg name=
"ICR1L" address=
"$86"/>
295 <ioreg name=
"ICR1H" address=
"$87"/>
296 <ioreg name=
"OCR1AL" address=
"$88"/>
297 <ioreg name=
"OCR1AH" address=
"$89"/>
298 <ioreg name=
"OCR1BL" address=
"$8A"/>
299 <ioreg name=
"OCR1BH" address=
"$8B"/>
300 <ioreg name=
"OCR1CL" address=
"$8C"/>
301 <ioreg name=
"OCR1CH" address=
"$8D"/>
302 <ioreg name=
"TCCR3A" address=
"$90"/>
303 <ioreg name=
"TCCR3B" address=
"$91"/>
304 <ioreg name=
"TCCR3C" address=
"$92"/>
305 <ioreg name=
"TCNT3L" address=
"$94"/>
306 <ioreg name=
"TCNT3H" address=
"$95"/>
307 <ioreg name=
"ICR3L" address=
"$96"/>
308 <ioreg name=
"ICR3H" address=
"$97"/>
309 <ioreg name=
"OCR3AL" address=
"$98"/>
310 <ioreg name=
"OCR3AH" address=
"$99"/>
311 <ioreg name=
"OCR3BL" address=
"$9A"/>
312 <ioreg name=
"OCR3BH" address=
"$9B"/>
313 <ioreg name=
"OCR3CL" address=
"$9C"/>
314 <ioreg name=
"OCR3CH" address=
"$9D"/>
315 <ioreg name=
"TCCR4A" address=
"$A0"/>
316 <ioreg name=
"TCCR4B" address=
"$A1"/>
317 <ioreg name=
"TCCR4C" address=
"$A2"/>
318 <ioreg name=
"TCNT4L" address=
"$A4"/>
319 <ioreg name=
"TCNT4H" address=
"$A5"/>
320 <ioreg name=
"ICR4L" address=
"$A6"/>
321 <ioreg name=
"ICR4H" address=
"$A7"/>
322 <ioreg name=
"OCR4AL" address=
"$A8"/>
323 <ioreg name=
"OCR4AH" address=
"$A9"/>
324 <ioreg name=
"OCR4BL" address=
"$AA"/>
325 <ioreg name=
"OCR4BH" address=
"$AB"/>
326 <ioreg name=
"OCR4CL" address=
"$AC"/>
327 <ioreg name=
"OCR4CH" address=
"$AD"/>
328 <ioreg name=
"TCCR2A" address=
"$B0"/>
329 <ioreg name=
"TCCR2B" address=
"$B1"/>
330 <ioreg name=
"TCNT2" address=
"$B2"/>
331 <ioreg name=
"OCR2A" address=
"$B3"/>
332 <ioreg name=
"OCR2B" address=
"$B4"/>
333 <ioreg name=
"ASSR" address=
"$B6"/>
334 <ioreg name=
"TWBR" address=
"$B8"/>
335 <ioreg name=
"TWSR" address=
"$B9"/>
336 <ioreg name=
"TWAR" address=
"$BA"/>
337 <ioreg name=
"TWDR" address=
"$BB"/>
338 <ioreg name=
"TWCR" address=
"$BC"/>
339 <ioreg name=
"TWAMR" address=
"$BD"/>
340 <ioreg name=
"UCSR0A" address=
"$C0"/>
341 <ioreg name=
"UCSR0B" address=
"$C1"/>
342 <ioreg name=
"UCSR0C" address=
"$C2"/>
343 <ioreg name=
"UBRR0L" address=
"$C4"/>
344 <ioreg name=
"UBRR0H" address=
"$C5"/>
345 <ioreg name=
"UDR0" address=
"$C6"/>
346 <ioreg name=
"UCSR1A" address=
"$C8"/>
347 <ioreg name=
"UCSR1B" address=
"$C9"/>
348 <ioreg name=
"UCSR1C" address=
"$CA"/>
349 <ioreg name=
"UBRR1L" address=
"$CC"/>
350 <ioreg name=
"UBRR1H" address=
"$CD"/>
351 <ioreg name=
"UDR1" address=
"$CE"/>
352 <ioreg name=
"UCSR2A" address=
"$D0"/>
353 <ioreg name=
"UCSR2B" address=
"$D1"/>
354 <ioreg name=
"UCSR2C" address=
"$D2"/>
355 <ioreg name=
"UBRR2L" address=
"$D4"/>
356 <ioreg name=
"UBRR2H" address=
"$D5"/>
357 <ioreg name=
"UDR2" address=
"$D6"/>
360 <!--Everything after this needs editing!!!-->
361 <module class=
"FUSE">
362 <registers name=
"FUSE" memspace=
"FUSE">
363 <reg size=
"1" name=
"EXTENDED" offset=
"0x02">
364 <bitfield name=
"BODLEVEL" mask=
"0x07" text=
"Brown-out Detector trigger level" icon=
"" enum=
"ENUM_BODLEVEL"/>
366 <reg size=
"1" name=
"HIGH" offset=
"0x01">
367 <bitfield name=
"OCDEN" mask=
"0x80" text=
"On-Chip Debug Enabled" icon=
""/>
368 <bitfield name=
"JTAGEN" mask=
"0x40" text=
"JTAG Interface Enabled" icon=
""/>
369 <bitfield name=
"SPIEN" mask=
"0x20" text=
"Serial program downloading (SPI) enabled" icon=
""/>
370 <bitfield name=
"WDTON" mask=
"0x10" text=
"Watchdog timer always on" icon=
""/>
371 <bitfield name=
"EESAVE" mask=
"0x08" text=
"Preserve EEPROM through the Chip Erase cycle" icon=
""/>
372 <bitfield name=
"BOOTSZ" mask=
"0x06" text=
"Select Boot Size" icon=
"" enum=
"ENUM_BOOTSZ"/>
373 <bitfield name=
"BOOTRST" mask=
"0x01" text=
"Boot Reset vector Enabled" icon=
""/>
375 <reg size=
"1" name=
"LOW" offset=
"0x00">
376 <bitfield name=
"CKDIV8" mask=
"0x80" text=
"Divide clock by 8 internally" icon=
""/>
377 <bitfield name=
"CKOUT" mask=
"0x40" text=
"Clock output on PORTE7" icon=
""/>
378 <bitfield name=
"SUT_CKSEL" mask=
"0x3F" text=
"Select Clock Source" icon=
"" enum=
"ENUM_SUT_CKSEL"/>
382 <module class=
"LOCKBIT">
383 <registers name=
"LOCKBIT" memspace=
"LOCKBIT">
384 <reg size=
"1" name=
"LOCKBIT" offset=
"0x00">
385 <bitfield name=
"LB" mask=
"0x03" text=
"Memory Lock" icon=
"" enum=
"ENUM_LB"/>
386 <bitfield name=
"BLB0" mask=
"0x0C" text=
"Boot Loader Protection Mode" icon=
"" enum=
"ENUM_BLB"/>
387 <bitfield name=
"BLB1" mask=
"0x30" text=
"Boot Loader Protection Mode" icon=
"" enum=
"ENUM_BLB2"/>
391 <module class=
"ANALOG_COMPARATOR">
392 <registers name=
"ANALOG_COMPARATOR" memspace=
"DATAMEM" text=
"" icon=
"io_analo.bmp">
393 <reg size=
"1" name=
"ADCSRB" offset=
"0x7B" text=
"ADC Control and Status Register B" icon=
"io_flag.bmp">
394 <bitfield name=
"ACME" mask=
"0x40" text=
"Analog Comparator Multiplexer Enable" icon=
""/>
396 <reg size=
"1" name=
"ACSR" offset=
"0x50" text=
"Analog Comparator Control And Status Register" icon=
"io_analo.bmp">
397 <bitfield name=
"ACD" mask=
"0x80" text=
"Analog Comparator Disable" icon=
""/>
398 <bitfield name=
"ACBG" mask=
"0x40" text=
"Analog Comparator Bandgap Select" icon=
""/>
399 <bitfield name=
"ACO" mask=
"0x20" text=
"Analog Compare Output" icon=
""/>
400 <bitfield name=
"ACI" mask=
"0x10" text=
"Analog Comparator Interrupt Flag" icon=
""/>
401 <bitfield name=
"ACIE" mask=
"0x08" text=
"Analog Comparator Interrupt Enable" icon=
""/>
402 <bitfield name=
"ACIC" mask=
"0x04" text=
"Analog Comparator Input Capture Enable" icon=
""/>
403 <bitfield name=
"ACIS" mask=
"0x03" text=
"Analog Comparator Interrupt Mode Select bits" icon=
"" enum=
"ANALOG_COMP_INTERRUPT"/>
405 <reg size=
"1" name=
"DIDR1" offset=
"0x7F" text=
"Digital Input Disable Register 1" icon=
"io_analo.bmp">
406 <bitfield name=
"AIN1D" mask=
"0x02" text=
"AIN1 Digital Input Disable" icon=
""/>
407 <bitfield name=
"AIN0D" mask=
"0x01" text=
"AIN0 Digital Input Disable" icon=
""/>
411 <module class=
"USART0">
412 <registers name=
"USART0" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
413 <reg size=
"1" name=
"UDR0" offset=
"0xC6" text=
"USART I/O Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
414 <reg size=
"1" name=
"UCSR0A" offset=
"0xC0" text=
"USART Control and Status Register A" icon=
"io_flag.bmp">
415 <bitfield name=
"RXC0" mask=
"0x80" text=
"USART Receive Complete" icon=
""/>
416 <bitfield name=
"TXC0" mask=
"0x40" text=
"USART Transmitt Complete" icon=
""/>
417 <bitfield name=
"UDRE0" mask=
"0x20" text=
"USART Data Register Empty" icon=
""/>
418 <bitfield name=
"FE0" mask=
"0x10" text=
"Framing Error" icon=
""/>
419 <bitfield name=
"DOR0" mask=
"0x08" text=
"Data overRun" icon=
""/>
420 <bitfield name=
"UPE0" mask=
"0x04" text=
"Parity Error" icon=
""/>
421 <bitfield name=
"U2X0" mask=
"0x02" text=
"Double the USART transmission speed" icon=
""/>
422 <bitfield name=
"MPCM0" mask=
"0x01" text=
"Multi-processor Communication Mode" icon=
""/>
424 <reg size=
"1" name=
"UCSR0B" offset=
"0xC1" text=
"USART Control and Status Register B" icon=
"io_flag.bmp">
425 <bitfield name=
"RXCIE0" mask=
"0x80" text=
"RX Complete Interrupt Enable" icon=
""/>
426 <bitfield name=
"TXCIE0" mask=
"0x40" text=
"TX Complete Interrupt Enable" icon=
""/>
427 <bitfield name=
"UDRIE0" mask=
"0x20" text=
"USART Data register Empty Interrupt Enable" icon=
""/>
428 <bitfield name=
"RXEN0" mask=
"0x10" text=
"Receiver Enable" icon=
""/>
429 <bitfield name=
"TXEN0" mask=
"0x08" text=
"Transmitter Enable" icon=
""/>
430 <bitfield name=
"UCSZ02" mask=
"0x04" text=
"Character Size" icon=
""/>
431 <bitfield name=
"RXB80" mask=
"0x02" text=
"Receive Data Bit 8" icon=
""/>
432 <bitfield name=
"TXB80" mask=
"0x01" text=
"Transmit Data Bit 8" icon=
""/>
434 <reg size=
"1" name=
"UCSR0C" offset=
"0xC2" text=
"USART Control and Status Register C" icon=
"io_flag.bmp">
435 <bitfield name=
"UMSEL0" mask=
"0xC0" text=
"USART Mode Select" icon=
"" enum=
"COMM_USART_MODE"/>
436 <bitfield name=
"UPM0" mask=
"0x30" text=
"Parity Mode Bits" icon=
"" enum=
"COMM_UPM_PARITY_MODE"/>
437 <bitfield name=
"USBS0" mask=
"0x08" text=
"Stop Bit Select" icon=
"" enum=
"COMM_STOP_BIT_SEL"/>
438 <bitfield name=
"UCSZ0" mask=
"0x06" text=
"Character Size" icon=
""/>
439 <bitfield name=
"UCPOL0" mask=
"0x01" text=
"Clock Polarity" icon=
""/>
441 <reg size=
"2" name=
"UBRR0" offset=
"0xC4" text=
"USART Baud Rate Register Bytes" icon=
"io_com.bmp" mask=
"0x0FFF"/>
445 <registers name=
"TWI" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
446 <reg size=
"1" name=
"TWAMR" offset=
"0xBD" text=
"TWI (Slave) Address Mask Register" icon=
"io_com.bmp">
447 <bitfield name=
"TWAM" mask=
"0xFE" text=
"" icon=
""/>
449 <reg size=
"1" name=
"TWBR" offset=
"0xB8" text=
"TWI Bit Rate register" icon=
"io_com.bmp" mask=
"0xFF"/>
450 <reg size=
"1" name=
"TWCR" offset=
"0xBC" text=
"TWI Control Register" icon=
"io_flag.bmp">
451 <bitfield name=
"TWINT" mask=
"0x80" text=
"TWI Interrupt Flag" icon=
""/>
452 <bitfield name=
"TWEA" mask=
"0x40" text=
"TWI Enable Acknowledge Bit" icon=
""/>
453 <bitfield name=
"TWSTA" mask=
"0x20" text=
"TWI Start Condition Bit" icon=
""/>
454 <bitfield name=
"TWSTO" mask=
"0x10" text=
"TWI Stop Condition Bit" icon=
""/>
455 <bitfield name=
"TWWC" mask=
"0x08" text=
"TWI Write Collition Flag" icon=
""/>
456 <bitfield name=
"TWEN" mask=
"0x04" text=
"TWI Enable Bit" icon=
""/>
457 <bitfield name=
"TWIE" mask=
"0x01" text=
"TWI Interrupt Enable" icon=
""/>
459 <reg size=
"1" name=
"TWSR" offset=
"0xB9" text=
"TWI Status Register" icon=
"io_flag.bmp">
460 <bitfield name=
"TWS" mask=
"0xF8" text=
"TWI Status" icon=
"" lsb=
"3"/>
461 <bitfield name=
"TWPS" mask=
"0x03" text=
"TWI Prescaler" icon=
"" enum=
"COMM_TWI_PRESACLE"/>
463 <reg size=
"1" name=
"TWDR" offset=
"0xBB" text=
"TWI Data register" icon=
"io_com.bmp" mask=
"0xFF"/>
464 <reg size=
"1" name=
"TWAR" offset=
"0xBA" text=
"TWI (Slave) Address register" icon=
"io_com.bmp">
465 <bitfield name=
"TWA" mask=
"0xFE" text=
"TWI (Slave) Address register Bits" icon=
""/>
466 <bitfield name=
"TWGCE" mask=
"0x01" text=
"TWI General Call Recognition Enable Bit" icon=
""/>
471 <registers name=
"SPI" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
472 <reg size=
"1" name=
"SPCR" offset=
"0x4C" text=
"SPI Control Register" icon=
"io_flag.bmp">
473 <bitfield name=
"SPIE" mask=
"0x80" text=
"SPI Interrupt Enable" icon=
""/>
474 <bitfield name=
"SPE" mask=
"0x40" text=
"SPI Enable" icon=
""/>
475 <bitfield name=
"DORD" mask=
"0x20" text=
"Data Order" icon=
""/>
476 <bitfield name=
"MSTR" mask=
"0x10" text=
"Master/Slave Select" icon=
""/>
477 <bitfield name=
"CPOL" mask=
"0x08" text=
"Clock polarity" icon=
""/>
478 <bitfield name=
"CPHA" mask=
"0x04" text=
"Clock Phase" icon=
""/>
479 <bitfield name=
"SPR" mask=
"0x03" text=
"SPI Clock Rate Selects" icon=
"" enum=
"COMM_SCK_RATE_3BIT"/>
481 <reg size=
"1" name=
"SPSR" offset=
"0x4D" text=
"SPI Status Register" icon=
"io_flag.bmp">
482 <bitfield name=
"SPIF" mask=
"0x80" text=
"SPI Interrupt Flag" icon=
""/>
483 <bitfield name=
"WCOL" mask=
"0x40" text=
"Write Collision Flag" icon=
""/>
484 <bitfield name=
"SPI2X" mask=
"0x01" text=
"Double SPI Speed Bit" icon=
""/>
486 <reg size=
"1" name=
"SPDR" offset=
"0x4E" text=
"SPI Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
489 <module class=
"PORTA">
490 <registers name=
"PORTA" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
491 <reg size=
"1" name=
"PORTA" offset=
"0x22" text=
"Port A Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
492 <reg size=
"1" name=
"DDRA" offset=
"0x21" text=
"Port A Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
493 <reg size=
"1" name=
"PINA" offset=
"0x20" text=
"Port A Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
496 <module class=
"PORTB">
497 <registers name=
"PORTB" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
498 <reg size=
"1" name=
"PORTB" offset=
"0x25" text=
"Port B Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
499 <reg size=
"1" name=
"DDRB" offset=
"0x24" text=
"Port B Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
500 <reg size=
"1" name=
"PINB" offset=
"0x23" text=
"Port B Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
503 <module class=
"PORTC">
504 <registers name=
"PORTC" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
505 <reg size=
"1" name=
"PORTC" offset=
"0x28" text=
"Port C Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
506 <reg size=
"1" name=
"DDRC" offset=
"0x27" text=
"Port C Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
507 <reg size=
"1" name=
"PINC" offset=
"0x26" text=
"Port C Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
510 <module class=
"PORTD">
511 <registers name=
"PORTD" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
512 <reg size=
"1" name=
"PORTD" offset=
"0x2B" text=
"Port D Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
513 <reg size=
"1" name=
"DDRD" offset=
"0x2A" text=
"Port D Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
514 <reg size=
"1" name=
"PIND" offset=
"0x29" text=
"Port D Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
517 <module class=
"PORTE">
518 <registers name=
"PORTE" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
519 <reg size=
"1" name=
"PORTE" offset=
"0x2E" text=
"Data Register, Port E" icon=
"io_port.bmp" mask=
"0xFF"/>
520 <reg size=
"1" name=
"DDRE" offset=
"0x2D" text=
"Data Direction Register, Port E" icon=
"io_flag.bmp" mask=
"0xFF"/>
521 <reg size=
"1" name=
"PINE" offset=
"0x2C" text=
"Input Pins, Port E" icon=
"io_port.bmp" mask=
"0xFF"/>
524 <module class=
"PORTF">
525 <registers name=
"PORTF" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
526 <reg size=
"1" name=
"PORTF" offset=
"0x31" text=
"Data Register, Port F" icon=
"io_port.bmp" mask=
"0xFF"/>
527 <reg size=
"1" name=
"DDRF" offset=
"0x30" text=
"Data Direction Register, Port F" icon=
"io_flag.bmp" mask=
"0xFF"/>
528 <reg size=
"1" name=
"PINF" offset=
"0x2F" text=
"Input Pins, Port F" icon=
"io_port.bmp" mask=
"0xFF"/>
531 <module class=
"PORTG">
532 <registers name=
"PORTG" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
533 <reg size=
"1" name=
"PORTG" offset=
"0x34" text=
"Data Register, Port G" icon=
"io_port.bmp" mask=
"0x3F"/>
534 <reg size=
"1" name=
"DDRG" offset=
"0x33" text=
"Data Direction Register, Port G" icon=
"io_flag.bmp" mask=
"0x3F"/>
535 <reg size=
"1" name=
"PING" offset=
"0x32" text=
"Input Pins, Port G" icon=
"io_port.bmp" mask=
"0x3F"/>
538 <module class=
"PORTH">
539 <registers name=
"PORTH" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
540 <reg size=
"1" name=
"PORTH" offset=
"0x102" text=
"PORT H Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
541 <reg size=
"1" name=
"DDRH" offset=
"0x101" text=
"PORT H Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
542 <reg size=
"1" name=
"PINH" offset=
"0x100" text=
"PORT H Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
545 <module class=
"PORTJ">
546 <registers name=
"PORTJ" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
547 <reg size=
"1" name=
"PORTJ" offset=
"0x105" text=
"PORT J Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
548 <reg size=
"1" name=
"DDRJ" offset=
"0x104" text=
"PORT J Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
549 <reg size=
"1" name=
"PINJ" offset=
"0x103" text=
"PORT J Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
552 <module class=
"PORTK">
553 <registers name=
"PORTK" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
554 <reg size=
"1" name=
"PORTK" offset=
"0x108" text=
"PORT K Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
555 <reg size=
"1" name=
"DDRK" offset=
"0x107" text=
"PORT K Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
556 <reg size=
"1" name=
"PINK" offset=
"0x106" text=
"PORT K Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
559 <module class=
"PORTL">
560 <registers name=
"PORTL" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
561 <reg size=
"1" name=
"PORTL" offset=
"0x10B" text=
"PORT L Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
562 <reg size=
"1" name=
"DDRL" offset=
"0x10A" text=
"PORT L Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
563 <reg size=
"1" name=
"PINL" offset=
"0x109" text=
"PORT L Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
566 <module class=
"TIMER_COUNTER_0">
567 <registers name=
"TIMER_COUNTER_0" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
568 <reg size=
"1" name=
"OCR0B" offset=
"0x48" text=
"Timer/Counter0 Output Compare Register" icon=
"io_timer.bmp" mask=
"0xFF"/>
569 <reg size=
"1" name=
"OCR0A" offset=
"0x47" text=
"Timer/Counter0 Output Compare Register" icon=
"io_timer.bmp" mask=
"0xFF"/>
570 <reg size=
"1" name=
"TCNT0" offset=
"0x46" text=
"Timer/Counter0" icon=
"io_timer.bmp" mask=
"0xFF"/>
571 <reg size=
"1" name=
"TCCR0B" offset=
"0x45" text=
"Timer/Counter Control Register B" icon=
"io_flag.bmp">
572 <bitfield name=
"FOC0A" mask=
"0x80" text=
"Force Output Compare A" icon=
""/>
573 <bitfield name=
"FOC0B" mask=
"0x40" text=
"Force Output Compare B" icon=
""/>
574 <bitfield name=
"WGM02" mask=
"0x08" text=
"" icon=
""/>
575 <bitfield name=
"CS0" mask=
"0x07" text=
"Clock Select" icon=
"" enum=
"CLK_SEL_3BIT_EXT"/>
577 <reg size=
"1" name=
"TCCR0A" offset=
"0x44" text=
"Timer/Counter Control Register A" icon=
"io_flag.bmp">
578 <bitfield name=
"COM0A" mask=
"0xC0" text=
"Compare Output Mode, Phase Correct PWM Mode" icon=
""/>
579 <bitfield name=
"COM0B" mask=
"0x30" text=
"Compare Output Mode, Fast PWm" icon=
""/>
580 <bitfield name=
"WGM0" mask=
"0x03" text=
"Waveform Generation Mode" icon=
""/>
582 <reg size=
"1" name=
"TIMSK0" offset=
"0x6E" text=
"Timer/Counter0 Interrupt Mask Register" icon=
"io_flag.bmp">
583 <bitfield name=
"OCIE0B" mask=
"0x04" text=
"Timer/Counter0 Output Compare Match B Interrupt Enable" icon=
""/>
584 <bitfield name=
"OCIE0A" mask=
"0x02" text=
"Timer/Counter0 Output Compare Match A Interrupt Enable" icon=
""/>
585 <bitfield name=
"TOIE0" mask=
"0x01" text=
"Timer/Counter0 Overflow Interrupt Enable" icon=
""/>
587 <reg size=
"1" name=
"TIFR0" offset=
"0x35" text=
"Timer/Counter0 Interrupt Flag register" icon=
"io_flag.bmp">
588 <bitfield name=
"OCF0B" mask=
"0x04" text=
"Timer/Counter0 Output Compare Flag 0B" icon=
""/>
589 <bitfield name=
"OCF0A" mask=
"0x02" text=
"Timer/Counter0 Output Compare Flag 0A" icon=
""/>
590 <bitfield name=
"TOV0" mask=
"0x01" text=
"Timer/Counter0 Overflow Flag" icon=
""/>
592 <reg size=
"1" name=
"GTCCR" offset=
"0x43" text=
"General Timer/Counter Control Register" icon=
"io_flag.bmp">
593 <bitfield name=
"TSM" mask=
"0x80" text=
"Timer/Counter Synchronization Mode" icon=
""/>
594 <bitfield name=
"PSRSYNC" mask=
"0x01" text=
"Prescaler Reset Timer/Counter1 and Timer/Counter0" icon=
""/>
598 <module class=
"TIMER_COUNTER_2">
599 <registers name=
"TIMER_COUNTER_2" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
600 <reg size=
"1" name=
"TIMSK2" offset=
"0x70" text=
"Timer/Counter Interrupt Mask register" icon=
"io_flag.bmp">
601 <bitfield name=
"OCIE2B" mask=
"0x04" text=
"Timer/Counter2 Output Compare Match B Interrupt Enable" icon=
""/>
602 <bitfield name=
"OCIE2A" mask=
"0x02" text=
"Timer/Counter2 Output Compare Match A Interrupt Enable" icon=
""/>
603 <bitfield name=
"TOIE2" mask=
"0x01" text=
"Timer/Counter2 Overflow Interrupt Enable" icon=
""/>
605 <reg size=
"1" name=
"TIFR2" offset=
"0x37" text=
"Timer/Counter Interrupt Flag Register" icon=
"io_flag.bmp">
606 <bitfield name=
"OCF2B" mask=
"0x04" text=
"Output Compare Flag 2B" icon=
""/>
607 <bitfield name=
"OCF2A" mask=
"0x02" text=
"Output Compare Flag 2A" icon=
""/>
608 <bitfield name=
"TOV2" mask=
"0x01" text=
"Timer/Counter2 Overflow Flag" icon=
""/>
610 <reg size=
"1" name=
"TCCR2A" offset=
"0xB0" text=
"Timer/Counter2 Control Register A" icon=
"io_flag.bmp">
611 <bitfield name=
"COM2A" mask=
"0xC0" text=
"Compare Output Mode bits" icon=
""/>
612 <bitfield name=
"COM2B" mask=
"0x30" text=
"Compare Output Mode bits" icon=
""/>
613 <bitfield name=
"WGM2" mask=
"0x03" text=
"Waveform Genration Mode" icon=
""/>
615 <reg size=
"1" name=
"TCCR2B" offset=
"0xB1" text=
"Timer/Counter2 Control Register B" icon=
"io_flag.bmp">
616 <bitfield name=
"FOC2A" mask=
"0x80" text=
"Force Output Compare A" icon=
""/>
617 <bitfield name=
"FOC2B" mask=
"0x40" text=
"Force Output Compare B" icon=
""/>
618 <bitfield name=
"WGM22" mask=
"0x08" text=
"Waveform Generation Mode" icon=
""/>
619 <bitfield name=
"CS2" mask=
"0x07" text=
"Clock Select bits" icon=
"" enum=
"CLK_SEL_3BIT"/>
621 <reg size=
"1" name=
"TCNT2" offset=
"0xB2" text=
"Timer/Counter2" icon=
"io_timer.bmp" mask=
"0xFF"/>
622 <reg size=
"1" name=
"OCR2B" offset=
"0xB4" text=
"Timer/Counter2 Output Compare Register B" icon=
"io_timer.bmp" mask=
"0xFF"/>
623 <reg size=
"1" name=
"OCR2A" offset=
"0xB3" text=
"Timer/Counter2 Output Compare Register A" icon=
"io_timer.bmp" mask=
"0xFF"/>
624 <reg size=
"1" name=
"ASSR" offset=
"0xB6" text=
"Asynchronous Status Register" icon=
"io_flag.bmp">
625 <bitfield name=
"EXCLK" mask=
"0x40" text=
"Enable External Clock Input" icon=
""/>
626 <bitfield name=
"AS2" mask=
"0x20" text=
"Asynchronous Timer/Counter2" icon=
""/>
627 <bitfield name=
"TCN2UB" mask=
"0x10" text=
"Timer/Counter2 Update Busy" icon=
""/>
628 <bitfield name=
"OCR2AUB" mask=
"0x08" text=
"Output Compare Register2 Update Busy" icon=
""/>
629 <bitfield name=
"OCR2BUB" mask=
"0x04" text=
"Output Compare Register 2 Update Busy" icon=
""/>
630 <bitfield name=
"TCR2AUB" mask=
"0x02" text=
"Timer/Counter Control Register2 Update Busy" icon=
""/>
631 <bitfield name=
"TCR2BUB" mask=
"0x01" text=
"Timer/Counter Control Register2 Update Busy" icon=
""/>
633 <reg size=
"1" name=
"GTCCR" offset=
"0x43" text=
"General Timer Counter Control register" icon=
"io_flag.bmp">
634 <bitfield name=
"TSM" mask=
"0x80" text=
"Timer/Counter Synchronization Mode" icon=
""/>
635 <bitfield name=
"PSRASY" mask=
"0x02" text=
"Prescaler Reset Timer/Counter2" icon=
""/>
639 <module class=
"WATCHDOG">
640 <registers name=
"WATCHDOG" memspace=
"DATAMEM" text=
"" icon=
"io_watch.bmp">
641 <reg size=
"1" name=
"WDTCSR" offset=
"0x60" text=
"Watchdog Timer Control Register" icon=
"io_flag.bmp">
642 <bitfield name=
"WDIF" mask=
"0x80" text=
"Watchdog Timeout Interrupt Flag" icon=
""/>
643 <bitfield name=
"WDIE" mask=
"0x40" text=
"Watchdog Timeout Interrupt Enable" icon=
""/>
644 <bitfield name=
"WDP" mask=
"0x27" text=
"Watchdog Timer Prescaler Bits" icon=
"" enum=
"WDOG_TIMER_PRESCALE_4BITS"/>
645 <bitfield name=
"WDCE" mask=
"0x10" text=
"Watchdog Change Enable" icon=
""/>
646 <bitfield name=
"WDE" mask=
"0x08" text=
"Watch Dog Enable" icon=
""/>
650 <module class=
"USART1">
651 <registers name=
"USART1" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
652 <reg size=
"1" name=
"UDR1" offset=
"0xCE" text=
"USART I/O Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
653 <reg size=
"1" name=
"UCSR1A" offset=
"0xC8" text=
"USART Control and Status Register A" icon=
"io_flag.bmp">
654 <bitfield name=
"RXC1" mask=
"0x80" text=
"USART Receive Complete" icon=
""/>
655 <bitfield name=
"TXC1" mask=
"0x40" text=
"USART Transmitt Complete" icon=
""/>
656 <bitfield name=
"UDRE1" mask=
"0x20" text=
"USART Data Register Empty" icon=
""/>
657 <bitfield name=
"FE1" mask=
"0x10" text=
"Framing Error" icon=
""/>
658 <bitfield name=
"DOR1" mask=
"0x08" text=
"Data overRun" icon=
""/>
659 <bitfield name=
"UPE1" mask=
"0x04" text=
"Parity Error" icon=
""/>
660 <bitfield name=
"U2X1" mask=
"0x02" text=
"Double the USART transmission speed" icon=
""/>
661 <bitfield name=
"MPCM1" mask=
"0x01" text=
"Multi-processor Communication Mode" icon=
""/>
663 <reg size=
"1" name=
"UCSR1B" offset=
"0xC9" text=
"USART Control and Status Register B" icon=
"io_flag.bmp">
664 <bitfield name=
"RXCIE1" mask=
"0x80" text=
"RX Complete Interrupt Enable" icon=
""/>
665 <bitfield name=
"TXCIE1" mask=
"0x40" text=
"TX Complete Interrupt Enable" icon=
""/>
666 <bitfield name=
"UDRIE1" mask=
"0x20" text=
"USART Data register Empty Interrupt Enable" icon=
""/>
667 <bitfield name=
"RXEN1" mask=
"0x10" text=
"Receiver Enable" icon=
""/>
668 <bitfield name=
"TXEN1" mask=
"0x08" text=
"Transmitter Enable" icon=
""/>
669 <bitfield name=
"UCSZ12" mask=
"0x04" text=
"Character Size" icon=
""/>
670 <bitfield name=
"RXB81" mask=
"0x02" text=
"Receive Data Bit 8" icon=
""/>
671 <bitfield name=
"TXB81" mask=
"0x01" text=
"Transmit Data Bit 8" icon=
""/>
673 <reg size=
"1" name=
"UCSR1C" offset=
"0xCA" text=
"USART Control and Status Register C" icon=
"io_flag.bmp">
674 <bitfield name=
"UMSEL1" mask=
"0xC0" text=
"USART Mode Select" icon=
"" enum=
"COMM_USART_MODE_2BIT"/>
675 <bitfield name=
"UPM1" mask=
"0x30" text=
"Parity Mode Bits" icon=
"" enum=
"COMM_UPM_PARITY_MODE"/>
676 <bitfield name=
"USBS1" mask=
"0x08" text=
"Stop Bit Select" icon=
"" enum=
"COMM_STOP_BIT_SEL"/>
677 <bitfield name=
"UCSZ1" mask=
"0x06" text=
"Character Size" icon=
""/>
678 <bitfield name=
"UCPOL1" mask=
"0x01" text=
"Clock Polarity" icon=
""/>
680 <reg size=
"2" name=
"UBRR1" offset=
"0xCC" text=
"USART Baud Rate Register Bytes" icon=
"io_com.bmp" mask=
"0x0FFF"/>
683 <module class=
"EEPROM">
684 <registers name=
"EEPROM" memspace=
"DATAMEM" text=
"" icon=
"io_cpu.bmp">
685 <reg size=
"2" name=
"EEAR" offset=
"0x41" text=
"EEPROM Address Register Low Bytes" icon=
"io_cpu.bmp" mask=
"0x0FFF"/>
686 <reg size=
"1" name=
"EEDR" offset=
"0x40" text=
"EEPROM Data Register" icon=
"io_cpu.bmp" mask=
"0xFF"/>
687 <reg size=
"1" name=
"EECR" offset=
"0x3F" text=
"EEPROM Control Register" icon=
"io_flag.bmp">
688 <bitfield name=
"EEPM" mask=
"0x30" text=
"EEPROM Programming Mode Bits" icon=
"" enum=
"EEP_MODE"/>
689 <bitfield name=
"EERIE" mask=
"0x08" text=
"EEPROM Ready Interrupt Enable" icon=
""/>
690 <bitfield name=
"EEMPE" mask=
"0x04" text=
"EEPROM Master Write Enable" icon=
""/>
691 <bitfield name=
"EEPE" mask=
"0x02" text=
"EEPROM Write Enable" icon=
""/>
692 <bitfield name=
"EERE" mask=
"0x01" text=
"EEPROM Read Enable" icon=
""/>
696 <module class=
"TIMER_COUNTER_5">
697 <registers name=
"TIMER_COUNTER_5" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
698 <reg size=
"1" name=
"TCCR5A" offset=
"0x120" text=
"Timer/Counter5 Control Register A" icon=
"io_flag.bmp">
699 <bitfield name=
"COM5A" mask=
"0xC0" text=
"Compare Output Mode 1A, bits" icon=
""/>
700 <bitfield name=
"COM5B" mask=
"0x30" text=
"Compare Output Mode 5B, bits" icon=
""/>
701 <bitfield name=
"COM5C" mask=
"0x0C" text=
"Compare Output Mode 5C, bits" icon=
""/>
702 <bitfield name=
"WGM5" mask=
"0x03" text=
"Waveform Generation Mode" icon=
""/>
704 <reg size=
"1" name=
"TCCR5B" offset=
"0x121" text=
"Timer/Counter5 Control Register B" icon=
"io_flag.bmp">
705 <bitfield name=
"ICNC5" mask=
"0x80" text=
"Input Capture 5 Noise Canceler" icon=
""/>
706 <bitfield name=
"ICES5" mask=
"0x40" text=
"Input Capture 5 Edge Select" icon=
""/>
707 <bitfield name=
"WGM5" mask=
"0x18" text=
"Waveform Generation Mode" icon=
"" lsb=
"2"/>
708 <bitfield name=
"CS5" mask=
"0x07" text=
"Prescaler source of Timer/Counter 5" icon=
"" enum=
"CLK_SEL_3BIT_EXT"/>
710 <reg size=
"1" name=
"TCCR5C" offset=
"0x122" text=
"Timer/Counter 5 Control Register C" icon=
"io_flag.bmp">
711 <bitfield name=
"FOC5A" mask=
"0x80" text=
"Force Output Compare 5A" icon=
""/>
712 <bitfield name=
"FOC5B" mask=
"0x40" text=
"Force Output Compare 5B" icon=
""/>
713 <bitfield name=
"FOC5C" mask=
"0x20" text=
"Force Output Compare 5C" icon=
""/>
715 <reg size=
"2" name=
"TCNT5" offset=
"0x124" text=
"Timer/Counter5 Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
716 <reg size=
"2" name=
"OCR5A" offset=
"0x128" text=
"Timer/Counter5 Outbut Compare Register A Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
717 <reg size=
"2" name=
"OCR5B" offset=
"0x12A" text=
"Timer/Counter5 Output Compare Register B Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
718 <reg size=
"2" name=
"OCR5C" offset=
"0x12C" text=
"Timer/Counter5 Output Compare Register B Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
719 <reg size=
"2" name=
"ICR5" offset=
"0x126" text=
"Timer/Counter5 Input Capture Register Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
720 <reg size=
"1" name=
"TIMSK5" offset=
"0x73" text=
"Timer/Counter5 Interrupt Mask Register" icon=
"io_flag.bmp">
721 <bitfield name=
"ICIE5" mask=
"0x20" text=
"Timer/Counter5 Input Capture Interrupt Enable" icon=
""/>
722 <bitfield name=
"OCIE5C" mask=
"0x08" text=
"Timer/Counter5 Output Compare C Match Interrupt Enable" icon=
""/>
723 <bitfield name=
"OCIE5B" mask=
"0x04" text=
"Timer/Counter5 Output Compare B Match Interrupt Enable" icon=
""/>
724 <bitfield name=
"OCIE5A" mask=
"0x02" text=
"Timer/Counter5 Output Compare A Match Interrupt Enable" icon=
""/>
725 <bitfield name=
"TOIE5" mask=
"0x01" text=
"Timer/Counter5 Overflow Interrupt Enable" icon=
""/>
727 <reg size=
"1" name=
"TIFR5" offset=
"0x3A" text=
"Timer/Counter5 Interrupt Flag register" icon=
"io_flag.bmp">
728 <bitfield name=
"ICF5" mask=
"0x20" text=
"Input Capture Flag 5" icon=
""/>
729 <bitfield name=
"OCF5C" mask=
"0x08" text=
"Output Compare Flag 5C" icon=
""/>
730 <bitfield name=
"OCF5B" mask=
"0x04" text=
"Output Compare Flag 5B" icon=
""/>
731 <bitfield name=
"OCF5A" mask=
"0x02" text=
"Output Compare Flag 5A" icon=
""/>
732 <bitfield name=
"TOV5" mask=
"0x01" text=
"Timer/Counter5 Overflow Flag" icon=
""/>
736 <module class=
"TIMER_COUNTER_4">
737 <registers name=
"TIMER_COUNTER_4" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
738 <reg size=
"1" name=
"TCCR4A" offset=
"0xA0" text=
"Timer/Counter4 Control Register A" icon=
"io_flag.bmp">
739 <bitfield name=
"COM4A" mask=
"0xC0" text=
"Compare Output Mode 1A, bits" icon=
""/>
740 <bitfield name=
"COM4B" mask=
"0x30" text=
"Compare Output Mode 4B, bits" icon=
""/>
741 <bitfield name=
"COM4C" mask=
"0x0C" text=
"Compare Output Mode 4C, bits" icon=
""/>
742 <bitfield name=
"WGM4" mask=
"0x03" text=
"Waveform Generation Mode" icon=
""/>
744 <reg size=
"1" name=
"TCCR4B" offset=
"0xA1" text=
"Timer/Counter4 Control Register B" icon=
"io_flag.bmp">
745 <bitfield name=
"ICNC4" mask=
"0x80" text=
"Input Capture 4 Noise Canceler" icon=
""/>
746 <bitfield name=
"ICES4" mask=
"0x40" text=
"Input Capture 4 Edge Select" icon=
""/>
747 <bitfield name=
"WGM4" mask=
"0x18" text=
"Waveform Generation Mode" icon=
"" lsb=
"2"/>
748 <bitfield name=
"CS4" mask=
"0x07" text=
"Prescaler source of Timer/Counter 4" icon=
"" enum=
"CLK_SEL_3BIT_EXT"/>
750 <reg size=
"1" name=
"TCCR4C" offset=
"0xA2" text=
"Timer/Counter 4 Control Register C" icon=
"io_flag.bmp">
751 <bitfield name=
"FOC4A" mask=
"0x80" text=
"Force Output Compare 4A" icon=
""/>
752 <bitfield name=
"FOC4B" mask=
"0x40" text=
"Force Output Compare 4B" icon=
""/>
753 <bitfield name=
"FOC4C" mask=
"0x20" text=
"Force Output Compare 4C" icon=
""/>
755 <reg size=
"2" name=
"TCNT4" offset=
"0xA4" text=
"Timer/Counter4 Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
756 <reg size=
"2" name=
"OCR4A" offset=
"0xA8" text=
"Timer/Counter4 Outbut Compare Register A Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
757 <reg size=
"2" name=
"OCR4B" offset=
"0xAA" text=
"Timer/Counter4 Output Compare Register B Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
758 <reg size=
"2" name=
"OCR4C" offset=
"0xAC" text=
"Timer/Counter4 Output Compare Register B Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
759 <reg size=
"2" name=
"ICR4" offset=
"0xA6" text=
"Timer/Counter4 Input Capture Register Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
760 <reg size=
"1" name=
"TIMSK4" offset=
"0x72" text=
"Timer/Counter4 Interrupt Mask Register" icon=
"io_flag.bmp">
761 <bitfield name=
"ICIE4" mask=
"0x20" text=
"Timer/Counter4 Input Capture Interrupt Enable" icon=
""/>
762 <bitfield name=
"OCIE4C" mask=
"0x08" text=
"Timer/Counter4 Output Compare C Match Interrupt Enable" icon=
""/>
763 <bitfield name=
"OCIE4B" mask=
"0x04" text=
"Timer/Counter4 Output Compare B Match Interrupt Enable" icon=
""/>
764 <bitfield name=
"OCIE4A" mask=
"0x02" text=
"Timer/Counter4 Output Compare A Match Interrupt Enable" icon=
""/>
765 <bitfield name=
"TOIE4" mask=
"0x01" text=
"Timer/Counter4 Overflow Interrupt Enable" icon=
""/>
767 <reg size=
"1" name=
"TIFR4" offset=
"0x39" text=
"Timer/Counter4 Interrupt Flag register" icon=
"io_flag.bmp">
768 <bitfield name=
"ICF4" mask=
"0x20" text=
"Input Capture Flag 4" icon=
""/>
769 <bitfield name=
"OCF4C" mask=
"0x08" text=
"Output Compare Flag 4C" icon=
""/>
770 <bitfield name=
"OCF4B" mask=
"0x04" text=
"Output Compare Flag 4B" icon=
""/>
771 <bitfield name=
"OCF4A" mask=
"0x02" text=
"Output Compare Flag 4A" icon=
""/>
772 <bitfield name=
"TOV4" mask=
"0x01" text=
"Timer/Counter4 Overflow Flag" icon=
""/>
776 <module class=
"TIMER_COUNTER_3">
777 <registers name=
"TIMER_COUNTER_3" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
778 <reg size=
"1" name=
"TCCR3A" offset=
"0x90" text=
"Timer/Counter3 Control Register A" icon=
"io_flag.bmp">
779 <bitfield name=
"COM3A" mask=
"0xC0" text=
"Compare Output Mode 1A, bits" icon=
""/>
780 <bitfield name=
"COM3B" mask=
"0x30" text=
"Compare Output Mode 3B, bits" icon=
""/>
781 <bitfield name=
"COM3C" mask=
"0x0C" text=
"Compare Output Mode 3C, bits" icon=
""/>
782 <bitfield name=
"WGM3" mask=
"0x03" text=
"Waveform Generation Mode" icon=
""/>
784 <reg size=
"1" name=
"TCCR3B" offset=
"0x91" text=
"Timer/Counter3 Control Register B" icon=
"io_flag.bmp">
785 <bitfield name=
"ICNC3" mask=
"0x80" text=
"Input Capture 3 Noise Canceler" icon=
""/>
786 <bitfield name=
"ICES3" mask=
"0x40" text=
"Input Capture 3 Edge Select" icon=
""/>
787 <bitfield name=
"WGM3" mask=
"0x18" text=
"Waveform Generation Mode" icon=
"" lsb=
"2"/>
788 <bitfield name=
"CS3" mask=
"0x07" text=
"Prescaler source of Timer/Counter 3" icon=
"" enum=
"CLK_SEL_3BIT_EXT"/>
790 <reg size=
"1" name=
"TCCR3C" offset=
"0x92" text=
"Timer/Counter 3 Control Register C" icon=
"io_flag.bmp">
791 <bitfield name=
"FOC3A" mask=
"0x80" text=
"Force Output Compare 3A" icon=
""/>
792 <bitfield name=
"FOC3B" mask=
"0x40" text=
"Force Output Compare 3B" icon=
""/>
793 <bitfield name=
"FOC3C" mask=
"0x20" text=
"Force Output Compare 3C" icon=
""/>
795 <reg size=
"2" name=
"TCNT3" offset=
"0x94" text=
"Timer/Counter3 Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
796 <reg size=
"2" name=
"OCR3A" offset=
"0x98" text=
"Timer/Counter3 Outbut Compare Register A Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
797 <reg size=
"2" name=
"OCR3B" offset=
"0x9A" text=
"Timer/Counter3 Output Compare Register B Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
798 <reg size=
"2" name=
"OCR3C" offset=
"0x9C" text=
"Timer/Counter3 Output Compare Register B Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
799 <reg size=
"2" name=
"ICR3" offset=
"0x96" text=
"Timer/Counter3 Input Capture Register Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
800 <reg size=
"1" name=
"TIMSK3" offset=
"0x71" text=
"Timer/Counter3 Interrupt Mask Register" icon=
"io_flag.bmp">
801 <bitfield name=
"ICIE3" mask=
"0x20" text=
"Timer/Counter3 Input Capture Interrupt Enable" icon=
""/>
802 <bitfield name=
"OCIE3C" mask=
"0x08" text=
"Timer/Counter3 Output Compare C Match Interrupt Enable" icon=
""/>
803 <bitfield name=
"OCIE3B" mask=
"0x04" text=
"Timer/Counter3 Output Compare B Match Interrupt Enable" icon=
""/>
804 <bitfield name=
"OCIE3A" mask=
"0x02" text=
"Timer/Counter3 Output Compare A Match Interrupt Enable" icon=
""/>
805 <bitfield name=
"TOIE3" mask=
"0x01" text=
"Timer/Counter3 Overflow Interrupt Enable" icon=
""/>
807 <reg size=
"1" name=
"TIFR3" offset=
"0x38" text=
"Timer/Counter3 Interrupt Flag register" icon=
"io_flag.bmp">
808 <bitfield name=
"ICF3" mask=
"0x20" text=
"Input Capture Flag 3" icon=
""/>
809 <bitfield name=
"OCF3C" mask=
"0x08" text=
"Output Compare Flag 3C" icon=
""/>
810 <bitfield name=
"OCF3B" mask=
"0x04" text=
"Output Compare Flag 3B" icon=
""/>
811 <bitfield name=
"OCF3A" mask=
"0x02" text=
"Output Compare Flag 3A" icon=
""/>
812 <bitfield name=
"TOV3" mask=
"0x01" text=
"Timer/Counter3 Overflow Flag" icon=
""/>
816 <module class=
"TIMER_COUNTER_1">
817 <registers name=
"TIMER_COUNTER_1" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
818 <reg size=
"1" name=
"TCCR1A" offset=
"0x80" text=
"Timer/Counter1 Control Register A" icon=
"io_flag.bmp">
819 <bitfield name=
"COM1A" mask=
"0xC0" text=
"Compare Output Mode 1A, bits" icon=
""/>
820 <bitfield name=
"COM1B" mask=
"0x30" text=
"Compare Output Mode 1B, bits" icon=
""/>
821 <bitfield name=
"COM1C" mask=
"0x0C" text=
"Compare Output Mode 1C, bits" icon=
""/>
822 <bitfield name=
"WGM1" mask=
"0x03" text=
"Waveform Generation Mode" icon=
""/>
824 <reg size=
"1" name=
"TCCR1B" offset=
"0x81" text=
"Timer/Counter1 Control Register B" icon=
"io_flag.bmp">
825 <bitfield name=
"ICNC1" mask=
"0x80" text=
"Input Capture 1 Noise Canceler" icon=
""/>
826 <bitfield name=
"ICES1" mask=
"0x40" text=
"Input Capture 1 Edge Select" icon=
""/>
827 <bitfield name=
"WGM1" mask=
"0x18" text=
"Waveform Generation Mode" icon=
"" lsb=
"2"/>
828 <bitfield name=
"CS1" mask=
"0x07" text=
"Prescaler source of Timer/Counter 1" icon=
"" enum=
"CLK_SEL_3BIT_EXT"/>
830 <reg size=
"1" name=
"TCCR1C" offset=
"0x82" text=
"Timer/Counter 1 Control Register C" icon=
"io_flag.bmp">
831 <bitfield name=
"FOC1A" mask=
"0x80" text=
"Force Output Compare 1A" icon=
""/>
832 <bitfield name=
"FOC1B" mask=
"0x40" text=
"Force Output Compare 1B" icon=
""/>
833 <bitfield name=
"FOC1C" mask=
"0x20" text=
"Force Output Compare 1C" icon=
""/>
835 <reg size=
"2" name=
"TCNT1" offset=
"0x84" text=
"Timer/Counter1 Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
836 <reg size=
"2" name=
"OCR1A" offset=
"0x88" text=
"Timer/Counter1 Outbut Compare Register A Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
837 <reg size=
"2" name=
"OCR1B" offset=
"0x8A" text=
"Timer/Counter1 Output Compare Register B Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
838 <reg size=
"2" name=
"OCR1C" offset=
"0x8C" text=
"Timer/Counter1 Output Compare Register C Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
839 <reg size=
"2" name=
"ICR1" offset=
"0x86" text=
"Timer/Counter1 Input Capture Register Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
840 <reg size=
"1" name=
"TIMSK1" offset=
"0x6F" text=
"Timer/Counter1 Interrupt Mask Register" icon=
"io_flag.bmp">
841 <bitfield name=
"ICIE1" mask=
"0x20" text=
"Timer/Counter1 Input Capture Interrupt Enable" icon=
""/>
842 <bitfield name=
"OCIE1C" mask=
"0x08" text=
"Timer/Counter1 Output Compare C Match Interrupt Enable" icon=
""/>
843 <bitfield name=
"OCIE1B" mask=
"0x04" text=
"Timer/Counter1 Output Compare B Match Interrupt Enable" icon=
""/>
844 <bitfield name=
"OCIE1A" mask=
"0x02" text=
"Timer/Counter1 Output Compare A Match Interrupt Enable" icon=
""/>
845 <bitfield name=
"TOIE1" mask=
"0x01" text=
"Timer/Counter1 Overflow Interrupt Enable" icon=
""/>
847 <reg size=
"1" name=
"TIFR1" offset=
"0x36" text=
"Timer/Counter1 Interrupt Flag register" icon=
"io_flag.bmp">
848 <bitfield name=
"ICF1" mask=
"0x20" text=
"Input Capture Flag 1" icon=
""/>
849 <bitfield name=
"OCF1C" mask=
"0x08" text=
"Output Compare Flag 1C" icon=
""/>
850 <bitfield name=
"OCF1B" mask=
"0x04" text=
"Output Compare Flag 1B" icon=
""/>
851 <bitfield name=
"OCF1A" mask=
"0x02" text=
"Output Compare Flag 1A" icon=
""/>
852 <bitfield name=
"TOV1" mask=
"0x01" text=
"Timer/Counter1 Overflow Flag" icon=
""/>
856 <module class=
"JTAG">
857 <registers name=
"JTAG" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
858 <reg size=
"1" name=
"OCDR" offset=
"0x51" text=
"On-Chip Debug Related Register in I/O Memory" icon=
"io_com.bmp" mask=
"0xFF"/>
859 <reg size=
"1" name=
"MCUCR" offset=
"0x55" text=
"MCU Control Register" icon=
"io_flag.bmp">
860 <bitfield name=
"JTD" mask=
"0x80" text=
"JTAG Interface Disable" icon=
""/>
862 <reg size=
"1" name=
"MCUSR" offset=
"0x54" text=
"MCU Status Register" icon=
"io_flag.bmp">
863 <bitfield name=
"JTRF" mask=
"0x10" text=
"JTAG Reset Flag" icon=
""/>
867 <module class=
"EXTERNAL_INTERRUPT">
868 <registers name=
"EXTERNAL_INTERRUPT" memspace=
"DATAMEM" text=
"" icon=
"io_ext.bmp">
869 <reg size=
"1" name=
"EICRA" offset=
"0x69" text=
"External Interrupt Control Register A" icon=
"io_flag.bmp">
870 <bitfield name=
"ISC3" mask=
"0xC0" text=
"External Interrupt Sense Control Bit" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL"/>
871 <bitfield name=
"ISC2" mask=
"0x30" text=
"External Interrupt Sense Control Bit" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL"/>
872 <bitfield name=
"ISC1" mask=
"0x0C" text=
"External Interrupt Sense Control Bit" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL"/>
873 <bitfield name=
"ISC0" mask=
"0x03" text=
"External Interrupt Sense Control Bit" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL"/>
875 <reg size=
"1" name=
"EICRB" offset=
"0x6A" text=
"External Interrupt Control Register B" icon=
"io_flag.bmp">
876 <bitfield name=
"ISC7" mask=
"0xC0" text=
"External Interrupt 7-4 Sense Control Bit" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL"/>
877 <bitfield name=
"ISC6" mask=
"0x30" text=
"External Interrupt 7-4 Sense Control Bit" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL"/>
878 <bitfield name=
"ISC5" mask=
"0x0C" text=
"External Interrupt 7-4 Sense Control Bit" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL"/>
879 <bitfield name=
"ISC4" mask=
"0x03" text=
"External Interrupt 7-4 Sense Control Bit" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL"/>
881 <reg size=
"1" name=
"EIMSK" offset=
"0x3D" text=
"External Interrupt Mask Register" icon=
"io_flag.bmp">
882 <bitfield name=
"INT" mask=
"0xFF" text=
"External Interrupt Request 7 Enable" icon=
""/>
884 <reg size=
"1" name=
"EIFR" offset=
"0x3C" text=
"External Interrupt Flag Register" icon=
"io_flag.bmp">
885 <bitfield name=
"INTF" mask=
"0xFF" text=
"External Interrupt Flags" icon=
""/>
887 <reg size=
"1" name=
"PCMSK2" offset=
"0x6D" text=
"Pin Change Mask Register 2" icon=
"io_flag.bmp" mask=
"0xFF"/>
888 <reg size=
"1" name=
"PCMSK1" offset=
"0x6C" text=
"Pin Change Mask Register 1" icon=
"io_flag.bmp" mask=
"0xFF"/>
889 <reg size=
"1" name=
"PCMSK0" offset=
"0x6B" text=
"Pin Change Mask Register 0" icon=
"io_flag.bmp" mask=
"0xFF"/>
890 <reg size=
"1" name=
"PCIFR" offset=
"0x3B" text=
"Pin Change Interrupt Flag Register" icon=
"io_flag.bmp">
891 <bitfield name=
"PCIF" mask=
"0x07" text=
"Pin Change Interrupt Flags" icon=
""/>
893 <reg size=
"1" name=
"PCICR" offset=
"0x68" text=
"Pin Change Interrupt Control Register" icon=
"io_flag.bmp">
894 <bitfield name=
"PCIE" mask=
"0x07" text=
"Pin Change Interrupt Enables" icon=
""/>
899 <registers name=
"CPU" memspace=
"DATAMEM" text=
"" icon=
"io_cpu.bmp">
900 <reg size=
"1" name=
"SREG" offset=
"0x5F" text=
"Status Register" icon=
"io_sreg.bmp">
901 <bitfield name=
"I" mask=
"0x80" text=
"Global Interrupt Enable" icon=
""/>
902 <bitfield name=
"T" mask=
"0x40" text=
"Bit Copy Storage" icon=
""/>
903 <bitfield name=
"H" mask=
"0x20" text=
"Half Carry Flag" icon=
""/>
904 <bitfield name=
"S" mask=
"0x10" text=
"Sign Bit" icon=
""/>
905 <bitfield name=
"V" mask=
"0x08" text=
"Two's Complement Overflow Flag" icon=
""/>
906 <bitfield name=
"N" mask=
"0x04" text=
"Negative Flag" icon=
""/>
907 <bitfield name=
"Z" mask=
"0x02" text=
"Zero Flag" icon=
""/>
908 <bitfield name=
"C" mask=
"0x01" text=
"Carry Flag" icon=
""/>
910 <reg size=
"2" name=
"SP" offset=
"0x5D" text=
"Stack Pointer " icon=
"io_sph.bmp" mask=
"0xFFFF"/>
911 <reg size=
"1" name=
"MCUCR" offset=
"0x55" text=
"MCU Control Register" icon=
"io_flag.bmp">
912 <bitfield name=
"JTD" mask=
"0x80" text=
"JTAG Interface Disable" icon=
""/>
913 <bitfield name=
"PUD" mask=
"0x10" text=
"Pull-up disable" icon=
""/>
914 <bitfield name=
"IVSEL" mask=
"0x02" text=
"Interrupt Vector Select" icon=
""/>
915 <bitfield name=
"IVCE" mask=
"0x01" text=
"Interrupt Vector Change Enable" icon=
""/>
917 <reg size=
"1" name=
"MCUSR" offset=
"0x54" text=
"MCU Status Register" icon=
"io_flag.bmp">
918 <bitfield name=
"JTRF" mask=
"0x10" text=
"JTAG Reset Flag" icon=
""/>
919 <bitfield name=
"WDRF" mask=
"0x08" text=
"Watchdog Reset Flag" icon=
""/>
920 <bitfield name=
"BORF" mask=
"0x04" text=
"Brown-out Reset Flag" icon=
""/>
921 <bitfield name=
"EXTRF" mask=
"0x02" text=
"External Reset Flag" icon=
""/>
922 <bitfield name=
"PORF" mask=
"0x01" text=
"Power-on reset flag" icon=
""/>
924 <reg size=
"1" name=
"XMCRA" offset=
"0x74" text=
"External Memory Control Register A" icon=
"io_cpu.bmp">
925 <bitfield name=
"SRE" mask=
"0x80" text=
"External SRAM Enable" icon=
""/>
926 <bitfield name=
"SRL" mask=
"0x70" text=
"Wait state page limit" icon=
"" enum=
"CPU_SECTOR_LIMITS2"/>
927 <bitfield name=
"SRW1" mask=
"0x0C" text=
"Wait state select bit upper page" icon=
"" enum=
"CPU_WAIT_STATES"/>
928 <bitfield name=
"SRW0" mask=
"0x03" text=
"Wait state select bit lower page" icon=
"" enum=
"CPU_WAIT_STATES"/>
930 <reg size=
"1" name=
"XMCRB" offset=
"0x75" text=
"External Memory Control Register B" icon=
"io_cpu.bmp">
931 <bitfield name=
"XMBK" mask=
"0x80" text=
"External Memory Bus Keeper Enable" icon=
""/>
932 <bitfield name=
"XMM" mask=
"0x07" text=
"External Memory High Mask" icon=
""/>
934 <reg size=
"1" name=
"OSCCAL" offset=
"0x66" text=
"Oscillator Calibration Value" icon=
"io_cpu.bmp" mask=
"0xFF"/>
935 <reg size=
"1" name=
"CLKPR" offset=
"0x61" text=
"" icon=
"io_cpu.bmp">
936 <bitfield name=
"CLKPCE" mask=
"0x80" text=
"" icon=
""/>
937 <bitfield name=
"CLKPS" mask=
"0x0F" text=
"" icon=
"" enum=
"CPU_CLK_PRESCALE_4_BITS_SMALL"/>
939 <reg size=
"1" name=
"SMCR" offset=
"0x53" text=
"Sleep Mode Control Register" icon=
"io_cpu.bmp">
940 <bitfield name=
"SM" mask=
"0x0E" text=
"Sleep Mode Select bits" icon=
"" enum=
"CPU_SLEEP_MODE_3BITS"/>
941 <bitfield name=
"SE" mask=
"0x01" text=
"Sleep Enable" icon=
""/>
943 <reg size=
"1" name=
"EIND" offset=
"0x5C" text=
"Extended Indirect Register" icon=
"io_cpu.bmp" mask=
"0x01"/>
944 <reg size=
"1" name=
"RAMPZ" offset=
"0x5B" text=
"RAM Page Z Select Register" icon=
"io_cpu.bmp" mask=
"0x03"/>
945 <reg size=
"1" name=
"GPIOR2" offset=
"0x4B" text=
"General Purpose IO Register 2" icon=
"io_cpu.bmp">
946 <bitfield name=
"GPIOR" mask=
"0xFF" text=
"General Purpose IO Register 2 bis" icon=
"" lsb=
"20"/>
948 <reg size=
"1" name=
"GPIOR1" offset=
"0x4A" text=
"General Purpose IO Register 1" icon=
"io_cpu.bmp">
949 <bitfield name=
"GPIOR" mask=
"0xFF" text=
"General Purpose IO Register 1 bis" icon=
"" lsb=
"10"/>
951 <reg size=
"1" name=
"GPIOR0" offset=
"0x3E" text=
"General Purpose IO Register 0" icon=
"io_cpu.bmp">
952 <bitfield name=
"GPIOR07" mask=
"0x80" text=
"General Purpose IO Register 0 bit 7" icon=
""/>
953 <bitfield name=
"GPIOR06" mask=
"0x40" text=
"General Purpose IO Register 0 bit 6" icon=
""/>
954 <bitfield name=
"GPIOR05" mask=
"0x20" text=
"General Purpose IO Register 0 bit 5" icon=
""/>
955 <bitfield name=
"GPIOR04" mask=
"0x10" text=
"General Purpose IO Register 0 bit 4" icon=
""/>
956 <bitfield name=
"GPIOR03" mask=
"0x08" text=
"General Purpose IO Register 0 bit 3" icon=
""/>
957 <bitfield name=
"GPIOR02" mask=
"0x04" text=
"General Purpose IO Register 0 bit 2" icon=
""/>
958 <bitfield name=
"GPIOR01" mask=
"0x02" text=
"General Purpose IO Register 0 bit 1" icon=
""/>
959 <bitfield name=
"GPIOR00" mask=
"0x01" text=
"General Purpose IO Register 0 bit 0" icon=
""/>
961 <reg size=
"1" name=
"PRR1" offset=
"0x65" text=
"Power Reduction Register1" icon=
"io_cpu.bmp">
962 <bitfield name=
"PRTIM5" mask=
"0x20" text=
"Power Reduction Timer/Counter5" icon=
""/>
963 <bitfield name=
"PRTIM4" mask=
"0x10" text=
"Power Reduction Timer/Counter4" icon=
""/>
964 <bitfield name=
"PRTIM3" mask=
"0x08" text=
"Power Reduction Timer/Counter3" icon=
""/>
965 <bitfield name=
"PRUSART" mask=
"0x07" text=
"Power Reduction USART3" icon=
"" lsb=
"1"/>
967 <reg size=
"1" name=
"PRR0" offset=
"0x64" text=
"Power Reduction Register0" icon=
"io_cpu.bmp">
968 <bitfield name=
"PRTWI" mask=
"0x80" text=
"Power Reduction TWI" icon=
""/>
969 <bitfield name=
"PRTIM2" mask=
"0x40" text=
"Power Reduction Timer/Counter2" icon=
""/>
970 <bitfield name=
"PRTIM0" mask=
"0x20" text=
"Power Reduction Timer/Counter0" icon=
""/>
971 <bitfield name=
"PRTIM1" mask=
"0x08" text=
"Power Reduction Timer/Counter1" icon=
""/>
972 <bitfield name=
"PRSPI" mask=
"0x04" text=
"Power Reduction Serial Peripheral Interface" icon=
""/>
973 <bitfield name=
"PRUSART0" mask=
"0x02" text=
"Power Reduction USART" icon=
""/>
974 <bitfield name=
"PRADC" mask=
"0x01" text=
"Power Reduction ADC" icon=
""/>
978 <module class=
"AD_CONVERTER">
979 <registers name=
"AD_CONVERTER" memspace=
"DATAMEM" text=
"" icon=
"io_analo.bmp">
980 <reg size=
"1" name=
"ADMUX" offset=
"0x7C" text=
"The ADC multiplexer Selection Register" icon=
"io_analo.bmp">
981 <bitfield name=
"REFS" mask=
"0xC0" text=
"Reference Selection Bits" icon=
"" enum=
"ANALOG_ADC_V_REF6"/>
982 <bitfield name=
"ADLAR" mask=
"0x20" text=
"Left Adjust Result" icon=
""/>
983 <bitfield name=
"MUX" mask=
"0x1F" text=
"Analog Channel and Gain Selection Bits" icon=
""/>
985 <reg size=
"2" name=
"ADC" offset=
"0x78" text=
"ADC Data Register Bytes" icon=
"io_analo.bmp" mask=
"0xFFFF"/>
986 <reg size=
"1" name=
"ADCSRA" offset=
"0x7A" text=
"The ADC Control and Status register A" icon=
"io_flag.bmp">
987 <bitfield name=
"ADEN" mask=
"0x80" text=
"ADC Enable" icon=
""/>
988 <bitfield name=
"ADSC" mask=
"0x40" text=
"ADC Start Conversion" icon=
""/>
989 <bitfield name=
"ADATE" mask=
"0x20" text=
"ADC Auto Trigger Enable" icon=
""/>
990 <bitfield name=
"ADIF" mask=
"0x10" text=
"ADC Interrupt Flag" icon=
""/>
991 <bitfield name=
"ADIE" mask=
"0x08" text=
"ADC Interrupt Enable" icon=
""/>
992 <bitfield name=
"ADPS" mask=
"0x07" text=
"ADC Prescaler Select Bits" icon=
"" enum=
"ANALIG_ADC_PRESCALER"/>
994 <reg size=
"1" name=
"ADCSRB" offset=
"0x7B" text=
"The ADC Control and Status register B" icon=
"io_flag.bmp">
995 <bitfield name=
"ACME" mask=
"0x40" text=
"" icon=
""/>
996 <bitfield name=
"MUX5" mask=
"0x08" text=
"Analog Channel and Gain Selection Bits" icon=
""/>
997 <bitfield name=
"ADTS" mask=
"0x07" text=
"ADC Auto Trigger Source bits" icon=
"" enum=
"ANALIG_ADC_AUTO_TRIGGER"/>
999 <reg size=
"1" name=
"DIDR2" offset=
"0x7D" text=
"Digital Input Disable Register" icon=
"io_analo.bmp">
1000 <bitfield name=
"ADC15D" mask=
"0x80" text=
"" icon=
""/>
1001 <bitfield name=
"ADC14D" mask=
"0x40" text=
"" icon=
""/>
1002 <bitfield name=
"ADC13D" mask=
"0x20" text=
"" icon=
""/>
1003 <bitfield name=
"ADC12D" mask=
"0x10" text=
"" icon=
""/>
1004 <bitfield name=
"ADC11D" mask=
"0x08" text=
"" icon=
""/>
1005 <bitfield name=
"ADC10D" mask=
"0x04" text=
"" icon=
""/>
1006 <bitfield name=
"ADC9D" mask=
"0x02" text=
"" icon=
""/>
1007 <bitfield name=
"ADC8D" mask=
"0x01" text=
"" icon=
""/>
1009 <reg size=
"1" name=
"DIDR0" offset=
"0x7E" text=
"Digital Input Disable Register" icon=
"io_analo.bmp">
1010 <bitfield name=
"ADC7D" mask=
"0x80" text=
"" icon=
""/>
1011 <bitfield name=
"ADC6D" mask=
"0x40" text=
"" icon=
""/>
1012 <bitfield name=
"ADC5D" mask=
"0x20" text=
"" icon=
""/>
1013 <bitfield name=
"ADC4D" mask=
"0x10" text=
"" icon=
""/>
1014 <bitfield name=
"ADC3D" mask=
"0x08" text=
"" icon=
""/>
1015 <bitfield name=
"ADC2D" mask=
"0x04" text=
"" icon=
""/>
1016 <bitfield name=
"ADC1D" mask=
"0x02" text=
"" icon=
""/>
1017 <bitfield name=
"ADC0D" mask=
"0x01" text=
"" icon=
""/>
1021 <module class=
"BOOT_LOAD">
1022 <registers name=
"BOOT_LOAD" memspace=
"DATAMEM" text=
"" icon=
"io_cpu.bmp">
1023 <reg size=
"1" name=
"SPMCSR" offset=
"0x57" text=
"Store Program Memory Control Register" icon=
"io_flag.bmp">
1024 <bitfield name=
"SPMIE" mask=
"0x80" text=
"SPM Interrupt Enable" icon=
""/>
1025 <bitfield name=
"RWWSB" mask=
"0x40" text=
"Read While Write Section Busy" icon=
""/>
1026 <bitfield name=
"SIGRD" mask=
"0x20" text=
"Signature Row Read" icon=
""/>
1027 <bitfield name=
"RWWSRE" mask=
"0x10" text=
"Read While Write section read enable" icon=
""/>
1028 <bitfield name=
"BLBSET" mask=
"0x08" text=
"Boot Lock Bit Set" icon=
""/>
1029 <bitfield name=
"PGWRT" mask=
"0x04" text=
"Page Write" icon=
""/>
1030 <bitfield name=
"PGERS" mask=
"0x02" text=
"Page Erase" icon=
""/>
1031 <bitfield name=
"SPMEN" mask=
"0x01" text=
"Store Program Memory Enable" icon=
""/>
1035 <module class=
"USART2">
1036 <registers name=
"USART2" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
1037 <reg size=
"1" name=
"UDR2" offset=
"0xD6" text=
"USART I/O Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
1038 <reg size=
"1" name=
"UCSR2A" offset=
"0xD0" text=
"USART Control and Status Register A" icon=
"io_flag.bmp">
1039 <bitfield name=
"RXC2" mask=
"0x80" text=
"USART Receive Complete" icon=
""/>
1040 <bitfield name=
"TXC2" mask=
"0x40" text=
"USART Transmitt Complete" icon=
""/>
1041 <bitfield name=
"UDRE2" mask=
"0x20" text=
"USART Data Register Empty" icon=
""/>
1042 <bitfield name=
"FE2" mask=
"0x10" text=
"Framing Error" icon=
""/>
1043 <bitfield name=
"DOR2" mask=
"0x08" text=
"Data overRun" icon=
""/>
1044 <bitfield name=
"UPE2" mask=
"0x04" text=
"Parity Error" icon=
""/>
1045 <bitfield name=
"U2X2" mask=
"0x02" text=
"Double the USART transmission speed" icon=
""/>
1046 <bitfield name=
"MPCM2" mask=
"0x01" text=
"Multi-processor Communication Mode" icon=
""/>
1048 <reg size=
"1" name=
"UCSR2B" offset=
"0xD1" text=
"USART Control and Status Register B" icon=
"io_flag.bmp">
1049 <bitfield name=
"RXCIE2" mask=
"0x80" text=
"RX Complete Interrupt Enable" icon=
""/>
1050 <bitfield name=
"TXCIE2" mask=
"0x40" text=
"TX Complete Interrupt Enable" icon=
""/>
1051 <bitfield name=
"UDRIE2" mask=
"0x20" text=
"USART Data register Empty Interrupt Enable" icon=
""/>
1052 <bitfield name=
"RXEN2" mask=
"0x10" text=
"Receiver Enable" icon=
""/>
1053 <bitfield name=
"TXEN2" mask=
"0x08" text=
"Transmitter Enable" icon=
""/>
1054 <bitfield name=
"UCSZ22" mask=
"0x04" text=
"Character Size" icon=
""/>
1055 <bitfield name=
"RXB82" mask=
"0x02" text=
"Receive Data Bit 8" icon=
""/>
1056 <bitfield name=
"TXB82" mask=
"0x01" text=
"Transmit Data Bit 8" icon=
""/>
1058 <reg size=
"1" name=
"UCSR2C" offset=
"0xD2" text=
"USART Control and Status Register C" icon=
"io_flag.bmp">
1059 <bitfield name=
"UMSEL2" mask=
"0xC0" text=
"USART Mode Select" icon=
"" enum=
"COMM_USART_MODE_2BIT"/>
1060 <bitfield name=
"UPM2" mask=
"0x30" text=
"Parity Mode Bits" icon=
"" enum=
"COMM_UPM_PARITY_MODE"/>
1061 <bitfield name=
"USBS2" mask=
"0x08" text=
"Stop Bit Select" icon=
"" enum=
"COMM_STOP_BIT_SEL"/>
1062 <bitfield name=
"UCSZ2" mask=
"0x06" text=
"Character Size" icon=
""/>
1063 <bitfield name=
"UCPOL2" mask=
"0x01" text=
"Clock Polarity" icon=
""/>
1065 <reg size=
"2" name=
"UBRR2" offset=
"0xD4" text=
"USART Baud Rate Register Bytes" icon=
"io_com.bmp" mask=
"0x0FFF"/>
1068 <module class=
"USART3">
1069 <registers name=
"USART3" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
1070 <reg size=
"1" name=
"UDR3" offset=
"0x136" text=
"USART I/O Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
1071 <reg size=
"1" name=
"UCSR3A" offset=
"0x130" text=
"USART Control and Status Register A" icon=
"io_flag.bmp">
1072 <bitfield name=
"RXC3" mask=
"0x80" text=
"USART Receive Complete" icon=
""/>
1073 <bitfield name=
"TXC3" mask=
"0x40" text=
"USART Transmitt Complete" icon=
""/>
1074 <bitfield name=
"UDRE3" mask=
"0x20" text=
"USART Data Register Empty" icon=
""/>
1075 <bitfield name=
"FE3" mask=
"0x10" text=
"Framing Error" icon=
""/>
1076 <bitfield name=
"DOR3" mask=
"0x08" text=
"Data overRun" icon=
""/>
1077 <bitfield name=
"UPE3" mask=
"0x04" text=
"Parity Error" icon=
""/>
1078 <bitfield name=
"U2X3" mask=
"0x02" text=
"Double the USART transmission speed" icon=
""/>
1079 <bitfield name=
"MPCM3" mask=
"0x01" text=
"Multi-processor Communication Mode" icon=
""/>
1081 <reg size=
"1" name=
"UCSR3B" offset=
"0x131" text=
"USART Control and Status Register B" icon=
"io_flag.bmp">
1082 <bitfield name=
"RXCIE3" mask=
"0x80" text=
"RX Complete Interrupt Enable" icon=
""/>
1083 <bitfield name=
"TXCIE3" mask=
"0x40" text=
"TX Complete Interrupt Enable" icon=
""/>
1084 <bitfield name=
"UDRIE3" mask=
"0x20" text=
"USART Data register Empty Interrupt Enable" icon=
""/>
1085 <bitfield name=
"RXEN3" mask=
"0x10" text=
"Receiver Enable" icon=
""/>
1086 <bitfield name=
"TXEN3" mask=
"0x08" text=
"Transmitter Enable" icon=
""/>
1087 <bitfield name=
"UCSZ32" mask=
"0x04" text=
"Character Size" icon=
""/>
1088 <bitfield name=
"RXB83" mask=
"0x02" text=
"Receive Data Bit 8" icon=
""/>
1089 <bitfield name=
"TXB83" mask=
"0x01" text=
"Transmit Data Bit 8" icon=
""/>
1091 <reg size=
"1" name=
"UCSR3C" offset=
"0x132" text=
"USART Control and Status Register C" icon=
"io_flag.bmp">
1092 <bitfield name=
"UMSEL3" mask=
"0xC0" text=
"USART Mode Select" icon=
"" enum=
"COMM_USART_MODE_2BIT"/>
1093 <bitfield name=
"UPM3" mask=
"0x30" text=
"Parity Mode Bits" icon=
"" enum=
"COMM_UPM_PARITY_MODE"/>
1094 <bitfield name=
"USBS3" mask=
"0x08" text=
"Stop Bit Select" icon=
"" enum=
"COMM_STOP_BIT_SEL"/>
1095 <bitfield name=
"UCSZ3" mask=
"0x06" text=
"Character Size" icon=
""/>
1096 <bitfield name=
"UCPOL3" mask=
"0x01" text=
"Clock Polarity" icon=
""/>
1098 <reg size=
"2" name=
"UBRR3" offset=
"0x134" text=
"USART Baud Rate Register Bytes" icon=
"io_com.bmp" mask=
"0x0FFF"/>