2 <!DOCTYPE device SYSTEM
"device.dtd">
5 <interrupt vector=
"1" address=
"$000" name=
"RESET">External Reset, Power-on Reset and Watchdog Reset
</interrupt>
6 <interrupt vector=
"2" address=
"$001" name=
"INT0">External Interrupt Request
0</interrupt>
7 <interrupt vector=
"3" address=
"$002" name=
"INT1">External Interrupt Request
1</interrupt>
8 <interrupt vector=
"4" address=
"$003" name=
"TIMER1 CAPT">Timer/Counter1 Capture Event
</interrupt>
9 <interrupt vector=
"5" address=
"$004" name=
"TIMER1 COMPA">Timer/Counter1 Compare Match A
</interrupt>
10 <interrupt vector=
"6" address=
"$005" name=
"TIMER1 OVF">Timer/Counter1 Overflow
</interrupt>
11 <interrupt vector=
"7" address=
"$006" name=
"TIMER0 OVF">Timer/Counter0 Overflow
</interrupt>
12 <interrupt vector=
"8" address=
"$007" name=
"USART, RX">USART, Rx Complete
</interrupt>
13 <interrupt vector=
"9" address=
"$008" name=
"USART, UDRE">USART Data Register Empty
</interrupt>
14 <interrupt vector=
"10" address=
"$009" name=
"USART, TX">USART, Tx Complete
</interrupt>
15 <interrupt vector=
"11" address=
"$00A" name=
"ANA COMP">Analog Comparator
</interrupt>
16 <interrupt vector=
"12" address=
"$00B" name=
"PCINT"/>
17 <interrupt vector=
"13" address=
"$00C" name=
"TIMER1 COMPB"/>
18 <interrupt vector=
"14" address=
"$00D" name=
"TIMER0 COMPA"/>
19 <interrupt vector=
"15" address=
"$00E" name=
"TIMER0 COMPB"/>
20 <interrupt vector=
"16" address=
"$00F" name=
"USI START">USI Start Condition
</interrupt>
21 <interrupt vector=
"17" address=
"$010" name=
"USI OVERFLOW">USI Overflow
</interrupt>
22 <interrupt vector=
"18" address=
"$11" name=
"EEPROM Ready"/>
23 <interrupt vector=
"19" address=
"$012" name=
"WDT OVERFLOW">Watchdog Timer Overflow
</interrupt>
28 <iospace start=
"$20" stop=
"$5F"/>
33 <ioreg name=
"UCSRB" address=
"$0A"/>
34 <ioreg name=
"UCSRA" address=
"$0B"/>
35 <ioreg name=
"DIDR" address=
"$01"/>
36 <ioreg name=
"UBRRH" address=
"$02"/>
37 <ioreg name=
"UCSRC" address=
"$03"/>
38 <ioreg name=
"ACSR" address=
"$08"/>
39 <ioreg name=
"UBRRL" address=
"$09"/>
40 <ioreg name=
"UDR" address=
"$0C"/>
41 <ioreg name=
"USICR" address=
"$0D"/>
42 <ioreg name=
"USISR" address=
"$0E"/>
43 <ioreg name=
"USIDR" address=
"$0F"/>
44 <ioreg name=
"PIND" address=
"$10"/>
45 <ioreg name=
"DDRD" address=
"$11"/>
46 <ioreg name=
"PORTD" address=
"$12"/>
47 <ioreg name=
"GPIOR0" address=
"$13"/>
48 <ioreg name=
"GPIOR1" address=
"$14"/>
49 <ioreg name=
"GPIOR2" address=
"$15"/>
50 <ioreg name=
"PINB" address=
"$16"/>
51 <ioreg name=
"DDRB" address=
"$17"/>
52 <ioreg name=
"PORTB" address=
"$18"/>
53 <ioreg name=
"PINA" address=
"$19"/>
54 <ioreg name=
"DDRA" address=
"$1A"/>
55 <ioreg name=
"PORTA" address=
"$1B"/>
56 <ioreg name=
"EECR" address=
"$1C"/>
57 <ioreg name=
"EEDR" address=
"$1D"/>
58 <ioreg name=
"EEAR" address=
"$1E"/>
59 <ioreg name=
"PCMSK" address=
"$20"/>
60 <ioreg name=
"WDTCR" address=
"$21"/>
61 <ioreg name=
"TCCR1C" address=
"$22"/>
62 <ioreg name=
"GTCCR" address=
"$23"/>
63 <ioreg name=
"ICR1L" address=
"$24"/>
64 <ioreg name=
"ICR1H" address=
"$25"/>
65 <ioreg name=
"CLKPR" address=
"$26"/>
66 <ioreg name=
"OCR1BL" address=
"$28"/>
67 <ioreg name=
"OCR1BH" address=
"$29"/>
68 <ioreg name=
"OCR1AL" address=
"$2A"/>
69 <ioreg name=
"OCR1AH" address=
"$2B"/>
70 <ioreg name=
"TCNT1L" address=
"$2C"/>
71 <ioreg name=
"TCNT1H" address=
"$2D"/>
72 <ioreg name=
"TCCR1B" address=
"$2E"/>
73 <ioreg name=
"TCCR1A" address=
"$2F"/>
74 <ioreg name=
"TCCR0A" address=
"$30"/>
75 <ioreg name=
"OSCCAL" address=
"$31"/>
76 <ioreg name=
"TCNT0" address=
"$32"/>
77 <ioreg name=
"TCCR0B" address=
"$33"/>
78 <ioreg name=
"MCUSR" address=
"$34"/>
79 <ioreg name=
"MCUCR" address=
"$35"/>
80 <ioreg name=
"OCR0A" address=
"$36"/>
81 <ioreg name=
"SPMCSR" address=
"$37"/>
82 <ioreg name=
"TIFR" address=
"$38"/>
83 <ioreg name=
"TIMSK" address=
"$39"/>
84 <ioreg name=
"EIFR" address=
"$3A"/>
85 <ioreg name=
"GIMSK" address=
"$3B"/>
86 <ioreg name=
"OCR0B" address=
"$3C"/>
87 <ioreg name=
"SPL" address=
"$3D"/>
88 <ioreg name=
"SREG" address=
"$3F"/>
91 <!--Everything after this needs editing!!!-->
93 <registers name=
"FUSE" memspace=
"FUSE">
94 <reg size=
"1" name=
"EXTENDED" offset=
"0x02">
95 <bitfield name=
"SELFPRGEN" mask=
"0x01" text=
"Self programming enable" icon=
""/>
97 <reg size=
"1" name=
"HIGH" offset=
"0x01">
98 <bitfield name=
"DWEN" mask=
"0x80" text=
"Debug Wire enable" icon=
""/>
99 <bitfield name=
"EESAVE" mask=
"0x40" text=
"Preserve EEPROM memory through the Chip Erase cycle" icon=
""/>
100 <bitfield name=
"SPIEN" mask=
"0x20" text=
"Serial program downloading (SPI) enable" icon=
""/>
101 <bitfield name=
"WDTON" mask=
"0x10" text=
"Watch-dog Timer always on" icon=
""/>
102 <bitfield name=
"BODLEVEL" mask=
"0x0E" text=
"Brown-out Detector trigger level" icon=
"" enum=
"ENUM_EESAVE_BODLEVEL"/>
103 <bitfield name=
"RSTDISBL" mask=
"0x01" text=
"External reset disable" icon=
""/>
105 <reg size=
"1" name=
"LOW" offset=
"0x00">
106 <bitfield name=
"CKDIV8" mask=
"0x80" text=
"Divide clock by 8 internally" icon=
""/>
107 <bitfield name=
"CKOUT" mask=
"0x40" text=
"Clock output on PORTD2" icon=
""/>
108 <bitfield name=
"SUT_CKSEL" mask=
"0x3F" text=
"Select Clock Source" icon=
"" enum=
"ENUM_SUT_CKSEL"/>
112 <module class=
"LOCKBIT">
113 <registers name=
"LOCKBIT" memspace=
"LOCKBIT">
114 <reg size=
"1" name=
"LOCKBIT" offset=
"0x00">
115 <bitfield name=
"LB" mask=
"0x03" text=
"Memory Lock" icon=
"" enum=
"ENUM_LB"/>
119 <module class=
"PORTB">
120 <registers name=
"PORTB" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
121 <reg size=
"1" name=
"PORTB" offset=
"0x38" text=
"Port B Data Register" icon=
"io_port.bmp" mask=
"0xFF"/>
122 <reg size=
"1" name=
"DDRB" offset=
"0x37" text=
"Port B Data Direction Register" icon=
"io_flag.bmp" mask=
"0xFF"/>
123 <reg size=
"1" name=
"PINB" offset=
"0x36" text=
"Port B Input Pins" icon=
"io_port.bmp" mask=
"0xFF"/>
126 <module class=
"TIMER_COUNTER_0">
127 <registers name=
"TIMER_COUNTER_0" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
128 <reg size=
"1" name=
"TIMSK" offset=
"0x59" text=
"Timer/Counter Interrupt Mask Register" icon=
"io_flag.bmp">
129 <bitfield name=
"OCIE0B" mask=
"0x04" text=
"Timer/Counter0 Output Compare Match B Interrupt Enable" icon=
""/>
130 <bitfield name=
"TOIE0" mask=
"0x02" text=
"Timer/Counter0 Overflow Interrupt Enable" icon=
""/>
131 <bitfield name=
"OCIE0A" mask=
"0x01" text=
"Timer/Counter0 Output Compare Match A Interrupt Enable" icon=
""/>
133 <reg size=
"1" name=
"TIFR" offset=
"0x58" text=
"Timer/Counter Interrupt Flag register" icon=
"io_flag.bmp">
134 <bitfield name=
"OCF0B" mask=
"0x04" text=
"Timer/Counter0 Output Compare Flag 0B" icon=
""/>
135 <bitfield name=
"TOV0" mask=
"0x02" text=
"Timer/Counter0 Overflow Flag" icon=
""/>
136 <bitfield name=
"OCF0A" mask=
"0x01" text=
"Timer/Counter0 Output Compare Flag 0A" icon=
""/>
138 <reg size=
"1" name=
"OCR0B" offset=
"0x5C" text=
"Timer/Counter0 Output Compare Register" icon=
"io_timer.bmp" mask=
"0xFF"/>
139 <reg size=
"1" name=
"OCR0A" offset=
"0x56" text=
"Timer/Counter0 Output Compare Register" icon=
"io_timer.bmp" mask=
"0xFF"/>
140 <reg size=
"1" name=
"TCCR0A" offset=
"0x50" text=
"Timer/Counter Control Register A" icon=
"io_flag.bmp">
141 <bitfield name=
"COM0A" mask=
"0xC0" text=
"Compare Match Output A Mode" icon=
""/>
142 <bitfield name=
"COM0B" mask=
"0x30" text=
"Compare Match Output B Mode" icon=
""/>
143 <bitfield name=
"WGM0" mask=
"0x03" text=
"Waveform Generation Mode" icon=
""/>
145 <reg size=
"1" name=
"TCNT0" offset=
"0x52" text=
"Timer/Counter0" icon=
"io_timer.bmp" mask=
"0xFF"/>
146 <reg size=
"1" name=
"TCCR0B" offset=
"0x53" text=
"Timer/Counter Control Register B" icon=
"io_flag.bmp">
147 <bitfield name=
"FOC0A" mask=
"0x80" text=
"Force Output Compare B" icon=
""/>
148 <bitfield name=
"FOC0B" mask=
"0x40" text=
"Force Output Compare B" icon=
""/>
149 <bitfield name=
"WGM02" mask=
"0x08" text=
"" icon=
""/>
150 <bitfield name=
"CS0" mask=
"0x07" text=
"Clock Select" icon=
"" enum=
"CLK_SEL_3BIT_EXT"/>
154 <module class=
"TIMER_COUNTER_1">
155 <registers name=
"TIMER_COUNTER_1" memspace=
"DATAMEM" text=
"" icon=
"io_timer.bmp">
156 <reg size=
"1" name=
"TIMSK" offset=
"0x59" text=
"Timer/Counter Interrupt Mask Register" icon=
"io_flag.bmp">
157 <bitfield name=
"TOIE1" mask=
"0x80" text=
"Timer/Counter1 Overflow Interrupt Enable" icon=
""/>
158 <bitfield name=
"OCIE1A" mask=
"0x40" text=
"Timer/Counter1 Output CompareA Match Interrupt Enable" icon=
""/>
159 <bitfield name=
"OCIE1B" mask=
"0x20" text=
"Timer/Counter1 Output CompareB Match Interrupt Enable" icon=
""/>
160 <bitfield name=
"ICIE1" mask=
"0x08" text=
"Timer/Counter1 Input Capture Interrupt Enable" icon=
""/>
162 <reg size=
"1" name=
"TIFR" offset=
"0x58" text=
"Timer/Counter Interrupt Flag register" icon=
"io_flag.bmp">
163 <bitfield name=
"TOV1" mask=
"0x80" text=
"Timer/Counter1 Overflow Flag" icon=
""/>
164 <bitfield name=
"OCF1A" mask=
"0x40" text=
"Output Compare Flag 1A" icon=
""/>
165 <bitfield name=
"OCF1B" mask=
"0x20" text=
"Output Compare Flag 1B" icon=
""/>
166 <bitfield name=
"ICF1" mask=
"0x08" text=
"Input Capture Flag 1" icon=
""/>
168 <reg size=
"1" name=
"TCCR1A" offset=
"0x4F" text=
"Timer/Counter1 Control Register A" icon=
"io_flag.bmp">
169 <bitfield name=
"COM1A" mask=
"0xC0" text=
"Compare Output Mode 1A, bits" icon=
""/>
170 <bitfield name=
"COM1B" mask=
"0x30" text=
"Compare Output Mode 1B, bits" icon=
""/>
171 <bitfield name=
"WGM1" mask=
"0x03" text=
"Pulse Width Modulator Select Bits" icon=
""/>
173 <reg size=
"1" name=
"TCCR1B" offset=
"0x4E" text=
"Timer/Counter1 Control Register B" icon=
"io_flag.bmp">
174 <bitfield name=
"ICNC1" mask=
"0x80" text=
"Input Capture 1 Noise Canceler" icon=
""/>
175 <bitfield name=
"ICES1" mask=
"0x40" text=
"Input Capture 1 Edge Select" icon=
""/>
176 <bitfield name=
"WGM1" mask=
"0x18" text=
"Waveform Generation Mode Bits" icon=
"" lsb=
"2"/>
177 <bitfield name=
"CS1" mask=
"0x07" text=
"Clock Select1 bits" icon=
"" enum=
"CLK_SEL_3BIT_EXT"/>
179 <reg size=
"1" name=
"TCCR1C" offset=
"0x42" text=
"Timer/Counter1 Control Register C" icon=
"io_flag.bmp">
180 <bitfield name=
"FOC1A" mask=
"0x80" text=
"Force Output Compare for Channel A" icon=
""/>
181 <bitfield name=
"FOC1B" mask=
"0x40" text=
"Force Output Compare for Channel B" icon=
""/>
183 <reg size=
"2" name=
"TCNT1" offset=
"0x4C" text=
"Timer/Counter1 Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
184 <reg size=
"2" name=
"OCR1A" offset=
"0x4A" text=
"Timer/Counter1 Outbut Compare Register Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
185 <reg size=
"2" name=
"OCR1B" offset=
"0x48" text=
"Timer/Counter1 Outbut Compare Register Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
186 <reg size=
"2" name=
"ICR1" offset=
"0x44" text=
"Timer/Counter1 Input Capture Register Bytes" icon=
"io_timer.bmp" mask=
"0xFFFF"/>
189 <module class=
"WATCHDOG">
190 <registers name=
"WATCHDOG" memspace=
"DATAMEM" text=
"" icon=
"io_watch.bmp">
191 <reg size=
"1" name=
"WDTCR" offset=
"0x41" text=
"Watchdog Timer Control Register" icon=
"io_flag.bmp">
192 <bitfield name=
"WDIF" mask=
"0x80" text=
"Watchdog Timeout Interrupt Flag" icon=
""/>
193 <bitfield name=
"WDIE" mask=
"0x40" text=
"Watchdog Timeout Interrupt Enable" icon=
""/>
194 <bitfield name=
"WDP" mask=
"0x27" text=
"Watchdog Timer Prescaler Bits" icon=
"" enum=
"WDOG_TIMER_PRESCALE_4BITS"/>
195 <bitfield name=
"WDCE" mask=
"0x10" text=
"Watchdog Change Enable" icon=
""/>
196 <bitfield name=
"WDE" mask=
"0x08" text=
"Watch Dog Enable" icon=
""/>
200 <module class=
"EXTERNAL_INTERRUPT">
201 <registers name=
"EXTERNAL_INTERRUPT" memspace=
"DATAMEM" text=
"" icon=
"io_ext.bmp">
202 <reg size=
"1" name=
"GIMSK" offset=
"0x5B" text=
"General Interrupt Mask Register" icon=
"io_flag.bmp">
203 <bitfield name=
"INT" mask=
"0xC0" text=
"External Interrupt Request 1 Enable" icon=
""/>
204 <bitfield name=
"PCIE" mask=
"0x20" text=
"" icon=
""/>
206 <reg size=
"1" name=
"EIFR" offset=
"0x5A" text=
"Extended Interrupt Flag Register" icon=
"io_flag.bmp">
207 <bitfield name=
"INTF" mask=
"0xC0" text=
"External Interrupt Flags" icon=
""/>
208 <bitfield name=
"PCIF" mask=
"0x20" text=
"" icon=
""/>
212 <module class=
"USART">
213 <registers name=
"USART" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
214 <reg size=
"1" name=
"UDR" offset=
"0x2C" text=
"USART I/O Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
215 <reg size=
"1" name=
"UCSRA" offset=
"0x02B" text=
"USART Control and Status Register A" icon=
"io_flag.bmp">
216 <bitfield name=
"RXC" mask=
"0x80" text=
"USART Receive Complete" icon=
""/>
217 <bitfield name=
"TXC" mask=
"0x40" text=
"USART Transmitt Complete" icon=
""/>
218 <bitfield name=
"UDRE" mask=
"0x20" text=
"USART Data Register Empty" icon=
""/>
219 <bitfield name=
"FE" mask=
"0x10" text=
"Framing Error" icon=
""/>
220 <bitfield name=
"DOR" mask=
"0x08" text=
"Data overRun" icon=
""/>
221 <bitfield name=
"UPE" mask=
"0x04" text=
"USART Parity Error" icon=
""/>
222 <bitfield name=
"U2X" mask=
"0x02" text=
"Double the USART Transmission Speed" icon=
""/>
223 <bitfield name=
"MPCM" mask=
"0x01" text=
"Multi-processor Communication Mode" icon=
""/>
225 <reg size=
"1" name=
"UCSRB" offset=
"0x02A" text=
"USART Control and Status Register B" icon=
"io_flag.bmp">
226 <bitfield name=
"RXCIE" mask=
"0x80" text=
"RX Complete Interrupt Enable" icon=
""/>
227 <bitfield name=
"TXCIE" mask=
"0x40" text=
"TX Complete Interrupt Enable" icon=
""/>
228 <bitfield name=
"UDRIE" mask=
"0x20" text=
"USART Data register Empty Interrupt Enable" icon=
""/>
229 <bitfield name=
"RXEN" mask=
"0x10" text=
"Receiver Enable" icon=
""/>
230 <bitfield name=
"TXEN" mask=
"0x08" text=
"Transmitter Enable" icon=
""/>
231 <bitfield name=
"UCSZ2" mask=
"0x04" text=
"Character Size" icon=
""/>
232 <bitfield name=
"RXB8" mask=
"0x02" text=
"Receive Data Bit 8" icon=
""/>
233 <bitfield name=
"TXB8" mask=
"0x01" text=
"Transmit Data Bit 8" icon=
""/>
235 <reg size=
"1" name=
"UCSRC" offset=
"0x23" text=
"USART Control and Status Register C" icon=
"io_flag.bmp">
236 <bitfield name=
"UMSEL" mask=
"0x40" text=
"USART Mode Select" icon=
"" enum=
"COMM_USART_MODE"/>
237 <bitfield name=
"UPM" mask=
"0x30" text=
"Parity Mode Bits" icon=
"" enum=
"COMM_UPM_PARITY_MODE"/>
238 <bitfield name=
"USBS" mask=
"0x08" text=
"Stop Bit Select" icon=
"" enum=
"COMM_STOP_BIT_SEL"/>
239 <bitfield name=
"UCSZ" mask=
"0x06" text=
"Character Size Bits" icon=
""/>
240 <bitfield name=
"UCPOL" mask=
"0x01" text=
"Clock Polarity" icon=
""/>
242 <reg size=
"1" name=
"UBRRH" offset=
"0x22" text=
"USART Baud Rate Register High Byte" icon=
"io_com.bmp" mask=
"0x0F"/>
243 <reg size=
"1" name=
"UBRRL" offset=
"0x29" text=
"USART Baud Rate Register Low Byte" icon=
"io_com.bmp" mask=
"0xFF"/>
246 <module class=
"ANALOG_COMPARATOR">
247 <registers name=
"ANALOG_COMPARATOR" memspace=
"DATAMEM" text=
"" icon=
"io_analo.bmp">
248 <reg size=
"1" name=
"ACSR" offset=
"0x28" text=
"Analog Comparator Control And Status Register" icon=
"io_analo.bmp">
249 <bitfield name=
"ACD" mask=
"0x80" text=
"Analog Comparator Disable" icon=
""/>
250 <bitfield name=
"ACBG" mask=
"0x40" text=
"Analog Comparator Bandgap Select" icon=
""/>
251 <bitfield name=
"ACO" mask=
"0x20" text=
"Analog Compare Output" icon=
""/>
252 <bitfield name=
"ACI" mask=
"0x10" text=
"Analog Comparator Interrupt Flag" icon=
""/>
253 <bitfield name=
"ACIE" mask=
"0x08" text=
"Analog Comparator Interrupt Enable" icon=
""/>
254 <bitfield name=
"ACIC" mask=
"0x04" text=
"" icon=
""/>
255 <bitfield name=
"ACIS" mask=
"0x03" text=
"Analog Comparator Interrupt Mode Select bits" icon=
"" enum=
"ANALOG_COMP_INTERRUPT"/>
257 <reg size=
"1" name=
"DIDR" offset=
"0x21" text=
"Digital Input Disable Register 1" icon=
"io_analo.bmp" mask=
"0x03"/>
260 <module class=
"PORTD">
261 <registers name=
"PORTD" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
262 <reg size=
"1" name=
"PORTD" offset=
"0x32" text=
"Data Register, Port D" icon=
"io_port.bmp" mask=
"0x7F"/>
263 <reg size=
"1" name=
"DDRD" offset=
"0x31" text=
"Data Direction Register, Port D" icon=
"io_flag.bmp" mask=
"0x7F"/>
264 <reg size=
"1" name=
"PIND" offset=
"0x30" text=
"Input Pins, Port D" icon=
"io_port.bmp" mask=
"0x7F"/>
267 <module class=
"EEPROM">
268 <registers name=
"EEPROM" memspace=
"DATAMEM" text=
"" icon=
"io_cpu.bmp">
269 <reg size=
"1" name=
"EEAR" offset=
"0x3E" text=
"EEPROM Read/Write Access" icon=
"io_cpu.bmp" mask=
"0x7F"/>
270 <reg size=
"1" name=
"EEDR" offset=
"0x3D" text=
"EEPROM Data Register" icon=
"io_cpu.bmp" mask=
"0xFF"/>
271 <reg size=
"1" name=
"EECR" offset=
"0x3C" text=
"EEPROM Control Register" icon=
"io_flag.bmp">
272 <bitfield name=
"EEPM" mask=
"0x30" text=
"" icon=
"" enum=
"EEP_MODE"/>
273 <bitfield name=
"EERIE" mask=
"0x08" text=
"EEProm Ready Interrupt Enable" icon=
""/>
274 <bitfield name=
"EEMPE" mask=
"0x04" text=
"EEPROM Master Write Enable" icon=
""/>
275 <bitfield name=
"EEPE" mask=
"0x02" text=
"EEPROM Write Enable" icon=
""/>
276 <bitfield name=
"EERE" mask=
"0x01" text=
"EEPROM Read Enable" icon=
""/>
280 <module class=
"PORTA">
281 <registers name=
"PORTA" memspace=
"DATAMEM" text=
"" icon=
"io_port.bmp">
282 <reg size=
"1" name=
"PORTA" offset=
"0x3B" text=
"Port A Data Register" icon=
"io_port.bmp" mask=
"0x07"/>
283 <reg size=
"1" name=
"DDRA" offset=
"0x3A" text=
"Port A Data Direction Register" icon=
"io_flag.bmp" mask=
"0x07"/>
284 <reg size=
"1" name=
"PINA" offset=
"0x39" text=
"Port A Input Pins" icon=
"io_port.bmp" mask=
"0x07"/>
288 <registers name=
"CPU" memspace=
"DATAMEM" text=
"" icon=
"io_cpu.bmp">
289 <reg size=
"1" name=
"SREG" offset=
"0x5F" text=
"Status Register" icon=
"io_sreg.bmp">
290 <bitfield name=
"I" mask=
"0x80" text=
"Global Interrupt Enable" icon=
""/>
291 <bitfield name=
"T" mask=
"0x40" text=
"Bit Copy Storage" icon=
""/>
292 <bitfield name=
"H" mask=
"0x20" text=
"Half Carry Flag" icon=
""/>
293 <bitfield name=
"S" mask=
"0x10" text=
"Sign Bit" icon=
""/>
294 <bitfield name=
"V" mask=
"0x08" text=
"Two's Complement Overflow Flag" icon=
""/>
295 <bitfield name=
"N" mask=
"0x04" text=
"Negative Flag" icon=
""/>
296 <bitfield name=
"Z" mask=
"0x02" text=
"Zero Flag" icon=
""/>
297 <bitfield name=
"C" mask=
"0x01" text=
"Carry Flag" icon=
""/>
299 <reg size=
"1" name=
"SPL" offset=
"0x5D" text=
"Stack Pointer Low Byte" icon=
"io_sreg.bmp" mask=
"0xFF"/>
300 <reg size=
"1" name=
"SPMCSR" offset=
"0x57" text=
"Store Program Memory Control and Status register" icon=
"io_sreg.bmp">
301 <bitfield name=
"CTPB" mask=
"0x10" text=
"Clear Temporary Page Buffer" icon=
""/>
302 <bitfield name=
"RFLB" mask=
"0x08" text=
"Read Fuse and Lock Bits" icon=
""/>
303 <bitfield name=
"PGWRT" mask=
"0x04" text=
"Page Write" icon=
""/>
304 <bitfield name=
"PGERS" mask=
"0x02" text=
"Page Erase" icon=
""/>
305 <bitfield name=
"SPMEN" mask=
"0x01" text=
"Store Program Memory Enable" icon=
""/>
307 <reg size=
"1" name=
"MCUCR" offset=
"0x55" text=
"MCU Control Register" icon=
"io_cpu.bmp">
308 <bitfield name=
"PUD" mask=
"0x80" text=
"Pull-up Disable" icon=
""/>
309 <bitfield name=
"SM" mask=
"0x50" text=
"Sleep Mode Select Bits" icon=
"" enum=
"CPU_SLEEP_MODE3"/>
310 <bitfield name=
"SE" mask=
"0x20" text=
"Sleep Enable" icon=
""/>
311 <bitfield name=
"ISC1" mask=
"0x0C" text=
"Interrupt Sense Control 1 bits" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL2"/>
312 <bitfield name=
"ISC0" mask=
"0x03" text=
"Interrupt Sense Control 0 bits" icon=
"" enum=
"INTERRUPT_SENSE_CONTROL2"/>
314 <reg size=
"1" name=
"MCUSR" offset=
"0x54" text=
"MCU Status register" icon=
"io_cpu.bmp">
315 <bitfield name=
"WDRF" mask=
"0x08" text=
"Watchdog Reset Flag" icon=
""/>
316 <bitfield name=
"BORF" mask=
"0x04" text=
"Brown-out Reset Flag" icon=
""/>
317 <bitfield name=
"EXTRF" mask=
"0x02" text=
"External Reset Flag" icon=
""/>
318 <bitfield name=
"PORF" mask=
"0x01" text=
"Power-On Reset Flag" icon=
""/>
320 <reg size=
"1" name=
"OSCCAL" offset=
"0x51" text=
"Oscillator Calibration Register" icon=
"io_sreg.bmp" mask=
"0x7F"/>
321 <reg size=
"1" name=
"CLKPR" offset=
"0x46" text=
"Clock Prescale Register" icon=
"io_cpu.bmp">
322 <bitfield name=
"CLKPCE" mask=
"0x80" text=
"Clock Prescaler Change Enable" icon=
""/>
323 <bitfield name=
"CLKPS" mask=
"0x0F" text=
"Clock Prescaler Select Bits" icon=
"" enum=
"CPU_CLK_PRESCALE_4_BITS_SMALL"/>
325 <reg size=
"1" name=
"GTCCR" offset=
"0x43" text=
"General Timer Counter Control Register" icon=
"io_sreg.bmp">
326 <bitfield name=
"PSR10" mask=
"0x01" text=
"" icon=
""/>
328 <reg size=
"1" name=
"PCMSK" offset=
"0x40" text=
"Pin-Change Mask register" icon=
"io_sreg.bmp" mask=
"0xFF"/>
329 <reg size=
"1" name=
"GPIOR2" offset=
"0x35" text=
"General Purpose I/O Register 2" icon=
"io_sreg.bmp" mask=
"0xFF"/>
330 <reg size=
"1" name=
"GPIOR1" offset=
"0x34" text=
"General Purpose I/O Register 1" icon=
"io_sreg.bmp" mask=
"0xFF"/>
331 <reg size=
"1" name=
"GPIOR0" offset=
"0x33" text=
"General Purpose I/O Register 0" icon=
"io_sreg.bmp" mask=
"0xFF"/>
335 <registers name=
"USI" memspace=
"DATAMEM" text=
"" icon=
"io_com.bmp">
336 <reg size=
"1" name=
"USIDR" offset=
"0x2F" text=
"USI Data Register" icon=
"io_com.bmp" mask=
"0xFF"/>
337 <reg size=
"1" name=
"USISR" offset=
"0x2E" text=
"USI Status Register" icon=
"io_flag.bmp">
338 <bitfield name=
"USISIF" mask=
"0x80" text=
"Start Condition Interrupt Flag" icon=
""/>
339 <bitfield name=
"USIOIF" mask=
"0x40" text=
"Counter Overflow Interrupt Flag" icon=
""/>
340 <bitfield name=
"USIPF" mask=
"0x20" text=
"Stop Condition Flag" icon=
""/>
341 <bitfield name=
"USIDC" mask=
"0x10" text=
"Data Output Collision" icon=
""/>
342 <bitfield name=
"USICNT" mask=
"0x0F" text=
"USI Counter Value Bits" icon=
""/>
344 <reg size=
"1" name=
"USICR" offset=
"0x2D" text=
"USI Control Register" icon=
"io_flag.bmp">
345 <bitfield name=
"USISIE" mask=
"0x80" text=
"Start Condition Interrupt Enable" icon=
""/>
346 <bitfield name=
"USIOIE" mask=
"0x40" text=
"Counter Overflow Interrupt Enable" icon=
""/>
347 <bitfield name=
"USIWM" mask=
"0x30" text=
"USI Wire Mode Bits" icon=
"" enum=
"COMM_USI_OP"/>
348 <bitfield name=
"USICS" mask=
"0x0C" text=
"USI Clock Source Select Bits" icon=
""/>
349 <bitfield name=
"USICLK" mask=
"0x02" text=
"Clock Strobe" icon=
""/>
350 <bitfield name=
"USITC" mask=
"0x01" text=
"Toggle Clock Port Pin" icon=
""/>