devices/at90usb162

   1 <?xml version="1.0"?>
   2 <!DOCTYPE device SYSTEM "device.dtd">
   3 <device>
   4   <interrupts num="38">
   5     <interrupt vector="1" address="$000" name="RESET">External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     </interrupt>
   6     <interrupt vector="2" address="$002" name="INT0">External Interrupt Request 0</interrupt>
   7     <interrupt vector="3" address="$004" name="INT1">External Interrupt Request 1</interrupt>
   8     <interrupt vector="4" address="$006" name="INT2">External Interrupt Request 2</interrupt>
   9     <interrupt vector="5" address="$008" name="INT3">External Interrupt Request 3</interrupt>
  10     <interrupt vector="6" address="$00A" name="INT4">External Interrupt Request 4</interrupt>
  11     <interrupt vector="7" address="$00C" name="INT5">External Interrupt Request 5</interrupt>
  12     <interrupt vector="8" address="$00E" name="INT6">External Interrupt Request 6</interrupt>
  13     <interrupt vector="9" address="$010" name="INT7">External Interrupt Request 7</interrupt>
  14     <interrupt vector="10" address="$012" name="PCINT0">Pin Change Interrupt Request 0</interrupt>
  15     <interrupt vector="11" address="$014" name="PCINT1">Pin Change Interrupt Request 1</interrupt>
  16     <interrupt vector="12" address="$016" name="USB_GEN">USB General Interrupt Request</interrupt>
  17     <interrupt vector="13" address="$018" name="USB_COM">USB Endpoint/Pipe Interrupt Communication Request</interrupt>
  18     <interrupt vector="14" address="$01A" name="WDT">Watchdog Time-out Interrupt</interrupt>
  19     <interrupt vector="15" address="$01C" name="TIMER1_CAPT">Timer/Counter2 Capture Event</interrupt>
  20     <interrupt vector="16" address="$01E" name="TIMER1_COMPA">Timer/Counter2 Compare Match B</interrupt>
  21     <interrupt vector="17" address="$20" name="TIMER1_COMPB">Timer/Counter2 Compare Match B</interrupt>
  22     <interrupt vector="18" address="$22" name="TIMER1_COMPC">Timer/Counter2 Compare Match C</interrupt>
  23     <interrupt vector="19" address="$24" name="TIMER1_OVF">Timer/Counter1 Overflow</interrupt>
  24     <interrupt vector="20" address="$026" name="TIMER0_COMPA">Timer/Counter0 Compare Match A</interrupt>
  25     <interrupt vector="21" address="$028" name="TIMER0_COMPB">Timer/Counter0 Compare Match B</interrupt>
  26     <interrupt vector="22" address="$02A" name="TIMER0_OVF">Timer/Counter0 Overflow</interrupt>
  27     <interrupt vector="23" address="$02C" name="SPI, STC">SPI Serial Transfer Complete</interrupt>
  28     <interrupt vector="24" address="$02E" name="USART1, RX">USART1, Rx Complete</interrupt>
  29     <interrupt vector="25" address="$030" name="USART1, UDRE">USART1 Data register Empty</interrupt>
  30     <interrupt vector="26" address="$032" name="USART1, TX">USART1, Tx Complete</interrupt>
  31     <interrupt vector="27" address="$034" name="ANALOG_COMP">Analog Comparator</interrupt>
  32     <interrupt vector="28" address="$036" name="EE_READY">EEPROM Ready</interrupt>
  33     <interrupt vector="29" address="$038" name="SPM_READY">Store Program Memory Read</interrupt>
  34   </interrupts>
  35   <memory>
  36     <flash size="16384"/>
  37     <iospace start="$20" stop="$FF"/>
  38     <sram size="512"/>
  39     <eram size="0"/>
  40   </memory>
  41   <ioregisters>
  42     <ioreg name="UPERRX" address=""/>
  43     <ioreg name="PINB" address="$03"/>
  44     <ioreg name="DDRB" address="$04"/>
  45     <ioreg name="PORTB" address="$05"/>
  46     <ioreg name="PINC" address="$06"/>
  47     <ioreg name="DDRC" address="$07"/>
  48     <ioreg name="PORTC" address="$08"/>
  49     <ioreg name="PIND" address="$09"/>
  50     <ioreg name="DDRD" address="$0A"/>
  51     <ioreg name="PORTD" address="$0B"/>
  52     <ioreg name="PINE" address="$0C"/>
  53     <ioreg name="DDRE" address="$0D"/>
  54     <ioreg name="PORTE" address="$0E"/>
  55     <ioreg name="PINF" address="$0F"/>
  56     <ioreg name="DDRF" address="$10"/>
  57     <ioreg name="PORTF" address="$11"/>
  58     <ioreg name="TIFR0" address="$15"/>
  59     <ioreg name="TIFR1" address="$16"/>
  60     <ioreg name="TIFR2" address="$17"/>
  61     <ioreg name="TIFR3" address="$18"/>
  62     <ioreg name="TIFR4" address="$19"/>
  63     <ioreg name="TIFR5" address="$1A"/>
  64     <ioreg name="PCIFR" address="$1B"/>
  65     <ioreg name="EIFR" address="$1C"/>
  66     <ioreg name="EIMSK" address="$1D"/>
  67     <ioreg name="GPIOR0" address="$1E"/>
  68     <ioreg name="EECR" address="$1F"/>
  69     <ioreg name="EEDR" address="$20"/>
  70     <ioreg name="EEARL" address="$21"/>
  71     <ioreg name="EEARH" address="$22"/>
  72     <ioreg name="GTCCR" address="$23"/>
  73     <ioreg name="TCCR0A" address="$24"/>
  74     <ioreg name="TCCR0B" address="$25"/>
  75     <ioreg name="TCNT0" address="$26"/>
  76     <ioreg name="OCR0A" address="$27"/>
  77     <ioreg name="OCR0B" address="$28"/>
  78     <ioreg name="PLLCSR" address="$29"/>
  79     <ioreg name="GPIOR1" address="$2A"/>
  80     <ioreg name="GPIOR2" address="$2B"/>
  81     <ioreg name="SPCR" address="$2C"/>
  82     <ioreg name="SPSR" address="$2D"/>
  83     <ioreg name="SPDR" address="$2E"/>
  84     <ioreg name="ACSR" address="$30"/>
  85     <ioreg name="DWDR" address="$31"/>
  86     <ioreg name="OCDR" address="$31"/>
  87     <ioreg name="SMCR" address="$33"/>
  88     <ioreg name="MCUSR" address="$34"/>
  89     <ioreg name="MCUCR" address="$35"/>
  90     <ioreg name="SPMCSR" address="$37"/>
  91     <ioreg name="RAMPZ" address="$3B"/>
  92     <ioreg name="EIND" address="$3C"/>
  93     <ioreg name="SPL" address="$3D"/>
  94     <ioreg name="SPH" address="$3E"/>
  95     <ioreg name="SREG" address="$3F"/>
  96     <ioreg name="WDTCSR" address="$60"/>
  97     <ioreg name="CLKPR" address="$61"/>
  98     <ioreg name="WDTCKD" address="$62"/>
  99     <ioreg name="REGCR" address="$63"/>
 100     <ioreg name="PRR0" address="$64"/>
 101     <ioreg name="PRR1" address="$65"/>
 102     <ioreg name="OSCCAL" address="$66"/>
 103     <ioreg name="PCICR" address="$68"/>
 104     <ioreg name="EICRA" address="$69"/>
 105     <ioreg name="EICRB" address="$6A"/>
 106     <ioreg name="PCMSK0" address="$6B"/>
 107     <ioreg name="PCMSK1" address="$6C"/>
 108     <ioreg name="TIMSK0" address="$6E"/>
 109     <ioreg name="TIMSK1" address="$6F"/>
 110     <ioreg name="TIMSK2" address="$70"/>
 111     <ioreg name="TIMSK3" address="$71"/>
 112     <ioreg name="TIMSK4" address="$72"/>
 113     <ioreg name="TIMSK5" address="$73"/>
 114     <ioreg name="XMCRA" address="$74"/>
 115     <ioreg name="XMCRB" address="$75"/>
 116     <ioreg name="DIDR1" address="$7F"/>
 117     <ioreg name="TCCR1A" address="$80"/>
 118     <ioreg name="TCCR1B" address="$81"/>
 119     <ioreg name="TCCR1C" address="$82"/>
 120     <ioreg name="TCNT1L" address="$84"/>
 121     <ioreg name="TCNT1H" address="$85"/>
 122     <ioreg name="ICR1L" address="$86"/>
 123     <ioreg name="ICR1H" address="$87"/>
 124     <ioreg name="OCR1AL" address="$88"/>
 125     <ioreg name="OCR1AH" address="$89"/>
 126     <ioreg name="OCR1BL" address="$8A"/>
 127     <ioreg name="OCR1BH" address="$8B"/>
 128     <ioreg name="OCR1CL" address="$8C"/>
 129     <ioreg name="OCR1CH" address="$8D"/>
 130     <ioreg name="TCCR3A" address="$90"/>
 131     <ioreg name="TCCR3B" address="$91"/>
 132     <ioreg name="TCCR3C" address="$92"/>
 133     <ioreg name="TCNT3L" address="$94"/>
 134     <ioreg name="TCNT3H" address="$95"/>
 135     <ioreg name="ICR3L" address="$96"/>
 136     <ioreg name="ICR3H" address="$97"/>
 137     <ioreg name="OCR3AL" address="$98"/>
 138     <ioreg name="OCR3AH" address="$99"/>
 139     <ioreg name="OCR3BL" address="$9A"/>
 140     <ioreg name="OCR3BH" address="$9B"/>
 141     <ioreg name="OCR3CL" address="$9C"/>
 142     <ioreg name="OCR3CH" address="$9D"/>
 143     <ioreg name="UHCON" address="$9E"/>
 144     <ioreg name="UHINT" address="$9F"/>
 145     <ioreg name="UHIEN" address="$A0"/>
 146     <ioreg name="UHFNUML" address="$A2"/>
 147     <ioreg name="UHFNUMH" address="$A3"/>
 148     <ioreg name="UHFLEN" address="$A4"/>
 149     <ioreg name="UPINRQX" address="$A5"/>
 150     <ioreg name="UPINTX" address="$A6"/>
 151     <ioreg name="UPNUM" address="$A7"/>
 152     <ioreg name="UPRST" address="$A8"/>
 153     <ioreg name="UPCONX" address="$A9"/>
 154     <ioreg name="UPCFG0X" address="$AA"/>
 155     <ioreg name="UPCFG1X" address="$AB"/>
 156     <ioreg name="UPSTAX" address="$AC"/>
 157     <ioreg name="UPCFG2X" address="$AD"/>
 158     <ioreg name="UPIENX" address="$AE"/>
 159     <ioreg name="UPDATX" address="$AF"/>
 160     <ioreg name="TCCR2A" address="$B0"/>
 161     <ioreg name="TCCR2B" address="$B1"/>
 162     <ioreg name="TCNT2" address="$B2"/>
 163     <ioreg name="OCR2A" address="$B3"/>
 164     <ioreg name="OCR2B" address="$B4"/>
 165     <ioreg name="ASSR" address="$B6"/>
 166     <ioreg name="UCSR1A" address="$C8"/>
 167     <ioreg name="UCSR1B" address="$C9"/>
 168     <ioreg name="UCSR1C" address="$CA"/>
 169     <ioreg name="UCSR1D" address="$CB"/>
 170     <ioreg name="UBRR1L" address="$CC"/>
 171     <ioreg name="UBRR1H" address="$CD"/>
 172     <ioreg name="UDR1" address="$CE"/>
 173     <ioreg name="CLKSEL0" address="$D0"/>
 174     <ioreg name="CLKSEL1" address="$D1"/>
 175     <ioreg name="CLKSTA" address="$D2"/>
 176     <ioreg name="USBCON" address="$D8"/>
 177     <ioreg name="USBINT" address="$DA"/>
 178     <ioreg name="UDCON" address="$E0"/>
 179     <ioreg name="UDINT" address="$E1"/>
 180     <ioreg name="UDIEN" address="$E2"/>
 181     <ioreg name="UDFNUML" address="$E4"/>
 182     <ioreg name="UDFNUMH" address="$E5"/>
 183     <ioreg name="UDMFN" address="$E6"/>
 184     <ioreg name="UDTST" address="$E7"/>
 185     <ioreg name="UEINTX" address="$E8"/>
 186     <ioreg name="UENUM" address="$E9"/>
 187     <ioreg name="UERST" address="$EA"/>
 188     <ioreg name="UECONX" address="$EB"/>
 189     <ioreg name="UECFG0X" address="$EC"/>
 190     <ioreg name="UECFG1X" address="$ED"/>
 191     <ioreg name="UESTA0X" address="$EE"/>
 192     <ioreg name="UESTA1X" address="$EF"/>
 193     <ioreg name="UEIENX" address="$F0"/>
 194     <ioreg name="UEDATX" address="$F1"/>
 195     <ioreg name="UEBCLX" address="$F2"/>
 196     <ioreg name="UEINT" address="$F4"/>
 197     <ioreg name="UPBCLX" address="$F6"/>
 198     <ioreg name="UPBCHX" address="$F7"/>
 199     <ioreg name="UPINT" address="$F8"/>
 200     <ioreg name="PS2CON" address="$FA"/>
 201     <ioreg name="UPOE" address="$FB"/>
 202     <ioreg name="TESTPADSTATUS" address="$FD"/>
 203     <ioreg name="TESTPADPULL" address="$FE"/>
 204     <ioreg name="TESTPADCTRL" address="$FF"/>
 205   </ioregisters>
 206   <hardware>
 207 <!--Everything after this needs editing!!!-->
 208     <module class="FUSE">
 209       <registers name="FUSE" memspace="FUSE">
 210           <reg size="1" name="EXTENDED" offset="0x02">
 211             <bitfield name="BODLEVEL" mask="0x07" text="Brown-out Detector trigger level" icon="" enum="ENUM_BODLEVEL"/>
 212             <bitfield name="HWBE" mask="0x08" text="Hardware Boot Enable" icon=""/>
 213           </reg>
 214           <reg size="1" name="HIGH" offset="0x01">
 215             <bitfield name="DWEN" mask="0x80" text="Debug Wire enable" icon=""/>
 216             <bitfield name="RSTDISBL" mask="0x40" text="Reset Disabled (Enable PC6 as i/o pin)" icon=""/>
 217             <bitfield name="SPIEN" mask="0x20" text="Serial program downloading (SPI) enabled" icon=""/>
 218             <bitfield name="WDTON" mask="0x10" text="Watchdog timer always on" icon=""/>
 219             <bitfield name="EESAVE" mask="0x08" text="Preserve EEPROM through the Chip Erase cycle" icon=""/>
 220             <bitfield name="BOOTSZ" mask="0x06" text="Select Boot Size" icon="" enum="ENUM_BOOTSZ"/>
 221             <bitfield name="BOOTRST" mask="0x01" text="Boot Reset vector Enabled" icon=""/>
 222           </reg>
 223           <reg size="1" name="LOW" offset="0x00">
 224             <bitfield name="CKDIV8" mask="0x80" text="Divide clock by 8 internally" icon=""/>
 225             <bitfield name="CKOUT" mask="0x40" text="Clock output on PORTC7" icon=""/>
 226             <bitfield name="SUT_CKSEL" mask="0x3F" text="Select Clock Source" icon="" enum="ENUM_SUT_CKSEL"/>
 227           </reg>
 228         </registers>
 229     </module>
 230     <module class="LOCKBIT">
 231       <registers name="LOCKBIT" memspace="LOCKBIT">
 232           <reg size="1" name="LOCKBIT" offset="0x00">
 233             <bitfield name="LB" mask="0x03" text="Memory Lock" icon="" enum="ENUM_LB"/>
 234             <bitfield name="BLB0" mask="0x0C" text="Boot Loader Protection Mode" icon="" enum="ENUM_BLB"/>
 235             <bitfield name="BLB1" mask="0x30" text="Boot Loader Protection Mode" icon="" enum="ENUM_BLB2"/>
 236           </reg>
 237         </registers>
 238     </module>
 239     <module class="PORTB">
 240       <registers name="PORTB" memspace="DATAMEM" text="" icon="io_port.bmp">
 241           <reg size="1" name="PORTB" offset="0x25" text="Port B Data Register" icon="io_port.bmp" mask="0xFF"/>
 242           <reg size="1" name="DDRB" offset="0x24" text="Port B Data Direction Register" icon="io_flag.bmp" mask="0xFF"/>
 243           <reg size="1" name="PINB" offset="0x23" text="Port B Input Pins" icon="io_port.bmp" mask="0xFF"/>
 244         </registers>
 245     </module>
 246     <module class="PORTD">
 247       <registers name="PORTD" memspace="DATAMEM" text="" icon="io_port.bmp">
 248           <reg size="1" name="PORTD" offset="0x2B" text="Port D Data Register" icon="io_port.bmp" mask="0xFF"/>
 249           <reg size="1" name="DDRD" offset="0x2A" text="Port D Data Direction Register" icon="io_flag.bmp" mask="0xFF"/>
 250           <reg size="1" name="PIND" offset="0x29" text="Port D Input Pins" icon="io_port.bmp" mask="0xFF"/>
 251         </registers>
 252     </module>
 253     <module class="SPI">
 254       <registers name="SPI" memspace="DATAMEM" text="" icon="io_com.bmp">
 255           <reg size="1" name="SPCR" offset="0x4C" text="SPI Control Register" icon="io_flag.bmp">
 256             <bitfield name="SPIE" mask="0x80" text="SPI Interrupt Enable" icon=""/>
 257             <bitfield name="SPE" mask="0x40" text="SPI Enable" icon=""/>
 258             <bitfield name="DORD" mask="0x20" text="Data Order" icon=""/>
 259             <bitfield name="MSTR" mask="0x10" text="Master/Slave Select" icon=""/>
 260             <bitfield name="CPOL" mask="0x08" text="Clock polarity" icon=""/>
 261             <bitfield name="CPHA" mask="0x04" text="Clock Phase" icon=""/>
 262             <bitfield name="SPR" mask="0x03" text="SPI Clock Rate Selects" icon="" enum="COMM_SCK_RATE_3BIT"/>
 263           </reg>
 264           <reg size="1" name="SPSR" offset="0x4D" text="SPI Status Register" icon="io_flag.bmp">
 265             <bitfield name="SPIF" mask="0x80" text="SPI Interrupt Flag" icon=""/>
 266             <bitfield name="WCOL" mask="0x40" text="Write Collision Flag" icon=""/>
 267             <bitfield name="SPI2X" mask="0x01" text="Double SPI Speed Bit" icon=""/>
 268           </reg>
 269           <reg size="1" name="SPDR" offset="0x4E" text="SPI Data Register" icon="io_com.bmp" mask="0xFF"/>
 270         </registers>
 271     </module>
 272     <module class="BOOT_LOAD">
 273       <registers name="BOOT_LOAD" memspace="DATAMEM" text="" icon="io_cpu.bmp">
 274           <reg size="1" name="SPMCSR" offset="0x57" text="Store Program Memory Control Register" icon="io_flag.bmp">
 275             <bitfield name="SPMIE" mask="0x80" text="SPM Interrupt Enable" icon=""/>
 276             <bitfield name="RWWSB" mask="0x40" text="Read While Write Section Busy" icon=""/>
 277             <bitfield name="SIGRD" mask="0x20" text="Signature Row Read" icon=""/>
 278             <bitfield name="RWWSRE" mask="0x10" text="Read While Write section read enable" icon=""/>
 279             <bitfield name="BLBSET" mask="0x08" text="Boot Lock Bit Set" icon=""/>
 280             <bitfield name="PGWRT" mask="0x04" text="Page Write" icon=""/>
 281             <bitfield name="PGERS" mask="0x02" text="Page Erase" icon=""/>
 282             <bitfield name="SPMEN" mask="0x01" text="Store Program Memory Enable" icon=""/>
 283           </reg>
 284         </registers>
 285     </module>
 286     <module class="EEPROM">
 287       <registers name="EEPROM" memspace="DATAMEM" text="" icon="io_cpu.bmp">
 288           <reg size="2" name="EEAR" offset="0x41" text="EEPROM Address Register Low Bytes" icon="io_cpu.bmp" mask="0x0FFF"/>
 289           <reg size="1" name="EEDR" offset="0x40" text="EEPROM Data Register" icon="io_cpu.bmp" mask="0xFF"/>
 290           <reg size="1" name="EECR" offset="0x3F" text="EEPROM Control Register" icon="io_flag.bmp">
 291             <bitfield name="EEPM" mask="0x30" text="EEPROM Programming Mode Bits" icon="" enum="EEP_MODE"/>
 292             <bitfield name="EERIE" mask="0x08" text="EEPROM Ready Interrupt Enable" icon=""/>
 293             <bitfield name="EEMPE" mask="0x04" text="EEPROM Master Write Enable" icon=""/>
 294             <bitfield name="EEPE" mask="0x02" text="EEPROM Write Enable" icon=""/>
 295             <bitfield name="EERE" mask="0x01" text="EEPROM Read Enable" icon=""/>
 296           </reg>
 297         </registers>
 298     </module>
 299     <module class="TIMER_COUNTER_0">
 300       <registers name="TIMER_COUNTER_0" memspace="DATAMEM" text="" icon="io_timer.bmp">
 301           <reg size="1" name="OCR0B" offset="0x48" text="Timer/Counter0 Output Compare Register" icon="io_timer.bmp" mask="0xFF"/>
 302           <reg size="1" name="OCR0A" offset="0x47" text="Timer/Counter0 Output Compare Register" icon="io_timer.bmp" mask="0xFF"/>
 303           <reg size="1" name="TCNT0" offset="0x46" text="Timer/Counter0" icon="io_timer.bmp" mask="0xFF"/>
 304           <reg size="1" name="TCCR0B" offset="0x45" text="Timer/Counter Control Register B" icon="io_flag.bmp">
 305             <bitfield name="FOC0A" mask="0x80" text="Force Output Compare A" icon=""/>
 306             <bitfield name="FOC0B" mask="0x40" text="Force Output Compare B" icon=""/>
 307             <bitfield name="WGM02" mask="0x08" text="" icon=""/>
 308             <bitfield name="CS0" mask="0x07" text="Clock Select" icon="" enum="CLK_SEL_3BIT_EXT"/>
 309           </reg>
 310           <reg size="1" name="TCCR0A" offset="0x44" text="Timer/Counter  Control Register A" icon="io_flag.bmp">
 311             <bitfield name="COM0A" mask="0xC0" text="Compare Output Mode, Phase Correct PWM Mode" icon=""/>
 312             <bitfield name="COM0B" mask="0x30" text="Compare Output Mode, Fast PWm" icon=""/>
 313             <bitfield name="WGM0" mask="0x03" text="Waveform Generation Mode" icon=""/>
 314           </reg>
 315           <reg size="1" name="TIMSK0" offset="0x6E" text="Timer/Counter0 Interrupt Mask Register" icon="io_flag.bmp">
 316             <bitfield name="OCIE0B" mask="0x04" text="Timer/Counter0 Output Compare Match B Interrupt Enable" icon=""/>
 317             <bitfield name="OCIE0A" mask="0x02" text="Timer/Counter0 Output Compare Match A Interrupt Enable" icon=""/>
 318             <bitfield name="TOIE0" mask="0x01" text="Timer/Counter0 Overflow Interrupt Enable" icon=""/>
 319           </reg>
 320           <reg size="1" name="TIFR0" offset="0x35" text="Timer/Counter0 Interrupt Flag register" icon="io_flag.bmp">
 321             <bitfield name="OCF0B" mask="0x04" text="Timer/Counter0 Output Compare Flag 0B" icon=""/>
 322             <bitfield name="OCF0A" mask="0x02" text="Timer/Counter0 Output Compare Flag 0A" icon=""/>
 323             <bitfield name="TOV0" mask="0x01" text="Timer/Counter0 Overflow Flag" icon=""/>
 324           </reg>
 325           <reg size="1" name="GTCCR" offset="0x43" text="General Timer/Counter Control Register" icon="io_flag.bmp">
 326             <bitfield name="TSM" mask="0x80" text="Timer/Counter Synchronization Mode" icon=""/>
 327             <bitfield name="PSRSYNC" mask="0x01" text="Prescaler Reset Timer/Counter1 and Timer/Counter0" icon=""/>
 328           </reg>
 329         </registers>
 330     </module>
 331     <module class="TIMER_COUNTER_1">
 332       <registers name="TIMER_COUNTER_1" memspace="DATAMEM" text="" icon="io_timer.bmp">
 333           <reg size="1" name="TCCR1A" offset="0x80" text="Timer/Counter1 Control Register A" icon="io_flag.bmp">
 334             <bitfield name="COM1A" mask="0xC0" text="Compare Output Mode 1A, bits" icon=""/>
 335             <bitfield name="COM1B" mask="0x30" text="Compare Output Mode 1B, bits" icon=""/>
 336             <bitfield name="COM1C" mask="0x0C" text="Compare Output Mode 1C, bits" icon=""/>
 337             <bitfield name="WGM1" mask="0x03" text="Waveform Generation Mode" icon=""/>
 338           </reg>
 339           <reg size="1" name="TCCR1B" offset="0x81" text="Timer/Counter1 Control Register B" icon="io_flag.bmp">
 340             <bitfield name="ICNC1" mask="0x80" text="Input Capture 1 Noise Canceler" icon=""/>
 341             <bitfield name="ICES1" mask="0x40" text="Input Capture 1 Edge Select" icon=""/>
 342             <bitfield name="WGM1" mask="0x18" text="Waveform Generation Mode" icon="" lsb="2"/>
 343             <bitfield name="CS1" mask="0x07" text="Prescaler source of Timer/Counter 1" icon="" enum="CLK_SEL_3BIT_EXT"/>
 344           </reg>
 345           <reg size="1" name="TCCR1C" offset="0x82" text="Timer/Counter 1 Control Register C" icon="io_flag.bmp">
 346             <bitfield name="FOC1A" mask="0x80" text="Force Output Compare 1A" icon=""/>
 347             <bitfield name="FOC1B" mask="0x40" text="Force Output Compare 1B" icon=""/>
 348             <bitfield name="FOC1C" mask="0x20" text="Force Output Compare 1C" icon=""/>
 349           </reg>
 350           <reg size="2" name="TCNT1" offset="0x84" text="Timer/Counter1  Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
 351           <reg size="2" name="OCR1A" offset="0x88" text="Timer/Counter1 Outbut Compare Register A  Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
 352           <reg size="2" name="OCR1B" offset="0x8A" text="Timer/Counter1 Output Compare Register B  Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
 353           <reg size="2" name="OCR1C" offset="0x8C" text="Timer/Counter1 Output Compare Register C  Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
 354           <reg size="2" name="ICR1" offset="0x86" text="Timer/Counter1 Input Capture Register  Bytes" icon="io_timer.bmp" mask="0xFFFF"/>
 355           <reg size="1" name="TIMSK1" offset="0x6F" text="Timer/Counter1 Interrupt Mask Register" icon="io_flag.bmp">
 356             <bitfield name="ICIE1" mask="0x20" text="Timer/Counter1 Input Capture Interrupt Enable" icon=""/>
 357             <bitfield name="OCIE1C" mask="0x08" text="Timer/Counter1 Output Compare C Match Interrupt Enable" icon=""/>
 358             <bitfield name="OCIE1B" mask="0x04" text="Timer/Counter1 Output Compare B Match Interrupt Enable" icon=""/>
 359             <bitfield name="OCIE1A" mask="0x02" text="Timer/Counter1 Output Compare A Match Interrupt Enable" icon=""/>
 360             <bitfield name="TOIE1" mask="0x01" text="Timer/Counter1 Overflow Interrupt Enable" icon=""/>
 361           </reg>
 362           <reg size="1" name="TIFR1" offset="0x36" text="Timer/Counter1 Interrupt Flag register" icon="io_flag.bmp">
 363             <bitfield name="ICF1" mask="0x20" text="Input Capture Flag 1" icon=""/>
 364             <bitfield name="OCF1C" mask="0x08" text="Output Compare Flag 1C" icon=""/>
 365             <bitfield name="OCF1B" mask="0x04" text="Output Compare Flag 1B" icon=""/>
 366             <bitfield name="OCF1A" mask="0x02" text="Output Compare Flag 1A" icon=""/>
 367             <bitfield name="TOV1" mask="0x01" text="Timer/Counter1 Overflow Flag" icon=""/>
 368           </reg>
 369         </registers>
 370     </module>
 371     <module class="PLL">
 372       <registers name="PLL" memspace="DATAMEM" text="" icon="io_analo.bmp">
 373           <reg size="1" name="PLLCSR" offset="0x49" text="PLL Status and Control register" icon="io_analo.bmp">
 374             <bitfield name="PLLP" mask="0x1C" text="PLL prescaler Bits" icon="" enum="PLL_INPUT_PRESCALER"/>
 375             <bitfield name="PLLE" mask="0x02" text="PLL Enable Bit" icon=""/>
 376             <bitfield name="PLOCK" mask="0x01" text="PLL Lock Status Bit" icon=""/>
 377           </reg>
 378         </registers>
 379     </module>
 380     <module class="USB_DEVICE">
 381       <registers name="USB_DEVICE" memspace="DATAMEM" text="" icon="io_com.bmp">
 382           <reg size="1" name="UEINT" offset="0xF4" text="" icon="io_flag.bmp" mask="0x1F"/>
 383           <reg size="1" name="UEBCLX" offset="0xF2" text="" icon="io_flag.bmp" mask="0xFF"/>
 384           <reg size="1" name="UEDATX" offset="0xF1" text="" icon="io_flag.bmp" mask="0xFF"/>
 385           <reg size="1" name="UEIENX" offset="0xF0" text="" icon="io_flag.bmp">
 386             <bitfield name="FLERRE" mask="0x80" text="" icon=""/>
 387             <bitfield name="NAKINE" mask="0x40" text="" icon=""/>
 388             <bitfield name="NAKOUTE" mask="0x10" text="" icon=""/>
 389             <bitfield name="RXSTPE" mask="0x08" text="" icon=""/>
 390             <bitfield name="RXOUTE" mask="0x04" text="" icon=""/>
 391             <bitfield name="STALLEDE" mask="0x02" text="" icon=""/>
 392             <bitfield name="TXINE" mask="0x01" text="" icon=""/>
 393           </reg>
 394           <reg size="1" name="UESTA1X" offset="0xEF" text="" icon="io_flag.bmp">
 395             <bitfield name="CTRLDIR" mask="0x04" text="" icon=""/>
 396             <bitfield name="CURRBK" mask="0x03" text="" icon=""/>
 397           </reg>
 398           <reg size="1" name="UESTA0X" offset="0xEE" text="" icon="io_flag.bmp">
 399             <bitfield name="CFGOK" mask="0x80" text="" icon=""/>
 400             <bitfield name="OVERFI" mask="0x40" text="" icon=""/>
 401             <bitfield name="UNDERFI" mask="0x20" text="" icon=""/>
 402             <bitfield name="DTSEQ" mask="0x0C" text="" icon=""/>
 403             <bitfield name="NBUSYBK" mask="0x03" text="" icon=""/>
 404           </reg>
 405           <reg size="1" name="UECFG1X" offset="0xED" text="" icon="io_flag.bmp">
 406             <bitfield name="EPSIZE" mask="0x70" text="" icon=""/>
 407             <bitfield name="EPBK" mask="0x0C" text="" icon=""/>
 408             <bitfield name="ALLOC" mask="0x02" text="" icon=""/>
 409           </reg>
 410           <reg size="1" name="UECFG0X" offset="0xEC" text="" icon="io_flag.bmp">
 411             <bitfield name="EPTYPE" mask="0xC0" text="" icon=""/>
 412             <bitfield name="EPDIR" mask="0x01" text="" icon=""/>
 413           </reg>
 414           <reg size="1" name="UECONX" offset="0xEB" text="" icon="io_flag.bmp">
 415             <bitfield name="STALLRQ" mask="0x20" text="" icon=""/>
 416             <bitfield name="STALLRQC" mask="0x10" text="" icon=""/>
 417             <bitfield name="RSTDT" mask="0x08" text="" icon=""/>
 418             <bitfield name="EPEN" mask="0x01" text="" icon=""/>
 419           </reg>
 420           <reg size="1" name="UERST" offset="0xEA" text="" icon="io_flag.bmp">
 421             <bitfield name="EPRST" mask="0x1F" text="" icon=""/>
 422           </reg>
 423           <reg size="1" name="UENUM" offset="0xE9" text="" icon="io_flag.bmp" mask="0x07"/>
 424           <reg size="1" name="UEINTX" offset="0xE8" text="" icon="io_flag.bmp">
 425             <bitfield name="FIFOCON" mask="0x80" text="" icon=""/>
 426             <bitfield name="NAKINI" mask="0x40" text="" icon=""/>
 427             <bitfield name="RWAL" mask="0x20" text="" icon=""/>
 428             <bitfield name="NAKOUTI" mask="0x10" text="" icon=""/>
 429             <bitfield name="RXSTPI" mask="0x08" text="" icon=""/>
 430             <bitfield name="RXOUTI" mask="0x04" text="" icon=""/>
 431             <bitfield name="STALLEDI" mask="0x02" text="" icon=""/>
 432             <bitfield name="TXINI" mask="0x01" text="" icon=""/>
 433           </reg>
 434           <reg size="1" name="UDMFN" offset="0xE6" text="" icon="io_flag.bmp">
 435             <bitfield name="FNCERR" mask="0x10" text="" icon=""/>
 436           </reg>
 437           <reg size="2" name="UDFNUM" offset="0xE4" text="" icon="io_flag.bmp" mask="0x07FF"/>
 438           <reg size="1" name="UDADDR" offset="0xE3" text="" icon="io_flag.bmp">
 439             <bitfield name="ADDEN" mask="0x80" text="" icon=""/>
 440             <bitfield name="UADD" mask="0x7F" text="" icon=""/>
 441           </reg>
 442           <reg size="1" name="UDIEN" offset="0xE2" text="" icon="io_flag.bmp">
 443             <bitfield name="UPRSME" mask="0x40" text="" icon=""/>
 444             <bitfield name="EORSME" mask="0x20" text="" icon=""/>
 445             <bitfield name="WAKEUPE" mask="0x10" text="" icon=""/>
 446             <bitfield name="EORSTE" mask="0x08" text="" icon=""/>
 447             <bitfield name="SOFE" mask="0x04" text="" icon=""/>
 448             <bitfield name="SUSPE" mask="0x01" text="" icon=""/>
 449           </reg>
 450           <reg size="1" name="UDINT" offset="0xE1" text="" icon="io_flag.bmp">
 451             <bitfield name="UPRSMI" mask="0x40" text="" icon=""/>
 452             <bitfield name="EORSMI" mask="0x20" text="" icon=""/>
 453             <bitfield name="WAKEUPI" mask="0x10" text="" icon=""/>
 454             <bitfield name="EORSTI" mask="0x08" text="" icon=""/>
 455             <bitfield name="SOFI" mask="0x04" text="" icon=""/>
 456             <bitfield name="SUSPI" mask="0x01" text="" icon=""/>
 457           </reg>
 458           <reg size="1" name="UDCON" offset="0xE0" text="" icon="io_flag.bmp">
 459             <bitfield name="RSTCPU" mask="0x04" text="" icon=""/>
 460             <bitfield name="RMWKUP" mask="0x02" text="" icon=""/>
 461             <bitfield name="DETACH" mask="0x01" text="" icon=""/>
 462           </reg>
 463           <reg size="1" name="USBCON" offset="0xD8" text="USB General Control Register" icon="io_flag.bmp">
 464             <bitfield name="USBE" mask="0x80" text="" icon=""/>
 465             <bitfield name="FRZCLK" mask="0x20" text="" icon=""/>
 466           </reg>
 467           <reg size="1" name="REGCR" offset="0x63" text="Regulator Control Register" icon="io_flag.bmp">
 468             <bitfield name="REGDIS" mask="0x01" text="" icon=""/>
 469           </reg>
 470         </registers>
 471     </module>
 472     <module class="PS2">
 473       <registers name="PS2" memspace="DATAMEM" text="" icon="io_port.bmp">
 474           <reg size="1" name="UPOE" offset="0xFB" text="" icon="io_port.bmp">
 475             <bitfield name="UPWE" mask="0xC0" text="" icon=""/>
 476             <bitfield name="UPDRV" mask="0x30" text="" icon=""/>
 477             <bitfield name="SCKI" mask="0x08" text="" icon=""/>
 478             <bitfield name="DATAI" mask="0x04" text="" icon=""/>
 479             <bitfield name="DPI" mask="0x02" text="" icon=""/>
 480             <bitfield name="DMI" mask="0x01" text="" icon=""/>
 481           </reg>
 482           <reg size="1" name="PS2CON" offset="0xFA" text="PS2 Pad Enable register" icon="io_port.bmp">
 483             <bitfield name="PS2EN" mask="0x01" text="Enable" icon=""/>
 484           </reg>
 485         </registers>
 486     </module>
 487     <module class="CPU">
 488       <registers name="CPU" memspace="DATAMEM" text="" icon="io_cpu.bmp">
 489           <reg size="1" name="SREG" offset="0x5F" text="Status Register" icon="io_sreg.bmp">
 490             <bitfield name="I" mask="0x80" text="Global Interrupt Enable" icon=""/>
 491             <bitfield name="T" mask="0x40" text="Bit Copy Storage" icon=""/>
 492             <bitfield name="H" mask="0x20" text="Half Carry Flag" icon=""/>
 493             <bitfield name="S" mask="0x10" text="Sign Bit" icon=""/>
 494             <bitfield name="V" mask="0x08" text="Two's Complement Overflow Flag" icon=""/>
 495             <bitfield name="N" mask="0x04" text="Negative Flag" icon=""/>
 496             <bitfield name="Z" mask="0x02" text="Zero Flag" icon=""/>
 497             <bitfield name="C" mask="0x01" text="Carry Flag" icon=""/>
 498           </reg>
 499           <reg size="2" name="SP" offset="0x5D" text="Stack Pointer " icon="io_sph.bmp" mask="0xFFFF"/>
 500           <reg size="1" name="MCUCR" offset="0x55" text="MCU Control Register" icon="io_flag.bmp">
 501             <bitfield name="PUD" mask="0x10" text="Pull-up disable" icon=""/>
 502             <bitfield name="IVSEL" mask="0x02" text="Interrupt Vector Select" icon=""/>
 503             <bitfield name="IVCE" mask="0x01" text="Interrupt Vector Change Enable" icon=""/>
 504           </reg>
 505           <reg size="1" name="MCUSR" offset="0x54" text="MCU Status Register" icon="io_flag.bmp">
 506             <bitfield name="USBRF" mask="0x20" text="USB reset flag" icon=""/>
 507             <bitfield name="WDRF" mask="0x08" text="Watchdog Reset Flag" icon=""/>
 508             <bitfield name="BORF" mask="0x04" text="Brown-out Reset Flag" icon=""/>
 509             <bitfield name="EXTRF" mask="0x02" text="External Reset Flag" icon=""/>
 510             <bitfield name="PORF" mask="0x01" text="Power-on reset flag" icon=""/>
 511           </reg>
 512           <reg size="1" name="OSCCAL" offset="0x66" text="Oscillator Calibration Value" icon="io_cpu.bmp" mask="0xFF"/>
 513           <reg size="1" name="CLKPR" offset="0x61" text="" icon="io_cpu.bmp">
 514             <bitfield name="CLKPCE" mask="0x80" text="" icon=""/>
 515             <bitfield name="CLKPS" mask="0x0F" text="" icon=""/>
 516           </reg>
 517           <reg size="1" name="SMCR" offset="0x53" text="Sleep Mode Control Register" icon="io_cpu.bmp">
 518             <bitfield name="SM" mask="0x0E" text="Sleep Mode Select bits" icon=""/>
 519             <bitfield name="SE" mask="0x01" text="Sleep Enable" icon=""/>
 520           </reg>
 521           <reg size="1" name="EIND" offset="0x5C" text="Extended Indirect Register" icon="io_cpu.bmp" mask="0x01"/>
 522           <reg size="1" name="GPIOR2" offset="0x4B" text="General Purpose IO Register 2" icon="io_cpu.bmp">
 523             <bitfield name="GPIOR" mask="0xFF" text="General Purpose IO Register 2 bis" icon="" lsb="20"/>
 524           </reg>
 525           <reg size="1" name="GPIOR1" offset="0x4A" text="General Purpose IO Register 1" icon="io_cpu.bmp">
 526             <bitfield name="GPIOR" mask="0xFF" text="General Purpose IO Register 1 bis" icon="" lsb="10"/>
 527           </reg>
 528           <reg size="1" name="GPIOR0" offset="0x3E" text="General Purpose IO Register 0" icon="io_cpu.bmp">
 529             <bitfield name="GPIOR07" mask="0x80" text="General Purpose IO Register 0 bit 7" icon=""/>
 530             <bitfield name="GPIOR06" mask="0x40" text="General Purpose IO Register 0 bit 6" icon=""/>
 531             <bitfield name="GPIOR05" mask="0x20" text="General Purpose IO Register 0 bit 5" icon=""/>
 532             <bitfield name="GPIOR04" mask="0x10" text="General Purpose IO Register 0 bit 4" icon=""/>
 533             <bitfield name="GPIOR03" mask="0x08" text="General Purpose IO Register 0 bit 3" icon=""/>
 534             <bitfield name="GPIOR02" mask="0x04" text="General Purpose IO Register 0 bit 2" icon=""/>
 535             <bitfield name="GPIOR01" mask="0x02" text="General Purpose IO Register 0 bit 1" icon=""/>
 536             <bitfield name="GPIOR00" mask="0x01" text="General Purpose IO Register 0 bit 0" icon=""/>
 537           </reg>
 538           <reg size="1" name="PRR1" offset="0x65" text="Power Reduction Register1" icon="io_cpu.bmp">
 539             <bitfield name="PRUSB" mask="0x80" text="Power Reduction USB" icon=""/>
 540             <bitfield name="PRUSART1" mask="0x01" text="Power Reduction USART1" icon=""/>
 541           </reg>
 542           <reg size="1" name="PRR0" offset="0x64" text="Power Reduction Register0" icon="io_cpu.bmp">
 543             <bitfield name="PRTIM0" mask="0x20" text="Power Reduction Timer/Counter0" icon=""/>
 544             <bitfield name="PRTIM1" mask="0x08" text="Power Reduction Timer/Counter1" icon=""/>
 545             <bitfield name="PRSPI" mask="0x04" text="Power Reduction Serial Peripheral Interface" icon=""/>
 546           </reg>
 547           <reg size="1" name="CLKSTA" offset="0xD2" text="" icon="io_cpu.bmp">
 548             <bitfield name="RCON" mask="0x02" text="" icon=""/>
 549             <bitfield name="EXTON" mask="0x01" text="" icon=""/>
 550           </reg>
 551           <reg size="1" name="CLKSEL1" offset="0xD1" text="" icon="io_cpu.bmp">
 552             <bitfield name="RCCKSEL" mask="0xF0" text="" icon=""/>
 553             <bitfield name="EXCKSEL" mask="0x0F" text="" icon=""/>
 554           </reg>
 555           <reg size="1" name="CLKSEL0" offset="0xD0" text="" icon="io_cpu.bmp">
 556             <bitfield name="RCSUT" mask="0xC0" text="" icon=""/>
 557             <bitfield name="EXSUT" mask="0x30" text="" icon=""/>
 558             <bitfield name="RCE" mask="0x08" text="" icon=""/>
 559             <bitfield name="EXTE" mask="0x04" text="" icon=""/>
 560             <bitfield name="CLKS" mask="0x01" text="" icon=""/>
 561           </reg>
 562           <reg size="1" name="DWDR" offset="0x51" text="debugWire communication register" icon="io_cpu.bmp" mask="0xFF"/>
 563         </registers>
 564     </module>
 565     <module class="EXTERNAL_INTERRUPT">
 566       <registers name="EXTERNAL_INTERRUPT" memspace="DATAMEM" text="" icon="io_ext.bmp">
 567           <reg size="1" name="EICRA" offset="0x69" text="External Interrupt Control Register A" icon="io_flag.bmp">
 568             <bitfield name="ISC3" mask="0xC0" text="External Interrupt Sense Control Bit" icon=""/>
 569             <bitfield name="ISC2" mask="0x30" text="External Interrupt Sense Control Bit" icon=""/>
 570             <bitfield name="ISC1" mask="0x0C" text="External Interrupt Sense Control Bit" icon=""/>
 571             <bitfield name="ISC0" mask="0x03" text="External Interrupt Sense Control Bit" icon=""/>
 572           </reg>
 573           <reg size="1" name="EICRB" offset="0x6A" text="External Interrupt Control Register B" icon="io_flag.bmp">
 574             <bitfield name="ISC7" mask="0xC0" text="External Interrupt 7-4 Sense Control Bit" icon=""/>
 575             <bitfield name="ISC6" mask="0x30" text="External Interrupt 7-4 Sense Control Bit" icon=""/>
 576             <bitfield name="ISC5" mask="0x0C" text="External Interrupt 7-4 Sense Control Bit" icon=""/>
 577             <bitfield name="ISC4" mask="0x03" text="External Interrupt 7-4 Sense Control Bit" icon=""/>
 578           </reg>
 579           <reg size="1" name="EIMSK" offset="0x3D" text="External Interrupt Mask Register" icon="io_flag.bmp">
 580             <bitfield name="INT" mask="0xFF" text="External Interrupt Request 7 Enable" icon=""/>
 581           </reg>
 582           <reg size="1" name="EIFR" offset="0x3C" text="External Interrupt Flag Register" icon="io_flag.bmp">
 583             <bitfield name="INTF" mask="0xFF" text="External Interrupt Flags" icon=""/>
 584           </reg>
 585           <reg size="1" name="PCMSK0" offset="0x6B" text="Pin Change Mask Register 0" icon="io_flag.bmp">
 586             <bitfield name="PCINT" mask="0xFF" text="Pin Change Enable Masks" icon=""/>
 587           </reg>
 588           <reg size="1" name="PCMSK1" offset="0x6C" text="Pin Change Mask Register 1" icon="io_flag.bmp">
 589             <bitfield name="PCINT" mask="0x1F" text="" icon="" lsb="8"/>
 590           </reg>
 591           <reg size="1" name="PCIFR" offset="0x3B" text="Pin Change Interrupt Flag Register" icon="io_flag.bmp">
 592             <bitfield name="PCIF" mask="0x03" text="Pin Change Interrupt Flags" icon=""/>
 593           </reg>
 594           <reg size="1" name="PCICR" offset="0x68" text="Pin Change Interrupt Control Register" icon="io_flag.bmp">
 595             <bitfield name="PCIE" mask="0x03" text="Pin Change Interrupt Enables" icon=""/>
 596           </reg>
 597         </registers>
 598     </module>
 599     <module class="USART1">
 600       <registers name="USART1" memspace="DATAMEM" text="" icon="io_com.bmp">
 601           <reg size="1" name="UDR1" offset="0xCE" text="USART I/O Data Register" icon="io_com.bmp" mask="0xFF"/>
 602           <reg size="1" name="UCSR1A" offset="0xC8" text="USART Control and Status Register A" icon="io_flag.bmp">
 603             <bitfield name="RXC1" mask="0x80" text="USART Receive Complete" icon=""/>
 604             <bitfield name="TXC1" mask="0x40" text="USART Transmitt Complete" icon=""/>
 605             <bitfield name="UDRE1" mask="0x20" text="USART Data Register Empty" icon=""/>
 606             <bitfield name="FE1" mask="0x10" text="Framing Error" icon=""/>
 607             <bitfield name="DOR1" mask="0x08" text="Data overRun" icon=""/>
 608             <bitfield name="UPE1" mask="0x04" text="Parity Error" icon=""/>
 609             <bitfield name="U2X1" mask="0x02" text="Double the USART transmission speed" icon=""/>
 610             <bitfield name="MPCM1" mask="0x01" text="Multi-processor Communication Mode" icon=""/>
 611           </reg>
 612           <reg size="1" name="UCSR1B" offset="0xC9" text="USART Control and Status Register B" icon="io_flag.bmp">
 613             <bitfield name="RXCIE1" mask="0x80" text="RX Complete Interrupt Enable" icon=""/>
 614             <bitfield name="TXCIE1" mask="0x40" text="TX Complete Interrupt Enable" icon=""/>
 615             <bitfield name="UDRIE1" mask="0x20" text="USART Data register Empty Interrupt Enable" icon=""/>
 616             <bitfield name="RXEN1" mask="0x10" text="Receiver Enable" icon=""/>
 617             <bitfield name="TXEN1" mask="0x08" text="Transmitter Enable" icon=""/>
 618             <bitfield name="UCSZ12" mask="0x04" text="Character Size" icon=""/>
 619             <bitfield name="RXB81" mask="0x02" text="Receive Data Bit 8" icon=""/>
 620             <bitfield name="TXB81" mask="0x01" text="Transmit Data Bit 8" icon=""/>
 621           </reg>
 622           <reg size="1" name="UCSR1C" offset="0xCA" text="USART Control and Status Register C" icon="io_flag.bmp">
 623             <bitfield name="UMSEL1" mask="0xC0" text="USART Mode Select" icon=""/>
 624             <bitfield name="UPM1" mask="0x30" text="Parity Mode Bits" icon=""/>
 625             <bitfield name="USBS1" mask="0x08" text="Stop Bit Select" icon=""/>
 626             <bitfield name="UCSZ1" mask="0x06" text="Character Size" icon=""/>
 627             <bitfield name="UCPOL1" mask="0x01" text="Clock Polarity" icon=""/>
 628           </reg>
 629           <reg size="1" name="UCSR1D" offset="0xCB" text="USART Control and Status Register D" icon="io_flag.bmp">
 630             <bitfield name="CTSEN" mask="0x02" text="CTS Enable" icon=""/>
 631             <bitfield name="RTSEN" mask="0x01" text="RTS Enable" icon=""/>
 632           </reg>
 633           <reg size="2" name="UBRR1" offset="0xCC" text="USART Baud Rate Register  Bytes" icon="io_com.bmp" mask="0x0FFF"/>
 634         </registers>
 635     </module>
 636     <module class="WATCHDOG">
 637       <registers name="WATCHDOG" memspace="DATAMEM" text="" icon="io_watch.bmp">
 638           <reg size="1" name="WDTCSR" offset="0x60" text="Watchdog Timer Control Register" icon="io_flag.bmp">
 639             <bitfield name="WDIF" mask="0x80" text="Watchdog Timeout Interrupt Flag" icon=""/>
 640             <bitfield name="WDIE" mask="0x40" text="Watchdog Timeout Interrupt Enable" icon=""/>
 641             <bitfield name="WDP" mask="0x27" text="Watchdog Timer Prescaler Bits" icon=""/>
 642             <bitfield name="WDCE" mask="0x10" text="Watchdog Change Enable" icon=""/>
 643             <bitfield name="WDE" mask="0x08" text="Watch Dog Enable" icon=""/>
 644           </reg>
 645           <reg size="1" name="WDTCKD" offset="0x62" text="Watchdog Timer Clock Divider" icon="io_flag.bmp">
 646             <bitfield name="WDEWIF" mask="0x08" text="Watchdog Early Warning Interrupt Flag" icon=""/>
 647             <bitfield name="WDEWIE" mask="0x04" text="Watchdog Early Warning Interrupt Enable" icon=""/>
 648             <bitfield name="WCLKD" mask="0x03" text="Watchdog Timer Clock Dividers" icon=""/>
 649           </reg>
 650         </registers>
 651     </module>
 652     <module class="ANALOG_COMPARATOR">
 653       <registers name="ANALOG_COMPARATOR" memspace="DATAMEM" text="" icon="io_analo.bmp">
 654           <reg size="1" name="ACSR" offset="0x50" text="Analog Comparator Control And Status Register" icon="io_analo.bmp">
 655             <bitfield name="ACD" mask="0x80" text="Analog Comparator Disable" icon=""/>
 656             <bitfield name="ACBG" mask="0x40" text="Analog Comparator Bandgap Select" icon=""/>
 657             <bitfield name="ACO" mask="0x20" text="Analog Compare Output" icon=""/>
 658             <bitfield name="ACI" mask="0x10" text="Analog Comparator Interrupt Flag" icon=""/>
 659             <bitfield name="ACIE" mask="0x08" text="Analog Comparator Interrupt Enable" icon=""/>
 660             <bitfield name="ACIC" mask="0x04" text="Analog Comparator Input Capture Enable" icon=""/>
 661             <bitfield name="ACIS" mask="0x03" text="Analog Comparator Interrupt Mode Select bits" icon="" enum="ANALOG_COMP_INTERRUPT"/>
 662           </reg>
 663           <reg size="1" name="DIDR1" offset="0x7F" text="" icon="io_analo.bmp">
 664             <bitfield name="AIN1D" mask="0x02" text="AIN1 Digital Input Disable" icon=""/>
 665             <bitfield name="AIN0D" mask="0x01" text="AIN0 Digital Input Disable" icon=""/>
 666           </reg>
 667         </registers>
 668     </module>
 669     <module class="PORTC">
 670       <registers name="PORTC" memspace="DATAMEM" text="" icon="io_port.bmp">
 671           <reg size="1" name="PORTC" offset="0x28" text="Port C Data Register" icon="io_port.bmp">
 672             <bitfield name="PORTC" mask="0xF0" text="Port C Data Register bits" icon="" lsb="4"/>
 673             <bitfield name="PORTC" mask="0x07" text="Port C Data Register bits" icon=""/>
 674           </reg>
 675           <reg size="1" name="DDRC" offset="0x27" text="Port C Data Direction Register" icon="io_flag.bmp">
 676             <bitfield name="DDC" mask="0xF0" text="Port C Data Direction Register bits" icon="" lsb="4"/>
 677             <bitfield name="DDC" mask="0x07" text="Port C Data Direction Register bits" icon=""/>
 678           </reg>
 679           <reg size="1" name="PINC" offset="0x26" text="Port C Input Pins" icon="io_port.bmp">
 680             <bitfield name="PINC" mask="0xF0" text="Port C Input Pins bits" icon="" lsb="4"/>
 681             <bitfield name="PINC" mask="0x07" text="Port C Input Pins bits" icon=""/>
 682           </reg>
 683         </registers>
 684     </module>
 685   </hardware>
 686 </device>