test/timer.c

   1 /*
   2  * $Id: timer.c,v 1.2 2003/11/12 07:33:17 troth Exp $
   3  *
   4  ****************************************************************************
   5  *
   6  * simulavr - A simulator for the Atmel AVR family of microcontrollers.
   7  * Copyright (C) 2003,  Hermann Kraus
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22  *
  23  ****************************************************************************
  24  */
  25
  26 /* This test program has several functions:
  27  * - Testing interrupts in general.
  28  * - Testing the timer overflow and output compare match irqs.
  29  * - Showing how the timers work.
  30  * - Allowing the user to examine the "struct" and "array" debugging with
  31  *   Simulavr
  32  *
  33  * But be careful: This is an example for testing purposes only. For real
  34  * programs it wastes too much flash.
  35  */
  36
  37 #include <avr/interrupt.h>
  38 #include <inttypes.h>
  39
  40 typedef struct _TimerInfo TimerInfo;
  41
  42 struct _TimerInfo
  43 {
  44     uint16_t overflow_count;
  45     uint16_t oc_match_count[3];
  46 };
  47
  48 static TimerInfo timer[4];
  49 static uint32_t cycle;
  50
  51 SIGNAL(SIG_OVERFLOW0)
  52 {
  53     timer[0].overflow_count++;
  54 }
  55
  56 SIGNAL(SIG_OVERFLOW1)
  57 {
  58     timer[1].overflow_count++;
  59 }
  60
  61 SIGNAL(SIG_OVERFLOW2)
  62 {
  63     timer[2].overflow_count++;
  64 }
  65
  66 SIGNAL(SIG_OVERFLOW3)
  67 {
  68     timer[4].overflow_count++;
  69 }
  70
  71
  72 SIGNAL(SIG_OUTPUT_COMPARE0)
  73 {
  74     timer[0].oc_match_count[0]++;
  75 }
  76
  77 SIGNAL(SIG_OUTPUT_COMPARE1A)
  78 {
  79     timer[1].oc_match_count[0]++;
  80 }
  81
  82 SIGNAL(SIG_OUTPUT_COMPARE1B)
  83 {
  84     timer[1].oc_match_count[1]++;
  85 }
  86
  87 SIGNAL(SIG_OUTPUT_COMPARE2)
  88 {
  89     timer[2].oc_match_count[0]++;
  90 }
  91
  92 SIGNAL(SIG_OUTPUT_COMPARE3A)
  93 {
  94     timer[3].oc_match_count[0]++;
  95 }
  96
  97 SIGNAL(SIG_OUTPUT_COMPARE3B)
  98 {
  99     timer[3].oc_match_count[1]++;
 100 }
 101
 102 void
 103 clear_structs (void)
 104 {
 105     uint8_t i, n;
 106
 107     for (i=0; i<4; i++)
 108     {
 109         timer[i].overflow_count=0;
 110         for (n=0; n<3; n++)
 111         {
 112             timer[i].oc_match_count[n]=0;
 113         }
 114     }
 115 }
 116
 117 int
 118 main (void)
 119 {
 120     /* Init the struct mem with zeros. */
 121
 122     clear_structs();
 123
 124     /* TODO: Add PWM test as PWM functionality is introduced in Simulavr.
 125        Start 8bit Timer/Counter 0 with prescaler 8. */
 126
 127     TCCR0 = _BV(CS01);
 128
 129     /* Start 16bit Timer/Counter 1 w/o prescaler. */
 130
 131     TCCR1B = _BV(CS10);
 132
 133     /* Start 8bit Timer/Counter 2 with prescaler 32. */
 134
 135 #if defined (TCCR2)
 136     TCCR2 = (_BV(CS20) | _BV(CS22));
 137 #endif
 138
 139     /* Start 16bit Timer/Counter 3 with prescaler 1024.
 140        This is not yet implemented in simulavr (as all extended registers). */
 141
 142 #if defined (TCCR3B)
 143     TCCR3B = (_BV(CS30) | _BV(CS31) | _BV(CS32));
 144 #endif
 145
 146     /* Now we set some OCR-Values. */
 147
 148     /* 8 bit */
 149
 150 #if defined(OCR0)
 151     OCR0 = 12;
 152 #endif
 153 #if defined(OCR2)
 154     OCR2 = 34;
 155 #endif
 156
 157     /* 16 bit */
 158
 159     OCR1A = 1234;
 160     OCR1B = 2345;
 161 #if defined(OCR1C)
 162     OCR1C = 3456;
 163 #endif
 164 #if defined(OCR3A)
 165     OCR3A = 4567;
 166 #endif
 167 #if defined(OCR3B)
 168     OCR3B = 5678;
 169 #endif
 170 #if defined(OCR3C)
 171     OCR3C = 6789;
 172 #endif
 173
 174     /* Enable overflow irqs for timers 0-3 and output compare irq
 175        for timer 0, 1a, 1b, 3b. */
 176
 177     TIMSK = (
 178              _BV(TOIE0)
 179              | _BV(TOIE1)
 180 #if defined(TOIE2)
 181              | _BV(TOIE2)
 182 #endif
 183 #if defined(OCIE2)
 184              | _BV(OCIE2)
 185 #endif
 186 #if defined(OCIE0)
 187              | _BV(OCIE0)
 188 #endif
 189              | _BV(OCIE1A)
 190              | _BV(OCIE1B)
 191              );
 192
 193 #if defined(ETIMSK)
 194     ETIMSK = (
 195               _BV(TOIE3)
 196               | _BV(OCIE3B)
 197               );
 198 #endif
 199
 200     sei ();                     /* Enable irqs */
 201
 202     for (;;)
 203     {
 204         cycle++;                /* Increase cycle counter */
 205     }
 206
 207     return (0);
 208 }