kernel/arch/arm/bd/intcp.c

   1 /*
   2  *  ZeX/OS
   3  *  Copyright (C) 2009  Tomas 'ZeXx86' Jedrzejek (zexx86@zexos.org)
   4  *
   5  *  This program is free software: you can redistribute it and/or modify
   6  *  it under the terms of the GNU General Public License as published by
   7  *  the Free Software Foundation, either version 3 of the License, or
   8  *  (at your option) any later version.
   9  *
  10  *  This program is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19
  20 #include <config.h>
  21 #ifdef CONFIG_DRV_ARM_BOARD_INTCP
  22 #include <arch/bd/intcp.h>
  23
  24 /**
  25   * PL011
  26   * Uart device
  27   * Serial cable input/output
  28   */
  29
  30 typedef struct {
  31         unsigned char c : 8;
  32         unsigned fr_err : 1;
  33         unsigned par_err : 1;
  34         unsigned break_err : 1;
  35         unsigned ovrrun_err : 1;
  36 } __attribute__ ((__packed__)) arm_rcv_block;
  37
  38 int armbd_uart_write (int port, unsigned char c)
  39 {
  40         unsigned char *uart_addr = (unsigned char *) ARM_INTCP_PL011_BASE0;
  41
  42         if (port)
  43                 uart_addr = (unsigned char *) ARM_INTCP_PL011_BASE1;
  44
  45         uart_addr += ARM_INTCP_PL011_DR * 4;
  46
  47         *uart_addr = c;
  48
  49         return 1;
  50 }
  51
  52 unsigned char armbd_uart_received (int port)
  53 {
  54         unsigned *uart_addr = (unsigned *) ARM_INTCP_PL011_BASE0;
  55
  56         if (port)
  57                 uart_addr = (unsigned *) ARM_INTCP_PL011_BASE1;
  58
  59         uart_addr += 6;
  60
  61         if (*uart_addr & ARM_INTCP_PL011_RXFE)
  62                 return 0;
  63
  64         return 1;
  65 }
  66
  67 unsigned char armbd_uart_read (int port)
  68 {
  69         arm_rcv_block *uart_addr = (arm_rcv_block *) ARM_INTCP_PL011_BASE0;
  70
  71         if (port)
  72                 uart_addr = (arm_rcv_block *) ARM_INTCP_PL011_BASE1;
  73
  74 #ifdef ARM_UART_ERR_LOG
  75         unsigned char err = 0;
  76
  77         /* there is error on uart, lets clean it */
  78         if (uart_addr->ovrrun_err)
  79                 err ++;
  80
  81         if (uart_addr->break_err)
  82                 err ++;
  83
  84         if (uart_addr->par_err)
  85                 err ++;
  86
  87         if (uart_addr->fr_err)
  88                 err ++;
  89 #endif
  90         return uart_addr->c;
  91 }
  92
  93
  94 /**
  95   * PL110
  96   * ARM PrimeCell Color LCD Controller
  97   * Display output
  98   */
  99
 100 void armbd_pl110_write (unsigned offset, unsigned val)
 101 {
 102         char *c = (char *) ARM_INTCP_PL110_BASE;
 103         unsigned *p = (unsigned *) &c[offset];
 104
 105         *p = val;
 106 }
 107
 108 unsigned armbd_pl110_read (unsigned offset)
 109 {
 110         char *c = (char *) ARM_INTCP_PL110_BASE;
 111         unsigned *p = (unsigned *) &c[offset];
 112
 113         return *p;
 114 }
 115
 116 void armbd_display_enable ()
 117 {
 118 #ifdef CONFIG_DRV_ARM_BOARD_INTCP_PL110
 119         armbd_pl110_write ((0x4 << 2), 0x500000);                       /* upper video memory address */
 120         armbd_pl110_write ((0x5 << 2), 0x600000);                       /* lower video memory address */
 121
 122         armbd_pl110_write ((0x7 << 2), ARM_INTCP_PL110_CR_EN |
 123                                        ARM_INTCP_PL110_CR_PWR |
 124                                        ARM_INTCP_PL110_CR_16BPP);       /* enable device and set to 16bpp mode */
 125
 126         armbd_pl110_write ((0x0 << 2), 157);                            /* 640 */
 127         armbd_pl110_write ((0x1 << 2), 599);                            /* 400 */
 128
 129         vgafb_res_x = 640;
 130         vgafb_res_y = 599;
 131
 132         vgafb = (unsigned char *) 0x500000;
 133         vgadb = (unsigned char *) 0x500000;
 134
 135         vgagui = 2;
 136 #endif
 137 }
 138
 139 void armbd_display_turnon ()
 140 {
 141         unsigned r = armbd_pl110_read (0x7 << 2);
 142
 143         if (r & ARM_INTCP_PL110_CR_PWR)
 144                 return;
 145
 146         r |= ARM_INTCP_PL110_CR_PWR;
 147
 148         armbd_pl110_write ((0x7 << 2), r);      /* enable device */
 149 }
 150
 151 void armbd_display_turnoff ()
 152 {
 153         unsigned r = armbd_pl110_read (0x7 << 2);
 154
 155         if (!(r & ARM_INTCP_PL110_CR_PWR))
 156                 return;
 157
 158         r &= ~ARM_INTCP_PL110_CR_PWR;
 159
 160         armbd_pl110_write ((0x7 << 2), r);      /* disable device */
 161 }
 162
 163 /**
 164   * PL050
 165   * ARM PrimeCell PS2 Keyboard/Mouse Interface
 166   * Keyboard & Mouse over PS2
 167   */
 168
 169 #define KBD_CMD_ENABLE          0xF4    /* Enable scanning */
 170 #define KBD_REPLY_ACK           0xFA    /* Command ACK */
 171 #define KBD_CMD_RESET_ENABLE    0xF6    /* reset and enable scanning */
 172
 173 void armbd_pl050_write (unsigned offset, unsigned val)
 174 {
 175         char *c = (char *) ARM_INTCP_PL050_KB_BASE;
 176         unsigned *p = (unsigned *) &c[offset];
 177
 178         *p = val;
 179 }
 180
 181 unsigned armbd_pl050_read (unsigned offset)
 182 {
 183         char *c = (char *) ARM_INTCP_PL050_KB_BASE;
 184         unsigned *p = (unsigned *) &c[offset];
 185
 186         return *p;
 187 }
 188
 189 unsigned armbd_kbd_data ()
 190 {
 191         return armbd_pl050_read (1 << 2) == ARM_INTCP_PL050_TXEMPTY ? 0 : 1;
 192 }
 193
 194 unsigned armbd_kbd_scancode ()
 195 {
 196         return armbd_pl050_read (2 << 2);
 197 }
 198
 199 unsigned armbd_kbd_ack ()
 200 {
 201         armbd_pl050_write (2 << 2, KBD_REPLY_ACK);
 202 }
 203
 204 unsigned armbd_kbd_init ()
 205 {
 206         armbd_pl050_write (2 << 2, KBD_CMD_RESET_ENABLE);
 207
 208 //      armbd_pl050_write (2 << 2, KBD_CMD_SET_RATE);
 209
 210         return 1;
 211 }
 212
 213 #endif