pform.h

   1 #ifndef __pform_H
   2 #define __pform_H
   3 /*
   4  * Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com)
   5  *
   6  *    This source code is free software; you can redistribute it
   7  *    and/or modify it in source code form under the terms of the GNU
   8  *    General Public License as published by the Free Software
   9  *    Foundation; either version 2 of the License, or (at your option)
  10  *    any later version.
  11  *
  12  *    This program is distributed in the hope that it will be useful,
  13  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *    GNU General Public License for more details.
  16  *
  17  *    You should have received a copy of the GNU General Public License
  18  *    along with this program; if not, write to the Free Software
  19  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  20  */
  21
  22 # include  "netlist.h"
  23 # include  "HName.h"
  24 # include  "named.h"
  25 # include  "Module.h"
  26 # include  "Statement.h"
  27 # include  "PGate.h"
  28 # include  "PExpr.h"
  29 # include  "PTask.h"
  30 # include  "PUdp.h"
  31 # include  "PWire.h"
  32 # include  "verinum.h"
  33 # include  <iostream>
  34 # include  <string>
  35 # include  <list>
  36 # include  <stdio.h>
  37
  38 /*
  39  * These classes implement the parsed form (P-form for short) of the
  40  * original Verilog source. the parser generates the pform for the
  41  * convenience of later processing steps.
  42  */
  43
  44
  45 /*
  46  * Wire objects represent the named wires (of various flavor) declared
  47  * in the source.
  48  *
  49  * Gate objects are the functional modules that are connected together
  50  * by wires.
  51  *
  52  * Wires and gates, connected by joints, represent a netlist. The
  53  * netlist is therefore a representation of the desired circuit.
  54  */
  55 class PGate;
  56 class PExpr;
  57 class PSpecPath;
  58 struct vlltype;
  59
  60 /*
  61  * The min:typ:max expression s selected at parse time using the
  62  * enumeration. When the compiler makes a choice, it also prints a
  63  * warning if min_typ_max_warn > 0.
  64  */
  65 extern enum MIN_TYP_MAX { MIN, TYP, MAX } min_typ_max_flag;
  66 extern unsigned min_typ_max_warn;
  67 PExpr* pform_select_mtm_expr(PExpr*min, PExpr*typ, PExpr*max);
  68
  69 /*
  70  * This flag is true if the lexor thinks we are in a library source
  71  * file.
  72  */
  73 extern bool pform_library_flag;
  74
  75 /*
  76  * These type are lexical types -- that is, types that are used as
  77  * lexical values to decorate the parse tree during parsing. They are
  78  * not in any way preserved once parsing is done.
  79  */
  80
  81 /* This is information about port name information for named port
  82    connections. */
  83
  84 //typedef struct named<PExpr*> named_pexpr_t;
  85 typedef named<PExpr*> named_pexpr_t;
  86
  87 struct parmvalue_t {
  88       svector<PExpr*>*by_order;
  89       svector<named_pexpr_t*>*by_name;
  90 };
  91
  92 struct str_pair_t { PGate::strength_t str0, str1; };
  93
  94 struct net_decl_assign_t {
  95       perm_string name;
  96       PExpr*expr;
  97       struct net_decl_assign_t*next;
  98 };
  99
 100 /* The lgate is gate instantiation information. */
 101 struct lgate {
 102       lgate(int =0)
 103       : parms(0), parms_by_name(0), lineno(0)
 104       { range[0] = 0;
 105         range[1] = 0;
 106       }
 107
 108       string name;
 109       svector<PExpr*>*parms;
 110       svector<named_pexpr_t*>*parms_by_name;
 111
 112       PExpr*range[2];
 113
 114       const char* file;
 115       unsigned lineno;
 116 };
 117
 118   /* The lexor calls this function to change the default nettype. */
 119 extern void pform_set_default_nettype(NetNet::Type net,
 120                                      const char*file,
 121                                      unsigned lineno);
 122
 123 /*
 124  * The parser uses startmodule and endmodule together to build up a
 125  * module as it parses it. The startmodule tells the pform code that a
 126  * module has been noticed in the source file and the following events
 127  * are to apply to the scope of that module. The endmodule causes the
 128  * pform to close up and finish the named module.
 129  */
 130 extern void pform_startmodule(const char*, const char*file, unsigned lineno,
 131                               svector<named_pexpr_t*>*attr);
 132 extern void pform_module_set_ports(svector<Module::port_t*>*);
 133
 134 /* This function is used to support the port definition in a
 135    port_definition_list. In this case, we have everything needed to
 136    define the port, all in one place. */
 137 extern void pform_module_define_port(const struct vlltype&li,
 138                                      perm_string name,
 139                                      NetNet::PortType,
 140                                      NetNet::Type type,
 141                                      bool signed_flag,
 142                                      svector<PExpr*>*range,
 143                                      svector<named_pexpr_t*>*attr);
 144
 145 extern Module::port_t* pform_module_port_reference(perm_string name,
 146                                                    const char*file,
 147                                                    unsigned lineno);
 148 extern void pform_endmodule(const char*);
 149
 150 extern void pform_make_udp(perm_string name, list<perm_string>*parms,
 151                            svector<PWire*>*decl, list<string>*table,
 152                            Statement*init,
 153                            const char*file, unsigned lineno);
 154
 155 extern void pform_make_udp(perm_string name,
 156                            bool sync_flag, perm_string out_name,
 157                            PExpr*sync_init,
 158                            list<perm_string>*parms,
 159                            list<string>*table,
 160                            const char*file, unsigned lineno);
 161
 162 /*
 163  * Enter/exit name scopes. The push_scope function pushes the scope
 164  * name string onto the scope hierarchy. The pop pulls it off and
 165  * deletes it. Thus, the string pushed must be allocated.
 166  */
 167 extern void pform_pop_scope();
 168
 169 extern PTask*pform_push_task_scope(char*name);
 170 extern PFunction*pform_push_function_scope(char*name);
 171 extern PBlock*pform_push_block_scope(char*name, PBlock::BL_TYPE tt);
 172
 173
 174 extern verinum* pform_verinum_with_size(verinum*s, verinum*val,
 175                                         const char*file, unsigned lineno);
 176
 177 /*
 178  * This function takes the list of names as new genvars to declare in
 179  * the current module scope.
 180  */
 181 extern void pform_genvars(const struct vlltype&li, list<perm_string>*names);
 182
 183 extern void pform_start_generate_for(const struct vlltype&li,
 184                                      char*ident1,
 185                                      PExpr*init,
 186                                      PExpr*test,
 187                                      char*ident2,
 188                                      PExpr*next);
 189 extern void pform_start_generate_if(const struct vlltype&li, PExpr*test);
 190 extern void pform_start_generate_else(const struct vlltype&li);
 191 extern void pform_start_generate_case(const struct vlltype&lp, PExpr*test);
 192 extern void pform_generate_case_item(const struct vlltype&lp, PExpr*test);
 193 extern void pform_generate_block_name(char*name);
 194 extern void pform_endgenerate();
 195
 196
 197 /*
 198  * The makewire functions announce to the pform code new wires. These
 199  * go into a module that is currently opened.
 200  */
 201 extern void pform_makewire(const struct vlltype&li, perm_string name,
 202                            NetNet::Type type,
 203                            NetNet::PortType pt,
 204                            ivl_variable_type_t,
 205                            svector<named_pexpr_t*>*attr);
 206
 207 /* This form handles simple declarations */
 208 extern void pform_makewire(const struct vlltype&li,
 209                            svector<PExpr*>*range,
 210                            bool signed_flag,
 211                            list<perm_string>*names,
 212                            NetNet::Type type,
 213                            NetNet::PortType,
 214                            ivl_variable_type_t,
 215                            svector<named_pexpr_t*>*attr,
 216                            PWSRType rt = SR_NET);
 217
 218 /* This form handles assignment declarations. */
 219 extern void pform_makewire(const struct vlltype&li,
 220                            svector<PExpr*>*range,
 221                            bool signed_flag,
 222                            svector<PExpr*>*delay,
 223                            str_pair_t str,
 224                            net_decl_assign_t*assign_list,
 225                            NetNet::Type type,
 226                            ivl_variable_type_t);
 227
 228 extern void pform_make_reginit(const struct vlltype&li,
 229                                perm_string name, PExpr*expr);
 230
 231   /* Look up the names of the wires, and set the port type,
 232      i.e. input, output or inout. If the wire does not exist, create
 233      it. The second form takes a single name. */
 234 extern void pform_set_port_type(const struct vlltype&li,
 235                                 list<perm_string>*names,
 236                                 svector<PExpr*>*range,
 237                                 bool signed_flag,
 238                                 NetNet::PortType);
 239 extern void pform_set_port_type(perm_string nm, NetNet::PortType pt,
 240                                 const char*file, unsigned lineno);
 241
 242 extern void pform_set_net_range(list<perm_string>*names,
 243                                 svector<PExpr*>*,
 244                                 bool signed_flag,
 245                                 ivl_variable_type_t,
 246                                 PWSRType rt = SR_NET);
 247 extern void pform_set_reg_idx(perm_string name, PExpr*l, PExpr*r);
 248 extern void pform_set_reg_integer(list<perm_string>*names);
 249 extern void pform_set_reg_time(list<perm_string>*names);
 250
 251   /* pform_set_attrib and pform_set_type_attrib exist to support the
 252      $attribute syntax, which can only set string values to
 253      attributes. The functions keep the value strings that are
 254      passed in. */
 255 extern void pform_set_attrib(perm_string name, perm_string key,
 256                              char*value);
 257 extern void pform_set_type_attrib(perm_string name, const string&key,
 258                                   char*value);
 259
 260 extern void pform_set_parameter(perm_string name,
 261                                 bool signed_flag,
 262                                 svector<PExpr*>*range,
 263                                 PExpr*expr,
 264                                 const char*file, unsigned lineno);
 265 extern void pform_set_localparam(perm_string name,
 266                                  bool signed_flag,
 267                                  svector<PExpr*>*range,
 268                                  PExpr*expr,
 269                                  const char*file, unsigned lineno);
 270 extern void pform_set_defparam(const pform_name_t&name, PExpr*expr);
 271
 272 /*
 273  * Functions related to specify blocks.
 274  */
 275 extern void pform_set_specparam(perm_string name, PExpr*expr);
 276
 277 extern PSpecPath*pform_make_specify_path(const struct vlltype&li,
 278                                          list<perm_string>*src, char pol,
 279                                          bool full_flag, list<perm_string>*dst);
 280 extern PSpecPath*pform_make_specify_edge_path(const struct vlltype&li,
 281                                          int edge_flag, /*posedge==true */
 282                                          list<perm_string>*src, char pol,
 283                                          bool full_flag, list<perm_string>*dst,
 284                                          PExpr*data_source_expression);
 285 extern PSpecPath*pform_assign_path_delay(PSpecPath*obj, svector<PExpr*>*delays);
 286
 287 extern void pform_module_specify_path(PSpecPath*obj);
 288
 289 /*
 290  * pform_make_behavior creates processes that are declared with always
 291  * or initial items.
 292  */
 293 extern PProcess*  pform_make_behavior(PProcess::Type, Statement*,
 294                                       svector<named_pexpr_t*>*attr);
 295
 296 extern svector<PWire*>* pform_make_udp_input_ports(list<perm_string>*);
 297
 298 extern bool pform_expression_is_constant(const PExpr*);
 299
 300 extern void pform_make_events(list<perm_string>*names,
 301                               const char*file, unsigned lineno);
 302 /*
 303  * Make real datum objects.
 304  */
 305 extern void pform_make_reals(list<perm_string>*names,
 306                              const char*file, unsigned lineno);
 307
 308 /*
 309  * The makegate function creates a new gate (which need not have a
 310  * name) and connects it to the specified wires.
 311  */
 312 extern void pform_makegates(PGBuiltin::Type type,
 313                             struct str_pair_t str,
 314                             svector<PExpr*>*delay,
 315                             svector<lgate>*gates,
 316                             svector<named_pexpr_t*>*attr);
 317
 318 extern void pform_make_modgates(perm_string type,
 319                                 struct parmvalue_t*overrides,
 320                                 svector<lgate>*gates);
 321
 322 /* Make a continuous assignment node, with optional bit- or part- select. */
 323 extern void pform_make_pgassign_list(svector<PExpr*>*alist,
 324                                      svector<PExpr*>*del,
 325                                      struct str_pair_t str,
 326                                      const char* fn, unsigned lineno);
 327
 328 /* Given a port type and a list of names, make a list of wires that
 329    can be used as task port information. */
 330 extern svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
 331                                              ivl_variable_type_t vtype,
 332                                              bool signed_flag,
 333                                              svector<PExpr*>*range,
 334                                              list<perm_string>*names,
 335                                              const char* file,
 336                                              unsigned lineno);
 337
 338
 339 /*
 340  * These are functions that the outside-the-parser code uses the do
 341  * interesting things to the Verilog. The parse function reads and
 342  * parses the source file and places all the modules it finds into the
 343  * mod list. The dump function dumps a module to the output stream.
 344  */
 345 extern void pform_dump(ostream&out, Module*mod);
 346
 347 /*
 348  * Used to report the original module location when a nested module
 349  * (missing endmodule) is found by the parser.
 350  */
 351 extern void pform_error_nested_modules();
 352
 353 #endif