descriptionsystemverilog compiler
homepage URLhttp://icarus.com/eda/verilog/
ownerricky.nite@gmail.com
last changeSat, 24 May 2008 04:23:16 +0000 (23 21:23 -0700)
content tags
add:
readme
fork of iverilog to add systemverilog support
shortlog
2008-05-24 Stephen WilliamsMerge branch 'master' into verilog-amsmaster
2008-05-24 Stephen WilliamsMerge branch 'verilog-ams' of ssh://steve-icarus@icarus...
2008-05-24 Stephen WilliamsBring switch information out to the ivl_target API.
2008-05-24 Stephen WilliamsVectorize AND/OR/NAND/NOR/INV instructions when reasonable.
2008-05-23 Stephen WilliamsOptimize vvp_vector4 vector handling.
2008-05-23 Stephen WilliamsFix botched processing of MUX with constant select.
2008-05-23 Stephen WilliamsMerge branch 'master' of ssh://steve-icarus@icarus...
2008-05-23 Cary RAdd $finish_and_return.
2008-05-23 Larry DoolittleMake sure stringify_flag is always initialized.
2008-05-23 Cary RMinGW fixes (development)
2008-05-23 Larry DoolittleUse standard for printing uint64_t
2008-05-23 Stephen Williams work interrupted
2008-05-23 Stephen WilliamsRework %cmpi/u, %cmp/u and %ix/get for speed
2008-05-21 Stephen WilliamsSimplify MUXZ if the select is constant.
2008-05-21 Stephen WilliamsMerge branch 'var-array-rework'
2008-05-21 Stephen WilliamsClear up some poor pointer management.
...
heads
15 years ago master