hppa: Revise REG+D address support to allow long displacements before reload

hppa: Revise REG+D address support to allow long displacements before reload

In analyzing PR rtl-optimization/112415, I realized that restricting
REG+D offsets to 5-bits before reload results in very poor code and
complexities in optimizing these instructions after reload.  The
general problem is long displacements are not allowed for floating
point accesses when generating PA 1.1 code.  Even with PA 2.0, there
is a ELF linker bug that prevents using long displacements for
floating point loads and stores.

In the past, enabling long displacements before reload caused issues
in reload.  However, there have been fixes in the handling of reloads
for floating-point accesses.  This change allows long displacements
before reload and corrects a couple of issues in the constraint
handling for integer and floating-point accesses.

2023-11-16  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

	PR rtl-optimization/112415
	* config/pa/pa.cc (pa_legitimate_address_p): Allow 14-bit
	displacements before reload.  Simplify logic flow.  Revise
	comments.
	* config/pa/pa.h (TARGET_ELF64): New define.
	(INT14_OK_STRICT): Update define and comment.
	* config/pa/pa64-linux.h (TARGET_ELF64): Define.
	* config/pa/predicates.md (base14_operand): Don't check
	alignment of short displacements.
	(integer_store_memory_operand): Don't return true when
	reload_in_progress is true.  Remove INT_5_BITS check.
	(floating_point_store_memory_operand): Don't return true when
	reload_in_progress is true.  Use INT14_OK_STRICT to check
	whether long displacements are always okay.