1 2014-10-24 Yvan Roux <yvan.roux@linaro.org>
3 * LINARO-VERSION: Bump version.
5 2014-10-24 Yvan Roux <yvan.roux@linaro.org>
7 GCC Linaro 4.9-2014.10-1 released.
8 * LINARO-VERSION: Update.
10 2014-10-17 Yvan Roux <yvan.roux@linaro.org>
12 * LINARO-VERSION: Bump version.
14 2014-10-17 Yvan Roux <yvan.roux@linaro.org>
16 GCC Linaro 4.9-2014.10 released.
17 * LINARO-VERSION: Update.
19 2014-10-10 Yvan Roux <yvan.roux@linaro.org>
22 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
24 Backport from trunk r215206, r215207, r215208.
25 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
27 * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
29 (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
30 cost to spilling from integer to FP registers.
32 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
34 * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
36 (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
37 are now handled correctly.
39 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
41 * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
42 handling of CALLER_SAVE_REGS and POINTER_REGS.
44 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
46 Backport from trunk r214825, r214826.
47 2014-09-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
51 (neon_vcvt<NEON_VCVT:nvrint_variant><su_optab><VCVTF:mode>
52 <v_cmp_result>): New pattern.
53 * config/arm/iterators.md (NEON_VCVT): New int iterator.
54 * config/arm/arm_neon_builtins.def (vcvtav2sf, vcvtav4sf, vcvtauv2sf,
55 vcvtauv4sf, vcvtpv2sf, vcvtpv4sf, vcvtpuv2sf, vcvtpuv4sf, vcvtmv2sf,
56 vcvtmv4sf, vcvtmuv2sf, vcvtmuv4sf): New builtin definitions.
57 * config/arm/arm.c (arm_builtin_vectorized_function): Handle
58 BUILT_IN_LROUNDF, BUILT_IN_LFLOORF, BUILT_IN_LCEILF.
60 2014-09-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
63 * config/arm/iterators.md (FIXUORS): New code iterator.
64 (VCVT): New int iterator.
65 (su_optab): New code attribute.
67 * config/arm/vfp.md (l<vrint_pattern><su_optab><mode>si2): New pattern.
69 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
71 Backport from trunk r215471.
72 2014-09-22 James Greenhalgh <james.greenhalgh@arm.com>
74 * config/aarch64/geniterators.sh: New.
75 * config/aarch64/iterators.md (VDQF_DF): New.
76 * config/aarch64/t-aarch64: Generate aarch64-builtin-iterators.h.
77 * config/aarch64/aarch64-builtins.c (BUILTIN_*) Remove.
79 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
81 Backport from trunk r215206, r215207, r215208.
82 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
84 * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
86 (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
87 cost to spilling from integer to FP registers.
89 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
91 * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
93 (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
94 are now handled correctly.
96 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
98 * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
99 handling of CALLER_SAVE_REGS and POINTER_REGS.
101 2014-10-07 Yvan Roux <yvan.roux@linaro.org>
103 Backport from trunk r214824.
104 2014-09-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
106 * config/aarch64/predicates.md (aarch64_comparison_operation):
107 New special predicate.
108 * config/aarch64/aarch64.md (*csinc2<mode>_insn): Use
109 aarch64_comparison_operation instead of matching an operator.
110 Update operand numbers.
111 (csinc3<mode>_insn): Likewise.
112 (*csinv3<mode>_insn): Likewise.
113 (*csneg3<mode>_insn): Likewise.
114 (ffs<mode>2): Update gen_csinc3<mode>_insn callsite.
115 * config/aarch64/aarch64.c (aarch64_get_condition_code):
116 Return -1 instead of aborting on invalid condition codes.
117 (aarch64_print_operand): Update aarch64_get_condition_code callsites
118 to assert that the returned condition code is valid.
119 * config/aarch64/aarch64-protos.h (aarch64_get_condition_code): Export.
121 2014-10-07 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
123 Backport from trunk r209643, r211881.
124 2014-06-22 Richard Henderson <rth@redhat.com>
127 * compare-elim.c (struct comparison): Add eh_note.
128 (find_comparison_dom_walker::before_dom_children): Don't eliminate
129 a redundant comparison in a different EH region. Purge EH edges if
132 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
134 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
136 2014-10-06 Charles Baylis <charles.baylis@linaro.org>
138 Backport from trunk r214945.
139 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
141 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Replace
142 varargs with pointer parameter.
143 (aarch64_simd_expand_builtin): pass pointer into previous.
145 2014-10-06 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
147 Backport from trunk r214944.
148 2014-09-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
150 * config/arm/cortex-a53.md (cortex_a53_alu_shift): Add alu_ext,
153 2014-10-06 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
155 Backport from trunk r214943.
156 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
158 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): New pattern.
159 * config/aarch64/aarch64-simd-builtins.def (rbit): New builtin.
160 * config/aarch64/arm_neon.h (vrbit_s8, vrbit_u8, vrbitq_s8, vrbitq_u8):
161 Replace temporary asm with call to builtin.
162 (vrbit_p8, vrbitq_p8): New functions.
164 2014-10-06 Michael Collison <michael.collison@linaro.org>
166 Backport from trunk r214886.
167 2014-09-03 Richard Henderson <rth@redhat.com>
169 * config/aarch64/aarch64.c (aarch64_popwb_single_reg): Remove.
170 (aarch64_popwb_pair_reg): Remove.
171 (aarch64_set_frame_expr): Remove.
172 (aarch64_restore_callee_saves): Add CFI_OPS argument; fill it with
173 the restore ops performed by the insns generated.
174 (aarch64_expand_epilogue): Attach CFI_OPS to the stack deallocation
175 insn. Perform the calls_eh_return addition later; do not attempt to
176 preserve the CFA in that case. Don't use aarch64_set_frame_expr.
177 (aarch64_expand_prologue): Use REG_CFA_ADJUST_CFA directly, or no
178 special markup at all. Load cfun->machine->frame.hard_fp_offset
179 into a local variable.
180 (aarch64_frame_pointer_required): Don't check calls_alloca.
182 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
184 Backport from trunk r215385.
185 2014-09-19 James Greenhalgh <james.greenhalgh@arm.com>
187 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Mark
188 scratch register as written.
190 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
192 Backport from trunk r215346.
193 2014-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
195 * config/arm/neon.md (*movmisalign<mode>_neon_load): Change type
196 to neon_load1_1reg<q>.
198 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
200 Backport from trunk r215321.
201 2014-09-17 Andrew Stubbs <ams@codesourcery.com>
203 * config/arm/arm.c (arm_option_override): Reject -mfpu=neon
204 when architecture is older than ARMv7.
206 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
208 Backport from trunk r215260.
209 2014-09-14 David Sherwood <david.sherwood@arm.com>
211 * gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit simd mov.
213 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
215 Backport from trunk r215205.
216 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
218 * gcc/ree.c (combine_reaching_defs): Ensure inserted copy don't change
219 the number of hard registers.
221 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
223 Backport from trunk r215136.
224 2014-09-10 Xinliang David Li <davidxl@google.com>
227 * config/arm/arm.md (movcond_addsi): Handle case where source
228 and target operands are the same.
230 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
232 Backport from trunk r215086.
233 2014-09-09 Marcus Shawcroft <marcus.shawcroft@arm.com>
234 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
236 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Add crtfastmath.o.
237 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATH_ENDFILE_SPEC):
239 (ENDFILE_SPEC): Define and use GNU_USER_TARGET_MATH_ENDFILE_SPEC.
241 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
243 Backport from trunk r215067.
244 2014-09-09 Jiong Wang <jiong.wang@arm.com>
246 * config/arm/arm.c (NEON_COPYSIGNF): New enum.
247 (arm_init_neon_builtins): Support NEON_COPYSIGNF.
248 (arm_builtin_vectorized_function): Likewise.
249 * config/arm/arm_neon_builtins.def: New macro for copysignf.
250 * config/arm/neon.md (neon_copysignf<mode>): New pattern for vector
253 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
255 Backport from trunk r215050, r215051, r215052, r215053, r215054,
257 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
259 * config/arm/arm.md (vfp_pop_multiple_with_writeback): Use vldm
260 mnemonic instead of fldmfdd.
261 * config/arm/arm.c (vfp_output_fstmd): Rename to...
262 (vfp_output_vstmd): ... This. Convert output to UAL syntax.
263 Output vpush when address register is SP.
264 * config/arm/arm-protos.h (vfp_output_fstmd): Rename to...
265 (vfp_output_vstmd): ... This.
266 * config/arm/vfp.md (push_multi_vfp): Update call to
269 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
271 * config/arm/vfp.md (*movcc_vfp): Use UAL syntax.
273 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
275 * config/arm/vfp.md (*sqrtsf2_vfp): Use UAL assembly syntax.
276 (*sqrtdf2_vfp): Likewise.
277 (*cmpsf_vfp): Likewise.
278 (*cmpsf_trap_vfp): Likewise.
279 (*cmpdf_vfp): Likewise.
280 (*cmpdf_trap_vfp): Likewise.
282 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
284 * config/arm/vfp.md (*extendsfdf2_vfp): Use UAL assembly syntax.
285 (*truncdfsf2_vfp): Likewise.
286 (*truncsisf2_vfp): Likewise.
287 (*truncsidf2_vfp): Likewise.
288 (fixuns_truncsfsi2): Likewise.
289 (fixuns_truncdfsi2): Likewise.
290 (*floatsisf2_vfp): Likewise.
291 (*floatsidf2_vfp): Likewise.
292 (floatunssisf2): Likewise.
293 (floatunssidf2): Likewise.
295 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
297 * config/arm/vfp.md (*mulsf3_vfp): Use UAL assembly syntax.
298 (*muldf3_vfp): Likewise.
299 (*mulsf3negsf_vfp): Likewise.
300 (*muldf3negdf_vfp): Likewise.
301 (*mulsf3addsf_vfp): Likewise.
302 (*muldf3adddf_vfp): Likewise.
303 (*mulsf3subsf_vfp): Likewise.
304 (*muldf3subdf_vfp): Likewise.
305 (*mulsf3negsfaddsf_vfp): Likewise.
306 (*fmuldf3negdfadddf_vfp): Likewise.
307 (*mulsf3negsfsubsf_vfp): Likewise.
308 (*muldf3negdfsubdf_vfp): Likewise.
310 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
312 * config/arm/vfp.md (*abssf2_vfp): Use UAL assembly syntax.
313 (*absdf2_vfp): Likewise.
314 (*negsf2_vfp): Likewise.
315 (*negdf2_vfp): Likewise.
316 (*addsf3_vfp): Likewise.
317 (*adddf3_vfp): Likewise.
318 (*subsf3_vfp): Likewise.
319 (*subdf3_vfp): Likewise.
320 (*divsf3_vfp): Likewise.
321 (*divdf3_vfp): Likewise.
323 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
325 * config/arm/arm.c (output_move_vfp): Use UAL syntax for load/store
327 (arm_print_operand): Don't convert real values to decimal
328 representation in default case.
329 (fp_immediate_constant): Delete.
330 * config/arm/arm-protos.h (fp_immediate_constant): Likewise.
331 * config/arm/vfp.md (*arm_movsi_vfp): Convert to VFP moves to UAL
333 (*thumb2_movsi_vfp): Likewise.
334 (*movdi_vfp): Likewise.
335 (*movdi_vfp_cortexa8): Likewise.
336 (*movhf_vfp_neon): Likewise.
337 (*movhf_vfp): Likewise.
338 (*movsf_vfp): Likewise.
339 (*thumb2_movsf_vfp): Likewise.
340 (*movdf_vfp): Likewise.
341 (*thumb2_movdf_vfp): Likewise.
342 (*movsfcc_vfp): Likewise.
343 (*thumb2_movsfcc_vfp): Likewise.
344 (*movdfcc_vfp): Likewise.
345 (*thumb2_movdfcc_vfp): Likewise.
347 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
349 Backport from trunk r214959.
350 2014-09-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
352 * config/arm/cortex-a53.md (cortex_a53_fpalu): Add f_rints, f_rintd,
353 f_minmaxs, f_minmaxd types.
355 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
357 Backport from trunk r214947.
358 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
360 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
361 Remove qualifier_const_pointer, update comment.
363 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
365 Backport from trunk r214940.
366 2014-09-05 James Greenhalgh <james.greenhalgh@arm.com>
368 * config/aarch64/aarch64.md (sibcall_value_insn): Give operand 1
371 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
373 Backport from trunk r213090.
374 2014-07-26 Andrew Pinski <apinski@cavium.com>
376 * config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
377 from the read only register.
379 2014-09-11 Yvan Roux <yvan.roux@linaro.org>
381 * LINARO-VERSION: Bump version.
383 2014-09-10 Yvan Roux <yvan.roux@linaro.org>
385 GCC Linaro 4.9-2014.09 released.
386 * LINARO-VERSION: Update.
388 2014-09-09 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
390 Backport from trunk r215004.
391 2014-09-07 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
394 * config/aarch64/aarch64.md (stack_protect_test_<mode>) Add register
395 constraint for operand0 and remove write only modifier from operand3.
397 2014-09-09 Michael Collison <michael.collison@linaro.org>
399 Backport from trunk r212178
400 2014-06-30 Joseph Myers <joseph@codesourcery.com>
402 * var-tracking.c (add_stores): Return instead of asserting if old
403 and new values for conditional store are the same.
405 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
408 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
410 Backport from trunk r213712.
411 2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
413 * config/aarch64/aarch64.md (absdi2): Set simd attribute.
414 (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
415 (aarch64_movdi_<mode>high): Likewise.
416 (aarch64_mov<mode>high_di): Likewise.
417 (aarch64_movdi_<mode>low): Likewise.
418 (aarch64_mov<mode>low_di): Likewise.
419 (aarch64_movtilow_tilow): Likewise.
420 Add comment explaining usage of fp,simd attributes and of
421 TARGET_FLOAT and TARGET_SIMD.
423 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
425 Backport from trunk r213712.
426 2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
428 * config/aarch64/aarch64.md (absdi2): Set simd attribute.
429 (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
430 (aarch64_movdi_<mode>high): Likewise.
431 (aarch64_mov<mode>high_di): Likewise.
432 (aarch64_movdi_<mode>low): Likewise.
433 (aarch64_mov<mode>low_di): Likewise.
434 (aarch64_movtilow_tilow): Likewise.
435 Add comment explaining usage of fp,simd attributes and of
436 TARGET_FLOAT and TARGET_SIMD.
438 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
440 Backport from trunk r214526.
441 2014-08-26 Joseph Myers <joseph@codesourcery.com>
445 * varasm.c (make_decl_rtl): Clear DECL_ASSEMBLER_NAME and
446 DECL_HARD_REGISTER and return for invalid register specifications.
447 * cfgexpand.c (expand_one_var): If expand_one_hard_reg_var clears
448 DECL_HARD_REGISTER, call expand_one_error_var.
449 * config/arm/arm.c (arm_hard_regno_mode_ok): Do not allow
450 CC_REGNUM with non-MODE_CC modes.
451 (arm_regno_class): Return NO_REGS for PC_REGNUM.
453 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
455 Backport from trunk r214503.
456 2014-08-26 Evandro Menezes <e.menezes@samsung.com>
458 * config/arm/aarch64/aarch64.c (generic_addrcost_table): Delete
459 qi cost; add di cost.
460 (cortexa57_addrcost_table): Likewise.
462 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
464 Backport from trunk r213659.
465 2014-08-06 Alan Lawrence <alan.lawrence@arm.com>
467 * config/aarch64/aarch64.c (aarch64_evpc_dup): Enable for bigendian.
468 (aarch64_expand_vec_perm_const): Check for dup before zip.
470 2014-09-02 Yvan Roux <yvan.roux@linaro.org>
472 Backport from trunk r213651.
473 2014-08-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
475 * config/aarch64/aarch64.c (aarch64_classify_address): Use REG_P and
476 CONST_INT_P instead of GET_CODE and compare.
477 (aarch64_select_cc_mode): Likewise.
478 (aarch64_print_operand): Likewise.
479 (aarch64_rtx_costs): Likewise.
480 (aarch64_simd_valid_immediate): Likewise.
481 (aarch64_simd_check_vect_par_cnst_half): Likewise.
482 (aarch64_simd_emit_pair_result_insn): Likewise.
484 2014-08-29 Yvan Roux <yvan.roux@linaro.org>
486 Backport from trunk r212978.
487 2014-07-24 Andreas Schwab <schwab@suse.de>
489 * lib/target-supports.exp (check_effective_target_arm_nothumb):
490 Also check for __arm__.
492 2014-08-29 Christophe Lyon <christophe.lyon@linaro.org>
494 Fix backport from trunk 211440:
495 * config.gcc (aarch64*-*-*): Restore need_64bit_hwint=yes.
497 This is necessary to build aarch64* compilers on i686 host.
499 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
501 Backport from trunk r213627.
502 2014-08-05 James Greenhalgh <james.greenhalgh@arm.com>
504 * config/aarch64/aarch64-builtins.c
505 (aarch64_simd_builtin_type_mode): Delete.
506 (v8qi_UP): Remap to V8QImode.
507 (v4hi_UP): Remap to V4HImode.
508 (v2si_UP): Remap to V2SImode.
509 (v2sf_UP): Remap to V2SFmode.
510 (v1df_UP): Remap to V1DFmode.
511 (di_UP): Remap to DImode.
512 (df_UP): Remap to DFmode.
513 (v16qi_UP):V16QImode.
514 (v8hi_UP): Remap to V8HImode.
515 (v4si_UP): Remap to V4SImode.
516 (v4sf_UP): Remap to V4SFmode.
517 (v2di_UP): Remap to V2DImode.
518 (v2df_UP): Remap to V2DFmode.
519 (ti_UP): Remap to TImode.
520 (ei_UP): Remap to EImode.
521 (oi_UP): Remap to OImode.
522 (ci_UP): Map to CImode.
523 (xi_UP): Remap to XImode.
524 (si_UP): Remap to SImode.
525 (sf_UP): Remap to SFmode.
526 (hi_UP): Remap to HImode.
527 (qi_UP): Remap to QImode.
528 (aarch64_simd_builtin_datum): Make mode a machine_mode.
529 (VAR1): Build builtin name.
530 (aarch64_init_simd_builtins): Remove dead code.
532 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
534 Backport from trunk r213713.
535 2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
537 * config/arm/arm.md (*cmov<mode>): Set type attribute to fcsel.
538 * config/arm/types.md (f_sels, f_seld): Delete.
540 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
542 Backport from trunk r213711.
543 2014-08-07 Ian Bolton <ian.bolton@arm.com>
544 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
546 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate):
547 Use MOVN when one of the half-words is 0xffff.
549 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
551 Backport from trunk r213632.
552 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
554 * config/arm/cortex-a15.md (cortex_a15_alu_shift): Add crc type
556 * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
558 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
560 Backport from trunk r213630.
561 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
563 * config/arm/arm.md (clzsi2): Set predicable_short_it attr to no.
565 (*arm_rev): Set predicable and predicable_short_it attributes.
567 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
569 Backport from trunk r213557.
570 2014-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
571 James Greenhalgh <james.greenhalgh@arm.com>
573 * doc/md.texi (clrsb): Document.
574 (clz): Change reference to x into operand 1.
576 (popcount): Likewise.
578 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
580 Backport from trunk r213551, r213556.
581 2014-08-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
582 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
584 * sched-deps.c (try_group_insn): Generalise macro fusion hook usage
585 to any two insns. Update comment. Rename to sched_macro_fuse_insns.
586 (sched_analyze_insn): Update use of try_group_insn to
587 sched_macro_fuse_insns.
588 * config/i386/i386.c (ix86_macro_fusion_pair_p): Reject 2nd
589 arguments that are not conditional jumps.
591 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
593 Backport from trunk r213490.
594 2014-08-01 Alan Lawrence <alan.lawrence@arm.com>
596 * config/aarch64/aarch64-simd-builtins.def (dup_lane, get_lane): Delete.
598 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
600 Backport from trunk r213488.
601 2014-08-01 Jiong Wang <jiong.wang@arm.com>
603 * config/aarch64/aarch64.c (aarch64_classify_address): Accept all offset
604 for frame access when strict_p is false.
606 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
608 Backport from trunk r213485, r213486, r213487.
609 2014-08-01 Renlin Li <renlin.li@arm.com>
610 Jiong Wang <jiong.wang@arm.com>
612 * config/aarch64/aarch64.c (offset_7bit_signed_scaled_p): Rename to
613 aarch64_offset_7bit_signed_scaled_p, remove static and use it.
614 * config/aarch64/aarch64-protos.h (aarch64_offset_7bit_signed_scaled_p):
616 * config/aarch64/predicates.md (aarch64_mem_pair_offset): Define new
618 * config/aarch64/aarch64.md (loadwb_pair, storewb_pair): Use
619 aarch64_mem_pair_offset.
621 2014-08-01 Jiong Wang <jiong.wang@arm.com>
623 * config/aarch64/aarch64.md (loadwb_pair<GPI:mode>_<P:mode>): Fix
625 (loadwb_pair<GPI:mode>_<P:mode>): Likewise.
626 * config/aarch64/aarch64.c (aarch64_gen_loadwb_pair): Likewise.
628 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
630 Backport from trunk r213379.
631 2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
633 * config/aarch64/aarch64-builtins.c
634 (aarch64_gimple_fold_builtin): Don't fold reduction operations for
637 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
639 Backport from trunk r213378.
640 2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
642 * config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Vary
643 the generated mask based on BYTES_BIG_ENDIAN.
644 (aarch64_simd_check_vect_par_cnst_half): New.
645 * config/aarch64/aarch64-protos.h
646 (aarch64_simd_check_vect_par_cnst_half): New.
647 * config/aarch64/predicates.md (vect_par_cnst_hi_half): Refactor
648 the check out to aarch64_simd_check_vect_par_cnst_half.
649 (vect_par_cnst_lo_half): Likewise.
650 * config/aarch64/aarch64-simd.md
651 (aarch64_simd_move_hi_quad_<mode>): Always use vec_par_cnst_lo_half.
652 (move_hi_quad_<mode>): Always generate a low mask.
654 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
656 Backport from trunk r212927, r213304.
657 2014-07-30 Jiong Wang <jiong.wang@arm.com>
659 * config/arm/arm.c (arm_get_frame_offsets): Adjust condition for
662 2014-07-23 Jiong Wang <jiong.wang@arm.com>
664 * config/arm/arm.c (arm_get_frame_offsets): If both r3 and other
665 callee-saved registers are available for padding purpose
666 and r3 is not mandatory, then prefer use those callee-saved
669 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
671 Backport from trunk r211717, r213692.
672 2014-08-07 Kugan Vivekanandarajah <kuganv@linaro.org>
674 * config/arm/arm.c (bdesc_2arg): Fix typo.
675 (arm_atomic_assign_expand_fenv): Remove The default implementation.
677 2014-06-17 Kugan Vivekanandarajah <kuganv@linaro.org>
679 * config/arm/arm.c (arm_atomic_assign_expand_fenv): call
680 default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
681 (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
682 __builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
683 * config/arm/vfp.md (set_fpscr): Make pattern conditional on
685 (get_fpscr) : Likewise.
687 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
689 Backport from trunk r212989, r213628.
690 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
692 * convert.c (convert_to_integer): Guard transformation to lrint by
695 2014-07-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
698 * convert.c (convert_to_integer): Do not convert BUILT_IN_ROUND and cast
699 when flag_errno_math is on.
701 2014-08-15 Yvan Roux <yvan.roux@linaro.org>
703 * LINARO-VERSION: Bump version.
705 2014-08-14 Yvan Roux <yvan.roux@linaro.org>
707 GCC Linaro 4.9-2014.08 released.
708 * LINARO-VERSION: Update.
710 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
712 Backport from trunk r212912, r212913.
713 2014-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
715 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle CLRSB, CLZ.
716 (case UNSPEC): Handle UNSPEC_RBIT.
718 2014-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
720 * config/aarch64/aarch64.md: Delete UNSPEC_CLS.
721 (clrsb<mode>2): Use clrsb RTL code instead of UNSPEC_CLS.
723 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
725 Backport from trunk r213555.
726 2014-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
729 * gcc/optabs.c (expand_atomic_test_and_set): Do not try to emit
730 move to subtarget in serial version if result is ignored.
732 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
734 Backport from trunk r213376.
735 2014-07-31 Charles Baylis <charles.baylis@linaro.org>
738 * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
739 constraints are satisfied.
740 (<shift>di3_neon): Likewise.
742 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
744 Backport from trunk r211270, r211271, r211273, r211275, r212943,
745 r212945, r212946, r212947, r212949, r212950, r212951, r212952, r212954,
746 r212955, r212956, r212957, r212958, r212976, r212996, r212997, r212999,
748 2014-07-24 Jiong Wang <jiong.wang@arm.com>
750 * config/aarch64/aarch64.c (aarch64_popwb_single_reg): New function.
751 (aarch64_expand_epilogue): Optimize epilogue when !frame_pointer_needed.
753 2014-07-24 Jiong Wang <jiong.wang@arm.com>
755 * config/aarch64/aarch64.c (aarch64_pushwb_single_reg): New function.
756 (aarch64_expand_prologue): Optimize prologue when !frame_pointer_needed.
758 2014-07-24 Jiong Wang <jiong.wang@arm.com>
760 * config/aarch64/aarch64.c (aarch64_restore_callee_saves)
761 (aarch64_save_callee_saves): New parameter "skip_wb".
762 (aarch64_expand_prologue, aarch64_expand_epilogue): Update call site.
764 2014-07-24 Jiong Wang <jiong.wang@arm.com>
766 * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and
768 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize above.
770 2014-07-24 Jiong Wang <jiong.wang@arm.com>
772 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't
773 subtract outgoing area size when restoring stack_pointer_rtx.
775 2014-07-23 Jiong Wang <jiong.wang@arm.com>
777 * config/aarch64/aarch64.c (aarch64_popwb_pair_reg)
778 (aarch64_gen_loadwb_pair): New helper function.
779 (aarch64_expand_epilogue): Simplify code using new helper functions.
780 * config/aarch64/aarch64.md (loadwb_pair<GPF:mode>_<P:mode>): Define.
782 2014-07-23 Jiong Wang <jiong.wang@arm.com>
784 * config/aarch64/aarch64.c (aarch64_pushwb_pair_reg)
785 (aarch64_gen_storewb_pair): New helper function.
786 (aarch64_expand_prologue): Simplify code using new helper functions.
787 * config/aarch64/aarch64.md (storewb_pair<GPF:mode>_<P:mode>): Define.
789 2014-07-23 Jiong Wang <jiong.wang@arm.com>
791 * config/aarch64/aarch64.md: (aarch64_save_or_restore_callee_saves):
792 Rename to aarch64_save_callee_saves, remove restore code.
793 (aarch64_restore_callee_saves): New function.
795 2014-07-23 Jiong Wang <jiong.wang@arm.com>
797 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted.
798 (aarch64_save_callee_saves): New function to handle reg save
799 for both core and vectore regs.
801 2014-07-23 Jiong Wang <jiong.wang@arm.com>
803 * config/aarch64/aarch64.c (aarch64_gen_load_pair)
804 (aarch64_gen_store_pair): New helper function.
805 (aarch64_save_or_restore_callee_save_registers)
806 (aarch64_save_or_restore_fprs): Use new helper functions.
808 2014-07-23 Jiong Wang <jiong.wang@arm.com>
810 * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
811 (aarch64_save_or_restore_callee_save_registers)
812 (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
814 2014-07-23 Jiong Wang <jiong.wang@arm.com>
816 * config/aarch64/aarch64.c
817 (aarch64_save_or_restore_callee_save_registers)
818 (aarch64_save_or_restore_fprs): Hoist calculation of register rtx.
820 2014-07-23 Jiong Wang <jiong.wang@arm.com>
822 * config/aarch64/aarch64.c
823 (aarch64_save_or_restore_callee_save_registers)
824 (aarch64_save_or_restore_fprs): Remove 'increment'.
826 2014-07-23 Jiong Wang <jiong.wang@arm.com>
828 * config/aarch64/aarch64.c
829 (aarch64_save_or_restore_callee_save_registers)
830 (aarch64_save_or_restore_fprs): Use register offset in
831 cfun->machine->frame.reg_offset.
833 2014-07-23 Jiong Wang <jiong.wang@arm.com>
835 * config/aarch64/aarch64.c
836 (aarch64_save_or_restore_callee_save_registers)
837 (aarch64_save_or_restore_fprs): Remove base_rtx.
839 2014-07-23 Jiong Wang <jiong.wang@arm.com>
841 * config/aarch64/aarch64.c
842 (aarch64_save_or_restore_callee_save_registers): Rename 'offset'
843 to 'start_offset'. Remove local variable 'start_offset'.
845 2014-07-23 Jiong Wang <jiong.wang@arm.com>
847 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Change
848 type to HOST_WIDE_INT.
850 2014-07-23 Jiong Wang <jiong.wang@arm.com>
852 * config/aarch64/aarch64.c (aarch64_expand_prologue)
853 (aarch64_save_or_restore_fprs)
854 (aarch64_save_or_restore_callee_save_registers): GNU-Stylize code.
856 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
858 * config/aarch64/aarch64.h (aarch64_frame): Add hard_fp_offset and
860 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize
861 aarch64_frame hard_fp_offset and frame_size.
862 (aarch64_expand_prologue): Use aarch64_frame hard_fp_offset and
863 frame_size; remove original_frame_size.
864 (aarch64_expand_epilogue, aarch64_final_eh_return_addr): Likewise.
865 (aarch64_initial_elimination_offset): Remove frame_size and
866 offset. Use aarch64_frame frame_size.
868 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
869 Jiong Wang <jiong.wang@arm.com>
871 * config/aarch64/aarch64.c (aarch64_layout_frame): Correct
872 initialization of R30 offset. Update offset. Iterate core
873 regisers upto X30. Remove X29, X30 specific code.
875 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
876 Jiong Wang <jiong.wang@arm.com>
878 * config/aarch64/aarch64.c (SLOT_NOT_REQUIRED, SLOT_REQUIRED): Define.
879 (aarch64_layout_frame): Use SLOT_NOT_REQUIRED and SLOT_REQUIRED.
880 (aarch64_register_saved_on_entry): Adjust test.
882 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
884 * config/aarch64/aarch64.h (machine_function): Move
885 saved_varargs_size from here...
886 (aarch64_frameGTY): ... to here.
888 * config/aarch64/aarch64.c (aarch64_expand_prologue)
889 (aarch64_expand_epilogue, aarch64_final_eh_return_addr)
890 (aarch64_initial_elimination_offset)
891 (aarch64_setup_incoming_varargs): Adjust location of
894 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
896 Backport from trunk r212753.
897 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
899 * config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
900 (aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.
902 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
904 Backport from trunk r212752.
905 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
907 * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Fix type.
908 (vmlal_high_lane_s32): Likewise.
909 (vmlal_high_lane_u16): Likewise.
910 (vmlal_high_lane_u32): Likewise.
911 (vmlsl_high_lane_s16): Likewise.
912 (vmlsl_high_lane_s32): Likewise.
913 (vmlsl_high_lane_u16): Likewise.
914 (vmlsl_high_lane_u32): Likewise.
916 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
918 Backport from trunk r212512.
919 2014-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
921 * config/arm/cortex-a15.md (cortex_a15_alu): Handle clz, rbit.
922 * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
923 * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
924 * config/arm/cortex-a7.md (cortex_a7_alu_reg): Likewise.
925 * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
926 * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
927 * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
929 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
931 Backport from trunk r212358.
932 2014-07-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
934 * config/arm/arm.c (cortexa5_extra_costs): New table.
935 (arm_cortex_a5_tune): Use cortexa5_extra_costs.
937 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
939 Backport from trunk r212296.
940 2014-07-04 Tom de Vries <tom@codesourcery.com>
942 * config/aarch64/aarch64-simd.md
943 (define_insn "vec_unpack_trunc_<mode>"): Fix constraint.
945 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
947 Backport from trunk r212142, r212225.
948 2014-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
950 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
953 2014-06-30 Alan Lawrence <alan.lawrence@arm.com>
955 * config/aarch64/aarch64-simd.md (vec_perm): Enable for bigendian.
956 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Remove assert
957 against bigendian and adjust indices.
959 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
961 Backport from trunk r211779.
962 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
964 * config/arm/arm_neon.h (vadd_f32): Change #ifdef to __FAST_MATH.
966 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
968 Backport from trunk r211503.
969 2014-06-12 Alan Lawrence <alan.lawrence@arm.com>
971 * config/aarch64/arm_neon.h (vmlaq_n_f64, vmlsq_n_f64, vrsrtsq_f64,
972 vcge_p8, vcgeq_p8, vcgez_p8, vcgez_u8, vcgez_u16, vcgez_u32, vcgez_u64,
973 vcgezq_p8, vcgezq_u8, vcgezq_u16, vcgezq_u32, vcgezq_u64, vcgezd_u64,
974 vcgt_p8, vcgtq_p8, vcgtz_p8, vcgtz_u8, vcgtz_u16, vcgtz_u32, vcgtz_u64,
975 vcgtzq_p8, vcgtzq_u8, vcgtzq_u16, vcgtzq_u32, vcgtzq_u64, vcgtzd_u64,
976 vcle_p8, vcleq_p8, vclez_p8, vclez_u64, vclezq_p8, vclezd_u64, vclt_p8,
977 vcltq_p8, vcltz_p8, vcltzq_p8, vcltzd_u64): Remove functions as they are
980 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
982 Backport from trunk r211140.
983 2014-06-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
985 * config/aarch64/aarch64.md (set_fpcr): Drop ISB after FPCR write.
987 2014-07-29 Yvan Roux <yvan.roux@linaro.org>
989 * LINARO-VERSION: Bump version.
991 2014-07-24 Yvan Roux <yvan.roux@linaro.org>
993 GCC Linaro 4.9-2014.07-1 released.
994 * LINARO-VERSION: Update.
996 2014-07-20 Yvan Roux <yvan.roux@linaro.org>
999 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1001 Backport from trunk r211129.
1002 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1005 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
1006 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
1007 with immediate_operand.
1009 2014-07-19 Yvan Roux <yvan.roux@linaro.org>
1011 * LINARO-VERSION: Bump version.
1013 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
1015 GCC Linaro 4.9-2014.07 released.
1016 * LINARO-VERSION: Update.
1018 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
1020 Backport from trunk r211887, r211899.
1021 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
1023 * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
1026 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
1028 * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
1031 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
1033 Backport from trunk r211440.
1034 2014-06-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1036 * config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers.
1037 * Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to
1039 * config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define.
1040 (aarch64_crc_builtin_datum): New struct.
1041 (aarch64_crc_builtin_data): New.
1042 (aarch64_init_crc32_builtins): New function.
1043 (aarch64_init_builtins): Initialise CRC32 builtins when appropriate.
1044 (aarch64_crc32_expand_builtin): New.
1045 (aarch64_expand_builtin): Add CRC32 builtin expansion case.
1046 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
1047 __ARM_FEATURE_CRC32 when appropriate.
1048 (TARGET_CRC32): Define.
1049 * config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H,
1050 UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH,
1051 UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values.
1052 (aarch64_<crc_variant>): New pattern.
1053 * config/aarch64/arm_acle.h: New file.
1054 * config/aarch64/iterators.md (CRC): New int iterator.
1055 (crc_variant, crc_mode): New int attributes.
1056 * doc/aarch64-acle-intrinsics.texi: New file.
1057 * doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics.
1058 Include aarch64-acle-intrinsics.texi.
1060 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
1062 Backport from trunk r211174.
1063 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
1065 * config/aarch64/aarch64-simd.md (aarch64_rev<REVERSE:rev-op><mode>):
1067 * config/aarch64/aarch64.c (aarch64_evpc_rev): New function.
1068 (aarch64_expand_vec_perm_const_1): Add call to aarch64_evpc_rev.
1069 * config/aarch64/iterators.md (REVERSE): New iterator.
1070 (UNSPEC_REV64, UNSPEC_REV32, UNSPEC_REV16): New enum elements.
1071 (rev_op): New int_attribute.
1072 * config/aarch64/arm_neon.h (vrev16_p8, vrev16_s8, vrev16_u8,
1073 vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8,
1074 vrev32_s16, vrev32_u8, vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8,
1075 vrev32q_s16, vrev32q_u8, vrev32q_u16, vrev64_f32, vrev64_p8,
1076 vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
1077 vrev64_u32, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8,
1078 vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32):
1079 Replace temporary __asm__ with __builtin_shuffle.
1081 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
1083 Backport from trunk r210216, r210218, r210219.
1084 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1086 * config/arm/arm_neon.h: Update comment.
1087 * config/arm/neon-docgen.ml: Delete.
1088 * config/arm/neon-gen.ml: Delete.
1089 * doc/arm-neon-intrinsics.texi: Update comment.
1091 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1093 * config/arm/arm_neon_builtins.def (vadd, vsub): Only define the v2sf
1095 (vand, vorr, veor, vorn, vbic): Remove.
1096 * config/arm/neon.md (neon_vadd, neon_vsub, neon_vadd_unspec): Adjust
1098 (neon_vsub_unspec): Likewise.
1099 (neon_vorr, neon_vand, neon_vbic, neon_veor, neon_vorn): Remove.
1101 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1103 * config/arm/arm_neon.h (vadd_s8): GNU C implementation
1104 (vadd_s16): Likewise.
1105 (vadd_s32): Likewise.
1106 (vadd_f32): Likewise.
1107 (vadd_u8): Likewise.
1108 (vadd_u16): Likewise.
1109 (vadd_u32): Likewise.
1110 (vadd_s64): Likewise.
1111 (vadd_u64): Likewise.
1112 (vaddq_s8): Likewise.
1113 (vaddq_s16): Likewise.
1114 (vaddq_s32): Likewise.
1115 (vaddq_s64): Likewise.
1116 (vaddq_f32): Likewise.
1117 (vaddq_u8): Likewise.
1118 (vaddq_u16): Likewise.
1119 (vaddq_u32): Likewise.
1120 (vaddq_u64): Likewise.
1121 (vmul_s8): Likewise.
1122 (vmul_s16): Likewise.
1123 (vmul_s32): Likewise.
1124 (vmul_f32): Likewise.
1125 (vmul_u8): Likewise.
1126 (vmul_u16): Likewise.
1127 (vmul_u32): Likewise.
1128 (vmul_p8): Likewise.
1129 (vmulq_s8): Likewise.
1130 (vmulq_s16): Likewise.
1131 (vmulq_s32): Likewise.
1132 (vmulq_f32): Likewise.
1133 (vmulq_u8): Likewise.
1134 (vmulq_u16): Likewise.
1135 (vmulq_u32): Likewise.
1136 (vsub_s8): Likewise.
1137 (vsub_s16): Likewise.
1138 (vsub_s32): Likewise.
1139 (vsub_f32): Likewise.
1140 (vsub_u8): Likewise.
1141 (vsub_u16): Likewise.
1142 (vsub_u32): Likewise.
1143 (vsub_s64): Likewise.
1144 (vsub_u64): Likewise.
1145 (vsubq_s8): Likewise.
1146 (vsubq_s16): Likewise.
1147 (vsubq_s32): Likewise.
1148 (vsubq_s64): Likewise.
1149 (vsubq_f32): Likewise.
1150 (vsubq_u8): Likewise.
1151 (vsubq_u16): Likewise.
1152 (vsubq_u32): Likewise.
1153 (vsubq_u64): Likewise.
1154 (vand_s8): Likewise.
1155 (vand_s16): Likewise.
1156 (vand_s32): Likewise.
1157 (vand_u8): Likewise.
1158 (vand_u16): Likewise.
1159 (vand_u32): Likewise.
1160 (vand_s64): Likewise.
1161 (vand_u64): Likewise.
1162 (vandq_s8): Likewise.
1163 (vandq_s16): Likewise.
1164 (vandq_s32): Likewise.
1165 (vandq_s64): Likewise.
1166 (vandq_u8): Likewise.
1167 (vandq_u16): Likewise.
1168 (vandq_u32): Likewise.
1169 (vandq_u64): Likewise.
1170 (vorr_s8): Likewise.
1171 (vorr_s16): Likewise.
1172 (vorr_s32): Likewise.
1173 (vorr_u8): Likewise.
1174 (vorr_u16): Likewise.
1175 (vorr_u32): Likewise.
1176 (vorr_s64): Likewise.
1177 (vorr_u64): Likewise.
1178 (vorrq_s8): Likewise.
1179 (vorrq_s16): Likewise.
1180 (vorrq_s32): Likewise.
1181 (vorrq_s64): Likewise.
1182 (vorrq_u8): Likewise.
1183 (vorrq_u16): Likewise.
1184 (vorrq_u32): Likewise.
1185 (vorrq_u64): Likewise.
1186 (veor_s8): Likewise.
1187 (veor_s16): Likewise.
1188 (veor_s32): Likewise.
1189 (veor_u8): Likewise.
1190 (veor_u16): Likewise.
1191 (veor_u32): Likewise.
1192 (veor_s64): Likewise.
1193 (veor_u64): Likewise.
1194 (veorq_s8): Likewise.
1195 (veorq_s16): Likewise.
1196 (veorq_s32): Likewise.
1197 (veorq_s64): Likewise.
1198 (veorq_u8): Likewise.
1199 (veorq_u16): Likewise.
1200 (veorq_u32): Likewise.
1201 (veorq_u64): Likewise.
1202 (vbic_s8): Likewise.
1203 (vbic_s16): Likewise.
1204 (vbic_s32): Likewise.
1205 (vbic_u8): Likewise.
1206 (vbic_u16): Likewise.
1207 (vbic_u32): Likewise.
1208 (vbic_s64): Likewise.
1209 (vbic_u64): Likewise.
1210 (vbicq_s8): Likewise.
1211 (vbicq_s16): Likewise.
1212 (vbicq_s32): Likewise.
1213 (vbicq_s64): Likewise.
1214 (vbicq_u8): Likewise.
1215 (vbicq_u16): Likewise.
1216 (vbicq_u32): Likewise.
1217 (vbicq_u64): Likewise.
1218 (vorn_s8): Likewise.
1219 (vorn_s16): Likewise.
1220 (vorn_s32): Likewise.
1221 (vorn_u8): Likewise.
1222 (vorn_u16): Likewise.
1223 (vorn_u32): Likewise.
1224 (vorn_s64): Likewise.
1225 (vorn_u64): Likewise.
1226 (vornq_s8): Likewise.
1227 (vornq_s16): Likewise.
1228 (vornq_s32): Likewise.
1229 (vornq_s64): Likewise.
1230 (vornq_u8): Likewise.
1231 (vornq_u16): Likewise.
1232 (vornq_u32): Likewise.
1233 (vornq_u64): Likewise.
1235 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1237 Backport from trunk r210151.
1238 2014-05-07 Alan Lawrence <alan.lawrence@arm.com>
1240 * config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8,
1241 vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32,
1242 vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32,
1243 vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32,
1244 vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8,
1245 vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
1246 vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16,
1247 vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle.
1249 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1251 Backport from trunk r209794.
1252 2014-04-25 Marek Polacek <polacek@redhat.com>
1255 * c-parser.c (c_parser_initelt): Pass input_location to
1256 process_init_element.
1257 (c_parser_initval): Pass loc to process_init_element.
1258 * c-tree.h (process_init_element): Adjust declaration.
1259 * c-typeck.c (push_init_level): Pass input_location to
1260 process_init_element.
1261 (pop_init_level): Likewise.
1262 (set_designator): Likewise.
1263 (output_init_element): Add location_t parameter. Pass loc to
1265 (output_pending_init_elements): Pass input_location to
1266 output_init_element.
1267 (process_init_element): Add location_t parameter. Pass loc to
1268 output_init_element.
1270 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1272 Backport from trunk r211771.
1273 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1275 * genattrtab.c (n_bypassed): New variable.
1276 (process_bypasses): Initialise n_bypassed.
1277 Count number of bypassed reservations.
1278 (make_automaton_attrs): Allocate space for bypassed reservations
1279 rather than number of bypasses.
1281 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1283 Backport from trunk r210861.
1284 2014-05-23 Jiong Wang <jiong.wang@arm.com>
1286 * config/aarch64/predicates.md (aarch64_call_insn_operand): New
1288 * config/aarch64/constraints.md ("Ucs", "Usf"): New constraints.
1289 * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
1290 Adjust for tailcalling through registers.
1291 * config/aarch64/aarch64.h (enum reg_class): New caller save
1293 (REG_CLASS_NAMES): Likewise.
1294 (REG_CLASS_CONTENTS): Likewise.
1295 * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
1296 Allow tailcalling without decls.
1298 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1300 Backport from trunk r211314.
1301 2014-06-06 James Greenhalgh <james.greenhalgh@arm.com>
1303 * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
1304 * config/aarch64/aarch64.c (aarch64_move_pointer): New.
1305 (aarch64_progress_pointer): Likewise.
1306 (aarch64_copy_one_part_and_move_pointers): Likewise.
1307 (aarch64_expand_movmen): Likewise.
1308 * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
1309 * config/aarch64/aarch64.md (movmem<mode>): New.
1311 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1313 Backport from trunk r211185, 211186.
1314 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
1316 * gcc/config/aarch64/aarch64-builtins.c
1317 (aarch64_types_binop_uus_qualifiers,
1318 aarch64_types_shift_to_unsigned_qualifiers,
1319 aarch64_types_unsigned_shiftacc_qualifiers): Define.
1320 * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
1321 uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
1322 sqshlu_n, uqshl_n): Update qualifiers.
1323 * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
1324 vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
1325 vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
1326 vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
1327 vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
1328 vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
1329 vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
1330 vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
1331 vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
1332 vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
1333 vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
1334 vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
1335 vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
1336 vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
1337 vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
1338 vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
1339 vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
1340 vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
1341 vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
1342 vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
1343 vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
1344 vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
1345 vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
1346 vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
1347 vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
1348 vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
1349 vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
1351 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
1353 * gcc/config/aarch64/aarch64-builtins.c
1354 (aarch64_types_binop_ssu_qualifiers): New static data.
1355 (TYPES_BINOP_SSU): Define.
1356 * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
1357 urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
1358 * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
1359 vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
1360 vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
1361 vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
1362 vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32, 52
1363 vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64, 53
1364 vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
1365 suffix to builtin function name, remove cast. 55
1366 (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
1367 vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8, 57
1368 vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
1370 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1372 Backport from trunk r211408, 211416.
1373 2014-06-10 Marcus Shawcroft <marcus.shawcroft@arm.com>
1375 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
1376 REG_CFA_RESTORE mode.
1378 2014-06-10 Jiong Wang <jiong.wang@arm.com>
1380 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
1381 (aarch64_save_or_restore_callee_save_registers): Fix layout.
1383 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1385 Backport from trunk r211418.
1386 2014-06-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1388 * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
1389 Change second alternative type to f_mcr.
1390 * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
1391 and 12th alternatives' types to f_mcr and f_mrc.
1392 (*movdi_aarch64): Same for 12th and 13th alternatives.
1393 (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
1394 (aarch64_movtilow_tilow): Change type to fmov.
1396 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1398 Backport from trunk r211371.
1399 2014-06-09 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1401 * config/arm/arm-modes.def: Remove XFmode.
1403 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1405 Backport from trunk r211268.
1406 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
1408 * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
1411 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1413 Backport from trunk r211129.
1414 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1417 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
1418 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
1419 with immediate_operand.
1421 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1423 Backport from trunk r211073.
1424 2014-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1426 * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
1428 * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
1430 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1432 Backport from trunk r211050.
1433 2014-05-29 Richard Earnshaw <rearnsha@arm.com>
1434 Richard Sandiford <rdsandiford@googlemail.com>
1436 * arm/iterators.md (shiftable_ops): New code iterator.
1437 (t2_binop0, arith_shift_insn): New code attributes.
1438 * arm/predicates.md (shift_nomul_operator): New predicate.
1439 * arm/arm.md (insn_enabled): Delete.
1440 (enabled): Remove insn_enabled test.
1441 (*arith_shiftsi): Delete. Replace with ...
1442 (*<arith_shift_insn>_multsi): ... new pattern.
1443 (*<arith_shift_insn>_shiftsi): ... new pattern.
1444 * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
1446 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1448 Backport from trunk r210996.
1449 2014-05-27 Andrew Pinski <apinski@cavium.com>
1451 * config/aarch64/aarch64.md (stack_protect_set_<mode>):
1452 Use <w> for the register in assembly template.
1453 (stack_protect_test): Use the mode of operands[0] for the
1455 (stack_protect_test_<mode>): Use <w> for the register
1456 in assembly template.
1458 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1460 Backport from trunk r210967.
1461 2014-05-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1463 * config/arm/neon.md (neon_bswap<mode>): New pattern.
1464 * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
1465 (arm_init_neon_builtins): Handle NEON_BSWAP.
1466 Define required type nodes.
1467 (arm_expand_neon_builtin): Handle NEON_BSWAP.
1468 (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
1469 * config/arm/arm_neon_builtins.def (bswap): Define builtins.
1470 * config/arm/iterators.md (VDQHSD): New mode iterator.
1472 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1474 Backport from trunk r210471.
1475 2014-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1477 * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
1478 enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
1480 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1482 Backport from trunk r210369.
1483 2014-05-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1485 * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
1486 (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
1487 Remove associated type declarations and initialisations.
1488 (arm_expand_neon_builtin): Likewise.
1489 (neon_emit_pair_result_insn): Delete.
1490 * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
1491 * config/arm/neon.md (neon_vtrn<mode>): Delete.
1492 (neon_vzip<mode>): Likewise.
1493 (neon_vuzp<mode>): Likewise.
1495 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1497 Backport from trunk r211058, 211177.
1498 2014-05-29 Alan Lawrence <alan.lawrence@arm.com>
1500 * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
1501 TYPES_BINOPV): New static data.
1502 * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
1503 * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
1505 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
1507 (aarch64_evpc_ext): New function.
1509 * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
1511 * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
1512 vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
1513 vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
1514 vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
1515 vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
1517 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
1519 * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
1522 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1524 Backport from trunk r209797.
1525 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1527 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
1528 Use HOST_WIDE_INT_C for mask literal.
1529 (aarch_rev16_shleft_mask_imm_p): Likewise.
1531 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1533 Backport from trunk r211148.
1534 2014-06-02 Andrew Pinski <apinski@cavium.com>
1536 * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
1537 /lib/ld-linux32-aarch64.so.1 is used for ILP32.
1538 (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
1539 file whose name depends on -mabi= and -mbig-endian.
1540 * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
1541 better and handle ilp32 too.
1542 (MULTILIB_OPTIONS): Delete.
1543 (MULTILIB_DIRNAMES): Delete.
1545 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1547 Backport from trunk r210828, r211103.
1548 2014-05-31 Kugan Vivekanandarajah <kuganv@linaro.org>
1550 * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
1551 (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
1552 (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
1553 and __builtins_arm_get_fpscr.
1554 (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
1555 __builtins_arm_get_fpscr.
1556 (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
1557 __builtins_arm_ldfpscr.
1558 (arm_atomic_assign_expand_fenv): New function.
1559 * config/arm/vfp.md (set_fpscr): New pattern.
1560 (get_fpscr) : Likewise.
1561 * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
1563 * doc/extend.texi (AARCH64 Built-in Functions) : Document
1564 __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
1566 2014-05-23 Kugan Vivekanandarajah <kuganv@linaro.org>
1568 * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
1570 * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
1571 New function declaration.
1572 * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
1573 AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
1574 AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
1575 (aarch64_init_builtins) : Initialize builtins
1576 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
1577 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
1578 (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
1579 __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
1580 and __builtins_aarch64_set_fpsr.
1581 (aarch64_atomic_assign_expand_fenv): New function.
1582 * config/aarch64/aarch64.md (set_fpcr): New pattern.
1583 (get_fpcr) : Likewise.
1584 (set_fpsr) : Likewise.
1585 (get_fpsr) : Likewise.
1586 (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
1587 and UNSPECV_SET_FPSR.
1588 * doc/extend.texi (AARCH64 Built-in Functions) : Document
1589 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
1590 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
1592 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1594 Backport from trunk r210355.
1595 2014-05-13 Ian Bolton <ian.bolton@arm.com>
1597 * config/aarch64/aarch64-protos.h
1598 (aarch64_hard_regno_caller_save_mode): New prototype.
1599 * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
1601 * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
1603 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
1605 Backport from trunk r209943.
1606 2014-04-30 Alan Lawrence <alan.lawrence@arm.com>
1608 * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
1609 vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
1610 vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
1611 vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
1612 vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
1613 vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
1614 vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
1615 vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
1617 2014-06-26 Yvan Roux <yvan.roux@linaro.org>
1619 * LINARO-VERSION: Bump version.
1621 2014-06-25 Yvan Roux <yvan.roux@linaro.org>
1623 GCC Linaro 4.9-2014.06-1 released.
1624 * LINARO-VERSION: Update.
1626 2014-06-24 Yvan Roux <yvan.roux@linaro.org>
1629 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1631 Backport from trunk r209643.
1632 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1634 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
1636 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
1638 Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
1639 210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
1640 210508, 210509, 210510, 210512, 211205, 211206.
1641 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1643 * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
1644 (cpu_addrcost_table): Use it.
1645 * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
1646 (aarch64_address_cost): Rewrite using aarch64_classify_address,
1649 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1651 * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
1652 (cortexa57_vector_cost): Likewise.
1653 (cortexa57_tunings): Use them.
1655 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1657 * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
1658 (TARGET_RTX_COSTS): Call it.
1660 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1661 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1663 * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
1664 emit instructions, return number of instructions which would
1666 (aarch64_add_constant): Update call to aarch64_build_constant.
1667 (aarch64_output_mi_thunk): Likewise.
1668 (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
1671 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1672 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1674 * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
1676 (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
1678 (aarch64_rtx_mult_cost): New.
1679 (aarch64_rtx_costs): Use it, refactor as appropriate.
1681 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1683 * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
1685 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1686 Philip Tomsich <philipp.tomsich@theobroma-systems.com>
1688 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
1691 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1692 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1694 * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
1695 costs when costing loads and stores to memory.
1697 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1698 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1700 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
1703 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1704 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1706 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
1707 ZERO_EXTEND and SIGN_EXTEND better.
1709 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1710 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1712 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1715 2014-03-16 James Greenhalgh <james.greenhalgh@arm.com>
1716 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1718 * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
1719 (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
1721 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1722 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1724 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1727 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1728 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1730 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
1733 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1734 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1736 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
1737 FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
1739 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1740 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
1742 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
1744 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1746 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
1749 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1751 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
1752 where we were unable to cost an RTX.
1754 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
1756 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
1758 2014-06-03 Andrew Pinski <apinski@cavium.com>
1760 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
1761 (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
1763 2014-06-03 Andrew Pinski <apinski@cavium.com>
1765 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
1766 comparisons for OP0.
1768 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
1770 * LINARO-VERSION: Bump version.
1772 2014-06-12 Yvan Roux <yvan.roux@linaro.org>
1774 GCC Linaro 4.9-2014.06 released.
1775 * LINARO-VERSION: Update.
1777 2014-06-04 Yvan Roux <yvan.roux@linaro.org>
1779 Backport from trunk r211211.
1780 2014-06-04 Bin Cheng <bin.cheng@arm.com>
1782 * config/aarch64/aarch64.c (aarch64_classify_address)
1783 (aarch64_legitimize_reload_address): Support full addressing modes
1785 * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
1786 (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
1788 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1790 Backport from trunk r209906.
1791 2014-04-29 Alan Lawrence <alan.lawrence@arm.com>
1793 * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
1794 vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
1795 vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
1796 vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
1797 vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
1798 vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
1799 vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
1800 vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
1802 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1804 Backport from trunk r209897.
1805 2014-04-29 James Greenhalgh <james.greenhalgh@arm.com>
1807 * calls.c (initialize_argument_information): Always treat
1808 PUSH_ARGS_REVERSED as 1, simplify code accordingly.
1809 (expand_call): Likewise.
1810 (emit_library_call_calue_1): Likewise.
1811 * expr.c (PUSH_ARGS_REVERSED): Do not define.
1812 (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
1815 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1817 Backport from trunk r209880.
1818 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
1820 * config/aarch64/aarch64-builtins.c
1821 (aarch64_types_storestruct_lane_qualifiers): New.
1822 (TYPES_STORESTRUCT_LANE): Likewise.
1823 * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
1824 (st3_lane): Likewise.
1825 (st4_lane): Likewise.
1826 * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
1827 (vec_store_lanesci_lane<mode>): Likewise.
1828 (vec_store_lanesxi_lane<mode>): Likewise.
1829 (aarch64_st2_lane<VQ:mode>): Likewise.
1830 (aarch64_st3_lane<VQ:mode>): Likewise.
1831 (aarch64_st4_lane<VQ:mode>): Likewise.
1832 * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
1833 * config/aarch64/arm_neon.h
1834 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
1835 use new macro arguments.
1836 (__ST3_LANE_FUNC): Likewise.
1837 (__ST4_LANE_FUNC): Likewise.
1838 * config/aarch64/iterators.md (V_TWO_ELEM): New.
1839 (V_THREE_ELEM): Likewise.
1840 (V_FOUR_ELEM): Likewise.
1842 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1844 Backport from trunk r209878.
1845 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
1847 * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
1848 * config/aarch64/aarch64.c
1849 (aarch64_cannot_change_mode_class): Weaken conditions.
1850 (aarch64_modes_tieable_p): New.
1851 * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
1853 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1855 Backport from trunk r209808.
1856 2014-04-25 Jiong Wang <jiong.wang@arm.com>
1858 * config/arm/predicates.md (call_insn_operand): Add long_call check.
1859 * config/arm/arm.md (sibcall, sibcall_value): Force the address to
1861 * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
1864 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1866 Backport from trunk r209806.
1867 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1869 * config/arm/arm.c (arm_cortex_a8_tune): Initialise
1872 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
1874 Backport from trunk r209742, 209749.
1875 2014-04-24 Alan Lawrence <alan.lawrence@arm.com>
1877 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
1879 2014-04-24 Tejas Belagod <tejas.belagod@arm.com>
1881 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
1884 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1886 Backport from trunk r209736.
1887 2014-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1889 * config/aarch64/aarch64-builtins.c
1890 (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
1891 BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
1892 * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
1893 * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
1895 * config/aarch64/iterator.md (VDQHSD): New mode iterator.
1896 (Vrevsuff): New mode attribute.
1898 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1900 Backport from trunk r209712.
1901 2014-04-23 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
1903 * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
1904 (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
1905 machine descriptions for Stack Smashing Protector.
1907 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1909 Backport from trunk r209711.
1910 2014-04-23 Richard Earnshaw <rearnsha@arm.com>
1912 * aarch64.md (<optab>_rol<mode>3): New pattern.
1913 (<optab>_rolsi3_uxtw): Likewise.
1914 * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
1916 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1918 Backport from trunk r209710.
1919 2014-04-23 James Greenhalgh <james.greenhalgh@arm.com>
1921 * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
1922 (arm_cortex_a12_tune): Likewise.
1924 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1926 Backport from trunk r209706.
1927 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1929 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
1931 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1933 Backport from trunk r209701, 209702, 209703, 209704, 209705.
1934 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1936 * config/arm/arm.md (arm_rev16si2): New pattern.
1937 (arm_rev16si2_alt): Likewise.
1938 * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
1940 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1941 * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
1942 (rev16<mode>2_alt): Likewise.
1943 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
1944 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
1945 (aarch_rev16_shleft_mask_imm_p): Likewise.
1946 (aarch_rev16_p_1): Likewise.
1947 (aarch_rev16_p): Likewise.
1948 * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
1949 (aarch_rev16_shright_mask_imm_p): Likewise.
1950 (aarch_rev16_shleft_mask_imm_p): Likewise.
1952 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1954 * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
1955 * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
1957 (cortex_a53_extra_costs): Likewise.
1958 (cortex_a57_extra_costs): Likewise.
1959 * config/arm/arm.c (cortexa9_extra_costs): Likewise.
1960 (cortexa7_extra_costs): Likewise.
1961 (cortexa8_extra_costs): Likewise.
1962 (cortexa12_extra_costs): Likewise.
1963 (cortexa15_extra_costs): Likewise.
1964 (v7m_extra_costs): Likewise.
1965 (arm_new_rtx_costs): Handle BSWAP.
1967 2013-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1969 * config/arm/arm.c (cortexa8_extra_costs): New table.
1970 (arm_cortex_a8_tune): New tuning struct.
1971 * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
1973 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1975 * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
1977 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1979 Backport from trunk r209659.
1980 2014-04-22 Richard Henderson <rth@redhat.com>
1982 * config/aarch64/aarch64 (addti3, subti3): New expanders.
1983 (add<GPI>3_compare0): Remove leading * from name.
1984 (add<GPI>3_carryin): Likewise.
1985 (sub<GPI>3_compare0): Likewise.
1986 (sub<GPI>3_carryin): Likewise.
1987 (<su_optab>mulditi3): New expander.
1988 (multi3): New expander.
1989 (madd<GPI>): Remove leading * from name.
1991 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
1993 Backport from trunk r209645.
1994 2014-04-22 Andrew Pinski <apinski@cavium.com>
1996 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
1997 Handle TLS for ILP32.
1998 * config/aarch64/aarch64.md (tlsie_small): Rename to ...
1999 (tlsie_small_<mode>): this and handle PTR.
2000 (tlsie_small_sidi): New pattern.
2001 (tlsle_small): Change to an expand to handle ILP32.
2002 (tlsle_small_<mode>): New pattern.
2003 (tlsdesc_small): Rename to ...
2004 (tlsdesc_small_<mode>): this and handle PTR.
2006 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2008 Backport from trunk r209643.
2009 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2011 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
2013 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2015 Backport from trunk r209641, 209642.
2016 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
2018 * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
2019 (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
2020 (aarch64_types_signed_poly_qualifiers): Likewise.
2021 (aarch64_types_unsigned_signed_qualifiers): Likewise.
2022 (aarch64_types_poly_signed_qualifiers): Likewise.
2023 (TYPES_REINTERP_SS): Type macro added.
2024 (TYPES_REINTERP_SU): Likewise.
2025 (TYPES_REINTERP_SP): Likewise.
2026 (TYPES_REINTERP_US): Likewise.
2027 (TYPES_REINTERP_PS): Likewise.
2028 (aarch64_fold_builtin): New expression folding added.
2029 * config/aarch64/aarch64-simd-builtins.def (REINTERP):
2030 Declarations removed.
2031 (REINTERP_SS): Declarations added.
2032 (REINTERP_US): Likewise.
2033 (REINTERP_PS): Likewise.
2034 (REINTERP_SU): Likewise.
2035 (REINTERP_SP): Likewise.
2036 * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
2037 (vreinterpretq_p8_f64): Likewise.
2038 (vreinterpret_p16_f64): Likewise.
2039 (vreinterpretq_p16_f64): Likewise.
2040 (vreinterpret_f32_f64): Likewise.
2041 (vreinterpretq_f32_f64): Likewise.
2042 (vreinterpret_f64_f32): Likewise.
2043 (vreinterpret_f64_p8): Likewise.
2044 (vreinterpret_f64_p16): Likewise.
2045 (vreinterpret_f64_s8): Likewise.
2046 (vreinterpret_f64_s16): Likewise.
2047 (vreinterpret_f64_s32): Likewise.
2048 (vreinterpret_f64_s64): Likewise.
2049 (vreinterpret_f64_u8): Likewise.
2050 (vreinterpret_f64_u16): Likewise.
2051 (vreinterpret_f64_u32): Likewise.
2052 (vreinterpret_f64_u64): Likewise.
2053 (vreinterpretq_f64_f32): Likewise.
2054 (vreinterpretq_f64_p8): Likewise.
2055 (vreinterpretq_f64_p16): Likewise.
2056 (vreinterpretq_f64_s8): Likewise.
2057 (vreinterpretq_f64_s16): Likewise.
2058 (vreinterpretq_f64_s32): Likewise.
2059 (vreinterpretq_f64_s64): Likewise.
2060 (vreinterpretq_f64_u8): Likewise.
2061 (vreinterpretq_f64_u16): Likewise.
2062 (vreinterpretq_f64_u32): Likewise.
2063 (vreinterpretq_f64_u64): Likewise.
2064 (vreinterpret_s64_f64): Likewise.
2065 (vreinterpretq_s64_f64): Likewise.
2066 (vreinterpret_u64_f64): Likewise.
2067 (vreinterpretq_u64_f64): Likewise.
2068 (vreinterpret_s8_f64): Likewise.
2069 (vreinterpretq_s8_f64): Likewise.
2070 (vreinterpret_s16_f64): Likewise.
2071 (vreinterpretq_s16_f64): Likewise.
2072 (vreinterpret_s32_f64): Likewise.
2073 (vreinterpretq_s32_f64): Likewise.
2074 (vreinterpret_u8_f64): Likewise.
2075 (vreinterpretq_u8_f64): Likewise.
2076 (vreinterpret_u16_f64): Likewise.
2077 (vreinterpretq_u16_f64): Likewise.
2078 (vreinterpret_u32_f64): Likewise.
2079 (vreinterpretq_u32_f64): Likewise.
2081 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
2083 * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
2084 * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
2085 (vreinterpret_p8_s8): Likewise.
2086 * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
2087 (vreinterpret_p8_s16): Likewise.
2088 (vreinterpret_p8_s32): Likewise.
2089 (vreinterpret_p8_s64): Likewise.
2090 (vreinterpret_p8_f32): Likewise.
2091 (vreinterpret_p8_u8): Likewise.
2092 (vreinterpret_p8_u16): Likewise.
2093 (vreinterpret_p8_u32): Likewise.
2094 (vreinterpret_p8_u64): Likewise.
2095 (vreinterpret_p8_p16): Likewise.
2096 (vreinterpretq_p8_s8): Likewise.
2097 (vreinterpretq_p8_s16): Likewise.
2098 (vreinterpretq_p8_s32): Likewise.
2099 (vreinterpretq_p8_s64): Likewise.
2100 (vreinterpretq_p8_f32): Likewise.
2101 (vreinterpretq_p8_u8): Likewise.
2102 (vreinterpretq_p8_u16): Likewise.
2103 (vreinterpretq_p8_u32): Likewise.
2104 (vreinterpretq_p8_u64): Likewise.
2105 (vreinterpretq_p8_p16): Likewise.
2106 (vreinterpret_p16_s8): Likewise.
2107 (vreinterpret_p16_s16): Likewise.
2108 (vreinterpret_p16_s32): Likewise.
2109 (vreinterpret_p16_s64): Likewise.
2110 (vreinterpret_p16_f32): Likewise.
2111 (vreinterpret_p16_u8): Likewise.
2112 (vreinterpret_p16_u16): Likewise.
2113 (vreinterpret_p16_u32): Likewise.
2114 (vreinterpret_p16_u64): Likewise.
2115 (vreinterpret_p16_p8): Likewise.
2116 (vreinterpretq_p16_s8): Likewise.
2117 (vreinterpretq_p16_s16): Likewise.
2118 (vreinterpretq_p16_s32): Likewise.
2119 (vreinterpretq_p16_s64): Likewise.
2120 (vreinterpretq_p16_f32): Likewise.
2121 (vreinterpretq_p16_u8): Likewise.
2122 (vreinterpretq_p16_u16): Likewise.
2123 (vreinterpretq_p16_u32): Likewise.
2124 (vreinterpretq_p16_u64): Likewise.
2125 (vreinterpretq_p16_p8): Likewise.
2126 (vreinterpret_f32_s8): Likewise.
2127 (vreinterpret_f32_s16): Likewise.
2128 (vreinterpret_f32_s32): Likewise.
2129 (vreinterpret_f32_s64): Likewise.
2130 (vreinterpret_f32_u8): Likewise.
2131 (vreinterpret_f32_u16): Likewise.
2132 (vreinterpret_f32_u32): Likewise.
2133 (vreinterpret_f32_u64): Likewise.
2134 (vreinterpret_f32_p8): Likewise.
2135 (vreinterpret_f32_p16): Likewise.
2136 (vreinterpretq_f32_s8): Likewise.
2137 (vreinterpretq_f32_s16): Likewise.
2138 (vreinterpretq_f32_s32): Likewise.
2139 (vreinterpretq_f32_s64): Likewise.
2140 (vreinterpretq_f32_u8): Likewise.
2141 (vreinterpretq_f32_u16): Likewise.
2142 (vreinterpretq_f32_u32): Likewise.
2143 (vreinterpretq_f32_u64): Likewise.
2144 (vreinterpretq_f32_p8): Likewise.
2145 (vreinterpretq_f32_p16): Likewise.
2146 (vreinterpret_s64_s8): Likewise.
2147 (vreinterpret_s64_s16): Likewise.
2148 (vreinterpret_s64_s32): Likewise.
2149 (vreinterpret_s64_f32): Likewise.
2150 (vreinterpret_s64_u8): Likewise.
2151 (vreinterpret_s64_u16): Likewise.
2152 (vreinterpret_s64_u32): Likewise.
2153 (vreinterpret_s64_u64): Likewise.
2154 (vreinterpret_s64_p8): Likewise.
2155 (vreinterpret_s64_p16): Likewise.
2156 (vreinterpretq_s64_s8): Likewise.
2157 (vreinterpretq_s64_s16): Likewise.
2158 (vreinterpretq_s64_s32): Likewise.
2159 (vreinterpretq_s64_f32): Likewise.
2160 (vreinterpretq_s64_u8): Likewise.
2161 (vreinterpretq_s64_u16): Likewise.
2162 (vreinterpretq_s64_u32): Likewise.
2163 (vreinterpretq_s64_u64): Likewise.
2164 (vreinterpretq_s64_p8): Likewise.
2165 (vreinterpretq_s64_p16): Likewise.
2166 (vreinterpret_u64_s8): Likewise.
2167 (vreinterpret_u64_s16): Likewise.
2168 (vreinterpret_u64_s32): Likewise.
2169 (vreinterpret_u64_s64): Likewise.
2170 (vreinterpret_u64_f32): Likewise.
2171 (vreinterpret_u64_u8): Likewise.
2172 (vreinterpret_u64_u16): Likewise.
2173 (vreinterpret_u64_u32): Likewise.
2174 (vreinterpret_u64_p8): Likewise.
2175 (vreinterpret_u64_p16): Likewise.
2176 (vreinterpretq_u64_s8): Likewise.
2177 (vreinterpretq_u64_s16): Likewise.
2178 (vreinterpretq_u64_s32): Likewise.
2179 (vreinterpretq_u64_s64): Likewise.
2180 (vreinterpretq_u64_f32): Likewise.
2181 (vreinterpretq_u64_u8): Likewise.
2182 (vreinterpretq_u64_u16): Likewise.
2183 (vreinterpretq_u64_u32): Likewise.
2184 (vreinterpretq_u64_p8): Likewise.
2185 (vreinterpretq_u64_p16): Likewise.
2186 (vreinterpret_s8_s16): Likewise.
2187 (vreinterpret_s8_s32): Likewise.
2188 (vreinterpret_s8_s64): Likewise.
2189 (vreinterpret_s8_f32): Likewise.
2190 (vreinterpret_s8_u8): Likewise.
2191 (vreinterpret_s8_u16): Likewise.
2192 (vreinterpret_s8_u32): Likewise.
2193 (vreinterpret_s8_u64): Likewise.
2194 (vreinterpret_s8_p8): Likewise.
2195 (vreinterpret_s8_p16): Likewise.
2196 (vreinterpretq_s8_s16): Likewise.
2197 (vreinterpretq_s8_s32): Likewise.
2198 (vreinterpretq_s8_s64): Likewise.
2199 (vreinterpretq_s8_f32): Likewise.
2200 (vreinterpretq_s8_u8): Likewise.
2201 (vreinterpretq_s8_u16): Likewise.
2202 (vreinterpretq_s8_u32): Likewise.
2203 (vreinterpretq_s8_u64): Likewise.
2204 (vreinterpretq_s8_p8): Likewise.
2205 (vreinterpretq_s8_p16): Likewise.
2206 (vreinterpret_s16_s8): Likewise.
2207 (vreinterpret_s16_s32): Likewise.
2208 (vreinterpret_s16_s64): Likewise.
2209 (vreinterpret_s16_f32): Likewise.
2210 (vreinterpret_s16_u8): Likewise.
2211 (vreinterpret_s16_u16): Likewise.
2212 (vreinterpret_s16_u32): Likewise.
2213 (vreinterpret_s16_u64): Likewise.
2214 (vreinterpret_s16_p8): Likewise.
2215 (vreinterpret_s16_p16): Likewise.
2216 (vreinterpretq_s16_s8): Likewise.
2217 (vreinterpretq_s16_s32): Likewise.
2218 (vreinterpretq_s16_s64): Likewise.
2219 (vreinterpretq_s16_f32): Likewise.
2220 (vreinterpretq_s16_u8): Likewise.
2221 (vreinterpretq_s16_u16): Likewise.
2222 (vreinterpretq_s16_u32): Likewise.
2223 (vreinterpretq_s16_u64): Likewise.
2224 (vreinterpretq_s16_p8): Likewise.
2225 (vreinterpretq_s16_p16): Likewise.
2226 (vreinterpret_s32_s8): Likewise.
2227 (vreinterpret_s32_s16): Likewise.
2228 (vreinterpret_s32_s64): Likewise.
2229 (vreinterpret_s32_f32): Likewise.
2230 (vreinterpret_s32_u8): Likewise.
2231 (vreinterpret_s32_u16): Likewise.
2232 (vreinterpret_s32_u32): Likewise.
2233 (vreinterpret_s32_u64): Likewise.
2234 (vreinterpret_s32_p8): Likewise.
2235 (vreinterpret_s32_p16): Likewise.
2236 (vreinterpretq_s32_s8): Likewise.
2237 (vreinterpretq_s32_s16): Likewise.
2238 (vreinterpretq_s32_s64): Likewise.
2239 (vreinterpretq_s32_f32): Likewise.
2240 (vreinterpretq_s32_u8): Likewise.
2241 (vreinterpretq_s32_u16): Likewise.
2242 (vreinterpretq_s32_u32): Likewise.
2243 (vreinterpretq_s32_u64): Likewise.
2244 (vreinterpretq_s32_p8): Likewise.
2245 (vreinterpretq_s32_p16): Likewise.
2246 (vreinterpret_u8_s8): Likewise.
2247 (vreinterpret_u8_s16): Likewise.
2248 (vreinterpret_u8_s32): Likewise.
2249 (vreinterpret_u8_s64): Likewise.
2250 (vreinterpret_u8_f32): Likewise.
2251 (vreinterpret_u8_u16): Likewise.
2252 (vreinterpret_u8_u32): Likewise.
2253 (vreinterpret_u8_u64): Likewise.
2254 (vreinterpret_u8_p8): Likewise.
2255 (vreinterpret_u8_p16): Likewise.
2256 (vreinterpretq_u8_s8): Likewise.
2257 (vreinterpretq_u8_s16): Likewise.
2258 (vreinterpretq_u8_s32): Likewise.
2259 (vreinterpretq_u8_s64): Likewise.
2260 (vreinterpretq_u8_f32): Likewise.
2261 (vreinterpretq_u8_u16): Likewise.
2262 (vreinterpretq_u8_u32): Likewise.
2263 (vreinterpretq_u8_u64): Likewise.
2264 (vreinterpretq_u8_p8): Likewise.
2265 (vreinterpretq_u8_p16): Likewise.
2266 (vreinterpret_u16_s8): Likewise.
2267 (vreinterpret_u16_s16): Likewise.
2268 (vreinterpret_u16_s32): Likewise.
2269 (vreinterpret_u16_s64): Likewise.
2270 (vreinterpret_u16_f32): Likewise.
2271 (vreinterpret_u16_u8): Likewise.
2272 (vreinterpret_u16_u32): Likewise.
2273 (vreinterpret_u16_u64): Likewise.
2274 (vreinterpret_u16_p8): Likewise.
2275 (vreinterpret_u16_p16): Likewise.
2276 (vreinterpretq_u16_s8): Likewise.
2277 (vreinterpretq_u16_s16): Likewise.
2278 (vreinterpretq_u16_s32): Likewise.
2279 (vreinterpretq_u16_s64): Likewise.
2280 (vreinterpretq_u16_f32): Likewise.
2281 (vreinterpretq_u16_u8): Likewise.
2282 (vreinterpretq_u16_u32): Likewise.
2283 (vreinterpretq_u16_u64): Likewise.
2284 (vreinterpretq_u16_p8): Likewise.
2285 (vreinterpretq_u16_p16): Likewise.
2286 (vreinterpret_u32_s8): Likewise.
2287 (vreinterpret_u32_s16): Likewise.
2288 (vreinterpret_u32_s32): Likewise.
2289 (vreinterpret_u32_s64): Likewise.
2290 (vreinterpret_u32_f32): Likewise.
2291 (vreinterpret_u32_u8): Likewise.
2292 (vreinterpret_u32_u16): Likewise.
2293 (vreinterpret_u32_u64): Likewise.
2294 (vreinterpret_u32_p8): Likewise.
2295 (vreinterpret_u32_p16): Likewise.
2296 (vreinterpretq_u32_s8): Likewise.
2297 (vreinterpretq_u32_s16): Likewise.
2298 (vreinterpretq_u32_s32): Likewise.
2299 (vreinterpretq_u32_s64): Likewise.
2300 (vreinterpretq_u32_f32): Likewise.
2301 (vreinterpretq_u32_u8): Likewise.
2302 (vreinterpretq_u32_u16): Likewise.
2303 (vreinterpretq_u32_u64): Likewise.
2304 (vreinterpretq_u32_p8): Likewise.
2305 (vreinterpretq_u32_p16): Likewise.
2307 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2309 Backport from trunk r209640.
2310 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
2312 * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
2314 * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
2317 * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
2318 (vqnegd_s64): Likewise.
2319 (vqabs_s64): Likewise.
2320 (vqabsd_s64): Likewise.
2322 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2324 Backport from trunk r209627, 209636.
2325 2014-04-22 Renlin <renlin.li@arm.com>
2326 Jiong Wang <jiong.wang@arm.com>
2328 * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
2329 * config/aarch64/aarch64.c (aarch64_layout_frame)
2330 (aarch64_initial_elimination_offset): Likewise.
2332 2014-04-22 Marcus Shawcroft <marcus.shawcroft@arm.com>
2334 * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
2337 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2339 Backport from trunk r209618.
2340 2014-04-22 Renlin Li <Renlin.Li@arm.com>
2342 * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
2343 the output asm format.
2345 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2347 Backport from trunk r209617.
2348 2014-04-22 James Greenhalgh <james.greenhalgh@arm.com>
2350 * config/aarch64/aarch64-simd.md
2351 (aarch64_cm<optab>di): Always split.
2352 (*aarch64_cm<optab>di): New.
2353 (aarch64_cmtstdi): Always split.
2354 (*aarch64_cmtstdi): New.
2356 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2358 Backport from trunk r209615.
2359 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2361 * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
2362 restrictions on core registers for DImode values in Thumb2.
2364 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2366 Backport from trunk r209613, r209614.
2367 2014-04-22 Ian Bolton <ian.bolton@arm.com>
2369 * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
2370 * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
2372 2014-04-22 Ian Bolton <ian.bolton@arm.com>
2374 * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
2375 (*iordi_notzesidi_di): Likewise.
2376 (*iordi_notsesidi_di): Likewise.
2378 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2380 Backport from trunk r209561.
2381 2014-04-22 Ian Bolton <ian.bolton@arm.com>
2383 * config/arm/arm-protos.h (tune_params): New struct members.
2384 * config/arm/arm.c: Initialise tune_params per processor.
2385 (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
2386 for speed, based on new tune_params.
2388 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2390 Backport from trunk r209559.
2391 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
2393 * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
2395 * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
2397 * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
2399 * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
2400 * config/aarch64/arm_neon.h (vrnd_f64): Added.
2401 (vrnda_f64): Likewise.
2402 (vrndi_f64): Likewise.
2403 (vrndm_f64): Likewise.
2404 (vrndn_f64): Likewise.
2405 (vrndp_f64): Likewise.
2406 (vrndx_f64): Likewise.
2408 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2410 Backport from trunk r209419.
2411 2014-04-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2413 PR rtl-optimization/60663
2414 * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
2417 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
2419 Backport from trunk r209457.
2420 2014-04-16 Andrew Pinski <apinski@cavium.com>
2422 * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
2425 2014-05-19 Yvan Roux <yvan.roux@linaro.org>
2427 * LINARO-VERSION: Bump version.
2429 2014-05-14 Yvan Roux <yvan.roux@linaro.org>
2431 GCC Linaro 4.9-2014.05 released.
2432 * LINARO-VERSION: Update.
2434 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
2436 Backport from trunk r209889.
2437 2014-04-29 Zhenqiang Chen <zhenqiang.chen@linaro.org>
2439 * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
2441 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
2443 Backport from trunk r209556.
2444 2014-04-22 Zhenqiang Chen <zhenqiang.chen@linaro.org>
2446 * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
2447 GET_MODE_SIZE argument is enum machine_mode.
2449 2014-04-28 Yvan Roux <yvan.roux@linaro.org>
2451 * LINARO-VERSION: Bump version.
2453 2014-04-22 Yvan Roux <yvan.roux@linaro.org>
2455 GCC Linaro 4.9-2014.04 released.
2456 * LINARO-VERSION: New file.
2457 * configure.ac: Add Linaro version string.