| blob | 4001927e655926d4b41aeab54877f4821223b8ca |
1 /* Definitions of target machine for GNU compiler for
2 Motorola m88100 in an 88open OCS/BCS environment.
3 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
4 2001, 2002 Free Software Foundation, Inc.
5 Contributed by Michael Tiemann (tiemann@cygnus.com).
6 Currently maintained by (gcc@dg-rtp.dg.com)
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 /* The m88100 port of GNU CC adheres to the various standards from 88open.
26 These documents are available by writing:
28 88open Consortium Ltd.
29 100 Homeland Court, Suite 800
30 San Jose, CA 95112
31 (408) 436-6600
33 In brief, the current standards are:
35 Binary Compatibility Standard, Release 1.1A, May 1991
36 This provides for portability of application-level software at the
37 executable level for AT&T System V Release 3.2.
39 Object Compatibility Standard, Release 1.1A, May 1991
40 This provides for portability of application-level software at the
41 object file and library level for C, Fortran, and Cobol, and again,
42 largely for SVR3.
44 Under development are standards for AT&T System V Release 4, based on the
45 [generic] System V Application Binary Interface from AT&T. These include:
47 System V Application Binary Interface, Motorola 88000 Processor Supplement
48 Another document from AT&T for SVR4 specific to the m88100.
49 Available from Prentice Hall.
51 System V Application Binary Interface, Motorola 88000 Processor Supplement,
52 Release 1.1, Draft H, May 6, 1991
53 A proposed update to the AT&T document from 88open.
55 System V ABI Implementation Guide for the M88000 Processor,
56 Release 1.0, January 1991
57 A companion ABI document from 88open. */
59 /* Other *.h files in config/m88k include this one and override certain items.
60 Currently these are sysv3.h, sysv4.h, dgux.h, dolph.h, tekXD88.h, and luna.h.
61 Additionally, sysv4.h and dgux.h include svr4.h first. All other
62 m88k targets except luna.h are based on svr3.h. */
64 /* Choose SVR3 as the default. */
65 #if !defined(DBX_DEBUGGING_INFO) && !defined(DWARF_DEBUGGING_INFO)
67 #endif
68 \f
69 /* External types used. */
71 /* What instructions are needed to manufacture an integer constant. */
73 m88k_zero,
74 m88k_or,
75 m88k_subu,
76 m88k_or_lo16,
77 m88k_or_lo8,
78 m88k_set,
79 m88k_oru_hi16,
80 m88k_oru_or
81 };
83 /* Which processor to schedule for. The elements of the enumeration
84 must match exactly the cpu attribute in the m88k.md machine description. */
87 PROCESSOR_M88100,
88 PROCESSOR_M88110,
89 PROCESSOR_M88000
90 };
92 /* Recast the cpu class to be the cpu attribute. */
93 #define m88k_cpu_attr ((enum attr_cpu)m88k_cpu)
95 /* External variables/functions defined in m88k.c. */
115 /* external variables defined elsewhere in the compiler */
122 /* Specify the default monitors. The meaning of these values can
123 be obtained by doing "grep MONITOR_GCC *m88k*". Generally, the
124 values downward from 0x8000 are tests that will soon go away.
125 values upward from 0x1 are generally useful tests that will remain. */
127 #ifndef MONITOR_GCC
128 #define MONITOR_GCC 0
129 #endif
130 \f
131 /*** Controlling the Compilation Driver, `gcc' ***/
132 /* Show we can debug even without a frame pointer. */
133 #define CAN_DEBUG_WITHOUT_FP
135 /* If -m88100 is in effect, add -D__m88100__; similarly for -m88110.
136 Here, the CPU_DEFAULT is assumed to be -m88100. */
137 #undef CPP_SPEC
139 %{!m88000:%{!m88110:-D__m88100__}}"
141 /* LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC defined in svr3.h.
142 ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC redefined
143 in svr4.h.
144 CPP_SPEC, ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and
145 STARTFILE_SPEC redefined in dgux.h. */
146 \f
147 /*** Run-time Target Specification ***/
149 /* Names to predefine in the preprocessor for this target machine.
150 Redefined in sysv3.h, sysv4.h, dgux.h, and luna.h. */
155 #ifndef VERSION_INFO1
157 #endif
159 /* Run-time compilation parameters selecting different hardware subsets. */
161 /* Macro to define tables used to set the flags.
162 This is a list in braces of pairs in braces,
163 each pair being { "NAME", VALUE }
164 where VALUE is the bits to set or minus the bits to clear.
165 An empty string NAME is used to identify the default VALUE. */
169 #define MASK_88000 (MASK_88100 | MASK_88110)
185 #define MASK_EITHER_LARGE_SHIFT (MASK_TRAP_LARGE_SHIFT | \
186 MASK_HANDLE_LARGE_SHIFT)
190 #define TARGET_88100 ((target_flags & MASK_88000) == MASK_88100)
191 #define TARGET_88110 ((target_flags & MASK_88000) == MASK_88110)
192 #define TARGET_88000 ((target_flags & MASK_88000) == MASK_88000)
194 #define TARGET_OCS_DEBUG_INFO (target_flags & MASK_OCS_DEBUG_INFO)
195 #define TARGET_OCS_FRAME_POSITION (target_flags & MASK_OCS_FRAME_POSITION)
196 #define TARGET_SVR4 (target_flags & MASK_SVR4)
197 #define TARGET_SVR3 (target_flags & MASK_SVR3)
198 #define TARGET_NO_UNDERSCORES (target_flags & MASK_NO_UNDERSCORES)
199 #define TARGET_BIG_PIC (target_flags & MASK_BIG_PIC)
200 #define TARGET_TRAP_LARGE_SHIFT (target_flags & MASK_TRAP_LARGE_SHIFT)
201 #define TARGET_HANDLE_LARGE_SHIFT (target_flags & MASK_HANDLE_LARGE_SHIFT)
202 #define TARGET_CHECK_ZERO_DIV (target_flags & MASK_CHECK_ZERO_DIV)
203 #define TARGET_USE_DIV (target_flags & MASK_USE_DIV)
204 #define TARGET_IDENTIFY_REVISION (target_flags & MASK_IDENTIFY_REVISION)
205 #define TARGET_WARN_PASS_STRUCT (target_flags & MASK_WARN_PASS_STRUCT)
206 #define TARGET_OPTIMIZE_ARG_AREA (target_flags & MASK_OPTIMIZE_ARG_AREA)
207 #define TARGET_SERIALIZE_VOLATILE (!(target_flags & MASK_NO_SERIALIZE_VOLATILE))
209 #define TARGET_EITHER_LARGE_SHIFT (target_flags & MASK_EITHER_LARGE_SHIFT)
210 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
212 /* Redefined in sysv3.h, sysv4.h, and dgux.h. */
213 #define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV)
214 #define CPU_DEFAULT MASK_88100
216 #define TARGET_SWITCHES \
217 { \
242 SUBTARGET_SWITCHES \
245 }
247 /* Redefined in dgux.h. */
248 #define SUBTARGET_SWITCHES
250 /* Macro to define table for command options with values. */
255 /* Do any checking or such that is needed after processing the -m switches. */
257 #define OVERRIDE_OPTIONS \
258 do { \
259 register int i; \
260 \
261 if ((target_flags & MASK_88000) == 0) \
262 target_flags |= CPU_DEFAULT; \
263 \
264 if (TARGET_88110) \
265 { \
266 target_flags |= MASK_USE_DIV; \
267 target_flags &= ~MASK_CHECK_ZERO_DIV; \
268 } \
269 \
270 m88k_cpu = (TARGET_88000 ? PROCESSOR_M88000 \
271 : (TARGET_88100 ? PROCESSOR_M88100 : PROCESSOR_M88110)); \
272 \
273 if (TARGET_BIG_PIC) \
274 flag_pic = 2; \
275 \
276 if ((target_flags & MASK_EITHER_LARGE_SHIFT) == MASK_EITHER_LARGE_SHIFT) \
278 \
279 if (TARGET_SVR4) \
280 { \
281 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
282 reg_names[i]--; \
284 } \
285 else \
286 { \
287 target_flags |= MASK_SVR3; \
288 target_flags &= ~MASK_SVR4; \
289 } \
290 \
291 if (m88k_short_data) \
292 { \
293 const char *p = m88k_short_data; \
294 while (*p) \
295 if (ISDIGIT (*p)) \
296 p++; \
297 else \
298 { \
300 break; \
301 } \
302 m88k_gp_threshold = atoi (m88k_short_data); \
303 if (m88k_gp_threshold > 0x7fffffff) \
305 if (flag_pic) \
307 } \
309 flag_omit_frame_pointer = 1; \
310 } while (0)
311 \f
312 /*** Storage Layout ***/
314 /* Sizes in bits of the various types. */
315 #define SHORT_TYPE_SIZE 16
316 #define INT_TYPE_SIZE 32
317 #define LONG_TYPE_SIZE 32
318 #define LONG_LONG_TYPE_SIZE 64
319 #define FLOAT_TYPE_SIZE 32
320 #define DOUBLE_TYPE_SIZE 64
321 #define LONG_DOUBLE_TYPE_SIZE 64
323 /* Define this if most significant bit is lowest numbered
324 in instructions that operate on numbered bit-fields.
325 Somewhat arbitrary. It matches the bit field patterns. */
326 #define BITS_BIG_ENDIAN 1
328 /* Define this if most significant byte of a word is the lowest numbered.
329 That is true on the m88000. */
330 #define BYTES_BIG_ENDIAN 1
332 /* Define this if most significant word of a multiword number is the lowest
333 numbered.
334 For the m88000 we can decide arbitrarily since there are no machine
335 instructions for them. */
336 #define WORDS_BIG_ENDIAN 1
338 /* Width of a word, in units (bytes). */
339 #define UNITS_PER_WORD 4
341 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
342 #define PARM_BOUNDARY 32
344 /* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */
345 #define MAX_PARM_BOUNDARY 64
347 /* Boundary (in *bits*) on which stack pointer should be aligned. */
348 #define STACK_BOUNDARY 128
350 /* Allocation boundary (in *bits*) for the code of a function. On the
351 m88100, it is desirable to align to a cache line. However, SVR3 targets
352 only provided 8 byte alignment. The m88110 cache is small, so align
353 to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */
354 #define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \
355 (TARGET_88100 && TARGET_SVR4 ? 128 : 64))
357 /* No data type wants to be aligned rounder than this. */
358 #define BIGGEST_ALIGNMENT 64
360 /* The best alignment to use in cases where we have a choice. */
361 #define FASTEST_ALIGNMENT (TARGET_88100 ? 32 : 64)
363 /* Make strings 4/8 byte aligned so strcpy from constants will be faster. */
364 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
365 ((TREE_CODE (EXP) == STRING_CST \
366 && (ALIGN) < FASTEST_ALIGNMENT) \
367 ? FASTEST_ALIGNMENT : (ALIGN))
369 /* Make arrays of chars 4/8 byte aligned for the same reasons. */
370 #define DATA_ALIGNMENT(TYPE, ALIGN) \
371 (TREE_CODE (TYPE) == ARRAY_TYPE \
372 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
373 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
375 /* Alignment of field after `int : 0' in a structure.
376 Ignored with PCC_BITFIELD_TYPE_MATTERS. */
377 /* #define EMPTY_FIELD_BOUNDARY 8 */
379 /* Every structure's size must be a multiple of this. */
380 #define STRUCTURE_SIZE_BOUNDARY 8
382 /* Set this nonzero if move instructions will actually fail to work
383 when given unaligned data. */
384 #define STRICT_ALIGNMENT 1
386 /* A bit-field declared as `int' forces `int' alignment for the struct. */
387 #define PCC_BITFIELD_TYPE_MATTERS 1
389 /* Maximum size (in bits) to use for the largest integral type that
390 replaces a BLKmode type. */
391 /* #define MAX_FIXED_MODE_SIZE 0 */
392 \f
393 /*** Register Usage ***/
395 /* Number of actual hardware registers.
396 The hardware registers are assigned numbers for the compiler
397 from 0 to just below FIRST_PSEUDO_REGISTER.
398 All registers that the compiler knows about must be given numbers,
399 even those that are not normally considered general registers.
401 The m88100 has a General Register File (GRF) of 32 32-bit registers.
402 The m88110 adds an Extended Register File (XRF) of 32 80-bit registers. */
403 #define FIRST_PSEUDO_REGISTER 64
404 #define FIRST_EXTENDED_REGISTER 32
406 /* General notes on extended registers, their use and misuse.
408 Possible good uses:
410 spill area instead of memory.
411 -waste if only used once
413 floating point calculations
414 -probably a waste unless we have run out of general purpose registers
416 freeing up general purpose registers
417 -e.g. may be able to have more loop invariants if floating
418 point is moved into extended registers.
421 I've noticed wasteful moves into and out of extended registers; e.g. a load
422 into x21, then inside a loop a move into r24, then r24 used as input to
423 an fadd. Why not just load into r24 to begin with? Maybe the new cse.c
424 will address this. This wastes a move, but the load,store and move could
425 have been saved had extended registers been used throughout.
426 E.g. in the code following code, if z and xz are placed in extended
427 registers, there is no need to save preserve registers.
429 long c=1,d=1,e=1,f=1,g=1,h=1,i=1,j=1,k;
431 double z=0,xz=4.5;
433 foo(a,b)
434 long a,b;
435 {
436 while (a < b)
437 {
438 k = b + c + d + e + f + g + h + a + i + j++;
439 z += xz;
440 a++;
441 }
442 printf("k= %d; z=%f;\n", k, z);
443 }
445 I've found that it is possible to change the constraints (putting * before
446 the 'r' constraints int the fadd.ddd instruction) and get the entire
447 addition and store to go into extended registers. However, this also
448 forces simple addition and return of floating point arguments to a
449 function into extended registers. Not the correct solution.
451 Found the following note in local-alloc.c which may explain why I can't
452 get both registers to be in extended registers since two are allocated in
453 local-alloc and one in global-alloc. Doesn't explain (I don't believe)
454 why an extended register is used instead of just using the preserve
455 register.
457 from local-alloc.c:
458 We have provision to exempt registers, even when they are contained
459 within the block, that can be tied to others that are not contained in it.
460 This is so that global_alloc could process them both and tie them then.
461 But this is currently disabled since tying in global_alloc is not
462 yet implemented.
464 The explanation of why the preserved register is not used is as follows,
465 I believe. The registers are being allocated in order. Tying is not
466 done so efficiently, so when it comes time to do the first allocation,
467 there are no registers left to use without spilling except extended
468 registers. Then when the next pseudo register needs a hard reg, there
469 are still no registers to be had for free, but this one must be a GRF
470 reg instead of an extended reg, so a preserve register is spilled. Thus
471 the move from extended to GRF is necessitated. I do not believe this can
472 be 'fixed' through the files in config/m88k.
474 gcc seems to sometimes make worse use of register allocation -- not counting
475 moves -- whenever extended registers are present. For example in the
476 whetstone, the simple for loop (slightly modified)
477 for(i = 1; i <= n1; i++)
478 {
479 x1 = (x1 + x2 + x3 - x4) * t;
480 x2 = (x1 + x2 - x3 + x4) * t;
481 x3 = (x1 - x2 + x3 + x4) * t;
482 x4 = (x1 + x2 + x3 + x4) * t;
483 }
484 in general loads the high bits of the addresses of x2-x4 and i into registers
485 outside the loop. Whenever extended registers are used, it loads all of
486 these inside the loop. My conjecture is that since the 88110 has so many
487 registers, and gcc makes no distinction at this point -- just that they are
488 not fixed, that in loop.c it believes it can expect a number of registers
489 to be available. Then it allocates 'too many' in local-alloc which causes
490 problems later. 'Too many' are allocated because a large portion of the
491 registers are extended registers and cannot be used for certain purposes
492 ( e.g. hold the address of a variable). When this loop is compiled on its
493 own, the problem does not occur. I don't know the solution yet, though it
494 is probably in the base sources. Possibly a different way to calculate
495 "threshold". */
497 /* 1 for registers that have pervasive standard uses and are not available
498 for the register allocator. Registers r14-r25 and x22-x29 are expected
499 to be preserved across function calls.
501 On the 88000, the standard uses of the General Register File (GRF) are:
502 Reg 0 = Pseudo argument pointer (hardware fixed to 0).
503 Reg 1 = Subroutine return pointer (hardware).
504 Reg 2-9 = Parameter registers (OCS).
505 Reg 10 = OCS reserved temporary.
506 Reg 11 = Static link if needed [OCS reserved temporary].
507 Reg 12 = Address of structure return (OCS).
508 Reg 13 = OCS reserved temporary.
509 Reg 14-25 = Preserved register set.
510 Reg 26-29 = Reserved by OCS and ABI.
511 Reg 30 = Frame pointer (Common use).
512 Reg 31 = Stack pointer.
514 The following follows the current 88open UCS specification for the
515 Extended Register File (XRF):
516 Reg 32 = x0 Always equal to zero
517 Reg 33-53 = x1-x21 Temporary registers (Caller Save)
518 Reg 54-61 = x22-x29 Preserver registers (Callee Save)
519 Reg 62-63 = x30-x31 Reserved for future ABI use.
521 Note: The current 88110 extended register mapping is subject to change.
522 The bias towards caller-save registers is based on the
523 presumption that memory traffic can potentially be reduced by
524 allowing the "caller" to save only that part of the register
525 which is actually being used. (i.e. don't do a st.x if a st.d
526 is sufficient). Also, in scientific code (a.k.a. Fortran), the
527 large number of variables defined in common blocks may require
528 that almost all registers be saved across calls anyway. */
530 #define FIXED_REGISTERS \
531 {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
532 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
533 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
534 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
536 /* 1 for registers not available across function calls.
537 These must include the FIXED_REGISTERS and also any
538 registers that can be used without being saved.
539 The latter must include the registers where values are returned
540 and the register where structure-value addresses are passed.
541 Aside from that, you can include as many other registers as you like. */
543 #define CALL_USED_REGISTERS \
544 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
545 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
546 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
547 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
549 /* Macro to conditionally modify fixed_regs/call_used_regs. */
550 #define CONDITIONAL_REGISTER_USAGE \
551 { \
552 if (! TARGET_88110) \
553 { \
554 register int i; \
555 for (i = FIRST_EXTENDED_REGISTER; i < FIRST_PSEUDO_REGISTER; i++) \
556 { \
557 fixed_regs[i] = 1; \
558 call_used_regs[i] = 1; \
559 } \
560 } \
561 if (flag_pic) \
562 { \
564 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
565 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
566 global_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
567 } \
568 }
570 /* True if register is an extended register. */
571 #define XRF_REGNO_P(N) ((N) < FIRST_PSEUDO_REGISTER && (N) >= FIRST_EXTENDED_REGISTER)
573 /* Return number of consecutive hard regs needed starting at reg REGNO
574 to hold something of mode MODE.
575 This is ordinarily the length in words of a value of mode MODE
576 but can be less for certain modes in special long registers.
578 On the m88000, GRF registers hold 32-bits and XRF registers hold 80-bits.
579 An XRF register can hold any mode, but two GRF registers are required
580 for larger modes. */
581 #define HARD_REGNO_NREGS(REGNO, MODE) \
582 (XRF_REGNO_P (REGNO) \
583 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
585 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
587 For double integers, we never put the value into an odd register so that
588 the operators don't run into the situation where the high part of one of
589 the inputs is the low part of the result register. (It's ok if the output
590 registers are the same as the input registers.) The XRF registers can
591 hold all modes, but only DF and SF modes can be manipulated in these
592 registers. The compiler should be allowed to use these as a fast spill
593 area. */
594 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
595 (XRF_REGNO_P(REGNO) \
596 ? (TARGET_88110 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
597 : (((MODE) != DImode && (MODE) != DFmode && (MODE) != DCmode) \
598 || ((REGNO) & 1) == 0))
600 /* Value is 1 if it is a good idea to tie two pseudo registers
601 when one has mode MODE1 and one has mode MODE2.
602 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
603 for any hard reg, then this must be 0 for correct output. */
604 #define MODES_TIEABLE_P(MODE1, MODE2) \
605 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode \
606 || (TARGET_88110 && GET_MODE_CLASS (MODE1) == MODE_FLOAT)) \
607 == ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode \
608 || (TARGET_88110 && GET_MODE_CLASS (MODE2) == MODE_FLOAT)))
610 /* Specify the registers used for certain standard purposes.
611 The values of these macros are register numbers. */
613 /* the m88000 pc isn't overloaded on a register that the compiler knows about. */
614 /* #define PC_REGNUM */
616 /* Register to use for pushing function arguments. */
617 #define STACK_POINTER_REGNUM 31
619 /* Base register for access to local variables of the function. */
620 #define FRAME_POINTER_REGNUM 30
622 /* Base register for access to arguments of the function. */
623 #define ARG_POINTER_REGNUM 0
625 /* Register used in cases where a temporary is known to be safe to use. */
626 #define TEMP_REGNUM 10
628 /* Register in which static-chain is passed to a function. */
629 #define STATIC_CHAIN_REGNUM 11
631 /* Register in which address to store a structure value
632 is passed to a function. */
633 #define STRUCT_VALUE_REGNUM 12
635 /* Register to hold the addressing base for position independent
636 code access to data items. */
637 #define PIC_OFFSET_TABLE_REGNUM 25
639 /* Order in which registers are preferred (most to least). Use temp
640 registers, then param registers top down. Preserve registers are
641 top down to maximize use of double memory ops for register save.
642 The 88open reserved registers (r26-r29 and x30-x31) may commonly be used
643 in most environments with the -fcall-used- or -fcall-saved- options. */
644 #define REG_ALLOC_ORDER \
645 { \
646 13, 12, 11, 10, 29, 28, 27, 26, \
647 62, 63, 9, 8, 7, 6, 5, 4, \
648 3, 2, 1, 53, 52, 51, 50, 49, \
649 48, 47, 46, 45, 44, 43, 42, 41, \
650 40, 39, 38, 37, 36, 35, 34, 33, \
651 25, 24, 23, 22, 21, 20, 19, 18, \
652 17, 16, 15, 14, 61, 60, 59, 58, \
653 57, 56, 55, 54, 30, 31, 0, 32}
655 /* Order for leaf functions. */
656 #define REG_LEAF_ALLOC_ORDER \
657 { \
658 9, 8, 7, 6, 13, 12, 11, 10, \
659 29, 28, 27, 26, 62, 63, 5, 4, \
660 3, 2, 0, 53, 52, 51, 50, 49, \
661 48, 47, 46, 45, 44, 43, 42, 41, \
662 40, 39, 38, 37, 36, 35, 34, 33, \
663 25, 24, 23, 22, 21, 20, 19, 18, \
664 17, 16, 15, 14, 61, 60, 59, 58, \
665 57, 56, 55, 54, 30, 31, 1, 32}
667 /* Switch between the leaf and non-leaf orderings. The purpose is to avoid
668 write-over scoreboard delays between caller and callee. */
669 #define ORDER_REGS_FOR_LOCAL_ALLOC \
670 { \
671 static const int leaf[] = REG_LEAF_ALLOC_ORDER; \
672 static const int nonleaf[] = REG_ALLOC_ORDER; \
673 \
674 memcpy (reg_alloc_order, regs_ever_live[1] ? nonleaf : leaf, \
675 FIRST_PSEUDO_REGISTER * sizeof (int)); \
676 }
677 \f
678 /*** Register Classes ***/
680 /* Define the classes of registers for register constraints in the
681 machine description. Also define ranges of constants.
683 One of the classes must always be named ALL_REGS and include all hard regs.
684 If there is more than one class, another class must be named NO_REGS
685 and contain no registers.
687 The name GENERAL_REGS must be the name of a class (or an alias for
688 another name such as ALL_REGS). This is the class of registers
689 that is allowed by "g" or "r" in a register constraint.
690 Also, registers outside this class are allocated only when
691 instructions express preferences for them.
693 The classes must be numbered in nondecreasing order; that is,
694 a larger-numbered class must never be contained completely
695 in a smaller-numbered class.
697 For any two classes, it is very desirable that there be another
698 class that represents their union. */
700 /* The m88000 hardware has two kinds of registers. In addition, we denote
701 the arg pointer as a separate class. */
706 #define N_REG_CLASSES (int) LIM_REG_CLASSES
708 /* Give names of register classes as strings for dump file. */
712 /* Define which registers fit in which classes.
713 This is an initializer for a vector of HARD_REG_SET
714 of length N_REG_CLASSES. */
715 #define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
716 {0x00000001, 0x00000000}, \
717 {0x00000000, 0xffffffff}, \
718 {0xfffffffe, 0x00000000}, \
719 {0xffffffff, 0x00000000}, \
720 {0xfffffffe, 0xffffffff}, \
721 {0xffffffff, 0xffffffff}}
723 /* The same information, inverted:
724 Return the class number of the smallest class containing
725 reg number REGNO. This could be a conditional expression
726 or could index an array. */
727 #define REGNO_REG_CLASS(REGNO) \
728 ((REGNO) ? ((REGNO < 32) ? GENERAL_REGS : XRF_REGS) : AP_REG)
730 /* The class value for index registers, and the one for base regs. */
731 #define BASE_REG_CLASS AGRF_REGS
732 #define INDEX_REG_CLASS GENERAL_REGS
734 /* Get reg_class from a letter such as appears in the machine description.
735 For the 88000, the following class/letter is defined for the XRF:
736 x - Extended register file */
737 #define REG_CLASS_FROM_LETTER(C) \
740 /* Macros to check register numbers against specific register classes.
741 These assume that REGNO is a hard or pseudo reg number.
742 They give nonzero only if REGNO is a hard reg of the suitable class
743 or a pseudo reg currently allocated to a suitable hard reg.
744 Since they use reg_renumber, they are safe only once reg_renumber
745 has been allocated, which happens in local-alloc.c. */
746 #define REGNO_OK_FOR_BASE_P(REGNO) \
747 ((REGNO) < FIRST_EXTENDED_REGISTER \
748 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
749 #define REGNO_OK_FOR_INDEX_P(REGNO) \
750 (((REGNO) && (REGNO) < FIRST_EXTENDED_REGISTER) \
751 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
753 /* Given an rtx X being reloaded into a reg required to be
754 in class CLASS, return the class of reg to actually use.
755 In general this is just CLASS; but on some machines
756 in some cases it is preferable to use a more restrictive class.
757 Double constants should be in a register iff they can be made cheaply. */
758 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
759 (CONSTANT_P(X) && (CLASS == XRF_REGS) ? NO_REGS : (CLASS))
761 /* Return the register class of a scratch register needed to load IN
762 into a register of class CLASS in MODE. On the m88k, when PIC, we
763 need a temporary when loading some addresses into a register. */
764 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
765 ((flag_pic \
766 && GET_CODE (IN) == CONST \
767 && GET_CODE (XEXP (IN, 0)) == PLUS \
768 && GET_CODE (XEXP (XEXP (IN, 0), 0)) == CONST_INT \
769 && ! SMALL_INT (XEXP (XEXP (IN, 0), 1))) ? GENERAL_REGS : NO_REGS)
771 /* Return the maximum number of consecutive registers
772 needed to represent mode MODE in a register of class CLASS. */
773 #define CLASS_MAX_NREGS(CLASS, MODE) \
774 ((((CLASS) == XRF_REGS) ? 1 \
775 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
777 /* Letters in the range `I' through `P' in a register constraint string can
778 be used to stand for particular ranges of immediate operands. The C
779 expression is true iff C is a known letter and VALUE is appropriate for
780 that letter.
782 For the m88000, the following constants are used:
783 `I' requires a non-negative 16-bit value.
784 `J' requires a non-positive 16-bit value.
785 `K' requires a non-negative value < 32.
786 `L' requires a constant with only the upper 16-bits set.
787 `M' requires constant values that can be formed with `set'.
788 `N' requires a negative value.
789 `O' requires zero.
790 `P' requires a non-negative value. */
792 /* Quick tests for certain values. */
793 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
794 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
795 #define ADD_INT(X) (ADD_INTVAL (INTVAL (X)))
796 #define ADD_INTVAL(I) ((unsigned) (I) + 0xffff < 0x1ffff)
797 #define POWER_OF_2(I) ((I) && POWER_OF_2_or_0(I))
798 #define POWER_OF_2_or_0(I) (((I) & ((unsigned)(I) - 1)) == 0)
800 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
809 : 0)
811 /* Similar, but for floating constants, and defining letters G and H.
812 Here VALUE is the CONST_DOUBLE rtx itself. For the m88000, the
813 constraints are: `G' requires zero, and `H' requires one or two. */
814 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
816 && CONST_DOUBLE_LOW (VALUE) == 0) \
817 : 0)
819 /* Letters in the range `Q' through `U' in a register constraint string
820 may be defined in a machine-dependent fashion to stand for arbitrary
821 operand types.
823 For the m88k, `Q' handles addresses in a call context. */
825 #define EXTRA_CONSTRAINT(OP, C) \
827 \f
828 /*** Describing Stack Layout ***/
830 /* Define this if pushing a word on the stack moves the stack pointer
831 to a smaller address. */
832 #define STACK_GROWS_DOWNWARD
834 /* Define this if the addresses of local variable slots are at negative
835 offsets from the frame pointer. */
836 /* #define FRAME_GROWS_DOWNWARD */
838 /* Offset from the frame pointer to the first local variable slot to be
839 allocated. For the m88k, the debugger wants the return address (r1)
840 stored at location r30+4, and the previous frame pointer stored at
841 location r30. */
842 #define STARTING_FRAME_OFFSET 8
844 /* If we generate an insn to push BYTES bytes, this says how many the
845 stack pointer really advances by. The m88k has no push instruction. */
846 /* #define PUSH_ROUNDING(BYTES) */
848 /* If defined, the maximum amount of space required for outgoing arguments
849 will be computed and placed into the variable
850 `current_function_outgoing_args_size'. No space will be pushed
851 onto the stack for each call; instead, the function prologue should
852 increase the stack frame size by this amount. */
853 #define ACCUMULATE_OUTGOING_ARGS 1
855 /* Offset from the stack pointer register to the first location at which
856 outgoing arguments are placed. Use the default value zero. */
857 /* #define STACK_POINTER_OFFSET 0 */
859 /* Offset of first parameter from the argument pointer register value.
860 Using an argument pointer, this is 0 for the m88k. GCC knows
861 how to eliminate the argument pointer references if necessary. */
862 #define FIRST_PARM_OFFSET(FNDECL) 0
864 /* Define this if functions should assume that stack space has been
865 allocated for arguments even when their values are passed in
866 registers.
868 The value of this macro is the size, in bytes, of the area reserved for
869 arguments passed in registers.
871 This space can either be allocated by the caller or be a part of the
872 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
873 says which. */
874 #define REG_PARM_STACK_SPACE(FNDECL) 32
876 /* Define this macro if REG_PARM_STACK_SPACE is defined but stack
877 parameters don't skip the area specified by REG_PARM_STACK_SPACE.
878 Normally, when a parameter is not passed in registers, it is placed on
879 the stack beyond the REG_PARM_STACK_SPACE area. Defining this macro
880 suppresses this behavior and causes the parameter to be passed on the
881 stack in its natural location. */
882 #define STACK_PARMS_IN_REG_PARM_AREA
884 /* Define this if it is the responsibility of the caller to allocate the
885 area reserved for arguments passed in registers. If
886 `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect of this
887 macro is to determine whether the space is included in
888 `current_function_outgoing_args_size'. */
889 /* #define OUTGOING_REG_PARM_STACK_SPACE */
891 /* Offset from the stack pointer register to an item dynamically allocated
892 on the stack, e.g., by `alloca'.
894 The default value for this macro is `STACK_POINTER_OFFSET' plus the
895 length of the outgoing arguments. The default is correct for most
896 machines. See `function.c' for details. */
897 /* #define STACK_DYNAMIC_OFFSET(FUNDECL) ... */
899 /* Value is the number of bytes of arguments automatically
900 popped when returning from a subroutine call.
901 FUNDECL is the declaration node of the function (as a tree),
902 FUNTYPE is the data type of the function (as a tree),
903 or for a library call it is an identifier node for the subroutine name.
904 SIZE is the number of bytes of arguments passed on the stack. */
905 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
907 /* Define how to find the value returned by a function.
908 VALTYPE is the data type of the value (as a tree).
909 If the precise function being called is known, FUNC is its FUNCTION_DECL;
910 otherwise, FUNC is 0. */
911 #define FUNCTION_VALUE(VALTYPE, FUNC) \
912 gen_rtx_REG (TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
913 2)
915 /* Define this if it differs from FUNCTION_VALUE. */
916 /* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */
918 /* Disable the promotion of some structures and unions to registers. */
919 #define RETURN_IN_MEMORY(TYPE) \
920 (TYPE_MODE (TYPE) == BLKmode \
921 || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \
922 && !(TYPE_MODE (TYPE) == SImode \
923 || (TYPE_MODE (TYPE) == BLKmode \
924 && TYPE_ALIGN (TYPE) == BITS_PER_WORD \
925 && int_size_in_bytes (TYPE) == UNITS_PER_WORD))))
927 /* Don't default to pcc-struct-return, because we have already specified
928 exactly how to return structures in the RETURN_IN_MEMORY macro. */
929 #define DEFAULT_PCC_STRUCT_RETURN 0
931 /* Define how to find the value returned by a library function
932 assuming the value has mode MODE. */
933 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2)
935 /* True if N is a possible register number for a function value
936 as seen by the caller. */
937 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2)
939 /* Determine whether a function argument is passed in a register, and
940 which register. See m88k.c. */
941 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
942 m88k_function_arg (CUM, MODE, TYPE, NAMED)
944 /* Define this if it differs from FUNCTION_ARG. */
945 /* #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) ... */
947 /* A C expression for the number of words, at the beginning of an
948 argument, must be put in registers. The value must be zero for
949 arguments that are passed entirely in registers or that are entirely
950 pushed on the stack. */
951 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
953 /* A C expression that indicates when an argument must be passed by
954 reference. If nonzero for an argument, a copy of that argument is
955 made in memory and a pointer to the argument is passed instead of the
956 argument itself. The pointer is passed in whatever way is appropriate
957 for passing a pointer to that type. */
958 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (0)
960 /* A C type for declaring a variable that is used as the first argument
961 of `FUNCTION_ARG' and other related values. It suffices to count
962 the number of words of argument so far. */
963 #define CUMULATIVE_ARGS int
965 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
966 function whose data type is FNTYPE. For a library call, FNTYPE is 0. */
967 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
969 /* A C statement (sans semicolon) to update the summarizer variable
970 CUM to advance past an argument in the argument list. The values
971 MODE, TYPE and NAMED describe that argument. Once this is done,
972 the variable CUM is suitable for analyzing the *following* argument
973 with `FUNCTION_ARG', etc. (TYPE is null for libcalls where that
974 information may not be available.) */
975 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
976 do { \
977 enum machine_mode __mode = (TYPE) ? TYPE_MODE (TYPE) : (MODE); \
978 if ((CUM & 1) \
979 && (__mode == DImode || __mode == DFmode \
980 || ((TYPE) && TYPE_ALIGN (TYPE) > BITS_PER_WORD))) \
981 CUM++; \
982 CUM += (((__mode != BLKmode) \
983 ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) \
984 + 3) / 4; \
985 } while (0)
987 /* True if N is a possible register number for function argument passing.
988 On the m88000, these are registers 2 through 9. */
989 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2)
991 /* A C expression which determines whether, and in which direction,
992 to pad out an argument with extra space. The value should be of
993 type `enum direction': either `upward' to pad above the argument,
994 `downward' to pad below, or `none' to inhibit padding.
996 This macro does not control the *amount* of padding; that is always
997 just enough to reach the next multiple of `FUNCTION_ARG_BOUNDARY'. */
998 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
999 ((MODE) == BLKmode \
1000 || ((TYPE) && (TREE_CODE (TYPE) == RECORD_TYPE \
1001 || TREE_CODE (TYPE) == UNION_TYPE)) \
1002 ? upward : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY ? downward : none)
1004 /* If defined, a C expression that gives the alignment boundary, in bits,
1005 of an argument with the specified mode and type. If it is not defined,
1006 `PARM_BOUNDARY' is used for all arguments. */
1007 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1008 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
1009 ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
1011 /* Generate necessary RTL for __builtin_saveregs().
1012 ARGLIST is the argument list; see expr.c. */
1013 #define EXPAND_BUILTIN_SAVEREGS() m88k_builtin_saveregs ()
1015 /* Define the `__builtin_va_list' type for the ABI. */
1016 #define BUILD_VA_LIST_TYPE(VALIST) \
1017 (VALIST) = m88k_build_va_list ()
1019 /* Implement `va_start' for varargs and stdarg. */
1020 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1021 m88k_va_start (valist, nextarg)
1023 /* Implement `va_arg'. */
1024 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1025 m88k_va_arg (valist, type)
1027 /* Output assembler code to FILE to increment profiler label # LABELNO
1028 for profiling a function entry. Redefined in sysv3.h, sysv4.h and
1029 dgux.h. */
1030 #define FUNCTION_PROFILER(FILE, LABELNO) \
1033 /* Maximum length in instructions of the code output by FUNCTION_PROFILER. */
1034 #define FUNCTION_PROFILER_LENGTH (5+3+1+5)
1036 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1037 the stack pointer does not matter. The value is tested only in
1038 functions that have frame pointers.
1039 No definition is equivalent to always zero. */
1040 #define EXIT_IGNORE_STACK (1)
1042 /* Value should be nonzero if functions must have frame pointers.
1043 Zero means the frame pointer need not be set up (and parms
1044 may be accessed via the stack pointer) in functions that seem suitable.
1045 This is computed in `reload', in reload1.c. */
1046 #define FRAME_POINTER_REQUIRED \
1047 ((TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ()) \
1048 || (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION))
1050 /* Definitions for register eliminations.
1052 We have two registers that can be eliminated on the m88k. First, the
1053 frame pointer register can often be eliminated in favor of the stack
1054 pointer register. Secondly, the argument pointer register can always be
1055 eliminated; it is replaced with either the stack or frame pointer. */
1057 /* This is an array of structures. Each structure initializes one pair
1058 of eliminable registers. The "from" register number is given first,
1059 followed by "to". Eliminations of the same "from" register are listed
1060 in order of preference. */
1061 #define ELIMINABLE_REGS \
1062 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1063 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1064 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1066 /* Given FROM and TO register numbers, say whether this elimination
1067 is allowed. */
1068 #define CAN_ELIMINATE(FROM, TO) \
1069 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
1071 /* Define the offset between two registers, one to be eliminated, and the other
1072 its replacement, at the start of a routine. */
1073 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1074 { m88k_layout_frame (); \
1075 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1076 (OFFSET) = m88k_fp_offset; \
1077 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1078 (OFFSET) = m88k_stack_size - m88k_fp_offset; \
1079 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1080 (OFFSET) = m88k_stack_size; \
1081 else \
1082 abort (); \
1083 }
1084 \f
1085 /*** Trampolines for Nested Functions ***/
1087 /* Output assembler code for a block containing the constant parts
1088 of a trampoline, leaving space for the variable parts.
1090 This block is placed on the stack and filled in. It is aligned
1091 0 mod 128 and those portions that are executed are constant.
1092 This should work for instruction caches that have cache lines up
1093 to the aligned amount (128 is arbitrary), provided no other code
1094 producer is attempting to play the same game. This of course is
1095 in violation of any number of 88open standards. */
1097 #define TRAMPOLINE_TEMPLATE(FILE) \
1098 { \
1099 char buf[256]; \
1100 static int labelno = 0; \
1101 labelno++; \
1118 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
1119 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
1120 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
1121 }
1123 /* Length in units of the trampoline for entering a nested function.
1124 This is really two components. The first 32 bytes are fixed and
1125 must be copied; the last 12 bytes are just storage that's filled
1126 in later. So for allocation purposes, it's 32+12 bytes, but for
1127 initialization purposes, it's 32 bytes. */
1129 #define TRAMPOLINE_SIZE (32+12)
1131 /* Alignment required for a trampoline. 128 is used to find the
1132 beginning of a line in the instruction cache and to allow for
1133 instruction cache lines of up to 128 bytes. */
1135 #define TRAMPOLINE_ALIGNMENT 128
1137 /* Emit RTL insns to initialize the variable parts of a trampoline.
1138 FNADDR is an RTX for the address of the function's pure code.
1139 CXT is an RTX for the static chain value for the function. */
1141 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1142 { \
1143 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \
1144 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \
1145 }
1147 /*** Library Subroutine Names ***/
1149 /* Define this macro if GNU CC should generate calls to the System V
1150 (and ANSI C) library functions `memcpy' and `memset' rather than
1151 the BSD functions `bcopy' and `bzero'. */
1152 #define TARGET_MEM_FUNCTIONS
1153 \f
1154 /*** Addressing Modes ***/
1156 #define SELECT_CC_MODE(OP,X,Y) CCmode
1158 /* Recognize any constant value that is a valid address.
1159 When PIC, we do not accept an address that would require a scratch reg
1160 to load into a register. */
1162 #define CONSTANT_ADDRESS_P(X) \
1163 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1164 || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
1165 || (GET_CODE (X) == CONST \
1166 && ! (flag_pic && pic_address_needs_scratch (X))))
1169 /* Maximum number of registers that can appear in a valid memory address. */
1170 #define MAX_REGS_PER_ADDRESS 2
1172 /* The condition for memory shift insns. */
1173 #define SCALED_ADDRESS_P(ADDR) \
1174 (GET_CODE (ADDR) == PLUS \
1175 && (GET_CODE (XEXP (ADDR, 0)) == MULT \
1176 || GET_CODE (XEXP (ADDR, 1)) == MULT))
1178 /* Can the reference to X be made short? */
1179 #define SHORT_ADDRESS_P(X,TEMP) \
1180 ((TEMP) = (GET_CODE (X) == CONST ? get_related_value (X) : X), \
1181 ((TEMP) && GET_CODE (TEMP) == SYMBOL_REF && SYMBOL_REF_FLAG (TEMP)))
1183 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1184 that is a valid memory address for an instruction.
1185 The MODE argument is the machine mode for the MEM expression
1186 that wants to use this address.
1188 On the m88000, a legitimate address has the form REG, REG+REG,
1189 REG+SMALLINT, REG+(REG*modesize) (REG[REG]), or SMALLINT.
1191 The register elimination process should deal with the argument
1192 pointer and frame pointer changing to REG+SMALLINT. */
1194 #define LEGITIMATE_INDEX_P(X, MODE) \
1195 ((GET_CODE (X) == CONST_INT \
1196 && SMALL_INT (X)) \
1197 || (REG_P (X) \
1198 && REG_OK_FOR_INDEX_P (X)) \
1199 || (GET_CODE (X) == MULT \
1200 && REG_P (XEXP (X, 0)) \
1201 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
1202 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1203 && INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE)))
1205 #define RTX_OK_FOR_BASE_P(X) \
1206 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1207 || (GET_CODE (X) == SUBREG \
1208 && GET_CODE (SUBREG_REG (X)) == REG \
1209 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1211 #define RTX_OK_FOR_INDEX_P(X) \
1212 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1213 || (GET_CODE (X) == SUBREG \
1214 && GET_CODE (SUBREG_REG (X)) == REG \
1215 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1217 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1218 { \
1219 register rtx _x; \
1220 if (REG_P (X)) \
1221 { \
1222 if (REG_OK_FOR_BASE_P (X)) \
1223 goto ADDR; \
1224 } \
1225 else if (GET_CODE (X) == PLUS) \
1226 { \
1227 register rtx _x0 = XEXP (X, 0); \
1228 register rtx _x1 = XEXP (X, 1); \
1229 if ((flag_pic \
1230 && _x0 == pic_offset_table_rtx \
1231 && (flag_pic == 2 \
1232 ? RTX_OK_FOR_BASE_P (_x1) \
1233 : (GET_CODE (_x1) == SYMBOL_REF \
1234 || GET_CODE (_x1) == LABEL_REF))) \
1235 || (REG_P (_x0) \
1236 && (REG_OK_FOR_BASE_P (_x0) \
1237 && LEGITIMATE_INDEX_P (_x1, MODE))) \
1238 || (REG_P (_x1) \
1239 && (REG_OK_FOR_BASE_P (_x1) \
1240 && LEGITIMATE_INDEX_P (_x0, MODE)))) \
1241 goto ADDR; \
1242 } \
1243 else if (GET_CODE (X) == LO_SUM) \
1244 { \
1245 register rtx _x0 = XEXP (X, 0); \
1246 register rtx _x1 = XEXP (X, 1); \
1247 if (((REG_P (_x0) \
1248 && REG_OK_FOR_BASE_P (_x0)) \
1249 || (GET_CODE (_x0) == SUBREG \
1250 && REG_P (SUBREG_REG (_x0)) \
1251 && REG_OK_FOR_BASE_P (SUBREG_REG (_x0)))) \
1252 && CONSTANT_P (_x1)) \
1253 goto ADDR; \
1254 } \
1255 else if (GET_CODE (X) == CONST_INT \
1256 && SMALL_INT (X)) \
1257 goto ADDR; \
1258 else if (SHORT_ADDRESS_P (X, _x)) \
1259 goto ADDR; \
1260 }
1262 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1263 and check its validity for a certain class.
1264 We have two alternate definitions for each of them.
1265 The usual definition accepts all pseudo regs; the other rejects
1266 them unless they have been allocated suitable hard regs.
1267 The symbol REG_OK_STRICT causes the latter definition to be used.
1269 Most source files want to accept pseudo regs in the hope that
1270 they will get allocated to the class that the insn wants them to be in.
1271 Source files for reload pass need to be strict.
1272 After reload, it makes no difference, since pseudo regs have
1273 been eliminated by then. */
1275 #ifndef REG_OK_STRICT
1277 /* Nonzero if X is a hard reg that can be used as an index
1278 or if it is a pseudo reg. Not the argument pointer. */
1279 #define REG_OK_FOR_INDEX_P(X) \
1280 (!XRF_REGNO_P(REGNO (X)))
1281 /* Nonzero if X is a hard reg that can be used as a base reg
1282 or if it is a pseudo reg. */
1283 #define REG_OK_FOR_BASE_P(X) (REG_OK_FOR_INDEX_P (X))
1285 #else
1287 /* Nonzero if X is a hard reg that can be used as an index. */
1288 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1289 /* Nonzero if X is a hard reg that can be used as a base reg. */
1290 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1292 #endif
1294 /* Try machine-dependent ways of modifying an illegitimate address
1295 to be legitimate. If we find one, return the new, valid address.
1296 This macro is used in only one place: `memory_address' in explow.c.
1298 OLDX is the address as it was before break_out_memory_refs was called.
1299 In some cases it is useful to look at this to decide what needs to be done.
1301 MODE and WIN are passed so that this macro can use
1302 GO_IF_LEGITIMATE_ADDRESS.
1304 It is always safe for this macro to do nothing. It exists to recognize
1305 opportunities to optimize the output. */
1307 /* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1309 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1310 { \
1311 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1312 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
1313 copy_to_mode_reg (SImode, XEXP (X, 1))); \
1314 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1315 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
1316 copy_to_mode_reg (SImode, XEXP (X, 0))); \
1317 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1318 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
1319 force_operand (XEXP (X, 0), 0)); \
1320 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1321 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
1322 force_operand (XEXP (X, 1), 0)); \
1323 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
1324 (X) = gen_rtx_PLUS (Pmode, force_operand (XEXP (X, 0), NULL_RTX),\
1325 XEXP (X, 1)); \
1326 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
1327 (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \
1328 force_operand (XEXP (X, 1), NULL_RTX)); \
1329 if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
1330 || GET_CODE (X) == LABEL_REF) \
1331 (X) = legitimize_address (flag_pic, X, 0, 0); \
1332 if (memory_address_p (MODE, X)) \
1333 goto WIN; }
1335 /* Go to LABEL if ADDR (a legitimate address expression)
1336 has an effect that depends on the machine mode it is used for.
1337 On the m88000 this is never true. */
1339 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1341 /* Nonzero if the constant value X is a legitimate general operand.
1342 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1343 #define LEGITIMATE_CONSTANT_P(X) (1)
1345 /* Define this, so that when PIC, reload won't try to reload invalid
1346 addresses which require two reload registers. */
1348 #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
1350 \f
1351 /*** Condition Code Information ***/
1353 /* C code for a data type which is used for declaring the `mdep'
1354 component of `cc_status'. It defaults to `int'. */
1355 /* #define CC_STATUS_MDEP int */
1357 /* A C expression to initialize the `mdep' field to "empty". */
1358 /* #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) */
1360 /* Macro to zap the normal portions of CC_STATUS, but leave the
1361 machine dependent parts (ie, literal synthesis) alone. */
1362 /* #define CC_STATUS_INIT_NO_MDEP \
1363 (cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0) */
1365 /* When using a register to hold the condition codes, the cc_status
1366 mechanism cannot be used. */
1367 #define NOTICE_UPDATE_CC(EXP, INSN) (0)
1368 \f
1369 /*** Miscellaneous Parameters ***/
1371 /* Define the codes that are matched by predicates in m88k.c. */
1372 #define PREDICATE_CODES \
1393 /* A list of predicates that do special things with modes, and so
1394 should not elicit warnings for VOIDmode match_operand. */
1396 #define SPECIAL_MODE_PREDICATES \
1400 /* The case table contains either words or branch instructions. This says
1401 which. We always claim that the vector is PC-relative. It is position
1402 independent when -fpic is used. */
1403 #define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
1405 /* An alias for a machine mode name. This is the machine mode that
1406 elements of a jump-table should have. */
1407 #define CASE_VECTOR_MODE SImode
1409 /* Define as C expression which evaluates to nonzero if the tablejump
1410 instruction expects the table to contain offsets from the address of the
1411 table.
1412 Do not define this if the table should contain absolute addresses. */
1413 #define CASE_VECTOR_PC_RELATIVE 1
1415 /* Define this if control falls through a `case' insn when the index
1416 value is out of range. This means the specified default-label is
1417 actually ignored by the `case' insn proper. */
1418 /* #define CASE_DROPS_THROUGH */
1420 /* Define this to be the smallest number of different values for which it
1421 is best to use a jump-table instead of a tree of conditional branches.
1422 The default is 4 for machines with a casesi instruction and 5 otherwise.
1423 The best 88110 number is around 7, though the exact number isn't yet
1424 known. A third alternative for the 88110 is to use a binary tree of
1425 bb1 instructions on bits 2/1/0 if the range is dense. This may not
1426 win very much though. */
1427 #define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7)
1429 /* Define this as 1 if `char' should by default be signed; else as 0. */
1430 #define DEFAULT_SIGNED_CHAR 1
1432 /* The 88open ABI says size_t is unsigned int. */
1435 /* Handle #pragma pack and sometimes #pragma weak. */
1436 #define HANDLE_SYSV_PRAGMA 1
1438 /* Tell when to handle #pragma weak. This is only done for V.4. */
1439 #define SUPPORTS_WEAK TARGET_SVR4
1440 #define SUPPORTS_ONE_ONLY TARGET_SVR4
1442 /* Max number of bytes we can move from memory to memory
1443 in one reasonably fast instruction. */
1444 #define MOVE_MAX 8
1446 /* Define if normal loads of shorter-than-word items from memory clears
1447 the rest of the bigs in the register. */
1448 #define BYTE_LOADS_ZERO_EXTEND
1450 /* Zero if access to memory by bytes is faster. */
1451 #define SLOW_BYTE_ACCESS 1
1453 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1454 is done just by pretending it is already truncated. */
1455 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1457 /* Define this if addresses of constant functions
1458 shouldn't be put through pseudo regs where they can be cse'd.
1459 Desirable on machines where ordinary constants are expensive
1460 but a CALL with constant address is cheap. */
1461 #define NO_FUNCTION_CSE
1463 /* Define this macro if an argument declared as `char' or
1464 `short' in a prototype should actually be passed as an
1465 `int'. In addition to avoiding errors in certain cases of
1466 mismatch, it also makes for better code on certain machines. */
1467 #define PROMOTE_PROTOTYPES 1
1469 /* We assume that the store-condition-codes instructions store 0 for false
1470 and some other value for true. This is the value stored for true. */
1471 #define STORE_FLAG_VALUE (-1)
1473 /* Specify the machine mode that pointers have.
1474 After generation of rtl, the compiler makes no further distinction
1475 between pointers and any other objects of this machine mode. */
1476 #define Pmode SImode
1478 /* A function address in a call instruction
1479 is a word address (for indexing purposes)
1480 so give the MEM rtx word mode. */
1481 #define FUNCTION_MODE SImode
1483 /* A barrier will be aligned so account for the possible expansion.
1484 A volatile load may be preceded by a serializing instruction.
1485 Account for profiling code output at NOTE_INSN_PROLOGUE_END.
1486 Account for block profiling code at basic block boundaries. */
1487 #define ADJUST_INSN_LENGTH(RTX, LENGTH) \
1488 if (GET_CODE (RTX) == BARRIER \
1489 || (TARGET_SERIALIZE_VOLATILE \
1490 && GET_CODE (RTX) == INSN \
1491 && GET_CODE (PATTERN (RTX)) == SET \
1492 && ((GET_CODE (SET_SRC (PATTERN (RTX))) == MEM \
1493 && MEM_VOLATILE_P (SET_SRC (PATTERN (RTX))))))) \
1494 LENGTH += 1; \
1495 else if (GET_CODE (RTX) == NOTE \
1496 && NOTE_LINE_NUMBER (RTX) == NOTE_INSN_PROLOGUE_END) \
1497 { \
1498 if (current_function_profile) \
1499 LENGTH += (FUNCTION_PROFILER_LENGTH + REG_PUSH_LENGTH \
1500 + REG_POP_LENGTH); \
1501 } \
1503 /* Track the state of the last volatile memory reference. Clear the
1504 state with CC_STATUS_INIT for now. */
1507 /* Provide the costs of an addressing mode that contains ADDR.
1508 If ADDR is not a valid address, its cost is irrelevant.
1509 REG+REG is made slightly more expensive because it might keep
1510 a register live for longer than we might like. */
1511 #define ADDRESS_COST(ADDR) \
1512 (GET_CODE (ADDR) == REG ? 1 : \
1513 GET_CODE (ADDR) == LO_SUM ? 1 : \
1514 GET_CODE (ADDR) == HIGH ? 2 : \
1515 GET_CODE (ADDR) == MULT ? 1 : \
1516 GET_CODE (ADDR) != PLUS ? 4 : \
1517 (REG_P (XEXP (ADDR, 0)) && REG_P (XEXP (ADDR, 1))) ? 2 : 1)
1519 /* A C expressions returning the cost of moving data of MODE from a register
1520 to or from memory. This is more costly than between registers. */
1521 #define MEMORY_MOVE_COST(MODE,CLASS,IN) 4
1523 /* Provide the cost of a branch. Exact meaning under development. */
1524 #define BRANCH_COST (TARGET_88100 ? 1 : 2)
1526 /* Do not break .stabs pseudos into continuations. */
1527 #define DBX_CONTIN_LENGTH 0
1528 \f
1529 /*** Output of Assembler Code ***/
1531 /* Control the assembler format that we output. */
1533 /* A C string constant describing how to begin a comment in the target
1534 assembler language. The compiler assumes that the comment will end at
1535 the end of the line. */
1538 /* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
1539 #undef ASCII_DATA_ASM_OP
1540 #undef READONLY_DATA_SECTION_ASM_OP
1541 #undef CTORS_SECTION_ASM_OP
1542 #undef DTORS_SECTION_ASM_OP
1543 #undef TARGET_ASM_NAMED_SECTION
1544 #undef INIT_SECTION_ASM_OP
1545 #undef FINI_SECTION_ASM_OP
1546 #undef TYPE_ASM_OP
1547 #undef SIZE_ASM_OP
1548 #undef SET_ASM_OP
1549 #undef SKIP_ASM_OP
1550 #undef COMMON_ASM_OP
1551 #undef ALIGN_ASM_OP
1552 #undef IDENT_ASM_OP
1554 /* These are used in varasm.c as well. */
1558 /* Other sections. */
1559 #define READONLY_DATA_SECTION_ASM_OP (TARGET_SVR4 \
1562 #define TDESC_SECTION_ASM_OP (TARGET_SVR4 \
1566 /* These must be constant strings for crtstuff.c. */
1572 /* These are pretty much common to all assemblers. */
1585 /* These are particular to the global pool optimization. */
1590 /* These are specific to PIC. */
1594 #undef TYPE_OPERAND_FMT
1596 #endif
1598 /* This is how we tell the assembler that a symbol is weak. */
1600 #undef ASM_WEAKEN_LABEL
1601 #define ASM_WEAKEN_LABEL(FILE,NAME) \
1605 /* These are specific to version 03.00 assembler syntax. */
1611 /* These are specific to the version 04.00 assembler syntax. */
1614 /* Output any initial stuff to the assembly file. Always put out
1615 a file directive, even if not debugging.
1617 Immediately after putting out the file, put out a "sem.<value>"
1618 declaration. This should be harmless on other systems, and
1619 is used in DG/UX by the debuggers to supplement COFF. The
1620 fields in the integer value are as follows:
1622 Bits Value Meaning
1623 ---- ----- -------
1624 0-1 0 No information about stack locations
1625 1 Auto/param locations are based on r30
1626 2 Auto/param locations are based on CFA
1628 3-2 0 No information on dimension order
1629 1 Array dims in sym table matches source language
1630 2 Array dims in sym table is in reverse order
1632 5-4 0 No information about the case of global names
1633 1 Global names appear in the symbol table as in the source
1634 2 Global names have been converted to lower case
1635 3 Global names have been converted to upper case. */
1637 #ifdef SDB_DEBUGGING_INFO
1638 #define ASM_COFFSEM(FILE) \
1639 if (write_symbols == SDB_DEBUG) \
1640 { \
1642 (((TARGET_OCS_FRAME_POSITION) ? 2 : 1) << 0) + (1 << 2) + (1 << 4),\
1643 (TARGET_OCS_FRAME_POSITION) \
1646 }
1647 #else
1648 #define ASM_COFFSEM(FILE)
1649 #endif
1651 /* Output the first line of the assembly file. Redefined in dgux.h. */
1653 #define ASM_FIRST_LINE(FILE) \
1654 do { \
1655 if (TARGET_SVR4) \
1656 { \
1657 if (TARGET_88110) \
1659 else \
1661 } \
1662 } while (0)
1664 /* Override svr[34].h. */
1665 #undef ASM_FILE_START
1666 #define ASM_FILE_START(FILE) \
1667 output_file_start (FILE, \
1668 (struct m88k_lang_independent_options *) f_options, \
1669 ARRAY_SIZE (f_options), \
1670 (struct m88k_lang_independent_options *) W_options, \
1671 ARRAY_SIZE (W_options))
1673 #undef ASM_FILE_END
1675 #define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) \
1676 do { \
1677 fputs (FILE_ASM_OP, FILE); \
1678 output_quoted_string (FILE, NAME); \
1680 } while (0)
1682 #ifdef SDB_DEBUGGING_INFO
1683 #undef ASM_OUTPUT_SOURCE_LINE
1684 #define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \
1685 if (m88k_prologue_done) \
1687 LINE - sdb_begin_function_line, LINE)
1688 #endif
1690 /* Code to handle #ident directives. Override svr[34].h definition. */
1691 #undef ASM_OUTPUT_IDENT
1692 #ifdef DBX_DEBUGGING_INFO
1693 #define ASM_OUTPUT_IDENT(FILE, NAME)
1694 #else
1695 #define ASM_OUTPUT_IDENT(FILE, NAME) \
1696 output_ascii (FILE, IDENT_ASM_OP, 4000, NAME, strlen (NAME));
1697 #endif
1699 /* Output to assembler file text saying following lines
1700 may contain character constants, extra white space, comments, etc. */
1703 /* Output to assembler file text saying following lines
1704 no longer contain unusual constructs. */
1707 /* Format the assembly opcode so that the arguments are all aligned.
1708 The maximum instruction size is 8 characters (fxxx.xxx), so a tab and a
1709 space will do to align the output. Abandon the output if a `%' is
1710 encountered. */
1711 #define ASM_OUTPUT_OPCODE(STREAM, PTR) \
1712 { \
1713 int ch; \
1714 const char *orig_ptr; \
1715 \
1716 for (orig_ptr = (PTR); \
1718 (PTR)++) \
1719 putc (ch, STREAM); \
1720 \
1723 }
1725 /* How to refer to registers in assembler output.
1726 This sequence is indexed by compiler's hard-register-number.
1727 Updated by OVERRIDE_OPTIONS to include the # for version 03.00 syntax. */
1729 #define REGISTER_NAMES \
1739 /* Define additional names for use in asm clobbers and asm declarations.
1741 We define the fake Condition Code register as an alias for reg 0 (which
1742 is our `condition code' register), so that condition codes can easily
1743 be clobbered by an asm. The carry bit in the PSR is now used. */
1747 /* Tell when to declare ASM names. Override svr4.h to provide this hook. */
1748 #undef DECLARE_ASM_NAME
1749 #define DECLARE_ASM_NAME TARGET_SVR4
1751 /* Write the extra assembler code needed to declare a function properly. */
1752 #undef ASM_DECLARE_FUNCTION_NAME
1753 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1754 do { \
1755 if (DECLARE_ASM_NAME) \
1757 ASM_OUTPUT_LABEL(FILE, NAME); \
1758 } while (0)
1760 /* Write the extra assembler code needed to declare an object properly. */
1761 #undef ASM_DECLARE_OBJECT_NAME
1762 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
1763 do { \
1764 if (DECLARE_ASM_NAME) \
1765 { \
1766 HOST_WIDE_INT size; \
1767 \
1769 \
1770 size_directive_output = 0; \
1771 if (!flag_inhibit_size_directive \
1772 && (DECL) && DECL_SIZE (DECL)) \
1773 { \
1774 size_directive_output = 1; \
1775 size = int_size_in_bytes (TREE_TYPE (DECL)); \
1776 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
1777 } \
1778 } \
1779 ASM_OUTPUT_LABEL(FILE, NAME); \
1780 } while (0);
1782 /* Output the size directive for a decl in rest_of_decl_compilation
1783 in the case where we did not do so before the initializer.
1784 Once we find the error_mark_node, we know that the value of
1785 size_directive_output was set
1786 by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
1788 #undef ASM_FINISH_DECLARE_OBJECT
1789 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
1790 do { \
1791 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
1792 HOST_WIDE_INT size; \
1793 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
1794 && DECLARE_ASM_NAME \
1795 && ! AT_END && TOP_LEVEL \
1796 && DECL_INITIAL (DECL) == error_mark_node \
1797 && !size_directive_output) \
1798 { \
1799 size_directive_output = 1; \
1800 size = int_size_in_bytes (TREE_TYPE (DECL)); \
1801 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
1802 } \
1803 } while (0)
1805 /* This is how to declare the size of a function. */
1806 #undef ASM_DECLARE_FUNCTION_SIZE
1807 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
1808 do { \
1809 if (DECLARE_ASM_NAME && !flag_inhibit_size_directive) \
1810 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
1811 } while (0)
1813 /* The prefix to add to user-visible assembler symbols.
1814 Override svr[34].h. */
1815 #undef USER_LABEL_PREFIX
1818 /* This is how to output a reference to a user-level label named NAME.
1819 Override svr[34].h. */
1820 #undef ASM_OUTPUT_LABELREF
1821 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1822 { \
1823 if (!TARGET_NO_UNDERSCORES && !TARGET_SVR4) \
1825 fputs (NAME, FILE); \
1826 }
1828 /* This is how to store into the string LABEL
1829 the symbol_ref name of an internal numbered label where
1830 PREFIX is the class of label and NUM is the number within the class.
1831 This is suitable for output with `assemble_name'. This must agree
1832 with (*targetm.asm_out.internal_label) above, except for being prefixed
1833 with an `*'. */
1835 #undef ASM_GENERATE_INTERNAL_LABEL
1836 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1839 /* The single-byte pseudo-op is the default. Override svr[34].h. */
1840 #undef ASM_OUTPUT_ASCII
1841 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1842 output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE)
1844 /* Override svr4.h. Change to the readonly data section for a table of
1845 addresses. final_scan_insn changes back to the text section. */
1846 #undef ASM_OUTPUT_CASE_LABEL
1847 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1848 do { \
1849 if (! CASE_VECTOR_INSNS) \
1850 { \
1851 readonly_data_section (); \
1852 ASM_OUTPUT_ALIGN (FILE, 2); \
1853 } \
1854 (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
1855 } while (0)
1857 /* Epilogue for case labels. This jump instruction is called by casesi
1858 to transfer to the appropriate branch instruction within the table.
1859 The label `@L<n>e' is coined to mark the end of the table. */
1860 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1861 do { \
1862 if (CASE_VECTOR_INSNS) \
1863 { \
1864 char label[256]; \
1867 if (! flag_delayed_branch) \
1869 reg_names[1], reg_names[m88k_case_index]); \
1871 } \
1872 } while (0)
1874 /* This is how to output an element of a case-vector that is absolute. */
1875 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1876 do { \
1877 char buffer[256]; \
1880 &buffer[1]); \
1881 } while (0)
1883 /* This is how to output an element of a case-vector that is relative. */
1884 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1885 ASM_OUTPUT_ADDR_VEC_ELT (FILE, VALUE)
1887 /* This is how to output an assembler line
1888 that says to advance the location counter
1889 to a multiple of 2**LOG bytes. */
1890 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1891 if ((LOG) != 0) \
1894 /* On the m88100, align the text address to half a cache boundary when it
1895 can only be reached by jumping. Pack code tightly when compiling
1896 crtstuff.c. */
1897 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) \
1898 (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2)
1900 /* Override svr[34].h. */
1901 #undef ASM_OUTPUT_SKIP
1902 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1905 /* Override svr4.h. */
1906 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
1908 /* This says how to output an assembler line to define a global common
1909 symbol. Size can be zero for the unusual case of a `struct { int : 0; }'.
1910 Override svr[34].h. */
1911 #undef ASM_OUTPUT_COMMON
1912 #undef ASM_OUTPUT_ALIGNED_COMMON
1913 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1915 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SCOMM_ASM_OP : COMMON_ASM_OP), \
1916 assemble_name ((FILE), (NAME)), \
1919 /* This says how to output an assembler line to define a local common
1920 symbol. Override svr[34].h. */
1921 #undef ASM_OUTPUT_LOCAL
1922 #undef ASM_OUTPUT_ALIGNED_LOCAL
1923 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1925 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SBSS_ASM_OP : BSS_ASM_OP), \
1926 assemble_name ((FILE), (NAME)), \
1929 /* This is how to output an insn to push a register on the stack.
1930 It need not be very fast code. */
1931 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1933 reg_names[STACK_POINTER_REGNUM], \
1934 reg_names[STACK_POINTER_REGNUM], \
1935 (STACK_BOUNDARY / BITS_PER_UNIT), \
1936 reg_names[REGNO], \
1937 reg_names[STACK_POINTER_REGNUM])
1939 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
1940 #define REG_PUSH_LENGTH 2
1942 /* This is how to output an insn to pop a register from the stack. */
1943 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1945 reg_names[REGNO], \
1946 reg_names[STACK_POINTER_REGNUM], \
1947 reg_names[STACK_POINTER_REGNUM], \
1948 reg_names[STACK_POINTER_REGNUM], \
1949 (STACK_BOUNDARY / BITS_PER_UNIT))
1951 /* Length in instructions of the code output by ASM_OUTPUT_REG_POP. */
1952 #define REG_POP_LENGTH 2
1953 \f
1954 /* Macros to deal with OCS debug information */
1959 #define PUT_OCS_FUNCTION_START(FILE) \
1960 { (*targetm.asm_out.internal_label) (FILE, OCS_START_PREFIX, m88k_function_number); }
1962 #define PUT_OCS_FUNCTION_END(FILE) \
1963 { (*targetm.asm_out.internal_label) (FILE, OCS_END_PREFIX, m88k_function_number); }
1965 /* Macros for debug information */
1966 #define DEBUGGER_AUTO_OFFSET(X) \
1967 (m88k_debugger_offset (X, 0) \
1968 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
1970 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
1971 (m88k_debugger_offset (X, OFFSET) \
1972 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
1974 /* Macros to deal with SDB debug information */
1975 #ifdef SDB_DEBUGGING_INFO
1977 /* Output structure tag names even when it causes a forward reference. */
1978 #define SDB_ALLOW_FORWARD_REFERENCES
1980 /* Print out extra debug information in the assembler file */
1981 #define PUT_SDB_SCL(a) \
1982 do { \
1983 register int s = (a); \
1984 register const char *scl; \
1985 switch (s) \
1986 { \
2015 } \
2016 \
2018 } while (0)
2020 #define PUT_SDB_TYPE(a) \
2021 do { \
2022 register int t = (a); \
2023 static char buffer[100]; \
2024 register char *p = buffer; \
2025 register const char *q; \
2026 register int typ = t; \
2027 register int i; \
2028 \
2029 for (i = 0; i <= 5; i++) \
2030 { \
2031 switch ((typ >> ((i*N_TSHIFT) + N_BTSHFT)) & 03) \
2032 { \
2033 case DT_PTR: \
2036 break; \
2037 \
2038 case DT_ARY: \
2041 break; \
2042 \
2043 case DT_FCN: \
2046 break; \
2047 } \
2048 } \
2049 \
2050 switch (typ & N_BTMASK) \
2051 { \
2068 } \
2069 \
2070 strcpy (p, q); \
2072 t, buffer); \
2073 } while (0)
2075 #define PUT_SDB_INT_VAL(a) \
2078 #define PUT_SDB_VAL(a) \
2080 output_addr_const (asm_out_file, (a)), \
2083 #define PUT_SDB_DEF(a) \
2085 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2087 } while (0)
2089 #define PUT_SDB_PLAIN_DEF(a) \
2092 /* Simply and endef now. */
2093 #define PUT_SDB_ENDEF \
2096 #define PUT_SDB_SIZE(a) \
2099 /* Max dimensions to store for debug information (limited by COFF). */
2100 #define SDB_MAX_DIM 6
2102 /* New method for dim operations. */
2103 #define PUT_SDB_START_DIM \
2106 /* How to end the DIM sequence. */
2107 #define PUT_SDB_LAST_DIM(a) \
2110 #define PUT_SDB_TAG(a) \
2111 do { \
2113 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2115 } while( 0 )
2117 #define PUT_SDB_BLOCK_OR_FUNCTION(NAME, SCL, LINE) \
2118 do { \
2120 NAME); \
2121 PUT_SDB_SCL( SCL ); \
2123 (LINE)); \
2124 } while (0)
2126 #define PUT_SDB_BLOCK_START(LINE) \
2129 #define PUT_SDB_BLOCK_END(LINE) \
2132 #define PUT_SDB_FUNCTION_START(LINE) \
2133 do { \
2136 } while (0)
2138 #define PUT_SDB_FUNCTION_END(LINE) \
2139 do { \
2141 } while (0)
2143 #define PUT_SDB_EPILOGUE_END(NAME) \
2144 do { \
2145 text_section (); \
2147 ASM_OUTPUT_LABELREF(asm_out_file, (NAME)); \
2149 PUT_SDB_SCL( C_EFCN ); \
2151 } while (0)
2153 #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
2157 \f
2158 /* Support const and tdesc sections. Generally, a const section will
2159 be distinct from the text section whenever we do V.4-like things
2160 and so follows DECLARE_ASM_NAME. Note that strings go in text
2161 rather than const. Override svr[34].h. */
2163 #undef EXTRA_SECTIONS
2165 #if defined(USING_SVR4_H)
2167 #define EXTRA_SECTIONS in_tdesc, in_sdata
2168 #define INIT_SECTION_FUNCTION
2169 #define FINI_SECTION_FUNCTION
2171 #else
2172 #if defined(USING_SVR3_H)
2174 #define EXTRA_SECTIONS in_tdesc, in_sdata, in_init, in_fini
2178 #undef READONLY_DATA_SECTION_ASM_OP
2179 #undef INIT_SECTION_ASM_OP
2180 #define EXTRA_SECTIONS in_tdesc, in_sdata
2181 #define INIT_SECTION_FUNCTION
2182 #define FINI_SECTION_FUNCTION
2187 #undef EXTRA_SECTION_FUNCTIONS
2188 #define EXTRA_SECTION_FUNCTIONS \
2189 void \
2190 tdesc_section () \
2191 { \
2192 if (in_section != in_tdesc) \
2193 { \
2195 in_section = in_tdesc; \
2196 } \
2197 } \
2198 \
2199 void \
2200 sdata_section () \
2201 { \
2202 if (in_section != in_sdata) \
2203 { \
2205 in_section = in_sdata; \
2206 } \
2207 } \
2208 \
2209 INIT_SECTION_FUNCTION \
2210 FINI_SECTION_FUNCTION
2212 #define TARGET_ASM_SELECT_SECTION m88k_select_section
2214 /* Jump tables consist of branch instructions and should be output in
2215 the text section. When we use a table of addresses, we explicitly
2216 change to the readonly data section. */
2217 #define JUMP_TABLES_IN_TEXT_SECTION 1
2218 \f
2219 /* Print operand X (an rtx) in assembler syntax to file FILE.
2220 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2221 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2222 #define PRINT_OPERAND_PUNCT_VALID_P(c) \
2225 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2227 /* Print a memory address as an operand to reference that memory location. */
2228 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2230 /* This says not to strength reduce the addr calculations within loops
2231 (otherwise it does not take advantage of m88k scaled loads and stores */
2233 #define DONT_REDUCE_ADDR