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* Makefile.in (cse.o): Depend on TARGET_H.
[official-gcc.git] / gcc / config / i370 / i370.h
blob61f296d71a5ee2eb47996a93774de0f43d49a1e4
1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
7
8 This file is part of GNU CC.
9
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27
28 /* Target CPU builtins. */
29 #define TARGET_CPU_CPP_BUILTINS() \
30 do \
31 { \
32 builtin_define_std ("GCC"); \
33 builtin_define_std ("gcc"); \
34 builtin_assert ("machine=i370"); \
35 builtin_assert ("cpu=i370"); \
36 } \
37 while (0)
38
39 /* Run-time compilation parameters selecting different hardware subsets. */
40
41 extern int target_flags;
42
43 /* The sizes of the code and literals on the current page. */
44
45 extern int mvs_page_code, mvs_page_lit;
46
47 /* The current page number and the base page number for the function. */
48
49 extern int mvs_page_num, function_base_page;
50
51 /* The name of the current function. */
52
53 extern char *mvs_function_name;
54
55 /* The length of the function name malloc'd area. */
56
57 extern int mvs_function_name_length;
58
59 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
60 these are more than twice as fast as load-op-store.
61 On 3090 don't use this since load-op-store is much faster. */
62
63 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
64
65 /* Default target switches */
66
67 #define TARGET_DEFAULT 1
68
69 /* Macro to define tables used to set the flags. This is a list in braces
70 of pairs in braces, each pair being { "NAME", VALUE }
71 where VALUE is the bits to set or minus the bits to clear.
72 An empty string NAME is used to identify the default VALUE. */
73
74 #define TARGET_SWITCHES \
75 { { "char-instructions", 1, N_("Generate char instructions")}, \
76 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
77 { "", TARGET_DEFAULT, 0} }
78
79 #define OVERRIDE_OPTIONS override_options ()
80
81 /* To use IBM supplied macro function prologue and epilogue, define the
82 following to 1. Should only be needed if IBM changes the definition
83 of their prologue and epilogue. */
84
85 #define MACROPROLOGUE 0
86 #define MACROEPILOGUE 0
87
88 /* Target machine storage layout */
89
90 /* Define this if most significant bit is lowest numbered in instructions
91 that operate on numbered bit-fields. */
92
93 #define BITS_BIG_ENDIAN 1
94
95 /* Define this if most significant byte of a word is the lowest numbered. */
96
97 #define BYTES_BIG_ENDIAN 1
98
99 /* Define this if MS word of a multiword is the lowest numbered. */
100
101 #define WORDS_BIG_ENDIAN 1
102
103 /* Width of a word, in units (bytes). */
104
105 #define UNITS_PER_WORD 4
106
107 /* Allocation boundary (in *bits*) for storing pointers in memory. */
108
109 #define POINTER_BOUNDARY 32
110
111 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
112
113 #define PARM_BOUNDARY 32
114
115 /* Boundary (in *bits*) on which stack pointer should be aligned. */
116
117 #define STACK_BOUNDARY 32
118
119 /* Allocation boundary (in *bits*) for the code of a function. */
120
121 #define FUNCTION_BOUNDARY 32
122
123 /* There is no point aligning anything to a rounder boundary than this. */
124
125 #define BIGGEST_ALIGNMENT 64
126
127 /* Alignment of field after `int : 0' in a structure. */
128
129 #define EMPTY_FIELD_BOUNDARY 32
130
131 /* Define this if move instructions will actually fail to work when given
132 unaligned data. */
133
134 #define STRICT_ALIGNMENT 0
135
136 /* Define target floating point format. */
137
138 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
139
140 /* Define character mapping for cross-compiling. */
141 /* but only define it if really needed, since otherwise it will break builds */
142
143 #ifdef TARGET_EBCDIC
144 #ifdef HOST_EBCDIC
145 #define MAP_CHARACTER(c) ((char)(c))
146 #else
147 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
148 #endif
149 #endif
150
151 #ifdef TARGET_HLASM
152 /* HLASM requires #pragma map. */
153 #define REGISTER_TARGET_PRAGMAS() c_register_pragma (0, "map", i370_pr_map)
154 #endif /* TARGET_HLASM */
155
156 /* Define maximum length of page minus page escape overhead. */
157
158 #define MAX_MVS_PAGE_LENGTH 4080
159
160 /* Define special register allocation order desired.
161 Don't fiddle with this. I did, and I got all sorts of register
162 spill errors when compiling even relatively simple programs...
163 I have no clue why ...
164 E.g. this one is bad:
165 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
166 */
167
168 #define REG_ALLOC_ORDER \
169 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
170
171 /* Standard register usage. */
172
173 /* Number of actual hardware registers. The hardware registers are
174 assigned numbers for the compiler from 0 to just below
175 FIRST_PSEUDO_REGISTER.
176 All registers that the compiler knows about must be given numbers,
177 even those that are not normally considered general registers.
178 For the 370, we give the data registers numbers 0-15,
179 and the floating point registers numbers 16-19. */
180
181 #define FIRST_PSEUDO_REGISTER 20
182
183 /* Define base and page registers. */
184
185 #define BASE_REGISTER 3
186 #define PAGE_REGISTER 4
187
188 #ifdef TARGET_HLASM
189 /* 1 for registers that have pervasive standard uses and are not available
190 for the register allocator. These are registers that must have fixed,
191 valid values stored in them for the entire length of the subroutine call,
192 and must not in any way be moved around, jiggered with, etc. That is,
193 they must never be clobbered, and, if clobbered, the register allocator
194 will never restore them back.
195
196 We use five registers in this special way:
197 -- R3 which is used as the base register
198 -- R4 the page origin table pointer used to load R3,
199 -- R11 the arg pointer.
200 -- R12 the TCA pointer
201 -- R13 the stack (DSA) pointer
202
203 A fifth register is also exceptional: R14 is used in many branch
204 instructions to hold the target of the branch. Technically, this
205 does not qualify R14 as a register with a long-term meaning; it should
206 be enough, theoretically, to note that these instructions clobber
207 R14, and let the compiler deal with that. In practice, however,
208 the "clobber" directive acts as a barrier to optimization, and the
209 optimizer appears to be unable to perform optimizations around branches.
210 Thus, a much better strategy appears to give R14 a pervasive use;
211 this eliminates it from the register pool witout hurting optimization.
212
213 There are other registers which have special meanings, but its OK
214 for them to get clobbered, since other allocator config below will
215 make sure that they always have the right value. These are for
216 example:
217 -- R1 the returned structure pointer.
218 -- R10 the static chain reg.
219 -- R15 holds the value a subroutine returns.
220
221 Notice that it is *almost* safe to mark R11 as available to the allocator.
222 By marking it as a call_used_register, in most cases, the compiler
223 can handle it being clobbered. However, there are a few rare
224 circumstances where the register allocator will allocate r11 and
225 also try to use it as the arg pointer ... thus it must be marked fixed.
226 I think this is a bug, but I can't track it down...
227 */
228
229 #define FIXED_REGISTERS \
230 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
231 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
232
233 /* 1 for registers not available across function calls. These must include
234 the FIXED_REGISTERS and also any registers that can be used without being
235 saved.
236 The latter must include the registers where values are returned
237 and the register where structure-value addresses are passed.
238 NOTE: all floating registers are undefined across calls.
239 */
240
241 #define CALL_USED_REGISTERS \
242 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
243 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
244
245 /* Return number of consecutive hard regs needed starting at reg REGNO
246 to hold something of mode MODE.
247 This is ordinarily the length in words of a value of mode MODE
248 but can be less for certain modes in special long registers.
249 Note that DCmode (complex double) needs two regs.
250 */
251 #endif /* TARGET_HLASM */
252
253 /* ================= */
254 #ifdef TARGET_ELF_ABI
255 /* The Linux/ELF ABI uses the same register layout as the
256 * the MVS/OE version, with the following exceptions:
257 * -- r12 (rtca) is not used.
258 */
259
260 #define FIXED_REGISTERS \
261 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
262 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
263
264 #define CALL_USED_REGISTERS \
265 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
266 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
267
268 #endif /* TARGET_ELF_ABI */
269 /* ================= */
270
271
272 #define HARD_REGNO_NREGS(REGNO, MODE) \
273 ((REGNO) > 15 ? \
274 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
275 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
276
277 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
278 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
279 even registers can hold DI. The floating point registers can hold
280 either SF, DF, SC or DC. */
281
282 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
283 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
284 (((MODE) != DImode) && ((MODE) != DFmode))) \
285 : ((MODE) == SFmode || (MODE) == DFmode) || \
286 (MODE) == SCmode || (MODE) == DCmode)
287
288 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
289 mode MODE1 and one has mode MODE2.
290 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
291 for any hard reg, then this must be 0 for correct output. */
292
293 #define MODES_TIEABLE_P(MODE1, MODE2) \
294 (((MODE1) == SFmode || (MODE1) == DFmode) \
295 == ((MODE2) == SFmode || (MODE2) == DFmode))
296
297 /* Specify the registers used for certain standard purposes.
298 The values of these macros are register numbers. */
299
300 /* 370 PC isn't overloaded on a register. */
301
302 /* #define PC_REGNUM */
303
304 /* Register to use for pushing function arguments. */
305
306 #define STACK_POINTER_REGNUM 13
307
308 /* Base register for access to local variables of the function. */
309
310 #define FRAME_POINTER_REGNUM 13
311
312 /* Value should be nonzero if functions must have frame pointers.
313 Zero means the frame pointer need not be set up (and parms may be
314 accessed via the stack pointer) in functions that seem suitable.
315 This is computed in `reload', in reload1.c. */
316
317 #define FRAME_POINTER_REQUIRED 1
318
319 /* Base register for access to arguments of the function. */
320
321 #define ARG_POINTER_REGNUM 11
322
323 /* R10 is register in which static-chain is passed to a function.
324 Static-chaining is done when a nested function references as a global
325 a stack variable of its parent: e.g.
326 int parent_func (int arg) {
327 int x; // x is in parents stack
328 void child_func (void) { x++: } // child references x as global var
329 ...
330 }
331 */
332
333 #define STATIC_CHAIN_REGNUM 10
334
335 /* R1 is register in which address to store a structure value is passed to
336 a function. This is used only when returning 64-bit long-long in a 32-bit arch
337 and when calling functions that return structs by value. e.g.
338 typedef struct A_s { int a,b,c; } A_t;
339 A_t fun_returns_value (void) {
340 A_t a; a.a=1; a.b=2 a.c=3;
341 return a;
342 }
343 In the above, the storage for the return value is in the callers stack, and
344 the R1 points at that mem location.
345 */
346
347 #define STRUCT_VALUE_REGNUM 1
348
349 /* Define the classes of registers for register constraints in the
350 machine description. Also define ranges of constants.
351
352 One of the classes must always be named ALL_REGS and include all hard regs.
353 If there is more than one class, another class must be named NO_REGS
354 and contain no registers.
355
356 The name GENERAL_REGS must be the name of a class (or an alias for
357 another name such as ALL_REGS). This is the class of registers
358 that is allowed by "g" or "r" in a register constraint.
359 Also, registers outside this class are allocated only when
360 instructions express preferences for them.
361
362 The classes must be numbered in nondecreasing order; that is,
363 a larger-numbered class must never be contained completely
364 in a smaller-numbered class.
365
366 For any two classes, it is very desirable that there be another
367 class that represents their union. */
368
369 enum reg_class
370 {
371 NO_REGS, ADDR_REGS, DATA_REGS,
372 FP_REGS, ALL_REGS, LIM_REG_CLASSES
373 };
374
375 #define GENERAL_REGS DATA_REGS
376 #define N_REG_CLASSES (int) LIM_REG_CLASSES
377
378 /* Give names of register classes as strings for dump file. */
379
380 #define REG_CLASS_NAMES \
381 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
382
383 /* Define which registers fit in which classes. This is an initializer for
384 a vector of HARD_REG_SET of length N_REG_CLASSES. */
385
386 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
387
388 /* The same information, inverted:
389 Return the class number of the smallest class containing
390 reg number REGNO. This could be a conditional expression
391 or could index an array. */
392
393 #define REGNO_REG_CLASS(REGNO) \
394 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
395
396 /* The class value for index registers, and the one for base regs. */
397
398 #define INDEX_REG_CLASS ADDR_REGS
399 #define BASE_REG_CLASS ADDR_REGS
400
401 /* Get reg_class from a letter such as appears in the machine description. */
402
403 #define REG_CLASS_FROM_LETTER(C) \
404 ((C) == 'a' ? ADDR_REGS : \
405 ((C) == 'd' ? DATA_REGS : \
406 ((C) == 'f' ? FP_REGS : NO_REGS)))
407
408 /* The letters I, J, K, L and M in a register constraint string can be used
409 to stand for particular ranges of immediate operands.
410 This macro defines what the ranges are.
411 C is the letter, and VALUE is a constant value.
412 Return 1 if VALUE is in the range specified by C. */
413
414 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
415 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
416 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
417 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
418
419 /* Similar, but for floating constants, and defining letters G and H.
420 Here VALUE is the CONST_DOUBLE rtx itself. */
421
422 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
423
424 /* see recog.c for details */
425 #define EXTRA_CONSTRAINT(OP,C) \
426 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
427 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
428
429 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
430 return the class of reg to actually use. In general this is just CLASS;
431 but on some machines in some cases it is preferable to use a more
432 restrictive class.
433
434 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
435 rare occasions when lots of egisters are spilled, reload() will try
436 to put a const int into r0 and then use r0 as an index register.
437 */
438
439 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
440 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
441 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
442 GET_CODE(X) == LABEL_REF || \
443 GET_CODE(X) == SYMBOL_REF || \
444 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
445
446 /* Return the maximum number of consecutive registers needed to represent
447 mode MODE in a register of class CLASS.
448 Note that DCmode (complex double) needs two regs.
449 */
450
451 #define CLASS_MAX_NREGS(CLASS, MODE) \
452 ((CLASS) == FP_REGS ? \
453 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
454 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
455
456 /* Stack layout; function entry, exit and calling. */
457
458 /* Define this if pushing a word on the stack makes the stack pointer a
459 smaller address. */
460 /* ------------------------------------------------------------------- */
461
462 /* ================= */
463 #ifdef TARGET_HLASM
464 /* #define STACK_GROWS_DOWNWARD */
465
466 /* Define this if the nominal address of the stack frame is at the
467 high-address end of the local variables; that is, each additional local
468 variable allocated goes at a more negative offset in the frame. */
469
470 /* #define FRAME_GROWS_DOWNWARD */
471
472 /* Offset within stack frame to start allocating local variables at.
473 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
474 first local allocated. Otherwise, it is the offset to the BEGINNING
475 of the first local allocated. */
476
477 #define STARTING_FRAME_OFFSET \
478 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
479
480 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
481
482 /* If we generate an insn to push BYTES bytes, this says how many the stack
483 pointer really advances by. On the 370, we have no push instruction. */
484
485 #endif /* TARGET_HLASM */
486
487 /* ================= */
488 #ifdef TARGET_ELF_ABI
489
490 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
491 But we want the compiler to generate posistive displacements from the
492 stack pointer, and so we make the frame lie above the stack. */
493
494 #define STACK_GROWS_DOWNWARD
495 /* #define FRAME_GROWS_DOWNWARD */
496
497 /* Offset within stack frame to start allocating local variables at.
498 This is the offset to the BEGINNING of the first local allocated. */
499
500 #define STARTING_FRAME_OFFSET \
501 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
502
503 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
504
505 #endif /* TARGET_ELF_ABI */
506 /* ================= */
507
508 /* #define PUSH_ROUNDING(BYTES) */
509
510 /* Accumulate the outgoing argument count so we can request the right
511 DSA size and determine stack offset. */
512
513 #define ACCUMULATE_OUTGOING_ARGS 1
514
515 /* Define offset from stack pointer, to location where a parm can be
516 pushed. */
517
518 #define STACK_POINTER_OFFSET 148
519
520 /* Offset of first parameter from the argument pointer register value. */
521
522 #define FIRST_PARM_OFFSET(FNDECL) 0
523
524 /* 1 if N is a possible register number for function argument passing.
525 On the 370, no registers are used in this way. */
526
527 #define FUNCTION_ARG_REGNO_P(N) 0
528
529 /* Define a data type for recording info about an argument list during
530 the scan of that argument list. This data type should hold all
531 necessary information about the function itself and about the args
532 processed so far, enough to enable macros such as FUNCTION_ARG to
533 determine where the next arg should go. */
534
535 #define CUMULATIVE_ARGS int
536
537 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
538 a function whose data type is FNTYPE.
539 For a library call, FNTYPE is 0. */
540
541 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
542
543 /* Update the data in CUM to advance over an argument of mode MODE and
544 data type TYPE. (TYPE is null for libcalls where that information
545 may not be available.) */
546
547 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
548 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
549 ? 256 \
550 : (MODE) != BLKmode \
551 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
552 : (int_size_in_bytes (TYPE) + 3) / 4))
553
554 /* Define where to put the arguments to a function. Value is zero to push
555 the argument on the stack, or a hard register in which to store the
556 argument. */
557
558 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
559
560 /* For an arg passed partly in registers and partly in memory, this is the
561 number of registers used. For args passed entirely in registers or
562 entirely in memory, zero. */
563
564 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
565
566 /* Define if returning from a function call automatically pops the
567 arguments described by the number-of-args field in the call. */
568
569 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
570
571 /* The FUNCTION_VALUE macro defines how to find the value returned by a
572 function. VALTYPE is the data type of the value (as a tree).
573 If the precise function being called is known, FUNC is its FUNCTION_DECL;
574 otherwise, FUNC is NULL.
575
576 On the 370 the return value is in R15 or R16. However,
577 DImode (64-bit ints) scalars need to get returned on the stack,
578 with r15 pointing to the location. To accomplish this, we define
579 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
580 and the DImode scalars.
581 */
582
583 #define RET_REG(MODE) \
584 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
585
586 #define FUNCTION_VALUE(VALTYPE, FUNC) \
587 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
588
589 #define RETURN_IN_MEMORY(VALTYPE) \
590 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
591
592 /* Define how to find the value returned by a library function assuming
593 the value has mode MODE. */
594
595 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
596
597 /* 1 if N is a possible register number for a function value.
598 On the 370 under C/370, R15 and R16 are thus used. */
599
600 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
601
602 /* This macro definition sets up a default value for `main' to return. */
603
604 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
605
606
607 /* Output assembler code for a block containing the constant parts of a
608 trampoline, leaving space for the variable parts.
609
610 On the 370, the trampoline contains these instructions:
611
612 BALR 14,0
613 USING *,14
614 L STATIC_CHAIN_REGISTER,X
615 L 15,Y
616 BR 15
617 X DS 0F
618 Y DS 0F */
619 /*
620 I am confused as to why this emitting raw binary, instead of instructions ...
621 see for example, rs6000/rs000.c for an example of a different way to
622 do this ... especially since BASR should probably be substituted for BALR.
623 */
624
625 #define TRAMPOLINE_TEMPLATE(FILE) \
626 { \
627 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
628 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
629 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
630 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
631 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
632 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
633 assemble_aligned_integer (2, const0_rtx); \
634 assemble_aligned_integer (2, const0_rtx); \
635 assemble_aligned_integer (2, const0_rtx); \
636 assemble_aligned_integer (2, const0_rtx); \
637 }
638
639 /* Length in units of the trampoline for entering a nested function. */
640
641 #define TRAMPOLINE_SIZE 20
642
643 /* Emit RTL insns to initialize the variable parts of a trampoline. */
644
645 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
646 { \
647 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
648 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
649 }
650
651 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
652 pointer does not matter (provided there is a frame pointer). */
653
654 #define EXIT_IGNORE_STACK 1
655
656 /* Addressing modes, and classification of registers for them. */
657
658 /* These assume that REGNO is a hard or pseudo reg number. They give
659 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
660 reg currently allocated to a suitable hard reg.
661 These definitions are NOT overridden anywhere. */
662
663 #define REGNO_OK_FOR_INDEX_P(REGNO) \
664 (((REGNO) > 0 && (REGNO) < 16) \
665 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
666
667 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
668
669 #define REGNO_OK_FOR_DATA_P(REGNO) \
670 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
671
672 #define REGNO_OK_FOR_FP_P(REGNO) \
673 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
674
675 /* Now macros that check whether X is a register and also,
676 strictly, whether it is in a specified class. */
677
678 /* 1 if X is a data register. */
679
680 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
681
682 /* 1 if X is an fp register. */
683
684 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
685
686 /* 1 if X is an address register. */
687
688 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
689
690 /* Maximum number of registers that can appear in a valid memory address. */
691
692 #define MAX_REGS_PER_ADDRESS 2
693
694 /* Recognize any constant value that is a valid address. */
695
696 #define CONSTANT_ADDRESS_P(X) \
697 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
698 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
699 || (GET_CODE (X) == CONST \
700 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
701 || (GET_CODE (X) == CONST \
702 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
703 && !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
704
705 /* Nonzero if the constant value X is a legitimate general operand.
706 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
707
708 #define LEGITIMATE_CONSTANT_P(X) 1
709
710 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
711 its validity for a certain class. We have two alternate definitions
712 for each of them. The usual definition accepts all pseudo regs; the
713 other rejects them all. The symbol REG_OK_STRICT causes the latter
714 definition to be used.
715
716 Most source files want to accept pseudo regs in the hope that they will
717 get allocated to the class that the insn wants them to be in.
718 Some source files that are used after register allocation
719 need to be strict. */
720
721 #ifndef REG_OK_STRICT
722
723 /* Nonzero if X is a hard reg that can be used as an index or if it is
724 a pseudo reg. */
725
726 #define REG_OK_FOR_INDEX_P(X) \
727 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
728
729 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
730 a pseudo reg. */
731
732 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
733
734 #else /* REG_OK_STRICT */
735
736 /* Nonzero if X is a hard reg that can be used as an index. */
737
738 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
739
740 /* Nonzero if X is a hard reg that can be used as a base reg. */
741
742 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
743
744 #endif /* REG_OK_STRICT */
745
746 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
747 valid memory address for an instruction.
748 The MODE argument is the machine mode for the MEM expression
749 that wants to use this address.
750
751 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
752 except for CONSTANT_ADDRESS_P which is actually machine-independent.
753 */
754
755 #define COUNT_REGS(X, REGS, FAIL) \
756 if (REG_P (X)) { \
757 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
758 else goto FAIL; \
759 } \
760 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
761 goto FAIL;
762
763 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
764 { \
765 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
766 goto ADDR; \
767 if (GET_CODE (X) == PLUS) \
768 { \
769 int regs = 0; \
770 rtx x0 = XEXP (X, 0); \
771 rtx x1 = XEXP (X, 1); \
772 if (GET_CODE (x0) == PLUS) \
773 { \
774 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
775 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
776 COUNT_REGS (x1, regs, FAIL); \
777 if (regs == 2) \
778 goto ADDR; \
779 } \
780 else if (GET_CODE (x1) == PLUS) \
781 { \
782 COUNT_REGS (x0, regs, FAIL); \
783 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
784 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
785 if (regs == 2) \
786 goto ADDR; \
787 } \
788 else \
789 { \
790 COUNT_REGS (x0, regs, FAIL); \
791 COUNT_REGS (x1, regs, FAIL); \
792 if (regs != 0) \
793 goto ADDR; \
794 } \
795 } \
796 FAIL: ; \
797 }
798
799 /* The 370 has no mode dependent addresses. */
800
801 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
802
803 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
804 Try machine-dependent ways of modifying an illegitimate address
805 to be legitimate. If we find one, return the new, valid address.
806 This macro is used in only one place: `memory_address' in explow.c.
807
808 Several comments:
809 (1) It's not obvious that this macro results in better code
810 than its omission does. For historical reasons we leave it in.
811
812 (2) This macro may be (???) implicated in the accidental promotion
813 or RS operand to RX operands, which bombs out any RS, SI, SS
814 instruction that was expecting a simple address. Note that
815 this occurs fairly rarely ...
816
817 (3) There is a bug somewhere that causes either r4 to be spilled,
818 or causes r0 to be used as a base register. Changeing the macro
819 below will make the bug move around, but will not make it go away
820 ... Note that this is a rare bug ...
821
822 */
823
824 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
825 { \
826 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
827 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
828 copy_to_mode_reg (SImode, XEXP (X, 1))); \
829 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
830 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
831 copy_to_mode_reg (SImode, XEXP (X, 0))); \
832 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
833 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
834 force_operand (XEXP (X, 0), 0)); \
835 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
836 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
837 force_operand (XEXP (X, 1), 0)); \
838 if (memory_address_p (MODE, X)) \
839 goto WIN; \
840 }
841
842 /* Specify the machine mode that this machine uses for the index in the
843 tablejump instruction. */
844
845 #define CASE_VECTOR_MODE SImode
846
847 /* Define this if the tablejump instruction expects the table to contain
848 offsets from the address of the table.
849 Do not define this if the table should contain absolute addresses. */
850
851 /* #define CASE_VECTOR_PC_RELATIVE */
852
853 /* Define this if fixuns_trunc is the same as fix_trunc. */
854
855 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
856
857 /* We use "unsigned char" as default. */
858
859 #define DEFAULT_SIGNED_CHAR 0
860
861 /* Max number of bytes we can move from memory to memory in one reasonably
862 fast instruction. */
863
864 #define MOVE_MAX 256
865
866 /* Nonzero if access to memory by bytes is slow and undesirable. */
867
868 #define SLOW_BYTE_ACCESS 1
869
870 /* Define if shifts truncate the shift count which implies one can omit
871 a sign-extension or zero-extension of a shift count. */
872
873 /* #define SHIFT_COUNT_TRUNCATED */
874
875 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
876 is done just by pretending it is already truncated. */
877
878 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
879
880 /* We assume that the store-condition-codes instructions store 0 for false
881 and some other value for true. This is the value stored for true. */
882
883 /* #define STORE_FLAG_VALUE (-1) */
884
885 /* When a prototype says `char' or `short', really pass an `int'. */
886
887 #define PROMOTE_PROTOTYPES 1
888
889 /* Don't perform CSE on function addresses. */
890
891 #define NO_FUNCTION_CSE
892
893 /* Specify the machine mode that pointers have.
894 After generation of rtl, the compiler makes no further distinction
895 between pointers and any other objects of this machine mode. */
896
897 #define Pmode SImode
898
899 /* A function address in a call instruction is a byte address (for
900 indexing purposes) so give the MEM rtx a byte's mode. */
901
902 #define FUNCTION_MODE QImode
903
904 /* A C statement (sans semicolon) to update the integer variable COST
905 based on the relationship between INSN that is dependent on
906 DEP_INSN through the dependence LINK. The default is to make no
907 adjustment to COST. This can be used for example to specify to
908 the scheduler that an output- or anti-dependence does not incur
909 the same cost as a data-dependence.
910
911 We will want to use this to indicate that there is a cost associated
912 with the loading, followed by use of base registers ...
913 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
914 */
915
916 /* Tell final.c how to eliminate redundant test instructions. */
917
918 /* Here we define machine-dependent flags and fields in cc_status
919 (see `conditions.h'). */
920
921 /* Store in cc_status the expressions that the condition codes will
922 describe after execution of an instruction whose pattern is EXP.
923 Do not alter them if the instruction would not alter the cc's.
924
925 On the 370, load insns do not alter the cc's. However, in some
926 cases these instructions can make it possibly invalid to use the
927 saved cc's. In those cases we clear out some or all of the saved
928 cc's so they won't be used.
929
930 Note that only some arith instructions set the CC. These include
931 add, subtract, complement, various shifts. Note that multiply
932 and divide do *not* set set the CC. Therefore, in the code below,
933 don't set the status for MUL, DIV, etc.
934
935 Note that the bitwise ops set the condition code, but not in a
936 way that we can make use of it. So we treat these as clobbering,
937 rather than setting the CC. These are clobbered in the individual
938 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
939 */
940
941 #define NOTICE_UPDATE_CC(EXP, INSN) \
942 { \
943 rtx exp = (EXP); \
944 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
945 exp = XVECEXP (exp, 0, 0); \
946 if (GET_CODE (exp) != SET) \
947 CC_STATUS_INIT; \
948 else \
949 { \
950 if (XEXP (exp, 0) == cc0_rtx) \
951 { \
952 cc_status.value1 = XEXP (exp, 0); \
953 cc_status.value2 = XEXP (exp, 1); \
954 cc_status.flags = 0; \
955 } \
956 else \
957 { \
958 if (cc_status.value1 \
959 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
960 cc_status.value1 = 0; \
961 if (cc_status.value2 \
962 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
963 cc_status.value2 = 0; \
964 switch (GET_CODE (XEXP (exp, 1))) \
965 { \
966 case PLUS: case MINUS: case NEG: \
967 case NOT: case ABS: \
968 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
969 \
970 /* mult and div don't set any cc codes !! */ \
971 case MULT: /* case UMULT: */ case DIV: case UDIV: \
972 /* and, or and xor set the cc's the wrong way !! */ \
973 case AND: case IOR: case XOR: \
974 /* some shifts set the CC some don't. */ \
975 case ASHIFT: case ASHIFTRT: \
976 do {} while (0); \
977 default: \
978 break; \
979 } \
980 } \
981 } \
982 }
983
984
985 #define CC_STATUS_SET(V1, V2) \
986 { \
987 cc_status.flags = 0; \
988 cc_status.value1 = (V1); \
989 cc_status.value2 = (V2); \
990 if (cc_status.value1 \
991 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
992 cc_status.value2 = 0; \
993 }
994
995 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
996 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
997
998 /* ------------------------------------------ */
999 /* Control the assembler format that we output. */
1000
1001 /* Define standard character escape sequences for non-ASCII targets
1002 only. */
1003
1004 #ifdef TARGET_EBCDIC
1005 #define TARGET_ESC 39
1006 #define TARGET_BELL 47
1007 #define TARGET_BS 22
1008 #define TARGET_TAB 5
1009 #define TARGET_NEWLINE 21
1010 #define TARGET_VT 11
1011 #define TARGET_FF 12
1012 #define TARGET_CR 13
1013 #endif
1014
1015 /* ======================================================== */
1016
1017 #ifdef TARGET_HLASM
1018 #define TEXT_SECTION_ASM_OP "* Program text area"
1019 #define DATA_SECTION_ASM_OP "* Program data area"
1020 #define INIT_SECTION_ASM_OP "* Program initialization area"
1021 #define SHARED_SECTION_ASM_OP "* Program shared data"
1022 #define CTOR_LIST_BEGIN /* NO OP */
1023 #define CTOR_LIST_END /* NO OP */
1024 #define MAX_MVS_LABEL_SIZE 8
1025
1026 /* How to refer to registers in assembler output. This sequence is
1027 indexed by compiler's hard-register-number (see above). */
1028
1029 #define REGISTER_NAMES \
1030 { "0", "1", "2", "3", "4", "5", "6", "7", \
1031 "8", "9", "10", "11", "12", "13", "14", "15", \
1032 "0", "2", "4", "6" \
1033 }
1034
1035 #define ASM_FILE_START(FILE) \
1036 { fputs ("\tRMODE\tANY\n", FILE); \
1037 fputs ("\tCSECT\n", FILE); }
1038
1039 #define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1040 #define ASM_COMMENT_START "*"
1041 #define ASM_APP_OFF ""
1042 #define ASM_APP_ON ""
1043
1044 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1045 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1046
1047 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1048 { \
1049 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1050 if (mvs_check_alias (NAME, temp) == 2) \
1051 { \
1052 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1053 } \
1054 }
1055
1056 /* MVS externals are limited to 8 characters, upper case only.
1057 The '_' is mapped to '@', except for MVS functions, then '#'. */
1058
1059
1060 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1061 { \
1062 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1063 if (!mvs_get_alias (NAME, temp)) \
1064 strcpy (temp, NAME); \
1065 if (!strcmp (temp,"main")) \
1066 strcpy (temp,"gccmain"); \
1067 if (mvs_function_check (temp)) \
1068 ch = '#'; \
1069 else \
1070 ch = '@'; \
1071 for (bp = temp; *bp; bp++) \
1072 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1073 fprintf (FILE, "%s", temp); \
1074 }
1075
1076 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1077 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1078
1079 /* Generate case label. For HLASM we can change to the data CSECT
1080 and put the vectors out of the code body. The assembler just
1081 concatenates CSECTs with the same name. */
1082
1083 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1084 fprintf (FILE, "\tDS\t0F\n"); \
1085 fprintf (FILE,"\tCSECT\n"); \
1086 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1087
1088 /* Put the CSECT back to the code body */
1089
1090 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1091 assemble_name (FILE, mvs_function_name); \
1092 fputs ("\tCSECT\n", FILE);
1093
1094 /* This is how to output an element of a case-vector that is absolute. */
1095
1096 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1097 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1098
1099 /* This is how to output an element of a case-vector that is relative. */
1100
1101 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1102 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1103
1104 /* This is how to output an insn to push a register on the stack.
1105 It need not be very fast code.
1106 Right now, PUSH & POP are used only when profiling is enabled,
1107 and then, only to push the static chain reg and the function struct
1108 value reg, and only if those are used. Since profiling is not
1109 supported anyway, punt on this. */
1110
1111 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1112 mvs_check_page (FILE, 8, 4); \
1113 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1114 reg_names[REGNO], STACK_POINTER_OFFSET)
1115
1116 /* This is how to output an insn to pop a register from the stack.
1117 It need not be very fast code. */
1118
1119 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1120 mvs_check_page (FILE, 8, 0); \
1121 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1122 reg_names[REGNO], STACK_POINTER_OFFSET)
1123
1124 /* This outputs a text string. The string are chopped up to fit into
1125 an 80 byte record. Also, control and special characters, interpreted
1126 by the IBM assembler, are output numerically. */
1127
1128 #define MVS_ASCII_TEXT_LENGTH 48
1129
1130 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1131 { \
1132 size_t i, limit = (LEN); \
1133 int j; \
1134 for (j = 0, i = 0; i < limit; j++, i++) \
1135 { \
1136 int c = (PTR)[i]; \
1137 if (ISCNTRL (c) || c == '&') \
1138 { \
1139 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1140 fprintf (FILE, "'\n"); \
1141 j = -1; \
1142 if (c == '&') c = MAP_CHARACTER (c); \
1143 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1144 } \
1145 else \
1146 { \
1147 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1148 fprintf (FILE, "\tDC\tC'"); \
1149 if ( c == '\'' ) \
1150 fprintf (FILE, "%c%c", c, c); \
1151 else \
1152 fprintf (FILE, "%c", c); \
1153 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1154 fprintf (FILE, "'\n" ); \
1155 } \
1156 } \
1157 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1158 fprintf (FILE, "'\n"); \
1159 }
1160
1161 /* This is how to output an assembler line that says to advance the
1162 location counter to a multiple of 2**LOG bytes. */
1163
1164 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1165 if (LOG) \
1166 { \
1167 if ((LOG) == 1) \
1168 fprintf (FILE, "\tDS\t0H\n" ); \
1169 else \
1170 fprintf (FILE, "\tDS\t0F\n" ); \
1171 } \
1172
1173 /* The maximum length of memory that the IBM assembler will allow in one
1174 DS operation. */
1175
1176 #define MAX_CHUNK 32767
1177
1178 /* A C statement to output to the stdio stream FILE an assembler
1179 instruction to advance the location counter by SIZE bytes. Those
1180 bytes should be zero when loaded. */
1181
1182 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1183 { \
1184 int s, k; \
1185 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1186 { \
1187 if (s > MAX_CHUNK) \
1188 k = MAX_CHUNK; \
1189 else \
1190 k = s; \
1191 fprintf (FILE, "\tDS\tXL%d\n", k); \
1192 } \
1193 }
1194
1195 /* A C statement (sans semicolon) to output to the stdio stream
1196 FILE the assembler definition of a common-label named NAME whose
1197 size is SIZE bytes. The variable ROUNDED is the size rounded up
1198 to whatever alignment the caller wants. */
1199
1200 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1201 { \
1202 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1203 if (mvs_check_alias(NAME, temp) == 2) \
1204 { \
1205 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1206 } \
1207 fputs ("\tENTRY\t", FILE); \
1208 assemble_name (FILE, NAME); \
1209 fputs ("\n", FILE); \
1210 fprintf (FILE, "\tDS\t0F\n"); \
1211 ASM_OUTPUT_LABEL (FILE,NAME); \
1212 ASM_OUTPUT_SKIP (FILE,SIZE); \
1213 }
1214
1215 /* A C statement (sans semicolon) to output to the stdio stream
1216 FILE the assembler definition of a local-common-label named NAME
1217 whose size is SIZE bytes. The variable ROUNDED is the size
1218 rounded up to whatever alignment the caller wants. */
1219
1220 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1221 { \
1222 fprintf (FILE, "\tDS\t0F\n"); \
1223 ASM_OUTPUT_LABEL (FILE,NAME); \
1224 ASM_OUTPUT_SKIP (FILE,SIZE); \
1225 }
1226
1227 #define ASM_PN_FORMAT "%s%lu"
1228
1229 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1230 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1231 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1232
1233 #define PRINT_OPERAND(FILE, XV, CODE) \
1234 { \
1235 switch (GET_CODE (XV)) \
1236 { \
1237 static char curreg[4]; \
1238 case REG: \
1239 if (CODE == 'N') \
1240 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1241 else \
1242 strcpy (curreg, reg_names[REGNO (XV)]); \
1243 fprintf (FILE, "%s", curreg); \
1244 break; \
1245 case MEM: \
1246 { \
1247 rtx addr = XEXP (XV, 0); \
1248 if (CODE == 'O') \
1249 { \
1250 if (GET_CODE (addr) == PLUS) \
1251 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1252 else \
1253 fprintf (FILE, "0"); \
1254 } \
1255 else if (CODE == 'R') \
1256 { \
1257 if (GET_CODE (addr) == PLUS) \
1258 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1259 else \
1260 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1261 } \
1262 else \
1263 output_address (XEXP (XV, 0)); \
1264 } \
1265 break; \
1266 case SYMBOL_REF: \
1267 case LABEL_REF: \
1268 mvs_page_lit += 4; \
1269 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1270 else fprintf (FILE, "=A("); \
1271 output_addr_const (FILE, XV); \
1272 fprintf (FILE, ")"); \
1273 break; \
1274 case CONST_INT: \
1275 if (CODE == 'B') \
1276 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1277 else if (CODE == 'X') \
1278 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1279 else if (CODE == 'h') \
1280 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1281 else if (CODE == 'H') \
1282 { \
1283 mvs_page_lit += 2; \
1284 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1285 } \
1286 else if (CODE == 'K') \
1287 { \
1288 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1289 mvs_page_lit += 4; \
1290 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1291 } \
1292 else if (CODE == 'W') \
1293 { \
1294 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1295 mvs_page_lit += 8; \
1296 if (0 <= INTVAL (XV)) { \
1297 fprintf (FILE, "=XL8'00000000"); \
1298 } else { \
1299 fprintf (FILE, "=XL8'FFFFFFFF"); \
1300 } \
1301 fprintf (FILE, "%08X'", INTVAL (XV)); \
1302 } \
1303 else \
1304 { \
1305 mvs_page_lit += 4; \
1306 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1307 } \
1308 break; \
1309 case CONST_DOUBLE: \
1310 if (GET_MODE (XV) == DImode) \
1311 { \
1312 if (CODE == 'M') \
1313 { \
1314 mvs_page_lit += 4; \
1315 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1316 } \
1317 else if (CODE == 'L') \
1318 { \
1319 mvs_page_lit += 4; \
1320 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1321 } \
1322 else \
1323 { \
1324 mvs_page_lit += 8; \
1325 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1326 CONST_DOUBLE_HIGH (XV)); \
1327 } \
1328 } \
1329 else \
1330 { \
1331 char buf[50]; \
1332 if (GET_MODE (XV) == SFmode) \
1333 { \
1334 mvs_page_lit += 4; \
1335 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1336 sizeof (buf), 0, 1); \
1337 fprintf (FILE, "=E'%s'", buf); \
1338 } \
1339 else if (GET_MODE (XV) == DFmode) \
1340 { \
1341 mvs_page_lit += 8; \
1342 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1343 sizeof (buf), 0, 1); \
1344 fprintf (FILE, "=D'%s'", buf); \
1345 } \
1346 else /* VOIDmode */ \
1347 { \
1348 mvs_page_lit += 8; \
1349 fprintf (FILE, "=XL8'%08X%08X'", \
1350 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1351 } \
1352 } \
1353 break; \
1354 case CONST: \
1355 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1356 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1357 { \
1358 mvs_page_lit += 4; \
1359 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1360 { \
1361 fprintf (FILE, "=V("); \
1362 ASM_OUTPUT_LABELREF (FILE, \
1363 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1364 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1365 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1366 } \
1367 else \
1368 { \
1369 fprintf (FILE, "=A("); \
1370 output_addr_const (FILE, XV); \
1371 fprintf (FILE, ")"); \
1372 } \
1373 } \
1374 else \
1375 { \
1376 mvs_page_lit += 4; \
1377 fprintf (FILE, "=F'"); \
1378 output_addr_const (FILE, XV); \
1379 fprintf (FILE, "'"); \
1380 } \
1381 break; \
1382 default: \
1383 abort(); \
1384 } \
1385 }
1386
1387 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1388 { \
1389 rtx breg, xreg, offset, plus; \
1390 \
1391 switch (GET_CODE (ADDR)) \
1392 { \
1393 case REG: \
1394 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1395 break; \
1396 case PLUS: \
1397 breg = 0; \
1398 xreg = 0; \
1399 offset = 0; \
1400 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1401 { \
1402 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1403 breg = XEXP (ADDR, 1); \
1404 else \
1405 offset = XEXP (ADDR, 1); \
1406 plus = XEXP (ADDR, 0); \
1407 } \
1408 else \
1409 { \
1410 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1411 breg = XEXP (ADDR, 0); \
1412 else \
1413 offset = XEXP (ADDR, 0); \
1414 plus = XEXP (ADDR, 1); \
1415 } \
1416 if (GET_CODE (plus) == PLUS) \
1417 { \
1418 if (GET_CODE (XEXP (plus, 0)) == REG) \
1419 { \
1420 if (breg) \
1421 xreg = XEXP (plus, 0); \
1422 else \
1423 breg = XEXP (plus, 0); \
1424 } \
1425 else \
1426 { \
1427 offset = XEXP (plus, 0); \
1428 } \
1429 if (GET_CODE (XEXP (plus, 1)) == REG) \
1430 { \
1431 if (breg) \
1432 xreg = XEXP (plus, 1); \
1433 else \
1434 breg = XEXP (plus, 1); \
1435 } \
1436 else \
1437 { \
1438 offset = XEXP (plus, 1); \
1439 } \
1440 } \
1441 else if (GET_CODE (plus) == REG) \
1442 { \
1443 if (breg) \
1444 xreg = plus; \
1445 else \
1446 breg = plus; \
1447 } \
1448 else \
1449 { \
1450 offset = plus; \
1451 } \
1452 if (offset) \
1453 { \
1454 if (GET_CODE (offset) == LABEL_REF) \
1455 fprintf (FILE, "L%d", \
1456 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1457 else \
1458 output_addr_const (FILE, offset); \
1459 } \
1460 else \
1461 fprintf (FILE, "0"); \
1462 if (xreg) \
1463 fprintf (FILE, "(%s,%s)", \
1464 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1465 else \
1466 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1467 break; \
1468 default: \
1469 mvs_page_lit += 4; \
1470 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1471 else fprintf (FILE, "=A("); \
1472 output_addr_const (FILE, ADDR); \
1473 fprintf (FILE, ")"); \
1474 break; \
1475 } \
1476 }
1477
1478 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1479 { \
1480 if (strlen (NAME) + 1 > mvs_function_name_length) \
1481 { \
1482 if (mvs_function_name) \
1483 free (mvs_function_name); \
1484 mvs_function_name = 0; \
1485 } \
1486 if (!mvs_function_name) \
1487 { \
1488 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1489 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1490 } \
1491 if (!strcmp (NAME, "main")) \
1492 strcpy (mvs_function_name, "gccmain"); \
1493 else \
1494 strcpy (mvs_function_name, NAME); \
1495 fprintf (FILE, "\tDS\t0F\n"); \
1496 assemble_name (FILE, mvs_function_name); \
1497 fputs ("\tRMODE\tANY\n", FILE); \
1498 assemble_name (FILE, mvs_function_name); \
1499 fputs ("\tCSECT\n", FILE); \
1500 }
1501
1502 /* Output assembler code to FILE to increment profiler label # LABELNO
1503 for profiling a function entry. */
1504
1505 #define FUNCTION_PROFILER(FILE, LABELNO) \
1506 fprintf (FILE, "Error: No profiling available.\n")
1507
1508 #endif /* TARGET_HLASM */
1509
1510 /* ======================================================== */
1511
1512 #ifdef TARGET_ELF_ABI
1513
1514 /* How to refer to registers in assembler output. This sequence is
1515 indexed by compiler's hard-register-number (see above). */
1516
1517 #define REGISTER_NAMES \
1518 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1519 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1520 "f0", "f2", "f4", "f6" \
1521 }
1522
1523 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1524 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1525 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1526
1527 #define PRINT_OPERAND(FILE, XV, CODE) \
1528 { \
1529 switch (GET_CODE (XV)) \
1530 { \
1531 static char curreg[4]; \
1532 case REG: \
1533 if (CODE == 'N') \
1534 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1535 else \
1536 strcpy (curreg, reg_names[REGNO (XV)]); \
1537 fprintf (FILE, "%s", curreg); \
1538 break; \
1539 case MEM: \
1540 { \
1541 rtx addr = XEXP (XV, 0); \
1542 if (CODE == 'O') \
1543 { \
1544 if (GET_CODE (addr) == PLUS) \
1545 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1546 else \
1547 fprintf (FILE, "0"); \
1548 } \
1549 else if (CODE == 'R') \
1550 { \
1551 if (GET_CODE (addr) == PLUS) \
1552 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1553 else \
1554 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1555 } \
1556 else \
1557 output_address (XEXP (XV, 0)); \
1558 } \
1559 break; \
1560 case SYMBOL_REF: \
1561 case LABEL_REF: \
1562 mvs_page_lit += 4; \
1563 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1564 else fprintf (FILE, "=A("); \
1565 output_addr_const (FILE, XV); \
1566 fprintf (FILE, ")"); \
1567 break; \
1568 case CONST_INT: \
1569 if (CODE == 'B') \
1570 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1571 else if (CODE == 'X') \
1572 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1573 else if (CODE == 'h') \
1574 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1575 else if (CODE == 'H') \
1576 { \
1577 mvs_page_lit += 2; \
1578 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1579 } \
1580 else if (CODE == 'K') \
1581 { \
1582 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1583 mvs_page_lit += 4; \
1584 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1585 } \
1586 else if (CODE == 'W') \
1587 { \
1588 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1589 mvs_page_lit += 8; \
1590 if (0 <= INTVAL (XV)) { \
1591 fprintf (FILE, "=XL8'00000000"); \
1592 } else { \
1593 fprintf (FILE, "=XL8'FFFFFFFF"); \
1594 } \
1595 fprintf (FILE, "%08X'", INTVAL (XV)); \
1596 } \
1597 else \
1598 { \
1599 mvs_page_lit += 4; \
1600 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1601 } \
1602 break; \
1603 case CONST_DOUBLE: \
1604 if (GET_MODE (XV) == DImode) \
1605 { \
1606 if (CODE == 'M') \
1607 { \
1608 mvs_page_lit += 4; \
1609 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1610 } \
1611 else if (CODE == 'L') \
1612 { \
1613 mvs_page_lit += 4; \
1614 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1615 } \
1616 else \
1617 { \
1618 mvs_page_lit += 8; \
1619 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1620 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1621 } \
1622 } \
1623 else \
1624 { \
1625 char buf[50]; \
1626 if (GET_MODE (XV) == SFmode) \
1627 { \
1628 mvs_page_lit += 4; \
1629 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1630 sizeof (buf), 0, 1); \
1631 fprintf (FILE, "=E'%s'", buf); \
1632 } \
1633 else if (GET_MODE (XV) == DFmode) \
1634 { \
1635 mvs_page_lit += 8; \
1636 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1637 sizeof (buf), 0, 1); \
1638 fprintf (FILE, "=D'%s'", buf); \
1639 } \
1640 else /* VOIDmode */ \
1641 { \
1642 mvs_page_lit += 8; \
1643 fprintf (FILE, "=XL8'%08X%08X'", \
1644 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1645 } \
1646 } \
1647 break; \
1648 case CONST: \
1649 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1650 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1651 { \
1652 mvs_page_lit += 4; \
1653 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1654 { \
1655 fprintf (FILE, "=V("); \
1656 ASM_OUTPUT_LABELREF (FILE, \
1657 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1658 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1659 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1660 } \
1661 else \
1662 { \
1663 fprintf (FILE, "=A("); \
1664 output_addr_const (FILE, XV); \
1665 fprintf (FILE, ")"); \
1666 } \
1667 } \
1668 else \
1669 { \
1670 mvs_page_lit += 4; \
1671 fprintf (FILE, "=bogus_bad_F'"); \
1672 output_addr_const (FILE, XV); \
1673 fprintf (FILE, "'"); \
1674 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1675 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1676 debug_rtx (XV); \
1677 abort(); \
1678 } \
1679 break; \
1680 default: \
1681 abort(); \
1682 } \
1683 }
1684
1685 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1686 { \
1687 rtx breg, xreg, offset, plus; \
1688 \
1689 switch (GET_CODE (ADDR)) \
1690 { \
1691 case REG: \
1692 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1693 break; \
1694 case PLUS: \
1695 breg = 0; \
1696 xreg = 0; \
1697 offset = 0; \
1698 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1699 { \
1700 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1701 breg = XEXP (ADDR, 1); \
1702 else \
1703 offset = XEXP (ADDR, 1); \
1704 plus = XEXP (ADDR, 0); \
1705 } \
1706 else \
1707 { \
1708 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1709 breg = XEXP (ADDR, 0); \
1710 else \
1711 offset = XEXP (ADDR, 0); \
1712 plus = XEXP (ADDR, 1); \
1713 } \
1714 if (GET_CODE (plus) == PLUS) \
1715 { \
1716 if (GET_CODE (XEXP (plus, 0)) == REG) \
1717 { \
1718 if (breg) \
1719 xreg = XEXP (plus, 0); \
1720 else \
1721 breg = XEXP (plus, 0); \
1722 } \
1723 else \
1724 { \
1725 offset = XEXP (plus, 0); \
1726 } \
1727 if (GET_CODE (XEXP (plus, 1)) == REG) \
1728 { \
1729 if (breg) \
1730 xreg = XEXP (plus, 1); \
1731 else \
1732 breg = XEXP (plus, 1); \
1733 } \
1734 else \
1735 { \
1736 offset = XEXP (plus, 1); \
1737 } \
1738 } \
1739 else if (GET_CODE (plus) == REG) \
1740 { \
1741 if (breg) \
1742 xreg = plus; \
1743 else \
1744 breg = plus; \
1745 } \
1746 else \
1747 { \
1748 offset = plus; \
1749 } \
1750 if (offset) \
1751 { \
1752 if (GET_CODE (offset) == LABEL_REF) \
1753 fprintf (FILE, "L%d", \
1754 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1755 else \
1756 output_addr_const (FILE, offset); \
1757 } \
1758 else \
1759 fprintf (FILE, "0"); \
1760 if (xreg) \
1761 fprintf (FILE, "(%s,%s)", \
1762 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1763 else \
1764 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1765 break; \
1766 default: \
1767 mvs_page_lit += 4; \
1768 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1769 else fprintf (FILE, "=A("); \
1770 output_addr_const (FILE, ADDR); \
1771 fprintf (FILE, ")"); \
1772 break; \
1773 } \
1774 }
1775
1776 /* Output assembler code to FILE to increment profiler label # LABELNO
1777 for profiling a function entry. */
1778 /* Make it a no-op for now, so we can at least compile glibc */
1779 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1780 mvs_check_page (FILE, 24, 4); \
1781 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1782 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1783 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1784 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1785 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1786 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1787 }
1788
1789 /* Don't bother to output .extern pseudo-ops. They are not needed by
1790 ELF assemblers. */
1791
1792 #undef ASM_OUTPUT_EXTERNAL
1793
1794 #define ASM_DOUBLE "\t.double"
1795
1796 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1797
1798 /* let config/svr4.h define this ...
1799 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1800 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1801 */
1802
1803 /* This is how to output an element of a case-vector that is absolute. */
1804 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1805 mvs_check_page (FILE, 4, 0); \
1806 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1807
1808 /* This is how to output an element of a case-vector that is relative. */
1809 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1810 mvs_check_page (FILE, 4, 0); \
1811 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1812
1813 /* Right now, PUSH & POP are used only when profiling is enabled,
1814 and then, only to push the static chain reg and the function struct
1815 value reg, and only if those are used by the function being profiled.
1816 We don't need this for profiling, so punt. */
1817 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1818 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1819
1820
1821 /* Indicate that jump tables go in the text section. This is
1822 necessary when compiling PIC code. */
1823 #define JUMP_TABLES_IN_TEXT_SECTION 1
1824
1825 /* Define macro used to output shift-double opcodes when the shift
1826 count is in %cl. Some assemblers require %cl as an argument;
1827 some don't.
1828
1829 GAS requires the %cl argument, so override i386/unix.h. */
1830
1831 #undef SHIFT_DOUBLE_OMITS_COUNT
1832 #define SHIFT_DOUBLE_OMITS_COUNT 0
1833
1834 /* Implicit library calls should use memcpy, not bcopy, etc. */
1835 #define TARGET_MEM_FUNCTIONS
1836
1837 /* Output before read-only data. */
1838 #define TEXT_SECTION_ASM_OP "\t.text"
1839
1840 /* Output before writable (initialized) data. */
1841 #define DATA_SECTION_ASM_OP "\t.data"
1842
1843 /* Output before writable (uninitialized) data. */
1844 #define BSS_SECTION_ASM_OP "\t.bss"
1845
1846 /* In the past there was confusion as to what the argument to .align was
1847 in GAS. For the last several years the rule has been this: for a.out
1848 file formats that argument is LOG, and for all other file formats the
1849 argument is 1<<LOG.
1850
1851 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1852 doubt or guess work, and since this file is used for both a.out and other
1853 file formats, we use one of them. */
1854
1855 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1856 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1857
1858 /* Globalizing directive for a label. */
1859 #define GLOBAL_ASM_OP ".globl "
1860
1861 /* This says how to output an assembler line
1862 to define a global common symbol. */
1863
1864 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1865 ( fputs (".comm ", (FILE)), \
1866 assemble_name ((FILE), (NAME)), \
1867 fprintf ((FILE), ",%u\n", (ROUNDED)))
1868
1869 /* This says how to output an assembler line
1870 to define a local common symbol. */
1871
1872 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1873 ( fputs (".lcomm ", (FILE)), \
1874 assemble_name ((FILE), (NAME)), \
1875 fprintf ((FILE), ",%u\n", (ROUNDED)))
1876
1877 #endif /* TARGET_ELF_ABI */
1878 #endif /* ! GCC_I370_H */
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