1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
42 #ifndef TARGET_NO_PROTOTYPE
43 #define TARGET_NO_PROTOTYPE 0
46 extern char *language_string
;
47 extern int profile_block_flag
;
49 #define min(A,B) ((A) < (B) ? (A) : (B))
50 #define max(A,B) ((A) > (B) ? (A) : (B))
54 enum processor_type rs6000_cpu
;
55 struct rs6000_cpu_select rs6000_select
[3] =
57 /* switch name, tune arch */
58 { (char *)0, "--with-cpu=", 1, 1 },
59 { (char *)0, "-mcpu=", 1, 1 },
60 { (char *)0, "-mtune=", 1, 0 },
63 /* Set to non-zero by "fix" operation to indicate that itrunc and
64 uitrunc must be defined. */
66 int rs6000_trunc_used
;
68 /* Set to non-zero once they have been defined. */
70 static int trunc_defined
;
72 /* Set to non-zero once AIX common-mode calls have been defined. */
73 static int common_mode_defined
;
75 /* Save information from a "cmpxx" operation until the branch or scc is
77 rtx rs6000_compare_op0
, rs6000_compare_op1
;
78 int rs6000_compare_fp_p
;
81 /* Label number of label created for -mrelocatable, to call to so we can
82 get the address of the GOT section */
83 int rs6000_pic_labelno
;
84 int rs6000_pic_func_labelno
;
86 /* Which abi to adhere to */
87 char *rs6000_abi_name
= RS6000_ABI_NAME
;
89 /* Semantics of the small data area */
90 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
92 /* Which small data model to use */
93 char *rs6000_sdata_name
= (char *)0;
96 /* Whether a System V.4 varargs area was created. */
97 int rs6000_sysv_varargs_p
;
99 /* ABI enumeration available for subtarget to use. */
100 enum rs6000_abi rs6000_current_abi
;
102 /* Offset & size for fpmem stack locations used for converting between
103 float and integral types. */
104 int rs6000_fpmem_offset
;
105 int rs6000_fpmem_size
;
108 char *rs6000_debug_name
;
109 int rs6000_debug_stack
; /* debug stack applications */
110 int rs6000_debug_arg
; /* debug argument handling */
112 /* Flag to say the TOC is initialized */
116 /* Default register names. */
117 char rs6000_reg_names
[][8] =
119 "0", "1", "2", "3", "4", "5", "6", "7",
120 "8", "9", "10", "11", "12", "13", "14", "15",
121 "16", "17", "18", "19", "20", "21", "22", "23",
122 "24", "25", "26", "27", "28", "29", "30", "31",
123 "0", "1", "2", "3", "4", "5", "6", "7",
124 "8", "9", "10", "11", "12", "13", "14", "15",
125 "16", "17", "18", "19", "20", "21", "22", "23",
126 "24", "25", "26", "27", "28", "29", "30", "31",
127 "mq", "lr", "ctr","ap",
128 "0", "1", "2", "3", "4", "5", "6", "7",
132 #ifdef TARGET_REGNAMES
133 static char alt_reg_names
[][8] =
135 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
136 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
137 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
138 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
139 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
140 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
141 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
142 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
143 "mq", "lr", "ctr", "ap",
144 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
149 #ifndef MASK_STRICT_ALIGN
150 #define MASK_STRICT_ALIGN 0
153 /* Override command line options. Mostly we process the processor
154 type and sometimes adjust other TARGET_ options. */
157 rs6000_override_options (default_cpu
)
161 struct rs6000_cpu_select
*ptr
;
163 /* Simplify the entries below by making a mask for any POWER
164 variant and any PowerPC variant. */
166 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
167 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
168 | MASK_PPC_GFXOPT | MASK_POWERPC64)
169 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
173 char *name
; /* Canonical processor name. */
174 enum processor_type processor
; /* Processor type enum value. */
175 int target_enable
; /* Target flags to enable. */
176 int target_disable
; /* Target flags to disable. */
177 } processor_target_table
[]
178 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
179 POWER_MASKS
| POWERPC_MASKS
},
180 {"power", PROCESSOR_POWER
,
181 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
182 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
183 {"power2", PROCESSOR_POWER
,
184 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
185 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
186 {"powerpc", PROCESSOR_POWERPC
,
187 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
188 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
189 {"rios", PROCESSOR_RIOS1
,
190 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
191 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
192 {"rios1", PROCESSOR_RIOS1
,
193 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
194 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
195 {"rsc", PROCESSOR_PPC601
,
196 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
197 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
198 {"rsc1", PROCESSOR_PPC601
,
199 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
200 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
201 {"rios2", PROCESSOR_RIOS2
,
202 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
203 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
204 {"403", PROCESSOR_PPC403
,
205 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
| MASK_STRICT_ALIGN
,
206 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
207 {"505", PROCESSOR_MPCCORE
,
208 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
209 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
210 {"601", PROCESSOR_PPC601
,
211 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
212 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
213 {"602", PROCESSOR_PPC603
,
214 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
215 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
216 {"603", PROCESSOR_PPC603
,
217 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
218 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
219 {"603e", PROCESSOR_PPC603
,
220 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
221 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
222 {"604", PROCESSOR_PPC604
,
223 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
224 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
225 {"604e", PROCESSOR_PPC604
,
226 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
227 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
228 {"620", PROCESSOR_PPC620
,
229 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
230 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
231 {"801", PROCESSOR_MPCCORE
,
232 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
233 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
234 {"821", PROCESSOR_MPCCORE
,
235 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
236 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
237 {"823", PROCESSOR_MPCCORE
,
238 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
239 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
240 {"860", PROCESSOR_MPCCORE
,
241 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
242 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
244 int ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
246 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
247 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
249 profile_block_flag
= 0;
251 /* Identify the processor type */
252 rs6000_select
[0].string
= default_cpu
;
253 rs6000_cpu
= PROCESSOR_DEFAULT
;
255 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
257 ptr
= &rs6000_select
[i
];
258 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
260 for (j
= 0; j
< ptt_size
; j
++)
261 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
264 rs6000_cpu
= processor_target_table
[j
].processor
;
268 target_flags
|= processor_target_table
[j
].target_enable
;
269 target_flags
&= ~processor_target_table
[j
].target_disable
;
275 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
279 /* If -mmultiple or -mno-multiple was explicitly used, don't
280 override with the processor default */
281 if (TARGET_MULTIPLE_SET
)
282 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
284 /* If -mstring or -mno-string was explicitly used, don't
285 override with the processor default */
286 if (TARGET_STRING_SET
)
287 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
289 /* Don't allow -mmultiple or -mstring on little endian systems, because the
290 hardware doesn't support the instructions used in little endian mode */
291 if (!BYTES_BIG_ENDIAN
)
295 target_flags
&= ~MASK_MULTIPLE
;
296 if (TARGET_MULTIPLE_SET
)
297 warning ("-mmultiple is not supported on little endian systems");
302 target_flags
&= ~MASK_STRING
;
303 if (TARGET_STRING_SET
)
304 warning ("-mstring is not supported on little endian systems");
308 /* Set debug flags */
309 if (rs6000_debug_name
)
311 if (!strcmp (rs6000_debug_name
, "all"))
312 rs6000_debug_stack
= rs6000_debug_arg
= 1;
313 else if (!strcmp (rs6000_debug_name
, "stack"))
314 rs6000_debug_stack
= 1;
315 else if (!strcmp (rs6000_debug_name
, "arg"))
316 rs6000_debug_arg
= 1;
318 error ("Unknown -mdebug-%s switch", rs6000_debug_name
);
321 #ifdef TARGET_REGNAMES
322 /* If the user desires alternate register names, copy in the alternate names
325 bcopy ((char *)alt_reg_names
, (char *)rs6000_reg_names
, sizeof (rs6000_reg_names
));
328 #ifdef SUBTARGET_OVERRIDE_OPTIONS
329 SUBTARGET_OVERRIDE_OPTIONS
;
333 /* Do anything needed at the start of the asm file. */
336 rs6000_file_start (file
, default_cpu
)
342 char *start
= buffer
;
343 struct rs6000_cpu_select
*ptr
;
345 if (flag_verbose_asm
)
347 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
348 rs6000_select
[0].string
= default_cpu
;
350 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
352 ptr
= &rs6000_select
[i
];
353 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
355 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
361 switch (rs6000_sdata
)
363 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
364 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
365 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
366 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
369 if (rs6000_sdata
&& g_switch_value
)
371 fprintf (file
, "%s -G %d", start
, g_switch_value
);
382 /* Create a CONST_DOUBLE from a string. */
385 rs6000_float_const (string
, mode
)
387 enum machine_mode mode
;
389 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
390 return immed_real_const_1 (value
, mode
);
394 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
395 two parts of the constant if the target is little endian. */
398 rs6000_immed_double_const (i0
, i1
, mode
)
399 HOST_WIDE_INT i0
, i1
;
400 enum machine_mode mode
;
402 if (! WORDS_BIG_ENDIAN
)
403 return immed_double_const (i1
, i0
, mode
);
405 return immed_double_const (i0
, i1
, mode
);
409 /* Return non-zero if this function is known to have a null epilogue. */
414 if (reload_completed
)
416 rs6000_stack_t
*info
= rs6000_stack_info ();
418 if (info
->first_gp_reg_save
== 32
419 && info
->first_fp_reg_save
== 64
429 /* Returns 1 always. */
432 any_operand (op
, mode
)
434 enum machine_mode mode
;
439 /* Returns 1 if op is the count register */
441 count_register_operand(op
, mode
)
443 enum machine_mode mode
;
445 if (GET_CODE (op
) != REG
)
448 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
451 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
457 /* Returns 1 if op is memory location for float/int conversions that masquerades
460 fpmem_operand(op
, mode
)
462 enum machine_mode mode
;
464 if (GET_CODE (op
) != REG
)
467 if (FPMEM_REGNO_P (REGNO (op
)))
471 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
478 /* Return 1 if OP is a constant that can fit in a D field. */
481 short_cint_operand (op
, mode
)
483 enum machine_mode mode
;
485 return (GET_CODE (op
) == CONST_INT
486 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) < 0x10000);
489 /* Similar for a unsigned D field. */
492 u_short_cint_operand (op
, mode
)
494 enum machine_mode mode
;
496 return (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0);
499 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
502 non_short_cint_operand (op
, mode
)
504 enum machine_mode mode
;
506 return (GET_CODE (op
) == CONST_INT
507 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000);
510 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
514 gpc_reg_operand (op
, mode
)
516 enum machine_mode mode
;
518 return (register_operand (op
, mode
)
519 && (GET_CODE (op
) != REG
520 || (REGNO (op
) >= 67 && !FPMEM_REGNO_P (REGNO (op
)))
521 || REGNO (op
) < 64));
524 /* Returns 1 if OP is either a pseudo-register or a register denoting a
528 cc_reg_operand (op
, mode
)
530 enum machine_mode mode
;
532 return (register_operand (op
, mode
)
533 && (GET_CODE (op
) != REG
534 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
535 || CR_REGNO_P (REGNO (op
))));
538 /* Returns 1 if OP is either a constant integer valid for a D-field or a
539 non-special register. If a register, it must be in the proper mode unless
543 reg_or_short_operand (op
, mode
)
545 enum machine_mode mode
;
547 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
550 /* Similar, except check if the negation of the constant would be valid for
554 reg_or_neg_short_operand (op
, mode
)
556 enum machine_mode mode
;
558 if (GET_CODE (op
) == CONST_INT
)
559 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
561 return gpc_reg_operand (op
, mode
);
564 /* Return 1 if the operand is either a register or an integer whose high-order
568 reg_or_u_short_operand (op
, mode
)
570 enum machine_mode mode
;
572 if (GET_CODE (op
) == CONST_INT
573 && (INTVAL (op
) & 0xffff0000) == 0)
576 return gpc_reg_operand (op
, mode
);
579 /* Return 1 is the operand is either a non-special register or ANY
583 reg_or_cint_operand (op
, mode
)
585 enum machine_mode mode
;
587 return GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
);
590 /* Return 1 if the operand is an operand that can be loaded via the GOT */
593 got_operand (op
, mode
)
595 enum machine_mode mode
;
597 return (GET_CODE (op
) == SYMBOL_REF
598 || GET_CODE (op
) == CONST
599 || GET_CODE (op
) == LABEL_REF
);
602 /* Return 1 if the operand is a simple references that can be loaded via
603 the GOT (labels involving addition aren't allowed). */
606 got_no_const_operand (op
, mode
)
608 enum machine_mode mode
;
610 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
);
613 /* Return the number of instructions it takes to form a constant in an
617 num_insns_constant_wide (value
)
620 /* signed constant loadable with {cal|addi} */
621 if (((unsigned HOST_WIDE_INT
)value
+ 0x8000) < 0x10000)
624 #if HOST_BITS_PER_WIDE_INT == 32
625 /* constant loadable with {cau|addis} */
626 else if ((value
& 0xffff) == 0)
630 /* constant loadable with {cau|addis} */
631 else if ((value
& 0xffff) == 0 && (value
& ~0xffffffff) == 0)
634 else if (TARGET_64BIT
)
636 HOST_WIDE_INT low
= value
& 0xffffffff;
637 HOST_WIDE_INT high
= value
>> 32;
639 if (high
== 0 && (low
& 0x80000000) == 0)
642 else if (high
== 0xffffffff && (low
& 0x80000000) != 0)
646 return num_insns_constant_wide (high
) + 1;
649 return (num_insns_constant_wide (high
)
650 + num_insns_constant_wide (low
) + 1);
659 num_insns_constant (op
, mode
)
661 enum machine_mode mode
;
663 if (GET_CODE (op
) == CONST_INT
)
664 return num_insns_constant_wide (INTVAL (op
));
666 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
671 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
672 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
673 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
676 else if (GET_CODE (op
) == CONST_DOUBLE
)
682 int endian
= (WORDS_BIG_ENDIAN
== 0);
684 if (mode
== VOIDmode
|| mode
== DImode
)
686 high
= CONST_DOUBLE_HIGH (op
);
687 low
= CONST_DOUBLE_LOW (op
);
691 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
692 REAL_VALUE_TO_TARGET_DOUBLE (rv
, l
);
698 return (num_insns_constant_wide (low
)
699 + num_insns_constant_wide (high
));
703 if (high
== 0 && (low
& 0x80000000) == 0)
704 return num_insns_constant_wide (low
);
706 else if (((high
& 0xffffffff) == 0xffffffff)
707 && ((low
& 0x80000000) != 0))
708 return num_insns_constant_wide (low
);
711 return num_insns_constant_wide (high
) + 1;
714 return (num_insns_constant_wide (high
)
715 + num_insns_constant_wide (low
) + 1);
723 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
724 with one instruction per word. We only do this if we can safely read
725 CONST_DOUBLE_{LOW,HIGH}. */
728 easy_fp_constant (op
, mode
)
730 register enum machine_mode mode
;
732 if (GET_CODE (op
) != CONST_DOUBLE
733 || GET_MODE (op
) != mode
734 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
737 /* Consider all constants with -msoft-float to be easy */
738 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
741 /* If we are using V.4 style PIC, consider all constants to be hard */
742 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
745 #ifdef TARGET_RELOCATABLE
746 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
747 if (TARGET_RELOCATABLE
)
756 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
757 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
759 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
760 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
763 else if (mode
== SFmode
)
768 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
769 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
771 return num_insns_constant_wide (l
) == 1;
774 else if (mode
== DImode
&& TARGET_32BIT
)
775 return num_insns_constant (op
, DImode
) == 2;
781 /* Return 1 if the operand is in volatile memory. Note that during the
782 RTL generation phase, memory_operand does not return TRUE for
783 volatile memory references. So this function allows us to
784 recognize volatile references where its safe. */
787 volatile_mem_operand (op
, mode
)
789 enum machine_mode mode
;
791 if (GET_CODE (op
) != MEM
)
794 if (!MEM_VOLATILE_P (op
))
797 if (mode
!= GET_MODE (op
))
800 if (reload_completed
)
801 return memory_operand (op
, mode
);
803 if (reload_in_progress
)
804 return strict_memory_address_p (mode
, XEXP (op
, 0));
806 return memory_address_p (mode
, XEXP (op
, 0));
809 /* Return 1 if the operand is an offsettable memory address. */
812 offsettable_addr_operand (op
, mode
)
814 enum machine_mode mode
;
816 return offsettable_address_p (reload_completed
| reload_in_progress
,
820 /* Return 1 if the operand is either an easy FP constant (see above) or
824 mem_or_easy_const_operand (op
, mode
)
826 enum machine_mode mode
;
828 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
831 /* Return 1 if the operand is either a non-special register or an item
832 that can be used as the operand of an SI add insn. */
835 add_operand (op
, mode
)
837 enum machine_mode mode
;
839 return (reg_or_short_operand (op
, mode
)
840 || (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff) == 0));
843 /* Return 1 if OP is a constant but not a valid add_operand. */
846 non_add_cint_operand (op
, mode
)
848 enum machine_mode mode
;
850 return (GET_CODE (op
) == CONST_INT
851 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000
852 && (INTVAL (op
) & 0xffff) != 0);
855 /* Return 1 if the operand is a non-special register or a constant that
856 can be used as the operand of an OR or XOR insn on the RS/6000. */
859 logical_operand (op
, mode
)
861 enum machine_mode mode
;
863 return (gpc_reg_operand (op
, mode
)
864 || (GET_CODE (op
) == CONST_INT
865 && ((INTVAL (op
) & 0xffff0000) == 0
866 || (INTVAL (op
) & 0xffff) == 0)));
869 /* Return 1 if C is a constant that is not a logical operand (as
873 non_logical_cint_operand (op
, mode
)
875 enum machine_mode mode
;
877 return (GET_CODE (op
) == CONST_INT
878 && (INTVAL (op
) & 0xffff0000) != 0
879 && (INTVAL (op
) & 0xffff) != 0);
882 /* Return 1 if C is a constant that can be encoded in a mask on the
883 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
884 Reject all ones and all zeros, since these should have been optimized
885 away and confuse the making of MB and ME. */
895 if (c
== 0 || c
== ~0)
898 last_bit_value
= c
& 1;
900 for (i
= 1; i
< 32; i
++)
901 if (((c
>>= 1) & 1) != last_bit_value
)
902 last_bit_value
^= 1, transitions
++;
904 return transitions
<= 2;
907 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
910 mask_operand (op
, mode
)
912 enum machine_mode mode
;
914 return GET_CODE (op
) == CONST_INT
&& mask_constant (INTVAL (op
));
917 /* Return 1 if the operand is either a non-special register or a
918 constant that can be used as the operand of an RS/6000 logical AND insn. */
921 and_operand (op
, mode
)
923 enum machine_mode mode
;
925 return (logical_operand (op
, mode
)
926 || mask_operand (op
, mode
));
929 /* Return 1 if the operand is a constant but not a valid operand for an AND
933 non_and_cint_operand (op
, mode
)
935 enum machine_mode mode
;
937 return GET_CODE (op
) == CONST_INT
&& ! and_operand (op
, mode
);
940 /* Return 1 if the operand is a general register or memory operand. */
943 reg_or_mem_operand (op
, mode
)
945 register enum machine_mode mode
;
947 return (gpc_reg_operand (op
, mode
)
948 || memory_operand (op
, mode
)
949 || volatile_mem_operand (op
, mode
));
952 /* Return 1 if the operand is a general register or memory operand without
953 pre-inc or pre_dec which produces invalid form of PowerPC lwa
957 lwa_operand (op
, mode
)
959 register enum machine_mode mode
;
963 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
964 inner
= SUBREG_REG (inner
);
966 return gpc_reg_operand (inner
, mode
)
967 || (memory_operand (inner
, mode
)
968 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
969 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
972 /* Return 1 if the operand, used inside a MEM, is a valid first argument
973 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
977 call_operand (op
, mode
)
979 enum machine_mode mode
;
981 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
984 return (GET_CODE (op
) == SYMBOL_REF
985 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
989 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
993 current_file_function_operand (op
, mode
)
995 enum machine_mode mode
;
997 return (GET_CODE (op
) == SYMBOL_REF
998 && (SYMBOL_REF_FLAG (op
)
999 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
1003 /* Return 1 if this operand is a valid input for a move insn. */
1006 input_operand (op
, mode
)
1008 enum machine_mode mode
;
1010 /* Memory is always valid. */
1011 if (memory_operand (op
, mode
))
1014 /* For floating-point, easy constants are valid. */
1015 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1017 && easy_fp_constant (op
, mode
))
1020 /* Allow any integer constant. */
1021 if (GET_MODE_CLASS (mode
) == MODE_INT
1022 && (GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
))
1025 /* For floating-point or multi-word mode, the only remaining valid type
1027 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1028 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
1029 return register_operand (op
, mode
);
1031 /* The only cases left are integral modes one word or smaller (we
1032 do not get called for MODE_CC values). These can be in any
1034 if (register_operand (op
, mode
))
1037 /* A SYMBOL_REF referring to the TOC is valid. */
1038 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
1041 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
1042 directly in the instruction stream */
1043 if (DEFAULT_ABI
== ABI_NT
1044 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
))
1047 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1049 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1050 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
1051 && small_data_operand (op
, Pmode
))
1057 /* Return 1 for an operand in small memory on V.4/eabi */
1060 small_data_operand (op
, mode
)
1062 enum machine_mode mode
;
1065 rtx sym_ref
, const_part
;
1067 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1070 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1073 if (GET_CODE (op
) == SYMBOL_REF
)
1076 else if (GET_CODE (op
) != CONST
1077 || GET_CODE (XEXP (op
, 0)) != PLUS
1078 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1079 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1083 sym_ref
= XEXP (XEXP (op
, 0), 0);
1085 if (*XSTR (sym_ref
, 0) != '@')
1096 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1097 for a call to a function whose data type is FNTYPE.
1098 For a library call, FNTYPE is 0.
1100 For incoming args we set the number of arguments in the prototype large
1101 so we never return a PARALLEL. */
1104 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1105 CUMULATIVE_ARGS
*cum
;
1110 static CUMULATIVE_ARGS zero_cumulative
;
1111 enum rs6000_abi abi
= DEFAULT_ABI
;
1113 *cum
= zero_cumulative
;
1115 cum
->fregno
= FP_ARG_MIN_REG
;
1116 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1117 cum
->call_cookie
= CALL_NORMAL
;
1121 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1122 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1123 cum
->varargs_offset
= RS6000_VARARGS_OFFSET
;
1126 else if (cum
->prototype
)
1127 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1128 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1129 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1132 cum
->nargs_prototype
= 0;
1134 cum
->orig_nargs
= cum
->nargs_prototype
;
1136 /* Check for DLL import functions */
1139 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype
)))
1140 cum
->call_cookie
= CALL_NT_DLLIMPORT
;
1142 /* Also check for longcall's */
1143 else if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1144 cum
->call_cookie
= CALL_LONG
;
1146 if (TARGET_DEBUG_ARG
)
1148 fprintf (stderr
, "\ninit_cumulative_args:");
1151 tree ret_type
= TREE_TYPE (fntype
);
1152 fprintf (stderr
, " ret code = %s,",
1153 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1156 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
) && incoming
)
1157 fprintf (stderr
, " varargs = %d, ", cum
->varargs_offset
);
1159 if (cum
->call_cookie
& CALL_NT_DLLIMPORT
)
1160 fprintf (stderr
, " dllimport,");
1162 if (cum
->call_cookie
& CALL_LONG
)
1163 fprintf (stderr
, " longcall,");
1165 fprintf (stderr
, " proto = %d, nargs = %d\n",
1166 cum
->prototype
, cum
->nargs_prototype
);
1170 /* If defined, a C expression which determines whether, and in which
1171 direction, to pad out an argument with extra space. The value
1172 should be of type `enum direction': either `upward' to pad above
1173 the argument, `downward' to pad below, or `none' to inhibit
1176 For the AIX ABI structs are always stored left shifted in their
1180 function_arg_padding (mode
, type
)
1181 enum machine_mode mode
;
1184 if (type
!= 0 && AGGREGATE_TYPE_P (type
))
1187 /* This is the default definition. */
1188 return (! BYTES_BIG_ENDIAN
1191 ? (type
&& TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
1192 && int_size_in_bytes (type
) < (PARM_BOUNDARY
/ BITS_PER_UNIT
))
1193 : GET_MODE_BITSIZE (mode
) < PARM_BOUNDARY
)
1194 ? downward
: upward
));
1197 /* If defined, a C expression that gives the alignment boundary, in bits,
1198 of an argument with the specified mode and type. If it is not defined,
1199 PARM_BOUNDARY is used for all arguments.
1201 Windows NT wants anything >= 8 bytes to be double word aligned.
1203 V.4 wants long longs to be double word aligned. */
1206 function_arg_boundary (mode
, type
)
1207 enum machine_mode mode
;
1210 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && mode
== DImode
)
1213 if (DEFAULT_ABI
!= ABI_NT
|| TARGET_64BIT
)
1214 return PARM_BOUNDARY
;
1216 if (mode
!= BLKmode
)
1217 return (GET_MODE_SIZE (mode
)) >= 8 ? 64 : 32;
1219 return (int_size_in_bytes (type
) >= 8) ? 64 : 32;
1222 /* Update the data in CUM to advance over an argument
1223 of mode MODE and data type TYPE.
1224 (TYPE is null for libcalls where that information may not be available.) */
1227 function_arg_advance (cum
, mode
, type
, named
)
1228 CUMULATIVE_ARGS
*cum
;
1229 enum machine_mode mode
;
1233 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1234 cum
->words
+= align
;
1235 cum
->nargs_prototype
--;
1237 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1239 /* Long longs must not be split between registers and stack */
1240 if ((GET_MODE_CLASS (mode
) != MODE_FLOAT
|| TARGET_SOFT_FLOAT
)
1241 && type
&& !AGGREGATE_TYPE_P (type
)
1242 && cum
->words
< GP_ARG_NUM_REG
1243 && cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
1245 cum
->words
= GP_ARG_NUM_REG
;
1248 /* Aggregates get passed as pointers */
1249 if (type
&& AGGREGATE_TYPE_P (type
))
1252 /* Floats go in registers, & don't occupy space in the GP registers
1253 like they do for AIX unless software floating point. */
1254 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1255 && TARGET_HARD_FLOAT
1256 && cum
->fregno
<= FP_ARG_V4_MAX_REG
)
1260 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
1265 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
1266 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
1270 if (TARGET_DEBUG_ARG
)
1272 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1273 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1276 /* Determine where to put an argument to a function.
1277 Value is zero to push the argument on the stack,
1278 or a hard register in which to store the argument.
1280 MODE is the argument's machine mode.
1281 TYPE is the data type of the argument (as a tree).
1282 This is null for libcalls where that information may
1284 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1285 the preceding args and about the function being called.
1286 NAMED is nonzero if this argument is a named parameter
1287 (otherwise it is an extra parameter matching an ellipsis).
1289 On RS/6000 the first eight words of non-FP are normally in registers
1290 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1291 Under V.4, the first 8 FP args are in registers.
1293 If this is floating-point and no prototype is specified, we use
1294 both an FP and integer register (or possibly FP reg and stack). Library
1295 functions (when TYPE is zero) always have the proper types for args,
1296 so we can pass the FP value just in one register. emit_library_function
1297 doesn't support PARALLEL anyway. */
1300 function_arg (cum
, mode
, type
, named
)
1301 CUMULATIVE_ARGS
*cum
;
1302 enum machine_mode mode
;
1306 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1307 int align_words
= cum
->words
+ align
;
1309 if (TARGET_DEBUG_ARG
)
1311 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1312 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1314 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1315 uses to say fp args were passed in registers. Assume that we don't need the
1316 marker for software floating point, or compiler generated library calls. */
1317 if (mode
== VOIDmode
)
1319 enum rs6000_abi abi
= DEFAULT_ABI
;
1321 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1322 && TARGET_HARD_FLOAT
1323 && cum
->nargs_prototype
< 0
1324 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
1326 return GEN_INT (cum
->call_cookie
1327 | ((cum
->fregno
== FP_ARG_MIN_REG
)
1328 ? CALL_V4_SET_FP_ARGS
1329 : CALL_V4_CLEAR_FP_ARGS
));
1332 return GEN_INT (cum
->call_cookie
);
1337 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1341 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
1344 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1346 if (DEFAULT_ABI
== ABI_V4
/* V.4 never passes FP values in GP registers */
1347 || DEFAULT_ABI
== ABI_SOLARIS
1349 || ((cum
->nargs_prototype
> 0)
1350 /* IBM AIX extended its linkage convention definition always to
1351 require FP args after register save area hole on the stack. */
1352 && (DEFAULT_ABI
!= ABI_AIX
1354 || (align_words
< GP_ARG_NUM_REG
))))
1355 return gen_rtx (REG
, mode
, cum
->fregno
);
1357 return gen_rtx (PARALLEL
, mode
,
1360 gen_rtx (EXPR_LIST
, VOIDmode
,
1361 ((align_words
>= GP_ARG_NUM_REG
)
1364 + RS6000_ARG_SIZE (mode
, type
, named
)
1366 /* If this is partially on the stack, then
1367 we only include the portion actually
1368 in registers here. */
1369 ? gen_rtx (REG
, SImode
,
1370 GP_ARG_MIN_REG
+ align_words
)
1371 : gen_rtx (REG
, mode
,
1372 GP_ARG_MIN_REG
+ align_words
))),
1374 gen_rtx (EXPR_LIST
, VOIDmode
,
1375 gen_rtx (REG
, mode
, cum
->fregno
),
1379 /* Long longs won't be split between register and stack;
1380 FP arguments get passed on the stack if they didn't get a register. */
1381 else if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) &&
1382 (align_words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
1383 || (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)))
1388 else if (align_words
< GP_ARG_NUM_REG
)
1389 return gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
);
1394 /* For an arg passed partly in registers and partly in memory,
1395 this is the number of registers used.
1396 For args passed entirely in registers or entirely in memory, zero. */
1399 function_arg_partial_nregs (cum
, mode
, type
, named
)
1400 CUMULATIVE_ARGS
*cum
;
1401 enum machine_mode mode
;
1408 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1411 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1413 if (cum
->nargs_prototype
>= 0)
1417 if (cum
->words
< GP_ARG_NUM_REG
1418 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
1420 int ret
= GP_ARG_NUM_REG
- cum
->words
;
1421 if (ret
&& TARGET_DEBUG_ARG
)
1422 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
1430 /* A C expression that indicates when an argument must be passed by
1431 reference. If nonzero for an argument, a copy of that argument is
1432 made in memory and a pointer to the argument is passed instead of
1433 the argument itself. The pointer is passed in whatever way is
1434 appropriate for passing a pointer to that type.
1436 Under V.4, structures and unions are passed by reference. */
1439 function_arg_pass_by_reference (cum
, mode
, type
, named
)
1440 CUMULATIVE_ARGS
*cum
;
1441 enum machine_mode mode
;
1445 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1446 && type
&& AGGREGATE_TYPE_P (type
))
1448 if (TARGET_DEBUG_ARG
)
1449 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
1458 /* Perform any needed actions needed for a function that is receiving a
1459 variable number of arguments.
1463 MODE and TYPE are the mode and type of the current parameter.
1465 PRETEND_SIZE is a variable that should be set to the amount of stack
1466 that must be pushed by the prolog to pretend that our caller pushed
1469 Normally, this macro will push all remaining incoming registers on the
1470 stack and set PRETEND_SIZE to the length of the registers pushed. */
1473 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
1474 CUMULATIVE_ARGS
*cum
;
1475 enum machine_mode mode
;
1481 rtx save_area
= virtual_incoming_args_rtx
;
1482 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
1484 if (TARGET_DEBUG_ARG
)
1486 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1487 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), no_rtl
);
1489 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1491 rs6000_sysv_varargs_p
= 1;
1493 save_area
= plus_constant (frame_pointer_rtx
, RS6000_VARARGS_OFFSET
);
1496 rs6000_sysv_varargs_p
= 0;
1500 int first_reg_offset
= cum
->words
;
1502 if (MUST_PASS_IN_STACK (mode
, type
))
1503 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
1505 if (first_reg_offset
> GP_ARG_NUM_REG
)
1506 first_reg_offset
= GP_ARG_NUM_REG
;
1508 if (!no_rtl
&& first_reg_offset
!= GP_ARG_NUM_REG
)
1510 (GP_ARG_MIN_REG
+ first_reg_offset
,
1511 gen_rtx (MEM
, BLKmode
,
1512 plus_constant (save_area
, first_reg_offset
* reg_size
)),
1513 GP_ARG_NUM_REG
- first_reg_offset
,
1514 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
1516 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
1519 /* Save FP registers if needed. */
1520 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && TARGET_HARD_FLOAT
&& !no_rtl
)
1522 int fregno
= cum
->fregno
;
1523 int num_fp_reg
= FP_ARG_V4_MAX_REG
+ 1 - fregno
;
1525 if (num_fp_reg
>= 0)
1527 rtx cr1
= gen_rtx (REG
, CCmode
, 69);
1528 rtx lab
= gen_label_rtx ();
1529 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
1531 emit_jump_insn (gen_rtx (SET
, VOIDmode
,
1533 gen_rtx (IF_THEN_ELSE
, VOIDmode
,
1534 gen_rtx (NE
, VOIDmode
, cr1
, const0_rtx
),
1535 gen_rtx (LABEL_REF
, VOIDmode
, lab
),
1538 while ( num_fp_reg
-- >= 0)
1540 emit_move_insn (gen_rtx (MEM
, DFmode
, plus_constant (save_area
, off
)),
1541 gen_rtx (REG
, DFmode
, fregno
++));
1550 /* If defined, is a C expression that produces the machine-specific
1551 code for a call to `__builtin_saveregs'. This code will be moved
1552 to the very beginning of the function, before any parameter access
1553 are made. The return value of this function should be an RTX that
1554 contains the value to use as the return of `__builtin_saveregs'.
1556 The argument ARGS is a `tree_list' containing the arguments that
1557 were passed to `__builtin_saveregs'.
1559 If this macro is not defined, the compiler will output an ordinary
1560 call to the library function `__builtin_saveregs'.
1562 On the Power/PowerPC return the address of the area on the stack
1563 used to hold arguments. Under AIX, this includes the 8 word register
1564 save area. Under V.4 this does not. */
1567 expand_builtin_saveregs (args
)
1570 return virtual_incoming_args_rtx
;
1574 /* Generate a memory reference for expand_block_move, copying volatile,
1575 and other bits from an original memory reference. */
1578 expand_block_move_mem (mode
, addr
, orig_mem
)
1579 enum machine_mode mode
;
1583 rtx mem
= gen_rtx (MEM
, mode
, addr
);
1585 RTX_UNCHANGING_P (mem
) = RTX_UNCHANGING_P (orig_mem
);
1586 MEM_VOLATILE_P (mem
) = MEM_VOLATILE_P (orig_mem
);
1587 MEM_IN_STRUCT_P (mem
) = MEM_IN_STRUCT_P (orig_mem
);
1588 #ifdef MEM_UNALIGNED_P
1589 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
1594 /* Expand a block move operation, and return 1 if successful. Return 0
1595 if we should let the compiler generate normal code.
1597 operands[0] is the destination
1598 operands[1] is the source
1599 operands[2] is the length
1600 operands[3] is the alignment */
1602 #define MAX_MOVE_REG 4
1605 expand_block_move (operands
)
1608 rtx orig_dest
= operands
[0];
1609 rtx orig_src
= operands
[1];
1610 rtx bytes_rtx
= operands
[2];
1611 rtx align_rtx
= operands
[3];
1612 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
1613 int align
= XINT (align_rtx
, 0);
1623 rtx stores
[MAX_MOVE_REG
];
1626 /* If this is not a fixed size move, just call memcpy */
1630 /* Anything to move? */
1631 bytes
= INTVAL (bytes_rtx
);
1635 /* Don't support real large moves. If string instructions are not used,
1636 then don't generate more than 8 loads. */
1642 else if (!STRICT_ALIGNMENT
)
1647 else if (bytes
> 8*align
)
1650 /* Move the address into scratch registers. */
1651 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
1652 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
1654 if (TARGET_STRING
) /* string instructions are available */
1656 for ( ; bytes
> 0; bytes
-= move_bytes
)
1658 if (bytes
> 24 /* move up to 32 bytes at a time */
1668 move_bytes
= (bytes
> 32) ? 32 : bytes
;
1669 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1670 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1671 GEN_INT ((move_bytes
== 32) ? 0 : move_bytes
),
1674 else if (bytes
> 16 /* move up to 24 bytes at a time */
1682 move_bytes
= (bytes
> 24) ? 24 : bytes
;
1683 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1684 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1685 GEN_INT (move_bytes
),
1688 else if (bytes
> 8 /* move up to 16 bytes at a time */
1694 move_bytes
= (bytes
> 16) ? 16 : bytes
;
1695 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1696 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1697 GEN_INT (move_bytes
),
1700 else if (bytes
> 4 && !TARGET_64BIT
)
1701 { /* move up to 8 bytes at a time */
1702 move_bytes
= (bytes
> 8) ? 8 : bytes
;
1703 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1704 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1705 GEN_INT (move_bytes
),
1708 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1709 { /* move 4 bytes */
1711 tmp_reg
= gen_reg_rtx (SImode
);
1712 emit_move_insn (tmp_reg
, expand_block_move_mem (SImode
, src_reg
, orig_src
));
1713 emit_move_insn (expand_block_move_mem (SImode
, dest_reg
, orig_dest
), tmp_reg
);
1715 else if (bytes
== 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1716 { /* move 2 bytes */
1718 tmp_reg
= gen_reg_rtx (HImode
);
1719 emit_move_insn (tmp_reg
, expand_block_move_mem (HImode
, src_reg
, orig_src
));
1720 emit_move_insn (expand_block_move_mem (HImode
, dest_reg
, orig_dest
), tmp_reg
);
1722 else if (bytes
== 1) /* move 1 byte */
1725 tmp_reg
= gen_reg_rtx (QImode
);
1726 emit_move_insn (tmp_reg
, expand_block_move_mem (QImode
, src_reg
, orig_src
));
1727 emit_move_insn (expand_block_move_mem (QImode
, dest_reg
, orig_dest
), tmp_reg
);
1730 { /* move up to 4 bytes at a time */
1731 move_bytes
= (bytes
> 4) ? 4 : bytes
;
1732 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1733 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1734 GEN_INT (move_bytes
),
1738 if (bytes
> move_bytes
)
1740 emit_insn (gen_addsi3 (src_reg
, src_reg
, GEN_INT (move_bytes
)));
1741 emit_insn (gen_addsi3 (dest_reg
, dest_reg
, GEN_INT (move_bytes
)));
1746 else /* string instructions not available */
1748 num_reg
= offset
= 0;
1749 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
1751 /* Calculate the correct offset for src/dest */
1755 dest_addr
= dest_reg
;
1759 src_addr
= gen_rtx (PLUS
, Pmode
, src_reg
, GEN_INT (offset
));
1760 dest_addr
= gen_rtx (PLUS
, Pmode
, dest_reg
, GEN_INT (offset
));
1763 /* Generate the appropriate load and store, saving the stores for later */
1764 if (bytes
>= 8 && TARGET_64BIT
&& (align
>= 8 || !STRICT_ALIGNMENT
))
1767 tmp_reg
= gen_reg_rtx (DImode
);
1768 emit_insn (gen_movdi (tmp_reg
, expand_block_move_mem (DImode
, src_addr
, orig_src
)));
1769 stores
[ num_reg
++ ] = gen_movdi (expand_block_move_mem (DImode
, dest_addr
, orig_dest
), tmp_reg
);
1771 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1774 tmp_reg
= gen_reg_rtx (SImode
);
1775 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (SImode
, src_addr
, orig_src
)));
1776 stores
[ num_reg
++ ] = gen_movsi (expand_block_move_mem (SImode
, dest_addr
, orig_dest
), tmp_reg
);
1778 else if (bytes
>= 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1781 tmp_reg
= gen_reg_rtx (HImode
);
1782 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (HImode
, src_addr
, orig_src
)));
1783 stores
[ num_reg
++ ] = gen_movhi (expand_block_move_mem (HImode
, dest_addr
, orig_dest
), tmp_reg
);
1788 tmp_reg
= gen_reg_rtx (QImode
);
1789 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (QImode
, src_addr
, orig_src
)));
1790 stores
[ num_reg
++ ] = gen_movqi (expand_block_move_mem (QImode
, dest_addr
, orig_dest
), tmp_reg
);
1793 if (num_reg
>= MAX_MOVE_REG
)
1795 for (i
= 0; i
< num_reg
; i
++)
1796 emit_insn (stores
[i
]);
1801 for (i
= 0; i
< num_reg
; i
++)
1802 emit_insn (stores
[i
]);
1809 /* Return 1 if OP is a load multiple operation. It is known to be a
1810 PARALLEL and the first section will be tested. */
1813 load_multiple_operation (op
, mode
)
1815 enum machine_mode mode
;
1817 int count
= XVECLEN (op
, 0);
1822 /* Perform a quick check so we don't blow up below. */
1824 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1825 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
1826 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
1829 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
1830 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
1832 for (i
= 1; i
< count
; i
++)
1834 rtx elt
= XVECEXP (op
, 0, i
);
1836 if (GET_CODE (elt
) != SET
1837 || GET_CODE (SET_DEST (elt
)) != REG
1838 || GET_MODE (SET_DEST (elt
)) != SImode
1839 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
1840 || GET_CODE (SET_SRC (elt
)) != MEM
1841 || GET_MODE (SET_SRC (elt
)) != SImode
1842 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
1843 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
1844 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
1845 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
1852 /* Similar, but tests for store multiple. Here, the second vector element
1853 is a CLOBBER. It will be tested later. */
1856 store_multiple_operation (op
, mode
)
1858 enum machine_mode mode
;
1860 int count
= XVECLEN (op
, 0) - 1;
1865 /* Perform a quick check so we don't blow up below. */
1867 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1868 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
1869 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
1872 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
1873 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
1875 for (i
= 1; i
< count
; i
++)
1877 rtx elt
= XVECEXP (op
, 0, i
+ 1);
1879 if (GET_CODE (elt
) != SET
1880 || GET_CODE (SET_SRC (elt
)) != REG
1881 || GET_MODE (SET_SRC (elt
)) != SImode
1882 || REGNO (SET_SRC (elt
)) != src_regno
+ i
1883 || GET_CODE (SET_DEST (elt
)) != MEM
1884 || GET_MODE (SET_DEST (elt
)) != SImode
1885 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
1886 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
1887 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
1888 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
1895 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1896 We only check the opcode against the mode of the CC value here. */
1899 branch_comparison_operator (op
, mode
)
1901 enum machine_mode mode
;
1903 enum rtx_code code
= GET_CODE (op
);
1904 enum machine_mode cc_mode
;
1906 if (GET_RTX_CLASS (code
) != '<')
1909 cc_mode
= GET_MODE (XEXP (op
, 0));
1910 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1913 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1914 && cc_mode
== CCUNSmode
)
1917 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1918 && (cc_mode
!= CCUNSmode
))
1924 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1925 We check the opcode against the mode of the CC value and disallow EQ or
1926 NE comparisons for integers. */
1929 scc_comparison_operator (op
, mode
)
1931 enum machine_mode mode
;
1933 enum rtx_code code
= GET_CODE (op
);
1934 enum machine_mode cc_mode
;
1936 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1939 if (GET_RTX_CLASS (code
) != '<')
1942 cc_mode
= GET_MODE (XEXP (op
, 0));
1943 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1946 if (code
== NE
&& cc_mode
!= CCFPmode
)
1949 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1950 && cc_mode
== CCUNSmode
)
1953 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1954 && (cc_mode
!= CCUNSmode
))
1957 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
1963 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1964 mask required to convert the result of a rotate insn into a shift
1965 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1968 includes_lshift_p (shiftop
, andop
)
1969 register rtx shiftop
;
1972 int shift_mask
= (~0 << INTVAL (shiftop
));
1974 return (INTVAL (andop
) & ~shift_mask
) == 0;
1977 /* Similar, but for right shift. */
1980 includes_rshift_p (shiftop
, andop
)
1981 register rtx shiftop
;
1984 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
1986 shift_mask
>>= INTVAL (shiftop
);
1988 return (INTVAL (andop
) & ~ shift_mask
) == 0;
1991 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1992 for lfq and stfq insns.
1994 Note reg1 and reg2 *must* be hard registers. To be sure we will
1995 abort if we are passed pseudo registers. */
1998 registers_ok_for_quad_peep (reg1
, reg2
)
2001 /* We might have been passed a SUBREG. */
2002 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
2005 return (REGNO (reg1
) == REGNO (reg2
) - 1);
2008 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
2009 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
2012 addrs_ok_for_quad_peep (addr1
, addr2
)
2019 /* Extract an offset (if used) from the first addr. */
2020 if (GET_CODE (addr1
) == PLUS
)
2022 /* If not a REG, return zero. */
2023 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
2027 reg1
= REGNO (XEXP (addr1
, 0));
2028 /* The offset must be constant! */
2029 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
2031 offset1
= INTVAL (XEXP (addr1
, 1));
2034 else if (GET_CODE (addr1
) != REG
)
2038 reg1
= REGNO (addr1
);
2039 /* This was a simple (mem (reg)) expression. Offset is 0. */
2043 /* Make sure the second address is a (mem (plus (reg) (const_int). */
2044 if (GET_CODE (addr2
) != PLUS
)
2047 if (GET_CODE (XEXP (addr2
, 0)) != REG
2048 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
2051 if (reg1
!= REGNO (XEXP (addr2
, 0)))
2054 /* The offset for the second addr must be 8 more than the first addr. */
2055 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
2058 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
2063 /* Return the register class of a scratch register needed to copy IN into
2064 or out of a register in CLASS in MODE. If it can be done directly,
2065 NO_REGS is returned. */
2068 secondary_reload_class (class, mode
, in
)
2069 enum reg_class
class;
2070 enum machine_mode mode
;
2073 int regno
= true_regnum (in
);
2075 if (regno
>= FIRST_PSEUDO_REGISTER
)
2078 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
2080 if (class == GENERAL_REGS
|| class == BASE_REGS
2081 || (regno
>= 0 && INT_REGNO_P (regno
)))
2084 /* Constants, memory, and FP registers can go into FP registers. */
2085 if ((regno
== -1 || FP_REGNO_P (regno
))
2086 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
2089 /* We can copy among the CR registers. */
2090 if ((class == CR_REGS
|| class == CR0_REGS
)
2091 && regno
>= 0 && CR_REGNO_P (regno
))
2094 /* Otherwise, we need GENERAL_REGS. */
2095 return GENERAL_REGS
;
2098 /* Given a comparison operation, return the bit number in CCR to test. We
2099 know this is a valid comparison.
2101 SCC_P is 1 if this is for an scc. That means that %D will have been
2102 used instead of %C, so the bits will be in different places.
2104 Return -1 if OP isn't a valid comparison for some reason. */
2111 enum rtx_code code
= GET_CODE (op
);
2112 enum machine_mode cc_mode
;
2116 if (GET_RTX_CLASS (code
) != '<')
2119 cc_mode
= GET_MODE (XEXP (op
, 0));
2120 cc_regnum
= REGNO (XEXP (op
, 0));
2121 base_bit
= 4 * (cc_regnum
- 68);
2123 /* In CCEQmode cases we have made sure that the result is always in the
2124 third bit of the CR field. */
2126 if (cc_mode
== CCEQmode
)
2127 return base_bit
+ 3;
2132 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
2134 return base_bit
+ 2;
2136 return base_bit
+ 1;
2141 /* If floating-point, we will have done a cror to put the bit in the
2142 unordered position. So test that bit. For integer, this is ! LT
2143 unless this is an scc insn. */
2144 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
2147 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
2154 /* Return the GOT register, creating it if needed. */
2157 rs6000_got_register (value
)
2160 if (!current_function_uses_pic_offset_table
|| !pic_offset_table_rtx
)
2162 if (reload_in_progress
|| reload_completed
)
2163 fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value
);
2165 current_function_uses_pic_offset_table
= 1;
2166 pic_offset_table_rtx
= gen_rtx (REG
, Pmode
, GOT_TOC_REGNUM
);
2169 return pic_offset_table_rtx
;
2173 /* Replace all occurrences of register FROM with an new pseudo register in an insn X.
2174 Store the pseudo register used in REG.
2175 This is only safe during FINALIZE_PIC, since the registers haven't been setup
2179 rs6000_replace_regno (x
, from
, reg
)
2187 /* Allow this function to make replacements in EXPR_LISTs. */
2191 switch (GET_CODE (x
))
2204 if (REGNO (x
) == from
)
2207 *reg
= pic_offset_table_rtx
= gen_reg_rtx (Pmode
);
2215 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2216 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2219 XEXP (x
, i
) = rs6000_replace_regno (XEXP (x
, i
), from
, reg
);
2220 else if (fmt
[i
] == 'E')
2221 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2222 XVECEXP (x
, i
, j
) = rs6000_replace_regno (XVECEXP (x
, i
, j
), from
, reg
);
2229 /* By generating position-independent code, when two different
2230 programs (A and B) share a common library (libC.a), the text of
2231 the library can be shared whether or not the library is linked at
2232 the same address for both programs. In some of these
2233 environments, position-independent code requires not only the use
2234 of different addressing modes, but also special code to enable the
2235 use of these addressing modes.
2237 The `FINALIZE_PIC' macro serves as a hook to emit these special
2238 codes once the function is being compiled into assembly code, but
2239 not before. (It is not done before, because in the case of
2240 compiling an inline function, it would lead to multiple PIC
2241 prologues being included in functions which used inline functions
2242 and were compiled to assembly language.) */
2245 rs6000_finalize_pic ()
2247 /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM
2248 with an appropriate pseudo register. If we find we need GOT/TOC,
2249 add the appropriate init code. */
2250 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2252 rtx insn
= get_insns ();
2255 rtx last_insn
= NULL_RTX
;
2257 if (GET_CODE (insn
) == NOTE
)
2258 insn
= next_nonnote_insn (insn
);
2261 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2263 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2265 PATTERN (insn
) = rs6000_replace_regno (PATTERN (insn
),
2269 if (REG_NOTES (insn
))
2270 REG_NOTES (insn
) = rs6000_replace_regno (REG_NOTES (insn
),
2275 if (GET_CODE (insn
) != NOTE
)
2281 rtx init
= gen_init_v4_pic (reg
);
2282 emit_insn_before (init
, first_insn
);
2283 if (!optimize
&& last_insn
)
2284 emit_insn_after (gen_rtx (USE
, VOIDmode
, reg
), last_insn
);
2290 /* Search for any occurrence of the GOT_TOC register marker that should
2291 have been eliminated, but may have crept back in. */
2297 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2299 rtx got_reg
= gen_rtx (REG
, Pmode
, GOT_TOC_REGNUM
);
2300 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2301 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2302 && reg_mentioned_p (got_reg
, PATTERN (insn
)))
2303 fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn
));
2308 /* Define the structure for the machine field in struct function. */
2309 struct machine_function
2315 rtx pic_offset_table_rtx
;
2318 /* Functions to save and restore rs6000_fpmem_size.
2319 These will be called, via pointer variables,
2320 from push_function_context and pop_function_context. */
2323 rs6000_save_machine_status (p
)
2326 struct machine_function
*machine
=
2327 (struct machine_function
*) xmalloc (sizeof (struct machine_function
));
2329 p
->machine
= machine
;
2330 machine
->sysv_varargs_p
= rs6000_sysv_varargs_p
;
2331 machine
->fpmem_size
= rs6000_fpmem_size
;
2332 machine
->fpmem_offset
= rs6000_fpmem_offset
;
2333 machine
->pic_offset_table_rtx
= pic_offset_table_rtx
;
2337 rs6000_restore_machine_status (p
)
2340 struct machine_function
*machine
= p
->machine
;
2342 rs6000_sysv_varargs_p
= machine
->sysv_varargs_p
;
2343 rs6000_fpmem_size
= machine
->fpmem_size
;
2344 rs6000_fpmem_offset
= machine
->fpmem_offset
;
2345 pic_offset_table_rtx
= machine
->pic_offset_table_rtx
;
2348 p
->machine
= (struct machine_function
*)0;
2351 /* Do anything needed before RTL is emitted for each function. */
2354 rs6000_init_expanders ()
2356 /* Reset varargs and save TOC indicator */
2357 rs6000_sysv_varargs_p
= 0;
2358 rs6000_fpmem_size
= 0;
2359 rs6000_fpmem_offset
= 0;
2360 pic_offset_table_rtx
= (rtx
)0;
2362 /* Arrange to save and restore machine status around nested functions. */
2363 save_machine_status
= rs6000_save_machine_status
;
2364 restore_machine_status
= rs6000_restore_machine_status
;
2368 /* Print an operand. Recognize special options, documented below. */
2371 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
2372 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
2374 #define SMALL_DATA_RELOC "sda21"
2375 #define SMALL_DATA_REG 0
2379 print_operand (file
, x
, code
)
2387 /* These macros test for integers and extract the low-order bits. */
2389 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2390 && GET_MODE (X) == VOIDmode)
2392 #define INT_LOWPART(X) \
2393 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2398 /* Write out an instruction after the call which may be replaced
2399 with glue code by the loader. This depends on the AIX version. */
2400 asm_fprintf (file
, RS6000_CALL_GLUE
);
2404 /* Write the register number of the TOC register. */
2405 fputs (TARGET_MINIMAL_TOC
? reg_names
[30] : reg_names
[2], file
);
2409 /* Write out either a '.' or '$' for the current location, depending
2410 on whether this is Solaris or not. */
2411 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
2415 /* If X is a constant integer whose low-order 5 bits are zero,
2416 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2417 in the AIX assembler where "sri" with a zero shift count
2418 write a trash instruction. */
2419 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
2426 /* Low-order 16 bits of constant, unsigned. */
2428 output_operand_lossage ("invalid %%b value");
2430 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2434 /* This is an optional cror needed for LE or GE floating-point
2435 comparisons. Otherwise write nothing. */
2436 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
2437 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
2439 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2441 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2442 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
2447 /* Similar, except that this is for an scc, so we must be able to
2448 encode the test in a single bit that is one. We do the above
2449 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2450 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
2451 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
2453 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2455 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2457 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
2460 else if (GET_CODE (x
) == NE
)
2462 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2464 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
2465 base_bit
+ 2, base_bit
+ 2);
2470 /* X is a CR register. Print the number of the third bit of the CR */
2471 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2472 output_operand_lossage ("invalid %%E value");
2474 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
2478 /* X is a CR register. Print the shift count needed to move it
2479 to the high-order four bits. */
2480 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2481 output_operand_lossage ("invalid %%f value");
2483 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
2487 /* Similar, but print the count for the rotate in the opposite
2489 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2490 output_operand_lossage ("invalid %%F value");
2492 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
2496 /* X is a constant integer. If it is negative, print "m",
2497 otherwise print "z". This is to make a aze or ame insn. */
2498 if (GET_CODE (x
) != CONST_INT
)
2499 output_operand_lossage ("invalid %%G value");
2500 else if (INTVAL (x
) >= 0)
2507 /* If constant, output low-order five bits. Otherwise,
2510 fprintf (file
, "%d", INT_LOWPART (x
) & 31);
2512 print_operand (file
, x
, 0);
2516 /* If constant, output low-order six bits. Otherwise,
2519 fprintf (file
, "%d", INT_LOWPART (x
) & 63);
2521 print_operand (file
, x
, 0);
2525 /* Print `i' if this is a constant, else nothing. */
2531 /* Write the bit number in CCR for jump. */
2534 output_operand_lossage ("invalid %%j code");
2536 fprintf (file
, "%d", i
);
2540 /* Similar, but add one for shift count in rlinm for scc and pass
2541 scc flag to `ccr_bit'. */
2544 output_operand_lossage ("invalid %%J code");
2546 /* If we want bit 31, write a shift count of zero, not 32. */
2547 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
2551 /* X must be a constant. Write the 1's complement of the
2554 output_operand_lossage ("invalid %%k value");
2556 fprintf (file
, "%d", ~ INT_LOWPART (x
));
2560 /* Write second word of DImode or DFmode reference. Works on register
2561 or non-indexed memory only. */
2562 if (GET_CODE (x
) == REG
)
2563 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
2564 else if (GET_CODE (x
) == MEM
)
2566 /* Handle possible auto-increment. Since it is pre-increment and
2567 we have already done it, we can just use an offset of four. */
2568 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2569 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2570 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 4));
2572 output_address (plus_constant (XEXP (x
, 0), 4));
2573 if (small_data_operand (x
, GET_MODE (x
)))
2574 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2575 reg_names
[SMALL_DATA_REG
]);
2580 /* MB value for a mask operand. */
2581 if (! mask_operand (x
, VOIDmode
))
2582 output_operand_lossage ("invalid %%m value");
2584 val
= INT_LOWPART (x
);
2586 /* If the high bit is set and the low bit is not, the value is zero.
2587 If the high bit is zero, the value is the first 1 bit we find from
2589 if (val
< 0 && (val
& 1) == 0)
2596 for (i
= 1; i
< 32; i
++)
2597 if ((val
<<= 1) < 0)
2599 fprintf (file
, "%d", i
);
2603 /* Otherwise, look for the first 0 bit from the right. The result is its
2604 number plus 1. We know the low-order bit is one. */
2605 for (i
= 0; i
< 32; i
++)
2606 if (((val
>>= 1) & 1) == 0)
2609 /* If we ended in ...01, I would be 0. The correct value is 31, so
2611 fprintf (file
, "%d", 31 - i
);
2615 /* ME value for a mask operand. */
2616 if (! mask_operand (x
, VOIDmode
))
2617 output_operand_lossage ("invalid %%m value");
2619 val
= INT_LOWPART (x
);
2621 /* If the low bit is set and the high bit is not, the value is 31.
2622 If the low bit is zero, the value is the first 1 bit we find from
2624 if ((val
& 1) && val
>= 0)
2629 else if ((val
& 1) == 0)
2631 for (i
= 0; i
< 32; i
++)
2632 if ((val
>>= 1) & 1)
2635 /* If we had ....10, I would be 0. The result should be
2636 30, so we need 30 - i. */
2637 fprintf (file
, "%d", 30 - i
);
2641 /* Otherwise, look for the first 0 bit from the left. The result is its
2642 number minus 1. We know the high-order bit is one. */
2643 for (i
= 0; i
< 32; i
++)
2644 if ((val
<<= 1) >= 0)
2647 fprintf (file
, "%d", i
);
2651 /* Write the number of elements in the vector times 4. */
2652 if (GET_CODE (x
) != PARALLEL
)
2653 output_operand_lossage ("invalid %%N value");
2655 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
2659 /* Similar, but subtract 1 first. */
2660 if (GET_CODE (x
) != PARALLEL
)
2661 output_operand_lossage ("invalid %%N value");
2663 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
2667 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2669 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
2670 output_operand_lossage ("invalid %%p value");
2672 fprintf (file
, "%d", i
);
2676 /* The operand must be an indirect memory reference. The result
2677 is the register number. */
2678 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
2679 || REGNO (XEXP (x
, 0)) >= 32)
2680 output_operand_lossage ("invalid %%P value");
2682 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
2686 /* X is a CR register. Print the mask for `mtcrf'. */
2687 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2688 output_operand_lossage ("invalid %%R value");
2690 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
2694 /* Low 5 bits of 32 - value */
2696 output_operand_lossage ("invalid %%s value");
2698 fprintf (file
, "%d", (32 - INT_LOWPART (x
)) & 31);
2702 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2703 All floating-point operations except NE branch true and integer
2704 EQ, LT, GT, LTU and GTU also branch true. */
2705 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2706 output_operand_lossage ("invalid %%t value");
2708 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2709 && GET_CODE (x
) != NE
)
2710 || GET_CODE (x
) == EQ
2711 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2712 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2719 /* Opposite of 't': write 4 if this jump operation will branch if true,
2721 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2722 output_operand_lossage ("invalid %%t value");
2724 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2725 && GET_CODE (x
) != NE
)
2726 || GET_CODE (x
) == EQ
2727 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2728 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2735 /* High-order 16 bits of constant for use in unsigned operand. */
2737 output_operand_lossage ("invalid %%u value");
2739 fprintf (file
, "0x%x", (INT_LOWPART (x
) >> 16) & 0xffff);
2743 /* High-order 16 bits of constant for use in signed operand. */
2745 output_operand_lossage ("invalid %%v value");
2748 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
2750 /* Solaris assembler doesn't like lis 0,0x80000 */
2751 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
2752 fprintf (file
, "%d", value
| (~0 << 16));
2754 fprintf (file
, "0x%x", value
);
2759 /* Print `u' if this has an auto-increment or auto-decrement. */
2760 if (GET_CODE (x
) == MEM
2761 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
2762 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
2767 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2770 fprintf (file
, "%d",
2771 (INT_LOWPART (x
) & 0xffff) - 2 * (INT_LOWPART (x
) & 0x8000));
2773 print_operand (file
, x
, 0);
2777 /* If constant, low-order 16 bits of constant, unsigned.
2778 Otherwise, write normally. */
2780 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2782 print_operand (file
, x
, 0);
2786 if (GET_CODE (x
) == MEM
2787 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
2792 /* Like 'L', for third word of TImode */
2793 if (GET_CODE (x
) == REG
)
2794 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
2795 else if (GET_CODE (x
) == MEM
)
2797 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2798 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2799 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
2801 output_address (plus_constant (XEXP (x
, 0), 8));
2802 if (small_data_operand (x
, GET_MODE (x
)))
2803 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2804 reg_names
[SMALL_DATA_REG
]);
2809 /* X is a SYMBOL_REF. Write out the name preceded by a
2810 period and without any trailing data in brackets. Used for function
2811 names. If we are configured for System V (or the embedded ABI) on
2812 the PowerPC, do not emit the period, since those systems do not use
2813 TOCs and the like. */
2814 if (GET_CODE (x
) != SYMBOL_REF
)
2817 if (XSTR (x
, 0)[0] != '.')
2819 switch (DEFAULT_ABI
)
2829 case ABI_AIX_NODESC
:
2838 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
2842 /* Like 'L', for last word of TImode. */
2843 if (GET_CODE (x
) == REG
)
2844 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
2845 else if (GET_CODE (x
) == MEM
)
2847 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2848 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2849 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
2851 output_address (plus_constant (XEXP (x
, 0), 12));
2852 if (small_data_operand (x
, GET_MODE (x
)))
2853 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2854 reg_names
[SMALL_DATA_REG
]);
2859 if (GET_CODE (x
) == REG
)
2860 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
2861 else if (GET_CODE (x
) == MEM
)
2863 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2864 know the width from the mode. */
2865 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
2866 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
2867 REGNO (XEXP (XEXP (x
, 0), 0)));
2868 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2869 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
2870 REGNO (XEXP (XEXP (x
, 0), 0)));
2872 output_address (XEXP (x
, 0));
2875 output_addr_const (file
, x
);
2879 output_operand_lossage ("invalid %%xn code");
2883 /* Print the address of an operand. */
2886 print_operand_address (file
, x
)
2890 if (GET_CODE (x
) == REG
)
2891 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
2892 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
|| GET_CODE (x
) == LABEL_REF
)
2894 output_addr_const (file
, x
);
2895 if (small_data_operand (x
, GET_MODE (x
)))
2896 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2897 reg_names
[SMALL_DATA_REG
]);
2899 #ifdef TARGET_NO_TOC
2900 else if (TARGET_NO_TOC
)
2904 fprintf (file
, "(%s)", reg_names
[ TARGET_MINIMAL_TOC
? 30 : 2 ]);
2906 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
2908 if (REGNO (XEXP (x
, 0)) == 0)
2909 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
2910 reg_names
[ REGNO (XEXP (x
, 0)) ]);
2912 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
2913 reg_names
[ REGNO (XEXP (x
, 1)) ]);
2915 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2916 fprintf (file
, "%d(%s)", INTVAL (XEXP (x
, 1)), reg_names
[ REGNO (XEXP (x
, 0)) ]);
2917 else if (TARGET_ELF
&& !TARGET_64BIT
&& GET_CODE (x
) == LO_SUM
2918 && GET_CODE (XEXP (x
, 0)) == REG
&& CONSTANT_P (XEXP (x
, 1)))
2920 output_addr_const (file
, XEXP (x
, 1));
2921 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
2927 /* This page contains routines that are used to determine what the function
2928 prologue and epilogue code will do and write them out. */
2930 /* Return the first fixed-point register that is required to be saved. 32 if
2934 first_reg_to_save ()
2938 /* Find lowest numbered live register. */
2939 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
2940 if (regs_ever_live
[first_reg
])
2943 /* If profiling, then we must save/restore every register that contains
2944 a parameter before/after the .__mcount call. Use registers from 30 down
2945 to 23 to do this. Don't use the frame pointer in reg 31.
2947 For now, save enough room for all of the parameter registers. */
2948 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2955 /* Similar, for FP regs. */
2958 first_fp_reg_to_save ()
2962 /* Find lowest numbered live register. */
2963 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
2964 if (regs_ever_live
[first_reg
])
2970 /* Return non-zero if this function makes calls. */
2973 rs6000_makes_calls ()
2977 /* If we are profiling, we will be making a call to __mcount.
2978 Under the System V ABI's, we store the LR directly, so
2979 we don't need to do it here. */
2980 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2983 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
2984 if (GET_CODE (insn
) == CALL_INSN
)
2991 /* Calculate the stack information for the current function. This is
2992 complicated by having two separate calling sequences, the AIX calling
2993 sequence and the V.4 calling sequence.
2995 AIX stack frames look like:
2997 SP----> +---------------------------------------+
2998 | back chain to caller | 0
2999 +---------------------------------------+
3001 +---------------------------------------+
3003 +---------------------------------------+
3004 | reserved for compilers | 12
3005 +---------------------------------------+
3006 | reserved for binders | 16
3007 +---------------------------------------+
3008 | saved TOC pointer | 20
3009 +---------------------------------------+
3010 | Parameter save area (P) | 24
3011 +---------------------------------------+
3012 | Alloca space (A) | 24+P
3013 +---------------------------------------+
3014 | Local variable space (L) | 24+P+A
3015 +---------------------------------------+
3016 | Float/int conversion temporary (X) | 24+P+A+L
3017 +---------------------------------------+
3018 | Save area for GP registers (G) | 24+P+A+X+L
3019 +---------------------------------------+
3020 | Save area for FP registers (F) | 24+P+A+X+L+G
3021 +---------------------------------------+
3022 old SP->| back chain to caller's caller |
3023 +---------------------------------------+
3025 V.4 stack frames look like:
3027 SP----> +---------------------------------------+
3028 | back chain to caller | 0
3029 +---------------------------------------+
3030 | caller's saved LR | 4
3031 +---------------------------------------+
3032 | Parameter save area (P) | 8
3033 +---------------------------------------+
3034 | Alloca space (A) | 8+P
3035 +---------------------------------------+
3036 | Varargs save area (V) | 8+P+A
3037 +---------------------------------------+
3038 | Local variable space (L) | 8+P+A+V
3039 +---------------------------------------+
3040 | Float/int conversion temporary (X) | 8+P+A+V+L
3041 +---------------------------------------+
3042 | saved CR (C) | 8+P+A+V+L+X
3043 +---------------------------------------+
3044 | Save area for GP registers (G) | 8+P+A+V+L+X+C
3045 +---------------------------------------+
3046 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
3047 +---------------------------------------+
3048 old SP->| back chain to caller's caller |
3049 +---------------------------------------+
3052 A PowerPC Windows/NT frame looks like:
3054 SP----> +---------------------------------------+
3055 | back chain to caller | 0
3056 +---------------------------------------+
3058 +---------------------------------------+
3060 +---------------------------------------+
3062 +---------------------------------------+
3064 +---------------------------------------+
3066 +---------------------------------------+
3067 | Parameter save area (P) | 24
3068 +---------------------------------------+
3069 | Alloca space (A) | 24+P
3070 +---------------------------------------+
3071 | Local variable space (L) | 24+P+A
3072 +---------------------------------------+
3073 | Float/int conversion temporary (X) | 24+P+A+L
3074 +---------------------------------------+
3075 | Save area for FP registers (F) | 24+P+A+L+X
3076 +---------------------------------------+
3077 | Possible alignment area (Y) | 24+P+A+L+X+F
3078 +---------------------------------------+
3079 | Save area for GP registers (G) | 24+P+A+L+X+F+Y
3080 +---------------------------------------+
3081 | Save area for CR (C) | 24+P+A+L+X+F+Y+G
3082 +---------------------------------------+
3083 | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C
3084 +---------------------------------------+
3085 | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T
3086 +---------------------------------------+
3087 old SP->| back chain to caller's caller |
3088 +---------------------------------------+
3090 For NT, there is no specific order to save the registers, but in
3091 order to support __builtin_return_address, the save area for the
3092 link register needs to be in a known place, so we use -4 off of the
3093 old SP. To support calls through pointers, we also allocate a
3094 fixed slot to store the TOC, -8 off the old SP. */
3096 #ifndef ABI_STACK_BOUNDARY
3097 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
3101 rs6000_stack_info ()
3103 static rs6000_stack_t info
, zero_info
;
3104 rs6000_stack_t
*info_ptr
= &info
;
3105 int reg_size
= TARGET_64BIT
? 8 : 4;
3106 enum rs6000_abi abi
;
3109 /* Zero all fields portably */
3112 /* Select which calling sequence */
3113 info_ptr
->abi
= abi
= DEFAULT_ABI
;
3115 /* Calculate which registers need to be saved & save area size */
3116 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
3117 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
3119 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
3120 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
3122 /* Does this function call anything? */
3123 info_ptr
->calls_p
= rs6000_makes_calls ();
3125 /* Allocate space to save the toc. */
3126 if (abi
== ABI_NT
&& info_ptr
->calls_p
)
3128 info_ptr
->toc_save_p
= 1;
3129 info_ptr
->toc_size
= reg_size
;
3132 /* Does this machine need the float/int conversion area? */
3133 info_ptr
->fpmem_p
= regs_ever_live
[FPMEM_REGNUM
];
3135 /* If this is main and we need to call a function to set things up,
3136 save main's arguments around the call. */
3141 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl
)), "main") == 0
3142 && DECL_CONTEXT (current_function_decl
) == NULL_TREE
)
3144 info_ptr
->main_p
= 1;
3147 info_ptr
->calls_p
= 1;
3149 if (DECL_ARGUMENTS (current_function_decl
))
3154 info_ptr
->main_save_p
= 1;
3155 info_ptr
->main_size
= 0;
3157 for ((i
= 0), (arg
= DECL_ARGUMENTS (current_function_decl
));
3158 arg
!= NULL_TREE
&& i
< 8;
3159 (arg
= TREE_CHAIN (arg
)), i
++)
3161 info_ptr
->main_size
+= reg_size
;
3169 /* Determine if we need to save the link register */
3170 if (regs_ever_live
[65]
3171 || (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
3172 #ifdef TARGET_RELOCATABLE
3173 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
3175 || (info_ptr
->first_fp_reg_save
!= 64
3176 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
3177 || (abi
== ABI_V4
&& current_function_calls_alloca
)
3178 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
3179 || info_ptr
->calls_p
)
3181 info_ptr
->lr_save_p
= 1;
3182 regs_ever_live
[65] = 1;
3184 info_ptr
->lr_size
= reg_size
;
3187 /* Determine if we need to save the condition code registers */
3188 if (regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72])
3190 info_ptr
->cr_save_p
= 1;
3191 if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3192 info_ptr
->cr_size
= reg_size
;
3195 /* Determine various sizes */
3196 info_ptr
->reg_size
= reg_size
;
3197 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
3198 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
3199 info_ptr
->vars_size
= RS6000_ALIGN (get_frame_size (), 8);
3200 info_ptr
->parm_size
= RS6000_ALIGN (current_function_outgoing_args_size
, 8);
3201 info_ptr
->fpmem_size
= (info_ptr
->fpmem_p
) ? 8 : 0;
3202 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->fp_size
3206 + info_ptr
->toc_size
3207 + info_ptr
->main_size
, 8);
3209 total_raw_size
= (info_ptr
->vars_size
3210 + info_ptr
->parm_size
3211 + info_ptr
->fpmem_size
3212 + info_ptr
->save_size
3213 + info_ptr
->varargs_size
3214 + info_ptr
->fixed_size
);
3216 info_ptr
->total_size
= RS6000_ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
3218 /* Determine if we need to allocate any stack frame.
3219 For AIX We need to push the stack if a frame pointer is needed (because
3220 the stack might be dynamically adjusted), if we are debugging, if the
3221 total stack size is more than 220 bytes, or if we make calls.
3223 For V.4 we don't have the stack cushion that AIX uses, but assume that
3224 the debugger can handle stackless frames. */
3226 if (info_ptr
->calls_p
)
3227 info_ptr
->push_p
= 1;
3229 else if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3230 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
3231 || (abi
== ABI_NT
? info_ptr
->lr_save_p
3232 : info_ptr
->calls_p
));
3235 info_ptr
->push_p
= (frame_pointer_needed
3236 || write_symbols
!= NO_DEBUG
3237 || info_ptr
->total_size
> 220);
3239 /* Calculate the offsets */
3247 case ABI_AIX_NODESC
:
3248 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3249 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3250 info_ptr
->main_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->main_size
;
3251 info_ptr
->cr_save_offset
= 4;
3252 info_ptr
->lr_save_offset
= 8;
3257 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3258 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3259 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
3260 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
3261 info_ptr
->main_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->main_size
;
3262 info_ptr
->lr_save_offset
= reg_size
;
3266 info_ptr
->lr_save_offset
= -4;
3267 info_ptr
->toc_save_offset
= info_ptr
->lr_save_offset
- info_ptr
->lr_size
;
3268 info_ptr
->cr_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
3269 info_ptr
->gp_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
- info_ptr
->gp_size
+ reg_size
;
3270 info_ptr
->fp_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->fp_size
;
3271 if (info_ptr
->fp_size
&& ((- info_ptr
->fp_save_offset
) % 8) != 0)
3272 info_ptr
->fp_save_offset
-= 4;
3274 info_ptr
->main_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->main_size
;
3278 if (info_ptr
->fpmem_p
)
3279 info_ptr
->fpmem_offset
= STARTING_FRAME_OFFSET
- info_ptr
->total_size
+ info_ptr
->vars_size
;
3281 /* Zero offsets if we're not saving those registers */
3282 if (!info_ptr
->fp_size
)
3283 info_ptr
->fp_save_offset
= 0;
3285 if (!info_ptr
->gp_size
)
3286 info_ptr
->gp_save_offset
= 0;
3288 if (!info_ptr
->lr_save_p
)
3289 info_ptr
->lr_save_offset
= 0;
3291 if (!info_ptr
->cr_save_p
)
3292 info_ptr
->cr_save_offset
= 0;
3294 if (!info_ptr
->toc_save_p
)
3295 info_ptr
->toc_save_offset
= 0;
3297 if (!info_ptr
->main_save_p
)
3298 info_ptr
->main_save_offset
= 0;
3300 if (!info_ptr
->fpmem_p
)
3301 info_ptr
->fpmem_offset
= 0;
3304 rs6000_fpmem_size
= info_ptr
->fpmem_size
;
3305 rs6000_fpmem_offset
= info_ptr
->total_size
+ info_ptr
->fpmem_offset
;
3312 debug_stack_info (info
)
3313 rs6000_stack_t
*info
;
3318 info
= rs6000_stack_info ();
3320 fprintf (stderr
, "\nStack information for function %s:\n",
3321 ((current_function_decl
&& DECL_NAME (current_function_decl
))
3322 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
3327 default: abi_string
= "Unknown"; break;
3328 case ABI_NONE
: abi_string
= "NONE"; break;
3329 case ABI_AIX
: abi_string
= "AIX"; break;
3330 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
3331 case ABI_V4
: abi_string
= "V.4"; break;
3332 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
3333 case ABI_NT
: abi_string
= "NT"; break;
3336 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
3338 if (info
->first_gp_reg_save
!= 32)
3339 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
3341 if (info
->first_fp_reg_save
!= 64)
3342 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
3344 if (info
->lr_save_p
)
3345 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
3347 if (info
->cr_save_p
)
3348 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
3350 if (info
->toc_save_p
)
3351 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
3354 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
3357 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
3360 fprintf (stderr
, "\tmain_p = %5d\n", info
->main_p
);
3362 if (info
->main_save_p
)
3363 fprintf (stderr
, "\tmain_save_p = %5d\n", info
->main_save_p
);
3366 fprintf (stderr
, "\tfpmem_p = %5d\n", info
->fpmem_p
);
3368 if (info
->gp_save_offset
)
3369 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
3371 if (info
->fp_save_offset
)
3372 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
3374 if (info
->lr_save_offset
)
3375 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
3377 if (info
->cr_save_offset
)
3378 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
3380 if (info
->toc_save_offset
)
3381 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
3383 if (info
->varargs_save_offset
)
3384 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
3386 if (info
->main_save_offset
)
3387 fprintf (stderr
, "\tmain_save_offset = %5d\n", info
->main_save_offset
);
3389 if (info
->fpmem_offset
)
3390 fprintf (stderr
, "\tfpmem_offset = %5d\n", info
->fpmem_offset
);
3392 if (info
->total_size
)
3393 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
3395 if (info
->varargs_size
)
3396 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
3398 if (info
->vars_size
)
3399 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
3401 if (info
->parm_size
)
3402 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
3404 if (info
->fpmem_size
)
3405 fprintf (stderr
, "\tfpmem_size = %5d\n", info
->fpmem_size
);
3407 if (info
->fixed_size
)
3408 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
3411 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
3414 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
3417 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
3420 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
3423 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
3425 if (info
->main_size
)
3426 fprintf (stderr
, "\tmain_size = %5d\n", info
->main_size
);
3428 if (info
->save_size
)
3429 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
3431 if (info
->reg_size
!= 4)
3432 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
3434 fprintf (stderr
, "\n");
3437 /* Write out an instruction to load the TOC_TABLE address into register 30.
3438 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
3442 rs6000_output_load_toc_table (file
, reg
)
3449 if (TARGET_RELOCATABLE
)
3451 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3452 fprintf (file
, "\tbl ");
3453 assemble_name (file
, buf
);
3454 fprintf (file
, "\n");
3456 /* possibly create the toc section */
3457 if (!toc_initialized
)
3460 function_section (current_function_decl
);
3463 /* If not first call in this function, we need to put the
3464 different between .LCTOC1 and the address we get to right
3465 after the bl. It will mess up disassembling the instructions
3466 but that can't be helped. We will later need to bias the
3467 address before loading. */
3468 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
3470 char *init_ptr
= (TARGET_64BIT
) ? ".quad" : ".long";
3473 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCL", rs6000_pic_labelno
);
3475 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3476 STRIP_NAME_ENCODING (buf_ptr
, buf
);
3477 fprintf (file
, "\t%s %s-", init_ptr
, buf_ptr
);
3479 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3480 fprintf (file
, "%s\n", buf_ptr
);
3483 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCF", rs6000_pic_labelno
);
3484 fprintf (file
, "\tmflr %s\n", reg_names
[reg
]);
3486 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
3488 if (TARGET_POWERPC64
)
3489 fprintf (file
, "\taddi %s,%s,8\n", reg_names
[reg
], reg_names
[reg
]);
3490 else if (TARGET_NEW_MNEMONICS
)
3491 fprintf (file
, "\taddi %s,%s,4\n", reg_names
[reg
], reg_names
[reg
]);
3493 fprintf (file
, "\tcal %s,4(%s)\n", reg_names
[reg
], reg_names
[reg
]);
3496 if (TARGET_POWERPC64
)
3497 fprintf (file
, "\tld");
3498 else if (TARGET_NEW_MNEMONICS
)
3499 fprintf (file
, "\tlwz");
3501 fprintf (file
, "\tl");
3503 fprintf (file
, " %s,(", reg_names
[0]);
3504 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
3505 assemble_name (file
, buf
);
3506 fprintf (file
, "-");
3507 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3508 assemble_name (file
, buf
);
3509 fprintf (file
, ")(%s)\n", reg_names
[reg
]);
3510 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
3511 reg_names
[reg
], reg_names
[0], reg_names
[reg
]);
3512 rs6000_pic_labelno
++;
3514 else if (!TARGET_64BIT
)
3516 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3517 asm_fprintf (file
, "\t{cau|addis} %s,%s,", reg_names
[reg
], reg_names
[0]);
3518 assemble_name (file
, buf
);
3519 asm_fprintf (file
, "@ha\n");
3520 if (TARGET_NEW_MNEMONICS
)
3522 asm_fprintf (file
, "\taddi %s,%s,", reg_names
[reg
], reg_names
[reg
]);
3523 assemble_name (file
, buf
);
3524 asm_fprintf (file
, "@l\n");
3528 asm_fprintf (file
, "\tcal %s,", reg_names
[reg
]);
3529 assemble_name (file
, buf
);
3530 asm_fprintf (file
, "@l(%s)\n", reg_names
[reg
]);
3536 #else /* !USING_SVR4_H */
3537 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 0);
3538 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[reg
]);
3539 assemble_name (file
, buf
);
3540 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
3541 #endif /* USING_SVR4_H */
3545 /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy
3546 of the old frame is left in r12. */
3549 rs6000_allocate_stack_space (file
, size
, copy_r12
)
3554 int neg_size
= -size
;
3559 (TARGET_32BIT
) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3560 reg_names
[1], neg_size
, reg_names
[1]);
3564 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3566 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3567 reg_names
[0], (neg_size
>> 16) & 0xffff,
3568 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3570 (TARGET_32BIT
) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3571 reg_names
[1], reg_names
[1], reg_names
[0]);
3576 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3579 if (TARGET_NEW_MNEMONICS
)
3580 fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], neg_size
);
3582 fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], neg_size
, reg_names
[1]);
3586 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3587 reg_names
[0], (neg_size
>> 16) & 0xffff,
3588 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3589 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n", reg_names
[1],
3590 reg_names
[0], reg_names
[1]);
3594 (TARGET_32BIT
) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n",
3595 reg_names
[12], reg_names
[1]);
3600 /* Write function prologue. */
3602 output_prolog (file
, size
)
3606 rs6000_stack_t
*info
= rs6000_stack_info ();
3607 int reg_size
= info
->reg_size
;
3615 store_reg
= "\t{st|stw} %s,%d(%s)\n";
3616 load_reg
= "\t{l|lwz} %s,%d(%s)\n";
3620 store_reg
= "\tstd %s,%d(%s)\n";
3621 load_reg
= "\tlld %s,%d(%s)\n";
3624 if (TARGET_DEBUG_STACK
)
3625 debug_stack_info (info
);
3627 /* Write .extern for any function we will call to save and restore fp
3629 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3630 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
3631 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
3632 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3634 /* Write .extern for truncation routines, if needed. */
3635 if (rs6000_trunc_used
&& ! trunc_defined
)
3637 fprintf (file
, "\t.extern .%s\n\t.extern .%s\n",
3638 RS6000_ITRUNC
, RS6000_UITRUNC
);
3642 /* Write .extern for AIX common mode routines, if needed. */
3643 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
3645 fputs ("\t.extern __mulh\n", file
);
3646 fputs ("\t.extern __mull\n", file
);
3647 fputs ("\t.extern __divss\n", file
);
3648 fputs ("\t.extern __divus\n", file
);
3649 fputs ("\t.extern __quoss\n", file
);
3650 fputs ("\t.extern __quous\n", file
);
3651 common_mode_defined
= 1;
3654 /* For V.4, update stack before we do any saving and set back pointer. */
3655 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
3657 if (info
->total_size
< 32767)
3658 sp_offset
= info
->total_size
;
3661 rs6000_allocate_stack_space (file
, info
->total_size
, sp_reg
== 12);
3664 /* If we use the link register, get it into r0. */
3665 if (info
->lr_save_p
)
3666 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
3668 /* If we need to save CR, put it into r12. */
3669 if (info
->cr_save_p
&& sp_reg
!= 12)
3670 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[12]);
3672 /* Do any required saving of fpr's. If only one or two to save, do it
3673 ourself. Otherwise, call function. Note that since they are statically
3674 linked, we do not need a nop following them. */
3675 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3677 int regno
= info
->first_fp_reg_save
;
3678 int loc
= info
->fp_save_offset
+ sp_offset
;
3680 for ( ; regno
< 64; regno
++, loc
+= 8)
3681 asm_fprintf (file
, "\tstfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3683 else if (info
->first_fp_reg_save
!= 64)
3684 asm_fprintf (file
, "\tbl %s%d%s\n", SAVE_FP_PREFIX
,
3685 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
3687 /* Now save gpr's. */
3688 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3690 int regno
= info
->first_gp_reg_save
;
3691 int loc
= info
->gp_save_offset
+ sp_offset
;
3693 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3694 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3697 else if (info
->first_gp_reg_save
!= 32)
3698 asm_fprintf (file
, "\t{stm|stmw} %s,%d(%s)\n",
3699 reg_names
[info
->first_gp_reg_save
],
3700 info
->gp_save_offset
+ sp_offset
,
3703 /* Save main's arguments if we need to call a function */
3705 if (info
->main_save_p
)
3708 int loc
= info
->main_save_offset
+ sp_offset
;
3709 int size
= info
->main_size
;
3711 for (regno
= 3; size
> 0; regno
++, loc
-= reg_size
, size
-= reg_size
)
3712 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3716 /* Save lr if we used it. */
3717 if (info
->lr_save_p
)
3718 asm_fprintf (file
, store_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
,
3721 /* Save CR if we use any that must be preserved. */
3722 if (info
->cr_save_p
)
3724 if (sp_reg
== 12) /* If r12 is used to hold the original sp, copy cr now */
3726 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[0]);
3727 asm_fprintf (file
, store_reg
, reg_names
[0],
3728 info
->cr_save_offset
+ sp_offset
,
3732 asm_fprintf (file
, store_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
,
3736 /* NT needs us to probe the stack frame every 4k pages for large frames, so
3738 if (DEFAULT_ABI
== ABI_NT
&& info
->total_size
> 4096)
3740 if (info
->total_size
< 32768)
3742 int probe_offset
= 4096;
3743 while (probe_offset
< info
->total_size
)
3745 asm_fprintf (file
, "\t{l|lwz} %s,%d(%s)\n", reg_names
[0], -probe_offset
, reg_names
[1]);
3746 probe_offset
+= 4096;
3751 int probe_iterations
= info
->total_size
/ 4096;
3752 static int probe_labelno
= 0;
3755 if (probe_iterations
< 32768)
3756 asm_fprintf (file
, "\tli %s,%d\n", reg_names
[12], probe_iterations
);
3759 asm_fprintf (file
, "\tlis %s,%d\n", reg_names
[12], probe_iterations
>> 16);
3760 if (probe_iterations
& 0xffff)
3761 asm_fprintf (file
, "\tori %s,%s,%d\n", reg_names
[12], reg_names
[12],
3762 probe_iterations
& 0xffff);
3764 asm_fprintf (file
, "\tmtctr %s\n", reg_names
[12]);
3765 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3766 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCprobe", probe_labelno
);
3767 asm_fprintf (file
, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names
[0], reg_names
[12]);
3768 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCprobe", probe_labelno
++);
3769 fputs ("\tbdnz ", file
);
3770 assemble_name (file
, buf
);
3775 /* Update stack and set back pointer unless this is V.4, which was done previously */
3776 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
3777 rs6000_allocate_stack_space (file
, info
->total_size
, FALSE
);
3779 /* Set frame pointer, if needed. */
3780 if (frame_pointer_needed
)
3781 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[31], reg_names
[1]);
3784 /* If we need to call a function to set things up for main, do so now
3785 before dealing with the TOC. */
3790 switch (DEFAULT_ABI
)
3792 case ABI_AIX
: prefix
= "."; break;
3793 case ABI_NT
: prefix
= ".."; break;
3796 fprintf (file
, "\tbl %s%s\n", prefix
, NAME__MAIN
);
3797 #ifdef RS6000_CALL_GLUE2
3798 fprintf (file
, "\t%s%s%s\n", RS6000_CALL_GLUE2
, prefix
, NAME_MAIN
);
3800 #ifdef RS6000_CALL_GLUE
3801 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
3802 fprintf (file
, "\t%s\n", RS6000_CALL_GLUE
);
3806 if (info
->main_save_p
)
3810 int size
= info
->main_size
;
3812 if (info
->total_size
< 32767)
3814 loc
= info
->total_size
+ info
->main_save_offset
;
3815 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3816 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
3820 int neg_size
= info
->main_save_offset
- info
->total_size
;
3822 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3823 reg_names
[0], (neg_size
>> 16) & 0xffff,
3824 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3826 asm_fprintf (file
, "\t{sf|subf} %s,%s,%s\n", reg_names
[0], reg_names
[0],
3829 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3830 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[0]);
3837 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3838 TOC_TABLE address into register 30. */
3839 if (TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
3843 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
3845 rs6000_output_load_toc_table (file
, 30);
3848 if (DEFAULT_ABI
== ABI_NT
)
3850 assemble_name (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3851 fputs (".b:\n", file
);
3855 /* Write function epilogue. */
3858 output_epilog (file
, size
)
3862 rs6000_stack_t
*info
= rs6000_stack_info ();
3863 char *load_reg
= (TARGET_32BIT
) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
3864 rtx insn
= get_last_insn ();
3869 /* If the last insn was a BARRIER, we don't have to write anything except
3871 if (GET_CODE (insn
) == NOTE
)
3872 insn
= prev_nonnote_insn (insn
);
3873 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
3875 /* If we have a frame pointer, a call to alloca, or a large stack
3876 frame, restore the old stack pointer using the backchain. Otherwise,
3877 we know what size to update it with. */
3878 if (frame_pointer_needed
|| current_function_calls_alloca
3879 || info
->total_size
> 32767)
3881 /* Under V.4, don't reset the stack pointer until after we're done
3882 loading the saved registers. */
3883 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
3886 asm_fprintf (file
, load_reg
, reg_names
[sp_reg
], 0, reg_names
[1]);
3888 else if (info
->push_p
)
3890 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
3891 sp_offset
= info
->total_size
;
3892 else if (TARGET_NEW_MNEMONICS
)
3893 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], info
->total_size
);
3895 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], info
->total_size
, reg_names
[1]);
3898 /* Get the old lr if we saved it. */
3899 if (info
->lr_save_p
)
3900 asm_fprintf (file
, load_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
3902 /* Get the old cr if we saved it. */
3903 if (info
->cr_save_p
)
3904 asm_fprintf (file
, load_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
3906 /* Set LR here to try to overlap restores below. */
3907 if (info
->lr_save_p
)
3908 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
3910 /* Restore gpr's. */
3911 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3913 int regno
= info
->first_gp_reg_save
;
3914 int loc
= info
->gp_save_offset
+ sp_offset
;
3915 int reg_size
= (TARGET_32BIT
) ? 4 : 8;
3917 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3918 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3921 else if (info
->first_gp_reg_save
!= 32)
3922 asm_fprintf (file
, "\t{lm|lmw} %s,%d(%s)\n",
3923 reg_names
[info
->first_gp_reg_save
],
3924 info
->gp_save_offset
+ sp_offset
,
3927 /* Restore fpr's if we can do it without calling a function. */
3928 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3930 int regno
= info
->first_fp_reg_save
;
3931 int loc
= info
->fp_save_offset
+ sp_offset
;
3933 for ( ; regno
< 64; regno
++, loc
+= 8)
3934 asm_fprintf (file
, "\tlfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3937 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3939 if (info
->cr_save_p
)
3940 asm_fprintf (file
, "\tmtcrf %d,%s\n",
3941 (regs_ever_live
[70] != 0) * 0x20
3942 + (regs_ever_live
[71] != 0) * 0x10
3943 + (regs_ever_live
[72] != 0) * 0x8, reg_names
[12]);
3945 /* If this is V.4, unwind the stack pointer after all of the loads have been done */
3948 if (TARGET_NEW_MNEMONICS
)
3949 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], sp_offset
);
3951 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], sp_offset
, reg_names
[1]);
3953 else if (sp_reg
!= 1)
3954 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[1], reg_names
[sp_reg
]);
3956 /* If we have to restore more than two FP registers, branch to the
3957 restore function. It will return to our caller. */
3958 if (info
->first_fp_reg_save
!= 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3959 asm_fprintf (file
, "\tb %s%d%s\n", RESTORE_FP_PREFIX
,
3960 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3962 asm_fprintf (file
, "\t{br|blr}\n");
3965 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3968 We don't output a traceback table if -finhibit-size-directive was
3969 used. The documentation for -finhibit-size-directive reads
3970 ``don't output a @code{.size} assembler directive, or anything
3971 else that would cause trouble if the function is split in the
3972 middle, and the two halves are placed at locations far apart in
3973 memory.'' The traceback table has this property, since it
3974 includes the offset from the start of the function to the
3975 traceback table itself.
3977 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3978 different traceback table. */
3979 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
3981 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
3982 int fixed_parms
, float_parms
, parm_info
;
3985 while (*fname
== '.') /* V.4 encodes . in the name */
3988 /* Need label immediately before tbtab, so we can compute its offset
3989 from the function start. */
3992 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3993 ASM_OUTPUT_LABEL (file
, fname
);
3995 /* The .tbtab pseudo-op can only be used for the first eight
3996 expressions, since it can't handle the possibly variable
3997 length fields that follow. However, if you omit the optional
3998 fields, the assembler outputs zeros for all optional fields
3999 anyways, giving each variable length field is minimum length
4000 (as defined in sys/debug.h). Thus we can not use the .tbtab
4001 pseudo-op at all. */
4003 /* An all-zero word flags the start of the tbtab, for debuggers
4004 that have to find it by searching forward from the entry
4005 point or from the current pc. */
4006 fputs ("\t.long 0\n", file
);
4008 /* Tbtab format type. Use format type 0. */
4009 fputs ("\t.byte 0,", file
);
4011 /* Language type. Unfortunately, there doesn't seem to be any
4012 official way to get this info, so we use language_string. C
4013 is 0. C++ is 9. No number defined for Obj-C, so use the
4014 value for C for now. */
4015 if (! strcmp (language_string
, "GNU C")
4016 || ! strcmp (language_string
, "GNU Obj-C"))
4018 else if (! strcmp (language_string
, "GNU F77"))
4020 else if (! strcmp (language_string
, "GNU Ada"))
4022 else if (! strcmp (language_string
, "GNU Pascal"))
4024 else if (! strcmp (language_string
, "GNU C++"))
4028 fprintf (file
, "%d,", i
);
4030 /* 8 single bit fields: global linkage (not set for C extern linkage,
4031 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
4032 from start of procedure stored in tbtab, internal function, function
4033 has controlled storage, function has no toc, function uses fp,
4034 function logs/aborts fp operations. */
4035 /* Assume that fp operations are used if any fp reg must be saved. */
4036 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
4038 /* 6 bitfields: function is interrupt handler, name present in
4039 proc table, function calls alloca, on condition directives
4040 (controls stack walks, 3 bits), saves condition reg, saves
4042 /* The `function calls alloca' bit seems to be set whenever reg 31 is
4043 set up as a frame pointer, even when there is no alloca call. */
4044 fprintf (file
, "%d,",
4045 ((1 << 6) | (frame_pointer_needed
<< 5)
4046 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
4048 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
4050 fprintf (file
, "%d,",
4051 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
4053 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
4054 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
4057 /* Compute the parameter info from the function decl argument
4060 int next_parm_info_bit
;
4062 next_parm_info_bit
= 31;
4067 for (decl
= DECL_ARGUMENTS (current_function_decl
);
4068 decl
; decl
= TREE_CHAIN (decl
))
4070 rtx parameter
= DECL_INCOMING_RTL (decl
);
4071 enum machine_mode mode
= GET_MODE (parameter
);
4073 if (GET_CODE (parameter
) == REG
)
4075 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4083 else if (mode
== DFmode
)
4088 /* If only one bit will fit, don't or in this entry. */
4089 if (next_parm_info_bit
> 0)
4090 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
4091 next_parm_info_bit
-= 2;
4095 fixed_parms
+= ((GET_MODE_SIZE (mode
)
4096 + (UNITS_PER_WORD
- 1))
4098 next_parm_info_bit
-= 1;
4104 /* Number of fixed point parameters. */
4105 /* This is actually the number of words of fixed point parameters; thus
4106 an 8 byte struct counts as 2; and thus the maximum value is 8. */
4107 fprintf (file
, "%d,", fixed_parms
);
4109 /* 2 bitfields: number of floating point parameters (7 bits), parameters
4111 /* This is actually the number of fp registers that hold parameters;
4112 and thus the maximum value is 13. */
4113 /* Set parameters on stack bit if parameters are not in their original
4114 registers, regardless of whether they are on the stack? Xlc
4115 seems to set the bit when not optimizing. */
4116 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
4118 /* Optional fields follow. Some are variable length. */
4120 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
4122 /* There is an entry for each parameter in a register, in the order that
4123 they occur in the parameter list. Any intervening arguments on the
4124 stack are ignored. If the list overflows a long (max possible length
4125 34 bits) then completely leave off all elements that don't fit. */
4126 /* Only emit this long if there was at least one parameter. */
4127 if (fixed_parms
|| float_parms
)
4128 fprintf (file
, "\t.long %d\n", parm_info
);
4130 /* Offset from start of code to tb table. */
4131 fputs ("\t.long ", file
);
4132 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
4133 RS6000_OUTPUT_BASENAME (file
, fname
);
4135 RS6000_OUTPUT_BASENAME (file
, fname
);
4138 /* Interrupt handler mask. */
4139 /* Omit this long, since we never set the interrupt handler bit
4142 /* Number of CTL (controlled storage) anchors. */
4143 /* Omit this long, since the has_ctl bit is never set above. */
4145 /* Displacement into stack of each CTL anchor. */
4146 /* Omit this list of longs, because there are no CTL anchors. */
4148 /* Length of function name. */
4149 fprintf (file
, "\t.short %d\n", strlen (fname
));
4151 /* Function name. */
4152 assemble_string (fname
, strlen (fname
));
4154 /* Register for alloca automatic storage; this is always reg 31.
4155 Only emit this if the alloca bit was set above. */
4156 if (frame_pointer_needed
)
4157 fputs ("\t.byte 31\n", file
);
4160 if (DEFAULT_ABI
== ABI_NT
)
4162 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4163 fputs (".e:\nFE_MOT_RESVD..", file
);
4164 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4165 fputs (":\n", file
);
4169 /* Output a TOC entry. We derive the entry name from what is
4173 output_toc (file
, x
, labelno
)
4187 /* if we're going to put a double constant in the TOC, make sure it's
4188 aligned properly when strict alignment is on. */
4189 if (GET_CODE (x
) == CONST_DOUBLE
4191 && GET_MODE (x
) == DFmode
4192 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
4193 ASM_OUTPUT_ALIGN (file
, 3);
4197 if (TARGET_ELF
&& TARGET_MINIMAL_TOC
)
4199 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
4200 fprintf (file
, "%d = .-", labelno
);
4201 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LCTOC");
4202 fputs ("1\n", file
);
4205 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
4207 /* Handle FP constants specially. Note that if we have a minimal
4208 TOC, things we put here aren't actually in the TOC, so we can allow
4210 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
4211 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4216 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4217 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
4218 if (TARGET_MINIMAL_TOC
)
4219 fprintf (file
, "\t.long %ld\n\t.long %ld\n", k
[0], k
[1]);
4221 fprintf (file
, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
4222 k
[0], k
[1], k
[0], k
[1]);
4225 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
4226 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4231 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4232 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
4234 if (TARGET_MINIMAL_TOC
)
4235 fprintf (file
, "\t.long %ld\n", l
);
4237 fprintf (file
, "\t.tc FS_%lx[TC],%ld\n", l
, l
);
4240 else if (GET_MODE (x
) == DImode
4241 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
4242 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4247 if (GET_CODE (x
) == CONST_DOUBLE
)
4249 low
= CONST_DOUBLE_LOW (x
);
4250 high
= CONST_DOUBLE_HIGH (x
);
4253 #if HOST_BITS_PER_WIDE_INT == 32
4256 high
= (low
< 0) ? ~0 : 0;
4260 low
= INTVAL (x
) & 0xffffffff;
4261 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
4265 if (TARGET_MINIMAL_TOC
)
4266 fprintf (file
, "\t.long %ld\n\t.long %ld\n", (long)high
, (long)low
);
4268 fprintf (file
, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n",
4269 (long)high
, (long)low
, (long)high
, (long)low
);
4273 if (GET_CODE (x
) == CONST
)
4275 base
= XEXP (XEXP (x
, 0), 0);
4276 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
4279 if (GET_CODE (base
) == SYMBOL_REF
)
4280 name
= XSTR (base
, 0);
4281 else if (GET_CODE (base
) == LABEL_REF
)
4282 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
4283 else if (GET_CODE (base
) == CODE_LABEL
)
4284 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
4288 STRIP_NAME_ENCODING (real_name
, name
);
4289 if (TARGET_MINIMAL_TOC
)
4290 fputs ("\t.long ", file
);
4293 fprintf (file
, "\t.tc %s", real_name
);
4296 fprintf (file
, ".N%d", - offset
);
4298 fprintf (file
, ".P%d", offset
);
4300 fputs ("[TC],", file
);
4303 /* Currently C++ toc references to vtables can be emitted before it
4304 is decided whether the vtable is public or private. If this is
4305 the case, then the linker will eventually complain that there is
4306 a TOC reference to an unknown section. Thus, for vtables only,
4307 we emit the TOC reference to reference the symbol and not the
4309 if (!strncmp ("_vt.", name
, 4))
4311 RS6000_OUTPUT_BASENAME (file
, name
);
4313 fprintf (file
, "%d", offset
);
4314 else if (offset
> 0)
4315 fprintf (file
, "+%d", offset
);
4318 output_addr_const (file
, x
);
4322 /* Output an assembler pseudo-op to write an ASCII string of N characters
4323 starting at P to FILE.
4325 On the RS/6000, we have to do this using the .byte operation and
4326 write out special characters outside the quoted string.
4327 Also, the assembler is broken; very long strings are truncated,
4328 so we must artificially break them up early. */
4331 output_ascii (file
, p
, n
)
4337 int i
, count_string
;
4338 char *for_string
= "\t.byte \"";
4339 char *for_decimal
= "\t.byte ";
4340 char *to_close
= NULL
;
4343 for (i
= 0; i
< n
; i
++)
4346 if (c
>= ' ' && c
< 0177)
4349 fputs (for_string
, file
);
4352 /* Write two quotes to get one. */
4360 for_decimal
= "\"\n\t.byte ";
4364 if (count_string
>= 512)
4366 fputs (to_close
, file
);
4368 for_string
= "\t.byte \"";
4369 for_decimal
= "\t.byte ";
4377 fputs (for_decimal
, file
);
4378 fprintf (file
, "%d", c
);
4380 for_string
= "\n\t.byte \"";
4387 /* Now close the string if we have written one. Then end the line. */
4389 fprintf (file
, to_close
);
4392 /* Generate a unique section name for FILENAME for a section type
4393 represented by SECTION_DESC. Output goes into BUF.
4395 SECTION_DESC can be any string, as long as it is different for each
4396 possible section type.
4398 We name the section in the same manner as xlc. The name begins with an
4399 underscore followed by the filename (after stripping any leading directory
4400 names) with the last period replaced by the string SECTION_DESC. If
4401 FILENAME does not contain a period, SECTION_DESC is appended to the end of
4405 rs6000_gen_section_name (buf
, filename
, section_desc
)
4410 char *q
, *after_last_slash
, *last_period
;
4414 after_last_slash
= filename
;
4415 for (q
= filename
; *q
; q
++)
4418 after_last_slash
= q
+ 1;
4423 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
4424 *buf
= (char *) permalloc (len
);
4429 for (q
= after_last_slash
; *q
; q
++)
4431 if (q
== last_period
)
4433 strcpy (p
, section_desc
);
4434 p
+= strlen (section_desc
);
4437 else if (isalnum (*q
))
4441 if (last_period
== 0)
4442 strcpy (p
, section_desc
);
4447 /* Write function profiler code. */
4450 output_function_profiler (file
, labelno
)
4454 /* The last used parameter register. */
4459 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
4460 switch (DEFAULT_ABI
)
4467 case ABI_AIX_NODESC
:
4468 fprintf (file
, "\tmflr %s\n", reg_names
[0]);
4471 fprintf (file
, "\tbl _GLOBAL_OFFSET_TABLE_@local-4\n");
4472 fprintf (file
, "\t%s %s,4(%s)\n",
4473 (TARGET_NEW_MNEMONICS
) ? "stw" : "st",
4474 reg_names
[0], reg_names
[1]);
4475 fprintf (file
, "\tmflr %s\n", reg_names
[11]);
4476 fprintf (file
, "\t%s %s,", (TARGET_NEW_MNEMONICS
) ? "lwz" : "l",
4478 assemble_name (file
, buf
);
4479 fprintf (file
, "@got(%s)\n", reg_names
[11]);
4482 else if (flag_pic
> 1 || TARGET_RELOCATABLE
)
4484 fprintf (file
, "\t%s %s,4(%s)\n",
4485 (TARGET_NEW_MNEMONICS
) ? "stw" : "st",
4486 reg_names
[0], reg_names
[1]);
4487 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
4488 rs6000_output_load_toc_table (file
, 11);
4489 fprintf (file
, "\t%s %s,", (TARGET_NEW_MNEMONICS
) ? "lwz" : "l",
4491 assemble_name (file
, buf
);
4492 fprintf (file
, "X(%s)\n", reg_names
[11]);
4493 fprintf (file
, "%s\n", MINIMAL_TOC_SECTION_ASM_OP
);
4494 assemble_name (file
, buf
);
4495 fprintf (file
, "X = .-.LCTOC1\n");
4496 fprintf (file
, "\t.long ");
4497 assemble_name (file
, buf
);
4498 fputs ("\n\t.previous\n", file
);
4501 else if (TARGET_NEW_MNEMONICS
)
4503 fprintf (file
, "\taddis %s,%s,", reg_names
[11], reg_names
[11]);
4504 assemble_name (file
, buf
);
4505 fprintf (file
, "@ha\n");
4506 fprintf (file
, "\tstw %s,4(%s)\n", reg_names
[0], reg_names
[1]);
4507 fprintf (file
, "\taddi %s,%s,", reg_names
[0], reg_names
[11]);
4508 assemble_name (file
, buf
);
4509 fputs ("@l\n", file
);
4513 fprintf (file
, "\tcau %s,%s,", reg_names
[11], reg_names
[11]);
4514 assemble_name (file
, buf
);
4515 fprintf (file
, "@ha\n");
4516 fprintf (file
, "\tst %s,4(%s)\n", reg_names
[0], reg_names
[1]);
4517 fprintf (file
, "\tcal %s,", reg_names
[11]);
4518 assemble_name (file
, buf
);
4519 fprintf (file
, "@l(%s)\n", reg_names
[11]);
4522 fprintf (file
, "\tbl %s\n", RS6000_MCOUNT
);
4526 /* Set up a TOC entry for the profiler label. */
4528 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
4529 if (TARGET_MINIMAL_TOC
)
4531 fputs ("\t.long ", file
);
4532 assemble_name (file
, buf
);
4537 fputs ("\t.tc\t", file
);
4538 assemble_name (file
, buf
);
4539 fputs ("[TC],", file
);
4540 assemble_name (file
, buf
);
4545 /* Figure out last used parameter register. The proper thing to do is
4546 to walk incoming args of the function. A function might have live
4547 parameter registers even if it has no incoming args. */
4549 for (last_parm_reg
= 10;
4550 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
4554 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
4555 it might be set up as the frame pointer. */
4557 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
4558 asm_fprintf (file
, "\tmr %d,%d\n", j
, i
);
4560 /* Load location address into r3, and call mcount. */
4562 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
4563 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[3]);
4564 assemble_name (file
, buf
);
4565 asm_fprintf (file
, "(%s)\n\tbl %s\n", reg_names
[2], RS6000_MCOUNT
);
4567 /* Restore parameter registers. */
4569 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
4570 asm_fprintf (file
, "\tmr %d,%d\n", i
, j
);
4575 /* Adjust the cost of a scheduling dependency. Return the new cost of
4576 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
4579 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
4585 if (! recog_memoized (insn
))
4588 if (REG_NOTE_KIND (link
) != 0)
4591 if (REG_NOTE_KIND (link
) == 0)
4593 /* Data dependency; DEP_INSN writes a register that INSN reads some
4596 /* Tell the first scheduling pass about the latency between a mtctr
4597 and bctr (and mtlr and br/blr). The first scheduling pass will not
4598 know about this latency since the mtctr instruction, which has the
4599 latency associated to it, will be generated by reload. */
4600 if (get_attr_type (insn
) == TYPE_JMPREG
)
4601 return TARGET_POWER
? 5 : 4;
4603 /* Fall out to return default cost. */
4609 /* Return how many instructions the machine can issue per cycle */
4610 int get_issue_rate()
4612 switch (rs6000_cpu_attr
) {
4632 /* Output assembler code for a block containing the constant parts
4633 of a trampoline, leaving space for the variable parts.
4635 The trampoline should set the static chain pointer to value placed
4636 into the trampoline and should branch to the specified routine. */
4639 rs6000_trampoline_template (file
)
4642 char *sc
= reg_names
[STATIC_CHAIN_REGNUM
];
4643 char *r0
= reg_names
[0];
4644 char *r2
= reg_names
[2];
4646 switch (DEFAULT_ABI
)
4651 /* Under AIX, this is not code at all, but merely a data area,
4652 since that is the way all functions are called. The first word is
4653 the address of the function, the second word is the TOC pointer (r2),
4654 and the third word is the static chain value. */
4659 /* V.4/eabi function pointers are just a single pointer, so we need to
4660 do the full gory code to load up the static chain. */
4663 case ABI_AIX_NODESC
:
4666 /* NT function pointers point to a two word area (real address, TOC)
4667 which unfortunately does not include a static chain field. So we
4668 use the function field to point to ..LTRAMP1 and the toc field
4669 to point to the whole table. */
4671 if (STATIC_CHAIN_REGNUM
== 0
4672 || STATIC_CHAIN_REGNUM
== 2
4674 || !TARGET_NEW_MNEMONICS
)
4677 fprintf (file
, "\t.ualong 0\n"); /* offset 0 */
4678 fprintf (file
, "\t.ualong 0\n"); /* offset 4 */
4679 fprintf (file
, "\t.ualong 0\n"); /* offset 8 */
4680 fprintf (file
, "\t.ualong 0\n"); /* offset 12 */
4681 fprintf (file
, "\t.ualong 0\n"); /* offset 16 */
4682 fprintf (file
, "..LTRAMP1..0:\n"); /* offset 20 */
4683 fprintf (file
, "\tlwz %s,8(%s)\n", r0
, r2
); /* offset 24 */
4684 fprintf (file
, "\tlwz %s,12(%s)\n", sc
, r2
); /* offset 28 */
4685 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 32 */
4686 fprintf (file
, "\tlwz %s,16(%s)\n", r2
, r2
); /* offset 36 */
4687 fprintf (file
, "\tbctr\n"); /* offset 40 */
4694 /* Length in units of the trampoline for entering a nested function. */
4697 rs6000_trampoline_size ()
4701 switch (DEFAULT_ABI
)
4707 ret
= (TARGET_32BIT
) ? 12 : 24;
4712 case ABI_AIX_NODESC
:
4713 ret
= (TARGET_32BIT
) ? 40 : 48;
4724 /* Emit RTL insns to initialize the variable parts of a trampoline.
4725 FNADDR is an RTX for the address of the function's pure code.
4726 CXT is an RTX for the static chain value for the function. */
4729 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
4734 enum machine_mode pmode
= Pmode
;
4735 int regsize
= (TARGET_32BIT
) ? 4 : 8;
4736 rtx ctx_reg
= force_reg (pmode
, cxt
);
4738 switch (DEFAULT_ABI
)
4743 /* Macros to shorten the code expansions below. */
4744 #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr))
4745 #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset)))
4747 /* Under AIX, just build the 3 word function descriptor */
4750 rtx fn_reg
= gen_reg_rtx (pmode
);
4751 rtx toc_reg
= gen_reg_rtx (pmode
);
4752 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
4753 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
4754 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
4755 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
4756 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
4760 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
4763 case ABI_AIX_NODESC
:
4764 emit_library_call (gen_rtx (SYMBOL_REF
, SImode
, "__trampoline_setup"),
4767 GEN_INT (rs6000_trampoline_size ()), SImode
,
4772 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
4773 the second word will point to the whole trampoline, third-fifth words
4774 will then have the real address, static chain, and toc value. */
4777 rtx tramp_reg
= gen_reg_rtx (pmode
);
4778 rtx fn_reg
= gen_reg_rtx (pmode
);
4779 rtx toc_reg
= gen_reg_rtx (pmode
);
4781 emit_move_insn (tramp_reg
, gen_rtx (SYMBOL_REF
, pmode
, "..LTRAMP1..0"));
4782 addr
= force_reg (pmode
, addr
);
4783 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
4784 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, regsize
));
4785 emit_move_insn (MEM_DEREF (addr
), tramp_reg
);
4786 emit_move_insn (MEM_PLUS (addr
, regsize
), addr
);
4787 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), fn_reg
);
4788 emit_move_insn (MEM_PLUS (addr
, 3*regsize
), ctx_reg
);
4789 emit_move_insn (MEM_PLUS (addr
, 4*regsize
), gen_rtx (REG
, pmode
, 2));
4798 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4799 with arguments ARGS is a valid machine specific attribute for DECL.
4800 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4803 rs6000_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
4812 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4813 with arguments ARGS is a valid machine specific attribute for TYPE.
4814 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4817 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
4823 if (TREE_CODE (type
) != FUNCTION_TYPE
4824 && TREE_CODE (type
) != FIELD_DECL
4825 && TREE_CODE (type
) != TYPE_DECL
)
4828 /* Longcall attribute says that the function is not within 2**26 bytes
4829 of the current function, and to do an indirect call. */
4830 if (is_attribute_p ("longcall", identifier
))
4831 return (args
== NULL_TREE
);
4833 if (DEFAULT_ABI
== ABI_NT
)
4835 /* Stdcall attribute says callee is responsible for popping arguments
4836 if they are not variable. */
4837 if (is_attribute_p ("stdcall", identifier
))
4838 return (args
== NULL_TREE
);
4840 /* Cdecl attribute says the callee is a normal C declaration */
4841 if (is_attribute_p ("cdecl", identifier
))
4842 return (args
== NULL_TREE
);
4844 /* Dllimport attribute says says the caller is to call the function
4845 indirectly through a __imp_<name> pointer. */
4846 if (is_attribute_p ("dllimport", identifier
))
4847 return (args
== NULL_TREE
);
4849 /* Dllexport attribute says says the callee is to create a __imp_<name>
4851 if (is_attribute_p ("dllexport", identifier
))
4852 return (args
== NULL_TREE
);
4854 /* Exception attribute allows the user to specify 1-2 strings or identifiers
4855 that will fill in the 3rd and 4th fields of the structured exception
4857 if (is_attribute_p ("exception", identifier
))
4861 if (args
== NULL_TREE
)
4864 for (i
= 0; i
< 2 && args
!= NULL_TREE
; i
++)
4866 tree this_arg
= TREE_VALUE (args
);
4867 args
= TREE_PURPOSE (args
);
4869 if (TREE_CODE (this_arg
) != STRING_CST
4870 && TREE_CODE (this_arg
) != IDENTIFIER_NODE
)
4874 return (args
== NULL_TREE
);
4881 /* If defined, a C expression whose value is zero if the attributes on
4882 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4883 two if they are nearly compatible (which causes a warning to be
4887 rs6000_comp_type_attributes (type1
, type2
)
4894 /* If defined, a C statement that assigns default attributes to newly
4898 rs6000_set_default_type_attributes (type
)
4903 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4905 rs6000_dll_import_ref (call_ref
)
4914 if (GET_CODE (call_ref
) != SYMBOL_REF
)
4917 call_name
= XSTR (call_ref
, 0);
4918 len
= sizeof ("__imp_") + strlen (call_name
);
4920 reg2
= gen_reg_rtx (Pmode
);
4922 strcpy (p
, "__imp_");
4923 strcat (p
, call_name
);
4924 node
= get_identifier (p
);
4926 reg1
= force_reg (Pmode
, gen_rtx (SYMBOL_REF
, VOIDmode
, IDENTIFIER_POINTER (node
)));
4927 emit_move_insn (reg2
, gen_rtx (MEM
, Pmode
, reg1
));
4932 /* Return a reference suitable for calling a function with the longcall attribute. */
4934 rs6000_longcall_ref (call_ref
)
4943 if (GET_CODE (call_ref
) != SYMBOL_REF
)
4946 /* System V adds '.' to the internal name, so skip them. */
4947 call_name
= XSTR (call_ref
, 0);
4948 if (*call_name
== '.')
4950 while (*call_name
== '.')
4953 node
= get_identifier (call_name
);
4954 call_ref
= gen_rtx (SYMBOL_REF
, VOIDmode
, IDENTIFIER_POINTER (node
));
4957 return force_reg (Pmode
, call_ref
);
4961 /* A C statement or statements to switch to the appropriate section
4962 for output of RTX in mode MODE. You can assume that RTX is some
4963 kind of constant in RTL. The argument MODE is redundant except in
4964 the case of a `const_int' rtx. Select the section by calling
4965 `text_section' or one of the alternatives for other sections.
4967 Do not define this macro if you put all constants in the read-only
4973 rs6000_select_rtx_section (mode
, x
)
4974 enum machine_mode mode
;
4977 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
))
4983 /* A C statement or statements to switch to the appropriate
4984 section for output of DECL. DECL is either a `VAR_DECL' node
4985 or a constant of some sort. RELOC indicates whether forming
4986 the initial value of DECL requires link-time relocations. */
4989 rs6000_select_section (decl
, reloc
)
4993 int size
= int_size_in_bytes (TREE_TYPE (decl
));
4995 if (TREE_CODE (decl
) == STRING_CST
)
4997 if (! flag_writable_strings
)
5002 else if (TREE_CODE (decl
) == VAR_DECL
)
5004 if ((flag_pic
&& reloc
)
5005 || !TREE_READONLY (decl
)
5006 || TREE_SIDE_EFFECTS (decl
)
5007 || !DECL_INITIAL (decl
)
5008 || (DECL_INITIAL (decl
) != error_mark_node
5009 && !TREE_CONSTANT (DECL_INITIAL (decl
))))
5011 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0) && (size
<= g_switch_value
))
5018 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0) && (size
<= g_switch_value
))
5020 if (rs6000_sdata
== SDATA_EABI
)
5023 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */
5035 /* If we are referencing a function that is static or is known to be
5036 in this file, make the SYMBOL_REF special. We can use this to indicate
5037 that we can branch to this function without emitting a no-op after the
5038 call. For real AIX and NT calling sequences, we also replace the
5039 function name with the real name (1 or 2 leading .'s), rather than
5040 the function descriptor name. This saves a lot of overriding code
5041 to readd the prefixes. */
5044 rs6000_encode_section_info (decl
)
5047 if (TREE_CODE (decl
) == FUNCTION_DECL
)
5049 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5050 if (TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
5051 SYMBOL_REF_FLAG (sym_ref
) = 1;
5053 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
5055 char *prefix
= (DEFAULT_ABI
== ABI_AIX
) ? "." : "..";
5056 char *str
= permalloc (strlen (prefix
) + 1
5057 + strlen (XSTR (sym_ref
, 0)));
5058 strcpy (str
, prefix
);
5059 strcat (str
, XSTR (sym_ref
, 0));
5060 XSTR (sym_ref
, 0) = str
;
5063 else if (rs6000_sdata
!= SDATA_NONE
5064 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5065 && TREE_CODE (decl
) == VAR_DECL
)
5067 int size
= int_size_in_bytes (TREE_TYPE (decl
));
5068 tree section_name
= DECL_SECTION_NAME (decl
);
5069 char *name
= (char *)0;
5074 if (TREE_CODE (section_name
) == STRING_CST
)
5076 name
= TREE_STRING_POINTER (section_name
);
5077 len
= TREE_STRING_LENGTH (section_name
);
5083 if ((size
> 0 && size
<= g_switch_value
)
5085 && ((len
== sizeof (".sdata")-1 && strcmp (name
, ".sdata") == 0)
5086 || (len
== sizeof (".sdata2")-1 && strcmp (name
, ".sdata2") == 0)
5087 || (len
== sizeof (".sbss")-1 && strcmp (name
, ".sbss") == 0)
5088 || (len
== sizeof (".sbss2")-1 && strcmp (name
, ".sbss2") == 0)
5089 || (len
== sizeof (".PPC.EMB.sdata0")-1 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
5090 || (len
== sizeof (".PPC.EMB.sbss0")-1 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
5092 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5093 char *str
= permalloc (2 + strlen (XSTR (sym_ref
, 0)));
5095 strcat (str
, XSTR (sym_ref
, 0));
5096 XSTR (sym_ref
, 0) = str
;
5101 #endif /* USING_SVR4_H */