1 2018-01-26 Sebastian Perta <sebastian.perta@renesas.com>
3 * config/rl78/rl78.c: if operand 2 is const avoid addition with 0
4 and use incw and decw where possible
5 * testsuite/gcc.target/rl78/test_addsi3_internal.c: new file
7 2018-01-26 Richard Biener <rguenther@suse.de>
9 PR tree-optimization/81082
10 * fold-const.c (fold_plusminus_mult_expr): Do not perform the
11 association if it requires casting to unsigned.
12 * match.pd ((A * C) +- (B * C) -> (A+-B)): New patterns derived
13 from fold_plusminus_mult_expr to catch important cases late when
14 range info is available.
16 2018-01-26 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
18 * config/i386/sol2.h (USE_HIDDEN_LINKONCE): Remove.
19 * configure.ac (hidden_linkonce): New test.
20 * configure: Regenerate.
21 * config.in: Regenerate.
23 2018-01-26 Julia Koval <julia.koval@intel.com>
25 * config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
26 _mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
27 _mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
28 _mm_mask_bitshuffle_epi64_mask): Fix type.
29 * config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
30 USI_FTYPE_V4DI_V4DI_USI): Remove.
31 * config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
32 __builtin_ia32_vpshufbitqmb256_mask,
33 __builtin_ia32_vpshufbitqmb128_mask): Fix types.
34 * config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
35 * config/i386/sse.md (VI1_AVX512VLBW): Change types.
37 2018-01-26 Alan Modra <amodra@gmail.com>
40 * config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Exclude
41 UNSPEC_VBPERMQ. Sort other unspecs.
43 2018-01-25 David Edelsohn <dje.gcc@gmail.com>
45 * doc/invoke.texi (PowerPC Options): Document 'native' cpu type.
47 2018-01-25 Jan Hubicka <hubicka@ucw.cz>
50 * predict.c (drop_profile): Do not push/pop cfun; update also
52 (handle_missing_profiles): Fix logic looking for zero profiles.
54 2018-01-25 Jakub Jelinek <jakub@redhat.com>
57 * ipa-fnsummary.c (compute_fn_summary): Clear can_change_signature
58 on functions with #pragma omp declare simd or functions with simd
60 * omp-simd-clone.c (expand_simd_clones): Revert 2018-01-24 change.
61 * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
62 Remove trailing \n from warning_at calls.
64 2018-01-25 Tom de Vries <tom@codesourcery.com>
67 * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
70 2018-01-24 Joseph Myers <joseph@codesourcery.com>
73 * config/m68k/m68k.c (m68k_promote_function_mode): New function.
74 (TARGET_PROMOTE_FUNCTION_MODE): New macro.
76 2017-01-08 Jeff Law <law@redhat.com>
79 * i386.c (get_probe_interval): Move to earlier point.
80 (ix86_compute_frame_layout): If -fstack-clash-protection and
81 the frame is larger than the probe interval, then use pushes
82 to save registers rather than reg->mem moves.
83 (ix86_expand_prologue): Remove conditional for int_registers_saved
86 2018-01-24 Vladimir Makarov <vmakarov@redhat.com>
89 * ira-build.c (setup_min_max_allocno_live_range_point): Set up
90 min/max for never referenced object.
92 2018-01-24 Jakub Jelinek <jakub@redhat.com>
95 * tree.c (free_lang_data_in_decl): Don't clear DECL_ABSTRACT_ORIGIN
97 * omp-low.c (create_omp_child_function): Remove "omp declare simd"
98 attributes from DECL_ATTRIBUTES (decl) without affecting
99 DECL_ATTRIBUTES (current_function_decl).
100 * omp-simd-clone.c (expand_simd_clones): Ignore DECL_ARTIFICIAL
101 functions with non-NULL DECL_ABSTRACT_ORIGIN.
103 2018-01-24 Richard Sandiford <richard.sandiford@linaro.org>
105 PR tree-optimization/83979
106 * fold-const.c (fold_comparison): Use constant_boolean_node
107 instead of boolean_{true,false}_node.
109 2018-01-24 Jan Hubicka <hubicka@ucw.cz>
111 * ipa-profile.c (ipa_propagate_frequency_1): Fix logic skipping calls
114 2018-01-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
116 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
117 Simplify the clause that sets the length attribute.
118 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
119 (*sibcall_nonlocal_sysv<mode>): Clean up code block; simplify the
120 clause that sets the length attribute.
121 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
123 2018-01-24 Tom de Vries <tom@codesourcery.com>
126 * config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_2): Define to 1.
127 (nvptx_pc_set, nvptx_condjump_label): New function. Copy from jump.c.
128 Add strict parameter.
129 (prevent_branch_around_nothing): Insert dummy insn between branch to
130 label and label with no ptx insn inbetween.
131 * config/nvptx/nvptx.md (define_insn "fake_nop"): New insn.
133 2018-01-24 Tom de Vries <tom@codesourcery.com>
136 * config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
137 for neutered threads in warp.
138 * config/nvptx/nvptx.md (define_insn "exit"): New insn.
140 2018-01-24 Richard Biener <rguenther@suse.de>
142 PR tree-optimization/83176
143 * tree-chrec.c (chrec_fold_plus_1): Handle (signed T){(T) .. }
146 2018-01-24 Richard Biener <rguenther@suse.de>
148 PR tree-optimization/82819
149 * graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
150 code generating pluses that are no-ops in the target precision.
152 2018-01-24 Richard Biener <rguenther@suse.de>
155 * tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind.
157 2018-01-23 Jan Hubicka <hubicka@ucw.cz>
159 * cfgcleanup.c (try_crossjump_to_edge): Use combine_with_count
160 to merge probabilities.
161 * predict.c (probably_never_executed): Also mark as cold functions
162 with global 0 profile and guessed local profile.
163 * profile-count.c (profile_probability::combine_with_count): New
165 * profile-count.h (profile_probability::operator*,
166 profile_probability::operator*=, profile_probability::operator/,
167 profile_probability::operator/=): Reduce precision to adjusted
168 and set value to guessed on contradictory divisions.
169 (profile_probability::combine_with_freq): Remove.
170 (profile_probability::combine_wiht_count): Declare.
171 (profile_count::force_nonzero):: Set to adjusted.
172 (profile_count::probability_in):: Set quality to adjusted.
173 * tree-ssa-tail-merge.c (replace_block_by): Use
176 2018-01-23 Andrew Waterman <andrew@sifive.com>
177 Jim Wilson <jimw@sifive.com>
179 * config/riscv/riscv.c (riscv_stack_boundary): New.
180 (riscv_option_override): Set riscv_stack_boundary. Handle
181 riscv_preferred_stack_boundary_arg.
182 * config/riscv/riscv.h (MIN_STACK_BOUNDARY, ABI_STACK_BOUNDARY): New.
183 (BIGGEST_ALIGNMENT): Set to STACK_BOUNDARY.
184 (STACK_BOUNDARY): Set to riscv_stack_boundary.
185 (RISCV_STACK_ALIGN): Use STACK_BOUNDARY.
186 * config/riscv/riscv.opt (mpreferred-stack-boundary): New.
187 * doc/invoke.tex (RISC-V Options): Add -mpreferred-stack-boundary.
189 2018-01-23 H.J. Lu <hongjiu.lu@intel.com>
192 * config/i386/i386.c (ix86_expand_prologue): Use cost reference
193 of struct ix86_frame.
194 (ix86_expand_epilogue): Likewise. Add a local variable for
195 the reg_save_offset field in struct ix86_frame.
197 2018-01-23 Bin Cheng <bin.cheng@arm.com>
199 PR tree-optimization/82604
200 * tree-loop-distribution.c (enum partition_kind): New enum item
201 PKIND_PARTIAL_MEMSET.
202 (partition_builtin_p): Support above new enum item.
203 (generate_code_for_partition): Ditto.
204 (compute_access_range): Differentiate cases that equality can be
205 proven at all loops, the innermost loops or no loops.
206 (classify_builtin_st, classify_builtin_ldst): Adjust call to above
207 function. Set PKIND_PARTIAL_MEMSET for partition appropriately.
208 (finalize_partitions, distribute_loop): Don't fuse partition of
209 PKIND_PARTIAL_MEMSET kind when distributing 3-level loop nest.
210 (prepare_perfect_loop_nest): Distribute 3-level loop nest only if
213 2018-01-23 Martin Liska <mliska@suse.cz>
215 * predict.def (PRED_INDIR_CALL): Set probability to PROB_EVEN in
216 order to ignore the predictor.
217 (PRED_POLYMORPHIC_CALL): Likewise.
218 (PRED_RECURSIVE_CALL): Likewise.
220 2018-01-23 Martin Liska <mliska@suse.cz>
222 * tree-profile.c (tree_profiling): Print function header to
223 aware reader which function we are working on.
224 * value-prof.c (gimple_find_values_to_profile): Do not print
225 not interesting value histograms.
227 2018-01-23 Martin Liska <mliska@suse.cz>
229 * profile-count.h (enum profile_quality): Add
230 profile_uninitialized as the first value. Do not number values
231 as they are zero based.
232 (profile_count::verify): Update sanity check.
233 (profile_probability::verify): Likewise.
235 2018-01-23 Nathan Sidwell <nathan@acm.org>
237 * doc/invoke.texi (ffor-scope): Deprecate.
239 2018-01-23 David Malcolm <dmalcolm@redhat.com>
241 PR tree-optimization/83510
242 * domwalk.c (set_all_edges_as_executable): New function.
243 (dom_walker::dom_walker): Convert bool param
244 "skip_unreachable_blocks" to enum reachability. Move setup of
245 edge flags to set_all_edges_as_executable and only do it when
246 reachability is REACHABLE_BLOCKS.
247 * domwalk.h (enum dom_walker::reachability): New enum.
248 (dom_walker::dom_walker): Convert bool param
249 "skip_unreachable_blocks" to enum reachability.
250 (set_all_edges_as_executable): New decl.
251 * graphite-scop-detection.c (gather_bbs::gather_bbs): Convert
252 from false for "skip_unreachable_blocks" to ALL_BLOCKS for
254 * tree-ssa-dom.c (dom_opt_dom_walker::dom_opt_dom_walker): Likewise,
255 but converting true to REACHABLE_BLOCKS.
256 * tree-ssa-sccvn.c (sccvn_dom_walker::sccvn_dom_walker): Likewise.
258 (check_array_bounds_dom_walker::check_array_bounds_dom_walker):
259 Likewise, but converting it to REACHABLE_BLOCKS_PRESERVING_FLAGS.
260 (vrp_dom_walker::vrp_dom_walker): Likewise, but converting it to
262 (vrp_prop::vrp_finalize): Call set_all_edges_as_executable
263 if check_all_array_refs will be called.
265 2018-01-23 David Malcolm <dmalcolm@redhat.com>
267 * tree.c (selftest::test_location_wrappers): Add more test
270 2018-01-23 David Malcolm <dmalcolm@redhat.com>
272 * sbitmap.c (selftest::test_set_range): Fix memory leaks.
273 (selftest::test_bit_in_range): Likewise.
275 2018-01-23 Richard Sandiford <richard.sandiford@linaro.org>
278 * doc/sourcebuild.texi (vect_float): Say that the selector
279 only describes the situation when -funsafe-math-optimizations is on.
280 (vect_float_strict): Document.
282 2018-01-23 Richard Sandiford <richard.sandiford@linaro.org>
284 PR tree-optimization/83965
285 * tree-vect-patterns.c (vect_reassociating_reduction_p): New function.
286 (vect_recog_dot_prod_pattern, vect_recog_sad_pattern): Use it
287 instead of checking only for a reduction.
288 (vect_recog_widen_sum_pattern): Likewise.
290 2018-01-23 Jan Hubicka <hubicka@ucw.cz>
292 * predict.c (probably_never_executed): Only use precise profile info.
293 (compute_function_frequency): Skip after inlining hack since we now
294 have quality checking.
296 2018-01-23 Jan Hubicka <hubicka@ucw.cz>
298 * profile-count.h (profile_probability::very_unlikely,
299 profile_probability::unlikely, profile_probability::even): Set
300 precision to guessed.
302 2018-01-23 Richard Biener <rguenther@suse.de>
304 PR tree-optimization/83963
305 * graphite-scop-detection.c (scop_detection::harmful_loop_in_region):
306 Properly terminate dominator walk when crossing the exit edge not
307 when visiting its source block.
309 2018-01-23 Jakub Jelinek <jakub@redhat.com>
312 * tree.c (maybe_wrap_with_location): Use NON_LVALUE_EXPR rather than
313 VIEW_CONVERT_EXPR to wrap CONST_DECLs.
315 2018-01-22 Jakub Jelinek <jakub@redhat.com>
317 PR tree-optimization/83957
318 * omp-expand.c (expand_omp_for_generic): Ignore virtual PHIs. Remove
319 semicolon after for body surrounded by braces.
321 PR tree-optimization/83081
322 * profile-count.h (profile_probability::split): New method.
323 * dojump.c (do_jump_1) <case TRUTH_ANDIF_EXPR, case TRUTH_ORIF_EXPR>:
324 Use profile_probability::split.
325 (do_compare_rtx_and_jump): Fix adjustment of probabilities
326 when splitting a single conditional jump into 2.
328 2018-01-22 David Malcolm <dmalcolm@redhat.com>
330 PR tree-optimization/69452
331 * tree-ssa-loop-im.c (class move_computations_dom_walker): Remove
334 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
336 * config/rl78/rl78-expand.md: New define_expand "bswaphi2"
337 * config/rl78/rl78-virt.md: New define_insn "*bswaphi2_virt"
338 * config/rl78/rl78-real.md: New define_insn "*bswaphi2_real"
340 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
342 * config/rl78/rl78-protos.h: New function declaration rl78_split_movdi
343 * config/rl78/rl78.md: New define_expand "movdi"
344 * config/rl78/rl78.c: New function definition rl78_split_movdi
346 2018-01-22 Michael Meissner <meissner@linux.vnet.ibm.com>
349 * config/rs6000/rs6000-protos.h (rs6000_split_signbit): Delete,
351 * config/rs6000/rs6000.c (rs6000_split_signbit): Likewise.
352 * config/rs6000/rs6000.md (signbit<mode>2): Change code for IEEE
353 128-bit to produce an UNSPEC move to get the double word with the
354 signbit and then a shift directly to do signbit.
355 (signbit<mode>2_dm): Replace old IEEE 128-bit signbit
356 implementation with a new version that just does either a direct
357 move or a regular move. Move memory interface to separate insns.
358 Move insns so they are next to the expander.
359 (signbit<mode>2_dm_mem_be): New combiner insns to combine load
360 with signbit move. Split big and little endian case.
361 (signbit<mode>2_dm_mem_le): Likewise.
362 (signbit<mode>2_dm_<su>ext): Delete, no longer used.
363 (signbit<mode>2_dm2): Likewise.
365 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
367 * config/rl78/rl78.md: New define_expand "anddi3".
369 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
371 * config/rl78/rl78.md: New define_expand "umindi3".
373 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
375 * config/rl78/rl78.md: New define_expand "smindi3".
377 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
379 * config/rl78/rl78.md: New define_expand "smaxdi3".
381 2018-01-22 Carl Love <cel@us.ibm.com>
383 * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
384 LVX_V1TI): Add macro expansion.
385 * config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
386 definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
387 VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
388 * config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
389 Change check to determine if the instruction is a byte reversing
390 entry. Fix typo in comment.
391 * config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
392 for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
393 Add def_builtin calls for new builtins.
394 * config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
395 Add define_insn expansion.
397 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
399 * config/rl78/rl78.md: New define_expand "umaxdi3".
401 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
403 * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
404 for non-QImode registers
406 2018-01-22 Richard Biener <rguenther@suse.de>
408 PR tree-optimization/83963
409 * graphite-scop-detection.c (scop_detection::get_sese): Delay
410 including the loop exit block.
411 (scop_detection::merge_sese): Likewise.
412 (scop_detection::add_scop): Do it here instead.
414 2018-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
416 * doc/sourcebuild.texi (arm_softfloat): Document.
418 2018-01-21 John David Anglin <danglin@gcc.gnu.org>
421 * config/pa/pa.c (pa_function_ok_for_sibcall): Use
422 targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
423 Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
425 2018-01-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
426 David Edelsohn <dje.gcc@gmail.com>
429 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
430 Change "crset eq" to "crset 2".
431 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
432 (*call_indirect_aix<mode>_nospec): Likewise.
433 (*call_value_indirect_aix<mode>_nospec): Likewise.
434 (*call_indirect_elfv2<mode>_nospec): Likewise.
435 (*call_value_indirect_elfv2<mode>_nospec): Likewise.
436 (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
437 change assembly output from . to $.
438 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
439 (indirect_jump<mode>_nospec): Change assembly output from . to $.
440 (*tablejump<mode>_internal1_nospec): Likewise.
442 2018-01-21 Oleg Endo <olegendo@gcc.gnu.org>
445 * config/sh/sh_optimize_sett_clrt.cc:
446 Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
448 2018-01-20 Richard Sandiford <richard.sandiford@linaro.org>
450 PR tree-optimization/83940
451 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
452 offset_dt to vect_constant_def rather than vect_unknown_def_type.
453 (vect_check_load_store_mask): Add a mask_dt_out parameter and
454 use it to pass back the definition type.
455 (vect_check_store_rhs): Likewise rhs_dt_out.
456 (vect_build_gather_load_calls): Add a mask_dt argument and use
457 it instead of a call to vect_is_simple_use.
458 (vectorizable_store): Update calls to vect_check_load_store_mask
459 and vect_check_store_rhs. Use the dt returned by the latter instead
460 of scatter_src_dt. Use the cached mask_dt and gs_info.offset_dt
461 instead of calls to vect_is_simple_use. Pass the scalar rather
462 than the vector operand to vect_is_simple_use when handling
463 second and subsequent copies of an rhs value.
464 (vectorizable_load): Update calls to vect_check_load_store_mask
465 and vect_build_gather_load_calls. Use the cached mask_dt and
466 gs_info.offset_dt instead of calls to vect_is_simple_use.
468 2018-01-20 Jakub Jelinek <jakub@redhat.com>
471 * tree-emutls.c: Include gimplify.h.
472 (lower_emutls_2): New function.
473 (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
474 with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
475 it before further processing.
478 * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
479 UINTVAL (trueop1) instead of INTVAL (op1).
481 2018-01-19 Jakub Jelinek <jakub@redhat.com>
485 * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
486 INCOMING_FRAME_SP_OFFSET if not defined.
487 (scan_trace): Add ENTRY argument. If true and
488 DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
489 emit a note to adjust the CFA offset.
490 (create_cfi_notes): Adjust scan_trace callers.
491 (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
492 INCOMING_FRAME_SP_OFFSET in the CIE.
493 * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
494 * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
496 * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
497 * doc/tm.texi: Regenerated.
499 2018-01-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
501 PR rtl-optimization/83147
502 * lra-constraints.c (remove_inheritance_pseudos): Use
503 lra_substitute_pseudo_within_insn.
505 2018-01-19 Tom de Vries <tom@codesourcery.com>
506 Cesar Philippidis <cesar@codesourcery.com>
509 * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
511 2018-01-19 Cesar Philippidis <cesar@codesourcery.com>
514 * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
515 spaces for function labels.
517 2018-01-19 Martin Liska <mliska@suse.cz>
519 * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
520 (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
521 (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
522 (PRED_OPCODE_POSITIVE): Change from 64 to 59.
523 (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
524 (PRED_CONST_RETURN): Change from 69 to 65.
525 (PRED_NULL_RETURN): Change from 91 to 71.
526 (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
527 (PRED_LOOP_GUARD): Change from 66 to 73.
529 2018-01-19 Martin Liska <mliska@suse.cz>
531 * predict.c (predict_insn_def): Add new assert.
532 (struct branch_predictor): Change type to signed integer.
533 (test_prediction_value_range): Amend test to cover
535 * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
536 (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
537 (PRED_LOOP_ITERATIONS_MAX): Likewise.
538 (PRED_LOOP_IV_COMPARE): Likewise.
539 * predict.h (PROB_UNINITIALIZED): Define new constant.
541 2018-01-19 Martin Liska <mliska@suse.cz>
543 * predict.c (dump_prediction): Add new format for
544 analyze_brprob.py script which is enabled with -details
546 * profile-count.h (precise_p): New function.
548 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
550 PR tree-optimization/83922
551 * tree-vect-loop.c (vect_verify_full_masking): Return false if
552 there are no statements that need masking.
553 (vect_active_double_reduction_p): New function.
554 (vect_analyze_loop_operations): Use it when handling phis that
555 are not in the loop header.
557 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
559 PR tree-optimization/83914
560 * tree-vect-loop.c (vectorizable_induction): Don't convert
561 init_expr or apply the peeling adjustment for inductions
562 that are nested within the vectorized loop.
564 2018-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
566 * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
569 2018-01-18 Jakub Jelinek <jakub@redhat.com>
573 * function.h (gimplify_parameters): Add gimple_seq * argument.
574 * function.c: Include gimple.h and options.h.
575 (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
576 for the added local temporaries if needed.
577 * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
578 if there are any parameter cleanups, wrap whole body into a
579 try/finally with the cleanups.
581 2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
584 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
585 Use GET_MODE_CLASS for scalar floating point.
587 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
591 * cgraphclones.c (cgraph_node::create_version_clone_with_body):
592 Fix call of call_cgraph_insertion_hooks.
594 2018-01-18 Martin Sebor <msebor@redhat.com>
596 * doc/invoke.texi (-Wclass-memaccess): Tweak text.
598 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
601 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
604 2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
607 * common.opt: (-ffile-prefix-map): New option.
608 * opts.c (common_handle_option): Defer it.
609 * opts-global.c (handle_common_deferred_options): Handle it.
610 * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
611 * file-prefix-map.h: New file.
612 (remap_debug_filename, add_debug_prefix_map): ...here.
613 (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
614 * final.c (debug_prefix_map, add_debug_prefix_map
615 remap_debug_filename): Move to...
616 * file-prefix-map.c: New file.
617 (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
618 generalize, get rid of alloca(), use strrchr() instead of strchr().
619 (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
620 Implement in terms of add_prefix_map().
621 (remap_macro_filename, remap_debug_filename): Implement in term of
623 * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
624 * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
625 * dbxout.c: Include file-prefix-map.h.
626 * varasm.c: Likewise.
627 * vmsdbgout.c: Likewise.
628 * xcoffout.c: Likewise.
629 * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
630 * doc/cppopts.texi (-fmacro-prefix-map): Document.
631 * doc/invoke.texi (-ffile-prefix-map): Document.
632 (-fdebug-prefix-map): Update description.
634 2018-01-18 Martin Liska <mliska@suse.cz>
636 * config/i386/i386.c (indirect_thunk_name): Document that also
638 (output_indirect_thunk): Document why both instructions
639 (pause and lfence) are generated.
641 2018-01-18 Richard Biener <rguenther@suse.de>
643 PR tree-optimization/83887
644 * graphite-scop-detection.c
645 (scop_detection::get_nearest_dom_with_single_entry): Remove.
646 (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
647 (scop_detection::merge_sese): Re-implement with a flood-fill
648 algorithm that properly finds a SESE region if it exists.
650 2018-01-18 Jakub Jelinek <jakub@redhat.com>
653 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
654 pointer_diff optimizations use view_convert instead of convert.
656 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
658 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
659 Generate different code for -mno-speculate-indirect-jumps.
660 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
661 (*call_indirect_aix<mode>): Disable for
662 -mno-speculate-indirect-jumps.
663 (*call_indirect_aix<mode>_nospec): New define_insn.
664 (*call_value_indirect_aix<mode>): Disable for
665 -mno-speculate-indirect-jumps.
666 (*call_value_indirect_aix<mode>_nospec): New define_insn.
667 (*sibcall_nonlocal_sysv<mode>): Generate different code for
668 -mno-speculate-indirect-jumps.
669 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
671 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
673 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
674 long double type, set the flags for noting the default long double
675 type, even if we don't pass or return a long double type.
677 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
680 * ipa-inline.c (flatten_function): Do not overwrite final inlining
683 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
685 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
686 support for merge[hl].
687 (fold_mergehl_helper): New helper function.
688 (tree-vector-builder.h): New #include for tree_vector_builder usage.
689 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
690 (altivec_vmrglw_direct): Add xxmrglw insn.
692 2018-01-17 Andrew Waterman <andrew@sifive.com>
694 * config/riscv/riscv.c (riscv_conditional_register_usage): If
695 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
697 2018-01-17 David Malcolm <dmalcolm@redhat.com>
700 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
701 call the lto_location_cache before reading the
702 DECL_SOURCE_LOCATION of the types.
704 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
705 Richard Sandiford <richard.sandiford@linaro.org>
707 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
708 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
709 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
710 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
711 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
713 * config/aarch64/constraints.md (aarch64_movti_operand):
715 * config/aarch64/predicates.md (Uti): Add new constraint.
717 2018-01-17 Carl Love <cel@us.ibm.com>
718 * config/rs6000/vsx.md (define_expand xl_len_r,
719 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
720 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
722 (define_expand, define_insn): Move the shift left from the
723 define_insn to the define_expand for lxvl and stxvl instructions.
724 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
725 and XL_LEN_R definitions to PURE.
727 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
729 * config/i386/i386.c (indirect_thunk_name): Declare regno
730 as unsigned int. Compare regno with INVALID_REGNUM.
731 (output_indirect_thunk): Ditto.
732 (output_indirect_thunk_function): Ditto.
733 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
734 in the call to output_indirect_thunk_function.
736 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
739 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
740 rather than the size of inner_type to determine the stack slot size
741 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
743 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
746 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
749 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
751 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
752 endian Linux systems to optionally enable multilibs for selecting
753 the long double type if the user configured an explicit type.
754 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
755 have no long double multilibs if not defined.
756 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
757 warn if the user used -mabi={ieee,ibm}longdouble and we built
758 multilibs for long double.
759 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
760 appropriate multilib option.
761 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
763 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
764 for building long double multilibs.
765 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
767 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
769 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
772 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
774 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
777 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
780 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
783 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
785 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
786 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
788 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
790 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
791 different rtl trees depending on TARGET_64BIT.
792 (rs6000_gen_lvx): Likewise.
794 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
796 * config/visium/visium.md (nop): Tweak comment.
797 (hazard_nop): Likewise.
799 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
801 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
802 -mspeculate-indirect-jumps.
803 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
804 for -mno-speculate-indirect-jumps.
805 (*call_indirect_elfv2<mode>_nospec): New define_insn.
806 (*call_value_indirect_elfv2<mode>): Disable for
807 -mno-speculate-indirect-jumps.
808 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
809 (indirect_jump): Emit different RTL for
810 -mno-speculate-indirect-jumps.
811 (*indirect_jump<mode>): Disable for
812 -mno-speculate-indirect-jumps.
813 (*indirect_jump<mode>_nospec): New define_insn.
814 (tablejump): Emit different RTL for
815 -mno-speculate-indirect-jumps.
816 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
817 (tablejumpsi_nospec): New define_expand.
818 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
819 (tablejumpdi_nospec): New define_expand.
820 (*tablejump<mode>_internal1): Disable for
821 -mno-speculate-indirect-jumps.
822 (*tablejump<mode>_internal1_nospec): New define_insn.
823 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
826 2018-01-16 Artyom Skrobov tyomitch@gmail.com
828 * caller-save.c (insert_save): Drop unnecessary parameter. All
831 2018-01-16 Jakub Jelinek <jakub@redhat.com>
832 Richard Biener <rguenth@suse.de>
835 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
836 return early, inline manually is_gimple_sizepos. Make sure if we
837 call gimplify_expr we don't end up with a gimple constant.
838 * tree.c (variably_modified_type_p): Don't return true for
839 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
840 * gimplify.h (is_gimple_sizepos): Remove.
842 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
844 PR tree-optimization/83857
845 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
846 vectorizable_live_operation for pure SLP statements.
847 (vectorizable_live_operation): Handle PHIs.
849 2018-01-16 Richard Biener <rguenther@suse.de>
851 PR tree-optimization/83867
852 * tree-vect-stmts.c (vect_transform_stmt): Precompute
853 nested_in_vect_loop_p since the scalar stmt may get invalidated.
855 2018-01-16 Jakub Jelinek <jakub@redhat.com>
858 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
859 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
860 If off is not INTEGER_CST, issue a may not be aligned warning
861 rather than isn't aligned. Use isn%'t rather than isn't.
862 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
864 <case MULT_EXPR>: Improve the case when bottom and one of the
865 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
866 operand, in that case check if the other operand is multiple of
867 bottom divided by the INTEGER_CST operand.
869 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
872 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
873 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
874 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
875 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
876 * config/pa/pa.c (pa_function_arg_advance): Likewise.
877 (pa_function_arg, pa_arg_partial_bytes): Likewise.
878 (pa_function_arg_size): New function.
880 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
882 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
883 in a separate statement.
885 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
887 PR tree-optimization/83847
888 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
889 group gathers and scatters.
891 2018-01-16 Jakub Jelinek <jakub@redhat.com>
893 PR rtl-optimization/86620
894 * params.def (max-sched-ready-insns): Bump minimum value to 1.
896 PR rtl-optimization/83213
897 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
898 to last if both are JUMP_INSNs.
900 PR tree-optimization/83843
901 * gimple-ssa-store-merging.c
902 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
903 store_immediate_info for bswap/nop orig_stores.
905 2018-01-15 Andrew Waterman <andrew@sifive.com>
907 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
909 <UDIV>: Increase cost if !TARGET_DIV.
911 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
913 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
914 (define_attr "cr_logical_3op"): New.
915 (cceq_ior_compare): Adjust.
916 (cceq_ior_compare_complement): Adjust.
917 (*cceq_rev_compare): Adjust.
918 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
919 (is_cracked_insn): Adjust.
920 (insn_must_be_first_in_group): Adjust.
921 * config/rs6000/40x.md: Adjust.
922 * config/rs6000/440.md: Adjust.
923 * config/rs6000/476.md: Adjust.
924 * config/rs6000/601.md: Adjust.
925 * config/rs6000/603.md: Adjust.
926 * config/rs6000/6xx.md: Adjust.
927 * config/rs6000/7450.md: Adjust.
928 * config/rs6000/7xx.md: Adjust.
929 * config/rs6000/8540.md: Adjust.
930 * config/rs6000/cell.md: Adjust.
931 * config/rs6000/e300c2c3.md: Adjust.
932 * config/rs6000/e500mc.md: Adjust.
933 * config/rs6000/e500mc64.md: Adjust.
934 * config/rs6000/e5500.md: Adjust.
935 * config/rs6000/e6500.md: Adjust.
936 * config/rs6000/mpc.md: Adjust.
937 * config/rs6000/power4.md: Adjust.
938 * config/rs6000/power5.md: Adjust.
939 * config/rs6000/power6.md: Adjust.
940 * config/rs6000/power7.md: Adjust.
941 * config/rs6000/power8.md: Adjust.
942 * config/rs6000/power9.md: Adjust.
943 * config/rs6000/rs64.md: Adjust.
944 * config/rs6000/titan.md: Adjust.
946 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
948 * config/i386/predicates.md (indirect_branch_operand): Rewrite
949 ix86_indirect_branch_register logic.
951 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
953 * config/i386/constraints.md (Bs): Update
954 ix86_indirect_branch_register check. Don't check
955 ix86_indirect_branch_register with GOT_memory_operand.
957 * config/i386/predicates.md (GOT_memory_operand): Don't check
958 ix86_indirect_branch_register here.
959 (GOT32_symbol_operand): Likewise.
961 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
963 * config/i386/predicates.md (constant_call_address_operand):
964 Rewrite ix86_indirect_branch_register logic.
965 (sibcall_insn_operand): Likewise.
967 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
969 * config/i386/constraints.md (Bs): Replace
970 ix86_indirect_branch_thunk_register with
971 ix86_indirect_branch_register.
973 * config/i386/i386.md (indirect_jump): Likewise.
974 (tablejump): Likewise.
975 (*sibcall_memory): Likewise.
976 (*sibcall_value_memory): Likewise.
977 Peepholes of indirect call and jump via memory: Likewise.
978 * config/i386/i386.opt: Likewise.
979 * config/i386/predicates.md (indirect_branch_operand): Likewise.
980 (GOT_memory_operand): Likewise.
981 (call_insn_operand): Likewise.
982 (sibcall_insn_operand): Likewise.
983 (GOT32_symbol_operand): Likewise.
985 2018-01-15 Jakub Jelinek <jakub@redhat.com>
988 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
989 type rather than type addr's type points to.
990 (expand_omp_atomic_mutex): Likewise.
991 (expand_omp_atomic): Likewise.
993 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
996 * config/i386/i386.c (output_indirect_thunk_function): Use
997 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
998 for __x86_return_thunk.
1000 2018-01-15 Richard Biener <rguenther@suse.de>
1003 * expmed.c (extract_bit_field_1): Fix typo.
1005 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1008 * config/arm/iterators.md (VF): New mode iterator.
1009 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
1010 Remove integer-related logic from pattern.
1011 (neon_vabd<mode>_3): Likewise.
1013 2018-01-15 Jakub Jelinek <jakub@redhat.com>
1016 * common.opt (fstrict-overflow): No longer an alias.
1017 (fwrapv-pointer): New option.
1018 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
1019 also for pointer types based on flag_wrapv_pointer.
1020 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
1021 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
1022 opts->x_flag_wrapv got set.
1023 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
1024 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
1025 POINTER_TYPE_OVERFLOW_UNDEFINED.
1026 * match.pd: Likewise in address comparison pattern.
1027 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
1029 2018-01-15 Richard Biener <rguenther@suse.de>
1032 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
1033 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
1034 Reset type names to their identifier if their TYPE_DECL doesn't
1035 have linkage (and thus is used for ODR and devirt).
1036 (save_debug_info_for_decl): Remove.
1037 (save_debug_info_for_type): Likewise.
1038 (add_tree_to_fld_list): Adjust.
1039 * tree-pretty-print.c (dump_generic_node): Make dumping of
1040 type names more robust.
1042 2018-01-15 Richard Biener <rguenther@suse.de>
1044 * BASE-VER: Bump to 8.0.1.
1046 2018-01-14 Martin Sebor <msebor@redhat.com>
1049 * builtins.c (check_access): Avoid warning when the no-warning bit
1052 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
1054 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
1055 * ira-color (allocno_hard_regs_compare): Likewise.
1057 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
1060 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
1061 Use .pushsection/.popsection.
1063 2018-01-14 Martin Sebor <msebor@redhat.com>
1066 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
1068 2018-01-14 Jakub Jelinek <jakub@redhat.com>
1070 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
1071 entry from extra_headers.
1072 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
1073 extra_headers, make the list bitwise identical to the i?86-*-* one.
1075 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
1077 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
1078 -mcmodel=large with -mindirect-branch=thunk,
1079 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
1080 -mfunction-return=thunk-extern.
1081 * doc/invoke.texi: Document -mcmodel=large is incompatible with
1082 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
1083 -mfunction-return=thunk and -mfunction-return=thunk-extern.
1085 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
1087 * config/i386/i386.c (print_reg): Print the name of the full
1088 integer register without '%'.
1089 (ix86_print_operand): Handle 'V'.
1090 * doc/extend.texi: Document 'V' modifier.
1092 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
1094 * config/i386/constraints.md (Bs): Disallow memory operand for
1095 -mindirect-branch-register.
1097 * config/i386/predicates.md (indirect_branch_operand): Likewise.
1098 (GOT_memory_operand): Likewise.
1099 (call_insn_operand): Likewise.
1100 (sibcall_insn_operand): Likewise.
1101 (GOT32_symbol_operand): Likewise.
1102 * config/i386/i386.md (indirect_jump): Call convert_memory_address
1103 for -mindirect-branch-register.
1104 (tablejump): Likewise.
1105 (*sibcall_memory): Likewise.
1106 (*sibcall_value_memory): Likewise.
1107 Disallow peepholes of indirect call and jump via memory for
1108 -mindirect-branch-register.
1109 (*call_pop): Replace m with Bw.
1110 (*call_value_pop): Likewise.
1111 (*sibcall_pop_memory): Replace m with Bs.
1112 * config/i386/i386.opt (mindirect-branch-register): New option.
1113 * doc/invoke.texi: Document -mindirect-branch-register option.
1115 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
1117 * config/i386/i386-protos.h (ix86_output_function_return): New.
1118 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
1119 set function_return_type.
1120 (indirect_thunk_name): Add ret_p to indicate thunk for function
1122 (output_indirect_thunk_function): Pass false to
1123 indirect_thunk_name.
1124 (ix86_output_indirect_branch_via_reg): Likewise.
1125 (ix86_output_indirect_branch_via_push): Likewise.
1126 (output_indirect_thunk_function): Create alias for function
1127 return thunk if regno < 0.
1128 (ix86_output_function_return): New function.
1129 (ix86_handle_fndecl_attribute): Handle function_return.
1130 (ix86_attribute_table): Add function_return.
1131 * config/i386/i386.h (machine_function): Add
1132 function_return_type.
1133 * config/i386/i386.md (simple_return_internal): Use
1134 ix86_output_function_return.
1135 (simple_return_internal_long): Likewise.
1136 * config/i386/i386.opt (mfunction-return=): New option.
1137 (indirect_branch): Mention -mfunction-return=.
1138 * doc/extend.texi: Document function_return function attribute.
1139 * doc/invoke.texi: Document -mfunction-return= option.
1141 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
1143 * config/i386/i386-opts.h (indirect_branch): New.
1144 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
1145 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
1146 with local indirect jump when converting indirect call and jump.
1147 (ix86_set_indirect_branch_type): New.
1148 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
1149 (indirectlabelno): New.
1150 (indirect_thunk_needed): Likewise.
1151 (indirect_thunk_bnd_needed): Likewise.
1152 (indirect_thunks_used): Likewise.
1153 (indirect_thunks_bnd_used): Likewise.
1154 (INDIRECT_LABEL): Likewise.
1155 (indirect_thunk_name): Likewise.
1156 (output_indirect_thunk): Likewise.
1157 (output_indirect_thunk_function): Likewise.
1158 (ix86_output_indirect_branch_via_reg): Likewise.
1159 (ix86_output_indirect_branch_via_push): Likewise.
1160 (ix86_output_indirect_branch): Likewise.
1161 (ix86_output_indirect_jmp): Likewise.
1162 (ix86_code_end): Call output_indirect_thunk_function if needed.
1163 (ix86_output_call_insn): Call ix86_output_indirect_branch if
1165 (ix86_handle_fndecl_attribute): Handle indirect_branch.
1166 (ix86_attribute_table): Add indirect_branch.
1167 * config/i386/i386.h (machine_function): Add indirect_branch_type
1168 and has_local_indirect_jump.
1169 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
1171 (tablejump): Likewise.
1172 (*indirect_jump): Use ix86_output_indirect_jmp.
1173 (*tablejump_1): Likewise.
1174 (simple_return_indirect_internal): Likewise.
1175 * config/i386/i386.opt (mindirect-branch=): New option.
1176 (indirect_branch): New.
1179 (thunk-inline): Likewise.
1180 (thunk-extern): Likewise.
1181 * doc/extend.texi: Document indirect_branch function attribute.
1182 * doc/invoke.texi: Document -mindirect-branch= option.
1184 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
1187 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
1189 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
1191 * ipa-inline.c (want_inline_small_function_p): Return false if
1192 inlining has already failed with CIF_FINAL_ERROR.
1193 (update_caller_keys): Call want_inline_small_function_p before
1195 (update_callee_keys): Likewise.
1197 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
1199 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
1201 (rs6000_quadword_masked_address_p): Likewise.
1202 (quad_aligned_load_p): Likewise.
1203 (quad_aligned_store_p): Likewise.
1204 (const_load_sequence_p): Add comment to describe the outer-most loop.
1205 (mimic_memory_attributes_and_flags): New function.
1206 (rs6000_gen_stvx): Likewise.
1207 (replace_swapped_aligned_store): Likewise.
1208 (rs6000_gen_lvx): Likewise.
1209 (replace_swapped_aligned_load): Likewise.
1210 (replace_swapped_load_constant): Capitalize argument name in
1211 comment describing this function.
1212 (rs6000_analyze_swaps): Add a third pass to search for vector loads
1213 and stores that access quad-word aligned addresses and replace
1214 with stvx or lvx instructions when appropriate.
1215 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
1216 New function prototype.
1217 (rs6000_quadword_masked_address_p): Likewise.
1218 (rs6000_gen_lvx): Likewise.
1219 (rs6000_gen_stvx): Likewise.
1220 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
1221 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
1222 when memory address is aligned.
1223 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
1224 this split to select lvx instruction when memory address is aligned.
1225 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
1226 instruction when memory address is aligned.
1227 (*vsx_le_perm_load_v16qi): Likewise.
1228 (four unnamed splitters): Modify to select the stvx instruction
1229 when memory is aligned.
1231 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
1233 * predict.c (determine_unlikely_bbs): Handle correctly BBs
1234 which appears in the queue multiple times.
1236 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1237 Alan Hayward <alan.hayward@arm.com>
1238 David Sherwood <david.sherwood@arm.com>
1240 * tree-vectorizer.h (vec_lower_bound): New structure.
1241 (_loop_vec_info): Add check_nonzero and lower_bounds.
1242 (LOOP_VINFO_CHECK_NONZERO): New macro.
1243 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
1244 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
1245 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
1246 fields. Make seg_len the distance travelled, not including the
1248 (dr_direction_indicator): Declare.
1249 (dr_zero_step_indicator): Likewise.
1250 (dr_known_forward_stride_p): Likewise.
1251 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
1253 (runtime_alias_check_p): Allow runtime alias checks with
1255 (operator ==): Compare access_size and align.
1256 (prune_runtime_alias_test_list): Rework for new distinction between
1257 the access_size and seg_len.
1258 (create_intersect_range_checks_index): Likewise. Cope with polynomial
1260 (get_segment_min_max): New function.
1261 (create_intersect_range_checks): Use it.
1262 (dr_step_indicator): New function.
1263 (dr_direction_indicator): Likewise.
1264 (dr_zero_step_indicator): Likewise.
1265 (dr_known_forward_stride_p): Likewise.
1266 * tree-loop-distribution.c (data_ref_segment_size): Return
1267 DR_STEP * (niters - 1).
1268 (compute_alias_check_pairs): Update call to the dr_with_seg_len
1270 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
1271 (vect_preserves_scalar_order_p): New function, split out from...
1272 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
1273 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
1274 (vect_vfa_access_size): New function.
1275 (vect_vfa_align): Likewise.
1276 (vect_compile_time_alias): Take access_size_a and access_b arguments.
1277 (dump_lower_bound): New function.
1278 (vect_check_lower_bound): Likewise.
1279 (vect_small_gap_p): Likewise.
1280 (vectorizable_with_step_bound_p): Likewise.
1281 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
1282 depencies if the vectorization factor is 1. Convert the checks
1283 for nonzero steps into checks on the bounds of DR_STEP. Try using
1284 a bunds check for variable steps if the minimum required step is
1285 relatively small. Update calls to the dr_with_seg_len
1286 constructor and to vect_compile_time_alias.
1287 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
1289 (vect_loop_versioning): Call it.
1290 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
1292 (vect_estimate_min_profitable_iters): Account for any bounds checks.
1294 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1295 Alan Hayward <alan.hayward@arm.com>
1296 David Sherwood <david.sherwood@arm.com>
1298 * doc/sourcebuild.texi (vect_scatter_store): Document.
1299 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
1301 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
1303 * genopinit.c (main): Add supports_vec_scatter_store and
1304 supports_vec_scatter_store_cached to target_optabs.
1305 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
1306 IFN_MASK_SCATTER_STORE.
1307 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
1309 * internal-fn.h (internal_store_fn_p): Declare.
1310 (internal_fn_stored_value_index): Likewise.
1311 * internal-fn.c (scatter_store_direct): New macro.
1312 (expand_scatter_store_optab_fn): New function.
1313 (direct_scatter_store_optab_supported_p): New macro.
1314 (internal_store_fn_p): New function.
1315 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
1316 IFN_MASK_SCATTER_STORE.
1317 (internal_fn_mask_index): Likewise.
1318 (internal_fn_stored_value_index): New function.
1319 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
1321 * optabs-query.h (supports_vec_scatter_store_p): Declare.
1322 * optabs-query.c (supports_vec_scatter_store_p): New function.
1323 * tree-vectorizer.h (vect_get_store_rhs): Declare.
1324 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
1325 true for scatter stores.
1326 (vect_gather_scatter_fn_p): Handle scatter stores too.
1327 (vect_check_gather_scatter): Consider using scatter stores if
1328 supports_vec_scatter_store_p.
1329 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
1331 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1332 internal_fn_stored_value_index.
1333 (check_load_store_masking): Handle scatter stores too.
1334 (vect_get_store_rhs): Make public.
1335 (vectorizable_call): Use internal_store_fn_p.
1336 (vectorizable_store): Handle scatter store internal functions.
1337 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
1338 when deciding whether the end of the group has been reached.
1339 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
1340 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
1341 (mask_scatter_store<mode>): New insns.
1343 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1344 Alan Hayward <alan.hayward@arm.com>
1345 David Sherwood <david.sherwood@arm.com>
1347 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
1348 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
1349 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
1351 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
1352 Use vect_truncate_gather_scatter_offset if we can't treat the
1353 operation as a normal gather load or scatter store.
1354 (get_group_load_store_type): Take the gather_scatter_info
1355 as argument. Try using a gather load or scatter store for
1356 single-element groups.
1357 (get_load_store_type): Update calls to get_group_load_store_type
1358 and vect_use_strided_gather_scatters_p.
1360 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1361 Alan Hayward <alan.hayward@arm.com>
1362 David Sherwood <david.sherwood@arm.com>
1364 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
1365 optional tree argument.
1366 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
1368 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
1369 but continue to use the current value as a fallback.
1370 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
1371 to compare the updates.
1372 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
1373 (get_load_store_type): Use it when handling a strided access.
1374 (vect_get_strided_load_store_ops): New function.
1375 (vect_get_data_ptr_increment): Likewise.
1376 (vectorizable_load): Handle strided gather loads. Always pass
1377 a step to vect_create_data_ref_ptr and bump_vector_ptr.
1379 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1380 Alan Hayward <alan.hayward@arm.com>
1381 David Sherwood <david.sherwood@arm.com>
1383 * doc/md.texi (gather_load@var{m}): Document.
1384 (mask_gather_load@var{m}): Likewise.
1385 * genopinit.c (main): Add supports_vec_gather_load and
1386 supports_vec_gather_load_cached to target_optabs.
1387 * optabs-tree.c (init_tree_optimization_optabs): Use
1388 ggc_cleared_alloc to allocate target_optabs.
1389 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
1390 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
1392 * internal-fn.h (internal_load_fn_p): Declare.
1393 (internal_gather_scatter_fn_p): Likewise.
1394 (internal_fn_mask_index): Likewise.
1395 (internal_gather_scatter_fn_supported_p): Likewise.
1396 * internal-fn.c (gather_load_direct): New macro.
1397 (expand_gather_load_optab_fn): New function.
1398 (direct_gather_load_optab_supported_p): New macro.
1399 (direct_internal_fn_optab): New function.
1400 (internal_load_fn_p): Likewise.
1401 (internal_gather_scatter_fn_p): Likewise.
1402 (internal_fn_mask_index): Likewise.
1403 (internal_gather_scatter_fn_supported_p): Likewise.
1404 * optabs-query.c (supports_at_least_one_mode_p): New function.
1405 (supports_vec_gather_load_p): Likewise.
1406 * optabs-query.h (supports_vec_gather_load_p): Declare.
1407 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
1408 and memory_type field.
1409 (NUM_PATTERNS): Bump to 15.
1410 * tree-vect-data-refs.c: Include internal-fn.h.
1411 (vect_gather_scatter_fn_p): New function.
1412 (vect_describe_gather_scatter_call): Likewise.
1413 (vect_check_gather_scatter): Try using internal functions for
1414 gather loads. Recognize existing calls to a gather load function.
1415 (vect_analyze_data_refs): Consider using gather loads if
1416 supports_vec_gather_load_p.
1417 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
1418 (vect_get_gather_scatter_offset_type): Likewise.
1419 (vect_convert_mask_for_vectype): Likewise.
1420 (vect_add_conversion_to_patterm): Likewise.
1421 (vect_try_gather_scatter_pattern): Likewise.
1422 (vect_recog_gather_scatter_pattern): New pattern recognizer.
1423 (vect_vect_recog_func_ptrs): Add it.
1424 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1425 internal_fn_mask_index and internal_gather_scatter_fn_p.
1426 (check_load_store_masking): Take the gather_scatter_info as an
1427 argument and handle gather loads.
1428 (vect_get_gather_scatter_ops): New function.
1429 (vectorizable_call): Check internal_load_fn_p.
1430 (vectorizable_load): Likewise. Handle gather load internal
1432 (vectorizable_store): Update call to check_load_store_masking.
1433 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
1434 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
1435 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
1436 (aarch64_gather_scale_operand_d): New predicates.
1437 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
1438 (mask_gather_load<mode>): New insns.
1440 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1441 Alan Hayward <alan.hayward@arm.com>
1442 David Sherwood <david.sherwood@arm.com>
1444 * optabs.def (fold_left_plus_optab): New optab.
1445 * doc/md.texi (fold_left_plus_@var{m}): Document.
1446 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
1447 * internal-fn.c (fold_left_direct): Define.
1448 (expand_fold_left_optab_fn): Likewise.
1449 (direct_fold_left_optab_supported_p): Likewise.
1450 * fold-const-call.c (fold_const_fold_left): New function.
1451 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
1452 * tree-parloops.c (valid_reduction_p): New function.
1453 (gather_scalar_reductions): Use it.
1454 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
1455 (vect_finish_replace_stmt): Declare.
1456 * tree-vect-loop.c (fold_left_reduction_fn): New function.
1457 (needs_fold_left_reduction_p): New function, split out from...
1458 (vect_is_simple_reduction): ...here. Accept reductions that
1459 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
1460 (vect_force_simple_reduction): Also store the reduction type in
1461 the assignment's STMT_VINFO_REDUC_TYPE.
1462 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
1463 (merge_with_identity): New function.
1464 (vect_expand_fold_left): Likewise.
1465 (vectorize_fold_left_reduction): Likewise.
1466 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
1467 scalar phi in place for it. Check for target support and reject
1468 cases that would reassociate the operation. Defer the transform
1469 phase to vectorize_fold_left_reduction.
1470 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
1471 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
1472 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
1474 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1476 * tree-if-conv.c (predicate_mem_writes): Remove redundant
1477 call to ifc_temp_var.
1479 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1480 Alan Hayward <alan.hayward@arm.com>
1481 David Sherwood <david.sherwood@arm.com>
1483 * target.def (legitimize_address_displacement): Take the original
1484 offset as a poly_int.
1485 * targhooks.h (default_legitimize_address_displacement): Update
1487 * targhooks.c (default_legitimize_address_displacement): Likewise.
1488 * doc/tm.texi: Regenerate.
1489 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
1490 as an argument, moving assert of ad->disp == ad->disp_term to...
1491 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
1492 Try calling targetm.legitimize_address_displacement before expanding
1493 the address rather than afterwards, and adjust for the new interface.
1494 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
1495 Match the new hook interface. Handle SVE addresses.
1496 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
1499 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1501 * Makefile.in (OBJS): Add early-remat.o.
1502 * target.def (select_early_remat_modes): New hook.
1503 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
1504 * doc/tm.texi: Regenerate.
1505 * targhooks.h (default_select_early_remat_modes): Declare.
1506 * targhooks.c (default_select_early_remat_modes): New function.
1507 * timevar.def (TV_EARLY_REMAT): New timevar.
1508 * passes.def (pass_early_remat): New pass.
1509 * tree-pass.h (make_pass_early_remat): Declare.
1510 * early-remat.c: New file.
1511 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
1513 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
1515 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1516 Alan Hayward <alan.hayward@arm.com>
1517 David Sherwood <david.sherwood@arm.com>
1519 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
1520 vfm1 with a bound_epilog parameter.
1521 (vect_do_peeling): Update calls accordingly, and move the prologue
1522 call earlier in the function. Treat the base bound_epilog as 0 for
1523 fully-masked loops and retain vf - 1 for other loops. Add 1 to
1524 this base when peeling for gaps.
1525 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
1526 with fully-masked loops.
1527 (vect_estimate_min_profitable_iters): Handle the single peeled
1528 iteration in that case.
1530 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1531 Alan Hayward <alan.hayward@arm.com>
1532 David Sherwood <david.sherwood@arm.com>
1534 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
1535 single-element interleaving even if the size is not a power of 2.
1536 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
1537 accesses for single-element interleaving if the group size is
1540 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1541 Alan Hayward <alan.hayward@arm.com>
1542 David Sherwood <david.sherwood@arm.com>
1544 * doc/md.texi (fold_extract_last_@var{m}): Document.
1545 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1546 * optabs.def (fold_extract_last_optab): New optab.
1547 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1548 * internal-fn.c (fold_extract_direct): New macro.
1549 (expand_fold_extract_optab_fn): Likewise.
1550 (direct_fold_extract_optab_supported_p): Likewise.
1551 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1552 * tree-vect-loop.c (vect_model_reduction_cost): Handle
1553 EXTRACT_LAST_REDUCTION.
1554 (get_initial_def_for_reduction): Do not create an initial vector
1555 for EXTRACT_LAST_REDUCTION reductions.
1556 (vectorizable_reduction): Leave the scalar phi in place for
1557 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
1558 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
1559 epilogue code for EXTRACT_LAST_REDUCTION and defer the
1560 transform phase to vectorizable_condition.
1561 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1563 (vect_finish_stmt_generation): ...here.
1564 (vect_finish_replace_stmt): New function.
1565 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1566 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1568 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1570 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1571 Alan Hayward <alan.hayward@arm.com>
1572 David Sherwood <david.sherwood@arm.com>
1574 * doc/md.texi (extract_last_@var{m}): Document.
1575 * optabs.def (extract_last_optab): New optab.
1576 * internal-fn.def (EXTRACT_LAST): New internal function.
1577 * internal-fn.c (cond_unary_direct): New macro.
1578 (expand_cond_unary_optab_fn): Likewise.
1579 (direct_cond_unary_optab_supported_p): Likewise.
1580 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1581 loops using EXTRACT_LAST.
1582 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1583 (extract_last_<mode>): ...this optab.
1584 (vec_extract<mode><Vel>): Update accordingly.
1586 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1587 Alan Hayward <alan.hayward@arm.com>
1588 David Sherwood <david.sherwood@arm.com>
1590 * target.def (empty_mask_is_expensive): New hook.
1591 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1592 * doc/tm.texi: Regenerate.
1593 * targhooks.h (default_empty_mask_is_expensive): Declare.
1594 * targhooks.c (default_empty_mask_is_expensive): New function.
1595 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1596 if the target says that empty masks are expensive.
1597 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1599 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1601 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1602 Alan Hayward <alan.hayward@arm.com>
1603 David Sherwood <david.sherwood@arm.com>
1605 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1606 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1607 (vect_use_loop_mask_for_alignment_p): New function.
1608 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1609 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1610 niters_skip argument. Make sure that the first niters_skip elements
1611 of the first iteration are inactive.
1612 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1613 Update call to vect_set_loop_masks_directly.
1614 (get_misalign_in_elems): New function, split out from...
1615 (vect_gen_prolog_loop_niters): ...here.
1616 (vect_update_init_of_dr): Take a code argument that specifies whether
1617 the adjustment should be added or subtracted.
1618 (vect_update_init_of_drs): Likewise.
1619 (vect_prepare_for_masked_peels): New function.
1620 (vect_do_peeling): Skip prologue peeling if we're using a mask
1621 instead. Update call to vect_update_inits_of_drs.
1622 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1624 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1625 alignment. Do not include the number of peeled iterations in
1626 the minimum threshold in that case.
1627 (vectorizable_induction): Adjust the start value down by
1628 LOOP_VINFO_MASK_SKIP_NITERS iterations.
1629 (vect_transform_loop): Call vect_prepare_for_masked_peels.
1630 Take the number of skipped iterations into account when calculating
1632 * tree-vect-stmts.c (vect_gen_while_not): New function.
1634 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1635 Alan Hayward <alan.hayward@arm.com>
1636 David Sherwood <david.sherwood@arm.com>
1638 * doc/sourcebuild.texi (vect_fully_masked): Document.
1639 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1641 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1643 (vect_analyze_loop_2): ...here. Don't check the vectorization
1644 factor against the number of loop iterations if the loop is
1647 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1648 Alan Hayward <alan.hayward@arm.com>
1649 David Sherwood <david.sherwood@arm.com>
1651 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1652 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1653 (dump_groups): Update accordingly.
1654 (iv_use::mem_type): New member variable.
1655 (address_p): New function.
1656 (record_use): Add a mem_type argument and initialize the new
1658 (record_group_use): Add a mem_type argument. Use address_p.
1659 Remove obsolete null checks of base_object. Update call to record_use.
1660 (find_interesting_uses_op): Update call to record_group_use.
1661 (find_interesting_uses_cond): Likewise.
1662 (find_interesting_uses_address): Likewise.
1663 (get_mem_type_for_internal_fn): New function.
1664 (find_address_like_use): Likewise.
1665 (find_interesting_uses_stmt): Try find_address_like_use before
1666 calling find_interesting_uses_op.
1667 (addr_offset_valid_p): Use the iv mem_type field as the type
1668 of the addressed memory.
1669 (add_autoinc_candidates): Likewise.
1670 (get_address_cost): Likewise.
1671 (split_small_address_groups_p): Use address_p.
1672 (split_address_groups): Likewise.
1673 (add_iv_candidate_for_use): Likewise.
1674 (autoinc_possible_for_pair): Likewise.
1675 (rewrite_groups): Likewise.
1676 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1677 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1678 (get_alias_ptr_type_for_ptr_address): New function.
1679 (rewrite_use_address): Rewrite address uses in calls that were
1680 identified by find_address_like_use.
1682 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1683 Alan Hayward <alan.hayward@arm.com>
1684 David Sherwood <david.sherwood@arm.com>
1686 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1688 * gimple-expr.h (is_gimple_addressable: Likewise.
1689 * gimple-expr.c (is_gimple_address): Likewise.
1690 * internal-fn.c (expand_call_mem_ref): New function.
1691 (expand_mask_load_optab_fn): Use it.
1692 (expand_mask_store_optab_fn): Likewise.
1694 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1695 Alan Hayward <alan.hayward@arm.com>
1696 David Sherwood <david.sherwood@arm.com>
1698 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1699 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1700 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1701 (cond_umax@var{mode}): Document.
1702 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1703 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1704 (cond_umin_optab, cond_umax_optab): New optabs.
1705 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1706 (COND_IOR, COND_XOR): New internal functions.
1707 * internal-fn.h (get_conditional_internal_fn): Declare.
1708 * internal-fn.c (cond_binary_direct): New macro.
1709 (expand_cond_binary_optab_fn): Likewise.
1710 (direct_cond_binary_optab_supported_p): Likewise.
1711 (get_conditional_internal_fn): New function.
1712 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1713 Cope with reduction statements that are vectorized as calls rather
1715 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1716 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1717 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1718 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1719 (UNSPEC_COND_EOR): New unspecs.
1720 (optab): Add mappings for them.
1721 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1722 (sve_int_op, sve_fp_op): New int attributes.
1724 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1725 Alan Hayward <alan.hayward@arm.com>
1726 David Sherwood <david.sherwood@arm.com>
1728 * optabs.def (while_ult_optab): New optab.
1729 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1730 * internal-fn.def (WHILE_ULT): New internal function.
1731 * internal-fn.h (direct_internal_fn_supported_p): New override
1732 that takes two types as argument.
1733 * internal-fn.c (while_direct): New macro.
1734 (expand_while_optab_fn): New function.
1735 (convert_optab_supported_p): Likewise.
1736 (direct_while_optab_supported_p): New macro.
1737 * wide-int.h (wi::udiv_ceil): New function.
1738 * tree-vectorizer.h (rgroup_masks): New structure.
1739 (vec_loop_masks): New typedef.
1740 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1742 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1743 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1744 (vect_max_vf): New function.
1745 (slpeel_make_loop_iterate_ntimes): Delete.
1746 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1747 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1748 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1749 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1750 internal-fn.h, stor-layout.h and optabs-query.h.
1751 (vect_set_loop_mask): New function.
1752 (add_preheader_seq): Likewise.
1753 (add_header_seq): Likewise.
1754 (interleave_supported_p): Likewise.
1755 (vect_maybe_permute_loop_masks): Likewise.
1756 (vect_set_loop_masks_directly): Likewise.
1757 (vect_set_loop_condition_masked): Likewise.
1758 (vect_set_loop_condition_unmasked): New function, split out from
1759 slpeel_make_loop_iterate_ntimes.
1760 (slpeel_make_loop_iterate_ntimes): Rename to..
1761 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1762 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1763 (vect_do_peeling): Update call accordingly.
1764 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1766 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1767 mask_compare_type, can_fully_mask_p and fully_masked_p.
1768 (release_vec_loop_masks): New function.
1769 (_loop_vec_info): Use it to free the loop masks.
1770 (can_produce_all_loop_masks_p): New function.
1771 (vect_get_max_nscalars_per_iter): Likewise.
1772 (vect_verify_full_masking): Likewise.
1773 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1774 retries, and free the mask rgroups before retrying. Check loop-wide
1775 reasons for disallowing fully-masked loops. Make the final decision
1776 about whether use a fully-masked loop or not.
1777 (vect_estimate_min_profitable_iters): Do not assume that peeling
1778 for the number of iterations will be needed for fully-masked loops.
1779 (vectorizable_reduction): Disable fully-masked loops.
1780 (vectorizable_live_operation): Likewise.
1781 (vect_halve_mask_nunits): New function.
1782 (vect_double_mask_nunits): Likewise.
1783 (vect_record_loop_mask): Likewise.
1784 (vect_get_loop_mask): Likewise.
1785 (vect_transform_loop): Handle the case in which the final loop
1786 iteration might handle a partial vector. Call vect_set_loop_condition
1787 instead of slpeel_make_loop_iterate_ntimes.
1788 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1789 (check_load_store_masking): New function.
1790 (prepare_load_store_mask): Likewise.
1791 (vectorizable_store): Handle fully-masked loops.
1792 (vectorizable_load): Likewise.
1793 (supportable_widening_operation): Use vect_halve_mask_nunits for
1795 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1796 (vect_gen_while): New function.
1797 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1798 (aarch64_uqdec<mode>): New insn.
1800 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1801 Alan Hayward <alan.hayward@arm.com>
1802 David Sherwood <david.sherwood@arm.com>
1804 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1805 (reduc_xor_scal_optab): New optabs.
1806 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1807 (reduc_xor_scal_@var{m}): Document.
1808 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1809 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1811 * fold-const-call.c (fold_const_call): Handle them.
1812 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1813 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1814 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1815 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1816 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1817 (UNSPEC_XORV): New unspecs.
1818 (optab): Add entries for them.
1819 (BITWISEV): New int iterator.
1820 (bit_reduc_op): New int attributes.
1822 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1823 Alan Hayward <alan.hayward@arm.com>
1824 David Sherwood <david.sherwood@arm.com>
1826 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1827 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1828 * optabs.def (vec_shl_insert_optab): New optab.
1829 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1830 (duplicate_and_interleave): Likewise.
1831 * tree-vect-loop.c: Include internal-fn.h.
1832 (neutral_op_for_slp_reduction): New function, split out from
1833 get_initial_defs_for_reduction.
1834 (get_initial_def_for_reduction): Handle option 2 for variable-length
1835 vectors by loading the neutral value into a vector and then shifting
1836 the initial value into element 0.
1837 (get_initial_defs_for_reduction): Replace the code argument with
1838 the neutral value calculated by neutral_op_for_slp_reduction.
1839 Use gimple_build_vector for constant-length vectors.
1840 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1841 but the first group_size elements have a neutral value.
1842 Use duplicate_and_interleave otherwise.
1843 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1844 Update call to get_initial_defs_for_reduction. Handle SLP
1845 reductions for variable-length vectors by creating one vector
1846 result for each scalar result, with the elements associated
1847 with other scalar results stubbed out with the neutral value.
1848 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1849 Require IFN_VEC_SHL_INSERT for double reductions on
1850 variable-length vectors, or SLP reductions that have
1851 a neutral value. Require can_duplicate_and_interleave_p
1852 support for variable-length unchained SLP reductions if there
1853 is no neutral value, such as for MIN/MAX reductions. Also require
1854 the number of vector elements to be a multiple of the number of
1855 SLP statements when doing variable-length unchained SLP reductions.
1856 Update call to vect_create_epilog_for_reduction.
1857 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1858 and remove initial values.
1859 (duplicate_and_interleave): Make public.
1860 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1861 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1863 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1864 Alan Hayward <alan.hayward@arm.com>
1865 David Sherwood <david.sherwood@arm.com>
1867 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1868 (can_duplicate_and_interleave_p): New function.
1869 (vect_get_and_check_slp_defs): Take the vector of statements
1870 rather than just the current one. Remove excess parentheses.
1871 Restriction rejectinon of vect_constant_def and vect_external_def
1872 for variable-length vectors to boolean types, or types for which
1873 can_duplicate_and_interleave_p is false.
1874 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1875 (duplicate_and_interleave): New function.
1876 (vect_get_constant_vectors): Use gimple_build_vector for
1877 constant-length vectors and suitable variable-length constant
1878 vectors. Use duplicate_and_interleave for other variable-length
1879 vectors. Don't defer the update when inserting new statements.
1881 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1882 Alan Hayward <alan.hayward@arm.com>
1883 David Sherwood <david.sherwood@arm.com>
1885 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1886 min_profitable_iters doesn't go negative.
1888 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1889 Alan Hayward <alan.hayward@arm.com>
1890 David Sherwood <david.sherwood@arm.com>
1892 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1893 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1894 * optabs.def (vec_mask_load_lanes_optab): New optab.
1895 (vec_mask_store_lanes_optab): Likewise.
1896 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1897 (MASK_STORE_LANES): Likewise.
1898 * internal-fn.c (mask_load_lanes_direct): New macro.
1899 (mask_store_lanes_direct): Likewise.
1900 (expand_mask_load_optab_fn): Handle masked operations.
1901 (expand_mask_load_lanes_optab_fn): New macro.
1902 (expand_mask_store_optab_fn): Handle masked operations.
1903 (expand_mask_store_lanes_optab_fn): New macro.
1904 (direct_mask_load_lanes_optab_supported_p): Likewise.
1905 (direct_mask_store_lanes_optab_supported_p): Likewise.
1906 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1908 (vect_load_lanes_supported): Likewise.
1909 * tree-vect-data-refs.c (strip_conversion): New function.
1910 (can_group_stmts_p): Likewise.
1911 (vect_analyze_data_ref_accesses): Use it instead of checking
1912 for a pair of assignments.
1913 (vect_store_lanes_supported): Take a masked_p parameter.
1914 (vect_load_lanes_supported): Likewise.
1915 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1916 vect_store_lanes_supported and vect_load_lanes_supported.
1917 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1918 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1919 parameter. Don't allow gaps for masked accesses.
1920 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1921 and vect_load_lanes_supported.
1922 (get_load_store_type): Take a masked_p parameter and update
1923 call to get_group_load_store_type.
1924 (vectorizable_store): Update call to get_load_store_type.
1925 Handle IFN_MASK_STORE_LANES.
1926 (vectorizable_load): Update call to get_load_store_type.
1927 Handle IFN_MASK_LOAD_LANES.
1929 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1930 Alan Hayward <alan.hayward@arm.com>
1931 David Sherwood <david.sherwood@arm.com>
1933 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1935 * config/aarch64/aarch64-protos.h
1936 (aarch64_sve_struct_memory_operand_p): Declare.
1937 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1938 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1939 (VPRED, vpred): Handle SVE structure modes.
1940 * config/aarch64/constraints.md (Utx): New constraint.
1941 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1942 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1943 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1944 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1945 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1946 structure modes. Split into pieces after RA.
1947 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1948 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1950 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1951 SVE structure modes.
1952 (aarch64_classify_address): Likewise.
1953 (sizetochar): Move earlier in file.
1954 (aarch64_print_operand): Handle SVE register lists.
1955 (aarch64_array_mode): New function.
1956 (aarch64_sve_struct_memory_operand_p): Likewise.
1957 (TARGET_ARRAY_MODE): Redefine.
1959 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1960 Alan Hayward <alan.hayward@arm.com>
1961 David Sherwood <david.sherwood@arm.com>
1963 * target.def (array_mode): New target hook.
1964 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1965 * doc/tm.texi: Regenerate.
1966 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1967 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1968 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1970 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1973 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1974 Alan Hayward <alan.hayward@arm.com>
1975 David Sherwood <david.sherwood@arm.com>
1977 * fold-const.c (fold_binary_loc): Check the argument types
1978 rather than the result type when testing for a vector operation.
1980 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1982 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1983 * doc/tm.texi: Regenerate.
1985 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1986 Alan Hayward <alan.hayward@arm.com>
1987 David Sherwood <david.sherwood@arm.com>
1989 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1990 (sve): Document new AArch64 extension.
1991 * doc/md.texi (w): Extend the description of the AArch64
1992 constraint to include SVE vectors.
1993 (Upl, Upa): Document new AArch64 predicate constraints.
1994 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1996 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1997 (msve-vector-bits=): New option.
1998 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1999 SVE when these are disabled.
2000 (sve): New extension.
2001 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
2002 modes. Adjust their number of units based on aarch64_sve_vg.
2003 (MAX_BITSIZE_MODE_ANY_MODE): Define.
2004 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
2005 aarch64_addr_query_type.
2006 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
2007 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
2008 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
2009 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
2010 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
2011 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
2012 (aarch64_simd_imm_zero_p): Delete.
2013 (aarch64_check_zero_based_sve_index_immediate): Declare.
2014 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2015 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2016 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2017 (aarch64_sve_float_mul_immediate_p): Likewise.
2018 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2020 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
2021 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
2022 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
2023 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
2024 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
2025 (aarch64_regmode_natural_size): Likewise.
2026 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
2027 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
2029 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
2030 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
2031 for VG and the SVE predicate registers.
2032 (V_ALIASES): Add a "z"-prefixed alias.
2033 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
2034 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
2035 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
2036 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
2037 (REG_CLASS_NAMES): Add entries for them.
2038 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
2039 and the predicate registers.
2040 (aarch64_sve_vg): Declare.
2041 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
2042 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
2043 (REGMODE_NATURAL_SIZE): Define.
2044 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
2046 * config/aarch64/aarch64.c: Include cfgrtl.h.
2047 (simd_immediate_info): Add a constructor for series vectors,
2048 and an associated step field.
2049 (aarch64_sve_vg): New variable.
2050 (aarch64_dbx_register_number): Handle VG and the predicate registers.
2051 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
2052 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
2053 (VEC_ANY_DATA, VEC_STRUCT): New constants.
2054 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
2055 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
2056 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
2057 (aarch64_get_mask_mode): New functions.
2058 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
2059 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
2060 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
2061 predicate modes and predicate registers. Explicitly restrict
2062 GPRs to modes of 16 bytes or smaller. Only allow FP registers
2063 to store a vector mode if it is recognized by
2064 aarch64_classify_vector_mode.
2065 (aarch64_regmode_natural_size): New function.
2066 (aarch64_hard_regno_caller_save_mode): Return the original mode
2068 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
2069 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
2070 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
2071 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
2073 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
2074 does not overlap dest if the function is frame-related. Handle
2076 (aarch64_split_add_offset): New function.
2077 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
2078 them aarch64_add_offset.
2079 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
2080 and update call to aarch64_sub_sp.
2081 (aarch64_add_cfa_expression): New function.
2082 (aarch64_expand_prologue): Pass extra temporary registers to the
2083 functions above. Handle the case in which we need to emit new
2084 DW_CFA_expressions for registers that were originally saved
2085 relative to the stack pointer, but now have to be expressed
2086 relative to the frame pointer.
2087 (aarch64_output_mi_thunk): Pass extra temporary registers to the
2089 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
2090 IP0 and IP1 values for SVE frames.
2091 (aarch64_expand_vec_series): New function.
2092 (aarch64_expand_sve_widened_duplicate): Likewise.
2093 (aarch64_expand_sve_const_vector): Likewise.
2094 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
2095 Handle SVE constants. Use emit_move_insn to move a force_const_mem
2096 into the register, rather than emitting a SET directly.
2097 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
2098 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
2099 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
2100 (offset_9bit_signed_scaled_p): New functions.
2101 (aarch64_replicate_bitmask_imm): New function.
2102 (aarch64_bitmask_imm): Use it.
2103 (aarch64_cannot_force_const_mem): Reject expressions involving
2104 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
2105 (aarch64_classify_index): Handle SVE indices, by requiring
2106 a plain register index with a scale that matches the element size.
2107 (aarch64_classify_address): Handle SVE addresses. Assert that
2108 the mode of the address is VOIDmode or an integer mode.
2109 Update call to aarch64_classify_symbol.
2110 (aarch64_classify_symbolic_expression): Update call to
2111 aarch64_classify_symbol.
2112 (aarch64_const_vec_all_in_range_p): New function.
2113 (aarch64_print_vector_float_operand): Likewise.
2114 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
2115 "vN" for FP registers with SVE modes. Handle (const ...) vectors
2116 and the FP immediates 1.0 and 0.5.
2117 (aarch64_print_address_internal): Handle SVE addresses.
2118 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
2119 (aarch64_regno_regclass): Handle predicate registers.
2120 (aarch64_secondary_reload): Handle big-endian reloads of SVE
2122 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
2123 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
2124 (aarch64_convert_sve_vector_bits): New function.
2125 (aarch64_override_options): Use it to handle -msve-vector-bits=.
2126 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
2128 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
2129 Handle SVE vector and predicate modes. Accept VL-based constants
2130 that need only one temporary register, and VL offsets that require
2131 no temporary registers.
2132 (aarch64_conditional_register_usage): Mark the predicate registers
2133 as fixed if SVE isn't available.
2134 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
2135 Return true for SVE vector and predicate modes.
2136 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
2137 rather than an unsigned int. Handle SVE modes.
2138 (aarch64_preferred_simd_mode): Update call accordingly. Handle
2140 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
2142 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
2143 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
2144 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
2145 (aarch64_sve_float_mul_immediate_p): New functions.
2146 (aarch64_sve_valid_immediate): New function.
2147 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
2148 Explicitly reject structure modes. Check for INDEX constants.
2149 Handle PTRUE and PFALSE constants.
2150 (aarch64_check_zero_based_sve_index_immediate): New function.
2151 (aarch64_simd_imm_zero_p): Delete.
2152 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
2153 vector modes. Accept constants in the range of CNT[BHWD].
2154 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
2155 ask for an Advanced SIMD mode.
2156 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
2157 (aarch64_simd_vector_alignment): Handle SVE predicates.
2158 (aarch64_vectorize_preferred_vector_alignment): New function.
2159 (aarch64_simd_vector_alignment_reachable): Use it instead of
2161 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
2162 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
2164 (MAX_VECT_LEN): Delete.
2165 (expand_vec_perm_d): Add a vec_flags field.
2166 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
2167 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
2168 (aarch64_evpc_ext): Don't apply a big-endian lane correction
2170 (aarch64_evpc_rev): Rename to...
2171 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
2172 (aarch64_evpc_rev_global): New function.
2173 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
2174 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
2176 (aarch64_evpc_sve_tbl): New function.
2177 (aarch64_expand_vec_perm_const_1): Update after rename of
2178 aarch64_evpc_rev. Handle SVE permutes too, trying
2179 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
2180 than aarch64_evpc_tbl.
2181 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
2182 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
2183 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
2184 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
2185 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
2186 (aarch64_expand_sve_vcond): New functions.
2187 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
2188 of aarch64_vector_mode_p.
2189 (aarch64_dwarf_poly_indeterminate_value): New function.
2190 (aarch64_compute_pressure_classes): Likewise.
2191 (aarch64_can_change_mode_class): Likewise.
2192 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
2193 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
2194 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
2195 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
2196 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
2197 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
2198 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
2199 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
2201 (Dn, Dl, Dr): Accept const as well as const_vector.
2202 (Dz): Likewise. Compare against CONST0_RTX.
2203 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
2204 of "vector" where appropriate.
2205 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
2206 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
2207 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
2208 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
2209 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
2210 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
2211 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
2212 (v_int_equiv): Extend to SVE modes.
2213 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
2215 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
2216 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
2217 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
2218 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
2219 (SVE_COND_FP_CMP): New int iterators.
2220 (perm_hilo): Handle the new unpack unspecs.
2221 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
2223 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
2224 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
2225 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
2226 (aarch64_equality_operator, aarch64_constant_vector_operand)
2227 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
2228 (aarch64_sve_nonimmediate_operand): Likewise.
2229 (aarch64_sve_general_operand): Likewise.
2230 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
2231 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
2232 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
2233 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
2234 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
2235 (aarch64_sve_float_arith_immediate): Likewise.
2236 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
2237 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
2238 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
2239 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
2240 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
2241 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
2242 (aarch64_sve_float_arith_operand): Likewise.
2243 (aarch64_sve_float_arith_with_sub_operand): Likewise.
2244 (aarch64_sve_float_mul_operand): Likewise.
2245 (aarch64_sve_vec_perm_operand): Likewise.
2246 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
2247 (aarch64_mov_operand): Accept const_poly_int and const_vector.
2248 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
2249 as well as const_vector.
2250 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
2251 in file. Use CONST0_RTX and CONSTM1_RTX.
2252 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
2253 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
2254 Use aarch64_simd_imm_zero.
2255 * config/aarch64/aarch64-sve.md: New file.
2256 * config/aarch64/aarch64.md: Include it.
2257 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
2258 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
2259 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
2260 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
2261 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
2262 (sve): New attribute.
2263 (enabled): Disable instructions with the sve attribute unless
2265 (movqi, movhi): Pass CONST_POLY_INT operaneds through
2266 aarch64_expand_mov_immediate.
2267 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
2268 CNT[BHSD] immediates.
2269 (movti): Split CONST_POLY_INT moves into two halves.
2270 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
2271 Split additions that need a temporary here if the destination
2272 is the stack pointer.
2273 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
2274 (*add<mode>3_poly_1): New instruction.
2275 (set_clobber_cc): New expander.
2277 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
2279 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
2280 parameter and use it instead of GET_MODE_SIZE (innermode). Use
2281 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
2282 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
2283 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
2284 Change innermode from fixed_mode_size to machine_mode.
2285 (simplify_subreg): Update call accordingly. Handle a constant-sized
2286 subreg of a variable-length CONST_VECTOR.
2288 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
2289 Alan Hayward <alan.hayward@arm.com>
2290 David Sherwood <david.sherwood@arm.com>
2292 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
2293 (add_offset_to_base): New function, split out from...
2294 (create_mem_ref): ...here. When handling a scale other than 1,
2295 check first whether the address is valid without the offset.
2296 Add it into the base if so, leaving the index and scale as-is.
2298 2018-01-12 Jakub Jelinek <jakub@redhat.com>
2301 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
2302 fold_for_warn before checking if arg2 is INTEGER_CST.
2304 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
2306 * config/rs6000/predicates.md (load_multiple_operation): Delete.
2307 (store_multiple_operation): Delete.
2308 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
2309 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
2310 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
2311 guarded by TARGET_STRING.
2312 (rs6000_output_load_multiple): Delete.
2313 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
2314 OPTION_MASK_STRING / TARGET_STRING handling.
2315 (print_operand) <'N', 'O'>: Add comment that these are unused now.
2316 (const rs6000_opt_masks) <"string">: Change mask to 0.
2317 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
2318 (MASK_STRING): Delete.
2319 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
2321 (load_multiple): Delete.
2328 (store_multiple): Delete.
2335 (movmemsi_8reg): Delete.
2336 (corresponding unnamed define_insn): Delete.
2337 (movmemsi_6reg): Delete.
2338 (corresponding unnamed define_insn): Delete.
2339 (movmemsi_4reg): Delete.
2340 (corresponding unnamed define_insn): Delete.
2341 (movmemsi_2reg): Delete.
2342 (corresponding unnamed define_insn): Delete.
2343 (movmemsi_1reg): Delete.
2344 (corresponding unnamed define_insn): Delete.
2345 * config/rs6000/rs6000.opt (mno-string): New.
2346 (mstring): Replace by deprecation warning stub.
2347 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
2349 2018-01-12 Jakub Jelinek <jakub@redhat.com>
2351 * regrename.c (regrename_do_replace): If replacing the same
2352 reg multiple times, try to reuse last created gen_raw_REG.
2355 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
2356 main to workaround a bug in GDB.
2358 2018-01-12 Tom de Vries <tom@codesourcery.com>
2361 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
2363 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
2365 PR rtl-optimization/80481
2366 * ira-color.c (get_cap_member): New function.
2367 (allocnos_conflict_by_live_ranges_p): Use it.
2368 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
2369 (setup_slot_coalesced_allocno_live_ranges): Ditto.
2371 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
2374 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
2375 (*saddl_se_1): Ditto.
2377 (*ssubl_se_1): Ditto.
2379 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
2381 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
2382 rather than wi::to_widest for DR_INITs.
2383 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
2384 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
2385 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
2387 (vect_analyze_group_access_1): Note that here.
2389 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
2391 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
2392 polynomial type sizes.
2394 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
2396 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
2397 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
2398 (gimple_add_tmp_var): Likewise.
2400 2018-01-12 Martin Liska <mliska@suse.cz>
2402 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
2403 (gimple_alloc_sizes): Likewise.
2404 (dump_gimple_statistics): Use PRIu64 in printf format.
2405 * gimple.h: Change uint64_t to int.
2407 2018-01-12 Martin Liska <mliska@suse.cz>
2409 * tree-core.h: Use uint64_t instead of int.
2410 * tree.c (tree_node_counts): Likewise.
2411 (tree_node_sizes): Likewise.
2412 (dump_tree_statistics): Use PRIu64 in printf format.
2414 2018-01-12 Martin Liska <mliska@suse.cz>
2416 * Makefile.in: As qsort_chk is implemented in vec.c, add
2417 vec.o to linkage of gencfn-macros.
2418 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
2419 passing the info to record_node_allocation_statistics.
2420 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
2422 * ggc-common.c (struct ggc_usage): Add operator== and use
2423 it in operator< and compare function.
2424 * mem-stats.h (struct mem_usage): Likewise.
2425 * vec.c (struct vec_usage): Remove operator< and compare
2426 function. Can be simply inherited.
2428 2018-01-12 Martin Jambor <mjambor@suse.cz>
2431 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
2432 * tree-ssa-math-opts.c: Include domwalk.h.
2433 (convert_mult_to_fma_1): New function.
2434 (fma_transformation_info): New type.
2435 (fma_deferring_state): Likewise.
2436 (cancel_fma_deferring): New function.
2437 (result_of_phi): Likewise.
2438 (last_fma_candidate_feeds_initial_phi): Likewise.
2439 (convert_mult_to_fma): Added deferring logic, split actual
2440 transformation to convert_mult_to_fma_1.
2441 (math_opts_dom_walker): New type.
2442 (math_opts_dom_walker::after_dom_children): New method, body moved
2443 here from pass_optimize_widening_mul::execute, added deferring logic
2445 (pass_optimize_widening_mul::execute): Moved most of code to
2446 math_opts_dom_walker::after_dom_children.
2447 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
2448 * config/i386/i386.c (ix86_option_override_internal): Added
2449 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
2451 2018-01-12 Richard Biener <rguenther@suse.de>
2454 * dwarf2out.c (gen_variable_die): Do not reset old_die for
2455 inline instance vars.
2457 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
2460 * config/rx/rx.c (rx_is_restricted_memory_address):
2463 2018-01-12 Richard Biener <rguenther@suse.de>
2465 PR tree-optimization/80846
2466 * target.def (split_reduction): New target hook.
2467 * targhooks.c (default_split_reduction): New function.
2468 * targhooks.h (default_split_reduction): Declare.
2469 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
2470 target requests first reduce vectors by combining low and high
2472 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
2473 (get_vectype_for_scalar_type_and_size): Export.
2474 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
2475 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
2476 * doc/tm.texi: Regenerate.
2477 * config/i386/i386.c (ix86_split_reduction): Implement
2478 TARGET_VECTORIZE_SPLIT_REDUCTION.
2480 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
2483 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
2484 in PIC mode except for TARGET_VXWORKS_RTP.
2485 * config/sparc/sparc.c: Include cfgrtl.h.
2486 (TARGET_INIT_PIC_REG): Define.
2487 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
2488 (sparc_pic_register_p): New predicate.
2489 (sparc_legitimate_address_p): Use it.
2490 (sparc_legitimize_pic_address): Likewise.
2491 (sparc_delegitimize_address): Likewise.
2492 (sparc_mode_dependent_address_p): Likewise.
2493 (gen_load_pcrel_sym): Remove 4th parameter.
2494 (load_got_register): Adjust call to above. Remove obsolete stuff.
2495 (sparc_expand_prologue): Do not call load_got_register here.
2496 (sparc_flat_expand_prologue): Likewise.
2497 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
2498 (sparc_use_pseudo_pic_reg): New function.
2499 (sparc_init_pic_reg): Likewise.
2500 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
2501 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
2503 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
2505 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
2506 Add item for branch_cost.
2508 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
2510 PR rtl-optimization/83565
2511 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
2512 not extend the result to a larger mode for rotate operations.
2513 (num_sign_bit_copies1): Likewise.
2515 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2518 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
2520 Use values-Xc.o for -pedantic.
2521 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
2523 2018-01-12 Martin Liska <mliska@suse.cz>
2526 * ipa-devirt.c (final_warning_record::grow_type_warnings):
2528 (possible_polymorphic_call_targets): Use it.
2529 (ipa_devirt): Likewise.
2531 2018-01-12 Martin Liska <mliska@suse.cz>
2533 * profile-count.h (enum profile_quality): Use 0 as invalid
2534 enum value of profile_quality.
2536 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
2538 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
2539 -mext-string options.
2541 2018-01-12 Richard Biener <rguenther@suse.de>
2543 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2544 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2545 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2547 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2549 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
2551 * configure.ac (--with-long-double-format): Add support for the
2552 configuration option to change the default long double format on
2554 * config.gcc (powerpc*-linux*-*): Likewise.
2555 * configure: Regenerate.
2556 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2557 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2558 used without modification.
2560 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2562 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2563 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2564 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2565 MISC_BUILTIN_SPEC_BARRIER.
2566 (rs6000_init_builtins): Likewise.
2567 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2569 (speculation_barrier): New define_insn.
2570 * doc/extend.texi: Document __builtin_speculation_barrier.
2572 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2575 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2576 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2577 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2579 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
2580 integral modes instead of "ss" and "sd".
2581 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2582 vectors with 32-bit and 64-bit elements.
2583 (vecdupssescalarmodesuffix): New mode attribute.
2584 (vec_dup<mode>): Use it.
2586 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
2589 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2590 frame if argument is passed on stack.
2592 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2595 * ree.c (combine_reaching_defs): Optimize also
2596 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2597 reg2=any_extend(exp); reg1=reg2;, formatting fix.
2599 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2602 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2604 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2607 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2608 after they are computed.
2610 2018-01-11 Bin Cheng <bin.cheng@arm.com>
2612 PR tree-optimization/83695
2613 * gimple-loop-linterchange.cc
2614 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2615 reset cached scev information after interchange.
2616 (pass_linterchange::execute): Remove call to scev_reset_htab.
2618 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2620 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2621 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2622 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2623 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2624 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2625 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2626 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2627 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2628 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2629 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2630 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2631 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2632 (V_lane_reg): Likewise.
2633 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2635 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2636 (vfmal_lane_low<mode>_intrinsic,
2637 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2638 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2639 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2640 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2641 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2642 vfmsl_lane_high<mode>_intrinsic): New define_insns.
2644 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2646 * config/arm/arm-cpus.in (fp16fml): New feature.
2647 (ALL_SIMD): Add fp16fml.
2648 (armv8.2-a): Add fp16fml as an option.
2649 (armv8.3-a): Likewise.
2650 (armv8.4-a): Add fp16fml as part of fp16.
2651 * config/arm/arm.h (TARGET_FP16FML): Define.
2652 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2654 * config/arm/arm-modes.def (V2HF): Define.
2655 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2656 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2657 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2658 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2659 vfmsl_low, vfmsl_high): New set of builtins.
2660 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2661 (vfml_op): New code attribute.
2662 (VFMLHALVES): New int iterator.
2663 (VFML, VFMLSEL): New mode attributes.
2664 (V_reg): Define mapping for V2HF.
2665 (V_hi, V_lo): New mode attributes.
2666 (VF_constraint): Likewise.
2667 (vfml_half, vfml_half_selector): New int attributes.
2668 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2670 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2671 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2673 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2674 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2675 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2676 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2678 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2679 Document new effective target and option set.
2681 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2683 * config/arm/arm-cpus.in (armv8_4): New feature.
2684 (ARMv8_4a): New fgroup.
2685 (armv8.4-a): New arch.
2686 * config/arm/arm-tables.opt: Regenerate.
2687 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2688 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2689 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2690 Add matching rules for -march=armv8.4-a and extensions.
2691 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2693 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2696 * config/rx/rx.md (BW): New mode attribute.
2697 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2699 2018-01-11 Richard Biener <rguenther@suse.de>
2701 PR tree-optimization/83435
2702 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2703 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2704 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2706 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2707 Alan Hayward <alan.hayward@arm.com>
2708 David Sherwood <david.sherwood@arm.com>
2710 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2712 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2713 (aarch64_print_address_internal): Use it to check for a zero offset.
2715 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2716 Alan Hayward <alan.hayward@arm.com>
2717 David Sherwood <david.sherwood@arm.com>
2719 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2720 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2721 Return a poly_int64 rather than a HOST_WIDE_INT.
2722 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2723 rather than a HOST_WIDE_INT.
2724 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2725 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2726 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2727 final_offset from HOST_WIDE_INT to poly_int64.
2728 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2729 to_constant when getting the number of units in an Advanced SIMD
2731 (aarch64_builtin_vectorized_function): Check for a constant number
2733 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2735 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2736 attribute instead of GET_MODE_NUNITS.
2737 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2738 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2739 GET_MODE_SIZE for fixed-size registers.
2740 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2741 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2742 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2743 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2744 (aarch64_print_operand, aarch64_print_address_internal)
2745 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2746 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2747 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2748 Handle polynomial GET_MODE_SIZE.
2749 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2750 wider than SImode without modification.
2751 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2752 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2753 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2754 passing and returning SVE modes.
2755 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2756 rather than GEN_INT.
2757 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2758 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2759 (aarch64_allocate_and_probe_stack_space): Likewise.
2760 (aarch64_layout_frame): Cope with polynomial offsets.
2761 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2762 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2764 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2765 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2766 poly_int64 rather than a HOST_WIDE_INT.
2767 (aarch64_get_separate_components, aarch64_process_components)
2768 (aarch64_expand_prologue, aarch64_expand_epilogue)
2769 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2770 (aarch64_anchor_offset): New function, split out from...
2771 (aarch64_legitimize_address): ...here.
2772 (aarch64_builtin_vectorization_cost): Handle polynomial
2773 TYPE_VECTOR_SUBPARTS.
2774 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2776 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2777 number of elements from the PARALLEL rather than the mode.
2778 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2779 rather than GET_MODE_BITSIZE.
2780 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2781 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2782 (aarch64_expand_vec_perm_const_1): Handle polynomial
2783 d->perm.length () and d->perm elements.
2784 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2785 Apply to_constant to d->perm elements.
2786 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2787 polynomial CONST_VECTOR_NUNITS.
2788 (aarch64_move_pointer): Take amount as a poly_int64 rather
2790 (aarch64_progress_pointer): Avoid temporary variable.
2791 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2792 the mode attribute instead of GET_MODE.
2794 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2795 Alan Hayward <alan.hayward@arm.com>
2796 David Sherwood <david.sherwood@arm.com>
2798 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2799 x exists before using it.
2800 (aarch64_add_constant_internal): Rename to...
2801 (aarch64_add_offset_1): ...this. Replace regnum with separate
2802 src and dest rtxes. Handle the case in which they're different,
2803 including when the offset is zero. Replace scratchreg with an rtx.
2804 Use 2 additions if there is no spare register into which we can
2805 move a 16-bit constant.
2806 (aarch64_add_constant): Delete.
2807 (aarch64_add_offset): Replace reg with separate src and dest
2808 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2809 Use aarch64_add_offset_1.
2810 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2811 an rtx rather than an int. Take the delta as a poly_int64
2812 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2813 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2814 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2815 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2816 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2818 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2819 aarch64_add_constant.
2821 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2823 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2824 Use scalar_float_mode.
2826 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2828 * config/aarch64/aarch64-simd.md
2829 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2830 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2831 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2832 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2833 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2834 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2835 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2836 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2837 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2838 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2840 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2843 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2844 targ_options->x_arm_arch_string is non NULL.
2846 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2848 * config/aarch64/aarch64.h
2849 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2851 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2854 * expmed.c (emit_store_flag_force): Swap if const op0
2855 and change VOIDmode to mode of op0.
2857 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2859 PR rtl-optimization/83761
2860 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2861 than bytes to mode_for_size.
2863 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2866 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2867 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2870 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2873 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2874 when in layout mode.
2875 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2876 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2879 2018-01-10 Michael Collison <michael.collison@arm.com>
2881 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2882 * config/aarch64/aarch64-option-extension.def: Add
2883 AARCH64_OPT_EXTENSION of 'fp16fml'.
2884 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2885 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2886 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2887 * config/aarch64/constraints.md (Ui7): New constraint.
2888 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2889 (VFMLA_SEL_W): Ditto.
2892 (VFMLA16_LOW): New int iterator.
2893 (VFMLA16_HIGH): Ditto.
2894 (UNSPEC_FMLAL): New unspec.
2895 (UNSPEC_FMLSL): Ditto.
2896 (UNSPEC_FMLAL2): Ditto.
2897 (UNSPEC_FMLSL2): Ditto.
2898 (f16mac): New code attribute.
2899 * config/aarch64/aarch64-simd-builtins.def
2900 (aarch64_fmlal_lowv2sf): Ditto.
2901 (aarch64_fmlsl_lowv2sf): Ditto.
2902 (aarch64_fmlalq_lowv4sf): Ditto.
2903 (aarch64_fmlslq_lowv4sf): Ditto.
2904 (aarch64_fmlal_highv2sf): Ditto.
2905 (aarch64_fmlsl_highv2sf): Ditto.
2906 (aarch64_fmlalq_highv4sf): Ditto.
2907 (aarch64_fmlslq_highv4sf): Ditto.
2908 (aarch64_fmlal_lane_lowv2sf): Ditto.
2909 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2910 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2911 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2912 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2913 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2914 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2915 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2916 (aarch64_fmlal_lane_highv2sf): Ditto.
2917 (aarch64_fmlsl_lane_highv2sf): Ditto.
2918 (aarch64_fmlal_laneq_highv2sf): Ditto.
2919 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2920 (aarch64_fmlalq_lane_highv4sf): Ditto.
2921 (aarch64_fmlsl_lane_highv4sf): Ditto.
2922 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2923 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2924 * config/aarch64/aarch64-simd.md:
2925 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2926 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2927 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2928 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2929 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2930 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2931 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2932 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2933 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2934 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2935 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2936 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2937 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2938 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2939 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2940 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2941 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2942 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2943 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2944 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2945 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2946 (vfmlsl_low_u32): Ditto.
2947 (vfmlalq_low_u32): Ditto.
2948 (vfmlslq_low_u32): Ditto.
2949 (vfmlal_high_u32): Ditto.
2950 (vfmlsl_high_u32): Ditto.
2951 (vfmlalq_high_u32): Ditto.
2952 (vfmlslq_high_u32): Ditto.
2953 (vfmlal_lane_low_u32): Ditto.
2954 (vfmlsl_lane_low_u32): Ditto.
2955 (vfmlal_laneq_low_u32): Ditto.
2956 (vfmlsl_laneq_low_u32): Ditto.
2957 (vfmlalq_lane_low_u32): Ditto.
2958 (vfmlslq_lane_low_u32): Ditto.
2959 (vfmlalq_laneq_low_u32): Ditto.
2960 (vfmlslq_laneq_low_u32): Ditto.
2961 (vfmlal_lane_high_u32): Ditto.
2962 (vfmlsl_lane_high_u32): Ditto.
2963 (vfmlal_laneq_high_u32): Ditto.
2964 (vfmlsl_laneq_high_u32): Ditto.
2965 (vfmlalq_lane_high_u32): Ditto.
2966 (vfmlslq_lane_high_u32): Ditto.
2967 (vfmlalq_laneq_high_u32): Ditto.
2968 (vfmlslq_laneq_high_u32): Ditto.
2969 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2970 (AARCH64_FL_FOR_ARCH8_4): New.
2971 (AARCH64_ISA_F16FML): New ISA flag.
2972 (TARGET_F16FML): New feature flag for fp16fml.
2973 (doc/invoke.texi): Document new fp16fml option.
2975 2018-01-10 Michael Collison <michael.collison@arm.com>
2977 * config/aarch64/aarch64-builtins.c:
2978 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2979 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2980 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2981 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2982 (AARCH64_ISA_SHA3): New ISA flag.
2983 (TARGET_SHA3): New feature flag for sha3.
2984 * config/aarch64/iterators.md (sha512_op): New int attribute.
2985 (CRYPTO_SHA512): New int iterator.
2986 (UNSPEC_SHA512H): New unspec.
2987 (UNSPEC_SHA512H2): Ditto.
2988 (UNSPEC_SHA512SU0): Ditto.
2989 (UNSPEC_SHA512SU1): Ditto.
2990 * config/aarch64/aarch64-simd-builtins.def
2991 (aarch64_crypto_sha512hqv2di): New builtin.
2992 (aarch64_crypto_sha512h2qv2di): Ditto.
2993 (aarch64_crypto_sha512su0qv2di): Ditto.
2994 (aarch64_crypto_sha512su1qv2di): Ditto.
2995 (aarch64_eor3qv8hi): Ditto.
2996 (aarch64_rax1qv2di): Ditto.
2997 (aarch64_xarqv2di): Ditto.
2998 (aarch64_bcaxqv8hi): Ditto.
2999 * config/aarch64/aarch64-simd.md:
3000 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
3001 (aarch64_crypto_sha512su0qv2di): Ditto.
3002 (aarch64_crypto_sha512su1qv2di): Ditto.
3003 (aarch64_eor3qv8hi): Ditto.
3004 (aarch64_rax1qv2di): Ditto.
3005 (aarch64_xarqv2di): Ditto.
3006 (aarch64_bcaxqv8hi): Ditto.
3007 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
3008 (vsha512h2q_u64): Ditto.
3009 (vsha512su0q_u64): Ditto.
3010 (vsha512su1q_u64): Ditto.
3011 (veor3q_u16): Ditto.
3012 (vrax1q_u64): Ditto.
3014 (vbcaxq_u16): Ditto.
3015 * config/arm/types.md (crypto_sha512): New type attribute.
3016 (crypto_sha3): Ditto.
3017 (doc/invoke.texi): Document new sha3 option.
3019 2018-01-10 Michael Collison <michael.collison@arm.com>
3021 * config/aarch64/aarch64-builtins.c:
3022 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
3023 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3024 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
3025 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
3026 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
3027 (AARCH64_ISA_SM4): New ISA flag.
3028 (TARGET_SM4): New feature flag for sm4.
3029 * config/aarch64/aarch64-simd-builtins.def
3030 (aarch64_sm3ss1qv4si): Ditto.
3031 (aarch64_sm3tt1aq4si): Ditto.
3032 (aarch64_sm3tt1bq4si): Ditto.
3033 (aarch64_sm3tt2aq4si): Ditto.
3034 (aarch64_sm3tt2bq4si): Ditto.
3035 (aarch64_sm3partw1qv4si): Ditto.
3036 (aarch64_sm3partw2qv4si): Ditto.
3037 (aarch64_sm4eqv4si): Ditto.
3038 (aarch64_sm4ekeyqv4si): Ditto.
3039 * config/aarch64/aarch64-simd.md:
3040 (aarch64_sm3ss1qv4si): Ditto.
3041 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
3042 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
3043 (aarch64_sm4eqv4si): Ditto.
3044 (aarch64_sm4ekeyqv4si): Ditto.
3045 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
3046 (sm3part_op): Ditto.
3047 (CRYPTO_SM3TT): Ditto.
3048 (CRYPTO_SM3PART): Ditto.
3049 (UNSPEC_SM3SS1): New unspec.
3050 (UNSPEC_SM3TT1A): Ditto.
3051 (UNSPEC_SM3TT1B): Ditto.
3052 (UNSPEC_SM3TT2A): Ditto.
3053 (UNSPEC_SM3TT2B): Ditto.
3054 (UNSPEC_SM3PARTW1): Ditto.
3055 (UNSPEC_SM3PARTW2): Ditto.
3056 (UNSPEC_SM4E): Ditto.
3057 (UNSPEC_SM4EKEY): Ditto.
3058 * config/aarch64/constraints.md (Ui2): New constraint.
3059 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
3060 * config/arm/types.md (crypto_sm3): New type attribute.
3061 (crypto_sm4): Ditto.
3062 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
3063 (vsm3tt1aq_u32): Ditto.
3064 (vsm3tt1bq_u32): Ditto.
3065 (vsm3tt2aq_u32): Ditto.
3066 (vsm3tt2bq_u32): Ditto.
3067 (vsm3partw1q_u32): Ditto.
3068 (vsm3partw2q_u32): Ditto.
3069 (vsm4eq_u32): Ditto.
3070 (vsm4ekeyq_u32): Ditto.
3071 (doc/invoke.texi): Document new sm4 option.
3073 2018-01-10 Michael Collison <michael.collison@arm.com>
3075 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
3076 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
3077 (AARCH64_FL_FOR_ARCH8_4): New.
3078 (AARCH64_FL_V8_4): New flag.
3079 (doc/invoke.texi): Document new armv8.4-a option.
3081 2018-01-10 Michael Collison <michael.collison@arm.com>
3083 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
3084 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
3085 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
3086 * config/aarch64/aarch64-option-extension.def: Add
3087 AARCH64_OPT_EXTENSION of 'sha2'.
3088 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
3089 (crypto): Disable sha2 and aes if crypto disabled.
3090 (crypto): Enable aes and sha2 if enabled.
3091 (simd): Disable sha2 and aes if simd disabled.
3092 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
3094 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
3095 (TARGET_SHA2): New feature flag for sha2.
3096 (TARGET_AES): New feature flag for aes.
3097 * config/aarch64/aarch64-simd.md:
3098 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
3099 conditional on TARGET_AES.
3100 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
3101 (aarch64_crypto_sha1hsi): Make pattern conditional
3103 (aarch64_crypto_sha1hv4si): Ditto.
3104 (aarch64_be_crypto_sha1hv4si): Ditto.
3105 (aarch64_crypto_sha1su1v4si): Ditto.
3106 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
3107 (aarch64_crypto_sha1su0v4si): Ditto.
3108 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
3109 (aarch64_crypto_sha256su0v4si): Ditto.
3110 (aarch64_crypto_sha256su1v4si): Ditto.
3111 (doc/invoke.texi): Document new aes and sha2 options.
3113 2018-01-10 Martin Sebor <msebor@redhat.com>
3115 PR tree-optimization/83781
3116 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
3119 2018-01-11 Martin Sebor <msebor@gmail.com>
3120 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3122 PR tree-optimization/83501
3123 PR tree-optimization/81703
3125 * tree-ssa-strlen.c (get_string_cst): Rename...
3126 (get_string_len): ...to this. Handle global constants.
3127 (handle_char_store): Adjust.
3129 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
3130 Jim Wilson <jimw@sifive.com>
3132 * config/riscv/riscv-protos.h (riscv_output_return): New.
3133 * config/riscv/riscv.c (struct machine_function): New naked_p field.
3134 (riscv_attribute_table, riscv_output_return),
3135 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
3136 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
3137 (riscv_compute_frame_info): Only compute frame->mask if not a naked
3139 (riscv_expand_prologue): Add early return for naked function.
3140 (riscv_expand_epilogue): Likewise.
3141 (riscv_function_ok_for_sibcall): Return false for naked function.
3142 (riscv_set_current_function): New.
3143 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
3144 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
3145 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
3146 * doc/extend.texi (RISC-V Function Attributes): New.
3148 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
3150 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
3151 check for 128-bit long double before checking TCmode.
3152 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
3153 128-bit long doubles before checking TFmode or TCmode.
3154 (FLOAT128_IBM_P): Likewise.
3156 2018-01-10 Martin Sebor <msebor@redhat.com>
3158 PR tree-optimization/83671
3159 * builtins.c (c_strlen): Unconditionally return zero for the empty
3161 Use -Warray-bounds for warnings.
3162 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
3163 for non-constant array indices with COMPONENT_REF, arrays of
3164 arrays, and pointers to arrays.
3165 (gimple_fold_builtin_strlen): Determine and set length range for
3166 non-constant character arrays.
3168 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
3171 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
3174 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
3176 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
3178 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
3181 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
3182 VECTOR_MEM_ALTIVEC_OR_VSX_P.
3183 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
3184 indexed_or_indirect_operand predicate.
3185 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
3186 (*vsx_le_perm_load_v8hi): Likewise.
3187 (*vsx_le_perm_load_v16qi): Likewise.
3188 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
3189 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
3190 (*vsx_le_perm_store_v8hi): Likewise.
3191 (*vsx_le_perm_store_v16qi): Likewise.
3192 (eight unnamed splitters): Likewise.
3194 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
3196 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
3197 * config/rs6000/emmintrin.h: Likewise.
3198 * config/rs6000/mmintrin.h: Likewise.
3199 * config/rs6000/xmmintrin.h: Likewise.
3201 2018-01-10 David Malcolm <dmalcolm@redhat.com>
3204 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
3206 * tree.c (tree_nop_conversion): Return true for location wrapper
3208 (maybe_wrap_with_location): New function.
3209 (selftest::check_strip_nops): New function.
3210 (selftest::test_location_wrappers): New function.
3211 (selftest::tree_c_tests): Call it.
3212 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
3213 (maybe_wrap_with_location): New decl.
3214 (EXPR_LOCATION_WRAPPER_P): New macro.
3215 (location_wrapper_p): New inline function.
3216 (tree_strip_any_location_wrapper): New inline function.
3218 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
3221 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
3222 stack_realign_offset for the largest alignment of stack slot
3224 (ix86_find_max_used_stack_alignment): New function.
3225 (ix86_finalize_stack_frame_flags): Use it. Set
3226 max_used_stack_alignment if we don't realign stack.
3227 * config/i386/i386.h (machine_function): Add
3228 max_used_stack_alignment.
3230 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
3232 * config/arm/arm.opt (-mbranch-cost): New option.
3233 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
3236 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
3239 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
3240 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
3242 2018-01-10 Richard Biener <rguenther@suse.de>
3245 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
3246 early out so it also covers the case where we have a non-NULL
3249 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
3251 PR tree-optimization/83753
3252 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
3253 for non-strided grouped accesses if the number of elements is 1.
3255 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
3258 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
3259 * i386.h (TARGET_USE_GATHER): Define.
3260 * x86-tune.def (X86_TUNE_USE_GATHER): New.
3262 2018-01-10 Martin Liska <mliska@suse.cz>
3265 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
3266 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
3268 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
3269 CLEANUP_NO_PARTITIONING is not set.
3271 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
3273 * doc/rtl.texi: Remove documentation of (const ...) wrappers
3274 for vectors, as a partial revert of r254296.
3275 * rtl.h (const_vec_p): Delete.
3276 (const_vec_duplicate_p): Don't test for vector CONSTs.
3277 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
3278 * expmed.c (make_tree): Likewise.
3281 * common.md (E, F): Use CONSTANT_P instead of checking for
3283 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
3284 checking for CONST_VECTOR.
3286 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
3289 * predict.c (force_edge_cold): Handle in more sane way edges
3292 2018-01-09 Carl Love <cel@us.ibm.com>
3294 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
3296 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
3297 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
3298 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
3299 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
3300 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
3301 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
3302 * config/rs6000/rs6000-protos.h: Add extern defition for
3303 rs6000_generate_float2_double_code.
3304 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
3306 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
3307 (float2_v2df): Add define_expand.
3309 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
3312 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
3313 op_mode in the force_to_mode call.
3315 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
3317 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
3318 instead of checking each element individually.
3319 (aarch64_evpc_uzp): Likewise.
3320 (aarch64_evpc_zip): Likewise.
3321 (aarch64_evpc_ext): Likewise.
3322 (aarch64_evpc_rev): Likewise.
3323 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
3324 instead of checking each element individually. Return true without
3326 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
3327 whether all selected elements come from the same input, instead of
3328 checking each element individually. Remove calls to gen_rtx_REG,
3329 start_sequence and end_sequence and instead assert that no rtl is
3332 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
3334 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
3335 order of HIGH and CONST checks.
3337 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
3339 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
3340 if the destination isn't an SSA_NAME.
3342 2018-01-09 Richard Biener <rguenther@suse.de>
3344 PR tree-optimization/83668
3345 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
3347 (canonicalize_loop_form): ... here, renamed from ...
3348 (canonicalize_loop_closed_ssa_form): ... this and amended to
3349 swap successor edges for loop exit blocks to make us use
3350 the RPO order we need for initial schedule generation.
3352 2018-01-09 Joseph Myers <joseph@codesourcery.com>
3354 PR tree-optimization/64811
3355 * match.pd: When optimizing comparisons with Inf, avoid
3356 introducing or losing exceptions from comparisons with NaN.
3358 2018-01-09 Martin Liska <mliska@suse.cz>
3361 * asan.c (shadow_mem_size): Add gcc_assert.
3363 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
3365 Don't save registers in main().
3368 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
3369 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
3370 * config/avr/avr.c (avr_set_current_function): Don't error if
3371 naked, OS_task or OS_main are specified at the same time.
3372 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
3374 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
3376 * common/config/avr/avr-common.c (avr_option_optimization_table):
3377 Switch on -mmain-is-OS_task for optimizing compilations.
3379 2018-01-09 Richard Biener <rguenther@suse.de>
3381 PR tree-optimization/83572
3382 * graphite.c: Include cfganal.h.
3383 (graphite_transform_loops): Connect infinite loops to exit
3384 and remove fake edges at the end.
3386 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
3388 * ipa-inline.c (edge_badness): Revert accidental checkin.
3390 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
3393 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
3394 symbols; not inline clones.
3396 2018-01-09 Jakub Jelinek <jakub@redhat.com>
3399 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
3400 hard registers. Formatting fixes.
3402 PR preprocessor/83722
3403 * gcc.c (try_generate_repro): Pass
3404 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
3405 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
3408 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
3409 Kito Cheng <kito.cheng@gmail.com>
3411 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
3412 (riscv_leaf_function_p): Delete.
3413 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
3415 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3417 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
3419 (do_ifelse): New function.
3420 (do_isel): New function.
3421 (do_sub3): New function.
3422 (do_add3): New function.
3423 (do_load_mask_compare): New function.
3424 (do_overlap_load_compare): New function.
3425 (expand_compare_loop): New function.
3426 (expand_block_compare): Call expand_compare_loop() when appropriate.
3427 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
3429 (-mblock-compare-inline-loop-limit): New option.
3431 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3434 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
3435 Reverse order of second and third operands in first alternative.
3436 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
3437 of first and second elements in UNSPEC_VPERMR vector.
3438 (altivec_expand_vec_perm_le): Likewise.
3440 2017-01-08 Jeff Law <law@redhat.com>
3442 PR rtl-optimizatin/81308
3443 * tree-switch-conversion.c (cfg_altered): New file scoped static.
3444 (process_switch): If group_case_labels makes a change, then set
3446 (pass_convert_switch::execute): If a switch is converted, then
3447 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
3449 PR rtl-optimization/81308
3450 * recog.c (split_all_insns): Conditionally cleanup the CFG after
3453 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
3455 PR target/83663 - Revert r255946
3456 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
3457 generation for cases where splatting a value is not useful.
3458 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
3459 across a vec_duplicate and a paradoxical subreg forming a vector
3460 mode to a vec_concat.
3462 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3464 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
3465 -march=armv8.3-a variants.
3466 * config/arm/t-multilib: Likewise.
3467 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
3469 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3471 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
3473 (cceq_ior_compare_complement): Give it a name so I can use it, and
3474 change boolean_or_operator predicate to boolean_operator so it can
3475 be used to generate a crand.
3476 (eqne): New code iterator.
3477 (bd/bd_neg): New code_attrs.
3478 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
3479 a single define_insn.
3480 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
3481 decrement (bdnzt/bdnzf/bdzt/bdzf).
3482 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
3483 with the new names of the branch decrement patterns, and added the
3484 names of the branch decrement conditional patterns.
3486 2018-01-08 Richard Biener <rguenther@suse.de>
3488 PR tree-optimization/83563
3489 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
3492 2018-01-08 Richard Biener <rguenther@suse.de>
3495 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
3497 2018-01-08 Richard Biener <rguenther@suse.de>
3499 PR tree-optimization/83685
3500 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
3501 references to abnormals.
3503 2018-01-08 Richard Biener <rguenther@suse.de>
3506 * dwarf2out.c (output_indirect_strings): Handle empty
3507 skeleton_debug_str_hash.
3508 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
3510 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3512 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
3513 (emit_store_direct): Likewise.
3514 (arc_trampoline_adjust_address): Likewise.
3515 (arc_asm_trampoline_template): New function.
3516 (arc_initialize_trampoline): Use asm_trampoline_template.
3517 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
3518 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
3519 * config/arc/arc.md (flush_icache): Delete pattern.
3521 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3523 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
3524 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
3527 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3530 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
3531 by not USED_FOR_TARGET.
3532 (make_pass_resolve_sw_modes): Likewise.
3534 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3536 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
3539 2018-01-08 Richard Biener <rguenther@suse.de>
3542 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3544 2018-01-08 Richard Biener <rguenther@suse.de>
3547 * match.pd ((t * 2) / 2) -> t): Add missing :c.
3549 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
3552 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3553 basic blocks with a small number of successors.
3554 (convert_control_dep_chain_into_preds): Improve handling of
3556 (dump_predicates): Split apart into...
3557 (dump_pred_chain): ...here...
3558 (dump_pred_info): ...and here.
3559 (can_one_predicate_be_invalidated_p): Add debugging printfs.
3560 (can_chain_union_be_invalidated_p): Improve check for invalidation
3562 (uninit_uses_cannot_happen): Avoid unnecessary if
3563 convert_control_dep_chain_into_preds yielded nothing.
3565 2018-01-06 Martin Sebor <msebor@redhat.com>
3567 PR tree-optimization/83640
3568 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3569 subtracting negative offset from size.
3570 (builtin_access::overlap): Adjust offset bounds of the access to fall
3571 within the size of the object if possible.
3573 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
3575 PR rtl-optimization/83699
3576 * expmed.c (extract_bit_field_1): Restrict the vector usage of
3577 extract_bit_field_as_subreg to cases in which the extracted
3578 value is also a vector.
3580 * lra-constraints.c (process_alt_operands): Test for the equivalence
3581 substitutions when detecting a possible reload cycle.
3583 2018-01-06 Jakub Jelinek <jakub@redhat.com>
3586 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3587 by default if flag_selective_schedling{,2}. Formatting fixes.
3589 PR rtl-optimization/83682
3590 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3591 if it has non-VECTOR_MODE element mode.
3592 (vec_duplicate_p): Likewise.
3595 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3596 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3598 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3601 * config/i386/i386-builtin.def
3602 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3603 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3604 Require also OPTION_MASK_ISA_AVX512F in addition to
3605 OPTION_MASK_ISA_GFNI.
3606 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3607 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3608 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3609 to OPTION_MASK_ISA_GFNI.
3610 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3611 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3612 OPTION_MASK_ISA_AVX512BW.
3613 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3614 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3615 addition to OPTION_MASK_ISA_GFNI.
3616 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3617 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3618 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3619 to OPTION_MASK_ISA_GFNI.
3620 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3621 a requirement for all ISAs rather than any of them with a few
3623 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3625 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3626 bitmasks to be enabled with 3 exceptions, instead of requiring any
3627 enabled ISA with lots of exceptions.
3628 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3629 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3630 Change avx512bw in isa attribute to avx512f.
3631 * config/i386/sgxintrin.h: Add license boilerplate.
3632 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
3633 to __AVX512F__ and __AVX512VL to __AVX512VL__.
3634 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3635 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3637 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3638 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3639 temporarily sse2 rather than sse if not enabled already.
3642 * config/i386/sse.md (VI248_VLBW): Rename to ...
3643 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
3644 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3645 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3646 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3647 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3648 mode iterator instead of VI248_VLBW.
3650 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3652 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3653 (record_modified): Skip clobbers; add debug output.
3654 (param_change_prob): Use sreal frequencies.
3656 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3658 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3659 punt for user-aligned variables.
3661 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3663 * tree-chrec.c (chrec_contains_symbols): Return true for
3666 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3669 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3670 of (x|y) == x for BICS pattern.
3672 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3674 PR tree-optimization/83605
3675 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3676 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3679 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3681 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3682 * config/epiphany/rtems.h: New file.
3684 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3685 Uros Bizjak <ubizjak@gmail.com>
3688 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3689 QIreg_operand instead of register_operand predicate.
3690 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3691 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3692 comments instead of -fmitigate[-_]rop.
3694 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3697 * cgraphunit.c (symbol_table::compile): Switch to text_section
3698 before calling assembly_start debug hook.
3699 * run-rtl-passes.c (run_rtl_passes): Likewise.
3702 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3704 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3705 range_int_cst_p rather than !symbolic_range_p before calling
3706 extract_range_from_multiplicative_op_1.
3708 2017-01-04 Jeff Law <law@redhat.com>
3710 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3711 redundant test in assertion.
3713 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3715 * doc/rtl.texi: Document machine_mode wrapper classes.
3717 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3719 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3722 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3724 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3725 the VEC_PERM_EXPR fold to fail.
3727 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3730 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3731 to switched_sections.
3733 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3736 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3739 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3742 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3743 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3745 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3748 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3749 is BLKmode and bitpos not zero or mode change is needed.
3751 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3754 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3757 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3760 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3761 instead of MULT rtx. Update all corresponding splitters.
3763 (*ssub<modesuffix>): Ditto.
3765 (*cmp_sadd_di): Update split patterns.
3766 (*cmp_sadd_si): Ditto.
3767 (*cmp_sadd_sidi): Ditto.
3768 (*cmp_ssub_di): Ditto.
3769 (*cmp_ssub_si): Ditto.
3770 (*cmp_ssub_sidi): Ditto.
3771 * config/alpha/predicates.md (const23_operand): New predicate.
3772 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3773 Look for ASHIFT, not MULT inner operand.
3774 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3776 2018-01-04 Martin Liska <mliska@suse.cz>
3778 PR gcov-profile/83669
3779 * gcov.c (output_intermediate_file): Add version to intermediate
3781 * doc/gcov.texi: Document new field 'version' in intermediate
3782 file format. Fix location of '-k' option of gcov command.
3784 2018-01-04 Martin Liska <mliska@suse.cz>
3787 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3789 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3791 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3793 2018-01-03 Martin Sebor <msebor@redhat.com>
3795 PR tree-optimization/83655
3796 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3797 checking calls with invalid arguments.
3799 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3801 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3802 (vectorizable_mask_load_store): Delete.
3803 (vectorizable_call): Return false for masked loads and stores.
3804 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3805 instead of gimple_assign_rhs1.
3806 (vectorizable_load): Handle IFN_MASK_LOAD.
3807 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3809 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3811 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3813 (vectorizable_mask_load_store): ...here.
3814 (vectorizable_load): ...and here.
3816 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3818 * tree-vect-stmts.c (vect_build_all_ones_mask)
3819 (vect_build_zero_merge_argument): New functions, split out from...
3820 (vectorizable_load): ...here.
3822 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3824 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3826 (vectorizable_mask_load_store): ...here.
3827 (vectorizable_store): ...and here.
3829 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3831 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3833 (vectorizable_mask_load_store): ...here.
3835 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3837 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3838 (vect_model_store_cost): Take a vec_load_store_type instead of a
3840 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3841 (vect_model_store_cost): Take a vec_load_store_type instead of a
3843 (vectorizable_mask_load_store): Update accordingly.
3844 (vectorizable_store): Likewise.
3845 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3847 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3849 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3850 IFN_MASK_LOAD calls here rather than...
3851 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3853 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3854 Alan Hayward <alan.hayward@arm.com>
3855 David Sherwood <david.sherwood@arm.com>
3857 * expmed.c (extract_bit_field_1): For vector extracts,
3858 fall back to extract_bit_field_as_subreg if vec_extract
3861 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3862 Alan Hayward <alan.hayward@arm.com>
3863 David Sherwood <david.sherwood@arm.com>
3865 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3866 they are variable or constant sized.
3867 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3868 slots for constant-sized data.
3870 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3871 Alan Hayward <alan.hayward@arm.com>
3872 David Sherwood <david.sherwood@arm.com>
3874 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3875 handling COND_EXPRs with boolean comparisons, try to find a better
3876 basis for the mask type than the boolean itself.
3878 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3880 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3881 is calculated and how it can be overridden.
3882 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3883 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3885 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3888 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3889 Alan Hayward <alan.hayward@arm.com>
3890 David Sherwood <david.sherwood@arm.com>
3892 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3893 Remove the mode argument.
3894 (aarch64_simd_valid_immediate): Remove the mode and inverse
3896 * config/aarch64/iterators.md (bitsize): New iterator.
3897 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3898 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3899 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3900 aarch64_simd_valid_immediate.
3901 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3902 (aarch64_reg_or_bic_imm): Likewise.
3903 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3904 with an insn_type enum and msl with a modifier_type enum.
3905 Replace element_width with a scalar_mode. Change the shift
3906 to unsigned int. Add constructors for scalar_float_mode and
3907 scalar_int_mode elements.
3908 (aarch64_vect_float_const_representable_p): Delete.
3909 (aarch64_can_const_movi_rtx_p)
3910 (aarch64_simd_scalar_immediate_valid_for_move)
3911 (aarch64_simd_make_constant): Update call to
3912 aarch64_simd_valid_immediate.
3913 (aarch64_advsimd_valid_immediate_hs): New function.
3914 (aarch64_advsimd_valid_immediate): Likewise.
3915 (aarch64_simd_valid_immediate): Remove mode and inverse
3916 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3917 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3918 and aarch64_float_const_representable_p on the result.
3919 (aarch64_output_simd_mov_immediate): Remove mode argument.
3920 Update call to aarch64_simd_valid_immediate and use of
3921 simd_immediate_info.
3922 (aarch64_output_scalar_simd_mov_immediate): Update call
3925 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3926 Alan Hayward <alan.hayward@arm.com>
3927 David Sherwood <david.sherwood@arm.com>
3929 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3930 (mode_nunits): Likewise CONST_MODE_NUNITS.
3931 * machmode.def (ADJUST_NUNITS): Document.
3932 * genmodes.c (mode_data::need_nunits_adj): New field.
3933 (blank_mode): Update accordingly.
3934 (adj_nunits): New variable.
3935 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3937 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3938 listed in adj_nunits.
3939 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3940 listed in adj_nunits. Don't emit case statements for such modes.
3941 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3942 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3943 nothing if adj_nunits is nonnull.
3944 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3945 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3946 (emit_mode_fbit): Update use of print_maybe_const_decl.
3947 (emit_move_size): Likewise. Treat the array as non-const
3949 (emit_mode_adjustments): Handle adj_nunits.
3951 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3953 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3954 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3955 (VECTOR_MODES): Use it.
3956 (make_vector_modes): Take the prefix as an argument.
3958 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3959 Alan Hayward <alan.hayward@arm.com>
3960 David Sherwood <david.sherwood@arm.com>
3962 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3963 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3964 for MODE_VECTOR_BOOL.
3965 * machmode.def (VECTOR_BOOL_MODE): Document.
3966 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3967 (make_vector_bool_mode): New function.
3968 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3970 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3971 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3973 * stor-layout.c (int_mode_for_mode): Likewise.
3974 * tree.c (build_vector_type_for_mode): Likewise.
3975 * varasm.c (output_constant_pool_2): Likewise.
3976 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3977 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3978 for MODE_VECTOR_BOOL.
3979 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3980 of mode class checks.
3981 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3982 instead of a list of mode class checks.
3983 (expand_vector_scalar_condition): Likewise.
3984 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3986 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3987 Alan Hayward <alan.hayward@arm.com>
3988 David Sherwood <david.sherwood@arm.com>
3990 * machmode.h (mode_size): Change from unsigned short to
3992 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3993 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3994 or if measurement_type is not polynomial.
3995 (fixed_size_mode::includes_p): Check for constant-sized modes.
3996 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3997 return a poly_uint16 rather than an unsigned short.
3998 (emit_mode_size): Change the type of mode_size from unsigned short
3999 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
4000 (emit_mode_adjustments): Cope with polynomial vector sizes.
4001 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4003 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4005 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
4006 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
4007 * caller-save.c (setup_save_areas): Likewise.
4008 (replace_reg_with_saved_mem): Likewise.
4009 * calls.c (emit_library_call_value_1): Likewise.
4010 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
4011 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
4012 (gen_lowpart_for_combine): Likewise.
4013 * convert.c (convert_to_integer_1): Likewise.
4014 * cse.c (equiv_constant, cse_insn): Likewise.
4015 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
4016 (cselib_subst_to_values): Likewise.
4017 * dce.c (word_dce_process_block): Likewise.
4018 * df-problems.c (df_word_lr_mark_ref): Likewise.
4019 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
4020 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
4021 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
4022 (rtl_for_decl_location): Likewise.
4023 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
4024 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
4025 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
4026 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
4027 (expand_expr_real_1): Likewise.
4028 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
4029 (pad_below): Likewise.
4030 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4031 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
4032 * ira.c (get_subreg_tracking_sizes): Likewise.
4033 * ira-build.c (ira_create_allocno_objects): Likewise.
4034 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
4035 (ira_sort_regnos_for_alter_reg): Likewise.
4036 * ira-costs.c (record_operand_costs): Likewise.
4037 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
4038 (resolve_simple_move): Likewise.
4039 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
4040 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
4041 (lra_constraints): Likewise.
4042 (CONST_POOL_OK_P): Reject variable-sized modes.
4043 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
4044 (add_pseudo_to_slot, lra_spill): Likewise.
4045 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4046 * optabs-query.c (get_best_extraction_insn): Likewise.
4047 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4048 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
4049 (expand_mult_highpart, valid_multiword_target_p): Likewise.
4050 * recog.c (offsettable_address_addr_space_p): Likewise.
4051 * regcprop.c (maybe_mode_change): Likewise.
4052 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
4053 * regrename.c (build_def_use): Likewise.
4054 * regstat.c (dump_reg_info): Likewise.
4055 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
4056 (find_reloads, find_reloads_subreg_address): Likewise.
4057 * reload1.c (eliminate_regs_1): Likewise.
4058 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
4059 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
4060 (simplify_binary_operation_1, simplify_subreg): Likewise.
4061 * targhooks.c (default_function_arg_padding): Likewise.
4062 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
4063 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
4064 (verify_gimple_assign_ternary): Likewise.
4065 * tree-inline.c (estimate_move_cost): Likewise.
4066 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4067 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
4068 (get_address_cost_ainc): Likewise.
4069 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
4070 (vect_supportable_dr_alignment): Likewise.
4071 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4072 (vectorizable_reduction): Likewise.
4073 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
4074 (vectorizable_operation, vectorizable_load): Likewise.
4075 * tree.c (build_same_sized_truth_vector_type): Likewise.
4076 * valtrack.c (cleanup_auto_inc_dec): Likewise.
4077 * var-tracking.c (emit_note_insn_var_location): Likewise.
4078 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
4079 (ADDR_VEC_ALIGN): Likewise.
4081 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4082 Alan Hayward <alan.hayward@arm.com>
4083 David Sherwood <david.sherwood@arm.com>
4085 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
4087 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
4088 or if measurement_type is polynomial.
4089 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
4090 * combine.c (make_extraction): Likewise.
4091 * dse.c (find_shift_sequence): Likewise.
4092 * dwarf2out.c (mem_loc_descriptor): Likewise.
4093 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
4094 (extract_bit_field, extract_low_bits): Likewise.
4095 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
4096 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
4097 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
4098 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
4099 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
4100 * reload.c (find_reloads): Likewise.
4101 * reload1.c (alter_reg): Likewise.
4102 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
4103 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
4104 * tree-if-conv.c (predicate_mem_writes): Likewise.
4105 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
4106 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
4107 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
4108 * valtrack.c (dead_debug_insert_temp): Likewise.
4109 * varasm.c (mergeable_constant_section): Likewise.
4110 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
4112 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4113 Alan Hayward <alan.hayward@arm.com>
4114 David Sherwood <david.sherwood@arm.com>
4116 * expr.c (expand_assignment): Cope with polynomial mode sizes
4117 when assigning to a CONCAT.
4119 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4120 Alan Hayward <alan.hayward@arm.com>
4121 David Sherwood <david.sherwood@arm.com>
4123 * machmode.h (mode_precision): Change from unsigned short to
4125 (mode_to_precision): Return a poly_uint16 rather than an unsigned
4127 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
4128 or if measurement_type is not polynomial.
4129 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
4130 in which the mode is already known to be a scalar_int_mode.
4131 * genmodes.c (emit_mode_precision): Change the type of mode_precision
4132 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
4134 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4135 for GET_MODE_PRECISION.
4136 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4137 for GET_MODE_PRECISION.
4138 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
4140 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
4141 (expand_field_assignment, make_extraction): Likewise.
4142 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
4143 (get_last_value): Likewise.
4144 * convert.c (convert_to_integer_1): Likewise.
4145 * cse.c (cse_insn): Likewise.
4146 * expr.c (expand_expr_real_1): Likewise.
4147 * lra-constraints.c (simplify_operand_subreg): Likewise.
4148 * optabs-query.c (can_atomic_load_p): Likewise.
4149 * optabs.c (expand_atomic_load): Likewise.
4150 (expand_atomic_store): Likewise.
4151 * ree.c (combine_reaching_defs): Likewise.
4152 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
4153 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
4154 * tree.h (type_has_mode_precision_p): Likewise.
4155 * ubsan.c (instrument_si_overflow): Likewise.
4157 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4158 Alan Hayward <alan.hayward@arm.com>
4159 David Sherwood <david.sherwood@arm.com>
4161 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
4162 polynomial numbers of units.
4163 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
4164 (valid_vector_subparts_p): New function.
4165 (build_vector_type): Remove temporary shim and take the number
4166 of units as a poly_uint64 rather than an int.
4167 (build_opaque_vector_type): Take the number of units as a
4168 poly_uint64 rather than an int.
4169 * tree.c (build_vector_from_ctor): Handle polynomial
4170 TYPE_VECTOR_SUBPARTS.
4171 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
4172 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
4173 (build_vector_from_val): If the number of units is variable,
4174 use build_vec_duplicate_cst for constant operands and
4175 VEC_DUPLICATE_EXPR otherwise.
4176 (make_vector_type): Remove temporary is_constant ().
4177 (build_vector_type, build_opaque_vector_type): Take the number of
4178 units as a poly_uint64 rather than an int.
4179 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
4181 * cfgexpand.c (expand_debug_expr): Likewise.
4182 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
4183 (store_constructor, expand_expr_real_1): Likewise.
4184 (const_scalar_mask_from_tree): Likewise.
4185 * fold-const-call.c (fold_const_reduction): Likewise.
4186 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
4187 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
4188 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
4189 (fold_relational_const): Likewise.
4190 (native_interpret_vector): Likewise. Change the size from an
4191 int to an unsigned int.
4192 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
4193 TYPE_VECTOR_SUBPARTS.
4194 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
4195 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
4196 duplicating a non-constant operand into a variable-length vector.
4197 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
4198 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
4199 * ipa-icf.c (sem_variable::equals): Likewise.
4200 * match.pd: Likewise.
4201 * omp-simd-clone.c (simd_clone_subparts): Likewise.
4202 * print-tree.c (print_node): Likewise.
4203 * stor-layout.c (layout_type): Likewise.
4204 * targhooks.c (default_builtin_vectorization_cost): Likewise.
4205 * tree-cfg.c (verify_gimple_comparison): Likewise.
4206 (verify_gimple_assign_binary): Likewise.
4207 (verify_gimple_assign_ternary): Likewise.
4208 (verify_gimple_assign_single): Likewise.
4209 * tree-pretty-print.c (dump_generic_node): Likewise.
4210 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4211 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
4212 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
4213 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
4214 (vect_shift_permute_load_chain): Likewise.
4215 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
4216 (expand_vector_condition, optimize_vector_constructor): Likewise.
4217 (lower_vec_perm, get_compute_type): Likewise.
4218 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
4219 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
4220 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
4221 (vect_recog_mask_conversion_pattern): Likewise.
4222 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
4223 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
4224 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4225 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
4226 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
4227 (vectorizable_shift, vectorizable_operation, vectorizable_store)
4228 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
4229 (supportable_widening_operation): Likewise.
4230 (supportable_narrowing_operation): Likewise.
4231 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
4233 * varasm.c (output_constant): Likewise.
4235 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4236 Alan Hayward <alan.hayward@arm.com>
4237 David Sherwood <david.sherwood@arm.com>
4239 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
4240 so that both the length == 3 and length != 3 cases set up their
4241 own permute vectors. Add comments explaining why we know the
4242 number of elements is constant.
4243 (vect_permute_load_chain): Likewise.
4245 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4246 Alan Hayward <alan.hayward@arm.com>
4247 David Sherwood <david.sherwood@arm.com>
4249 * machmode.h (mode_nunits): Change from unsigned char to
4251 (ONLY_FIXED_SIZE_MODES): New macro.
4252 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
4253 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
4254 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
4256 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
4257 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
4258 or if measurement_type is not polynomial.
4259 * genmodes.c (ZERO_COEFFS): New macro.
4260 (emit_mode_nunits_inline): Make mode_nunits_inline return a
4262 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
4263 Use ZERO_COEFFS when emitting initializers.
4264 * data-streamer.h (bp_pack_poly_value): New function.
4265 (bp_unpack_poly_value): Likewise.
4266 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
4267 for GET_MODE_NUNITS.
4268 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
4269 for GET_MODE_NUNITS.
4270 * tree.c (make_vector_type): Remove temporary shim and make
4271 the real function take the number of units as a poly_uint64
4273 (build_vector_type_for_mode): Handle polynomial nunits.
4274 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
4275 * emit-rtl.c (const_vec_series_p_1): Likewise.
4276 (gen_rtx_CONST_VECTOR): Likewise.
4277 * fold-const.c (test_vec_duplicate_folding): Likewise.
4278 * genrecog.c (validate_pattern): Likewise.
4279 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
4280 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4281 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
4282 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
4283 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
4284 * rtlanal.c (subreg_get_info): Likewise.
4285 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4286 (vect_grouped_load_supported): Likewise.
4287 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
4288 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
4289 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
4290 (simplify_const_unary_operation, simplify_binary_operation_1)
4291 (simplify_const_binary_operation, simplify_ternary_operation)
4292 (test_vector_ops_duplicate, test_vector_ops): Likewise.
4293 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
4294 instead of CONST_VECTOR_NUNITS.
4295 * varasm.c (output_constant_pool_2): Likewise.
4296 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
4297 explicit-encoded elements in the XVEC for variable-length vectors.
4299 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4301 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
4303 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4304 Alan Hayward <alan.hayward@arm.com>
4305 David Sherwood <david.sherwood@arm.com>
4307 * coretypes.h (fixed_size_mode): Declare.
4308 (fixed_size_mode_pod): New typedef.
4309 * builtins.h (target_builtins::x_apply_args_mode)
4310 (target_builtins::x_apply_result_mode): Change type to
4311 fixed_size_mode_pod.
4312 * builtins.c (apply_args_size, apply_result_size, result_vector)
4313 (expand_builtin_apply_args_1, expand_builtin_apply)
4314 (expand_builtin_return): Update accordingly.
4316 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4318 * cse.c (hash_rtx_cb): Hash only the encoded elements.
4319 * cselib.c (cselib_hash_rtx): Likewise.
4320 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
4321 CONST_VECTOR encoding.
4323 2017-01-03 Jakub Jelinek <jakub@redhat.com>
4324 Jeff Law <law@redhat.com>
4327 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
4328 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
4329 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
4330 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
4333 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
4334 explicitly probe *sp in a noreturn function if there were any callee
4335 register saves or frame pointer is needed.
4337 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4340 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
4341 BLKmode for ternary, binary or unary expressions.
4344 * var-tracking.c (delete_vta_debug_insn): New inline function.
4345 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
4346 insns from get_insns () to NULL instead of each bb separately.
4347 Use delete_vta_debug_insn. No longer static.
4348 (vt_debug_insns_local, variable_tracking_main_1): Adjust
4349 delete_vta_debug_insns callers.
4350 * rtl.h (delete_vta_debug_insns): Declare.
4351 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
4352 instead of variable_tracking_main.
4354 2018-01-03 Martin Sebor <msebor@redhat.com>
4356 PR tree-optimization/83603
4357 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
4358 arguments past the endof the argument list in functions declared
4359 without a prototype.
4360 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
4361 Avoid checking when arguments are null.
4363 2018-01-03 Martin Sebor <msebor@redhat.com>
4366 * doc/extend.texi (attribute const): Fix a typo.
4367 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
4368 issuing -Wsuggest-attribute for void functions.
4370 2018-01-03 Martin Sebor <msebor@redhat.com>
4372 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
4373 offset_int::from instead of wide_int::to_shwi.
4374 (maybe_diag_overlap): Remove assertion.
4375 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
4376 * gimple-ssa-sprintf.c (format_directive): Same.
4377 (parse_directive): Same.
4378 (sprintf_dom_walker::compute_format_length): Same.
4379 (try_substitute_return_value): Same.
4381 2017-01-03 Jeff Law <law@redhat.com>
4384 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
4385 non-constant residual for zero at runtime and avoid probing in
4386 that case. Reorganize code for trailing problem to mirror handling
4389 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
4391 PR tree-optimization/83501
4392 * tree-ssa-strlen.c (get_string_cst): New.
4393 (handle_char_store): Call get_string_cst.
4395 2018-01-03 Martin Liska <mliska@suse.cz>
4397 PR tree-optimization/83593
4398 * tree-ssa-strlen.c: Include tree-cfg.h.
4399 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
4400 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
4401 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
4403 (strlen_dom_walker::before_dom_children): Call
4404 gimple_purge_dead_eh_edges. Dump tranformation with details
4406 (strlen_dom_walker::before_dom_children): Update call by adding
4407 new argument cleanup_eh.
4408 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
4410 2018-01-03 Martin Liska <mliska@suse.cz>
4413 * cif-code.def (VARIADIC_THUNK): New enum value.
4414 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
4417 2018-01-03 Jan Beulich <jbeulich@suse.com>
4419 * sse.md (mov<mode>_internal): Tighten condition for when to use
4420 vmovdqu<ssescalarsize> for TI and OI modes.
4422 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4424 Update copyright years.
4426 2018-01-03 Martin Liska <mliska@suse.cz>
4429 * ipa-visibility.c (function_and_variable_visibility): Skip
4430 functions with noipa attribure.
4432 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4434 * gcc.c (process_command): Update copyright notice dates.
4435 * gcov-dump.c (print_version): Ditto.
4436 * gcov.c (print_version): Ditto.
4437 * gcov-tool.c (print_version): Ditto.
4438 * gengtype.c (create_file): Ditto.
4439 * doc/cpp.texi: Bump @copying's copyright year.
4440 * doc/cppinternals.texi: Ditto.
4441 * doc/gcc.texi: Ditto.
4442 * doc/gccint.texi: Ditto.
4443 * doc/gcov.texi: Ditto.
4444 * doc/install.texi: Ditto.
4445 * doc/invoke.texi: Ditto.
4447 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4449 * vector-builder.h (vector_builder::m_full_nelts): Change from
4450 unsigned int to poly_uint64.
4451 (vector_builder::full_nelts): Update prototype accordingly.
4452 (vector_builder::new_vector): Likewise.
4453 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
4454 (vector_builder::operator ==): Likewise.
4455 (vector_builder::finalize): Likewise.
4456 * int-vector-builder.h (int_vector_builder::int_vector_builder):
4457 Take the number of elements as a poly_uint64 rather than an
4459 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
4460 from unsigned int to poly_uint64.
4461 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
4462 (vec_perm_indices::new_vector): Likewise.
4463 (vec_perm_indices::length): Likewise.
4464 (vec_perm_indices::nelts_per_input): Likewise.
4465 (vec_perm_indices::input_nelts): Likewise.
4466 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
4467 number of elements per input as a poly_uint64 rather than an
4468 unsigned int. Use the original encoding for variable-length
4469 vectors, rather than clamping each individual element.
4470 For the second and subsequent elements in each pattern,
4471 clamp the step and base before clamping their sum.
4472 (vec_perm_indices::series_p): Handle polynomial element counts.
4473 (vec_perm_indices::all_in_range_p): Likewise.
4474 (vec_perm_indices_to_tree): Likewise.
4475 (vec_perm_indices_to_rtx): Likewise.
4476 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
4477 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
4478 (tree_vector_builder::new_binary_operation): Handle polynomial
4479 element counts. Return false if we need to know the number
4480 of elements at compile time.
4481 * fold-const.c (fold_vec_perm): Punt if the number of elements
4482 isn't known at compile time.
4484 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4486 * vec-perm-indices.h (vec_perm_builder): Change element type
4487 from HOST_WIDE_INT to poly_int64.
4488 (vec_perm_indices::element_type): Update accordingly.
4489 (vec_perm_indices::clamp): Handle polynomial element_types.
4490 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4491 (vec_perm_indices::all_in_range_p): Likewise.
4492 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
4494 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
4495 polynomial vec_perm_indices element types.
4496 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
4497 * fold-const.c (fold_vec_perm): Likewise.
4498 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
4499 * tree-vect-generic.c (lower_vec_perm): Likewise.
4500 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4501 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
4502 element type to HOST_WIDE_INT.
4504 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4505 Alan Hayward <alan.hayward@arm.com>
4506 David Sherwood <david.sherwood@arm.com>
4508 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
4509 rather than an int. Use plus_constant.
4510 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
4511 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
4513 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4514 Alan Hayward <alan.hayward@arm.com>
4515 David Sherwood <david.sherwood@arm.com>
4517 * calls.c (emit_call_1, expand_call): Change struct_value_size from
4518 a HOST_WIDE_INT to a poly_int64.
4520 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4521 Alan Hayward <alan.hayward@arm.com>
4522 David Sherwood <david.sherwood@arm.com>
4524 * calls.c (load_register_parameters): Cope with polynomial
4525 mode sizes. Require a constant size for BLKmode parameters
4526 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
4527 forces a parameter to be padded at the lsb end in order to
4528 fill a complete number of words, require the parameter size
4529 to be ordered wrt UNITS_PER_WORD.
4531 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4532 Alan Hayward <alan.hayward@arm.com>
4533 David Sherwood <david.sherwood@arm.com>
4535 * reload1.c (spill_stack_slot_width): Change element type
4536 from unsigned int to poly_uint64_pod.
4537 (alter_reg): Treat mode sizes as polynomial.
4539 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4540 Alan Hayward <alan.hayward@arm.com>
4541 David Sherwood <david.sherwood@arm.com>
4543 * reload.c (complex_word_subreg_p): New function.
4544 (reload_inner_reg_of_subreg, push_reload): Use it.
4546 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4547 Alan Hayward <alan.hayward@arm.com>
4548 David Sherwood <david.sherwood@arm.com>
4550 * lra-constraints.c (process_alt_operands): Reject matched
4551 operands whose sizes aren't ordered.
4552 (match_reload): Refer to this check here.
4554 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4555 Alan Hayward <alan.hayward@arm.com>
4556 David Sherwood <david.sherwood@arm.com>
4558 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4559 that the mode size is in the set {1, 2, 4, 8, 16}.
4561 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4562 Alan Hayward <alan.hayward@arm.com>
4563 David Sherwood <david.sherwood@arm.com>
4565 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4566 Use plus_constant instead of gen_rtx_PLUS.
4568 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4569 Alan Hayward <alan.hayward@arm.com>
4570 David Sherwood <david.sherwood@arm.com>
4572 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4573 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4574 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4575 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4576 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4577 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4578 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4579 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4580 * config/i386/i386.c (ix86_push_rounding): ...this new function.
4581 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4583 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4584 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4585 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4586 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4587 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4588 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4589 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4590 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4591 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4592 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4594 * expr.c (emit_move_resolve_push): Treat the input and result
4595 of PUSH_ROUNDING as a poly_int64.
4596 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4597 (emit_push_insn): Likewise.
4598 * lra-eliminations.c (mark_not_eliminable): Likewise.
4599 * recog.c (push_operand): Likewise.
4600 * reload1.c (elimination_effects): Likewise.
4601 * rtlanal.c (nonzero_bits1): Likewise.
4602 * calls.c (store_one_arg): Likewise. Require the padding to be
4603 known at compile time.
4605 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4606 Alan Hayward <alan.hayward@arm.com>
4607 David Sherwood <david.sherwood@arm.com>
4609 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4610 Use plus_constant instead of gen_rtx_PLUS.
4612 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4613 Alan Hayward <alan.hayward@arm.com>
4614 David Sherwood <david.sherwood@arm.com>
4616 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4619 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4620 Alan Hayward <alan.hayward@arm.com>
4621 David Sherwood <david.sherwood@arm.com>
4623 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4624 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4625 via stack temporaries. Treat the mode size as polynomial too.
4627 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4628 Alan Hayward <alan.hayward@arm.com>
4629 David Sherwood <david.sherwood@arm.com>
4631 * expr.c (expand_expr_real_2): When handling conversions involving
4632 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4633 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
4634 as a poly_uint64 too.
4636 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4637 Alan Hayward <alan.hayward@arm.com>
4638 David Sherwood <david.sherwood@arm.com>
4640 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4642 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4643 Alan Hayward <alan.hayward@arm.com>
4644 David Sherwood <david.sherwood@arm.com>
4646 * combine.c (can_change_dest_mode): Handle polynomial
4647 REGMODE_NATURAL_SIZE.
4648 * expmed.c (store_bit_field_1): Likewise.
4649 * expr.c (store_constructor): Likewise.
4650 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4651 and polynomial REGMODE_NATURAL_SIZE.
4652 (gen_lowpart_common): Likewise.
4653 * reginfo.c (record_subregs_of_mode): Likewise.
4654 * rtlanal.c (read_modify_subreg_p): Likewise.
4656 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4657 Alan Hayward <alan.hayward@arm.com>
4658 David Sherwood <david.sherwood@arm.com>
4660 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4661 numbers of elements.
4663 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4664 Alan Hayward <alan.hayward@arm.com>
4665 David Sherwood <david.sherwood@arm.com>
4667 * match.pd: Cope with polynomial numbers of vector elements.
4669 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4670 Alan Hayward <alan.hayward@arm.com>
4671 David Sherwood <david.sherwood@arm.com>
4673 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4674 in a POINTER_PLUS_EXPR.
4676 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4677 Alan Hayward <alan.hayward@arm.com>
4678 David Sherwood <david.sherwood@arm.com>
4680 * omp-simd-clone.c (simd_clone_subparts): New function.
4681 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4682 (ipa_simd_modify_function_body): Likewise.
4684 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4685 Alan Hayward <alan.hayward@arm.com>
4686 David Sherwood <david.sherwood@arm.com>
4688 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4689 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4690 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4691 (expand_vector_condition, vector_element): Likewise.
4692 (subparts_gt): New function.
4693 (get_compute_type): Use subparts_gt.
4694 (count_type_subparts): Delete.
4695 (expand_vector_operations_1): Use subparts_gt instead of
4696 count_type_subparts.
4698 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4699 Alan Hayward <alan.hayward@arm.com>
4700 David Sherwood <david.sherwood@arm.com>
4702 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4703 (vect_compile_time_alias): ...this new function. Do the calculation
4704 on poly_ints rather than trees.
4705 (vect_prune_runtime_alias_test_list): Update call accordingly.
4707 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4708 Alan Hayward <alan.hayward@arm.com>
4709 David Sherwood <david.sherwood@arm.com>
4711 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4713 (vect_schedule_slp_instance): Likewise.
4715 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4716 Alan Hayward <alan.hayward@arm.com>
4717 David Sherwood <david.sherwood@arm.com>
4719 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4720 constant and extern definitions for variable-length vectors.
4721 (vect_get_constant_vectors): Note that the number of units
4722 is known to be constant.
4724 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4725 Alan Hayward <alan.hayward@arm.com>
4726 David Sherwood <david.sherwood@arm.com>
4728 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4729 of units as polynomial. Choose between WIDE and NARROW based
4732 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4733 Alan Hayward <alan.hayward@arm.com>
4734 David Sherwood <david.sherwood@arm.com>
4736 * tree-vect-stmts.c (simd_clone_subparts): New function.
4737 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4739 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4740 Alan Hayward <alan.hayward@arm.com>
4741 David Sherwood <david.sherwood@arm.com>
4743 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4744 vectors as polynomial. Use build_index_vector for
4747 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4748 Alan Hayward <alan.hayward@arm.com>
4749 David Sherwood <david.sherwood@arm.com>
4751 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4752 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4753 for variable-length vectors.
4754 (vectorizable_mask_load_store): Treat the number of units as
4755 polynomial, asserting that it is constant if the condition has
4756 already been enforced.
4757 (vectorizable_store, vectorizable_load): Likewise.
4759 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4760 Alan Hayward <alan.hayward@arm.com>
4761 David Sherwood <david.sherwood@arm.com>
4763 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4764 of units as polynomial. Punt if we can't tell at compile time
4765 which vector contains the final result.
4767 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4768 Alan Hayward <alan.hayward@arm.com>
4769 David Sherwood <david.sherwood@arm.com>
4771 * tree-vect-loop.c (vectorizable_induction): Treat the number
4772 of units as polynomial. Punt on SLP inductions. Use an integer
4773 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4774 cast of such a series for variable-length floating-point
4777 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4778 Alan Hayward <alan.hayward@arm.com>
4779 David Sherwood <david.sherwood@arm.com>
4781 * tree.h (build_index_vector): Declare.
4782 * tree.c (build_index_vector): New function.
4783 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4784 of units as polynomial, forcibly converting it to a constant if
4785 vectorizable_reduction has already enforced the condition.
4786 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4787 to create a {1,2,3,...} vector.
4788 (vectorizable_reduction): Treat the number of units as polynomial.
4789 Choose vectype_in based on the largest scalar element size rather
4790 than the smallest number of units. Enforce the restrictions
4793 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4794 Alan Hayward <alan.hayward@arm.com>
4795 David Sherwood <david.sherwood@arm.com>
4797 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4798 number of units as polynomial.
4800 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4801 Alan Hayward <alan.hayward@arm.com>
4802 David Sherwood <david.sherwood@arm.com>
4804 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4805 * target.def (autovectorize_vector_sizes): Return the vector sizes
4806 by pointer, using vector_sizes rather than a bitmask.
4807 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4808 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4809 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4811 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4812 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4813 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4814 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4815 * omp-general.c (omp_max_vf): Likewise.
4816 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4817 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4818 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4819 * tree-vect-slp.c (vect_slp_bb): Likewise.
4820 * doc/tm.texi: Regenerate.
4821 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4823 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4824 the vector size as a poly_uint64 rather than an unsigned int.
4825 (current_vector_size): Change from an unsigned int to a poly_uint64.
4826 (get_vectype_for_scalar_type): Update accordingly.
4827 * tree.h (build_truth_vector_type): Take the size and number of
4828 units as a poly_uint64 rather than an unsigned int.
4829 (build_vector_type): Add a temporary overload that takes
4830 the number of units as a poly_uint64 rather than an unsigned int.
4831 * tree.c (make_vector_type): Likewise.
4832 (build_truth_vector_type): Take the number of units as a poly_uint64
4833 rather than an unsigned int.
4835 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4836 Alan Hayward <alan.hayward@arm.com>
4837 David Sherwood <david.sherwood@arm.com>
4839 * target.def (get_mask_mode): Take the number of units and length
4840 as poly_uint64s rather than unsigned ints.
4841 * targhooks.h (default_get_mask_mode): Update accordingly.
4842 * targhooks.c (default_get_mask_mode): Likewise.
4843 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4844 * doc/tm.texi: Regenerate.
4846 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4847 Alan Hayward <alan.hayward@arm.com>
4848 David Sherwood <david.sherwood@arm.com>
4850 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4851 * omp-general.c (omp_max_vf): Likewise.
4852 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4853 (expand_omp_simd): Handle polynomial safelen.
4854 * omp-low.c (omplow_simd_context): Add a default constructor.
4855 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4856 (lower_rec_simd_input_clauses): Update accordingly.
4857 (lower_rec_input_clauses): Likewise.
4859 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4860 Alan Hayward <alan.hayward@arm.com>
4861 David Sherwood <david.sherwood@arm.com>
4863 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4864 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4865 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4866 (vect_analyze_slp_cost): Likewise.
4867 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4868 (vect_model_load_cost): Likewise.
4870 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4871 Alan Hayward <alan.hayward@arm.com>
4872 David Sherwood <david.sherwood@arm.com>
4874 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4875 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4876 from an unsigned int * to a poly_uint64_pod *.
4877 (calculate_unrolling_factor): New function.
4878 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4880 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4881 Alan Hayward <alan.hayward@arm.com>
4882 David Sherwood <david.sherwood@arm.com>
4884 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4885 from an unsigned int to a poly_uint64.
4886 (_loop_vec_info::slp_unrolling_factor): Likewise.
4887 (_loop_vec_info::vectorization_factor): Change from an int
4889 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4890 (vect_get_num_vectors): New function.
4891 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4892 (vect_get_num_copies): Use vect_get_num_vectors.
4893 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4894 to an unsigned int *.
4895 (vect_analyze_data_refs): Change min_vf from an int * to a
4897 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4898 than an unsigned HOST_WIDE_INT.
4899 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4900 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4901 to an unsigned int *.
4902 (vect_analyze_data_ref_dependences): Likewise.
4903 (vect_compute_data_ref_alignment): Handle polynomial vf.
4904 (vect_enhance_data_refs_alignment): Likewise.
4905 (vect_prune_runtime_alias_test_list): Likewise.
4906 (vect_shift_permute_load_chain): Likewise.
4907 (vect_supportable_dr_alignment): Likewise.
4908 (dependence_distance_ge_vf): Take the vectorization factor as a
4909 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4910 (vect_analyze_data_refs): Change min_vf from an int * to a
4912 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4913 vfm1 as a poly_uint64 rather than an int. Make the same change
4914 for the returned bound_scalar.
4915 (vect_gen_vector_loop_niters): Handle polynomial vf.
4916 (vect_do_peeling): Likewise. Update call to
4917 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4918 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4920 * tree-vect-loop.c (vect_determine_vectorization_factor)
4921 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4922 (vect_get_known_peeling_cost): Likewise.
4923 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4924 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4925 (vect_transform_loop): Likewise. Use the lowest possible VF when
4926 updating the upper bounds of the loop.
4927 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4929 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4930 polynomial unroll factors.
4931 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4932 (vect_make_slp_decision): Likewise.
4933 (vect_supported_load_permutation_p): Likewise, and polynomial
4935 (vect_analyze_slp_cost): Handle polynomial vf.
4936 (vect_slp_analyze_node_operations): Likewise.
4937 (vect_slp_analyze_bb_1): Likewise.
4938 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4939 than an unsigned HOST_WIDE_INT.
4940 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4941 (vectorizable_load): Handle polynomial vf.
4942 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4944 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4946 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4947 Alan Hayward <alan.hayward@arm.com>
4948 David Sherwood <david.sherwood@arm.com>
4950 * match.pd: Handle bit operations involving three constants
4951 and try to fold one pair.
4953 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4955 * tree-vect-loop-manip.c: Include gimple-fold.h.
4956 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4957 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4958 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4959 Add a path that uses a step of VF instead of 1, but disable it
4961 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4962 and niters_no_overflow parameters. Update calls to
4963 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4964 Create a new SSA name if the latter choses to use a ste other
4965 than zero, and return it via niters_vector_mult_vf_var.
4966 * tree-vect-loop.c (vect_transform_loop): Update calls to
4967 vect_do_peeling, vect_gen_vector_loop_niters and
4968 slpeel_make_loop_iterate_ntimes.
4969 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4970 (vect_gen_vector_loop_niters): Update declarations after above changes.
4972 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4974 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4975 128-bit round to integer instructions.
4976 (ceil<mode>2): Likewise.
4977 (btrunc<mode>2): Likewise.
4978 (round<mode>2): Likewise.
4980 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4982 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4983 unaligned VSX load/store on P8/P9.
4984 (expand_block_clear): Allow the use of unaligned VSX
4985 load/store on P8/P9.
4987 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4989 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4991 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4992 swap associated with both a load and a store.
4994 2018-01-02 Andrew Waterman <andrew@sifive.com>
4996 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4997 * config/riscv/riscv.md (clear_cache): Use it.
4999 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
5001 * web.c: Remove out-of-date comment.
5003 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5005 * expr.c (fixup_args_size_notes): Check that any existing
5006 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
5007 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
5008 (emit_single_push_insn): ...here.
5010 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5012 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
5013 (const_vector_encoded_nelts): New function.
5014 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
5015 (const_vector_int_elt, const_vector_elt): Declare.
5016 * emit-rtl.c (const_vector_int_elt_1): New function.
5017 (const_vector_elt): Likewise.
5018 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
5019 of CONST_VECTOR_ELT.
5021 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5023 * expr.c: Include rtx-vector-builder.h.
5024 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
5025 directly on the tree encoding.
5026 (const_vector_from_tree): Likewise.
5027 * optabs.c: Include rtx-vector-builder.h.
5028 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
5029 sequence of "u" values.
5030 * vec-perm-indices.c: Include rtx-vector-builder.h.
5031 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
5032 directly on the vec_perm_indices encoding.
5034 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5036 * doc/rtl.texi (const_vector): Describe new encoding scheme.
5037 * Makefile.in (OBJS): Add rtx-vector-builder.o.
5038 * rtx-vector-builder.h: New file.
5039 * rtx-vector-builder.c: Likewise.
5040 * rtl.h (rtx_def::u2): Add a const_vector field.
5041 (CONST_VECTOR_NPATTERNS): New macro.
5042 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
5043 (CONST_VECTOR_DUPLICATE_P): Likewise.
5044 (CONST_VECTOR_STEPPED_P): Likewise.
5045 (CONST_VECTOR_ENCODED_ELT): Likewise.
5046 (const_vec_duplicate_p): Check for a duplicated vector encoding.
5047 (unwrap_const_vec_duplicate): Likewise.
5048 (const_vec_series_p): Check for a non-duplicated vector encoding.
5049 Say that the function only returns true for integer vectors.
5050 * emit-rtl.c: Include rtx-vector-builder.h.
5051 (gen_const_vec_duplicate_1): Delete.
5052 (gen_const_vector): Call gen_const_vec_duplicate instead of
5053 gen_const_vec_duplicate_1.
5054 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
5055 (gen_const_vec_duplicate): Use rtx_vector_builder.
5056 (gen_const_vec_series): Likewise.
5057 (gen_rtx_CONST_VECTOR): Likewise.
5058 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
5059 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5060 Build a new vector rather than modifying a CONST_VECTOR in-place.
5061 (handle_special_swappables): Update call accordingly.
5062 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
5063 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
5064 Build a new vector rather than modifying a CONST_VECTOR in-place.
5065 (handle_special_swappables): Update call accordingly.
5067 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5069 * simplify-rtx.c (simplify_const_binary_operation): Use
5070 CONST_VECTOR_ELT instead of XVECEXP.
5072 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5074 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
5075 the selector elements to be different from the data elements
5076 if the selector is a VECTOR_CST.
5077 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
5078 ssizetype for the selector.
5080 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5082 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
5083 before testing each element individually.
5084 * tree-vect-generic.c (lower_vec_perm): Likewise.
5086 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5088 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
5089 * selftest-run-tests.c (selftest::run_tests): Call it.
5090 * vector-builder.h (vector_builder::operator ==): New function.
5091 (vector_builder::operator !=): Likewise.
5092 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
5093 (vec_perm_indices::all_from_input_p): New function.
5094 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
5095 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
5096 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
5097 instead of reading the VECTOR_CST directly. Detect whether both
5098 vector inputs are the same before constructing the vec_perm_indices,
5099 and update the number of inputs argument accordingly. Use the
5100 utility functions added above. Only construct sel2 if we need to.
5102 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5104 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
5105 the broadcast of the low byte.
5106 (expand_mult_highpart): Use an explicit encoding for the permutes.
5107 * optabs-query.c (can_mult_highpart_p): Likewise.
5108 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
5109 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5110 (vectorizable_bswap): Likewise.
5111 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
5112 explicit encoding for the power-of-2 permutes.
5113 (vect_permute_store_chain): Likewise.
5114 (vect_grouped_load_supported): Likewise.
5115 (vect_permute_load_chain): Likewise.
5117 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5119 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
5120 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
5121 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
5122 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
5123 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
5124 (vect_gen_perm_mask_any): Likewise.
5126 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5128 * int-vector-builder.h: New file.
5129 * vec-perm-indices.h: Include int-vector-builder.h.
5130 (vec_perm_indices): Redefine as an int_vector_builder.
5131 (auto_vec_perm_indices): Delete.
5132 (vec_perm_builder): Redefine as a stand-alone class.
5133 (vec_perm_indices::vec_perm_indices): New function.
5134 (vec_perm_indices::clamp): Likewise.
5135 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
5136 (vec_perm_indices::new_vector): New function.
5137 (vec_perm_indices::new_expanded_vector): Update for new
5138 vec_perm_indices class.
5139 (vec_perm_indices::rotate_inputs): New function.
5140 (vec_perm_indices::all_in_range_p): Operate directly on the
5141 encoded form, without computing elided elements.
5142 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
5143 encoding. Update for new vec_perm_indices class.
5144 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
5145 the given vec_perm_builder.
5146 (expand_vec_perm_var): Update vec_perm_builder constructor.
5147 (expand_mult_highpart): Use vec_perm_builder instead of
5148 auto_vec_perm_indices.
5149 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
5150 vec_perm_indices instead of auto_vec_perm_indices. Use a single
5151 or double series encoding as appropriate.
5152 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
5153 vec_perm_indices instead of auto_vec_perm_indices.
5154 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5155 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5156 (vect_permute_store_chain): Likewise.
5157 (vect_grouped_load_supported): Likewise.
5158 (vect_permute_load_chain): Likewise.
5159 (vect_shift_permute_load_chain): Likewise.
5160 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5161 (vect_transform_slp_perm_load): Likewise.
5162 (vect_schedule_slp_instance): Likewise.
5163 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5164 (vectorizable_mask_load_store): Likewise.
5165 (vectorizable_bswap): Likewise.
5166 (vectorizable_store): Likewise.
5167 (vectorizable_load): Likewise.
5168 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
5169 vec_perm_indices instead of auto_vec_perm_indices. Use
5170 tree_to_vec_perm_builder to read the vector from a tree.
5171 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
5172 vec_perm_builder instead of a vec_perm_indices.
5173 (have_whole_vector_shift): Use vec_perm_builder and
5174 vec_perm_indices instead of auto_vec_perm_indices. Leave the
5175 truncation to calc_vec_perm_mask_for_shift.
5176 (vect_create_epilog_for_reduction): Likewise.
5177 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
5178 from auto_vec_perm_indices to vec_perm_indices.
5179 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5180 instead of changing individual elements.
5181 (aarch64_vectorize_vec_perm_const): Use new_vector to install
5182 the vector in d.perm.
5183 * config/arm/arm.c (expand_vec_perm_d::perm): Change
5184 from auto_vec_perm_indices to vec_perm_indices.
5185 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
5186 instead of changing individual elements.
5187 (arm_vectorize_vec_perm_const): Use new_vector to install
5188 the vector in d.perm.
5189 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
5190 Update vec_perm_builder constructor.
5191 (rs6000_expand_interleave): Likewise.
5192 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
5193 (rs6000_expand_interleave): Likewise.
5195 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5197 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
5198 to qimode could truncate the indices.
5199 * optabs.c (expand_vec_perm_var): Likewise.
5201 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5203 * Makefile.in (OBJS): Add vec-perm-indices.o.
5204 * vec-perm-indices.h: New file.
5205 * vec-perm-indices.c: Likewise.
5206 * target.h (vec_perm_indices): Replace with a forward class
5208 (auto_vec_perm_indices): Move to vec-perm-indices.h.
5209 * optabs.h: Include vec-perm-indices.h.
5210 (expand_vec_perm): Delete.
5211 (selector_fits_mode_p, expand_vec_perm_var): Declare.
5212 (expand_vec_perm_const): Declare.
5213 * target.def (vec_perm_const_ok): Replace with...
5214 (vec_perm_const): ...this new hook.
5215 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
5216 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
5217 * doc/tm.texi: Regenerate.
5218 * optabs.def (vec_perm_const): Delete.
5219 * doc/md.texi (vec_perm_const): Likewise.
5220 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
5221 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
5222 expand_vec_perm for constant permutation vectors. Assert that
5223 the mode of variable permutation vectors is the integer equivalent
5224 of the mode that is being permuted.
5225 * optabs-query.h (selector_fits_mode_p): Declare.
5226 * optabs-query.c: Include vec-perm-indices.h.
5227 (selector_fits_mode_p): New function.
5228 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
5229 is defined, instead of checking whether the vec_perm_const_optab
5230 exists. Use targetm.vectorize.vec_perm_const instead of
5231 targetm.vectorize.vec_perm_const_ok. Check whether the indices
5232 fit in the vector mode before using a variable permute.
5233 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
5234 vec_perm_indices instead of an rtx.
5235 (expand_vec_perm): Replace with...
5236 (expand_vec_perm_const): ...this new function. Take the selector
5237 as a vec_perm_indices rather than an rtx. Also take the mode of
5238 the selector. Update call to shift_amt_for_vec_perm_mask.
5239 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
5240 Use vec_perm_indices::new_expanded_vector to expand the original
5241 selector into bytes. Check whether the indices fit in the vector
5242 mode before using a variable permute.
5243 (expand_vec_perm_var): Make global.
5244 (expand_mult_highpart): Use expand_vec_perm_const.
5245 * fold-const.c: Includes vec-perm-indices.h.
5246 * tree-ssa-forwprop.c: Likewise.
5247 * tree-vect-data-refs.c: Likewise.
5248 * tree-vect-generic.c: Likewise.
5249 * tree-vect-loop.c: Likewise.
5250 * tree-vect-slp.c: Likewise.
5251 * tree-vect-stmts.c: Likewise.
5252 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
5254 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
5255 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
5256 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
5257 (aarch64_vectorize_vec_perm_const): ...this new function.
5258 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5259 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5260 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
5261 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
5262 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5263 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5264 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
5266 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
5267 check for NEON modes.
5268 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
5269 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
5270 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
5271 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
5273 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
5274 the old VEC_PERM_CONST conditions.
5275 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
5276 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
5277 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
5278 (ia64_vectorize_vec_perm_const_ok): Merge into...
5279 (ia64_vectorize_vec_perm_const): ...this new function.
5280 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
5281 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
5282 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
5283 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
5284 * config/mips/mips.c (mips_expand_vec_perm_const)
5285 (mips_vectorize_vec_perm_const_ok): Merge into...
5286 (mips_vectorize_vec_perm_const): ...this new function.
5287 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
5288 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
5289 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
5290 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
5291 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
5292 (rs6000_expand_vec_perm_const): Delete.
5293 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
5295 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5296 (altivec_expand_vec_perm_const_le): Take each operand individually.
5297 Operate on constant selectors rather than rtxes.
5298 (altivec_expand_vec_perm_const): Likewise. Update call to
5299 altivec_expand_vec_perm_const_le.
5300 (rs6000_expand_vec_perm_const): Delete.
5301 (rs6000_vectorize_vec_perm_const_ok): Delete.
5302 (rs6000_vectorize_vec_perm_const): New function.
5303 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5304 an element count and rtx array.
5305 (rs6000_expand_extract_even): Update call accordingly.
5306 (rs6000_expand_interleave): Likewise.
5307 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
5308 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
5309 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
5310 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
5311 (rs6000_expand_vec_perm_const): Delete.
5312 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5313 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5314 (altivec_expand_vec_perm_const_le): Take each operand individually.
5315 Operate on constant selectors rather than rtxes.
5316 (altivec_expand_vec_perm_const): Likewise. Update call to
5317 altivec_expand_vec_perm_const_le.
5318 (rs6000_expand_vec_perm_const): Delete.
5319 (rs6000_vectorize_vec_perm_const_ok): Delete.
5320 (rs6000_vectorize_vec_perm_const): New function. Remove stray
5321 reference to the SPE evmerge intructions.
5322 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5323 an element count and rtx array.
5324 (rs6000_expand_extract_even): Update call accordingly.
5325 (rs6000_expand_interleave): Likewise.
5326 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
5327 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
5329 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5331 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5333 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
5334 vector mode and that that mode matches the mode of the data
5336 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
5337 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
5338 directly using expand_vec_perm_1 when forcing selectors into
5340 (expand_vec_perm_var): New function, split out from expand_vec_perm.
5342 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5344 * optabs-query.h (can_vec_perm_p): Delete.
5345 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
5346 * optabs-query.c (can_vec_perm_p): Split into...
5347 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
5348 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
5349 particular selector is valid.
5350 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5351 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5352 (vect_grouped_load_supported): Likewise.
5353 (vect_shift_permute_load_chain): Likewise.
5354 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5355 (vect_transform_slp_perm_load): Likewise.
5356 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5357 (vectorizable_bswap): Likewise.
5358 (vect_gen_perm_mask_checked): Likewise.
5359 * fold-const.c (fold_ternary_loc): Likewise. Don't take
5360 implementations of variable permutation vectors into account
5361 when deciding which selector to use.
5362 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
5363 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
5364 with a false third argument.
5365 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
5366 to test whether the constant selector is valid and can_vec_perm_var_p
5367 to test whether a variable selector is valid.
5369 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5371 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
5372 * optabs-query.c (can_vec_perm_p): Likewise.
5373 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
5374 instead of vec_perm_indices.
5375 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
5376 (vect_gen_perm_mask_checked): Likewise,
5377 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
5378 (vect_gen_perm_mask_checked): Likewise,
5380 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5382 * optabs-query.h (qimode_for_vec_perm): Declare.
5383 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
5384 (qimode_for_vec_perm): ...this new function.
5385 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
5387 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
5389 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
5390 does not have a conditional at the top.
5392 2018-01-02 Richard Biener <rguenther@suse.de>
5394 * ipa-inline.c (big_speedup_p): Fix expression.
5396 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
5399 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
5402 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
5406 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
5407 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
5408 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
5409 cond_taken_branch_cost 3->4.
5411 2018-01-01 Jakub Jelinek <jakub@redhat.com>
5413 PR tree-optimization/83581
5414 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
5415 TODO_cleanup_cfg if any changes have been made.
5418 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
5419 convert_modes if target mode has the right side, but different mode
5423 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
5424 last argument when extracting from CONCAT. If either from_real or
5425 from_imag is NULL, use expansion through memory. If result is not
5426 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
5427 the parts directly to inner mode, if even that fails, use expansion
5431 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
5432 check for bswap in mode rather than HImode and use that in expand_unop
5435 Copyright (C) 2018 Free Software Foundation, Inc.
5437 Copying and distribution of this file, with or without modification,
5438 are permitted in any medium without royalty provided the copyright
5439 notice and this notice are preserved.