| blob | 577d19bd35035d4913cb6ed76b8a257f4bfe0553 |
1 2018-01-18 Jakub Jelinek <jakub@redhat.com>
3 PR c/61240
4 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
5 pointer_diff optimizations use view_convert instead of convert.
7 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
9 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
10 Generate different code for -mno-speculate-indirect-jumps.
11 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
12 (*call_indirect_aix<mode>): Disable for
13 -mno-speculate-indirect-jumps.
14 (*call_indirect_aix<mode>_nospec): New define_insn.
15 (*call_value_indirect_aix<mode>): Disable for
16 -mno-speculate-indirect-jumps.
17 (*call_value_indirect_aix<mode>_nospec): New define_insn.
18 (*sibcall_nonlocal_sysv<mode>): Generate different code for
19 -mno-speculate-indirect-jumps.
20 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
22 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
24 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
25 long double type, set the flags for noting the default long double
26 type, even if we don't pass or return a long double type.
28 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
30 PR ipa/83051
31 * ipa-inline.c (flatten_function): Do not overwrite final inlining
32 failure.
34 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
36 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
37 support for merge[hl].
38 (fold_mergehl_helper): New helper function.
39 (tree-vector-builder.h): New #include for tree_vector_builder usage.
40 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
41 (altivec_vmrglw_direct): Add xxmrglw insn.
43 2018-01-17 Andrew Waterman <andrew@sifive.com>
45 * config/riscv/riscv.c (riscv_conditional_register_usage): If
46 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
48 2018-01-17 David Malcolm <dmalcolm@redhat.com>
50 PR lto/83121
51 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
52 call the lto_location_cache before reading the
53 DECL_SOURCE_LOCATION of the types.
55 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
56 Richard Sandiford <richard.sandiford@linaro.org>
58 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
59 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
60 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
61 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
62 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
63 Add declaration.
64 * config/aarch64/constraints.md (aarch64_movti_operand):
65 Limit immediates.
66 * config/aarch64/predicates.md (Uti): Add new constraint.
68 2018-01-17 Carl Love <cel@us.ibm.com>
69 * config/rs6000/vsx.md (define_expand xl_len_r,
70 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
71 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
72 lxvll.
73 (define_expand, define_insn): Move the shift left from the
74 define_insn to the define_expand for lxvl and stxvl instructions.
75 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
76 and XL_LEN_R definitions to PURE.
78 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
80 * config/i386/i386.c (indirect_thunk_name): Declare regno
81 as unsigned int. Compare regno with INVALID_REGNUM.
82 (output_indirect_thunk): Ditto.
83 (output_indirect_thunk_function): Ditto.
84 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
85 in the call to output_indirect_thunk_function.
87 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
89 PR middle-end/83884
90 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
91 rather than the size of inner_type to determine the stack slot size
92 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
94 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
96 PR target/83546
97 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
98 to PTA_SILVERMONT.
100 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
102 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
103 endian Linux systems to optionally enable multilibs for selecting
104 the long double type if the user configured an explicit type.
105 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
106 have no long double multilibs if not defined.
107 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
108 warn if the user used -mabi={ieee,ibm}longdouble and we built
109 multilibs for long double.
110 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
111 appropriate multilib option.
112 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
113 multilib options.
114 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
115 for building long double multilibs.
116 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
118 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
120 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
121 copies.
123 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
124 64 bits.
125 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
126 128 bits.
128 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
129 variables.
131 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
132 return value.
134 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
136 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
137 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
139 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
141 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
142 different rtl trees depending on TARGET_64BIT.
143 (rs6000_gen_lvx): Likewise.
145 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
147 * config/visium/visium.md (nop): Tweak comment.
148 (hazard_nop): Likewise.
150 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
152 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
153 -mspeculate-indirect-jumps.
154 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
155 for -mno-speculate-indirect-jumps.
156 (*call_indirect_elfv2<mode>_nospec): New define_insn.
157 (*call_value_indirect_elfv2<mode>): Disable for
158 -mno-speculate-indirect-jumps.
159 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
160 (indirect_jump): Emit different RTL for
161 -mno-speculate-indirect-jumps.
162 (*indirect_jump<mode>): Disable for
163 -mno-speculate-indirect-jumps.
164 (*indirect_jump<mode>_nospec): New define_insn.
165 (tablejump): Emit different RTL for
166 -mno-speculate-indirect-jumps.
167 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
168 (tablejumpsi_nospec): New define_expand.
169 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
170 (tablejumpdi_nospec): New define_expand.
171 (*tablejump<mode>_internal1): Disable for
172 -mno-speculate-indirect-jumps.
173 (*tablejump<mode>_internal1_nospec): New define_insn.
174 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
175 option.
177 2018-01-16 Artyom Skrobov tyomitch@gmail.com
179 * caller-save.c (insert_save): Drop unnecessary parameter. All
180 callers updated.
182 2018-01-16 Jakub Jelinek <jakub@redhat.com>
183 Richard Biener <rguenth@suse.de>
185 PR libgomp/83590
186 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
187 return early, inline manually is_gimple_sizepos. Make sure if we
188 call gimplify_expr we don't end up with a gimple constant.
189 * tree.c (variably_modified_type_p): Don't return true for
190 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
191 * gimplify.h (is_gimple_sizepos): Remove.
193 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
195 PR tree-optimization/83857
196 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
197 vectorizable_live_operation for pure SLP statements.
198 (vectorizable_live_operation): Handle PHIs.
200 2018-01-16 Richard Biener <rguenther@suse.de>
202 PR tree-optimization/83867
203 * tree-vect-stmts.c (vect_transform_stmt): Precompute
204 nested_in_vect_loop_p since the scalar stmt may get invalidated.
206 2018-01-16 Jakub Jelinek <jakub@redhat.com>
208 PR c/83844
209 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
210 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
211 If off is not INTEGER_CST, issue a may not be aligned warning
212 rather than isn't aligned. Use isn%'t rather than isn't.
213 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
214 into MULT_EXPR.
215 <case MULT_EXPR>: Improve the case when bottom and one of the
216 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
217 operand, in that case check if the other operand is multiple of
218 bottom divided by the INTEGER_CST operand.
220 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
222 PR target/83858
223 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
224 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
225 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
226 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
227 * config/pa/pa.c (pa_function_arg_advance): Likewise.
228 (pa_function_arg, pa_arg_partial_bytes): Likewise.
229 (pa_function_arg_size): New function.
231 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
233 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
234 in a separate statement.
236 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
238 PR tree-optimization/83847
239 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
240 group gathers and scatters.
242 2018-01-16 Jakub Jelinek <jakub@redhat.com>
244 PR rtl-optimization/86620
245 * params.def (max-sched-ready-insns): Bump minimum value to 1.
247 PR rtl-optimization/83213
248 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
249 to last if both are JUMP_INSNs.
251 PR tree-optimization/83843
252 * gimple-ssa-store-merging.c
253 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
254 store_immediate_info for bswap/nop orig_stores.
256 2018-01-15 Andrew Waterman <andrew@sifive.com>
258 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
259 !TARGET_MUL.
260 <UDIV>: Increase cost if !TARGET_DIV.
262 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
264 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
265 (define_attr "cr_logical_3op"): New.
266 (cceq_ior_compare): Adjust.
267 (cceq_ior_compare_complement): Adjust.
268 (*cceq_rev_compare): Adjust.
269 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
270 (is_cracked_insn): Adjust.
271 (insn_must_be_first_in_group): Adjust.
272 * config/rs6000/40x.md: Adjust.
273 * config/rs6000/440.md: Adjust.
274 * config/rs6000/476.md: Adjust.
275 * config/rs6000/601.md: Adjust.
276 * config/rs6000/603.md: Adjust.
277 * config/rs6000/6xx.md: Adjust.
278 * config/rs6000/7450.md: Adjust.
279 * config/rs6000/7xx.md: Adjust.
280 * config/rs6000/8540.md: Adjust.
281 * config/rs6000/cell.md: Adjust.
282 * config/rs6000/e300c2c3.md: Adjust.
283 * config/rs6000/e500mc.md: Adjust.
284 * config/rs6000/e500mc64.md: Adjust.
285 * config/rs6000/e5500.md: Adjust.
286 * config/rs6000/e6500.md: Adjust.
287 * config/rs6000/mpc.md: Adjust.
288 * config/rs6000/power4.md: Adjust.
289 * config/rs6000/power5.md: Adjust.
290 * config/rs6000/power6.md: Adjust.
291 * config/rs6000/power7.md: Adjust.
292 * config/rs6000/power8.md: Adjust.
293 * config/rs6000/power9.md: Adjust.
294 * config/rs6000/rs64.md: Adjust.
295 * config/rs6000/titan.md: Adjust.
297 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
299 * config/i386/predicates.md (indirect_branch_operand): Rewrite
300 ix86_indirect_branch_register logic.
302 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
304 * config/i386/constraints.md (Bs): Update
305 ix86_indirect_branch_register check. Don't check
306 ix86_indirect_branch_register with GOT_memory_operand.
307 (Bw): Likewise.
308 * config/i386/predicates.md (GOT_memory_operand): Don't check
309 ix86_indirect_branch_register here.
310 (GOT32_symbol_operand): Likewise.
312 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
314 * config/i386/predicates.md (constant_call_address_operand):
315 Rewrite ix86_indirect_branch_register logic.
316 (sibcall_insn_operand): Likewise.
318 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
320 * config/i386/constraints.md (Bs): Replace
321 ix86_indirect_branch_thunk_register with
322 ix86_indirect_branch_register.
323 (Bw): Likewise.
324 * config/i386/i386.md (indirect_jump): Likewise.
325 (tablejump): Likewise.
326 (*sibcall_memory): Likewise.
327 (*sibcall_value_memory): Likewise.
328 Peepholes of indirect call and jump via memory: Likewise.
329 * config/i386/i386.opt: Likewise.
330 * config/i386/predicates.md (indirect_branch_operand): Likewise.
331 (GOT_memory_operand): Likewise.
332 (call_insn_operand): Likewise.
333 (sibcall_insn_operand): Likewise.
334 (GOT32_symbol_operand): Likewise.
336 2018-01-15 Jakub Jelinek <jakub@redhat.com>
338 PR middle-end/83837
339 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
340 type rather than type addr's type points to.
341 (expand_omp_atomic_mutex): Likewise.
342 (expand_omp_atomic): Likewise.
344 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
346 PR target/83839
347 * config/i386/i386.c (output_indirect_thunk_function): Use
348 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
349 for __x86_return_thunk.
351 2018-01-15 Richard Biener <rguenther@suse.de>
353 PR middle-end/83850
354 * expmed.c (extract_bit_field_1): Fix typo.
356 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
358 PR target/83687
359 * config/arm/iterators.md (VF): New mode iterator.
360 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
361 Remove integer-related logic from pattern.
362 (neon_vabd<mode>_3): Likewise.
364 2018-01-15 Jakub Jelinek <jakub@redhat.com>
366 PR middle-end/82694
367 * common.opt (fstrict-overflow): No longer an alias.
368 (fwrapv-pointer): New option.
369 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
370 also for pointer types based on flag_wrapv_pointer.
371 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
372 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
373 opts->x_flag_wrapv got set.
374 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
375 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
376 POINTER_TYPE_OVERFLOW_UNDEFINED.
377 * match.pd: Likewise in address comparison pattern.
378 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
380 2018-01-15 Richard Biener <rguenther@suse.de>
382 PR lto/83804
383 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
384 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
385 Reset type names to their identifier if their TYPE_DECL doesn't
386 have linkage (and thus is used for ODR and devirt).
387 (save_debug_info_for_decl): Remove.
388 (save_debug_info_for_type): Likewise.
389 (add_tree_to_fld_list): Adjust.
390 * tree-pretty-print.c (dump_generic_node): Make dumping of
391 type names more robust.
393 2018-01-15 Richard Biener <rguenther@suse.de>
395 * BASE-VER: Bump to 8.0.1.
397 2018-01-14 Martin Sebor <msebor@redhat.com>
399 PR other/83508
400 * builtins.c (check_access): Avoid warning when the no-warning bit
401 is set.
403 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
405 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
406 * ira-color (allocno_hard_regs_compare): Likewise.
408 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
410 PR target/83013
411 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
412 Use .pushsection/.popsection.
414 2018-01-14 Martin Sebor <msebor@redhat.com>
416 PR c++/81327
417 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
419 2018-01-14 Jakub Jelinek <jakub@redhat.com>
421 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
422 entry from extra_headers.
423 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
424 extra_headers, make the list bitwise identical to the i?86-*-* one.
426 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
428 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
429 -mcmodel=large with -mindirect-branch=thunk,
430 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
431 -mfunction-return=thunk-extern.
432 * doc/invoke.texi: Document -mcmodel=large is incompatible with
433 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
434 -mfunction-return=thunk and -mfunction-return=thunk-extern.
436 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
438 * config/i386/i386.c (print_reg): Print the name of the full
439 integer register without '%'.
440 (ix86_print_operand): Handle 'V'.
441 * doc/extend.texi: Document 'V' modifier.
443 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
445 * config/i386/constraints.md (Bs): Disallow memory operand for
446 -mindirect-branch-register.
447 (Bw): Likewise.
448 * config/i386/predicates.md (indirect_branch_operand): Likewise.
449 (GOT_memory_operand): Likewise.
450 (call_insn_operand): Likewise.
451 (sibcall_insn_operand): Likewise.
452 (GOT32_symbol_operand): Likewise.
453 * config/i386/i386.md (indirect_jump): Call convert_memory_address
454 for -mindirect-branch-register.
455 (tablejump): Likewise.
456 (*sibcall_memory): Likewise.
457 (*sibcall_value_memory): Likewise.
458 Disallow peepholes of indirect call and jump via memory for
459 -mindirect-branch-register.
460 (*call_pop): Replace m with Bw.
461 (*call_value_pop): Likewise.
462 (*sibcall_pop_memory): Replace m with Bs.
463 * config/i386/i386.opt (mindirect-branch-register): New option.
464 * doc/invoke.texi: Document -mindirect-branch-register option.
466 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
468 * config/i386/i386-protos.h (ix86_output_function_return): New.
469 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
470 set function_return_type.
471 (indirect_thunk_name): Add ret_p to indicate thunk for function
472 return.
473 (output_indirect_thunk_function): Pass false to
474 indirect_thunk_name.
475 (ix86_output_indirect_branch_via_reg): Likewise.
476 (ix86_output_indirect_branch_via_push): Likewise.
477 (output_indirect_thunk_function): Create alias for function
478 return thunk if regno < 0.
479 (ix86_output_function_return): New function.
480 (ix86_handle_fndecl_attribute): Handle function_return.
481 (ix86_attribute_table): Add function_return.
482 * config/i386/i386.h (machine_function): Add
483 function_return_type.
484 * config/i386/i386.md (simple_return_internal): Use
485 ix86_output_function_return.
486 (simple_return_internal_long): Likewise.
487 * config/i386/i386.opt (mfunction-return=): New option.
488 (indirect_branch): Mention -mfunction-return=.
489 * doc/extend.texi: Document function_return function attribute.
490 * doc/invoke.texi: Document -mfunction-return= option.
492 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
494 * config/i386/i386-opts.h (indirect_branch): New.
495 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
496 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
497 with local indirect jump when converting indirect call and jump.
498 (ix86_set_indirect_branch_type): New.
499 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
500 (indirectlabelno): New.
501 (indirect_thunk_needed): Likewise.
502 (indirect_thunk_bnd_needed): Likewise.
503 (indirect_thunks_used): Likewise.
504 (indirect_thunks_bnd_used): Likewise.
505 (INDIRECT_LABEL): Likewise.
506 (indirect_thunk_name): Likewise.
507 (output_indirect_thunk): Likewise.
508 (output_indirect_thunk_function): Likewise.
509 (ix86_output_indirect_branch_via_reg): Likewise.
510 (ix86_output_indirect_branch_via_push): Likewise.
511 (ix86_output_indirect_branch): Likewise.
512 (ix86_output_indirect_jmp): Likewise.
513 (ix86_code_end): Call output_indirect_thunk_function if needed.
514 (ix86_output_call_insn): Call ix86_output_indirect_branch if
515 needed.
516 (ix86_handle_fndecl_attribute): Handle indirect_branch.
517 (ix86_attribute_table): Add indirect_branch.
518 * config/i386/i386.h (machine_function): Add indirect_branch_type
519 and has_local_indirect_jump.
520 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
521 to true.
522 (tablejump): Likewise.
523 (*indirect_jump): Use ix86_output_indirect_jmp.
524 (*tablejump_1): Likewise.
525 (simple_return_indirect_internal): Likewise.
526 * config/i386/i386.opt (mindirect-branch=): New option.
527 (indirect_branch): New.
528 (keep): Likewise.
529 (thunk): Likewise.
530 (thunk-inline): Likewise.
531 (thunk-extern): Likewise.
532 * doc/extend.texi: Document indirect_branch function attribute.
533 * doc/invoke.texi: Document -mindirect-branch= option.
535 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
537 PR ipa/83051
538 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
540 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
542 * ipa-inline.c (want_inline_small_function_p): Return false if
543 inlining has already failed with CIF_FINAL_ERROR.
544 (update_caller_keys): Call want_inline_small_function_p before
545 can_inline_edge_p.
546 (update_callee_keys): Likewise.
548 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
550 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
551 New function.
552 (rs6000_quadword_masked_address_p): Likewise.
553 (quad_aligned_load_p): Likewise.
554 (quad_aligned_store_p): Likewise.
555 (const_load_sequence_p): Add comment to describe the outer-most loop.
556 (mimic_memory_attributes_and_flags): New function.
557 (rs6000_gen_stvx): Likewise.
558 (replace_swapped_aligned_store): Likewise.
559 (rs6000_gen_lvx): Likewise.
560 (replace_swapped_aligned_load): Likewise.
561 (replace_swapped_load_constant): Capitalize argument name in
562 comment describing this function.
563 (rs6000_analyze_swaps): Add a third pass to search for vector loads
564 and stores that access quad-word aligned addresses and replace
565 with stvx or lvx instructions when appropriate.
566 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
567 New function prototype.
568 (rs6000_quadword_masked_address_p): Likewise.
569 (rs6000_gen_lvx): Likewise.
570 (rs6000_gen_stvx): Likewise.
571 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
572 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
573 when memory address is aligned.
574 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
575 this split to select lvx instruction when memory address is aligned.
576 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
577 instruction when memory address is aligned.
578 (*vsx_le_perm_load_v16qi): Likewise.
579 (four unnamed splitters): Modify to select the stvx instruction
580 when memory is aligned.
582 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
584 * predict.c (determine_unlikely_bbs): Handle correctly BBs
585 which appears in the queue multiple times.
587 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
588 Alan Hayward <alan.hayward@arm.com>
589 David Sherwood <david.sherwood@arm.com>
591 * tree-vectorizer.h (vec_lower_bound): New structure.
592 (_loop_vec_info): Add check_nonzero and lower_bounds.
593 (LOOP_VINFO_CHECK_NONZERO): New macro.
594 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
595 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
596 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
597 fields. Make seg_len the distance travelled, not including the
598 access size.
599 (dr_direction_indicator): Declare.
600 (dr_zero_step_indicator): Likewise.
601 (dr_known_forward_stride_p): Likewise.
602 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
603 tree-ssanames.h.
604 (runtime_alias_check_p): Allow runtime alias checks with
605 variable strides.
606 (operator ==): Compare access_size and align.
607 (prune_runtime_alias_test_list): Rework for new distinction between
608 the access_size and seg_len.
609 (create_intersect_range_checks_index): Likewise. Cope with polynomial
610 segment lengths.
611 (get_segment_min_max): New function.
612 (create_intersect_range_checks): Use it.
613 (dr_step_indicator): New function.
614 (dr_direction_indicator): Likewise.
615 (dr_zero_step_indicator): Likewise.
616 (dr_known_forward_stride_p): Likewise.
617 * tree-loop-distribution.c (data_ref_segment_size): Return
618 DR_STEP * (niters - 1).
619 (compute_alias_check_pairs): Update call to the dr_with_seg_len
620 constructor.
621 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
622 (vect_preserves_scalar_order_p): New function, split out from...
623 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
624 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
625 (vect_vfa_access_size): New function.
626 (vect_vfa_align): Likewise.
627 (vect_compile_time_alias): Take access_size_a and access_b arguments.
628 (dump_lower_bound): New function.
629 (vect_check_lower_bound): Likewise.
630 (vect_small_gap_p): Likewise.
631 (vectorizable_with_step_bound_p): Likewise.
632 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
633 depencies if the vectorization factor is 1. Convert the checks
634 for nonzero steps into checks on the bounds of DR_STEP. Try using
635 a bunds check for variable steps if the minimum required step is
636 relatively small. Update calls to the dr_with_seg_len
637 constructor and to vect_compile_time_alias.
638 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
639 function.
640 (vect_loop_versioning): Call it.
641 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
642 when retrying.
643 (vect_estimate_min_profitable_iters): Account for any bounds checks.
645 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
646 Alan Hayward <alan.hayward@arm.com>
647 David Sherwood <david.sherwood@arm.com>
649 * doc/sourcebuild.texi (vect_scatter_store): Document.
650 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
651 optabs.
652 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
653 Document.
654 * genopinit.c (main): Add supports_vec_scatter_store and
655 supports_vec_scatter_store_cached to target_optabs.
656 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
657 IFN_MASK_SCATTER_STORE.
658 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
659 functions.
660 * internal-fn.h (internal_store_fn_p): Declare.
661 (internal_fn_stored_value_index): Likewise.
662 * internal-fn.c (scatter_store_direct): New macro.
663 (expand_scatter_store_optab_fn): New function.
664 (direct_scatter_store_optab_supported_p): New macro.
665 (internal_store_fn_p): New function.
666 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
667 IFN_MASK_SCATTER_STORE.
668 (internal_fn_mask_index): Likewise.
669 (internal_fn_stored_value_index): New function.
670 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
671 for scatter stores.
672 * optabs-query.h (supports_vec_scatter_store_p): Declare.
673 * optabs-query.c (supports_vec_scatter_store_p): New function.
674 * tree-vectorizer.h (vect_get_store_rhs): Declare.
675 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
676 true for scatter stores.
677 (vect_gather_scatter_fn_p): Handle scatter stores too.
678 (vect_check_gather_scatter): Consider using scatter stores if
679 supports_vec_scatter_store_p.
680 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
681 scatter stores too.
682 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
683 internal_fn_stored_value_index.
684 (check_load_store_masking): Handle scatter stores too.
685 (vect_get_store_rhs): Make public.
686 (vectorizable_call): Use internal_store_fn_p.
687 (vectorizable_store): Handle scatter store internal functions.
688 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
689 when deciding whether the end of the group has been reached.
690 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
691 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
692 (mask_scatter_store<mode>): New insns.
694 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
695 Alan Hayward <alan.hayward@arm.com>
696 David Sherwood <david.sherwood@arm.com>
698 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
699 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
700 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
701 function.
702 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
703 Use vect_truncate_gather_scatter_offset if we can't treat the
704 operation as a normal gather load or scatter store.
705 (get_group_load_store_type): Take the gather_scatter_info
706 as argument. Try using a gather load or scatter store for
707 single-element groups.
708 (get_load_store_type): Update calls to get_group_load_store_type
709 and vect_use_strided_gather_scatters_p.
711 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
712 Alan Hayward <alan.hayward@arm.com>
713 David Sherwood <david.sherwood@arm.com>
715 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
716 optional tree argument.
717 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
718 null target hooks.
719 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
720 but continue to use the current value as a fallback.
721 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
722 to compare the updates.
723 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
724 (get_load_store_type): Use it when handling a strided access.
725 (vect_get_strided_load_store_ops): New function.
726 (vect_get_data_ptr_increment): Likewise.
727 (vectorizable_load): Handle strided gather loads. Always pass
728 a step to vect_create_data_ref_ptr and bump_vector_ptr.
730 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
731 Alan Hayward <alan.hayward@arm.com>
732 David Sherwood <david.sherwood@arm.com>
734 * doc/md.texi (gather_load@var{m}): Document.
735 (mask_gather_load@var{m}): Likewise.
736 * genopinit.c (main): Add supports_vec_gather_load and
737 supports_vec_gather_load_cached to target_optabs.
738 * optabs-tree.c (init_tree_optimization_optabs): Use
739 ggc_cleared_alloc to allocate target_optabs.
740 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
741 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
742 functions.
743 * internal-fn.h (internal_load_fn_p): Declare.
744 (internal_gather_scatter_fn_p): Likewise.
745 (internal_fn_mask_index): Likewise.
746 (internal_gather_scatter_fn_supported_p): Likewise.
747 * internal-fn.c (gather_load_direct): New macro.
748 (expand_gather_load_optab_fn): New function.
749 (direct_gather_load_optab_supported_p): New macro.
750 (direct_internal_fn_optab): New function.
751 (internal_load_fn_p): Likewise.
752 (internal_gather_scatter_fn_p): Likewise.
753 (internal_fn_mask_index): Likewise.
754 (internal_gather_scatter_fn_supported_p): Likewise.
755 * optabs-query.c (supports_at_least_one_mode_p): New function.
756 (supports_vec_gather_load_p): Likewise.
757 * optabs-query.h (supports_vec_gather_load_p): Declare.
758 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
759 and memory_type field.
760 (NUM_PATTERNS): Bump to 15.
761 * tree-vect-data-refs.c: Include internal-fn.h.
762 (vect_gather_scatter_fn_p): New function.
763 (vect_describe_gather_scatter_call): Likewise.
764 (vect_check_gather_scatter): Try using internal functions for
765 gather loads. Recognize existing calls to a gather load function.
766 (vect_analyze_data_refs): Consider using gather loads if
767 supports_vec_gather_load_p.
768 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
769 (vect_get_gather_scatter_offset_type): Likewise.
770 (vect_convert_mask_for_vectype): Likewise.
771 (vect_add_conversion_to_patterm): Likewise.
772 (vect_try_gather_scatter_pattern): Likewise.
773 (vect_recog_gather_scatter_pattern): New pattern recognizer.
774 (vect_vect_recog_func_ptrs): Add it.
775 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
776 internal_fn_mask_index and internal_gather_scatter_fn_p.
777 (check_load_store_masking): Take the gather_scatter_info as an
778 argument and handle gather loads.
779 (vect_get_gather_scatter_ops): New function.
780 (vectorizable_call): Check internal_load_fn_p.
781 (vectorizable_load): Likewise. Handle gather load internal
782 functions.
783 (vectorizable_store): Update call to check_load_store_masking.
784 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
785 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
786 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
787 (aarch64_gather_scale_operand_d): New predicates.
788 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
789 (mask_gather_load<mode>): New insns.
791 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
792 Alan Hayward <alan.hayward@arm.com>
793 David Sherwood <david.sherwood@arm.com>
795 * optabs.def (fold_left_plus_optab): New optab.
796 * doc/md.texi (fold_left_plus_@var{m}): Document.
797 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
798 * internal-fn.c (fold_left_direct): Define.
799 (expand_fold_left_optab_fn): Likewise.
800 (direct_fold_left_optab_supported_p): Likewise.
801 * fold-const-call.c (fold_const_fold_left): New function.
802 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
803 * tree-parloops.c (valid_reduction_p): New function.
804 (gather_scalar_reductions): Use it.
805 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
806 (vect_finish_replace_stmt): Declare.
807 * tree-vect-loop.c (fold_left_reduction_fn): New function.
808 (needs_fold_left_reduction_p): New function, split out from...
809 (vect_is_simple_reduction): ...here. Accept reductions that
810 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
811 (vect_force_simple_reduction): Also store the reduction type in
812 the assignment's STMT_VINFO_REDUC_TYPE.
813 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
814 (merge_with_identity): New function.
815 (vect_expand_fold_left): Likewise.
816 (vectorize_fold_left_reduction): Likewise.
817 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
818 scalar phi in place for it. Check for target support and reject
819 cases that would reassociate the operation. Defer the transform
820 phase to vectorize_fold_left_reduction.
821 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
822 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
823 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
825 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
827 * tree-if-conv.c (predicate_mem_writes): Remove redundant
828 call to ifc_temp_var.
830 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
831 Alan Hayward <alan.hayward@arm.com>
832 David Sherwood <david.sherwood@arm.com>
834 * target.def (legitimize_address_displacement): Take the original
835 offset as a poly_int.
836 * targhooks.h (default_legitimize_address_displacement): Update
837 accordingly.
838 * targhooks.c (default_legitimize_address_displacement): Likewise.
839 * doc/tm.texi: Regenerate.
840 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
841 as an argument, moving assert of ad->disp == ad->disp_term to...
842 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
843 Try calling targetm.legitimize_address_displacement before expanding
844 the address rather than afterwards, and adjust for the new interface.
845 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
846 Match the new hook interface. Handle SVE addresses.
847 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
848 new hook interface.
850 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
852 * Makefile.in (OBJS): Add early-remat.o.
853 * target.def (select_early_remat_modes): New hook.
854 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
855 * doc/tm.texi: Regenerate.
856 * targhooks.h (default_select_early_remat_modes): Declare.
857 * targhooks.c (default_select_early_remat_modes): New function.
858 * timevar.def (TV_EARLY_REMAT): New timevar.
859 * passes.def (pass_early_remat): New pass.
860 * tree-pass.h (make_pass_early_remat): Declare.
861 * early-remat.c: New file.
862 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
863 function.
864 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
866 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
867 Alan Hayward <alan.hayward@arm.com>
868 David Sherwood <david.sherwood@arm.com>
870 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
871 vfm1 with a bound_epilog parameter.
872 (vect_do_peeling): Update calls accordingly, and move the prologue
873 call earlier in the function. Treat the base bound_epilog as 0 for
874 fully-masked loops and retain vf - 1 for other loops. Add 1 to
875 this base when peeling for gaps.
876 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
877 with fully-masked loops.
878 (vect_estimate_min_profitable_iters): Handle the single peeled
879 iteration in that case.
881 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
882 Alan Hayward <alan.hayward@arm.com>
883 David Sherwood <david.sherwood@arm.com>
885 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
886 single-element interleaving even if the size is not a power of 2.
887 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
888 accesses for single-element interleaving if the group size is
889 not a power of 2.
891 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
892 Alan Hayward <alan.hayward@arm.com>
893 David Sherwood <david.sherwood@arm.com>
895 * doc/md.texi (fold_extract_last_@var{m}): Document.
896 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
897 * optabs.def (fold_extract_last_optab): New optab.
898 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
899 * internal-fn.c (fold_extract_direct): New macro.
900 (expand_fold_extract_optab_fn): Likewise.
901 (direct_fold_extract_optab_supported_p): Likewise.
902 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
903 * tree-vect-loop.c (vect_model_reduction_cost): Handle
904 EXTRACT_LAST_REDUCTION.
905 (get_initial_def_for_reduction): Do not create an initial vector
906 for EXTRACT_LAST_REDUCTION reductions.
907 (vectorizable_reduction): Leave the scalar phi in place for
908 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
909 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
910 epilogue code for EXTRACT_LAST_REDUCTION and defer the
911 transform phase to vectorizable_condition.
912 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
913 split out from...
914 (vect_finish_stmt_generation): ...here.
915 (vect_finish_replace_stmt): New function.
916 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
917 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
918 pattern.
919 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
921 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
922 Alan Hayward <alan.hayward@arm.com>
923 David Sherwood <david.sherwood@arm.com>
925 * doc/md.texi (extract_last_@var{m}): Document.
926 * optabs.def (extract_last_optab): New optab.
927 * internal-fn.def (EXTRACT_LAST): New internal function.
928 * internal-fn.c (cond_unary_direct): New macro.
929 (expand_cond_unary_optab_fn): Likewise.
930 (direct_cond_unary_optab_supported_p): Likewise.
931 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
932 loops using EXTRACT_LAST.
933 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
934 (extract_last_<mode>): ...this optab.
935 (vec_extract<mode><Vel>): Update accordingly.
937 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
938 Alan Hayward <alan.hayward@arm.com>
939 David Sherwood <david.sherwood@arm.com>
941 * target.def (empty_mask_is_expensive): New hook.
942 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
943 * doc/tm.texi: Regenerate.
944 * targhooks.h (default_empty_mask_is_expensive): Declare.
945 * targhooks.c (default_empty_mask_is_expensive): New function.
946 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
947 if the target says that empty masks are expensive.
948 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
949 New function.
950 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
952 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
953 Alan Hayward <alan.hayward@arm.com>
954 David Sherwood <david.sherwood@arm.com>
956 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
957 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
958 (vect_use_loop_mask_for_alignment_p): New function.
959 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
960 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
961 niters_skip argument. Make sure that the first niters_skip elements
962 of the first iteration are inactive.
963 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
964 Update call to vect_set_loop_masks_directly.
965 (get_misalign_in_elems): New function, split out from...
966 (vect_gen_prolog_loop_niters): ...here.
967 (vect_update_init_of_dr): Take a code argument that specifies whether
968 the adjustment should be added or subtracted.
969 (vect_update_init_of_drs): Likewise.
970 (vect_prepare_for_masked_peels): New function.
971 (vect_do_peeling): Skip prologue peeling if we're using a mask
972 instead. Update call to vect_update_inits_of_drs.
973 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
974 mask_skip_niters.
975 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
976 alignment. Do not include the number of peeled iterations in
977 the minimum threshold in that case.
978 (vectorizable_induction): Adjust the start value down by
979 LOOP_VINFO_MASK_SKIP_NITERS iterations.
980 (vect_transform_loop): Call vect_prepare_for_masked_peels.
981 Take the number of skipped iterations into account when calculating
982 the loop bounds.
983 * tree-vect-stmts.c (vect_gen_while_not): New function.
985 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
986 Alan Hayward <alan.hayward@arm.com>
987 David Sherwood <david.sherwood@arm.com>
989 * doc/sourcebuild.texi (vect_fully_masked): Document.
990 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
991 default value to 0.
992 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
993 split out from...
994 (vect_analyze_loop_2): ...here. Don't check the vectorization
995 factor against the number of loop iterations if the loop is
996 fully-masked.
998 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
999 Alan Hayward <alan.hayward@arm.com>
1000 David Sherwood <david.sherwood@arm.com>
1002 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1003 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1004 (dump_groups): Update accordingly.
1005 (iv_use::mem_type): New member variable.
1006 (address_p): New function.
1007 (record_use): Add a mem_type argument and initialize the new
1008 mem_type field.
1009 (record_group_use): Add a mem_type argument. Use address_p.
1010 Remove obsolete null checks of base_object. Update call to record_use.
1011 (find_interesting_uses_op): Update call to record_group_use.
1012 (find_interesting_uses_cond): Likewise.
1013 (find_interesting_uses_address): Likewise.
1014 (get_mem_type_for_internal_fn): New function.
1015 (find_address_like_use): Likewise.
1016 (find_interesting_uses_stmt): Try find_address_like_use before
1017 calling find_interesting_uses_op.
1018 (addr_offset_valid_p): Use the iv mem_type field as the type
1019 of the addressed memory.
1020 (add_autoinc_candidates): Likewise.
1021 (get_address_cost): Likewise.
1022 (split_small_address_groups_p): Use address_p.
1023 (split_address_groups): Likewise.
1024 (add_iv_candidate_for_use): Likewise.
1025 (autoinc_possible_for_pair): Likewise.
1026 (rewrite_groups): Likewise.
1027 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1028 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1029 (get_alias_ptr_type_for_ptr_address): New function.
1030 (rewrite_use_address): Rewrite address uses in calls that were
1031 identified by find_address_like_use.
1033 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1034 Alan Hayward <alan.hayward@arm.com>
1035 David Sherwood <david.sherwood@arm.com>
1037 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1038 TARGET_MEM_REFs.
1039 * gimple-expr.h (is_gimple_addressable: Likewise.
1040 * gimple-expr.c (is_gimple_address): Likewise.
1041 * internal-fn.c (expand_call_mem_ref): New function.
1042 (expand_mask_load_optab_fn): Use it.
1043 (expand_mask_store_optab_fn): Likewise.
1045 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1046 Alan Hayward <alan.hayward@arm.com>
1047 David Sherwood <david.sherwood@arm.com>
1049 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1050 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1051 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1052 (cond_umax@var{mode}): Document.
1053 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1054 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1055 (cond_umin_optab, cond_umax_optab): New optabs.
1056 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1057 (COND_IOR, COND_XOR): New internal functions.
1058 * internal-fn.h (get_conditional_internal_fn): Declare.
1059 * internal-fn.c (cond_binary_direct): New macro.
1060 (expand_cond_binary_optab_fn): Likewise.
1061 (direct_cond_binary_optab_supported_p): Likewise.
1062 (get_conditional_internal_fn): New function.
1063 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1064 Cope with reduction statements that are vectorized as calls rather
1065 than assignments.
1066 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1067 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1068 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1069 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1070 (UNSPEC_COND_EOR): New unspecs.
1071 (optab): Add mappings for them.
1072 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1073 (sve_int_op, sve_fp_op): New int attributes.
1075 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1076 Alan Hayward <alan.hayward@arm.com>
1077 David Sherwood <david.sherwood@arm.com>
1079 * optabs.def (while_ult_optab): New optab.
1080 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1081 * internal-fn.def (WHILE_ULT): New internal function.
1082 * internal-fn.h (direct_internal_fn_supported_p): New override
1083 that takes two types as argument.
1084 * internal-fn.c (while_direct): New macro.
1085 (expand_while_optab_fn): New function.
1086 (convert_optab_supported_p): Likewise.
1087 (direct_while_optab_supported_p): New macro.
1088 * wide-int.h (wi::udiv_ceil): New function.
1089 * tree-vectorizer.h (rgroup_masks): New structure.
1090 (vec_loop_masks): New typedef.
1091 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1092 and fully_masked_p.
1093 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1094 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1095 (vect_max_vf): New function.
1096 (slpeel_make_loop_iterate_ntimes): Delete.
1097 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1098 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1099 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1100 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1101 internal-fn.h, stor-layout.h and optabs-query.h.
1102 (vect_set_loop_mask): New function.
1103 (add_preheader_seq): Likewise.
1104 (add_header_seq): Likewise.
1105 (interleave_supported_p): Likewise.
1106 (vect_maybe_permute_loop_masks): Likewise.
1107 (vect_set_loop_masks_directly): Likewise.
1108 (vect_set_loop_condition_masked): Likewise.
1109 (vect_set_loop_condition_unmasked): New function, split out from
1110 slpeel_make_loop_iterate_ntimes.
1111 (slpeel_make_loop_iterate_ntimes): Rename to..
1112 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1113 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1114 (vect_do_peeling): Update call accordingly.
1115 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1116 loops.
1117 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1118 mask_compare_type, can_fully_mask_p and fully_masked_p.
1119 (release_vec_loop_masks): New function.
1120 (_loop_vec_info): Use it to free the loop masks.
1121 (can_produce_all_loop_masks_p): New function.
1122 (vect_get_max_nscalars_per_iter): Likewise.
1123 (vect_verify_full_masking): Likewise.
1124 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1125 retries, and free the mask rgroups before retrying. Check loop-wide
1126 reasons for disallowing fully-masked loops. Make the final decision
1127 about whether use a fully-masked loop or not.
1128 (vect_estimate_min_profitable_iters): Do not assume that peeling
1129 for the number of iterations will be needed for fully-masked loops.
1130 (vectorizable_reduction): Disable fully-masked loops.
1131 (vectorizable_live_operation): Likewise.
1132 (vect_halve_mask_nunits): New function.
1133 (vect_double_mask_nunits): Likewise.
1134 (vect_record_loop_mask): Likewise.
1135 (vect_get_loop_mask): Likewise.
1136 (vect_transform_loop): Handle the case in which the final loop
1137 iteration might handle a partial vector. Call vect_set_loop_condition
1138 instead of slpeel_make_loop_iterate_ntimes.
1139 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1140 (check_load_store_masking): New function.
1141 (prepare_load_store_mask): Likewise.
1142 (vectorizable_store): Handle fully-masked loops.
1143 (vectorizable_load): Likewise.
1144 (supportable_widening_operation): Use vect_halve_mask_nunits for
1145 booleans.
1146 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1147 (vect_gen_while): New function.
1148 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1149 (aarch64_uqdec<mode>): New insn.
1151 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1152 Alan Hayward <alan.hayward@arm.com>
1153 David Sherwood <david.sherwood@arm.com>
1155 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1156 (reduc_xor_scal_optab): New optabs.
1157 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1158 (reduc_xor_scal_@var{m}): Document.
1159 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1160 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1161 internal functions.
1162 * fold-const-call.c (fold_const_call): Handle them.
1163 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1164 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1165 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1166 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1167 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1168 (UNSPEC_XORV): New unspecs.
1169 (optab): Add entries for them.
1170 (BITWISEV): New int iterator.
1171 (bit_reduc_op): New int attributes.
1173 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1174 Alan Hayward <alan.hayward@arm.com>
1175 David Sherwood <david.sherwood@arm.com>
1177 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1178 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1179 * optabs.def (vec_shl_insert_optab): New optab.
1180 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1181 (duplicate_and_interleave): Likewise.
1182 * tree-vect-loop.c: Include internal-fn.h.
1183 (neutral_op_for_slp_reduction): New function, split out from
1184 get_initial_defs_for_reduction.
1185 (get_initial_def_for_reduction): Handle option 2 for variable-length
1186 vectors by loading the neutral value into a vector and then shifting
1187 the initial value into element 0.
1188 (get_initial_defs_for_reduction): Replace the code argument with
1189 the neutral value calculated by neutral_op_for_slp_reduction.
1190 Use gimple_build_vector for constant-length vectors.
1191 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1192 but the first group_size elements have a neutral value.
1193 Use duplicate_and_interleave otherwise.
1194 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1195 Update call to get_initial_defs_for_reduction. Handle SLP
1196 reductions for variable-length vectors by creating one vector
1197 result for each scalar result, with the elements associated
1198 with other scalar results stubbed out with the neutral value.
1199 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1200 Require IFN_VEC_SHL_INSERT for double reductions on
1201 variable-length vectors, or SLP reductions that have
1202 a neutral value. Require can_duplicate_and_interleave_p
1203 support for variable-length unchained SLP reductions if there
1204 is no neutral value, such as for MIN/MAX reductions. Also require
1205 the number of vector elements to be a multiple of the number of
1206 SLP statements when doing variable-length unchained SLP reductions.
1207 Update call to vect_create_epilog_for_reduction.
1208 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1209 and remove initial values.
1210 (duplicate_and_interleave): Make public.
1211 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1212 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1214 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1215 Alan Hayward <alan.hayward@arm.com>
1216 David Sherwood <david.sherwood@arm.com>
1218 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1219 (can_duplicate_and_interleave_p): New function.
1220 (vect_get_and_check_slp_defs): Take the vector of statements
1221 rather than just the current one. Remove excess parentheses.
1222 Restriction rejectinon of vect_constant_def and vect_external_def
1223 for variable-length vectors to boolean types, or types for which
1224 can_duplicate_and_interleave_p is false.
1225 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1226 (duplicate_and_interleave): New function.
1227 (vect_get_constant_vectors): Use gimple_build_vector for
1228 constant-length vectors and suitable variable-length constant
1229 vectors. Use duplicate_and_interleave for other variable-length
1230 vectors. Don't defer the update when inserting new statements.
1232 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1233 Alan Hayward <alan.hayward@arm.com>
1234 David Sherwood <david.sherwood@arm.com>
1236 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1237 min_profitable_iters doesn't go negative.
1239 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1240 Alan Hayward <alan.hayward@arm.com>
1241 David Sherwood <david.sherwood@arm.com>
1243 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1244 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1245 * optabs.def (vec_mask_load_lanes_optab): New optab.
1246 (vec_mask_store_lanes_optab): Likewise.
1247 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1248 (MASK_STORE_LANES): Likewise.
1249 * internal-fn.c (mask_load_lanes_direct): New macro.
1250 (mask_store_lanes_direct): Likewise.
1251 (expand_mask_load_optab_fn): Handle masked operations.
1252 (expand_mask_load_lanes_optab_fn): New macro.
1253 (expand_mask_store_optab_fn): Handle masked operations.
1254 (expand_mask_store_lanes_optab_fn): New macro.
1255 (direct_mask_load_lanes_optab_supported_p): Likewise.
1256 (direct_mask_store_lanes_optab_supported_p): Likewise.
1257 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1258 parameter.
1259 (vect_load_lanes_supported): Likewise.
1260 * tree-vect-data-refs.c (strip_conversion): New function.
1261 (can_group_stmts_p): Likewise.
1262 (vect_analyze_data_ref_accesses): Use it instead of checking
1263 for a pair of assignments.
1264 (vect_store_lanes_supported): Take a masked_p parameter.
1265 (vect_load_lanes_supported): Likewise.
1266 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1267 vect_store_lanes_supported and vect_load_lanes_supported.
1268 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1269 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1270 parameter. Don't allow gaps for masked accesses.
1271 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1272 and vect_load_lanes_supported.
1273 (get_load_store_type): Take a masked_p parameter and update
1274 call to get_group_load_store_type.
1275 (vectorizable_store): Update call to get_load_store_type.
1276 Handle IFN_MASK_STORE_LANES.
1277 (vectorizable_load): Update call to get_load_store_type.
1278 Handle IFN_MASK_LOAD_LANES.
1280 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1281 Alan Hayward <alan.hayward@arm.com>
1282 David Sherwood <david.sherwood@arm.com>
1284 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1285 modes for SVE.
1286 * config/aarch64/aarch64-protos.h
1287 (aarch64_sve_struct_memory_operand_p): Declare.
1288 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1289 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1290 (VPRED, vpred): Handle SVE structure modes.
1291 * config/aarch64/constraints.md (Utx): New constraint.
1292 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1293 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1294 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1295 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1296 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1297 structure modes. Split into pieces after RA.
1298 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1299 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1300 New patterns.
1301 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1302 SVE structure modes.
1303 (aarch64_classify_address): Likewise.
1304 (sizetochar): Move earlier in file.
1305 (aarch64_print_operand): Handle SVE register lists.
1306 (aarch64_array_mode): New function.
1307 (aarch64_sve_struct_memory_operand_p): Likewise.
1308 (TARGET_ARRAY_MODE): Redefine.
1310 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1311 Alan Hayward <alan.hayward@arm.com>
1312 David Sherwood <david.sherwood@arm.com>
1314 * target.def (array_mode): New target hook.
1315 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1316 * doc/tm.texi: Regenerate.
1317 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1318 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1319 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1320 targetm.array_mode.
1321 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1322 type sizes.
1324 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1325 Alan Hayward <alan.hayward@arm.com>
1326 David Sherwood <david.sherwood@arm.com>
1328 * fold-const.c (fold_binary_loc): Check the argument types
1329 rather than the result type when testing for a vector operation.
1331 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1333 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1334 * doc/tm.texi: Regenerate.
1336 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1337 Alan Hayward <alan.hayward@arm.com>
1338 David Sherwood <david.sherwood@arm.com>
1340 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1341 (sve): Document new AArch64 extension.
1342 * doc/md.texi (w): Extend the description of the AArch64
1343 constraint to include SVE vectors.
1344 (Upl, Upa): Document new AArch64 predicate constraints.
1345 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1346 enum.
1347 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1348 (msve-vector-bits=): New option.
1349 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1350 SVE when these are disabled.
1351 (sve): New extension.
1352 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1353 modes. Adjust their number of units based on aarch64_sve_vg.
1354 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1355 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1356 aarch64_addr_query_type.
1357 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1358 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1359 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1360 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1361 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1362 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1363 (aarch64_simd_imm_zero_p): Delete.
1364 (aarch64_check_zero_based_sve_index_immediate): Declare.
1365 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1366 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1367 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1368 (aarch64_sve_float_mul_immediate_p): Likewise.
1369 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1370 rather than an rtx.
1371 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1372 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1373 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1374 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1375 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1376 (aarch64_regmode_natural_size): Likewise.
1377 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1378 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1379 left one place.
1380 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1381 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1382 for VG and the SVE predicate registers.
1383 (V_ALIASES): Add a "z"-prefixed alias.
1384 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1385 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1386 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1387 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1388 (REG_CLASS_NAMES): Add entries for them.
1389 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1390 and the predicate registers.
1391 (aarch64_sve_vg): Declare.
1392 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1393 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1394 (REGMODE_NATURAL_SIZE): Define.
1395 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1396 SVE macros.
1397 * config/aarch64/aarch64.c: Include cfgrtl.h.
1398 (simd_immediate_info): Add a constructor for series vectors,
1399 and an associated step field.
1400 (aarch64_sve_vg): New variable.
1401 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1402 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1403 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1404 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1405 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1406 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1407 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1408 (aarch64_get_mask_mode): New functions.
1409 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1410 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1411 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1412 predicate modes and predicate registers. Explicitly restrict
1413 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1414 to store a vector mode if it is recognized by
1415 aarch64_classify_vector_mode.
1416 (aarch64_regmode_natural_size): New function.
1417 (aarch64_hard_regno_caller_save_mode): Return the original mode
1418 for predicates.
1419 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1420 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1421 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1422 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1423 functions.
1424 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1425 does not overlap dest if the function is frame-related. Handle
1426 SVE constants.
1427 (aarch64_split_add_offset): New function.
1428 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1429 them aarch64_add_offset.
1430 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1431 and update call to aarch64_sub_sp.
1432 (aarch64_add_cfa_expression): New function.
1433 (aarch64_expand_prologue): Pass extra temporary registers to the
1434 functions above. Handle the case in which we need to emit new
1435 DW_CFA_expressions for registers that were originally saved
1436 relative to the stack pointer, but now have to be expressed
1437 relative to the frame pointer.
1438 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1439 functions above.
1440 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1441 IP0 and IP1 values for SVE frames.
1442 (aarch64_expand_vec_series): New function.
1443 (aarch64_expand_sve_widened_duplicate): Likewise.
1444 (aarch64_expand_sve_const_vector): Likewise.
1445 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1446 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1447 into the register, rather than emitting a SET directly.
1448 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1449 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1450 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1451 (offset_9bit_signed_scaled_p): New functions.
1452 (aarch64_replicate_bitmask_imm): New function.
1453 (aarch64_bitmask_imm): Use it.
1454 (aarch64_cannot_force_const_mem): Reject expressions involving
1455 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1456 (aarch64_classify_index): Handle SVE indices, by requiring
1457 a plain register index with a scale that matches the element size.
1458 (aarch64_classify_address): Handle SVE addresses. Assert that
1459 the mode of the address is VOIDmode or an integer mode.
1460 Update call to aarch64_classify_symbol.
1461 (aarch64_classify_symbolic_expression): Update call to
1462 aarch64_classify_symbol.
1463 (aarch64_const_vec_all_in_range_p): New function.
1464 (aarch64_print_vector_float_operand): Likewise.
1465 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1466 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1467 and the FP immediates 1.0 and 0.5.
1468 (aarch64_print_address_internal): Handle SVE addresses.
1469 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1470 (aarch64_regno_regclass): Handle predicate registers.
1471 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1472 data modes.
1473 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1474 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1475 (aarch64_convert_sve_vector_bits): New function.
1476 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1477 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1478 rather than an rtx.
1479 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1480 Handle SVE vector and predicate modes. Accept VL-based constants
1481 that need only one temporary register, and VL offsets that require
1482 no temporary registers.
1483 (aarch64_conditional_register_usage): Mark the predicate registers
1484 as fixed if SVE isn't available.
1485 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1486 Return true for SVE vector and predicate modes.
1487 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1488 rather than an unsigned int. Handle SVE modes.
1489 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1490 SVE modes.
1491 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1492 if SVE is enabled.
1493 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1494 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1495 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1496 (aarch64_sve_float_mul_immediate_p): New functions.
1497 (aarch64_sve_valid_immediate): New function.
1498 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1499 Explicitly reject structure modes. Check for INDEX constants.
1500 Handle PTRUE and PFALSE constants.
1501 (aarch64_check_zero_based_sve_index_immediate): New function.
1502 (aarch64_simd_imm_zero_p): Delete.
1503 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1504 vector modes. Accept constants in the range of CNT[BHWD].
1505 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1506 ask for an Advanced SIMD mode.
1507 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1508 (aarch64_simd_vector_alignment): Handle SVE predicates.
1509 (aarch64_vectorize_preferred_vector_alignment): New function.
1510 (aarch64_simd_vector_alignment_reachable): Use it instead of
1511 the vector size.
1512 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1513 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1514 functions.
1515 (MAX_VECT_LEN): Delete.
1516 (expand_vec_perm_d): Add a vec_flags field.
1517 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1518 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1519 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1520 for SVE modes.
1521 (aarch64_evpc_rev): Rename to...
1522 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1523 (aarch64_evpc_rev_global): New function.
1524 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1525 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1526 MAX_VECT_LEN.
1527 (aarch64_evpc_sve_tbl): New function.
1528 (aarch64_expand_vec_perm_const_1): Update after rename of
1529 aarch64_evpc_rev. Handle SVE permutes too, trying
1530 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1531 than aarch64_evpc_tbl.
1532 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1533 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1534 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1535 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1536 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1537 (aarch64_expand_sve_vcond): New functions.
1538 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1539 of aarch64_vector_mode_p.
1540 (aarch64_dwarf_poly_indeterminate_value): New function.
1541 (aarch64_compute_pressure_classes): Likewise.
1542 (aarch64_can_change_mode_class): Likewise.
1543 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1544 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1545 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1546 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1547 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1548 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1549 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1550 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1551 constraints.
1552 (Dn, Dl, Dr): Accept const as well as const_vector.
1553 (Dz): Likewise. Compare against CONST0_RTX.
1554 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1555 of "vector" where appropriate.
1556 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1557 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1558 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1559 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1560 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1561 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1562 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1563 (v_int_equiv): Extend to SVE modes.
1564 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1565 mode attributes.
1566 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1567 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1568 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1569 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1570 (SVE_COND_FP_CMP): New int iterators.
1571 (perm_hilo): Handle the new unpack unspecs.
1572 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1573 attributes.
1574 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1575 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1576 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1577 (aarch64_equality_operator, aarch64_constant_vector_operand)
1578 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1579 (aarch64_sve_nonimmediate_operand): Likewise.
1580 (aarch64_sve_general_operand): Likewise.
1581 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1582 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1583 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1584 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1585 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1586 (aarch64_sve_float_arith_immediate): Likewise.
1587 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1588 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1589 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1590 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1591 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1592 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1593 (aarch64_sve_float_arith_operand): Likewise.
1594 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1595 (aarch64_sve_float_mul_operand): Likewise.
1596 (aarch64_sve_vec_perm_operand): Likewise.
1597 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1598 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1599 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1600 as well as const_vector.
1601 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1602 in file. Use CONST0_RTX and CONSTM1_RTX.
1603 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1604 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1605 Use aarch64_simd_imm_zero.
1606 * config/aarch64/aarch64-sve.md: New file.
1607 * config/aarch64/aarch64.md: Include it.
1608 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1609 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1610 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1611 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1612 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1613 (sve): New attribute.
1614 (enabled): Disable instructions with the sve attribute unless
1615 TARGET_SVE.
1616 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1617 aarch64_expand_mov_immediate.
1618 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1619 CNT[BHSD] immediates.
1620 (movti): Split CONST_POLY_INT moves into two halves.
1621 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1622 Split additions that need a temporary here if the destination
1623 is the stack pointer.
1624 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1625 (*add<mode>3_poly_1): New instruction.
1626 (set_clobber_cc): New expander.
1628 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1630 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1631 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1632 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1633 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1634 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1635 Change innermode from fixed_mode_size to machine_mode.
1636 (simplify_subreg): Update call accordingly. Handle a constant-sized
1637 subreg of a variable-length CONST_VECTOR.
1639 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1640 Alan Hayward <alan.hayward@arm.com>
1641 David Sherwood <david.sherwood@arm.com>
1643 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1644 (add_offset_to_base): New function, split out from...
1645 (create_mem_ref): ...here. When handling a scale other than 1,
1646 check first whether the address is valid without the offset.
1647 Add it into the base if so, leaving the index and scale as-is.
1649 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1651 PR c++/83778
1652 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1653 fold_for_warn before checking if arg2 is INTEGER_CST.
1655 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1657 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1658 (store_multiple_operation): Delete.
1659 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1660 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1661 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1662 guarded by TARGET_STRING.
1663 (rs6000_output_load_multiple): Delete.
1664 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1665 OPTION_MASK_STRING / TARGET_STRING handling.
1666 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1667 (const rs6000_opt_masks) <"string">: Change mask to 0.
1668 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1669 (MASK_STRING): Delete.
1670 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1671 parts. Simplify.
1672 (load_multiple): Delete.
1673 (*ldmsi8): Delete.
1674 (*ldmsi7): Delete.
1675 (*ldmsi6): Delete.
1676 (*ldmsi5): Delete.
1677 (*ldmsi4): Delete.
1678 (*ldmsi3): Delete.
1679 (store_multiple): Delete.
1680 (*stmsi8): Delete.
1681 (*stmsi7): Delete.
1682 (*stmsi6): Delete.
1683 (*stmsi5): Delete.
1684 (*stmsi4): Delete.
1685 (*stmsi3): Delete.
1686 (movmemsi_8reg): Delete.
1687 (corresponding unnamed define_insn): Delete.
1688 (movmemsi_6reg): Delete.
1689 (corresponding unnamed define_insn): Delete.
1690 (movmemsi_4reg): Delete.
1691 (corresponding unnamed define_insn): Delete.
1692 (movmemsi_2reg): Delete.
1693 (corresponding unnamed define_insn): Delete.
1694 (movmemsi_1reg): Delete.
1695 (corresponding unnamed define_insn): Delete.
1696 * config/rs6000/rs6000.opt (mno-string): New.
1697 (mstring): Replace by deprecation warning stub.
1698 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1700 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1702 * regrename.c (regrename_do_replace): If replacing the same
1703 reg multiple times, try to reuse last created gen_raw_REG.
1705 PR debug/81155
1706 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1707 main to workaround a bug in GDB.
1709 2018-01-12 Tom de Vries <tom@codesourcery.com>
1711 PR target/83737
1712 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1714 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1716 PR rtl-optimization/80481
1717 * ira-color.c (get_cap_member): New function.
1718 (allocnos_conflict_by_live_ranges_p): Use it.
1719 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1720 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1722 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1724 PR target/83628
1725 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1726 (*saddl_se_1): Ditto.
1727 (*ssubsi_1): Ditto.
1728 (*ssubl_se_1): Ditto.
1730 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1732 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1733 rather than wi::to_widest for DR_INITs.
1734 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1735 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1736 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1737 INTEGER_CSTs.
1738 (vect_analyze_group_access_1): Note that here.
1740 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1742 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1743 polynomial type sizes.
1745 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1747 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1748 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1749 (gimple_add_tmp_var): Likewise.
1751 2018-01-12 Martin Liska <mliska@suse.cz>
1753 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1754 (gimple_alloc_sizes): Likewise.
1755 (dump_gimple_statistics): Use PRIu64 in printf format.
1756 * gimple.h: Change uint64_t to int.
1758 2018-01-12 Martin Liska <mliska@suse.cz>
1760 * tree-core.h: Use uint64_t instead of int.
1761 * tree.c (tree_node_counts): Likewise.
1762 (tree_node_sizes): Likewise.
1763 (dump_tree_statistics): Use PRIu64 in printf format.
1765 2018-01-12 Martin Liska <mliska@suse.cz>
1767 * Makefile.in: As qsort_chk is implemented in vec.c, add
1768 vec.o to linkage of gencfn-macros.
1769 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1770 passing the info to record_node_allocation_statistics.
1771 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1772 and pass the info.
1773 * ggc-common.c (struct ggc_usage): Add operator== and use
1774 it in operator< and compare function.
1775 * mem-stats.h (struct mem_usage): Likewise.
1776 * vec.c (struct vec_usage): Remove operator< and compare
1777 function. Can be simply inherited.
1779 2018-01-12 Martin Jambor <mjambor@suse.cz>
1781 PR target/81616
1782 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1783 * tree-ssa-math-opts.c: Include domwalk.h.
1784 (convert_mult_to_fma_1): New function.
1785 (fma_transformation_info): New type.
1786 (fma_deferring_state): Likewise.
1787 (cancel_fma_deferring): New function.
1788 (result_of_phi): Likewise.
1789 (last_fma_candidate_feeds_initial_phi): Likewise.
1790 (convert_mult_to_fma): Added deferring logic, split actual
1791 transformation to convert_mult_to_fma_1.
1792 (math_opts_dom_walker): New type.
1793 (math_opts_dom_walker::after_dom_children): New method, body moved
1794 here from pass_optimize_widening_mul::execute, added deferring logic
1795 bits.
1796 (pass_optimize_widening_mul::execute): Moved most of code to
1797 math_opts_dom_walker::after_dom_children.
1798 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1799 * config/i386/i386.c (ix86_option_override_internal): Added
1800 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1802 2018-01-12 Richard Biener <rguenther@suse.de>
1804 PR debug/83157
1805 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1806 inline instance vars.
1808 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1810 PR target/81819
1811 * config/rx/rx.c (rx_is_restricted_memory_address):
1812 Handle SUBREG case.
1814 2018-01-12 Richard Biener <rguenther@suse.de>
1816 PR tree-optimization/80846
1817 * target.def (split_reduction): New target hook.
1818 * targhooks.c (default_split_reduction): New function.
1819 * targhooks.h (default_split_reduction): Declare.
1820 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1821 target requests first reduce vectors by combining low and high
1822 parts.
1823 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1824 (get_vectype_for_scalar_type_and_size): Export.
1825 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1826 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1827 * doc/tm.texi: Regenerate.
1828 * config/i386/i386.c (ix86_split_reduction): Implement
1829 TARGET_VECTORIZE_SPLIT_REDUCTION.
1831 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1833 PR target/83368
1834 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1835 in PIC mode except for TARGET_VXWORKS_RTP.
1836 * config/sparc/sparc.c: Include cfgrtl.h.
1837 (TARGET_INIT_PIC_REG): Define.
1838 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1839 (sparc_pic_register_p): New predicate.
1840 (sparc_legitimate_address_p): Use it.
1841 (sparc_legitimize_pic_address): Likewise.
1842 (sparc_delegitimize_address): Likewise.
1843 (sparc_mode_dependent_address_p): Likewise.
1844 (gen_load_pcrel_sym): Remove 4th parameter.
1845 (load_got_register): Adjust call to above. Remove obsolete stuff.
1846 (sparc_expand_prologue): Do not call load_got_register here.
1847 (sparc_flat_expand_prologue): Likewise.
1848 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1849 (sparc_use_pseudo_pic_reg): New function.
1850 (sparc_init_pic_reg): Likewise.
1851 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1852 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1854 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1856 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1857 Add item for branch_cost.
1859 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1861 PR rtl-optimization/83565
1862 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1863 not extend the result to a larger mode for rotate operations.
1864 (num_sign_bit_copies1): Likewise.
1866 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1868 PR target/40411
1869 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1870 -symbolic.
1871 Use values-Xc.o for -pedantic.
1872 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1874 2018-01-12 Martin Liska <mliska@suse.cz>
1876 PR ipa/83054
1877 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1878 New function.
1879 (possible_polymorphic_call_targets): Use it.
1880 (ipa_devirt): Likewise.
1882 2018-01-12 Martin Liska <mliska@suse.cz>
1884 * profile-count.h (enum profile_quality): Use 0 as invalid
1885 enum value of profile_quality.
1887 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1889 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1890 -mext-string options.
1892 2018-01-12 Richard Biener <rguenther@suse.de>
1894 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1895 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1896 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1897 Likewise.
1898 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1900 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1902 * configure.ac (--with-long-double-format): Add support for the
1903 configuration option to change the default long double format on
1904 PowerPC systems.
1905 * config.gcc (powerpc*-linux*-*): Likewise.
1906 * configure: Regenerate.
1907 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1908 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1909 used without modification.
1911 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1913 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1914 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1915 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1916 MISC_BUILTIN_SPEC_BARRIER.
1917 (rs6000_init_builtins): Likewise.
1918 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1919 enum value.
1920 (speculation_barrier): New define_insn.
1921 * doc/extend.texi: Document __builtin_speculation_barrier.
1923 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1925 PR target/83203
1926 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1927 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1928 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1929 iterators.
1930 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1931 integral modes instead of "ss" and "sd".
1932 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1933 vectors with 32-bit and 64-bit elements.
1934 (vecdupssescalarmodesuffix): New mode attribute.
1935 (vec_dup<mode>): Use it.
1937 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1939 PR target/83330
1940 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1941 frame if argument is passed on stack.
1943 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1945 PR target/82682
1946 * ree.c (combine_reaching_defs): Optimize also
1947 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1948 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1950 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1952 PR middle-end/83189
1953 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1955 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1957 PR middle-end/83718
1958 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1959 after they are computed.
1961 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1963 PR tree-optimization/83695
1964 * gimple-loop-linterchange.cc
1965 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1966 reset cached scev information after interchange.
1967 (pass_linterchange::execute): Remove call to scev_reset_htab.
1969 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1971 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1972 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1973 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1974 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1975 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1976 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1977 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1978 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1979 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1980 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1981 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1982 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1983 (V_lane_reg): Likewise.
1984 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1985 New define_expand.
1986 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1987 (vfmal_lane_low<mode>_intrinsic,
1988 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1989 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1990 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1991 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1992 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1993 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1995 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1997 * config/arm/arm-cpus.in (fp16fml): New feature.
1998 (ALL_SIMD): Add fp16fml.
1999 (armv8.2-a): Add fp16fml as an option.
2000 (armv8.3-a): Likewise.
2001 (armv8.4-a): Add fp16fml as part of fp16.
2002 * config/arm/arm.h (TARGET_FP16FML): Define.
2003 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2004 when appropriate.
2005 * config/arm/arm-modes.def (V2HF): Define.
2006 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2007 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2008 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2009 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2010 vfmsl_low, vfmsl_high): New set of builtins.
2011 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2012 (vfml_op): New code attribute.
2013 (VFMLHALVES): New int iterator.
2014 (VFML, VFMLSEL): New mode attributes.
2015 (V_reg): Define mapping for V2HF.
2016 (V_hi, V_lo): New mode attributes.
2017 (VF_constraint): Likewise.
2018 (vfml_half, vfml_half_selector): New int attributes.
2019 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2020 define_expand.
2021 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2022 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2023 New define_insn.
2024 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2025 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2026 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2027 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2028 documentation.
2029 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2030 Document new effective target and option set.
2032 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2034 * config/arm/arm-cpus.in (armv8_4): New feature.
2035 (ARMv8_4a): New fgroup.
2036 (armv8.4-a): New arch.
2037 * config/arm/arm-tables.opt: Regenerate.
2038 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2039 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2040 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2041 Add matching rules for -march=armv8.4-a and extensions.
2042 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2044 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2046 PR target/81821
2047 * config/rx/rx.md (BW): New mode attribute.
2048 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2050 2018-01-11 Richard Biener <rguenther@suse.de>
2052 PR tree-optimization/83435
2053 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2054 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2055 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2057 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2058 Alan Hayward <alan.hayward@arm.com>
2059 David Sherwood <david.sherwood@arm.com>
2061 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2062 field.
2063 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2064 (aarch64_print_address_internal): Use it to check for a zero offset.
2066 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2067 Alan Hayward <alan.hayward@arm.com>
2068 David Sherwood <david.sherwood@arm.com>
2070 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2071 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2072 Return a poly_int64 rather than a HOST_WIDE_INT.
2073 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2074 rather than a HOST_WIDE_INT.
2075 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2076 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2077 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2078 final_offset from HOST_WIDE_INT to poly_int64.
2079 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2080 to_constant when getting the number of units in an Advanced SIMD
2081 mode.
2082 (aarch64_builtin_vectorized_function): Check for a constant number
2083 of units.
2084 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2085 GET_MODE_SIZE.
2086 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2087 attribute instead of GET_MODE_NUNITS.
2088 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2089 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2090 GET_MODE_SIZE for fixed-size registers.
2091 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2092 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2093 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2094 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2095 (aarch64_print_operand, aarch64_print_address_internal)
2096 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2097 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2098 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2099 Handle polynomial GET_MODE_SIZE.
2100 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2101 wider than SImode without modification.
2102 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2103 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2104 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2105 passing and returning SVE modes.
2106 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2107 rather than GEN_INT.
2108 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2109 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2110 (aarch64_allocate_and_probe_stack_space): Likewise.
2111 (aarch64_layout_frame): Cope with polynomial offsets.
2112 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2113 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2114 polynomial offsets.
2115 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2116 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2117 poly_int64 rather than a HOST_WIDE_INT.
2118 (aarch64_get_separate_components, aarch64_process_components)
2119 (aarch64_expand_prologue, aarch64_expand_epilogue)
2120 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2121 (aarch64_anchor_offset): New function, split out from...
2122 (aarch64_legitimize_address): ...here.
2123 (aarch64_builtin_vectorization_cost): Handle polynomial
2124 TYPE_VECTOR_SUBPARTS.
2125 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2126 GET_MODE_NUNITS.
2127 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2128 number of elements from the PARALLEL rather than the mode.
2129 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2130 rather than GET_MODE_BITSIZE.
2131 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2132 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2133 (aarch64_expand_vec_perm_const_1): Handle polynomial
2134 d->perm.length () and d->perm elements.
2135 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2136 Apply to_constant to d->perm elements.
2137 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2138 polynomial CONST_VECTOR_NUNITS.
2139 (aarch64_move_pointer): Take amount as a poly_int64 rather
2140 than an int.
2141 (aarch64_progress_pointer): Avoid temporary variable.
2142 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2143 the mode attribute instead of GET_MODE.
2145 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2146 Alan Hayward <alan.hayward@arm.com>
2147 David Sherwood <david.sherwood@arm.com>
2149 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2150 x exists before using it.
2151 (aarch64_add_constant_internal): Rename to...
2152 (aarch64_add_offset_1): ...this. Replace regnum with separate
2153 src and dest rtxes. Handle the case in which they're different,
2154 including when the offset is zero. Replace scratchreg with an rtx.
2155 Use 2 additions if there is no spare register into which we can
2156 move a 16-bit constant.
2157 (aarch64_add_constant): Delete.
2158 (aarch64_add_offset): Replace reg with separate src and dest
2159 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2160 Use aarch64_add_offset_1.
2161 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2162 an rtx rather than an int. Take the delta as a poly_int64
2163 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2164 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2165 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2166 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2167 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2168 and aarch64_add_sp.
2169 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2170 aarch64_add_constant.
2172 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2174 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2175 Use scalar_float_mode.
2177 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2179 * config/aarch64/aarch64-simd.md
2180 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2181 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2182 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2183 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2184 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2185 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2186 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2187 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2188 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2189 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2191 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2193 PR target/83514
2194 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2195 targ_options->x_arm_arch_string is non NULL.
2197 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2199 * config/aarch64/aarch64.h
2200 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2202 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2204 PR target/82096
2205 * expmed.c (emit_store_flag_force): Swap if const op0
2206 and change VOIDmode to mode of op0.
2208 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2210 PR rtl-optimization/83761
2211 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2212 than bytes to mode_for_size.
2214 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2216 PR middle-end/83189
2217 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2218 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2219 profile.
2221 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2223 PR middle-end/83575
2224 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2225 when in layout mode.
2226 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2227 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2228 partition fixup.
2230 2018-01-10 Michael Collison <michael.collison@arm.com>
2232 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2233 * config/aarch64/aarch64-option-extension.def: Add
2234 AARCH64_OPT_EXTENSION of 'fp16fml'.
2235 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2236 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2237 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2238 * config/aarch64/constraints.md (Ui7): New constraint.
2239 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2240 (VFMLA_SEL_W): Ditto.
2241 (f16quad): Ditto.
2242 (f16mac1): Ditto.
2243 (VFMLA16_LOW): New int iterator.
2244 (VFMLA16_HIGH): Ditto.
2245 (UNSPEC_FMLAL): New unspec.
2246 (UNSPEC_FMLSL): Ditto.
2247 (UNSPEC_FMLAL2): Ditto.
2248 (UNSPEC_FMLSL2): Ditto.
2249 (f16mac): New code attribute.
2250 * config/aarch64/aarch64-simd-builtins.def
2251 (aarch64_fmlal_lowv2sf): Ditto.
2252 (aarch64_fmlsl_lowv2sf): Ditto.
2253 (aarch64_fmlalq_lowv4sf): Ditto.
2254 (aarch64_fmlslq_lowv4sf): Ditto.
2255 (aarch64_fmlal_highv2sf): Ditto.
2256 (aarch64_fmlsl_highv2sf): Ditto.
2257 (aarch64_fmlalq_highv4sf): Ditto.
2258 (aarch64_fmlslq_highv4sf): Ditto.
2259 (aarch64_fmlal_lane_lowv2sf): Ditto.
2260 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2261 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2262 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2263 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2264 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2265 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2266 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2267 (aarch64_fmlal_lane_highv2sf): Ditto.
2268 (aarch64_fmlsl_lane_highv2sf): Ditto.
2269 (aarch64_fmlal_laneq_highv2sf): Ditto.
2270 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2271 (aarch64_fmlalq_lane_highv4sf): Ditto.
2272 (aarch64_fmlsl_lane_highv4sf): Ditto.
2273 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2274 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2275 * config/aarch64/aarch64-simd.md:
2276 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2277 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2278 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2279 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2280 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2281 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2282 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2283 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2284 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2285 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2286 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2287 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2288 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2289 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2290 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2291 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2292 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2293 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2294 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2295 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2296 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2297 (vfmlsl_low_u32): Ditto.
2298 (vfmlalq_low_u32): Ditto.
2299 (vfmlslq_low_u32): Ditto.
2300 (vfmlal_high_u32): Ditto.
2301 (vfmlsl_high_u32): Ditto.
2302 (vfmlalq_high_u32): Ditto.
2303 (vfmlslq_high_u32): Ditto.
2304 (vfmlal_lane_low_u32): Ditto.
2305 (vfmlsl_lane_low_u32): Ditto.
2306 (vfmlal_laneq_low_u32): Ditto.
2307 (vfmlsl_laneq_low_u32): Ditto.
2308 (vfmlalq_lane_low_u32): Ditto.
2309 (vfmlslq_lane_low_u32): Ditto.
2310 (vfmlalq_laneq_low_u32): Ditto.
2311 (vfmlslq_laneq_low_u32): Ditto.
2312 (vfmlal_lane_high_u32): Ditto.
2313 (vfmlsl_lane_high_u32): Ditto.
2314 (vfmlal_laneq_high_u32): Ditto.
2315 (vfmlsl_laneq_high_u32): Ditto.
2316 (vfmlalq_lane_high_u32): Ditto.
2317 (vfmlslq_lane_high_u32): Ditto.
2318 (vfmlalq_laneq_high_u32): Ditto.
2319 (vfmlslq_laneq_high_u32): Ditto.
2320 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2321 (AARCH64_FL_FOR_ARCH8_4): New.
2322 (AARCH64_ISA_F16FML): New ISA flag.
2323 (TARGET_F16FML): New feature flag for fp16fml.
2324 (doc/invoke.texi): Document new fp16fml option.
2326 2018-01-10 Michael Collison <michael.collison@arm.com>
2328 * config/aarch64/aarch64-builtins.c:
2329 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2330 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2331 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2332 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2333 (AARCH64_ISA_SHA3): New ISA flag.
2334 (TARGET_SHA3): New feature flag for sha3.
2335 * config/aarch64/iterators.md (sha512_op): New int attribute.
2336 (CRYPTO_SHA512): New int iterator.
2337 (UNSPEC_SHA512H): New unspec.
2338 (UNSPEC_SHA512H2): Ditto.
2339 (UNSPEC_SHA512SU0): Ditto.
2340 (UNSPEC_SHA512SU1): Ditto.
2341 * config/aarch64/aarch64-simd-builtins.def
2342 (aarch64_crypto_sha512hqv2di): New builtin.
2343 (aarch64_crypto_sha512h2qv2di): Ditto.
2344 (aarch64_crypto_sha512su0qv2di): Ditto.
2345 (aarch64_crypto_sha512su1qv2di): Ditto.
2346 (aarch64_eor3qv8hi): Ditto.
2347 (aarch64_rax1qv2di): Ditto.
2348 (aarch64_xarqv2di): Ditto.
2349 (aarch64_bcaxqv8hi): Ditto.
2350 * config/aarch64/aarch64-simd.md:
2351 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2352 (aarch64_crypto_sha512su0qv2di): Ditto.
2353 (aarch64_crypto_sha512su1qv2di): Ditto.
2354 (aarch64_eor3qv8hi): Ditto.
2355 (aarch64_rax1qv2di): Ditto.
2356 (aarch64_xarqv2di): Ditto.
2357 (aarch64_bcaxqv8hi): Ditto.
2358 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2359 (vsha512h2q_u64): Ditto.
2360 (vsha512su0q_u64): Ditto.
2361 (vsha512su1q_u64): Ditto.
2362 (veor3q_u16): Ditto.
2363 (vrax1q_u64): Ditto.
2364 (vxarq_u64): Ditto.
2365 (vbcaxq_u16): Ditto.
2366 * config/arm/types.md (crypto_sha512): New type attribute.
2367 (crypto_sha3): Ditto.
2368 (doc/invoke.texi): Document new sha3 option.
2370 2018-01-10 Michael Collison <michael.collison@arm.com>
2372 * config/aarch64/aarch64-builtins.c:
2373 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2374 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2375 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2376 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2377 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2378 (AARCH64_ISA_SM4): New ISA flag.
2379 (TARGET_SM4): New feature flag for sm4.
2380 * config/aarch64/aarch64-simd-builtins.def
2381 (aarch64_sm3ss1qv4si): Ditto.
2382 (aarch64_sm3tt1aq4si): Ditto.
2383 (aarch64_sm3tt1bq4si): Ditto.
2384 (aarch64_sm3tt2aq4si): Ditto.
2385 (aarch64_sm3tt2bq4si): Ditto.
2386 (aarch64_sm3partw1qv4si): Ditto.
2387 (aarch64_sm3partw2qv4si): Ditto.
2388 (aarch64_sm4eqv4si): Ditto.
2389 (aarch64_sm4ekeyqv4si): Ditto.
2390 * config/aarch64/aarch64-simd.md:
2391 (aarch64_sm3ss1qv4si): Ditto.
2392 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2393 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2394 (aarch64_sm4eqv4si): Ditto.
2395 (aarch64_sm4ekeyqv4si): Ditto.
2396 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2397 (sm3part_op): Ditto.
2398 (CRYPTO_SM3TT): Ditto.
2399 (CRYPTO_SM3PART): Ditto.
2400 (UNSPEC_SM3SS1): New unspec.
2401 (UNSPEC_SM3TT1A): Ditto.
2402 (UNSPEC_SM3TT1B): Ditto.
2403 (UNSPEC_SM3TT2A): Ditto.
2404 (UNSPEC_SM3TT2B): Ditto.
2405 (UNSPEC_SM3PARTW1): Ditto.
2406 (UNSPEC_SM3PARTW2): Ditto.
2407 (UNSPEC_SM4E): Ditto.
2408 (UNSPEC_SM4EKEY): Ditto.
2409 * config/aarch64/constraints.md (Ui2): New constraint.
2410 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2411 * config/arm/types.md (crypto_sm3): New type attribute.
2412 (crypto_sm4): Ditto.
2413 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2414 (vsm3tt1aq_u32): Ditto.
2415 (vsm3tt1bq_u32): Ditto.
2416 (vsm3tt2aq_u32): Ditto.
2417 (vsm3tt2bq_u32): Ditto.
2418 (vsm3partw1q_u32): Ditto.
2419 (vsm3partw2q_u32): Ditto.
2420 (vsm4eq_u32): Ditto.
2421 (vsm4ekeyq_u32): Ditto.
2422 (doc/invoke.texi): Document new sm4 option.
2424 2018-01-10 Michael Collison <michael.collison@arm.com>
2426 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2427 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2428 (AARCH64_FL_FOR_ARCH8_4): New.
2429 (AARCH64_FL_V8_4): New flag.
2430 (doc/invoke.texi): Document new armv8.4-a option.
2432 2018-01-10 Michael Collison <michael.collison@arm.com>
2434 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2435 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2436 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2437 * config/aarch64/aarch64-option-extension.def: Add
2438 AARCH64_OPT_EXTENSION of 'sha2'.
2439 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2440 (crypto): Disable sha2 and aes if crypto disabled.
2441 (crypto): Enable aes and sha2 if enabled.
2442 (simd): Disable sha2 and aes if simd disabled.
2443 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2444 New flags.
2445 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2446 (TARGET_SHA2): New feature flag for sha2.
2447 (TARGET_AES): New feature flag for aes.
2448 * config/aarch64/aarch64-simd.md:
2449 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2450 conditional on TARGET_AES.
2451 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2452 (aarch64_crypto_sha1hsi): Make pattern conditional
2453 on TARGET_SHA2.
2454 (aarch64_crypto_sha1hv4si): Ditto.
2455 (aarch64_be_crypto_sha1hv4si): Ditto.
2456 (aarch64_crypto_sha1su1v4si): Ditto.
2457 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2458 (aarch64_crypto_sha1su0v4si): Ditto.
2459 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2460 (aarch64_crypto_sha256su0v4si): Ditto.
2461 (aarch64_crypto_sha256su1v4si): Ditto.
2462 (doc/invoke.texi): Document new aes and sha2 options.
2464 2018-01-10 Martin Sebor <msebor@redhat.com>
2466 PR tree-optimization/83781
2467 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2468 as string arrays.
2470 2018-01-11 Martin Sebor <msebor@gmail.com>
2471 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2473 PR tree-optimization/83501
2474 PR tree-optimization/81703
2476 * tree-ssa-strlen.c (get_string_cst): Rename...
2477 (get_string_len): ...to this. Handle global constants.
2478 (handle_char_store): Adjust.
2480 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2481 Jim Wilson <jimw@sifive.com>
2483 * config/riscv/riscv-protos.h (riscv_output_return): New.
2484 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2485 (riscv_attribute_table, riscv_output_return),
2486 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2487 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2488 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2489 function.
2490 (riscv_expand_prologue): Add early return for naked function.
2491 (riscv_expand_epilogue): Likewise.
2492 (riscv_function_ok_for_sibcall): Return false for naked function.
2493 (riscv_set_current_function): New.
2494 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2495 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2496 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2497 * doc/extend.texi (RISC-V Function Attributes): New.
2499 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2501 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2502 check for 128-bit long double before checking TCmode.
2503 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2504 128-bit long doubles before checking TFmode or TCmode.
2505 (FLOAT128_IBM_P): Likewise.
2507 2018-01-10 Martin Sebor <msebor@redhat.com>
2509 PR tree-optimization/83671
2510 * builtins.c (c_strlen): Unconditionally return zero for the empty
2511 string.
2512 Use -Warray-bounds for warnings.
2513 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2514 for non-constant array indices with COMPONENT_REF, arrays of
2515 arrays, and pointers to arrays.
2516 (gimple_fold_builtin_strlen): Determine and set length range for
2517 non-constant character arrays.
2519 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2521 PR middle-end/81897
2522 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2523 empty blocks.
2525 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2527 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2529 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2531 PR target/83399
2532 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2533 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2534 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2535 indexed_or_indirect_operand predicate.
2536 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2537 (*vsx_le_perm_load_v8hi): Likewise.
2538 (*vsx_le_perm_load_v16qi): Likewise.
2539 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2540 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2541 (*vsx_le_perm_store_v8hi): Likewise.
2542 (*vsx_le_perm_store_v16qi): Likewise.
2543 (eight unnamed splitters): Likewise.
2545 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2547 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2548 * config/rs6000/emmintrin.h: Likewise.
2549 * config/rs6000/mmintrin.h: Likewise.
2550 * config/rs6000/xmmintrin.h: Likewise.
2552 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2554 PR c++/43486
2555 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2556 "public_flag".
2557 * tree.c (tree_nop_conversion): Return true for location wrapper
2558 nodes.
2559 (maybe_wrap_with_location): New function.
2560 (selftest::check_strip_nops): New function.
2561 (selftest::test_location_wrappers): New function.
2562 (selftest::tree_c_tests): Call it.
2563 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2564 (maybe_wrap_with_location): New decl.
2565 (EXPR_LOCATION_WRAPPER_P): New macro.
2566 (location_wrapper_p): New inline function.
2567 (tree_strip_any_location_wrapper): New inline function.
2569 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2571 PR target/83735
2572 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2573 stack_realign_offset for the largest alignment of stack slot
2574 actually used.
2575 (ix86_find_max_used_stack_alignment): New function.
2576 (ix86_finalize_stack_frame_flags): Use it. Set
2577 max_used_stack_alignment if we don't realign stack.
2578 * config/i386/i386.h (machine_function): Add
2579 max_used_stack_alignment.
2581 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2583 * config/arm/arm.opt (-mbranch-cost): New option.
2584 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2585 account.
2587 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2589 PR target/83629
2590 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2591 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2593 2018-01-10 Richard Biener <rguenther@suse.de>
2595 PR debug/83765
2596 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2597 early out so it also covers the case where we have a non-NULL
2598 origin.
2600 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2602 PR tree-optimization/83753
2603 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2604 for non-strided grouped accesses if the number of elements is 1.
2606 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2608 PR target/81616
2609 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2610 * i386.h (TARGET_USE_GATHER): Define.
2611 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2613 2018-01-10 Martin Liska <mliska@suse.cz>
2615 PR bootstrap/82831
2616 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2617 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2618 partitioning.
2619 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2620 CLEANUP_NO_PARTITIONING is not set.
2622 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2624 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2625 for vectors, as a partial revert of r254296.
2626 * rtl.h (const_vec_p): Delete.
2627 (const_vec_duplicate_p): Don't test for vector CONSTs.
2628 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2629 * expmed.c (make_tree): Likewise.
2631 Revert:
2632 * common.md (E, F): Use CONSTANT_P instead of checking for
2633 CONST_VECTOR.
2634 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2635 checking for CONST_VECTOR.
2637 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2639 PR middle-end/83575
2640 * predict.c (force_edge_cold): Handle in more sane way edges
2641 with no prediction.
2643 2018-01-09 Carl Love <cel@us.ibm.com>
2645 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2646 V4SI, V4SF types.
2647 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2648 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2649 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2650 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2651 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2652 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2653 * config/rs6000/rs6000-protos.h: Add extern defition for
2654 rs6000_generate_float2_double_code.
2655 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2656 function.
2657 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2658 (float2_v2df): Add define_expand.
2660 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2662 PR target/83628
2663 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2664 op_mode in the force_to_mode call.
2666 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2668 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2669 instead of checking each element individually.
2670 (aarch64_evpc_uzp): Likewise.
2671 (aarch64_evpc_zip): Likewise.
2672 (aarch64_evpc_ext): Likewise.
2673 (aarch64_evpc_rev): Likewise.
2674 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2675 instead of checking each element individually. Return true without
2676 generating rtl if
2677 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2678 whether all selected elements come from the same input, instead of
2679 checking each element individually. Remove calls to gen_rtx_REG,
2680 start_sequence and end_sequence and instead assert that no rtl is
2681 generated.
2683 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2685 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2686 order of HIGH and CONST checks.
2688 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2690 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2691 if the destination isn't an SSA_NAME.
2693 2018-01-09 Richard Biener <rguenther@suse.de>
2695 PR tree-optimization/83668
2696 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2697 move prologue...
2698 (canonicalize_loop_form): ... here, renamed from ...
2699 (canonicalize_loop_closed_ssa_form): ... this and amended to
2700 swap successor edges for loop exit blocks to make us use
2701 the RPO order we need for initial schedule generation.
2703 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2705 PR tree-optimization/64811
2706 * match.pd: When optimizing comparisons with Inf, avoid
2707 introducing or losing exceptions from comparisons with NaN.
2709 2018-01-09 Martin Liska <mliska@suse.cz>
2711 PR sanitizer/82517
2712 * asan.c (shadow_mem_size): Add gcc_assert.
2714 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2716 Don't save registers in main().
2718 PR target/83738
2719 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2720 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2721 * config/avr/avr.c (avr_set_current_function): Don't error if
2722 naked, OS_task or OS_main are specified at the same time.
2723 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2724 OS_main.
2725 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2726 attribute.
2727 * common/config/avr/avr-common.c (avr_option_optimization_table):
2728 Switch on -mmain-is-OS_task for optimizing compilations.
2730 2018-01-09 Richard Biener <rguenther@suse.de>
2732 PR tree-optimization/83572
2733 * graphite.c: Include cfganal.h.
2734 (graphite_transform_loops): Connect infinite loops to exit
2735 and remove fake edges at the end.
2737 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2739 * ipa-inline.c (edge_badness): Revert accidental checkin.
2741 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2743 PR ipa/80763
2744 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2745 symbols; not inline clones.
2747 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2749 PR target/83507
2750 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2751 hard registers. Formatting fixes.
2753 PR preprocessor/83722
2754 * gcc.c (try_generate_repro): Pass
2755 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2756 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2757 do_report_bug.
2759 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2760 Kito Cheng <kito.cheng@gmail.com>
2762 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2763 (riscv_leaf_function_p): Delete.
2764 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2766 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2768 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2769 function.
2770 (do_ifelse): New function.
2771 (do_isel): New function.
2772 (do_sub3): New function.
2773 (do_add3): New function.
2774 (do_load_mask_compare): New function.
2775 (do_overlap_load_compare): New function.
2776 (expand_compare_loop): New function.
2777 (expand_block_compare): Call expand_compare_loop() when appropriate.
2778 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2779 option description.
2780 (-mblock-compare-inline-loop-limit): New option.
2782 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2784 PR target/83677
2785 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2786 Reverse order of second and third operands in first alternative.
2787 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2788 of first and second elements in UNSPEC_VPERMR vector.
2789 (altivec_expand_vec_perm_le): Likewise.
2791 2017-01-08 Jeff Law <law@redhat.com>
2793 PR rtl-optimizatin/81308
2794 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2795 (process_switch): If group_case_labels makes a change, then set
2796 cfg_altered.
2797 (pass_convert_switch::execute): If a switch is converted, then
2798 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2800 PR rtl-optimization/81308
2801 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2802 splitting insns.
2804 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2806 PR target/83663 - Revert r255946
2807 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2808 generation for cases where splatting a value is not useful.
2809 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2810 across a vec_duplicate and a paradoxical subreg forming a vector
2811 mode to a vec_concat.
2813 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2815 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2816 -march=armv8.3-a variants.
2817 * config/arm/t-multilib: Likewise.
2818 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2820 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2822 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2823 to generate rtl.
2824 (cceq_ior_compare_complement): Give it a name so I can use it, and
2825 change boolean_or_operator predicate to boolean_operator so it can
2826 be used to generate a crand.
2827 (eqne): New code iterator.
2828 (bd/bd_neg): New code_attrs.
2829 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2830 a single define_insn.
2831 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2832 decrement (bdnzt/bdnzf/bdzt/bdzf).
2833 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2834 with the new names of the branch decrement patterns, and added the
2835 names of the branch decrement conditional patterns.
2837 2018-01-08 Richard Biener <rguenther@suse.de>
2839 PR tree-optimization/83563
2840 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2841 cache.
2843 2018-01-08 Richard Biener <rguenther@suse.de>
2845 PR middle-end/83713
2846 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2848 2018-01-08 Richard Biener <rguenther@suse.de>
2850 PR tree-optimization/83685
2851 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2852 references to abnormals.
2854 2018-01-08 Richard Biener <rguenther@suse.de>
2856 PR lto/83719
2857 * dwarf2out.c (output_indirect_strings): Handle empty
2858 skeleton_debug_str_hash.
2859 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2861 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2863 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2864 (emit_store_direct): Likewise.
2865 (arc_trampoline_adjust_address): Likewise.
2866 (arc_asm_trampoline_template): New function.
2867 (arc_initialize_trampoline): Use asm_trampoline_template.
2868 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2869 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2870 * config/arc/arc.md (flush_icache): Delete pattern.
2872 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2874 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2875 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2876 munaligned-access.
2878 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2880 PR target/83681
2881 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2882 by not USED_FOR_TARGET.
2883 (make_pass_resolve_sw_modes): Likewise.
2885 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2887 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2888 USED_FOR_TARGET.
2890 2018-01-08 Richard Biener <rguenther@suse.de>
2892 PR middle-end/83580
2893 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2895 2018-01-08 Richard Biener <rguenther@suse.de>
2897 PR middle-end/83517
2898 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2900 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2902 PR middle-end/81897
2903 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2904 basic blocks with a small number of successors.
2905 (convert_control_dep_chain_into_preds): Improve handling of
2906 forwarder blocks.
2907 (dump_predicates): Split apart into...
2908 (dump_pred_chain): ...here...
2909 (dump_pred_info): ...and here.
2910 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2911 (can_chain_union_be_invalidated_p): Improve check for invalidation
2912 of paths.
2913 (uninit_uses_cannot_happen): Avoid unnecessary if
2914 convert_control_dep_chain_into_preds yielded nothing.
2916 2018-01-06 Martin Sebor <msebor@redhat.com>
2918 PR tree-optimization/83640
2919 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2920 subtracting negative offset from size.
2921 (builtin_access::overlap): Adjust offset bounds of the access to fall
2922 within the size of the object if possible.
2924 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2926 PR rtl-optimization/83699
2927 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2928 extract_bit_field_as_subreg to cases in which the extracted
2929 value is also a vector.
2931 * lra-constraints.c (process_alt_operands): Test for the equivalence
2932 substitutions when detecting a possible reload cycle.
2934 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2936 PR debug/83480
2937 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2938 by default if flag_selective_schedling{,2}. Formatting fixes.
2940 PR rtl-optimization/83682
2941 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2942 if it has non-VECTOR_MODE element mode.
2943 (vec_duplicate_p): Likewise.
2945 PR middle-end/83694
2946 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2947 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2949 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2951 PR target/83604
2952 * config/i386/i386-builtin.def
2953 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2954 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2955 Require also OPTION_MASK_ISA_AVX512F in addition to
2956 OPTION_MASK_ISA_GFNI.
2957 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2958 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2959 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2960 to OPTION_MASK_ISA_GFNI.
2961 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2962 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2963 OPTION_MASK_ISA_AVX512BW.
2964 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2965 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2966 addition to OPTION_MASK_ISA_GFNI.
2967 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2968 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2969 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2970 to OPTION_MASK_ISA_GFNI.
2971 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2972 a requirement for all ISAs rather than any of them with a few
2973 exceptions.
2974 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2975 processing.
2976 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2977 bitmasks to be enabled with 3 exceptions, instead of requiring any
2978 enabled ISA with lots of exceptions.
2979 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2980 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2981 Change avx512bw in isa attribute to avx512f.
2982 * config/i386/sgxintrin.h: Add license boilerplate.
2983 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2984 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2985 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2986 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2987 defined.
2988 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2989 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2990 temporarily sse2 rather than sse if not enabled already.
2992 PR target/83604
2993 * config/i386/sse.md (VI248_VLBW): Rename to ...
2994 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2995 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2996 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2997 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2998 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2999 mode iterator instead of VI248_VLBW.
3001 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3003 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3004 (record_modified): Skip clobbers; add debug output.
3005 (param_change_prob): Use sreal frequencies.
3007 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3009 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3010 punt for user-aligned variables.
3012 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3014 * tree-chrec.c (chrec_contains_symbols): Return true for
3015 POLY_INT_CST.
3017 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3019 PR target/82439
3020 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3021 of (x|y) == x for BICS pattern.
3023 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3025 PR tree-optimization/83605
3026 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3027 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3028 can throw.
3030 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3032 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3033 * config/epiphany/rtems.h: New file.
3035 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3036 Uros Bizjak <ubizjak@gmail.com>
3038 PR target/83554
3039 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3040 QIreg_operand instead of register_operand predicate.
3041 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3042 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3043 comments instead of -fmitigate[-_]rop.
3045 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3047 PR bootstrap/81926
3048 * cgraphunit.c (symbol_table::compile): Switch to text_section
3049 before calling assembly_start debug hook.
3050 * run-rtl-passes.c (run_rtl_passes): Likewise.
3051 Include output.h.
3053 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3055 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3056 range_int_cst_p rather than !symbolic_range_p before calling
3057 extract_range_from_multiplicative_op_1.
3059 2017-01-04 Jeff Law <law@redhat.com>
3061 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3062 redundant test in assertion.
3064 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3066 * doc/rtl.texi: Document machine_mode wrapper classes.
3068 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3070 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3071 using tree_to_uhwi.
3073 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3075 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3076 the VEC_PERM_EXPR fold to fail.
3078 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3080 PR debug/83585
3081 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3082 to switched_sections.
3084 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3086 PR target/83680
3087 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3088 test for d.testing.
3090 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3092 PR target/83387
3093 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3094 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3096 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3098 PR debug/83666
3099 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3100 is BLKmode and bitpos not zero or mode change is needed.
3102 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3104 PR target/83675
3105 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3106 TARGET_VIS2.
3108 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3110 PR target/83628
3111 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3112 instead of MULT rtx. Update all corresponding splitters.
3113 (*saddl_se): Ditto.
3114 (*ssub<modesuffix>): Ditto.
3115 (*ssubl_se): Ditto.
3116 (*cmp_sadd_di): Update split patterns.
3117 (*cmp_sadd_si): Ditto.
3118 (*cmp_sadd_sidi): Ditto.
3119 (*cmp_ssub_di): Ditto.
3120 (*cmp_ssub_si): Ditto.
3121 (*cmp_ssub_sidi): Ditto.
3122 * config/alpha/predicates.md (const23_operand): New predicate.
3123 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3124 Look for ASHIFT, not MULT inner operand.
3125 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3127 2018-01-04 Martin Liska <mliska@suse.cz>
3129 PR gcov-profile/83669
3130 * gcov.c (output_intermediate_file): Add version to intermediate
3131 gcov file.
3132 * doc/gcov.texi: Document new field 'version' in intermediate
3133 file format. Fix location of '-k' option of gcov command.
3135 2018-01-04 Martin Liska <mliska@suse.cz>
3137 PR ipa/82352
3138 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3140 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3142 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3144 2018-01-03 Martin Sebor <msebor@redhat.com>
3146 PR tree-optimization/83655
3147 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3148 checking calls with invalid arguments.
3150 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3152 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3153 (vectorizable_mask_load_store): Delete.
3154 (vectorizable_call): Return false for masked loads and stores.
3155 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3156 instead of gimple_assign_rhs1.
3157 (vectorizable_load): Handle IFN_MASK_LOAD.
3158 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3160 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3162 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3163 split out from..,
3164 (vectorizable_mask_load_store): ...here.
3165 (vectorizable_load): ...and here.
3167 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3169 * tree-vect-stmts.c (vect_build_all_ones_mask)
3170 (vect_build_zero_merge_argument): New functions, split out from...
3171 (vectorizable_load): ...here.
3173 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3175 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3176 split out from...
3177 (vectorizable_mask_load_store): ...here.
3178 (vectorizable_store): ...and here.
3180 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3182 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3183 split out from...
3184 (vectorizable_mask_load_store): ...here.
3186 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3188 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3189 (vect_model_store_cost): Take a vec_load_store_type instead of a
3190 vect_def_type.
3191 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3192 (vect_model_store_cost): Take a vec_load_store_type instead of a
3193 vect_def_type.
3194 (vectorizable_mask_load_store): Update accordingly.
3195 (vectorizable_store): Likewise.
3196 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3198 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3200 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3201 IFN_MASK_LOAD calls here rather than...
3202 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3204 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3205 Alan Hayward <alan.hayward@arm.com>
3206 David Sherwood <david.sherwood@arm.com>
3208 * expmed.c (extract_bit_field_1): For vector extracts,
3209 fall back to extract_bit_field_as_subreg if vec_extract
3210 isn't available.
3212 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3213 Alan Hayward <alan.hayward@arm.com>
3214 David Sherwood <david.sherwood@arm.com>
3216 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3217 they are variable or constant sized.
3218 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3219 slots for constant-sized data.
3221 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3222 Alan Hayward <alan.hayward@arm.com>
3223 David Sherwood <david.sherwood@arm.com>
3225 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3226 handling COND_EXPRs with boolean comparisons, try to find a better
3227 basis for the mask type than the boolean itself.
3229 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3231 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3232 is calculated and how it can be overridden.
3233 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3234 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3235 if defined.
3236 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3237 if nonzero.
3239 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3240 Alan Hayward <alan.hayward@arm.com>
3241 David Sherwood <david.sherwood@arm.com>
3243 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3244 Remove the mode argument.
3245 (aarch64_simd_valid_immediate): Remove the mode and inverse
3246 arguments.
3247 * config/aarch64/iterators.md (bitsize): New iterator.
3248 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3249 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3250 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3251 aarch64_simd_valid_immediate.
3252 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3253 (aarch64_reg_or_bic_imm): Likewise.
3254 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3255 with an insn_type enum and msl with a modifier_type enum.
3256 Replace element_width with a scalar_mode. Change the shift
3257 to unsigned int. Add constructors for scalar_float_mode and
3258 scalar_int_mode elements.
3259 (aarch64_vect_float_const_representable_p): Delete.
3260 (aarch64_can_const_movi_rtx_p)
3261 (aarch64_simd_scalar_immediate_valid_for_move)
3262 (aarch64_simd_make_constant): Update call to
3263 aarch64_simd_valid_immediate.
3264 (aarch64_advsimd_valid_immediate_hs): New function.
3265 (aarch64_advsimd_valid_immediate): Likewise.
3266 (aarch64_simd_valid_immediate): Remove mode and inverse
3267 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3268 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3269 and aarch64_float_const_representable_p on the result.
3270 (aarch64_output_simd_mov_immediate): Remove mode argument.
3271 Update call to aarch64_simd_valid_immediate and use of
3272 simd_immediate_info.
3273 (aarch64_output_scalar_simd_mov_immediate): Update call
3274 accordingly.
3276 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3277 Alan Hayward <alan.hayward@arm.com>
3278 David Sherwood <david.sherwood@arm.com>
3280 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3281 (mode_nunits): Likewise CONST_MODE_NUNITS.
3282 * machmode.def (ADJUST_NUNITS): Document.
3283 * genmodes.c (mode_data::need_nunits_adj): New field.
3284 (blank_mode): Update accordingly.
3285 (adj_nunits): New variable.
3286 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3287 parameter.
3288 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3289 listed in adj_nunits.
3290 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3291 listed in adj_nunits. Don't emit case statements for such modes.
3292 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3293 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3294 nothing if adj_nunits is nonnull.
3295 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3296 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3297 (emit_mode_fbit): Update use of print_maybe_const_decl.
3298 (emit_move_size): Likewise. Treat the array as non-const
3299 if adj_nunits.
3300 (emit_mode_adjustments): Handle adj_nunits.
3302 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3304 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3305 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3306 (VECTOR_MODES): Use it.
3307 (make_vector_modes): Take the prefix as an argument.
3309 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3310 Alan Hayward <alan.hayward@arm.com>
3311 David Sherwood <david.sherwood@arm.com>
3313 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3314 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3315 for MODE_VECTOR_BOOL.
3316 * machmode.def (VECTOR_BOOL_MODE): Document.
3317 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3318 (make_vector_bool_mode): New function.
3319 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3320 MODE_VECTOR_BOOL.
3321 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3322 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3323 Likewise.
3324 * stor-layout.c (int_mode_for_mode): Likewise.
3325 * tree.c (build_vector_type_for_mode): Likewise.
3326 * varasm.c (output_constant_pool_2): Likewise.
3327 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3328 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3329 for MODE_VECTOR_BOOL.
3330 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3331 of mode class checks.
3332 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3333 instead of a list of mode class checks.
3334 (expand_vector_scalar_condition): Likewise.
3335 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3337 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3338 Alan Hayward <alan.hayward@arm.com>
3339 David Sherwood <david.sherwood@arm.com>
3341 * machmode.h (mode_size): Change from unsigned short to
3342 poly_uint16_pod.
3343 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3344 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3345 or if measurement_type is not polynomial.
3346 (fixed_size_mode::includes_p): Check for constant-sized modes.
3347 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3348 return a poly_uint16 rather than an unsigned short.
3349 (emit_mode_size): Change the type of mode_size from unsigned short
3350 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3351 (emit_mode_adjustments): Cope with polynomial vector sizes.
3352 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3353 for GET_MODE_SIZE.
3354 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3355 for GET_MODE_SIZE.
3356 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3357 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3358 * caller-save.c (setup_save_areas): Likewise.
3359 (replace_reg_with_saved_mem): Likewise.
3360 * calls.c (emit_library_call_value_1): Likewise.
3361 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3362 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3363 (gen_lowpart_for_combine): Likewise.
3364 * convert.c (convert_to_integer_1): Likewise.
3365 * cse.c (equiv_constant, cse_insn): Likewise.
3366 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3367 (cselib_subst_to_values): Likewise.
3368 * dce.c (word_dce_process_block): Likewise.
3369 * df-problems.c (df_word_lr_mark_ref): Likewise.
3370 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3371 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3372 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3373 (rtl_for_decl_location): Likewise.
3374 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3375 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3376 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3377 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3378 (expand_expr_real_1): Likewise.
3379 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3380 (pad_below): Likewise.
3381 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3382 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3383 * ira.c (get_subreg_tracking_sizes): Likewise.
3384 * ira-build.c (ira_create_allocno_objects): Likewise.
3385 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3386 (ira_sort_regnos_for_alter_reg): Likewise.
3387 * ira-costs.c (record_operand_costs): Likewise.
3388 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3389 (resolve_simple_move): Likewise.
3390 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3391 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3392 (lra_constraints): Likewise.
3393 (CONST_POOL_OK_P): Reject variable-sized modes.
3394 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3395 (add_pseudo_to_slot, lra_spill): Likewise.
3396 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3397 * optabs-query.c (get_best_extraction_insn): Likewise.
3398 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3399 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3400 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3401 * recog.c (offsettable_address_addr_space_p): Likewise.
3402 * regcprop.c (maybe_mode_change): Likewise.
3403 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3404 * regrename.c (build_def_use): Likewise.
3405 * regstat.c (dump_reg_info): Likewise.
3406 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3407 (find_reloads, find_reloads_subreg_address): Likewise.
3408 * reload1.c (eliminate_regs_1): Likewise.
3409 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3410 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3411 (simplify_binary_operation_1, simplify_subreg): Likewise.
3412 * targhooks.c (default_function_arg_padding): Likewise.
3413 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3414 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3415 (verify_gimple_assign_ternary): Likewise.
3416 * tree-inline.c (estimate_move_cost): Likewise.
3417 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3418 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3419 (get_address_cost_ainc): Likewise.
3420 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3421 (vect_supportable_dr_alignment): Likewise.
3422 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3423 (vectorizable_reduction): Likewise.
3424 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3425 (vectorizable_operation, vectorizable_load): Likewise.
3426 * tree.c (build_same_sized_truth_vector_type): Likewise.
3427 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3428 * var-tracking.c (emit_note_insn_var_location): Likewise.
3429 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3430 (ADDR_VEC_ALIGN): Likewise.
3432 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3433 Alan Hayward <alan.hayward@arm.com>
3434 David Sherwood <david.sherwood@arm.com>
3436 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3437 unsigned short.
3438 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3439 or if measurement_type is polynomial.
3440 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3441 * combine.c (make_extraction): Likewise.
3442 * dse.c (find_shift_sequence): Likewise.
3443 * dwarf2out.c (mem_loc_descriptor): Likewise.
3444 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3445 (extract_bit_field, extract_low_bits): Likewise.
3446 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3447 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3448 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3449 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3450 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3451 * reload.c (find_reloads): Likewise.
3452 * reload1.c (alter_reg): Likewise.
3453 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3454 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3455 * tree-if-conv.c (predicate_mem_writes): Likewise.
3456 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3457 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3458 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3459 * valtrack.c (dead_debug_insert_temp): Likewise.
3460 * varasm.c (mergeable_constant_section): Likewise.
3461 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3463 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3464 Alan Hayward <alan.hayward@arm.com>
3465 David Sherwood <david.sherwood@arm.com>
3467 * expr.c (expand_assignment): Cope with polynomial mode sizes
3468 when assigning to a CONCAT.
3470 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3471 Alan Hayward <alan.hayward@arm.com>
3472 David Sherwood <david.sherwood@arm.com>
3474 * machmode.h (mode_precision): Change from unsigned short to
3475 poly_uint16_pod.
3476 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3477 short.
3478 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3479 or if measurement_type is not polynomial.
3480 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3481 in which the mode is already known to be a scalar_int_mode.
3482 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3483 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3484 initializer.
3485 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3486 for GET_MODE_PRECISION.
3487 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3488 for GET_MODE_PRECISION.
3489 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3490 as polynomial.
3491 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3492 (expand_field_assignment, make_extraction): Likewise.
3493 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3494 (get_last_value): Likewise.
3495 * convert.c (convert_to_integer_1): Likewise.
3496 * cse.c (cse_insn): Likewise.
3497 * expr.c (expand_expr_real_1): Likewise.
3498 * lra-constraints.c (simplify_operand_subreg): Likewise.
3499 * optabs-query.c (can_atomic_load_p): Likewise.
3500 * optabs.c (expand_atomic_load): Likewise.
3501 (expand_atomic_store): Likewise.
3502 * ree.c (combine_reaching_defs): Likewise.
3503 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3504 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3505 * tree.h (type_has_mode_precision_p): Likewise.
3506 * ubsan.c (instrument_si_overflow): Likewise.
3508 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3509 Alan Hayward <alan.hayward@arm.com>
3510 David Sherwood <david.sherwood@arm.com>
3512 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3513 polynomial numbers of units.
3514 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3515 (valid_vector_subparts_p): New function.
3516 (build_vector_type): Remove temporary shim and take the number
3517 of units as a poly_uint64 rather than an int.
3518 (build_opaque_vector_type): Take the number of units as a
3519 poly_uint64 rather than an int.
3520 * tree.c (build_vector_from_ctor): Handle polynomial
3521 TYPE_VECTOR_SUBPARTS.
3522 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3523 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3524 (build_vector_from_val): If the number of units is variable,
3525 use build_vec_duplicate_cst for constant operands and
3526 VEC_DUPLICATE_EXPR otherwise.
3527 (make_vector_type): Remove temporary is_constant ().
3528 (build_vector_type, build_opaque_vector_type): Take the number of
3529 units as a poly_uint64 rather than an int.
3530 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3531 VECTOR_CST_NELTS.
3532 * cfgexpand.c (expand_debug_expr): Likewise.
3533 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3534 (store_constructor, expand_expr_real_1): Likewise.
3535 (const_scalar_mask_from_tree): Likewise.
3536 * fold-const-call.c (fold_const_reduction): Likewise.
3537 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3538 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3539 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3540 (fold_relational_const): Likewise.
3541 (native_interpret_vector): Likewise. Change the size from an
3542 int to an unsigned int.
3543 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3544 TYPE_VECTOR_SUBPARTS.
3545 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3546 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3547 duplicating a non-constant operand into a variable-length vector.
3548 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3549 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3550 * ipa-icf.c (sem_variable::equals): Likewise.
3551 * match.pd: Likewise.
3552 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3553 * print-tree.c (print_node): Likewise.
3554 * stor-layout.c (layout_type): Likewise.
3555 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3556 * tree-cfg.c (verify_gimple_comparison): Likewise.
3557 (verify_gimple_assign_binary): Likewise.
3558 (verify_gimple_assign_ternary): Likewise.
3559 (verify_gimple_assign_single): Likewise.
3560 * tree-pretty-print.c (dump_generic_node): Likewise.
3561 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3562 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3563 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3564 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3565 (vect_shift_permute_load_chain): Likewise.
3566 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3567 (expand_vector_condition, optimize_vector_constructor): Likewise.
3568 (lower_vec_perm, get_compute_type): Likewise.
3569 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3570 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3571 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3572 (vect_recog_mask_conversion_pattern): Likewise.
3573 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3574 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3575 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3576 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3577 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3578 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3579 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3580 (supportable_widening_operation): Likewise.
3581 (supportable_narrowing_operation): Likewise.
3582 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3583 Likewise.
3584 * varasm.c (output_constant): Likewise.
3586 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3587 Alan Hayward <alan.hayward@arm.com>
3588 David Sherwood <david.sherwood@arm.com>
3590 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3591 so that both the length == 3 and length != 3 cases set up their
3592 own permute vectors. Add comments explaining why we know the
3593 number of elements is constant.
3594 (vect_permute_load_chain): Likewise.
3596 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3597 Alan Hayward <alan.hayward@arm.com>
3598 David Sherwood <david.sherwood@arm.com>
3600 * machmode.h (mode_nunits): Change from unsigned char to
3601 poly_uint16_pod.
3602 (ONLY_FIXED_SIZE_MODES): New macro.
3603 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3604 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3605 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3606 New typedefs.
3607 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3608 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3609 or if measurement_type is not polynomial.
3610 * genmodes.c (ZERO_COEFFS): New macro.
3611 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3612 poly_uint16.
3613 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3614 Use ZERO_COEFFS when emitting initializers.
3615 * data-streamer.h (bp_pack_poly_value): New function.
3616 (bp_unpack_poly_value): Likewise.
3617 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3618 for GET_MODE_NUNITS.
3619 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3620 for GET_MODE_NUNITS.
3621 * tree.c (make_vector_type): Remove temporary shim and make
3622 the real function take the number of units as a poly_uint64
3623 rather than an int.
3624 (build_vector_type_for_mode): Handle polynomial nunits.
3625 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3626 * emit-rtl.c (const_vec_series_p_1): Likewise.
3627 (gen_rtx_CONST_VECTOR): Likewise.
3628 * fold-const.c (test_vec_duplicate_folding): Likewise.
3629 * genrecog.c (validate_pattern): Likewise.
3630 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3631 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3632 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3633 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3634 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3635 * rtlanal.c (subreg_get_info): Likewise.
3636 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3637 (vect_grouped_load_supported): Likewise.
3638 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3639 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3640 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3641 (simplify_const_unary_operation, simplify_binary_operation_1)
3642 (simplify_const_binary_operation, simplify_ternary_operation)
3643 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3644 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3645 instead of CONST_VECTOR_NUNITS.
3646 * varasm.c (output_constant_pool_2): Likewise.
3647 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3648 explicit-encoded elements in the XVEC for variable-length vectors.
3650 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3652 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3654 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3655 Alan Hayward <alan.hayward@arm.com>
3656 David Sherwood <david.sherwood@arm.com>
3658 * coretypes.h (fixed_size_mode): Declare.
3659 (fixed_size_mode_pod): New typedef.
3660 * builtins.h (target_builtins::x_apply_args_mode)
3661 (target_builtins::x_apply_result_mode): Change type to
3662 fixed_size_mode_pod.
3663 * builtins.c (apply_args_size, apply_result_size, result_vector)
3664 (expand_builtin_apply_args_1, expand_builtin_apply)
3665 (expand_builtin_return): Update accordingly.
3667 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3669 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3670 * cselib.c (cselib_hash_rtx): Likewise.
3671 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3672 CONST_VECTOR encoding.
3674 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3675 Jeff Law <law@redhat.com>
3677 PR target/83641
3678 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3679 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3680 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3681 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3683 PR target/83641
3684 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3685 explicitly probe *sp in a noreturn function if there were any callee
3686 register saves or frame pointer is needed.
3688 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3690 PR debug/83621
3691 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3692 BLKmode for ternary, binary or unary expressions.
3694 PR debug/83645
3695 * var-tracking.c (delete_vta_debug_insn): New inline function.
3696 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3697 insns from get_insns () to NULL instead of each bb separately.
3698 Use delete_vta_debug_insn. No longer static.
3699 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3700 delete_vta_debug_insns callers.
3701 * rtl.h (delete_vta_debug_insns): Declare.
3702 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3703 instead of variable_tracking_main.
3705 2018-01-03 Martin Sebor <msebor@redhat.com>
3707 PR tree-optimization/83603
3708 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3709 arguments past the endof the argument list in functions declared
3710 without a prototype.
3711 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3712 Avoid checking when arguments are null.
3714 2018-01-03 Martin Sebor <msebor@redhat.com>
3716 PR c/83559
3717 * doc/extend.texi (attribute const): Fix a typo.
3718 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3719 issuing -Wsuggest-attribute for void functions.
3721 2018-01-03 Martin Sebor <msebor@redhat.com>
3723 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3724 offset_int::from instead of wide_int::to_shwi.
3725 (maybe_diag_overlap): Remove assertion.
3726 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3727 * gimple-ssa-sprintf.c (format_directive): Same.
3728 (parse_directive): Same.
3729 (sprintf_dom_walker::compute_format_length): Same.
3730 (try_substitute_return_value): Same.
3732 2017-01-03 Jeff Law <law@redhat.com>
3734 PR middle-end/83654
3735 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3736 non-constant residual for zero at runtime and avoid probing in
3737 that case. Reorganize code for trailing problem to mirror handling
3738 of the residual.
3740 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3742 PR tree-optimization/83501
3743 * tree-ssa-strlen.c (get_string_cst): New.
3744 (handle_char_store): Call get_string_cst.
3746 2018-01-03 Martin Liska <mliska@suse.cz>
3748 PR tree-optimization/83593
3749 * tree-ssa-strlen.c: Include tree-cfg.h.
3750 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3751 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3752 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3753 to false.
3754 (strlen_dom_walker::before_dom_children): Call
3755 gimple_purge_dead_eh_edges. Dump tranformation with details
3756 dump flags.
3757 (strlen_dom_walker::before_dom_children): Update call by adding
3758 new argument cleanup_eh.
3759 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3761 2018-01-03 Martin Liska <mliska@suse.cz>
3763 PR ipa/83549
3764 * cif-code.def (VARIADIC_THUNK): New enum value.
3765 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3766 thunks.
3768 2018-01-03 Jan Beulich <jbeulich@suse.com>
3770 * sse.md (mov<mode>_internal): Tighten condition for when to use
3771 vmovdqu<ssescalarsize> for TI and OI modes.
3773 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3775 Update copyright years.
3777 2018-01-03 Martin Liska <mliska@suse.cz>
3779 PR ipa/83594
3780 * ipa-visibility.c (function_and_variable_visibility): Skip
3781 functions with noipa attribure.
3783 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3785 * gcc.c (process_command): Update copyright notice dates.
3786 * gcov-dump.c (print_version): Ditto.
3787 * gcov.c (print_version): Ditto.
3788 * gcov-tool.c (print_version): Ditto.
3789 * gengtype.c (create_file): Ditto.
3790 * doc/cpp.texi: Bump @copying's copyright year.
3791 * doc/cppinternals.texi: Ditto.
3792 * doc/gcc.texi: Ditto.
3793 * doc/gccint.texi: Ditto.
3794 * doc/gcov.texi: Ditto.
3795 * doc/install.texi: Ditto.
3796 * doc/invoke.texi: Ditto.
3798 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3800 * vector-builder.h (vector_builder::m_full_nelts): Change from
3801 unsigned int to poly_uint64.
3802 (vector_builder::full_nelts): Update prototype accordingly.
3803 (vector_builder::new_vector): Likewise.
3804 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3805 (vector_builder::operator ==): Likewise.
3806 (vector_builder::finalize): Likewise.
3807 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3808 Take the number of elements as a poly_uint64 rather than an
3809 unsigned int.
3810 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3811 from unsigned int to poly_uint64.
3812 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3813 (vec_perm_indices::new_vector): Likewise.
3814 (vec_perm_indices::length): Likewise.
3815 (vec_perm_indices::nelts_per_input): Likewise.
3816 (vec_perm_indices::input_nelts): Likewise.
3817 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3818 number of elements per input as a poly_uint64 rather than an
3819 unsigned int. Use the original encoding for variable-length
3820 vectors, rather than clamping each individual element.
3821 For the second and subsequent elements in each pattern,
3822 clamp the step and base before clamping their sum.
3823 (vec_perm_indices::series_p): Handle polynomial element counts.
3824 (vec_perm_indices::all_in_range_p): Likewise.
3825 (vec_perm_indices_to_tree): Likewise.
3826 (vec_perm_indices_to_rtx): Likewise.
3827 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3828 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3829 (tree_vector_builder::new_binary_operation): Handle polynomial
3830 element counts. Return false if we need to know the number
3831 of elements at compile time.
3832 * fold-const.c (fold_vec_perm): Punt if the number of elements
3833 isn't known at compile time.
3835 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3837 * vec-perm-indices.h (vec_perm_builder): Change element type
3838 from HOST_WIDE_INT to poly_int64.
3839 (vec_perm_indices::element_type): Update accordingly.
3840 (vec_perm_indices::clamp): Handle polynomial element_types.
3841 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3842 (vec_perm_indices::all_in_range_p): Likewise.
3843 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3844 than shwi trees.
3845 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3846 polynomial vec_perm_indices element types.
3847 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3848 * fold-const.c (fold_vec_perm): Likewise.
3849 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3850 * tree-vect-generic.c (lower_vec_perm): Likewise.
3851 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3852 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3853 element type to HOST_WIDE_INT.
3855 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3856 Alan Hayward <alan.hayward@arm.com>
3857 David Sherwood <david.sherwood@arm.com>
3859 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3860 rather than an int. Use plus_constant.
3861 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3862 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3864 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3865 Alan Hayward <alan.hayward@arm.com>
3866 David Sherwood <david.sherwood@arm.com>
3868 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3869 a HOST_WIDE_INT to a poly_int64.
3871 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3872 Alan Hayward <alan.hayward@arm.com>
3873 David Sherwood <david.sherwood@arm.com>
3875 * calls.c (load_register_parameters): Cope with polynomial
3876 mode sizes. Require a constant size for BLKmode parameters
3877 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3878 forces a parameter to be padded at the lsb end in order to
3879 fill a complete number of words, require the parameter size
3880 to be ordered wrt UNITS_PER_WORD.
3882 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3883 Alan Hayward <alan.hayward@arm.com>
3884 David Sherwood <david.sherwood@arm.com>
3886 * reload1.c (spill_stack_slot_width): Change element type
3887 from unsigned int to poly_uint64_pod.
3888 (alter_reg): Treat mode sizes as polynomial.
3890 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3891 Alan Hayward <alan.hayward@arm.com>
3892 David Sherwood <david.sherwood@arm.com>
3894 * reload.c (complex_word_subreg_p): New function.
3895 (reload_inner_reg_of_subreg, push_reload): Use it.
3897 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3898 Alan Hayward <alan.hayward@arm.com>
3899 David Sherwood <david.sherwood@arm.com>
3901 * lra-constraints.c (process_alt_operands): Reject matched
3902 operands whose sizes aren't ordered.
3903 (match_reload): Refer to this check here.
3905 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3906 Alan Hayward <alan.hayward@arm.com>
3907 David Sherwood <david.sherwood@arm.com>
3909 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3910 that the mode size is in the set {1, 2, 4, 8, 16}.
3912 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3913 Alan Hayward <alan.hayward@arm.com>
3914 David Sherwood <david.sherwood@arm.com>
3916 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3917 Use plus_constant instead of gen_rtx_PLUS.
3919 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3920 Alan Hayward <alan.hayward@arm.com>
3921 David Sherwood <david.sherwood@arm.com>
3923 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3924 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3925 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3926 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3927 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3928 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3929 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3930 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3931 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3932 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3933 a poly_int64.
3934 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3935 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3936 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3937 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3938 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3939 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3940 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3941 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3942 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3943 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3944 function.
3945 * expr.c (emit_move_resolve_push): Treat the input and result
3946 of PUSH_ROUNDING as a poly_int64.
3947 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3948 (emit_push_insn): Likewise.
3949 * lra-eliminations.c (mark_not_eliminable): Likewise.
3950 * recog.c (push_operand): Likewise.
3951 * reload1.c (elimination_effects): Likewise.
3952 * rtlanal.c (nonzero_bits1): Likewise.
3953 * calls.c (store_one_arg): Likewise. Require the padding to be
3954 known at compile time.
3956 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3957 Alan Hayward <alan.hayward@arm.com>
3958 David Sherwood <david.sherwood@arm.com>
3960 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3961 Use plus_constant instead of gen_rtx_PLUS.
3963 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3964 Alan Hayward <alan.hayward@arm.com>
3965 David Sherwood <david.sherwood@arm.com>
3967 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3968 rather than an int.
3970 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3971 Alan Hayward <alan.hayward@arm.com>
3972 David Sherwood <david.sherwood@arm.com>
3974 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3975 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3976 via stack temporaries. Treat the mode size as polynomial too.
3978 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3979 Alan Hayward <alan.hayward@arm.com>
3980 David Sherwood <david.sherwood@arm.com>
3982 * expr.c (expand_expr_real_2): When handling conversions involving
3983 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3984 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3985 as a poly_uint64 too.
3987 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3988 Alan Hayward <alan.hayward@arm.com>
3989 David Sherwood <david.sherwood@arm.com>
3991 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3993 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3994 Alan Hayward <alan.hayward@arm.com>
3995 David Sherwood <david.sherwood@arm.com>
3997 * combine.c (can_change_dest_mode): Handle polynomial
3998 REGMODE_NATURAL_SIZE.
3999 * expmed.c (store_bit_field_1): Likewise.
4000 * expr.c (store_constructor): Likewise.
4001 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4002 and polynomial REGMODE_NATURAL_SIZE.
4003 (gen_lowpart_common): Likewise.
4004 * reginfo.c (record_subregs_of_mode): Likewise.
4005 * rtlanal.c (read_modify_subreg_p): Likewise.
4007 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4008 Alan Hayward <alan.hayward@arm.com>
4009 David Sherwood <david.sherwood@arm.com>
4011 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4012 numbers of elements.
4014 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4015 Alan Hayward <alan.hayward@arm.com>
4016 David Sherwood <david.sherwood@arm.com>
4018 * match.pd: Cope with polynomial numbers of vector elements.
4020 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4021 Alan Hayward <alan.hayward@arm.com>
4022 David Sherwood <david.sherwood@arm.com>
4024 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4025 in a POINTER_PLUS_EXPR.
4027 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4028 Alan Hayward <alan.hayward@arm.com>
4029 David Sherwood <david.sherwood@arm.com>
4031 * omp-simd-clone.c (simd_clone_subparts): New function.
4032 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4033 (ipa_simd_modify_function_body): Likewise.
4035 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4036 Alan Hayward <alan.hayward@arm.com>
4037 David Sherwood <david.sherwood@arm.com>
4039 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4040 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4041 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4042 (expand_vector_condition, vector_element): Likewise.
4043 (subparts_gt): New function.
4044 (get_compute_type): Use subparts_gt.
4045 (count_type_subparts): Delete.
4046 (expand_vector_operations_1): Use subparts_gt instead of
4047 count_type_subparts.
4049 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4050 Alan Hayward <alan.hayward@arm.com>
4051 David Sherwood <david.sherwood@arm.com>
4053 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4054 (vect_compile_time_alias): ...this new function. Do the calculation
4055 on poly_ints rather than trees.
4056 (vect_prune_runtime_alias_test_list): Update call accordingly.
4058 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4059 Alan Hayward <alan.hayward@arm.com>
4060 David Sherwood <david.sherwood@arm.com>
4062 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4063 numbers of units.
4064 (vect_schedule_slp_instance): Likewise.
4066 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4067 Alan Hayward <alan.hayward@arm.com>
4068 David Sherwood <david.sherwood@arm.com>
4070 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4071 constant and extern definitions for variable-length vectors.
4072 (vect_get_constant_vectors): Note that the number of units
4073 is known to be constant.
4075 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4076 Alan Hayward <alan.hayward@arm.com>
4077 David Sherwood <david.sherwood@arm.com>
4079 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4080 of units as polynomial. Choose between WIDE and NARROW based
4081 on multiple_p.
4083 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4084 Alan Hayward <alan.hayward@arm.com>
4085 David Sherwood <david.sherwood@arm.com>
4087 * tree-vect-stmts.c (simd_clone_subparts): New function.
4088 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4090 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4091 Alan Hayward <alan.hayward@arm.com>
4092 David Sherwood <david.sherwood@arm.com>
4094 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4095 vectors as polynomial. Use build_index_vector for
4096 IFN_GOMP_SIMD_LANE.
4098 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4099 Alan Hayward <alan.hayward@arm.com>
4100 David Sherwood <david.sherwood@arm.com>
4102 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4103 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4104 for variable-length vectors.
4105 (vectorizable_mask_load_store): Treat the number of units as
4106 polynomial, asserting that it is constant if the condition has
4107 already been enforced.
4108 (vectorizable_store, vectorizable_load): Likewise.
4110 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4111 Alan Hayward <alan.hayward@arm.com>
4112 David Sherwood <david.sherwood@arm.com>
4114 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4115 of units as polynomial. Punt if we can't tell at compile time
4116 which vector contains the final result.
4118 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4119 Alan Hayward <alan.hayward@arm.com>
4120 David Sherwood <david.sherwood@arm.com>
4122 * tree-vect-loop.c (vectorizable_induction): Treat the number
4123 of units as polynomial. Punt on SLP inductions. Use an integer
4124 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4125 cast of such a series for variable-length floating-point
4126 reductions.
4128 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4129 Alan Hayward <alan.hayward@arm.com>
4130 David Sherwood <david.sherwood@arm.com>
4132 * tree.h (build_index_vector): Declare.
4133 * tree.c (build_index_vector): New function.
4134 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4135 of units as polynomial, forcibly converting it to a constant if
4136 vectorizable_reduction has already enforced the condition.
4137 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4138 to create a {1,2,3,...} vector.
4139 (vectorizable_reduction): Treat the number of units as polynomial.
4140 Choose vectype_in based on the largest scalar element size rather
4141 than the smallest number of units. Enforce the restrictions
4142 relied on above.
4144 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4145 Alan Hayward <alan.hayward@arm.com>
4146 David Sherwood <david.sherwood@arm.com>
4148 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4149 number of units as polynomial.
4151 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4152 Alan Hayward <alan.hayward@arm.com>
4153 David Sherwood <david.sherwood@arm.com>
4155 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4156 * target.def (autovectorize_vector_sizes): Return the vector sizes
4157 by pointer, using vector_sizes rather than a bitmask.
4158 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4159 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4160 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4161 Likewise.
4162 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4163 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4164 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4165 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4166 * omp-general.c (omp_max_vf): Likewise.
4167 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4168 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4169 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4170 * tree-vect-slp.c (vect_slp_bb): Likewise.
4171 * doc/tm.texi: Regenerate.
4172 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4173 to a poly_uint64.
4174 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4175 the vector size as a poly_uint64 rather than an unsigned int.
4176 (current_vector_size): Change from an unsigned int to a poly_uint64.
4177 (get_vectype_for_scalar_type): Update accordingly.
4178 * tree.h (build_truth_vector_type): Take the size and number of
4179 units as a poly_uint64 rather than an unsigned int.
4180 (build_vector_type): Add a temporary overload that takes
4181 the number of units as a poly_uint64 rather than an unsigned int.
4182 * tree.c (make_vector_type): Likewise.
4183 (build_truth_vector_type): Take the number of units as a poly_uint64
4184 rather than an unsigned int.
4186 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4187 Alan Hayward <alan.hayward@arm.com>
4188 David Sherwood <david.sherwood@arm.com>
4190 * target.def (get_mask_mode): Take the number of units and length
4191 as poly_uint64s rather than unsigned ints.
4192 * targhooks.h (default_get_mask_mode): Update accordingly.
4193 * targhooks.c (default_get_mask_mode): Likewise.
4194 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4195 * doc/tm.texi: Regenerate.
4197 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4198 Alan Hayward <alan.hayward@arm.com>
4199 David Sherwood <david.sherwood@arm.com>
4201 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4202 * omp-general.c (omp_max_vf): Likewise.
4203 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4204 (expand_omp_simd): Handle polynomial safelen.
4205 * omp-low.c (omplow_simd_context): Add a default constructor.
4206 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4207 (lower_rec_simd_input_clauses): Update accordingly.
4208 (lower_rec_input_clauses): Likewise.
4210 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4211 Alan Hayward <alan.hayward@arm.com>
4212 David Sherwood <david.sherwood@arm.com>
4214 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4215 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4216 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4217 (vect_analyze_slp_cost): Likewise.
4218 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4219 (vect_model_load_cost): Likewise.
4221 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4222 Alan Hayward <alan.hayward@arm.com>
4223 David Sherwood <david.sherwood@arm.com>
4225 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4226 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4227 from an unsigned int * to a poly_uint64_pod *.
4228 (calculate_unrolling_factor): New function.
4229 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4231 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4232 Alan Hayward <alan.hayward@arm.com>
4233 David Sherwood <david.sherwood@arm.com>
4235 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4236 from an unsigned int to a poly_uint64.
4237 (_loop_vec_info::slp_unrolling_factor): Likewise.
4238 (_loop_vec_info::vectorization_factor): Change from an int
4239 to a poly_uint64.
4240 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4241 (vect_get_num_vectors): New function.
4242 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4243 (vect_get_num_copies): Use vect_get_num_vectors.
4244 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4245 to an unsigned int *.
4246 (vect_analyze_data_refs): Change min_vf from an int * to a
4247 poly_uint64 *.
4248 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4249 than an unsigned HOST_WIDE_INT.
4250 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4251 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4252 to an unsigned int *.
4253 (vect_analyze_data_ref_dependences): Likewise.
4254 (vect_compute_data_ref_alignment): Handle polynomial vf.
4255 (vect_enhance_data_refs_alignment): Likewise.
4256 (vect_prune_runtime_alias_test_list): Likewise.
4257 (vect_shift_permute_load_chain): Likewise.
4258 (vect_supportable_dr_alignment): Likewise.
4259 (dependence_distance_ge_vf): Take the vectorization factor as a
4260 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4261 (vect_analyze_data_refs): Change min_vf from an int * to a
4262 poly_uint64 *.
4263 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4264 vfm1 as a poly_uint64 rather than an int. Make the same change
4265 for the returned bound_scalar.
4266 (vect_gen_vector_loop_niters): Handle polynomial vf.
4267 (vect_do_peeling): Likewise. Update call to
4268 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4269 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4270 be constant.
4271 * tree-vect-loop.c (vect_determine_vectorization_factor)
4272 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4273 (vect_get_known_peeling_cost): Likewise.
4274 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4275 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4276 (vect_transform_loop): Likewise. Use the lowest possible VF when
4277 updating the upper bounds of the loop.
4278 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4279 rather than an int.
4280 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4281 polynomial unroll factors.
4282 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4283 (vect_make_slp_decision): Likewise.
4284 (vect_supported_load_permutation_p): Likewise, and polynomial
4285 vf too.
4286 (vect_analyze_slp_cost): Handle polynomial vf.
4287 (vect_slp_analyze_node_operations): Likewise.
4288 (vect_slp_analyze_bb_1): Likewise.
4289 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4290 than an unsigned HOST_WIDE_INT.
4291 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4292 (vectorizable_load): Handle polynomial vf.
4293 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4294 a poly_uint64.
4295 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4297 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4298 Alan Hayward <alan.hayward@arm.com>
4299 David Sherwood <david.sherwood@arm.com>
4301 * match.pd: Handle bit operations involving three constants
4302 and try to fold one pair.
4304 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4306 * tree-vect-loop-manip.c: Include gimple-fold.h.
4307 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4308 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4309 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4310 Add a path that uses a step of VF instead of 1, but disable it
4311 for now.
4312 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4313 and niters_no_overflow parameters. Update calls to
4314 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4315 Create a new SSA name if the latter choses to use a ste other
4316 than zero, and return it via niters_vector_mult_vf_var.
4317 * tree-vect-loop.c (vect_transform_loop): Update calls to
4318 vect_do_peeling, vect_gen_vector_loop_niters and
4319 slpeel_make_loop_iterate_ntimes.
4320 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4321 (vect_gen_vector_loop_niters): Update declarations after above changes.
4323 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4325 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4326 128-bit round to integer instructions.
4327 (ceil<mode>2): Likewise.
4328 (btrunc<mode>2): Likewise.
4329 (round<mode>2): Likewise.
4331 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4333 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4334 unaligned VSX load/store on P8/P9.
4335 (expand_block_clear): Allow the use of unaligned VSX
4336 load/store on P8/P9.
4338 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4340 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4341 New function.
4342 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4343 swap associated with both a load and a store.
4345 2018-01-02 Andrew Waterman <andrew@sifive.com>
4347 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4348 * config/riscv/riscv.md (clear_cache): Use it.
4350 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4352 * web.c: Remove out-of-date comment.
4354 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4356 * expr.c (fixup_args_size_notes): Check that any existing
4357 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4358 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4359 (emit_single_push_insn): ...here.
4361 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4363 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4364 (const_vector_encoded_nelts): New function.
4365 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4366 (const_vector_int_elt, const_vector_elt): Declare.
4367 * emit-rtl.c (const_vector_int_elt_1): New function.
4368 (const_vector_elt): Likewise.
4369 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4370 of CONST_VECTOR_ELT.
4372 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4374 * expr.c: Include rtx-vector-builder.h.
4375 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4376 directly on the tree encoding.
4377 (const_vector_from_tree): Likewise.
4378 * optabs.c: Include rtx-vector-builder.h.
4379 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4380 sequence of "u" values.
4381 * vec-perm-indices.c: Include rtx-vector-builder.h.
4382 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4383 directly on the vec_perm_indices encoding.
4385 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4387 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4388 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4389 * rtx-vector-builder.h: New file.
4390 * rtx-vector-builder.c: Likewise.
4391 * rtl.h (rtx_def::u2): Add a const_vector field.
4392 (CONST_VECTOR_NPATTERNS): New macro.
4393 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4394 (CONST_VECTOR_DUPLICATE_P): Likewise.
4395 (CONST_VECTOR_STEPPED_P): Likewise.
4396 (CONST_VECTOR_ENCODED_ELT): Likewise.
4397 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4398 (unwrap_const_vec_duplicate): Likewise.
4399 (const_vec_series_p): Check for a non-duplicated vector encoding.
4400 Say that the function only returns true for integer vectors.
4401 * emit-rtl.c: Include rtx-vector-builder.h.
4402 (gen_const_vec_duplicate_1): Delete.
4403 (gen_const_vector): Call gen_const_vec_duplicate instead of
4404 gen_const_vec_duplicate_1.
4405 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4406 (gen_const_vec_duplicate): Use rtx_vector_builder.
4407 (gen_const_vec_series): Likewise.
4408 (gen_rtx_CONST_VECTOR): Likewise.
4409 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4410 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4411 Build a new vector rather than modifying a CONST_VECTOR in-place.
4412 (handle_special_swappables): Update call accordingly.
4413 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4414 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4415 Build a new vector rather than modifying a CONST_VECTOR in-place.
4416 (handle_special_swappables): Update call accordingly.
4418 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4420 * simplify-rtx.c (simplify_const_binary_operation): Use
4421 CONST_VECTOR_ELT instead of XVECEXP.
4423 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4425 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4426 the selector elements to be different from the data elements
4427 if the selector is a VECTOR_CST.
4428 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4429 ssizetype for the selector.
4431 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4433 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4434 before testing each element individually.
4435 * tree-vect-generic.c (lower_vec_perm): Likewise.
4437 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4439 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4440 * selftest-run-tests.c (selftest::run_tests): Call it.
4441 * vector-builder.h (vector_builder::operator ==): New function.
4442 (vector_builder::operator !=): Likewise.
4443 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4444 (vec_perm_indices::all_from_input_p): New function.
4445 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4446 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4447 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4448 instead of reading the VECTOR_CST directly. Detect whether both
4449 vector inputs are the same before constructing the vec_perm_indices,
4450 and update the number of inputs argument accordingly. Use the
4451 utility functions added above. Only construct sel2 if we need to.
4453 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4455 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4456 the broadcast of the low byte.
4457 (expand_mult_highpart): Use an explicit encoding for the permutes.
4458 * optabs-query.c (can_mult_highpart_p): Likewise.
4459 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4460 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4461 (vectorizable_bswap): Likewise.
4462 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4463 explicit encoding for the power-of-2 permutes.
4464 (vect_permute_store_chain): Likewise.
4465 (vect_grouped_load_supported): Likewise.
4466 (vect_permute_load_chain): Likewise.
4468 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4470 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4471 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4472 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4473 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4474 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4475 (vect_gen_perm_mask_any): Likewise.
4477 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4479 * int-vector-builder.h: New file.
4480 * vec-perm-indices.h: Include int-vector-builder.h.
4481 (vec_perm_indices): Redefine as an int_vector_builder.
4482 (auto_vec_perm_indices): Delete.
4483 (vec_perm_builder): Redefine as a stand-alone class.
4484 (vec_perm_indices::vec_perm_indices): New function.
4485 (vec_perm_indices::clamp): Likewise.
4486 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4487 (vec_perm_indices::new_vector): New function.
4488 (vec_perm_indices::new_expanded_vector): Update for new
4489 vec_perm_indices class.
4490 (vec_perm_indices::rotate_inputs): New function.
4491 (vec_perm_indices::all_in_range_p): Operate directly on the
4492 encoded form, without computing elided elements.
4493 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4494 encoding. Update for new vec_perm_indices class.
4495 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4496 the given vec_perm_builder.
4497 (expand_vec_perm_var): Update vec_perm_builder constructor.
4498 (expand_mult_highpart): Use vec_perm_builder instead of
4499 auto_vec_perm_indices.
4500 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4501 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4502 or double series encoding as appropriate.
4503 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4504 vec_perm_indices instead of auto_vec_perm_indices.
4505 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4506 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4507 (vect_permute_store_chain): Likewise.
4508 (vect_grouped_load_supported): Likewise.
4509 (vect_permute_load_chain): Likewise.
4510 (vect_shift_permute_load_chain): Likewise.
4511 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4512 (vect_transform_slp_perm_load): Likewise.
4513 (vect_schedule_slp_instance): Likewise.
4514 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4515 (vectorizable_mask_load_store): Likewise.
4516 (vectorizable_bswap): Likewise.
4517 (vectorizable_store): Likewise.
4518 (vectorizable_load): Likewise.
4519 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4520 vec_perm_indices instead of auto_vec_perm_indices. Use
4521 tree_to_vec_perm_builder to read the vector from a tree.
4522 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4523 vec_perm_builder instead of a vec_perm_indices.
4524 (have_whole_vector_shift): Use vec_perm_builder and
4525 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4526 truncation to calc_vec_perm_mask_for_shift.
4527 (vect_create_epilog_for_reduction): Likewise.
4528 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4529 from auto_vec_perm_indices to vec_perm_indices.
4530 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4531 instead of changing individual elements.
4532 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4533 the vector in d.perm.
4534 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4535 from auto_vec_perm_indices to vec_perm_indices.
4536 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4537 instead of changing individual elements.
4538 (arm_vectorize_vec_perm_const): Use new_vector to install
4539 the vector in d.perm.
4540 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4541 Update vec_perm_builder constructor.
4542 (rs6000_expand_interleave): Likewise.
4543 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4544 (rs6000_expand_interleave): Likewise.
4546 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4548 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4549 to qimode could truncate the indices.
4550 * optabs.c (expand_vec_perm_var): Likewise.
4552 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4554 * Makefile.in (OBJS): Add vec-perm-indices.o.
4555 * vec-perm-indices.h: New file.
4556 * vec-perm-indices.c: Likewise.
4557 * target.h (vec_perm_indices): Replace with a forward class
4558 declaration.
4559 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4560 * optabs.h: Include vec-perm-indices.h.
4561 (expand_vec_perm): Delete.
4562 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4563 (expand_vec_perm_const): Declare.
4564 * target.def (vec_perm_const_ok): Replace with...
4565 (vec_perm_const): ...this new hook.
4566 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4567 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4568 * doc/tm.texi: Regenerate.
4569 * optabs.def (vec_perm_const): Delete.
4570 * doc/md.texi (vec_perm_const): Likewise.
4571 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4572 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4573 expand_vec_perm for constant permutation vectors. Assert that
4574 the mode of variable permutation vectors is the integer equivalent
4575 of the mode that is being permuted.
4576 * optabs-query.h (selector_fits_mode_p): Declare.
4577 * optabs-query.c: Include vec-perm-indices.h.
4578 (selector_fits_mode_p): New function.
4579 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4580 is defined, instead of checking whether the vec_perm_const_optab
4581 exists. Use targetm.vectorize.vec_perm_const instead of
4582 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4583 fit in the vector mode before using a variable permute.
4584 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4585 vec_perm_indices instead of an rtx.
4586 (expand_vec_perm): Replace with...
4587 (expand_vec_perm_const): ...this new function. Take the selector
4588 as a vec_perm_indices rather than an rtx. Also take the mode of
4589 the selector. Update call to shift_amt_for_vec_perm_mask.
4590 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4591 Use vec_perm_indices::new_expanded_vector to expand the original
4592 selector into bytes. Check whether the indices fit in the vector
4593 mode before using a variable permute.
4594 (expand_vec_perm_var): Make global.
4595 (expand_mult_highpart): Use expand_vec_perm_const.
4596 * fold-const.c: Includes vec-perm-indices.h.
4597 * tree-ssa-forwprop.c: Likewise.
4598 * tree-vect-data-refs.c: Likewise.
4599 * tree-vect-generic.c: Likewise.
4600 * tree-vect-loop.c: Likewise.
4601 * tree-vect-slp.c: Likewise.
4602 * tree-vect-stmts.c: Likewise.
4603 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4604 Delete.
4605 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4606 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4607 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4608 (aarch64_vectorize_vec_perm_const): ...this new function.
4609 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4610 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4611 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4612 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4613 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4614 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4615 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4616 into...
4617 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4618 check for NEON modes.
4619 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4620 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4621 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4622 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4623 into...
4624 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4625 the old VEC_PERM_CONST conditions.
4626 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4627 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4628 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4629 (ia64_vectorize_vec_perm_const_ok): Merge into...
4630 (ia64_vectorize_vec_perm_const): ...this new function.
4631 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4632 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4633 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4634 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4635 * config/mips/mips.c (mips_expand_vec_perm_const)
4636 (mips_vectorize_vec_perm_const_ok): Merge into...
4637 (mips_vectorize_vec_perm_const): ...this new function.
4638 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4639 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4640 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4641 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4642 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4643 (rs6000_expand_vec_perm_const): Delete.
4644 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4645 Delete.
4646 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4647 (altivec_expand_vec_perm_const_le): Take each operand individually.
4648 Operate on constant selectors rather than rtxes.
4649 (altivec_expand_vec_perm_const): Likewise. Update call to
4650 altivec_expand_vec_perm_const_le.
4651 (rs6000_expand_vec_perm_const): Delete.
4652 (rs6000_vectorize_vec_perm_const_ok): Delete.
4653 (rs6000_vectorize_vec_perm_const): New function.
4654 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4655 an element count and rtx array.
4656 (rs6000_expand_extract_even): Update call accordingly.
4657 (rs6000_expand_interleave): Likewise.
4658 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4659 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4660 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4661 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4662 (rs6000_expand_vec_perm_const): Delete.
4663 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4664 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4665 (altivec_expand_vec_perm_const_le): Take each operand individually.
4666 Operate on constant selectors rather than rtxes.
4667 (altivec_expand_vec_perm_const): Likewise. Update call to
4668 altivec_expand_vec_perm_const_le.
4669 (rs6000_expand_vec_perm_const): Delete.
4670 (rs6000_vectorize_vec_perm_const_ok): Delete.
4671 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4672 reference to the SPE evmerge intructions.
4673 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4674 an element count and rtx array.
4675 (rs6000_expand_extract_even): Update call accordingly.
4676 (rs6000_expand_interleave): Likewise.
4677 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4678 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4679 new function.
4680 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4682 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4684 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4685 vector mode and that that mode matches the mode of the data
4686 being permuted.
4687 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4688 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4689 directly using expand_vec_perm_1 when forcing selectors into
4690 registers.
4691 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4693 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4695 * optabs-query.h (can_vec_perm_p): Delete.
4696 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4697 * optabs-query.c (can_vec_perm_p): Split into...
4698 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4699 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4700 particular selector is valid.
4701 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4702 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4703 (vect_grouped_load_supported): Likewise.
4704 (vect_shift_permute_load_chain): Likewise.
4705 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4706 (vect_transform_slp_perm_load): Likewise.
4707 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4708 (vectorizable_bswap): Likewise.
4709 (vect_gen_perm_mask_checked): Likewise.
4710 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4711 implementations of variable permutation vectors into account
4712 when deciding which selector to use.
4713 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4714 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4715 with a false third argument.
4716 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4717 to test whether the constant selector is valid and can_vec_perm_var_p
4718 to test whether a variable selector is valid.
4720 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4722 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4723 * optabs-query.c (can_vec_perm_p): Likewise.
4724 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4725 instead of vec_perm_indices.
4726 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4727 (vect_gen_perm_mask_checked): Likewise,
4728 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4729 (vect_gen_perm_mask_checked): Likewise,
4731 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4733 * optabs-query.h (qimode_for_vec_perm): Declare.
4734 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4735 (qimode_for_vec_perm): ...this new function.
4736 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4738 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4740 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4741 does not have a conditional at the top.
4743 2018-01-02 Richard Biener <rguenther@suse.de>
4745 * ipa-inline.c (big_speedup_p): Fix expression.
4747 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4749 PR target/81616
4750 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4751 for generic 4->6.
4753 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4755 PR target/81616
4756 Generic tuning.
4757 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4758 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4759 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4760 cond_taken_branch_cost 3->4.
4762 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4764 PR tree-optimization/83581
4765 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4766 TODO_cleanup_cfg if any changes have been made.
4768 PR middle-end/83608
4769 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4770 convert_modes if target mode has the right side, but different mode
4771 class.
4773 PR middle-end/83609
4774 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4775 last argument when extracting from CONCAT. If either from_real or
4776 from_imag is NULL, use expansion through memory. If result is not
4777 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4778 the parts directly to inner mode, if even that fails, use expansion
4779 through memory.
4781 PR middle-end/83623
4782 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4783 check for bswap in mode rather than HImode and use that in expand_unop
4784 too.
4785 \f
4786 Copyright (C) 2018 Free Software Foundation, Inc.
4788 Copying and distribution of this file, with or without modification,
4789 are permitted in any medium without royalty provided the copyright
4790 notice and this notice are preserved.