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1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #ifndef _S390_H
23 #define _S390_H
29 /* Run-time compilation parameters selecting different hardware subsets. */
33 /* Target macros checked at runtime of compiler. */
35 #define TARGET_HARD_FLOAT (target_flags & 1)
36 #define TARGET_BACKCHAIN (target_flags & 2)
37 #define TARGET_SMALL_EXEC (target_flags & 4)
38 #define TARGET_DEBUG_ARG (target_flags & 8)
39 #define TARGET_64BIT (target_flags & 16)
40 #define TARGET_MVCLE (target_flags & 32)
42 #define TARGET_DEFAULT 0x3
43 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
45 /* Macro to define tables used to set the flags. This is a list in braces
46 of pairs in braces, each pair being { "NAME", VALUE }
47 where VALUE is the bits to set or minus the bits to clear.
48 An empty string NAME is used to identify the default VALUE. */
50 #define TARGET_SWITCHES \
65 /* Define this to change the optimizations performed by default. */
66 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
68 /* Sometimes certain combinations of command options do not make sense
69 on a particular target machine. You can define a macro
70 `OVERRIDE_OPTIONS' to take account of this. This macro, if
71 defined, is executed once just after all the command options have
72 been parsed. */
73 #define OVERRIDE_OPTIONS override_options ()
76 /* Defines for REAL_ARITHMETIC. */
77 #define IEEE_FLOAT 1
78 #define TARGET_IBM_FLOAT 0
79 #define TARGET_IEEE_FLOAT 1
81 /* The current function count for create unique internal labels. */
85 /* The amount of space used for outgoing arguments. */
89 /* Target machine storage layout. */
91 /* Define this if most significant bit is lowest numbered in instructions
92 that operate on numbered bit-fields. */
94 #define BITS_BIG_ENDIAN 1
96 /* Define this if most significant byte of a word is the lowest numbered. */
98 #define BYTES_BIG_ENDIAN 1
100 /* Define this if MS word of a multiword is the lowest numbered. */
102 #define WORDS_BIG_ENDIAN 1
104 /* Number of bits in an addressable storage unit. */
106 #define BITS_PER_UNIT 8
108 /* Width in bits of a "word", which is the contents of a machine register. */
110 #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
111 #define MAX_BITS_PER_WORD 64
113 /* Width of a word, in units (bytes). */
115 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
116 #define MIN_UNITS_PER_WORD 4
118 /* Width in bits of a pointer. See also the macro `Pmode' defined below. */
120 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
122 /* A C expression for the size in bits of the type `short' on the
123 target machine. If you don't define this, the default is half a
124 word. (If this would be less than one storage unit, it is
125 rounded up to one unit.) */
126 #define SHORT_TYPE_SIZE 16
128 /* A C expression for the size in bits of the type `int' on the
129 target machine. If you don't define this, the default is one
130 word. */
131 #define INT_TYPE_SIZE 32
133 /* A C expression for the size in bits of the type `long' on the
134 target machine. If you don't define this, the default is one
135 word. */
136 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
137 #define MAX_LONG_TYPE_SIZE 64
139 /* A C expression for the size in bits of the type `long long' on the
140 target machine. If you don't define this, the default is two
141 words. */
142 #define LONG_LONG_TYPE_SIZE 64
144 /* Right now we only support two floating point formats, the
145 32 and 64 bit ieee formats. */
147 #define FLOAT_TYPE_SIZE 32
148 #define DOUBLE_TYPE_SIZE 64
149 #define LONG_DOUBLE_TYPE_SIZE 64
151 /* Define this macro if it is advisable to hold scalars in registers
152 in a wider mode than that declared by the program. In such cases,
153 the value is constrained to be within the bounds of the declared
154 type, but kept valid in the wider mode. The signedness of the
155 extension may differ from that of the type. */
157 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
158 if (INTEGRAL_MODE_P (MODE) && \
159 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
160 (MODE) = Pmode; \
161 }
163 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
164 extensions applied to char/short functions arguments. Defining
165 PROMOTE_FUNCTION_RETURN does the same for function returns. */
167 #define PROMOTE_FUNCTION_ARGS
168 #define PROMOTE_FUNCTION_RETURN
169 #define PROMOTE_FOR_CALL_ONLY
171 /* Allocation boundary (in *bits*) for storing pointers in memory. */
173 #define POINTER_BOUNDARY 32
175 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
177 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
179 /* Boundary (in *bits*) on which stack pointer should be aligned. */
181 #define STACK_BOUNDARY 64
183 /* Allocation boundary (in *bits*) for the code of a function. */
185 #define FUNCTION_BOUNDARY 32
187 /* There is no point aligning anything to a rounder boundary than this. */
189 #define BIGGEST_ALIGNMENT 64
191 /* Alignment of field after `int : 0' in a structure. */
193 #define EMPTY_FIELD_BOUNDARY 32
195 /* Alignment on even addresses for LARL instruction. */
197 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
199 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
201 /* Define this if move instructions will actually fail to work when given
202 unaligned data. */
204 #define STRICT_ALIGNMENT 0
206 /* real arithmetic */
208 #define REAL_ARITHMETIC
210 /* Define target floating point format. */
212 #undef TARGET_FLOAT_FORMAT
213 #ifdef IEEE_FLOAT
214 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
215 #else
216 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
217 #endif
219 /* Define if special allocation order desired. */
221 #define REG_ALLOC_ORDER \
222 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
223 16, 17, 18, 19, 20, 21, 22, 23, \
224 24, 25, 26, 27, 28, 29, 30, 31, \
225 15, 32, 33 }
227 /* Standard register usage. */
229 #define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 )
230 #ifdef IEEE_FLOAT
231 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 )
232 #else
233 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
234 #endif
235 #define CC_REGNO_P(N) ( (N) == 33 )
237 /* Number of actual hardware registers. The hardware registers are
238 assigned numbers for the compiler from 0 to just below
239 FIRST_PSEUDO_REGISTER.
240 All registers that the compiler knows about must be given numbers,
241 even those that are not normally considered general registers.
242 For the 390, we give the data registers numbers 0-15,
243 and the floating point registers numbers 16-19.
244 G5 and following have 16 IEEE floating point register,
245 which get numbers 16-31. */
247 #define FIRST_PSEUDO_REGISTER 35
249 /* Number of hardware registers that go into the DWARF-2 unwind info.
250 If not defined, equals FIRST_PSEUDO_REGISTER. */
252 #define DWARF_FRAME_REGISTERS 34
254 /* The following register have a fix usage
255 GPR 12: GOT register points to the GOT, setup in prologue,
256 GOT contains pointer to variables in shared libraries
257 GPR 13: Base register setup in prologue to point to the
258 literal table of each function
259 GPR 14: Return registers holds the return address
260 GPR 15: Stack pointer */
262 #define PIC_OFFSET_TABLE_REGNUM 12
263 #define BASE_REGISTER 13
264 #define RETURN_REGNUM 14
265 #define STACK_POINTER_REGNUM 15
267 #define FIXED_REGISTERS \
268 { 0, 0, 0, 0, \
269 0, 0, 0, 0, \
270 0, 0, 0, 0, \
271 0, 1, 1, 1, \
272 0, 0, 0, 0, \
273 0, 0, 0, 0, \
274 0, 0, 0, 0, \
275 0, 0, 0, 0, \
276 1, 1, 1 }
278 /* 1 for registers not available across function calls. These must include
279 the FIXED_REGISTERS and also any registers that can be used without being
280 saved.
281 The latter must include the registers where values are returned
282 and the register where structure-value addresses are passed. */
284 #define CALL_USED_REGISTERS \
285 { 1, 1, 1, 1, \
286 1, 1, 0, 0, \
287 0, 0, 0, 0, \
288 0, 1, 1, 1, \
289 1, 1, 1, 1, \
290 1, 1, 1, 1, \
291 1, 1, 1, 1, \
292 1, 1, 1, 1, \
293 1, 1, 1 }
295 /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
296 the entire set of `FIXED_REGISTERS' be included.
297 (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). */
299 #define CALL_REALLY_USED_REGISTERS \
300 { 1, 1, 1, 1, \
301 1, 1, 0, 0, \
302 0, 0, 0, 0, \
303 0, 0, 0, 0, \
304 1, 1, 1, 1, \
305 1, 1, 1, 1, \
306 1, 1, 1, 1, \
307 1, 1, 1, 1, \
308 1, 1, 1 }
310 /* Macro to conditionally modify fixed_regs/call_used_regs. */
312 #define CONDITIONAL_REGISTER_USAGE \
313 do \
314 { \
315 int i; \
316 \
317 if (flag_pic) \
318 { \
319 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
320 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
321 } \
322 if (TARGET_64BIT) \
323 { \
324 for (i = 24; i < 32; i++) \
325 call_used_regs[i] = call_really_used_regs[i] = 0; \
326 } \
327 else \
328 { \
329 for (i = 18; i < 20; i++) \
330 call_used_regs[i] = call_really_used_regs[i] = 0; \
331 } \
332 } while (0)
334 /* The following register have a special usage
335 GPR 11: Frame pointer if needed to point to automatic variables.
336 GPR 32: In functions with more the 5 args this register
337 points to that arguments, it is always eliminated
338 with stack- or frame-pointer.
339 GPR 33: Condition code 'register' */
341 #define HARD_FRAME_POINTER_REGNUM 11
342 #define FRAME_POINTER_REGNUM 34
344 #define ARG_POINTER_REGNUM 32
346 #define CC_REGNUM 33
348 /* We use the register %r0 to pass the static chain to a nested function.
350 Note: It is assumed that this register is call-clobbered!
351 We can't use any of the function-argument registers either,
352 and register 1 is needed by the trampoline code, so we have
353 no other choice but using this one ... */
355 #define STATIC_CHAIN_REGNUM 0
357 /* Return number of consecutive hard regs needed starting at reg REGNO
358 to hold something of mode MODE.
359 This is ordinarily the length in words of a value of mode MODE
360 but can be less for certain modes in special long registers. */
362 #define HARD_REGNO_NREGS(REGNO, MODE) \
363 (FLOAT_REGNO_P(REGNO)? \
364 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
365 INT_REGNO_P(REGNO)? \
366 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
367 1)
369 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
370 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
371 Even gprs can hold DI.
372 The floating point registers can hold DF, SF, DC and SC. */
374 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
375 (FLOAT_REGNO_P(REGNO)? \
376 (GET_MODE_CLASS(MODE) == MODE_FLOAT || \
377 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT || \
378 (MODE) == SImode || (MODE) == DImode) : \
379 INT_REGNO_P(REGNO)? \
380 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
381 CC_REGNO_P(REGNO)? \
382 GET_MODE_CLASS (MODE) == MODE_CC : \
383 0)
385 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
386 mode MODE1 and one has mode MODE2.
387 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
388 for any hard reg, then this must be 0 for correct output. */
390 #define MODES_TIEABLE_P(MODE1, MODE2) \
391 (((MODE1) == SFmode || (MODE1) == DFmode) \
392 == ((MODE2) == SFmode || (MODE2) == DFmode))
394 /* If defined, gives a class of registers that cannot be used as the
395 operand of a SUBREG that changes the mode of the object illegally. */
397 #define CLASS_CANNOT_CHANGE_MODE FP_REGS
399 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
401 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
402 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
404 /* Define this macro if references to a symbol must be treated
405 differently depending on something about the variable or
406 function named by the symbol (such as what section it is in).
408 On s390, if using PIC, mark a SYMBOL_REF for a non-global symbol
409 so that we may access it directly in the GOT. */
411 #define ENCODE_SECTION_INFO(DECL) \
412 do \
413 { \
414 if (flag_pic) \
415 { \
417 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
418 \
419 if (GET_CODE (rtl) == MEM) \
420 { \
421 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
423 || ! TREE_PUBLIC (DECL)); \
424 } \
425 } \
426 } \
427 while (0)
430 /* This is an array of structures. Each structure initializes one pair
431 of eliminable registers. The "from" register number is given first,
432 followed by "to". Eliminations of the same "from" register are listed
433 in order of preference. */
435 #define ELIMINABLE_REGS \
436 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
437 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
438 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
439 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
441 #define CAN_ELIMINATE(FROM, TO) (1)
443 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
444 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
445 { (OFFSET) = 0; } \
446 else if ((FROM) == FRAME_POINTER_REGNUM \
447 && (TO) == HARD_FRAME_POINTER_REGNUM) \
448 { (OFFSET) = 0; } \
449 else if ((FROM) == ARG_POINTER_REGNUM \
450 && (TO) == HARD_FRAME_POINTER_REGNUM) \
451 { (OFFSET) = s390_arg_frame_offset (); } \
452 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
453 { (OFFSET) = s390_arg_frame_offset (); } \
454 else \
455 abort(); \
456 }
458 #define CAN_DEBUG_WITHOUT_FP
460 /* Value should be nonzero if functions must have frame pointers.
461 Zero means the frame pointer need not be set up (and parms may be
462 accessed via the stack pointer) in functions that seem suitable.
463 This is computed in `reload', in reload1.c. */
465 #define FRAME_POINTER_REQUIRED 0
467 /* Define the classes of registers for register constraints in the
468 machine description. Also define ranges of constants.
470 One of the classes must always be named ALL_REGS and include all hard regs.
471 If there is more than one class, another class must be named NO_REGS
472 and contain no registers.
474 The name GENERAL_REGS must be the name of a class (or an alias for
475 another name such as ALL_REGS). This is the class of registers
476 that is allowed by "g" or "r" in a register constraint.
477 Also, registers outside this class are allocated only when
478 instructions express preferences for them.
480 The classes must be numbered in nondecreasing order; that is,
481 a larger-numbered class must never be contained completely
482 in a smaller-numbered class.
484 For any two classes, it is very desirable that there be another
485 class that represents their union. */
487 /*#define SMALL_REGISTER_CLASSES 1*/
489 enum reg_class
490 {
493 ALL_REGS, LIM_REG_CLASSES
494 };
496 #define N_REG_CLASSES (int) LIM_REG_CLASSES
498 /* Give names of register classes as strings for dump file. */
500 #define REG_CLASS_NAMES \
504 /* Define which registers fit in which classes. This is an initializer for
505 a vector of HARD_REG_SET of length N_REG_CLASSES.
506 G5 and latter have 16 register and support IEEE floating point operations. */
508 #define REG_CLASS_CONTENTS \
509 { \
517 }
520 /* The same information, inverted:
521 Return the class number of the smallest class containing
522 reg number REGNO. This could be a conditional expression
523 or could index an array. */
525 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
529 /* The class value for index registers, and the one for base regs. */
531 #define INDEX_REG_CLASS ADDR_REGS
532 #define BASE_REG_CLASS ADDR_REGS
534 /* Get reg_class from a letter such as appears in the machine description. */
536 #define REG_CLASS_FROM_LETTER(C) \
541 /* The letters I, J, K, L and M in a register constraint string can be used
542 to stand for particular ranges of immediate operands.
543 This macro defines what the ranges are.
544 C is the letter, and VALUE is a constant value.
545 Return 1 if VALUE is in the range specified by C. */
547 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
553 /* Similar, but for floating constants, and defining letters G and H.
554 Here VALUE is the CONST_DOUBLE rtx itself. */
556 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
558 /* 'Q' means a memory-reference for a S-type operand. */
560 #define EXTRA_CONSTRAINT(OP, C) \
564 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
565 return the class of reg to actually use. In general this is just CLASS;
566 but on some machines in some cases it is preferable to use a more
567 restrictive class. */
569 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
570 s390_preferred_reload_class ((X), (CLASS))
572 /* Return the maximum number of consecutive registers needed to represent
573 mode MODE in a register of class CLASS. */
575 #define CLASS_MAX_NREGS(CLASS, MODE) \
576 ((CLASS) == FP_REGS ? \
577 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
578 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
580 /* If we are copying between FP registers and anything else, we need a memory
581 location. */
583 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
584 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
586 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
587 because the movsi and movsf patterns don't handle r/f moves. */
589 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
590 (GET_MODE_BITSIZE (MODE) < 32 \
591 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
592 : MODE)
595 /* A C expression whose value is nonzero if pseudos that have been
596 assigned to registers of class CLASS would likely be spilled
597 because registers of CLASS are needed for spill registers.
599 The default value of this macro returns 1 if CLASS has exactly one
600 register and zero otherwise. On most machines, this default
601 should be used. Only define this macro to some other expression
602 if pseudo allocated by `local-alloc.c' end up in memory because
603 their hard registers were needed for spill registers. If this
604 macro returns nonzero for those classes, those pseudos will only
605 be allocated by `global.c', which knows how to reallocate the
606 pseudo to another register. If there would not be another
607 register available for reallocation, you should not change the
608 definition of this macro since the only effect of such a
609 definition would be to slow down register allocation. */
611 /* Stack layout; function entry, exit and calling. */
613 /* The return address of the current frame is retrieved
614 from the initial value of register RETURN_REGNUM.
615 For frames farther back, we use the stack slot where
616 the corresponding RETURN_REGNUM register was saved. */
618 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
619 ((FRAME) != hard_frame_pointer_rtx ? (FRAME) : \
620 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
622 #define RETURN_ADDR_RTX(COUNT, FRAME) \
623 ((COUNT) == 0 ? get_hard_reg_initial_val (Pmode, RETURN_REGNUM) : \
624 gen_rtx_MEM (Pmode, \
625 memory_address (Pmode, \
626 plus_constant (DYNAMIC_CHAIN_ADDRESS ((FRAME)), \
627 RETURN_REGNUM * UNITS_PER_WORD))))
629 /* The following macros will turn on dwarf2 exception hndling
630 Other code location for this exception handling are
631 in s390.md (eh_return insn) and in linux.c in the prologue. */
633 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
635 /* We have 31 bit mode. */
637 #define MASK_RETURN_ADDR (GEN_INT (0x7fffffff))
639 /* The offset from the incoming value of %sp to the top of the stack frame
640 for the current function. */
642 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
644 /* Location, from where return address to load. */
646 #define DWARF_FRAME_RETURN_COLUMN 14
648 /* Describe how we implement __builtin_eh_return. */
649 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
650 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
651 #define EH_RETURN_HANDLER_RTX \
652 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
653 TARGET_64BIT? -48 : -40))
655 /* Define this if pushing a word on the stack makes the stack pointer a
656 smaller address. */
658 #define STACK_GROWS_DOWNWARD
660 /* Define this if the nominal address of the stack frame is at the
661 high-address end of the local variables; that is, each additional local
662 variable allocated goes at a more negative offset in the frame. */
664 /* #define FRAME_GROWS_DOWNWARD */
666 /* Offset from stack-pointer to first location of outgoing args. */
668 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
670 /* Offset within stack frame to start allocating local variables at.
671 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
672 first local allocated. Otherwise, it is the offset to the BEGINNING
673 of the first local allocated. */
675 #define STARTING_FRAME_OFFSET \
676 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
678 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
680 /* If we generate an insn to push BYTES bytes, this says how many the stack
681 pointer really advances by. On S/390, we have no push instruction. */
683 /* #define PUSH_ROUNDING(BYTES) */
685 /* Accumulate the outgoing argument count so we can request the right
686 DSA size and determine stack offset. */
688 #define ACCUMULATE_OUTGOING_ARGS 1
690 /* Offset from the stack pointer register to an item dynamically
691 allocated on the stack, e.g., by `alloca'.
693 The default value for this macro is `STACK_POINTER_OFFSET' plus the
694 length of the outgoing arguments. The default is correct for most
695 machines. See `function.c' for details. */
696 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
698 /* Offset of first parameter from the argument pointer register value.
699 On the S/390, we define the argument pointer to the start of the fixed
700 area. */
701 #define FIRST_PARM_OFFSET(FNDECL) 0
703 /* Define this if stack space is still allocated for a parameter passed
704 in a register. The value is the number of bytes allocated to this
705 area. */
706 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
708 /* Define this if the above stack space is to be considered part of the
709 space allocated by the caller. */
710 /* #define OUTGOING_REG_PARM_STACK_SPACE */
712 /* 1 if N is a possible register number for function argument passing.
713 On S390, general registers 2 - 6 and floating point register 0 and 2
714 are used in this way. */
716 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
717 (N) == 16 || (N) == 17)
719 /* Define a data type for recording info about an argument list during
720 the scan of that argument list. This data type should hold all
721 necessary information about the function itself and about the args
722 processed so far, enough to enable macros such as FUNCTION_ARG to
723 determine where the next arg should go. */
726 {
729 }
730 CUMULATIVE_ARGS;
733 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
734 a function whose data type is FNTYPE.
735 For a library call, FNTYPE is 0. */
737 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
738 ((CUM).gprs=0, (CUM).fprs=0)
740 /* Update the data in CUM to advance over an argument of mode MODE and
741 data type TYPE. (TYPE is null for libcalls where that information
742 may not be available.) */
744 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
745 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
747 /* Define where to put the arguments to a function. Value is zero to push
748 the argument on the stack, or a hard register in which to store the
749 argument. */
751 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
752 s390_function_arg (&CUM, MODE, TYPE, NAMED)
754 /* Define where to expect the arguments of a function. Value is zero, if
755 the argument is on the stack, or a hard register in which the argument
756 is stored. It is the same like FUNCTION_ARG, except for unnamed args
757 That means, that all in case of varargs used, the arguments are expected
758 from the stack.
759 S/390 has already space on the stack for args coming in registers,
760 they are pushed in prologue, if needed. */
763 /* Define the `__builtin_va_list' type. */
765 #define BUILD_VA_LIST_TYPE(VALIST) \
766 (VALIST) = s390_build_va_list ()
768 /* Implement `va_start' for varargs and stdarg. */
770 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
771 s390_va_start (stdarg, valist, nextarg)
773 /* Implement `va_arg'. */
775 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
776 s390_va_arg (valist, type)
778 /* For an arg passed partly in registers and partly in memory, this is the
779 number of registers used. For args passed entirely in registers or
780 entirely in memory, zero. */
782 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
785 /* Define if returning from a function call automatically pops the
786 arguments described by the number-of-args field in the call. */
788 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
791 /* Define how to find the value returned by a function. VALTYPE is the
792 data type of the value (as a tree).
793 If the precise function being called is known, FUNC is its FUNCTION_DECL;
794 otherwise, FUNC is 15. */
796 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
797 || TARGET_SOFT_FLOAT ) ? 2 : 16)
800 /* for structs the address is passed, and the Callee makes a
801 copy, only if needed */
803 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
804 s390_function_arg_pass_by_reference (MODE, TYPE)
807 /* Register 2 (and 3) for integral values
808 or floating point register 0 (and 2) for fp values are used. */
810 #define FUNCTION_VALUE(VALTYPE, FUNC) \
811 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
812 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
813 || POINTER_TYPE_P (VALTYPE) \
814 ? word_mode : TYPE_MODE (VALTYPE), \
815 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
817 /* Define how to find the value returned by a library function assuming
818 the value has mode MODE. */
820 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
822 /* 1 if N is a possible register number for a function value. */
824 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
826 /* The definition of this macro implies that there are cases where
827 a scalar value cannot be returned in registers. */
829 #define RETURN_IN_MEMORY(type) \
830 (TYPE_MODE (type) == BLKmode || \
831 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \
832 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
834 /* Mode of stack savearea.
835 FUNCTION is VOIDmode because calling convention maintains SP.
836 BLOCK needs Pmode for SP.
837 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
839 #define STACK_SAVEAREA_MODE(LEVEL) \
840 (LEVEL == SAVE_FUNCTION ? VOIDmode \
841 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
843 /* Structure value address is passed as invisible first argument (gpr 2). */
845 #define STRUCT_VALUE 0
847 /* This macro definition sets up a default value for `main' to return. */
849 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
851 /* Length in units of the trampoline for entering a nested function. */
853 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
855 /* Initialize the dynamic part of trampoline. */
857 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
858 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
860 /* Template for constant part of trampoline. */
862 #define TRAMPOLINE_TEMPLATE(FILE) \
863 s390_trampoline_template (FILE)
865 /* Output assembler code to FILE to increment profiler label # LABELNO
866 for profiling a function entry. */
868 #define FUNCTION_PROFILER(FILE, LABELNO) \
869 s390_function_profiler ((FILE), ((LABELNO)))
871 /* #define PROFILE_BEFORE_PROLOGUE */
873 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
874 pointer does not matter (provided there is a frame pointer). */
876 #define EXIT_IGNORE_STACK 1
878 /* Addressing modes, and classification of registers for them. */
880 /* #define HAVE_POST_INCREMENT */
881 /* #define HAVE_POST_DECREMENT */
883 /* #define HAVE_PRE_DECREMENT */
884 /* #define HAVE_PRE_INCREMENT */
886 /* These assume that REGNO is a hard or pseudo reg number. They give
887 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
888 reg currently allocated to a suitable hard reg.
889 These definitions are NOT overridden anywhere. */
891 #define REGNO_OK_FOR_INDEX_P(REGNO) \
892 (((REGNO) < FIRST_PSEUDO_REGISTER \
893 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
894 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
896 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
898 #define REGNO_OK_FOR_DATA_P(REGNO) \
899 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
901 #define REGNO_OK_FOR_FP_P(REGNO) \
902 FLOAT_REGNO_P (REGNO)
904 /* Now macros that check whether X is a register and also,
905 strictly, whether it is in a specified class. */
907 /* 1 if X is a data register. */
909 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
911 /* 1 if X is an fp register. */
913 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
915 /* 1 if X is an address register. */
917 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
919 /* Maximum number of registers that can appear in a valid memory address. */
921 #define MAX_REGS_PER_ADDRESS 2
923 /* Recognize any constant value that is a valid address. */
925 #define CONSTANT_ADDRESS_P(X) 0
927 #define SYMBOLIC_CONST(X) \
928 (GET_CODE (X) == SYMBOL_REF \
929 || GET_CODE (X) == LABEL_REF \
930 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
932 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
933 they have to be forced to constant pool
934 CONST_INT have to be forced into constant pool, if greater than
935 64k. Depending on the insn they have to be force into constant pool
936 for smaller value; in this case we have to work with nonimmediate operand. */
938 #define LEGITIMATE_PIC_OPERAND_P(X) \
939 legitimate_pic_operand_p (X)
941 /* Nonzero if the constant value X is a legitimate general operand.
942 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
944 #define LEGITIMATE_CONSTANT_P(X) \
945 legitimate_constant_p (X)
947 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
948 its validity for a certain class. We have two alternate definitions
949 for each of them. The usual definition accepts all pseudo regs; the
950 other rejects them all. The symbol REG_OK_STRICT causes the latter
951 definition to be used.
953 Most source files want to accept pseudo regs in the hope that they will
954 get allocated to the class that the insn wants them to be in.
955 Some source files that are used after register allocation
956 need to be strict. */
958 /*
959 * Nonzero if X is a hard reg that can be used as an index or if it is
960 * a pseudo reg.
961 */
963 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
964 ((GET_MODE (X) == Pmode) && \
965 ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \
966 || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
968 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
969 a pseudo reg. */
971 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
973 /* Nonzero if X is a hard reg that can be used as an index. */
975 #define REG_OK_FOR_INDEX_STRICT_P(X) \
976 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
978 /* Nonzero if X is a hard reg that can be used as a base reg. */
980 #define REG_OK_FOR_BASE_STRICT_P(X) \
981 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
984 #ifndef REG_OK_STRICT
985 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
986 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
987 #else
988 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
989 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
990 #endif
993 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
994 valid memory address for an instruction.
995 The MODE argument is the machine mode for the MEM expression
996 that wants to use this address.
998 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
999 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
1001 #ifdef REG_OK_STRICT
1002 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1003 { \
1004 if (legitimate_address_p (MODE, X, 1)) \
1005 goto ADDR; \
1006 }
1007 #else
1008 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1009 { \
1010 if (legitimate_address_p (MODE, X, 0)) \
1011 goto ADDR; \
1012 }
1013 #endif
1016 /* S/390 has no mode dependent addresses. */
1018 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
1020 /* Try machine-dependent ways of modifying an illegitimate address
1021 to be legitimate. If we find one, return the new, valid address.
1022 This macro is used in only one place: `memory_address' in explow.c. */
1024 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1025 { \
1026 (X) = legitimize_address (X, OLDX, MODE); \
1027 if (memory_address_p (MODE, X)) \
1028 goto WIN; \
1029 }
1031 /* Specify the machine mode that this machine uses for the index in the
1032 tablejump instruction. */
1034 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1036 /* Define this if the tablejump instruction expects the table to contain
1037 offsets from the address of the table.
1038 Do not define this if the table should contain absolute addresses. */
1040 /* #define CASE_VECTOR_PC_RELATIVE */
1042 /* Load from integral MODE < SI from memory into register makes sign_extend
1043 or zero_extend
1044 In our case sign_extension happens for Halfwords, other no extension. */
1046 #define LOAD_EXTEND_OP(MODE) \
1047 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1048 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1049 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1051 /* Define this if fixuns_trunc is the same as fix_trunc. */
1053 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1055 /* We use "unsigned char" as default. */
1057 #define DEFAULT_SIGNED_CHAR 0
1059 /* Max number of bytes we can move from memory to memory in one reasonably
1060 fast instruction. */
1062 #define MOVE_MAX 256
1064 /* Nonzero if access to memory by bytes is slow and undesirable. */
1066 #define SLOW_BYTE_ACCESS 1
1068 /* Define if shifts truncate the shift count which implies one can omit
1069 a sign-extension or zero-extension of a shift count. */
1071 /* #define SHIFT_COUNT_TRUNCATED */
1073 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1074 is done just by pretending it is already truncated. */
1076 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1078 /* We assume that the store-condition-codes instructions store 0 for false
1079 and some other value for true. This is the value stored for true. */
1081 /* #define STORE_FLAG_VALUE -1 */
1083 /* Don't perform CSE on function addresses. */
1085 #define NO_FUNCTION_CSE
1087 /* Specify the machine mode that pointers have.
1088 After generation of rtl, the compiler makes no further distinction
1089 between pointers and any other objects of this machine mode. */
1091 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1093 /* A function address in a call instruction is a byte address (for
1094 indexing purposes) so give the MEM rtx a byte's mode. */
1096 #define FUNCTION_MODE QImode
1099 /* A part of a C `switch' statement that describes the relative costs
1100 of constant RTL expressions. It must contain `case' labels for
1101 expression codes `const_int', `const', `symbol_ref', `label_ref'
1102 and `const_double'. Each case must ultimately reach a `return'
1103 statement to return the relative cost of the use of that kind of
1104 constant value in an expression. The cost may depend on the
1105 precise value of the constant, which is available for examination
1106 in X, and the rtx code of the expression in which it is contained,
1107 found in OUTER_CODE.
1109 CODE is the expression code--redundant, since it can be obtained
1110 with `GET_CODE (X)'. */
1111 /* Force_const_mem does not work out of reload, because the saveable_obstack
1112 is set to reload_obstack, which does not live long enough.
1113 Because of this we cannot use force_const_mem in addsi3.
1114 This leads to problems with gen_add2_insn with a constant greater
1115 than a short. Because of that we give an addition of greater
1116 constants a cost of 3 (reload1.c 10096). */
1119 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1120 case CONST: \
1121 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1122 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1123 return 1000; \
1124 case CONST_INT: \
1125 if ((OUTER_CODE == PLUS) && \
1126 ((INTVAL (RTX) > 32767) || \
1127 (INTVAL (RTX) < -32768))) \
1128 return COSTS_N_INSNS (3); \
1129 case LABEL_REF: \
1130 case SYMBOL_REF: \
1131 case CONST_DOUBLE: \
1132 return 0; \
1135 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1136 This can be used, for example, to indicate how costly a multiply
1137 instruction is. In writing this macro, you can use the construct
1138 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1139 instructions. OUTER_CODE is the code of the expression in which X
1140 is contained.
1142 This macro is optional; do not define it if the default cost
1143 assumptions are adequate for the target machine. */
1145 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1146 case ASHIFT: \
1147 case ASHIFTRT: \
1148 case LSHIFTRT: \
1149 case PLUS: \
1150 case AND: \
1151 case IOR: \
1152 case XOR: \
1153 case MINUS: \
1154 case NEG: \
1155 case NOT: \
1156 return 1; \
1157 case MULT: \
1158 if (GET_MODE (XEXP (X, 0)) == DImode) \
1159 return 40; \
1160 else \
1161 return 7; \
1162 case DIV: \
1163 case UDIV: \
1164 case MOD: \
1165 case UMOD: \
1166 return 33;
1169 /* An expression giving the cost of an addressing mode that contains
1170 ADDRESS. If not defined, the cost is computed from the ADDRESS
1171 expression and the `CONST_COSTS' values.
1173 For most CISC machines, the default cost is a good approximation
1174 of the true cost of the addressing mode. However, on RISC
1175 machines, all instructions normally have the same length and
1176 execution time. Hence all addresses will have equal costs.
1178 In cases where more than one form of an address is known, the form
1179 with the lowest cost will be used. If multiple forms have the
1180 same, lowest, cost, the one that is the most complex will be used.
1182 For example, suppose an address that is equal to the sum of a
1183 register and a constant is used twice in the same basic block.
1184 When this macro is not defined, the address will be computed in a
1185 register and memory references will be indirect through that
1186 register. On machines where the cost of the addressing mode
1187 containing the sum is no higher than that of a simple indirect
1188 reference, this will produce an additional instruction and
1189 possibly require an additional register. Proper specification of
1190 this macro eliminates this overhead for such machines.
1192 Similar use of this macro is made in strength reduction of loops.
1194 ADDRESS need not be valid as an address. In such a case, the cost
1195 is not relevant and can be any value; invalid addresses need not be
1196 assigned a different cost.
1198 On machines where an address involving more than one register is as
1199 cheap as an address computation involving only one register,
1200 defining `ADDRESS_COST' to reflect this can cause two registers to
1201 be live over a region of code where only one would have been if
1202 `ADDRESS_COST' were not defined in that manner. This effect should
1203 be considered in the definition of this macro. Equivalent costs
1204 should probably only be given to addresses with different numbers
1205 of registers on machines with lots of registers.
1207 This macro will normally either not be defined or be defined as a
1208 constant.
1210 On s390 symbols are expensive if compiled with fpic
1211 lifetimes. */
1213 #define ADDRESS_COST(RTX) \
1214 ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1)
1216 /* On s390, copy between fprs and gprs is expensive. */
1218 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1219 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
1220 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
1221 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
1222 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
1225 /* A C expression for the cost of moving data of mode M between a
1226 register and memory. A value of 2 is the default; this cost is
1227 relative to those in `REGISTER_MOVE_COST'.
1229 If moving between registers and memory is more expensive than
1230 between two registers, you should define this macro to express the
1231 relative cost. */
1233 #define MEMORY_MOVE_COST(M, C, I) 1
1235 /* A C expression for the cost of a branch instruction. A value of 1
1236 is the default; other values are interpreted relative to that. */
1238 #define BRANCH_COST 1
1240 /* Add any extra modes needed to represent the condition code. */
1241 #define EXTRA_CC_MODES \
1249 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1250 return the mode to be used for the comparison. */
1252 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
1255 /* Define the information needed to generate branch and scc insns. This is
1256 stored from the compare operation. Note that we can't use "rtx" here
1257 since it hasn't been defined! */
1262 /* How to refer to registers in assembler output. This sequence is
1263 indexed by compiler's hard-register-number (see above). */
1265 #define REGISTER_NAMES \
1271 }
1273 /* implicit call of memcpy, not bcopy */
1275 #define TARGET_MEM_FUNCTIONS
1278 /* Print operand X (an rtx) in assembler syntax to file FILE.
1279 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1280 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1282 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1284 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1287 /* Define the codes that are matched by predicates in aux-output.c. */
1289 #define PREDICATE_CODES \
1299 /* S/390 constant pool breaks the devices in crtstuff.c to control section
1300 in where code resides. We have to write it as asm code. */
1301 #ifndef __s390x__
1302 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
1309 #endif
1311 /* Constant Pool for all symbols operands which are changed with
1312 force_const_mem during insn generation (expand_insn). */
1318 /* Function is splitted in chunk, if literal pool could overflow
1319 Value need to be lowered, if problems with displacement overflow. */
1321 #define S390_REL_MAX 55000
1322 #define S390_CHUNK_MAX 0x2000
1323 #define S390_CHUNK_OV 0x8000
1324 #define S390_POOL_MAX 0xe00
1326 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1327 { \
1328 register rtx insn; \
1329 struct pool_constant *pool; \
1330 \
1331 if (s390_pool_count == -1) \
1332 { \
1333 s390_nr_constants = 0; \
1334 for (pool = first_pool; pool; pool = pool->next) \
1335 if (pool->mark) s390_nr_constants++; \
1336 return; \
1337 } \
1338 if (first_pool == 0) { \
1339 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1340 return; \
1341 } \
1342 for (pool = first_pool; pool; pool = pool->next) \
1343 pool->mark = 0; \
1344 \
1345 insn = s390_pool_start_insn; \
1346 \
1347 if (insn==NULL_RTX) \
1348 insn = get_insns (); \
1349 else \
1350 insn = NEXT_INSN (insn); \
1351 for (; insn; insn = NEXT_INSN (insn)) { \
1353 if (s390_stop_dump_lit_p (insn)) { \
1354 mark_constants (PATTERN (insn)); \
1355 break; \
1356 } else \
1357 mark_constants (PATTERN (insn)); \
1358 } \
1359 } \
1360 \
1362 for (pool = first_pool; pool; pool = pool->next) \
1363 if (pool->mark) \
1364 mark_constants (pool->constant); \
1365 \
1366 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1367 }
1369 /* We need to return, because otherwise the pool is deleted of the
1370 constant pool after the first output. */
1372 #define ASM_OUTPUT_POOL_EPILOGUE(FILE, FUNNAME, fndecl, size) return;
1374 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1375 { \
1376 if ((s390_pool_count == 0) || (s390_pool_count > 0 && LABELNO >= 0)) \
1377 { \
1379 LABELNO = ~LABELNO; \
1380 } \
1381 if (s390_pool_count > 0) \
1382 { \
1384 } \
1385 \
1387 switch (GET_MODE_CLASS (MODE)) \
1388 { \
1389 case MODE_FLOAT: \
1390 if (GET_CODE (EXP) != CONST_DOUBLE) \
1391 abort (); \
1392 \
1393 memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (EXP), sizeof u); \
1394 assemble_real (u.d, MODE, ALIGN); \
1395 break; \
1396 \
1397 case MODE_INT: \
1398 case MODE_PARTIAL_INT: \
1399 if (flag_pic \
1400 && (GET_CODE (EXP) == CONST \
1401 || GET_CODE (EXP) == SYMBOL_REF \
1402 || GET_CODE (EXP) == LABEL_REF )) \
1403 { \
1404 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), FILE); \
1405 s390_output_symbolic_const (FILE, EXP); \
1407 } \
1408 else \
1409 { \
1410 assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \
1411 if (GET_MODE_SIZE (MODE) == 1) \
1412 ASM_OUTPUT_SKIP ((FILE), 1); \
1413 } \
1414 break; \
1415 \
1416 default: \
1417 abort (); \
1418 } \
1419 goto WIN; \
1420 }
1422 #endif