| blob | 93b355caf655dc0c417f2778c71a1a9735eeb803 |
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #ifndef _S390_H
23 #define _S390_H
27 /* Run-time compilation parameters selecting different hardware subsets. */
31 /* Target macros checked at runtime of compiler. */
33 #define TARGET_HARD_FLOAT (target_flags & 1)
34 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
35 #define TARGET_BACKCHAIN (target_flags & 2)
36 #define TARGET_SMALL_EXEC (target_flags & 4)
37 #define TARGET_DEBUG_ARG (target_flags & 8)
38 #define TARGET_64BIT (target_flags & 16)
39 #define TARGET_MVCLE (target_flags & 32)
41 #ifdef DEFAULT_TARGET_64BIT
42 #define TARGET_DEFAULT 0x13
44 #else
45 #define TARGET_DEFAULT 0x3
47 #endif
50 /* Macro to define tables used to set the flags. This is a list in braces
51 of pairs in braces, each pair being { "NAME", VALUE }
52 where VALUE is the bits to set or minus the bits to clear.
53 An empty string NAME is used to identify the default VALUE. */
55 #define TARGET_SWITCHES \
70 /* Define this to change the optimizations performed by default. */
71 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
73 /* Sometimes certain combinations of command options do not make sense
74 on a particular target machine. You can define a macro
75 `OVERRIDE_OPTIONS' to take account of this. This macro, if
76 defined, is executed once just after all the command options have
77 been parsed. */
78 #define OVERRIDE_OPTIONS override_options ()
81 /* Defines for real.c. */
82 #define IEEE_FLOAT 1
83 #define TARGET_IBM_FLOAT 0
84 #define TARGET_IEEE_FLOAT 1
86 /* The current function count for create unique internal labels. */
90 /* The amount of space used for outgoing arguments. */
94 /* Target machine storage layout. */
96 /* Define this if most significant bit is lowest numbered in instructions
97 that operate on numbered bit-fields. */
99 #define BITS_BIG_ENDIAN 1
101 /* Define this if most significant byte of a word is the lowest numbered. */
103 #define BYTES_BIG_ENDIAN 1
105 /* Define this if MS word of a multiword is the lowest numbered. */
107 #define WORDS_BIG_ENDIAN 1
109 #define MAX_BITS_PER_WORD 64
111 /* Width of a word, in units (bytes). */
113 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
114 #define MIN_UNITS_PER_WORD 4
116 /* A C expression for the size in bits of the type `short' on the
117 target machine. If you don't define this, the default is half a
118 word. (If this would be less than one storage unit, it is
119 rounded up to one unit.) */
120 #define SHORT_TYPE_SIZE 16
122 /* A C expression for the size in bits of the type `int' on the
123 target machine. If you don't define this, the default is one
124 word. */
125 #define INT_TYPE_SIZE 32
127 /* A C expression for the size in bits of the type `long' on the
128 target machine. If you don't define this, the default is one
129 word. */
130 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
131 #define MAX_LONG_TYPE_SIZE 64
133 /* A C expression for the size in bits of the type `long long' on the
134 target machine. If you don't define this, the default is two
135 words. */
136 #define LONG_LONG_TYPE_SIZE 64
138 /* Right now we only support two floating point formats, the
139 32 and 64 bit ieee formats. */
141 #define FLOAT_TYPE_SIZE 32
142 #define DOUBLE_TYPE_SIZE 64
143 #define LONG_DOUBLE_TYPE_SIZE 64
145 /* Define this macro if it is advisable to hold scalars in registers
146 in a wider mode than that declared by the program. In such cases,
147 the value is constrained to be within the bounds of the declared
148 type, but kept valid in the wider mode. The signedness of the
149 extension may differ from that of the type. */
151 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
152 if (INTEGRAL_MODE_P (MODE) && \
153 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
154 (MODE) = Pmode; \
155 }
157 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
158 extensions applied to char/short functions arguments. Defining
159 PROMOTE_FUNCTION_RETURN does the same for function returns. */
161 #define PROMOTE_FUNCTION_ARGS
162 #define PROMOTE_FUNCTION_RETURN
163 #define PROMOTE_FOR_CALL_ONLY
165 /* Allocation boundary (in *bits*) for storing pointers in memory. */
167 #define POINTER_BOUNDARY 32
169 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
171 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
173 /* Boundary (in *bits*) on which stack pointer should be aligned. */
175 #define STACK_BOUNDARY 64
177 /* Allocation boundary (in *bits*) for the code of a function. */
179 #define FUNCTION_BOUNDARY 32
181 /* There is no point aligning anything to a rounder boundary than this. */
183 #define BIGGEST_ALIGNMENT 64
185 /* Alignment of field after `int : 0' in a structure. */
187 #define EMPTY_FIELD_BOUNDARY 32
189 /* Alignment on even addresses for LARL instruction. */
191 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
193 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
195 /* Define this if move instructions will actually fail to work when given
196 unaligned data. */
198 #define STRICT_ALIGNMENT 0
200 /* Define target floating point format. */
202 #undef TARGET_FLOAT_FORMAT
203 #ifdef IEEE_FLOAT
204 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
205 #else
206 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
207 #endif
209 /* Define if special allocation order desired. */
211 #define REG_ALLOC_ORDER \
212 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
213 16, 17, 18, 19, 20, 21, 22, 23, \
214 24, 25, 26, 27, 28, 29, 30, 31, \
215 15, 32, 33, 34 }
217 /* Standard register usage. */
219 #define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 )
220 #ifdef IEEE_FLOAT
221 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 )
222 #else
223 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
224 #endif
225 #define CC_REGNO_P(N) ( (N) == 33 )
227 /* Number of actual hardware registers. The hardware registers are
228 assigned numbers for the compiler from 0 to just below
229 FIRST_PSEUDO_REGISTER.
230 All registers that the compiler knows about must be given numbers,
231 even those that are not normally considered general registers.
232 For the 390, we give the data registers numbers 0-15,
233 and the floating point registers numbers 16-19.
234 G5 and following have 16 IEEE floating point register,
235 which get numbers 16-31. */
237 #define FIRST_PSEUDO_REGISTER 35
239 /* Number of hardware registers that go into the DWARF-2 unwind info.
240 If not defined, equals FIRST_PSEUDO_REGISTER. */
242 #define DWARF_FRAME_REGISTERS 34
244 /* The following register have a fix usage
245 GPR 12: GOT register points to the GOT, setup in prologue,
246 GOT contains pointer to variables in shared libraries
247 GPR 13: Base register setup in prologue to point to the
248 literal table of each function
249 GPR 14: Return registers holds the return address
250 GPR 15: Stack pointer */
252 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
253 #define BASE_REGISTER 13
254 #define RETURN_REGNUM 14
255 #define STACK_POINTER_REGNUM 15
257 #define FIXED_REGISTERS \
258 { 0, 0, 0, 0, \
259 0, 0, 0, 0, \
260 0, 0, 0, 0, \
261 0, 1, 1, 1, \
262 0, 0, 0, 0, \
263 0, 0, 0, 0, \
264 0, 0, 0, 0, \
265 0, 0, 0, 0, \
266 1, 1, 1 }
268 /* 1 for registers not available across function calls. These must include
269 the FIXED_REGISTERS and also any registers that can be used without being
270 saved.
271 The latter must include the registers where values are returned
272 and the register where structure-value addresses are passed. */
274 #define CALL_USED_REGISTERS \
275 { 1, 1, 1, 1, \
276 1, 1, 0, 0, \
277 0, 0, 0, 0, \
278 0, 1, 1, 1, \
279 1, 1, 1, 1, \
280 1, 1, 1, 1, \
281 1, 1, 1, 1, \
282 1, 1, 1, 1, \
283 1, 1, 1 }
285 /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
286 the entire set of `FIXED_REGISTERS' be included.
287 (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). */
289 #define CALL_REALLY_USED_REGISTERS \
290 { 1, 1, 1, 1, \
291 1, 1, 0, 0, \
292 0, 0, 0, 0, \
293 0, 0, 0, 0, \
294 1, 1, 1, 1, \
295 1, 1, 1, 1, \
296 1, 1, 1, 1, \
297 1, 1, 1, 1, \
298 1, 1, 1 }
300 /* Macro to conditionally modify fixed_regs/call_used_regs. */
302 #define CONDITIONAL_REGISTER_USAGE \
303 do \
304 { \
305 int i; \
306 \
307 if (flag_pic) \
308 { \
309 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
310 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
311 } \
312 if (TARGET_64BIT) \
313 { \
314 for (i = 24; i < 32; i++) \
315 call_used_regs[i] = call_really_used_regs[i] = 0; \
316 } \
317 else \
318 { \
319 for (i = 18; i < 20; i++) \
320 call_used_regs[i] = call_really_used_regs[i] = 0; \
321 } \
322 } while (0)
324 /* The following register have a special usage
325 GPR 11: Frame pointer if needed to point to automatic variables.
326 GPR 32: In functions with more the 5 args this register
327 points to that arguments, it is always eliminated
328 with stack- or frame-pointer.
329 GPR 33: Condition code 'register' */
331 #define HARD_FRAME_POINTER_REGNUM 11
332 #define FRAME_POINTER_REGNUM 34
334 #define ARG_POINTER_REGNUM 32
336 #define CC_REGNUM 33
338 /* We use the register %r0 to pass the static chain to a nested function.
340 Note: It is assumed that this register is call-clobbered!
341 We can't use any of the function-argument registers either,
342 and register 1 is needed by the trampoline code, so we have
343 no other choice but using this one ... */
345 #define STATIC_CHAIN_REGNUM 0
347 /* Return number of consecutive hard regs needed starting at reg REGNO
348 to hold something of mode MODE.
349 This is ordinarily the length in words of a value of mode MODE
350 but can be less for certain modes in special long registers. */
352 #define HARD_REGNO_NREGS(REGNO, MODE) \
353 (FLOAT_REGNO_P(REGNO)? \
354 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
355 INT_REGNO_P(REGNO)? \
356 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
357 1)
359 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
360 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
361 Even gprs can hold DI.
362 The floating point registers can hold DF, SF, DC and SC. */
364 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
365 (FLOAT_REGNO_P(REGNO)? \
366 (GET_MODE_CLASS(MODE) == MODE_FLOAT || \
367 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT || \
368 (MODE) == SImode || (MODE) == DImode) : \
369 INT_REGNO_P(REGNO)? \
370 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
371 CC_REGNO_P(REGNO)? \
372 GET_MODE_CLASS (MODE) == MODE_CC : \
373 0)
375 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
376 mode MODE1 and one has mode MODE2.
377 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
378 for any hard reg, then this must be 0 for correct output. */
380 #define MODES_TIEABLE_P(MODE1, MODE2) \
381 (((MODE1) == SFmode || (MODE1) == DFmode) \
382 == ((MODE2) == SFmode || (MODE2) == DFmode))
384 /* If defined, gives a class of registers that cannot be used as the
385 operand of a SUBREG that changes the mode of the object illegally. */
387 #define CLASS_CANNOT_CHANGE_MODE FP_REGS
389 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
391 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
392 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
394 /* Define this macro if references to a symbol must be treated
395 differently depending on something about the variable or
396 function named by the symbol (such as what section it is in).
398 On s390, if using PIC, mark a SYMBOL_REF for a non-global symbol
399 so that we may access it directly in the GOT. */
401 #define ENCODE_SECTION_INFO(DECL, FIRST) \
402 do \
403 { \
404 if (flag_pic) \
405 { \
407 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
408 \
409 if (GET_CODE (rtl) == MEM) \
410 { \
411 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
413 || ! TREE_PUBLIC (DECL)); \
414 } \
415 } \
416 } \
417 while (0)
420 /* This is an array of structures. Each structure initializes one pair
421 of eliminable registers. The "from" register number is given first,
422 followed by "to". Eliminations of the same "from" register are listed
423 in order of preference. */
425 #define ELIMINABLE_REGS \
426 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
427 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
428 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
429 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
431 #define CAN_ELIMINATE(FROM, TO) (1)
433 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
434 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
435 { (OFFSET) = 0; } \
436 else if ((FROM) == FRAME_POINTER_REGNUM \
437 && (TO) == HARD_FRAME_POINTER_REGNUM) \
438 { (OFFSET) = 0; } \
439 else if ((FROM) == ARG_POINTER_REGNUM \
440 && (TO) == HARD_FRAME_POINTER_REGNUM) \
441 { (OFFSET) = s390_arg_frame_offset (); } \
442 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
443 { (OFFSET) = s390_arg_frame_offset (); } \
444 else \
445 abort(); \
446 }
448 #define CAN_DEBUG_WITHOUT_FP
450 /* Value should be nonzero if functions must have frame pointers.
451 Zero means the frame pointer need not be set up (and parms may be
452 accessed via the stack pointer) in functions that seem suitable.
453 This is computed in `reload', in reload1.c. */
455 #define FRAME_POINTER_REQUIRED 0
457 /* Define the classes of registers for register constraints in the
458 machine description. Also define ranges of constants.
460 One of the classes must always be named ALL_REGS and include all hard regs.
461 If there is more than one class, another class must be named NO_REGS
462 and contain no registers.
464 The name GENERAL_REGS must be the name of a class (or an alias for
465 another name such as ALL_REGS). This is the class of registers
466 that is allowed by "g" or "r" in a register constraint.
467 Also, registers outside this class are allocated only when
468 instructions express preferences for them.
470 The classes must be numbered in nondecreasing order; that is,
471 a larger-numbered class must never be contained completely
472 in a smaller-numbered class.
474 For any two classes, it is very desirable that there be another
475 class that represents their union. */
477 /*#define SMALL_REGISTER_CLASSES 1*/
479 enum reg_class
480 {
483 ALL_REGS, LIM_REG_CLASSES
484 };
486 #define N_REG_CLASSES (int) LIM_REG_CLASSES
488 /* Give names of register classes as strings for dump file. */
490 #define REG_CLASS_NAMES \
494 /* Define which registers fit in which classes. This is an initializer for
495 a vector of HARD_REG_SET of length N_REG_CLASSES.
496 G5 and latter have 16 register and support IEEE floating point operations. */
498 #define REG_CLASS_CONTENTS \
499 { \
507 }
510 /* The same information, inverted:
511 Return the class number of the smallest class containing
512 reg number REGNO. This could be a conditional expression
513 or could index an array. */
515 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
517 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
519 /* The class value for index registers, and the one for base regs. */
521 #define INDEX_REG_CLASS ADDR_REGS
522 #define BASE_REG_CLASS ADDR_REGS
524 /* Get reg_class from a letter such as appears in the machine description. */
526 #define REG_CLASS_FROM_LETTER(C) \
531 /* The letters I, J, K, L and M in a register constraint string can be used
532 to stand for particular ranges of immediate operands.
533 This macro defines what the ranges are.
534 C is the letter, and VALUE is a constant value.
535 Return 1 if VALUE is in the range specified by C. */
537 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
543 /* Similar, but for floating constants, and defining letters G and H.
544 Here VALUE is the CONST_DOUBLE rtx itself. */
546 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
548 /* 'Q' means a memory-reference for a S-type operand. */
550 #define EXTRA_CONSTRAINT(OP, C) \
554 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
555 return the class of reg to actually use. In general this is just CLASS;
556 but on some machines in some cases it is preferable to use a more
557 restrictive class. */
559 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
560 s390_preferred_reload_class ((X), (CLASS))
562 /* Return the maximum number of consecutive registers needed to represent
563 mode MODE in a register of class CLASS. */
565 #define CLASS_MAX_NREGS(CLASS, MODE) \
566 ((CLASS) == FP_REGS ? \
567 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
568 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
570 /* We need a secondary reload when loading a PLUS which is
571 not a valid operand for LOAD ADDRESS. */
573 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
574 s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
576 /* If we are copying between FP registers and anything else, we need a memory
577 location. */
579 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
580 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
582 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
583 because the movsi and movsf patterns don't handle r/f moves. */
585 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
586 (GET_MODE_BITSIZE (MODE) < 32 \
587 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
588 : MODE)
591 /* A C expression whose value is nonzero if pseudos that have been
592 assigned to registers of class CLASS would likely be spilled
593 because registers of CLASS are needed for spill registers.
595 The default value of this macro returns 1 if CLASS has exactly one
596 register and zero otherwise. On most machines, this default
597 should be used. Only define this macro to some other expression
598 if pseudo allocated by `local-alloc.c' end up in memory because
599 their hard registers were needed for spill registers. If this
600 macro returns nonzero for those classes, those pseudos will only
601 be allocated by `global.c', which knows how to reallocate the
602 pseudo to another register. If there would not be another
603 register available for reallocation, you should not change the
604 definition of this macro since the only effect of such a
605 definition would be to slow down register allocation. */
607 /* Stack layout; function entry, exit and calling. */
609 /* The return address of the current frame is retrieved
610 from the initial value of register RETURN_REGNUM.
611 For frames farther back, we use the stack slot where
612 the corresponding RETURN_REGNUM register was saved. */
614 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
615 ((FRAME) != hard_frame_pointer_rtx ? (FRAME) : \
616 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
618 #define RETURN_ADDR_RTX(COUNT, FRAME) \
619 ((COUNT) == 0 ? get_hard_reg_initial_val (Pmode, RETURN_REGNUM) : \
620 gen_rtx_MEM (Pmode, \
621 memory_address (Pmode, \
622 plus_constant (DYNAMIC_CHAIN_ADDRESS ((FRAME)), \
623 RETURN_REGNUM * UNITS_PER_WORD))))
625 /* The following macros will turn on dwarf2 exception hndling
626 Other code location for this exception handling are
627 in s390.md (eh_return insn) and in linux.c in the prologue. */
629 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
631 /* We have 31 bit mode. */
633 #define MASK_RETURN_ADDR (TARGET_64BIT ? GEN_INT (-1) : GEN_INT (0x7fffffff))
635 /* The offset from the incoming value of %sp to the top of the stack frame
636 for the current function. */
638 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
640 /* Location, from where return address to load. */
642 #define DWARF_FRAME_RETURN_COLUMN 14
644 /* Describe how we implement __builtin_eh_return. */
645 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
646 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
647 #define EH_RETURN_HANDLER_RTX \
648 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
649 TARGET_64BIT? -48 : -40))
651 /* Define this if pushing a word on the stack makes the stack pointer a
652 smaller address. */
654 #define STACK_GROWS_DOWNWARD
656 /* Define this if the nominal address of the stack frame is at the
657 high-address end of the local variables; that is, each additional local
658 variable allocated goes at a more negative offset in the frame. */
660 /* #define FRAME_GROWS_DOWNWARD */
662 /* Offset from stack-pointer to first location of outgoing args. */
664 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
666 /* Offset within stack frame to start allocating local variables at.
667 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
668 first local allocated. Otherwise, it is the offset to the BEGINNING
669 of the first local allocated. */
671 #define STARTING_FRAME_OFFSET \
672 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
674 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
676 /* If we generate an insn to push BYTES bytes, this says how many the stack
677 pointer really advances by. On S/390, we have no push instruction. */
679 /* #define PUSH_ROUNDING(BYTES) */
681 /* Accumulate the outgoing argument count so we can request the right
682 DSA size and determine stack offset. */
684 #define ACCUMULATE_OUTGOING_ARGS 1
686 /* Offset from the stack pointer register to an item dynamically
687 allocated on the stack, e.g., by `alloca'.
689 The default value for this macro is `STACK_POINTER_OFFSET' plus the
690 length of the outgoing arguments. The default is correct for most
691 machines. See `function.c' for details. */
692 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
694 /* Offset of first parameter from the argument pointer register value.
695 On the S/390, we define the argument pointer to the start of the fixed
696 area. */
697 #define FIRST_PARM_OFFSET(FNDECL) 0
699 /* Define this if stack space is still allocated for a parameter passed
700 in a register. The value is the number of bytes allocated to this
701 area. */
702 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
704 /* Define this if the above stack space is to be considered part of the
705 space allocated by the caller. */
706 /* #define OUTGOING_REG_PARM_STACK_SPACE */
708 /* 1 if N is a possible register number for function argument passing.
709 On S390, general registers 2 - 6 and floating point register 0 and 2
710 are used in this way. */
712 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
713 (N) == 16 || (N) == 17)
715 /* Define a data type for recording info about an argument list during
716 the scan of that argument list. This data type should hold all
717 necessary information about the function itself and about the args
718 processed so far, enough to enable macros such as FUNCTION_ARG to
719 determine where the next arg should go. */
722 {
725 }
726 CUMULATIVE_ARGS;
729 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
730 a function whose data type is FNTYPE.
731 For a library call, FNTYPE is 0. */
733 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
734 ((CUM).gprs=0, (CUM).fprs=0)
736 /* Update the data in CUM to advance over an argument of mode MODE and
737 data type TYPE. (TYPE is null for libcalls where that information
738 may not be available.) */
740 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
741 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
743 /* Define where to put the arguments to a function. Value is zero to push
744 the argument on the stack, or a hard register in which to store the
745 argument. */
747 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
748 s390_function_arg (&CUM, MODE, TYPE, NAMED)
750 /* Define where to expect the arguments of a function. Value is zero, if
751 the argument is on the stack, or a hard register in which the argument
752 is stored. It is the same like FUNCTION_ARG, except for unnamed args
753 That means, that all in case of varargs used, the arguments are expected
754 from the stack.
755 S/390 has already space on the stack for args coming in registers,
756 they are pushed in prologue, if needed. */
759 /* Define the `__builtin_va_list' type. */
761 #define BUILD_VA_LIST_TYPE(VALIST) \
762 (VALIST) = s390_build_va_list ()
764 /* Implement `va_start' for varargs and stdarg. */
766 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
767 s390_va_start (stdarg, valist, nextarg)
769 /* Implement `va_arg'. */
771 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
772 s390_va_arg (valist, type)
774 /* For an arg passed partly in registers and partly in memory, this is the
775 number of registers used. For args passed entirely in registers or
776 entirely in memory, zero. */
778 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
781 /* Define if returning from a function call automatically pops the
782 arguments described by the number-of-args field in the call. */
784 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
787 /* Define how to find the value returned by a function. VALTYPE is the
788 data type of the value (as a tree).
789 If the precise function being called is known, FUNC is its FUNCTION_DECL;
790 otherwise, FUNC is 15. */
792 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
793 || TARGET_SOFT_FLOAT ) ? 2 : 16)
796 /* for structs the address is passed, and the Callee makes a
797 copy, only if needed */
799 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
800 s390_function_arg_pass_by_reference (MODE, TYPE)
803 /* Register 2 (and 3) for integral values
804 or floating point register 0 (and 2) for fp values are used. */
806 #define FUNCTION_VALUE(VALTYPE, FUNC) \
807 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
808 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
809 || POINTER_TYPE_P (VALTYPE) \
810 ? word_mode : TYPE_MODE (VALTYPE), \
811 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
813 /* Define how to find the value returned by a library function assuming
814 the value has mode MODE. */
816 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
818 /* 1 if N is a possible register number for a function value. */
820 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
822 /* The definition of this macro implies that there are cases where
823 a scalar value cannot be returned in registers. */
825 #define RETURN_IN_MEMORY(type) \
826 (TYPE_MODE (type) == BLKmode || \
827 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \
828 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
830 /* Mode of stack savearea.
831 FUNCTION is VOIDmode because calling convention maintains SP.
832 BLOCK needs Pmode for SP.
833 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
835 #define STACK_SAVEAREA_MODE(LEVEL) \
836 (LEVEL == SAVE_FUNCTION ? VOIDmode \
837 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
839 /* Structure value address is passed as invisible first argument (gpr 2). */
841 #define STRUCT_VALUE 0
843 /* This macro definition sets up a default value for `main' to return. */
845 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
847 /* Length in units of the trampoline for entering a nested function. */
849 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
851 /* Initialize the dynamic part of trampoline. */
853 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
854 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
856 /* Template for constant part of trampoline. */
858 #define TRAMPOLINE_TEMPLATE(FILE) \
859 s390_trampoline_template (FILE)
861 /* Output assembler code to FILE to increment profiler label # LABELNO
862 for profiling a function entry. */
864 #define FUNCTION_PROFILER(FILE, LABELNO) \
865 s390_function_profiler ((FILE), ((LABELNO)))
867 /* #define PROFILE_BEFORE_PROLOGUE */
869 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
870 pointer does not matter (provided there is a frame pointer). */
872 #define EXIT_IGNORE_STACK 1
874 /* Addressing modes, and classification of registers for them. */
876 /* #define HAVE_POST_INCREMENT */
877 /* #define HAVE_POST_DECREMENT */
879 /* #define HAVE_PRE_DECREMENT */
880 /* #define HAVE_PRE_INCREMENT */
882 /* These assume that REGNO is a hard or pseudo reg number. They give
883 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
884 reg currently allocated to a suitable hard reg.
885 These definitions are NOT overridden anywhere. */
887 #define REGNO_OK_FOR_INDEX_P(REGNO) \
888 (((REGNO) < FIRST_PSEUDO_REGISTER \
889 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
890 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
892 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
894 #define REGNO_OK_FOR_DATA_P(REGNO) \
895 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
897 #define REGNO_OK_FOR_FP_P(REGNO) \
898 FLOAT_REGNO_P (REGNO)
900 /* Now macros that check whether X is a register and also,
901 strictly, whether it is in a specified class. */
903 /* 1 if X is a data register. */
905 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
907 /* 1 if X is an fp register. */
909 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
911 /* 1 if X is an address register. */
913 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
915 /* Maximum number of registers that can appear in a valid memory address. */
917 #define MAX_REGS_PER_ADDRESS 2
919 /* Recognize any constant value that is a valid address. */
921 #define CONSTANT_ADDRESS_P(X) 0
923 #define SYMBOLIC_CONST(X) \
924 (GET_CODE (X) == SYMBOL_REF \
925 || GET_CODE (X) == LABEL_REF \
926 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
928 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
929 they have to be forced to constant pool
930 CONST_INT have to be forced into constant pool, if greater than
931 64k. Depending on the insn they have to be force into constant pool
932 for smaller value; in this case we have to work with nonimmediate operand. */
934 #define LEGITIMATE_PIC_OPERAND_P(X) \
935 legitimate_pic_operand_p (X)
937 /* Nonzero if the constant value X is a legitimate general operand.
938 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
940 #define LEGITIMATE_CONSTANT_P(X) \
941 legitimate_constant_p (X)
943 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
944 its validity for a certain class. We have two alternate definitions
945 for each of them. The usual definition accepts all pseudo regs; the
946 other rejects them all. The symbol REG_OK_STRICT causes the latter
947 definition to be used.
949 Most source files want to accept pseudo regs in the hope that they will
950 get allocated to the class that the insn wants them to be in.
951 Some source files that are used after register allocation
952 need to be strict. */
954 /*
955 * Nonzero if X is a hard reg that can be used as an index or if it is
956 * a pseudo reg.
957 */
959 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
960 ((GET_MODE (X) == Pmode) && \
961 ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \
962 || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
964 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
965 a pseudo reg. */
967 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
969 /* Nonzero if X is a hard reg that can be used as an index. */
971 #define REG_OK_FOR_INDEX_STRICT_P(X) \
972 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
974 /* Nonzero if X is a hard reg that can be used as a base reg. */
976 #define REG_OK_FOR_BASE_STRICT_P(X) \
977 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
980 #ifndef REG_OK_STRICT
981 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
982 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
983 #else
984 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
985 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
986 #endif
989 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
990 valid memory address for an instruction.
991 The MODE argument is the machine mode for the MEM expression
992 that wants to use this address.
994 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
995 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
997 #ifdef REG_OK_STRICT
998 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
999 { \
1000 if (legitimate_address_p (MODE, X, 1)) \
1001 goto ADDR; \
1002 }
1003 #else
1004 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1005 { \
1006 if (legitimate_address_p (MODE, X, 0)) \
1007 goto ADDR; \
1008 }
1009 #endif
1012 /* S/390 has no mode dependent addresses. */
1014 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
1016 /* Try machine-dependent ways of modifying an illegitimate address
1017 to be legitimate. If we find one, return the new, valid address.
1018 This macro is used in only one place: `memory_address' in explow.c. */
1020 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1021 { \
1022 (X) = legitimize_address (X, OLDX, MODE); \
1023 if (memory_address_p (MODE, X)) \
1024 goto WIN; \
1025 }
1027 /* Specify the machine mode that this machine uses for the index in the
1028 tablejump instruction. */
1030 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1032 /* Define this if the tablejump instruction expects the table to contain
1033 offsets from the address of the table.
1034 Do not define this if the table should contain absolute addresses. */
1036 /* #define CASE_VECTOR_PC_RELATIVE */
1038 /* Load from integral MODE < SI from memory into register makes sign_extend
1039 or zero_extend
1040 In our case sign_extension happens for Halfwords, other no extension. */
1042 #define LOAD_EXTEND_OP(MODE) \
1043 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1044 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1045 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1047 /* Define this if fixuns_trunc is the same as fix_trunc. */
1049 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1051 /* We use "unsigned char" as default. */
1053 #define DEFAULT_SIGNED_CHAR 0
1055 /* Max number of bytes we can move from memory to memory in one reasonably
1056 fast instruction. */
1058 #define MOVE_MAX 256
1060 /* Nonzero if access to memory by bytes is slow and undesirable. */
1062 #define SLOW_BYTE_ACCESS 1
1064 /* Define if shifts truncate the shift count which implies one can omit
1065 a sign-extension or zero-extension of a shift count. */
1067 /* #define SHIFT_COUNT_TRUNCATED */
1069 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1070 is done just by pretending it is already truncated. */
1072 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1074 /* We assume that the store-condition-codes instructions store 0 for false
1075 and some other value for true. This is the value stored for true. */
1077 /* #define STORE_FLAG_VALUE -1 */
1079 /* Don't perform CSE on function addresses. */
1081 #define NO_FUNCTION_CSE
1083 /* Specify the machine mode that pointers have.
1084 After generation of rtl, the compiler makes no further distinction
1085 between pointers and any other objects of this machine mode. */
1087 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1089 /* A function address in a call instruction is a byte address (for
1090 indexing purposes) so give the MEM rtx a byte's mode. */
1092 #define FUNCTION_MODE QImode
1095 /* A part of a C `switch' statement that describes the relative costs
1096 of constant RTL expressions. It must contain `case' labels for
1097 expression codes `const_int', `const', `symbol_ref', `label_ref'
1098 and `const_double'. Each case must ultimately reach a `return'
1099 statement to return the relative cost of the use of that kind of
1100 constant value in an expression. The cost may depend on the
1101 precise value of the constant, which is available for examination
1102 in X, and the rtx code of the expression in which it is contained,
1103 found in OUTER_CODE.
1105 CODE is the expression code--redundant, since it can be obtained
1106 with `GET_CODE (X)'. */
1107 /* Force_const_mem does not work out of reload, because the saveable_obstack
1108 is set to reload_obstack, which does not live long enough.
1109 Because of this we cannot use force_const_mem in addsi3.
1110 This leads to problems with gen_add2_insn with a constant greater
1111 than a short. Because of that we give an addition of greater
1112 constants a cost of 3 (reload1.c 10096). */
1115 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1116 case CONST: \
1117 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1118 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1119 return 1000; \
1120 case CONST_INT: \
1121 if ((OUTER_CODE == PLUS) && \
1122 ((INTVAL (RTX) > 32767) || \
1123 (INTVAL (RTX) < -32768))) \
1124 return COSTS_N_INSNS (3); \
1125 case LABEL_REF: \
1126 case SYMBOL_REF: \
1127 case CONST_DOUBLE: \
1128 return 0; \
1131 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1132 This can be used, for example, to indicate how costly a multiply
1133 instruction is. In writing this macro, you can use the construct
1134 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1135 instructions. OUTER_CODE is the code of the expression in which X
1136 is contained.
1138 This macro is optional; do not define it if the default cost
1139 assumptions are adequate for the target machine. */
1141 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1142 case ASHIFT: \
1143 case ASHIFTRT: \
1144 case LSHIFTRT: \
1145 case PLUS: \
1146 case AND: \
1147 case IOR: \
1148 case XOR: \
1149 case MINUS: \
1150 case NEG: \
1151 case NOT: \
1152 return 1; \
1153 case MULT: \
1154 if (GET_MODE (XEXP (X, 0)) == DImode) \
1155 return 40; \
1156 else \
1157 return 7; \
1158 case DIV: \
1159 case UDIV: \
1160 case MOD: \
1161 case UMOD: \
1162 return 33;
1165 /* An expression giving the cost of an addressing mode that contains
1166 ADDRESS. If not defined, the cost is computed from the ADDRESS
1167 expression and the `CONST_COSTS' values.
1169 For most CISC machines, the default cost is a good approximation
1170 of the true cost of the addressing mode. However, on RISC
1171 machines, all instructions normally have the same length and
1172 execution time. Hence all addresses will have equal costs.
1174 In cases where more than one form of an address is known, the form
1175 with the lowest cost will be used. If multiple forms have the
1176 same, lowest, cost, the one that is the most complex will be used.
1178 For example, suppose an address that is equal to the sum of a
1179 register and a constant is used twice in the same basic block.
1180 When this macro is not defined, the address will be computed in a
1181 register and memory references will be indirect through that
1182 register. On machines where the cost of the addressing mode
1183 containing the sum is no higher than that of a simple indirect
1184 reference, this will produce an additional instruction and
1185 possibly require an additional register. Proper specification of
1186 this macro eliminates this overhead for such machines.
1188 Similar use of this macro is made in strength reduction of loops.
1190 ADDRESS need not be valid as an address. In such a case, the cost
1191 is not relevant and can be any value; invalid addresses need not be
1192 assigned a different cost.
1194 On machines where an address involving more than one register is as
1195 cheap as an address computation involving only one register,
1196 defining `ADDRESS_COST' to reflect this can cause two registers to
1197 be live over a region of code where only one would have been if
1198 `ADDRESS_COST' were not defined in that manner. This effect should
1199 be considered in the definition of this macro. Equivalent costs
1200 should probably only be given to addresses with different numbers
1201 of registers on machines with lots of registers.
1203 This macro will normally either not be defined or be defined as a
1204 constant.
1206 On s390 symbols are expensive if compiled with fpic
1207 lifetimes. */
1209 #define ADDRESS_COST(RTX) \
1210 ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1)
1212 /* On s390, copy between fprs and gprs is expensive. */
1214 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1215 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
1216 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
1217 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
1218 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
1221 /* A C expression for the cost of moving data of mode M between a
1222 register and memory. A value of 2 is the default; this cost is
1223 relative to those in `REGISTER_MOVE_COST'.
1225 If moving between registers and memory is more expensive than
1226 between two registers, you should define this macro to express the
1227 relative cost. */
1229 #define MEMORY_MOVE_COST(M, C, I) 1
1231 /* A C expression for the cost of a branch instruction. A value of 1
1232 is the default; other values are interpreted relative to that. */
1234 #define BRANCH_COST 1
1236 /* Add any extra modes needed to represent the condition code. */
1237 #define EXTRA_CC_MODES \
1245 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1246 return the mode to be used for the comparison. */
1248 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
1251 /* Define the information needed to generate branch and scc insns. This is
1252 stored from the compare operation. Note that we can't use "rtx" here
1253 since it hasn't been defined! */
1258 /* How to refer to registers in assembler output. This sequence is
1259 indexed by compiler's hard-register-number (see above). */
1261 #define REGISTER_NAMES \
1267 }
1269 /* implicit call of memcpy, not bcopy */
1271 #define TARGET_MEM_FUNCTIONS
1274 /* Print operand X (an rtx) in assembler syntax to file FILE.
1275 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1276 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1278 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1280 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1283 /* Define the codes that are matched by predicates in aux-output.c. */
1285 #define PREDICATE_CODES \
1296 /* S/390 constant pool breaks the devices in crtstuff.c to control section
1297 in where code resides. We have to write it as asm code. */
1298 #ifndef __s390x__
1299 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
1306 #endif
1308 /* Constant Pool for all symbols operands which are changed with
1309 force_const_mem during insn generation (expand_insn). */
1315 /* Function is splitted in chunk, if literal pool could overflow
1316 Value need to be lowered, if problems with displacement overflow. */
1318 #define S390_CHUNK_MAX 0xe00
1319 #define S390_CHUNK_OV 0x1000
1320 #define S390_POOL_MAX 0xe00
1322 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1323 { \
1324 register rtx insn; \
1325 struct pool_constant *pool; \
1326 \
1327 if (s390_pool_count == -1) \
1328 { \
1329 s390_nr_constants = 0; \
1330 for (pool = first_pool; pool; pool = pool->next) \
1331 if (pool->mark) s390_nr_constants++; \
1332 return; \
1333 } \
1334 if (first_pool == 0) { \
1335 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1336 return; \
1337 } \
1338 for (pool = first_pool; pool; pool = pool->next) \
1339 pool->mark = 0; \
1340 \
1341 insn = s390_pool_start_insn; \
1342 \
1343 if (insn==NULL_RTX) \
1344 insn = get_insns (); \
1345 else \
1346 insn = NEXT_INSN (insn); \
1347 for (; insn; insn = NEXT_INSN (insn)) { \
1349 if (s390_stop_dump_lit_p (insn)) { \
1350 mark_constants (PATTERN (insn)); \
1351 break; \
1352 } else \
1353 mark_constants (PATTERN (insn)); \
1354 } \
1355 } \
1356 \
1358 for (pool = first_pool; pool; pool = pool->next) \
1359 if (pool->mark) \
1360 mark_constants (pool->constant); \
1361 \
1362 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1363 }
1365 /* We need to return, because otherwise the pool is deleted of the
1366 constant pool after the first output. */
1368 #define ASM_OUTPUT_POOL_EPILOGUE(FILE, FUNNAME, fndecl, size) return;
1370 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1371 { \
1372 if ((s390_pool_count == 0) || (s390_pool_count > 0 && LABELNO >= 0)) \
1373 { \
1375 LABELNO = ~LABELNO; \
1376 } \
1377 if (s390_pool_count > 0) \
1378 { \
1380 } \
1381 \
1383 switch (GET_MODE_CLASS (MODE)) \
1384 { \
1385 case MODE_FLOAT: \
1386 if (GET_CODE (EXP) != CONST_DOUBLE) \
1387 abort (); \
1388 \
1389 memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (EXP), sizeof u); \
1390 assemble_real (u.d, MODE, ALIGN); \
1391 break; \
1392 \
1393 case MODE_INT: \
1394 case MODE_PARTIAL_INT: \
1395 if (flag_pic \
1396 && (GET_CODE (EXP) == CONST \
1397 || GET_CODE (EXP) == SYMBOL_REF \
1398 || GET_CODE (EXP) == LABEL_REF )) \
1399 { \
1400 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), FILE); \
1401 s390_output_symbolic_const (FILE, EXP); \
1403 } \
1404 else \
1405 { \
1406 assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \
1407 if (GET_MODE_SIZE (MODE) == 1) \
1408 ASM_OUTPUT_SKIP ((FILE), 1); \
1409 } \
1410 break; \
1411 \
1412 default: \
1413 abort (); \
1414 } \
1415 goto WIN; \
1416 }
1418 #endif