gcc/regs.h

   1 /* Define per-register tables for data flow info and register allocation.
   2    Copyright (C) 1987-2014 Free Software Foundation, Inc.
   3
   4 This file is part of GCC.
   5
   6 GCC is free software; you can redistribute it and/or modify it under
   7 the terms of the GNU General Public License as published by the Free
   8 Software Foundation; either version 3, or (at your option) any later
   9 version.
  10
  11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14 for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with GCC; see the file COPYING3.  If not see
  18 <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef GCC_REGS_H
  21 #define GCC_REGS_H
  22
  23 #include "machmode.h"
  24 #include "hard-reg-set.h"
  25 #include "rtl.h"
  26
  27 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
  28
  29 /* When you only have the mode of a pseudo register before it has a hard
  30    register chosen for it, this reports the size of each hard register
  31    a pseudo in such a mode would get allocated to.  A target may
  32    override this.  */
  33
  34 #ifndef REGMODE_NATURAL_SIZE
  35 #define REGMODE_NATURAL_SIZE(MODE)      UNITS_PER_WORD
  36 #endif
  37
  38 /* Maximum register number used in this function, plus one.  */
  39
  40 extern int max_regno;
  41
  42 /* REG_N_REFS and REG_N_SETS are initialized by a call to
  43    regstat_init_n_sets_and_refs from the current values of
  44    DF_REG_DEF_COUNT and DF_REG_USE_COUNT.  REG_N_REFS and REG_N_SETS
  45    should only be used if a pass need to change these values in some
  46    magical way or the pass needs to have accurate values for these
  47    and is not using incremental df scanning.
  48
  49    At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
  50    should be made to regstat_free_n_sets_and_refs.
  51
  52    Local alloc seems to play pretty loose with these values.
  53    REG_N_REFS is set to 0 if the register is used in an asm.
  54    Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
  55    REG_N_SETS for three address insns.  Other passes seem to have
  56    other special values.  */
  57
  58
  59
  60 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
  61
  62 struct regstat_n_sets_and_refs_t
  63 {
  64   int sets;                     /* # of times (REG n) is set */
  65   int refs;                     /* # of times (REG n) is used or set */
  66 };
  67
  68 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
  69
  70 /* Indexed by n, gives number of times (REG n) is used or set.  */
  71 static inline int
  72 REG_N_REFS (int regno)
  73 {
  74   return regstat_n_sets_and_refs[regno].refs;
  75 }
  76
  77 /* Indexed by n, gives number of times (REG n) is used or set.  */
  78 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
  79 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
  80
  81 /* Indexed by n, gives number of times (REG n) is set.  */
  82 static inline int
  83 REG_N_SETS (int regno)
  84 {
  85   return regstat_n_sets_and_refs[regno].sets;
  86 }
  87
  88 /* Indexed by n, gives number of times (REG n) is set.  */
  89 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
  90 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
  91
  92 /* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise.  */
  93 extern bool reg_is_parm_p (rtx);
  94
  95 /* Functions defined in regstat.c.  */
  96 extern void regstat_init_n_sets_and_refs (void);
  97 extern void regstat_free_n_sets_and_refs (void);
  98 extern void regstat_compute_ri (void);
  99 extern void regstat_free_ri (void);
 100 extern bitmap regstat_get_setjmp_crosses (void);
 101 extern void regstat_compute_calls_crossed (void);
 102 extern void regstat_free_calls_crossed (void);
 103 extern void dump_reg_info (FILE *);
 104
 105 /* Register information indexed by register number.  This structure is
 106    initialized by calling regstat_compute_ri and is destroyed by
 107    calling regstat_free_ri.  */
 108 struct reg_info_t
 109 {
 110   int freq;                     /* # estimated frequency (REG n) is used or set */
 111   int deaths;                   /* # of times (REG n) dies */
 112   int live_length;              /* # of instructions (REG n) is live */
 113   int calls_crossed;            /* # of calls (REG n) is live across */
 114   int freq_calls_crossed;       /* # estimated frequency (REG n) crosses call */
 115   int throw_calls_crossed;      /* # of calls that may throw (REG n) is live across */
 116   int basic_block;              /* # of basic blocks (REG n) is used in */
 117 };
 118
 119 extern struct reg_info_t *reg_info_p;
 120
 121 /* The number allocated elements of reg_info_p.  */
 122 extern size_t reg_info_p_size;
 123
 124 /* Estimate frequency of references to register N.  */
 125
 126 #define REG_FREQ(N) (reg_info_p[N].freq)
 127
 128 /* The weights for each insn varies from 0 to REG_FREQ_BASE.
 129    This constant does not need to be high, as in infrequently executed
 130    regions we want to count instructions equivalently to optimize for
 131    size instead of speed.  */
 132 #define REG_FREQ_MAX 1000
 133
 134 /* Compute register frequency from the BB frequency.  When optimizing for size,
 135    or profile driven feedback is available and the function is never executed,
 136    frequency is always equivalent.  Otherwise rescale the basic block
 137    frequency.  */
 138 #define REG_FREQ_FROM_BB(bb) (optimize_function_for_size_p (cfun)             \
 139                               ? REG_FREQ_MAX                                  \
 140                               : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
 141                               ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
 142                               : 1)
 143
 144 /* Indexed by N, gives number of insns in which register N dies.
 145    Note that if register N is live around loops, it can die
 146    in transitions between basic blocks, and that is not counted here.
 147    So this is only a reliable indicator of how many regions of life there are
 148    for registers that are contained in one basic block.  */
 149
 150 #define REG_N_DEATHS(N) (reg_info_p[N].deaths)
 151
 152 /* Get the number of consecutive words required to hold pseudo-reg N.  */
 153
 154 #define PSEUDO_REGNO_SIZE(N) \
 155   ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1)         \
 156    / UNITS_PER_WORD)
 157
 158 /* Get the number of bytes required to hold pseudo-reg N.  */
 159
 160 #define PSEUDO_REGNO_BYTES(N) \
 161   GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
 162
 163 /* Get the machine mode of pseudo-reg N.  */
 164
 165 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
 166
 167 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live.  */
 168
 169 #define REG_N_CALLS_CROSSED(N)  (reg_info_p[N].calls_crossed)
 170 #define REG_FREQ_CALLS_CROSSED(N)  (reg_info_p[N].freq_calls_crossed)
 171
 172 /* Indexed by N, gives number of CALL_INSNS that may throw, across which
 173    (REG n) is live.  */
 174
 175 #define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
 176
 177 /* Total number of instructions at which (REG n) is live.
 178
 179    This is set in regstat.c whenever register info is requested and
 180    remains valid for the rest of the compilation of the function; it is
 181    used to control register allocation.  The larger this is, the less
 182    priority (REG n) gets for allocation in a hard register (in IRA in
 183    priority-coloring mode).
 184
 185    Negative values are special: -1 is used to mark a pseudo reg that
 186    should not be allocated to a hard register, because it crosses a
 187    setjmp call.  */
 188
 189 #define REG_LIVE_LENGTH(N)  (reg_info_p[N].live_length)
 190
 191 /* Indexed by n, gives number of basic block that  (REG n) is used in.
 192    If the value is REG_BLOCK_GLOBAL (-1),
 193    it means (REG n) is used in more than one basic block.
 194    REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
 195    This information remains valid for the rest of the compilation
 196    of the current function; it is used to control register allocation.  */
 197
 198 #define REG_BLOCK_UNKNOWN 0
 199 #define REG_BLOCK_GLOBAL -1
 200
 201 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
 202
 203 /* Vector of substitutions of register numbers,
 204    used to map pseudo regs into hardware regs.
 205
 206    This can't be folded into reg_n_info without changing all of the
 207    machine dependent directories, since the reload functions
 208    in the machine dependent files access it.  */
 209
 210 extern short *reg_renumber;
 211
 212 /* Flag set by local-alloc or global-alloc if they decide to allocate
 213    something in a call-clobbered register.  */
 214
 215 extern int caller_save_needed;
 216
 217 /* Predicate to decide whether to give a hard reg to a pseudo which
 218    is referenced REFS times and would need to be saved and restored
 219    around a call CALLS times.  */
 220
 221 #ifndef CALLER_SAVE_PROFITABLE
 222 #define CALLER_SAVE_PROFITABLE(REFS, CALLS)  (4 * (CALLS) < (REFS))
 223 #endif
 224
 225 /* Select a register mode required for caller save of hard regno REGNO.  */
 226 #ifndef HARD_REGNO_CALLER_SAVE_MODE
 227 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
 228   choose_hard_reg_mode (REGNO, NREGS, false)
 229 #endif
 230
 231 /* Registers that get partially clobbered by a call in a given mode.
 232    These must not be call used registers.  */
 233 #ifndef HARD_REGNO_CALL_PART_CLOBBERED
 234 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
 235 #endif
 236
 237 /* Target-dependent globals.  */
 238 struct target_regs {
 239   /* For each starting hard register, the number of consecutive hard
 240      registers that a given machine mode occupies.  */
 241   unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
 242
 243   /* For each hard register, the widest mode object that it can contain.
 244      This will be a MODE_INT mode if the register can hold integers.  Otherwise
 245      it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
 246      register.  */
 247   enum machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
 248
 249   /* Vector indexed by machine mode saying whether there are regs of
 250      that mode.  */
 251   bool x_have_regs_of_mode[MAX_MACHINE_MODE];
 252
 253   /* 1 if the corresponding class contains a register of the given mode.  */
 254   char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
 255
 256   /* Record for each mode whether we can move a register directly to or
 257      from an object of that mode in memory.  If we can't, we won't try
 258      to use that mode directly when accessing a field of that mode.  */
 259   char x_direct_load[NUM_MACHINE_MODES];
 260   char x_direct_store[NUM_MACHINE_MODES];
 261
 262   /* Record for each mode whether we can float-extend from memory.  */
 263   bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
 264 };
 265
 266 extern struct target_regs default_target_regs;
 267 #if SWITCHABLE_TARGET
 268 extern struct target_regs *this_target_regs;
 269 #else
 270 #define this_target_regs (&default_target_regs)
 271 #endif
 272
 273 #define hard_regno_nregs \
 274   (this_target_regs->x_hard_regno_nregs)
 275 #define reg_raw_mode \
 276   (this_target_regs->x_reg_raw_mode)
 277 #define have_regs_of_mode \
 278   (this_target_regs->x_have_regs_of_mode)
 279 #define contains_reg_of_mode \
 280   (this_target_regs->x_contains_reg_of_mode)
 281 #define direct_load \
 282   (this_target_regs->x_direct_load)
 283 #define direct_store \
 284   (this_target_regs->x_direct_store)
 285 #define float_extend_from_mem \
 286   (this_target_regs->x_float_extend_from_mem)
 287
 288 /* Return an exclusive upper bound on the registers occupied by hard
 289    register (reg:MODE REGNO).  */
 290
 291 static inline unsigned int
 292 end_hard_regno (enum machine_mode mode, unsigned int regno)
 293 {
 294   return regno + hard_regno_nregs[regno][(int) mode];
 295 }
 296
 297 /* Likewise for hard register X.  */
 298
 299 #define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X))
 300
 301 /* Likewise for hard or pseudo register X.  */
 302
 303 #define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1)
 304
 305 /* Add to REGS all the registers required to store a value of mode MODE
 306    in register REGNO.  */
 307
 308 static inline void
 309 add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
 310                      unsigned int regno)
 311 {
 312   unsigned int end_regno;
 313
 314   end_regno = end_hard_regno (mode, regno);
 315   do
 316     SET_HARD_REG_BIT (*regs, regno);
 317   while (++regno < end_regno);
 318 }
 319
 320 /* Likewise, but remove the registers.  */
 321
 322 static inline void
 323 remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
 324                           unsigned int regno)
 325 {
 326   unsigned int end_regno;
 327
 328   end_regno = end_hard_regno (mode, regno);
 329   do
 330     CLEAR_HARD_REG_BIT (*regs, regno);
 331   while (++regno < end_regno);
 332 }
 333
 334 /* Return true if REGS contains the whole of (reg:MODE REGNO).  */
 335
 336 static inline bool
 337 in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
 338                    unsigned int regno)
 339 {
 340   unsigned int end_regno;
 341
 342   gcc_assert (HARD_REGISTER_NUM_P (regno));
 343
 344   if (!TEST_HARD_REG_BIT (regs, regno))
 345     return false;
 346
 347   end_regno = end_hard_regno (mode, regno);
 348
 349   if (!HARD_REGISTER_NUM_P (end_regno - 1))
 350     return false;
 351
 352   while (++regno < end_regno)
 353     if (!TEST_HARD_REG_BIT (regs, regno))
 354       return false;
 355
 356   return true;
 357 }
 358
 359 /* Return true if (reg:MODE REGNO) includes an element of REGS.  */
 360
 361 static inline bool
 362 overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
 363                          unsigned int regno)
 364 {
 365   unsigned int end_regno;
 366
 367   if (TEST_HARD_REG_BIT (regs, regno))
 368     return true;
 369
 370   end_regno = end_hard_regno (mode, regno);
 371   while (++regno < end_regno)
 372     if (TEST_HARD_REG_BIT (regs, regno))
 373       return true;
 374
 375   return false;
 376 }
 377
 378 /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
 379    REGNO and MODE.  */
 380
 381 static inline void
 382 add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
 383                            int nregs)
 384 {
 385   while (nregs-- > 0)
 386     SET_HARD_REG_BIT (*regs, regno + nregs);
 387 }
 388
 389 /* Likewise, but remove the registers.  */
 390
 391 static inline void
 392 remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
 393                                 int nregs)
 394 {
 395   while (nregs-- > 0)
 396     CLEAR_HARD_REG_BIT (*regs, regno + nregs);
 397 }
 398
 399 /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
 400    REGNO and MODE.  */
 401 static inline bool
 402 range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
 403                                int nregs)
 404 {
 405   while (nregs-- > 0)
 406     if (TEST_HARD_REG_BIT (set, regno + nregs))
 407       return true;
 408   return false;
 409 }
 410
 411 /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
 412    REGNO and MODE.  */
 413 static inline bool
 414 range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
 415 {
 416   while (nregs-- > 0)
 417     if (!TEST_HARD_REG_BIT (set, regno + nregs))
 418       return false;
 419   return true;
 420 }
 421
 422 #endif /* GCC_REGS_H */