gcc/testsuite/gcc.target/i386/avx512dq-vcvtuqq2pd-1.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-mavx512dq -mavx512vl -O2" } */
   3 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
   4 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
   5 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
   6 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */
   7 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
   8 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
   9 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */
  10 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
  11 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
  12 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
  13 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
  14 /* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
  15
  16 #include <immintrin.h>
  17
  18 volatile __m512i s1;
  19 volatile __m256i s2;
  20 volatile __m128i s3;
  21 volatile __m512d res1;
  22 volatile __m256d res2;
  23 volatile __m128d res3;
  24 volatile __mmask8 m;
  25
  26 void extern
  27 avx512dq_test (void)
  28 {
  29   res1 = _mm512_cvtepu64_pd (s1);
  30   res1 = _mm512_mask_cvtepu64_pd (res1, m, s1);
  31   res1 = _mm512_maskz_cvtepu64_pd (m, s1);
  32   res2 = _mm256_cvtepu64_pd (s2);
  33   res2 = _mm256_mask_cvtepu64_pd (res2, m, s2);
  34   res2 = _mm256_maskz_cvtepu64_pd (m, s2);
  35   res3 = _mm_cvtepu64_pd (s3);
  36   res3 = _mm_mask_cvtepu64_pd (res3, m, s3);
  37   res3 = _mm_maskz_cvtepu64_pd (m, s3);
  38   res1 = _mm512_cvt_roundepu64_pd (s1, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
  39   res1 = _mm512_mask_cvt_roundepu64_pd (res1, m, s1, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
  40   res1 = _mm512_maskz_cvt_roundepu64_pd (m, s1, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
  41 }