1 ;; Predicate definitions for S/390 and zSeries.
2 ;; Copyright (C) 2005 Free Software Foundation, Inc.
3 ;; Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 ;; Ulrich Weigand (uweigand@de.ibm.com).
6 ;; This file is part of GCC.
8 ;; GCC is free software; you can redistribute it and/or modify
9 ;; it under the terms of the GNU General Public License as published by
10 ;; the Free Software Foundation; either version 2, or (at your option)
13 ;; GCC is distributed in the hope that it will be useful,
14 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
15 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 ;; GNU General Public License for more details.
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING. If not, write to
20 ;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
21 ;; Boston, MA 02110-1301, USA.
23 ;; OP is the current operation.
24 ;; MODE is the current operation mode.
26 ;; operands --------------------------------------------------------------
28 ;; Return true if OP a (const_int 0) operand.
30 (define_predicate "const0_operand"
31 (and (match_code "const_int, const_double")
32 (match_test "op == CONST0_RTX (mode)")))
34 ;; Return true if OP is constant.
36 (define_special_predicate "consttable_operand"
37 (and (match_code "symbol_ref, label_ref, const, const_int, const_double")
38 (match_test "CONSTANT_P (op)")))
40 ;; Return true if OP is a valid S-type operand.
42 (define_predicate "s_operand"
43 (and (match_code "subreg, mem")
44 (match_operand 0 "general_operand"))
46 /* Just like memory_operand, allow (subreg (mem ...))
49 && GET_CODE (op) == SUBREG
50 && GET_CODE (SUBREG_REG (op)) == MEM)
53 if (GET_CODE (op) != MEM)
55 if (!s390_legitimate_address_without_index_p (op))
61 ;; Return true if OP is a valid operand for the BRAS instruction.
62 ;; Allow SYMBOL_REFs and @PLT stubs.
64 (define_special_predicate "bras_sym_operand"
65 (ior (match_code "symbol_ref")
66 (and (match_code "const")
67 (and (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
68 (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_PLT")))))
70 ;; Return true if OP is a PLUS that is not a legitimate
71 ;; operand for the LA instruction.
73 (define_predicate "s390_plus_operand"
74 (and (match_code "plus")
75 (and (match_test "mode == Pmode")
76 (match_test "!legitimate_la_operand_p (op)"))))
78 ;; Return true if OP is a valid shift count operand.
80 (define_predicate "shift_count_operand"
81 (match_code "reg, subreg, plus, const_int")
83 HOST_WIDE_INT offset = 0;
85 /* We can have an integer constant, an address register,
86 or a sum of the two. Note that reload already checks
87 that any register present is an address register, so
88 we just check for any register here. */
89 if (GET_CODE (op) == CONST_INT)
94 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
96 offset = INTVAL (XEXP (op, 1));
99 while (op && GET_CODE (op) == SUBREG)
100 op = SUBREG_REG (op);
101 if (op && GET_CODE (op) != REG)
104 /* Unfortunately we have to reject constants that are invalid
105 for an address, or else reload will get confused. */
106 if (!DISP_IN_RANGE (offset))
112 ;; Return true if OP a valid operand for the LARL instruction.
114 (define_predicate "larl_operand"
115 (match_code "label_ref, symbol_ref, const, const_int, const_double")
117 /* Allow labels and local symbols. */
118 if (GET_CODE (op) == LABEL_REF)
120 if (GET_CODE (op) == SYMBOL_REF)
121 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
122 && SYMBOL_REF_TLS_MODEL (op) == 0
123 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
125 /* Everything else must have a CONST, so strip it. */
126 if (GET_CODE (op) != CONST)
130 /* Allow adding *even* in-range constants. */
131 if (GET_CODE (op) == PLUS)
133 if (GET_CODE (XEXP (op, 1)) != CONST_INT
134 || (INTVAL (XEXP (op, 1)) & 1) != 0)
136 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
137 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
142 /* Labels and local symbols allowed here as well. */
143 if (GET_CODE (op) == LABEL_REF)
145 if (GET_CODE (op) == SYMBOL_REF)
146 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
147 && SYMBOL_REF_TLS_MODEL (op) == 0
148 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
150 /* Now we must have a @GOTENT offset or @PLT stub
151 or an @INDNTPOFF TLS offset. */
152 if (GET_CODE (op) == UNSPEC
153 && XINT (op, 1) == UNSPEC_GOTENT)
155 if (GET_CODE (op) == UNSPEC
156 && XINT (op, 1) == UNSPEC_PLT)
158 if (GET_CODE (op) == UNSPEC
159 && XINT (op, 1) == UNSPEC_INDNTPOFF)
165 ;; operators --------------------------------------------------------------
167 ;; Return nonzero if OP is a valid comparison operator
168 ;; for a branch condition.
170 (define_predicate "s390_comparison"
171 (match_code "eq, ne, lt, gt, le, ge, ltu, gtu, leu, geu,
172 uneq, unlt, ungt, unle, unge, ltgt,
175 if (GET_CODE (XEXP (op, 0)) != REG
176 || REGNO (XEXP (op, 0)) != CC_REGNUM
177 || XEXP (op, 1) != const0_rtx)
180 return (s390_branch_condition_mask (op) >= 0);
183 ;; Return nonzero if OP is a valid comparison operator
184 ;; for an ALC condition.
186 (define_predicate "s390_alc_comparison"
187 (match_code "zero_extend, sign_extend, ltu, gtu, leu, geu")
189 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
192 if (!COMPARISON_P (op))
195 if (GET_CODE (XEXP (op, 0)) != REG
196 || REGNO (XEXP (op, 0)) != CC_REGNUM
197 || XEXP (op, 1) != const0_rtx)
200 switch (GET_MODE (XEXP (op, 0)))
203 return GET_CODE (op) == LTU;
206 return GET_CODE (op) == LEU;
209 return GET_CODE (op) == GEU;
212 return GET_CODE (op) == GTU;
215 return GET_CODE (op) == LTU;
218 return GET_CODE (op) == UNGT;
221 return GET_CODE (op) == UNLT;
228 ;; Return nonzero if OP is a valid comparison operator
229 ;; for an SLB condition.
231 (define_predicate "s390_slb_comparison"
232 (match_code "zero_extend, sign_extend, ltu, gtu, leu, geu")
234 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
237 if (!COMPARISON_P (op))
240 if (GET_CODE (XEXP (op, 0)) != REG
241 || REGNO (XEXP (op, 0)) != CC_REGNUM
242 || XEXP (op, 1) != const0_rtx)
245 switch (GET_MODE (XEXP (op, 0)))
248 return GET_CODE (op) == GEU;
251 return GET_CODE (op) == GTU;
254 return GET_CODE (op) == LTU;
257 return GET_CODE (op) == LEU;
260 return GET_CODE (op) == GEU;
263 return GET_CODE (op) == LE;
266 return GET_CODE (op) == GE;
273 ;; Return true if OP is a load multiple operation. It is known to be a
274 ;; PARALLEL and the first section will be tested.
276 (define_special_predicate "load_multiple_operation"
277 (match_code "parallel")
279 enum machine_mode elt_mode;
280 int count = XVECLEN (op, 0);
281 unsigned int dest_regno;
285 /* Perform a quick check so we don't blow up below. */
287 || GET_CODE (XVECEXP (op, 0, 0)) != SET
288 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
289 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
292 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
293 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
294 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
296 /* Check, is base, or base + displacement. */
298 if (GET_CODE (src_addr) == REG)
300 else if (GET_CODE (src_addr) == PLUS
301 && GET_CODE (XEXP (src_addr, 0)) == REG
302 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
304 off = INTVAL (XEXP (src_addr, 1));
305 src_addr = XEXP (src_addr, 0);
310 for (i = 1; i < count; i++)
312 rtx elt = XVECEXP (op, 0, i);
314 if (GET_CODE (elt) != SET
315 || GET_CODE (SET_DEST (elt)) != REG
316 || GET_MODE (SET_DEST (elt)) != elt_mode
317 || REGNO (SET_DEST (elt)) != dest_regno + i
318 || GET_CODE (SET_SRC (elt)) != MEM
319 || GET_MODE (SET_SRC (elt)) != elt_mode
320 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
321 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
322 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
323 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
324 != off + i * GET_MODE_SIZE (elt_mode))
331 ;; Return true if OP is a store multiple operation. It is known to be a
332 ;; PARALLEL and the first section will be tested.
334 (define_special_predicate "store_multiple_operation"
335 (match_code "parallel")
337 enum machine_mode elt_mode;
338 int count = XVECLEN (op, 0);
339 unsigned int src_regno;
343 /* Perform a quick check so we don't blow up below. */
345 || GET_CODE (XVECEXP (op, 0, 0)) != SET
346 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
347 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
350 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
351 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
352 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
354 /* Check, is base, or base + displacement. */
356 if (GET_CODE (dest_addr) == REG)
358 else if (GET_CODE (dest_addr) == PLUS
359 && GET_CODE (XEXP (dest_addr, 0)) == REG
360 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
362 off = INTVAL (XEXP (dest_addr, 1));
363 dest_addr = XEXP (dest_addr, 0);
368 for (i = 1; i < count; i++)
370 rtx elt = XVECEXP (op, 0, i);
372 if (GET_CODE (elt) != SET
373 || GET_CODE (SET_SRC (elt)) != REG
374 || GET_MODE (SET_SRC (elt)) != elt_mode
375 || REGNO (SET_SRC (elt)) != src_regno + i
376 || GET_CODE (SET_DEST (elt)) != MEM
377 || GET_MODE (SET_DEST (elt)) != elt_mode
378 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
379 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
380 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
381 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
382 != off + i * GET_MODE_SIZE (elt_mode))