Add support for in-order addition reduction using SVE FADDA
[official-gcc.git] / gcc / testsuite / gcc.dg / vect / vect-reduc-in-order-3.c
blob037213ee31c689618fba08fa6c508261dacf2f0f
1 /* { dg-do run { xfail { { i?86-*-* x86_64-*-* } && ia32 } } } */
2 /* { dg-require-effective-target vect_double } */
3 /* { dg-add-options ieee } */
4 /* { dg-additional-options "-fno-fast-math" } */
6 #include "tree-vect.h"
8 #define N (VECTOR_BITS * 17)
10 double __attribute__ ((noinline, noclone))
11 reduc_plus_double (double *a)
13 double r = 0;
14 for (int i = 0; i < N; i += 4)
16 r += a[i] * 2.0;
17 r += a[i + 1] * 3.0;
18 r += a[i + 2] * 4.0;
19 r += a[i + 3] * 5.0;
21 return r;
24 int __attribute__ ((optimize (1)))
25 main ()
27 double a[N];
28 double r = 0;
29 for (int i = 0; i < N; i++)
31 a[i] = (i * 0.1) * (i & 1 ? 1 : -1);
32 r += a[i] * (i % 4 + 2);
33 asm volatile ("" ::: "memory");
35 double res = reduc_plus_double (a);
36 if (res != r)
37 __builtin_abort ();
38 return 0;
41 /* { dg-final { scan-tree-dump-times {using an in-order \(fold-left\) reduction} 1 "vect" } } */
42 /* { dg-final { scan-tree-dump-times {vectorizing stmts using SLP} 1 "vect" } } */