Add support for in-order addition reduction using SVE FADDA
[official-gcc.git] / gcc / testsuite / gcc.dg / vect / vect-reduc-in-order-1.c
blobcc73d524d5441ef97033e98f1b0b6718f7198d9c
1 /* { dg-do run { xfail { { i?86-*-* x86_64-*-* } && ia32 } } } */
2 /* { dg-require-effective-target vect_double } */
3 /* { dg-add-options ieee } */
4 /* { dg-additional-options "-fno-fast-math" } */
6 #include "tree-vect.h"
8 #define N (VECTOR_BITS * 17)
10 double __attribute__ ((noinline, noclone))
11 reduc_plus_double (double *a, double *b)
13 double r = 0, q = 3;
14 for (int i = 0; i < N; i++)
16 r += a[i];
17 q -= b[i];
19 return r * q;
22 int __attribute__ ((optimize (1)))
23 main ()
25 double a[N];
26 double b[N];
27 double r = 0, q = 3;
28 for (int i = 0; i < N; i++)
30 a[i] = (i * 0.1) * (i & 1 ? 1 : -1);
31 b[i] = (i * 0.3) * (i & 1 ? 1 : -1);
32 r += a[i];
33 q -= b[i];
34 asm volatile ("" ::: "memory");
36 double res = reduc_plus_double (a, b);
37 if (res != r * q)
38 __builtin_abort ();
39 return 0;
42 /* { dg-final { scan-tree-dump-times {using an in-order \(fold-left\) reduction} 2 "vect" } } */