gcc/ChangeLog

   1 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
   2             Alan Hayward  <alan.hayward@arm.com>
   3             David Sherwood  <david.sherwood@arm.com>
   4
   5         * optabs.def (fold_left_plus_optab): New optab.
   6         * doc/md.texi (fold_left_plus_@var{m}): Document.
   7         * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
   8         * internal-fn.c (fold_left_direct): Define.
   9         (expand_fold_left_optab_fn): Likewise.
  10         (direct_fold_left_optab_supported_p): Likewise.
  11         * fold-const-call.c (fold_const_fold_left): New function.
  12         (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
  13         * tree-parloops.c (valid_reduction_p): New function.
  14         (gather_scalar_reductions): Use it.
  15         * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
  16         (vect_finish_replace_stmt): Declare.
  17         * tree-vect-loop.c (fold_left_reduction_fn): New function.
  18         (needs_fold_left_reduction_p): New function, split out from...
  19         (vect_is_simple_reduction): ...here.  Accept reductions that
  20         forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
  21         (vect_force_simple_reduction): Also store the reduction type in
  22         the assignment's STMT_VINFO_REDUC_TYPE.
  23         (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
  24         (merge_with_identity): New function.
  25         (vect_expand_fold_left): Likewise.
  26         (vectorize_fold_left_reduction): Likewise.
  27         (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION.  Leave the
  28         scalar phi in place for it.  Check for target support and reject
  29         cases that would reassociate the operation.  Defer the transform
  30         phase to vectorize_fold_left_reduction.
  31         * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
  32         * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
  33         (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
  34
  35 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  36
  37         * tree-if-conv.c (predicate_mem_writes): Remove redundant
  38         call to ifc_temp_var.
  39
  40 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  41             Alan Hayward  <alan.hayward@arm.com>
  42             David Sherwood  <david.sherwood@arm.com>
  43
  44         * target.def (legitimize_address_displacement): Take the original
  45         offset as a poly_int.
  46         * targhooks.h (default_legitimize_address_displacement): Update
  47         accordingly.
  48         * targhooks.c (default_legitimize_address_displacement): Likewise.
  49         * doc/tm.texi: Regenerate.
  50         * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
  51         as an argument, moving assert of ad->disp == ad->disp_term to...
  52         (process_address_1): ...here.  Update calls to base_plus_disp_to_reg.
  53         Try calling targetm.legitimize_address_displacement before expanding
  54         the address rather than afterwards, and adjust for the new interface.
  55         * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
  56         Match the new hook interface.  Handle SVE addresses.
  57         * config/sh/sh.c (sh_legitimize_address_displacement): Make the
  58         new hook interface.
  59
  60 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  61
  62         * Makefile.in (OBJS): Add early-remat.o.
  63         * target.def (select_early_remat_modes): New hook.
  64         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
  65         * doc/tm.texi: Regenerate.
  66         * targhooks.h (default_select_early_remat_modes): Declare.
  67         * targhooks.c (default_select_early_remat_modes): New function.
  68         * timevar.def (TV_EARLY_REMAT): New timevar.
  69         * passes.def (pass_early_remat): New pass.
  70         * tree-pass.h (make_pass_early_remat): Declare.
  71         * early-remat.c: New file.
  72         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
  73         function.
  74         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
  75
  76 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  77             Alan Hayward  <alan.hayward@arm.com>
  78             David Sherwood  <david.sherwood@arm.com>
  79
  80         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
  81         vfm1 with a bound_epilog parameter.
  82         (vect_do_peeling): Update calls accordingly, and move the prologue
  83         call earlier in the function.  Treat the base bound_epilog as 0 for
  84         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
  85         this base when peeling for gaps.
  86         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
  87         with fully-masked loops.
  88         (vect_estimate_min_profitable_iters): Handle the single peeled
  89         iteration in that case.
  90
  91 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  92             Alan Hayward  <alan.hayward@arm.com>
  93             David Sherwood  <david.sherwood@arm.com>
  94
  95         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
  96         single-element interleaving even if the size is not a power of 2.
  97         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
  98         accesses for single-element interleaving if the group size is
  99         not a power of 2.
 100
 101 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 102             Alan Hayward  <alan.hayward@arm.com>
 103             David Sherwood  <david.sherwood@arm.com>
 104
 105         * doc/md.texi (fold_extract_last_@var{m}): Document.
 106         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
 107         * optabs.def (fold_extract_last_optab): New optab.
 108         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
 109         * internal-fn.c (fold_extract_direct): New macro.
 110         (expand_fold_extract_optab_fn): Likewise.
 111         (direct_fold_extract_optab_supported_p): Likewise.
 112         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
 113         * tree-vect-loop.c (vect_model_reduction_cost): Handle
 114         EXTRACT_LAST_REDUCTION.
 115         (get_initial_def_for_reduction): Do not create an initial vector
 116         for EXTRACT_LAST_REDUCTION reductions.
 117         (vectorizable_reduction): Leave the scalar phi in place for
 118         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
 119         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
 120         epilogue code for EXTRACT_LAST_REDUCTION and defer the
 121         transform phase to vectorizable_condition.
 122         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
 123         split out from...
 124         (vect_finish_stmt_generation): ...here.
 125         (vect_finish_replace_stmt): New function.
 126         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
 127         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
 128         pattern.
 129         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
 130
 131 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 132             Alan Hayward  <alan.hayward@arm.com>
 133             David Sherwood  <david.sherwood@arm.com>
 134
 135         * doc/md.texi (extract_last_@var{m}): Document.
 136         * optabs.def (extract_last_optab): New optab.
 137         * internal-fn.def (EXTRACT_LAST): New internal function.
 138         * internal-fn.c (cond_unary_direct): New macro.
 139         (expand_cond_unary_optab_fn): Likewise.
 140         (direct_cond_unary_optab_supported_p): Likewise.
 141         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
 142         loops using EXTRACT_LAST.
 143         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
 144         (extract_last_<mode>): ...this optab.
 145         (vec_extract<mode><Vel>): Update accordingly.
 146
 147 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 148             Alan Hayward  <alan.hayward@arm.com>
 149             David Sherwood  <david.sherwood@arm.com>
 150
 151         * target.def (empty_mask_is_expensive): New hook.
 152         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
 153         * doc/tm.texi: Regenerate.
 154         * targhooks.h (default_empty_mask_is_expensive): Declare.
 155         * targhooks.c (default_empty_mask_is_expensive): New function.
 156         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
 157         if the target says that empty masks are expensive.
 158         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
 159         New function.
 160         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
 161
 162 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 163             Alan Hayward  <alan.hayward@arm.com>
 164             David Sherwood  <david.sherwood@arm.com>
 165
 166         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
 167         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
 168         (vect_use_loop_mask_for_alignment_p): New function.
 169         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
 170         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
 171         niters_skip argument.  Make sure that the first niters_skip elements
 172         of the first iteration are inactive.
 173         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
 174         Update call to vect_set_loop_masks_directly.
 175         (get_misalign_in_elems): New function, split out from...
 176         (vect_gen_prolog_loop_niters): ...here.
 177         (vect_update_init_of_dr): Take a code argument that specifies whether
 178         the adjustment should be added or subtracted.
 179         (vect_update_init_of_drs): Likewise.
 180         (vect_prepare_for_masked_peels): New function.
 181         (vect_do_peeling): Skip prologue peeling if we're using a mask
 182         instead.  Update call to vect_update_inits_of_drs.
 183         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
 184         mask_skip_niters.
 185         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
 186         alignment.  Do not include the number of peeled iterations in
 187         the minimum threshold in that case.
 188         (vectorizable_induction): Adjust the start value down by
 189         LOOP_VINFO_MASK_SKIP_NITERS iterations.
 190         (vect_transform_loop): Call vect_prepare_for_masked_peels.
 191         Take the number of skipped iterations into account when calculating
 192         the loop bounds.
 193         * tree-vect-stmts.c (vect_gen_while_not): New function.
 194
 195 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 196             Alan Hayward  <alan.hayward@arm.com>
 197             David Sherwood  <david.sherwood@arm.com>
 198
 199         * doc/sourcebuild.texi (vect_fully_masked): Document.
 200         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
 201         default value to 0.
 202         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
 203         split out from...
 204         (vect_analyze_loop_2): ...here. Don't check the vectorization
 205         factor against the number of loop iterations if the loop is
 206         fully-masked.
 207
 208 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 209             Alan Hayward  <alan.hayward@arm.com>
 210             David Sherwood  <david.sherwood@arm.com>
 211
 212         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
 213         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
 214         (dump_groups): Update accordingly.
 215         (iv_use::mem_type): New member variable.
 216         (address_p): New function.
 217         (record_use): Add a mem_type argument and initialize the new
 218         mem_type field.
 219         (record_group_use): Add a mem_type argument.  Use address_p.
 220         Remove obsolete null checks of base_object.  Update call to record_use.
 221         (find_interesting_uses_op): Update call to record_group_use.
 222         (find_interesting_uses_cond): Likewise.
 223         (find_interesting_uses_address): Likewise.
 224         (get_mem_type_for_internal_fn): New function.
 225         (find_address_like_use): Likewise.
 226         (find_interesting_uses_stmt): Try find_address_like_use before
 227         calling find_interesting_uses_op.
 228         (addr_offset_valid_p): Use the iv mem_type field as the type
 229         of the addressed memory.
 230         (add_autoinc_candidates): Likewise.
 231         (get_address_cost): Likewise.
 232         (split_small_address_groups_p): Use address_p.
 233         (split_address_groups): Likewise.
 234         (add_iv_candidate_for_use): Likewise.
 235         (autoinc_possible_for_pair): Likewise.
 236         (rewrite_groups): Likewise.
 237         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
 238         (determine_group_iv_cost): Update after split of USE_ADDRESS.
 239         (get_alias_ptr_type_for_ptr_address): New function.
 240         (rewrite_use_address): Rewrite address uses in calls that were
 241         identified by find_address_like_use.
 242
 243 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 244             Alan Hayward  <alan.hayward@arm.com>
 245             David Sherwood  <david.sherwood@arm.com>
 246
 247         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
 248         TARGET_MEM_REFs.
 249         * gimple-expr.h (is_gimple_addressable: Likewise.
 250         * gimple-expr.c (is_gimple_address): Likewise.
 251         * internal-fn.c (expand_call_mem_ref): New function.
 252         (expand_mask_load_optab_fn): Use it.
 253         (expand_mask_store_optab_fn): Likewise.
 254
 255 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 256             Alan Hayward  <alan.hayward@arm.com>
 257             David Sherwood  <david.sherwood@arm.com>
 258
 259         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
 260         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
 261         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
 262         (cond_umax@var{mode}): Document.
 263         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
 264         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
 265         (cond_umin_optab, cond_umax_optab): New optabs.
 266         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
 267         (COND_IOR, COND_XOR): New internal functions.
 268         * internal-fn.h (get_conditional_internal_fn): Declare.
 269         * internal-fn.c (cond_binary_direct): New macro.
 270         (expand_cond_binary_optab_fn): Likewise.
 271         (direct_cond_binary_optab_supported_p): Likewise.
 272         (get_conditional_internal_fn): New function.
 273         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
 274         Cope with reduction statements that are vectorized as calls rather
 275         than assignments.
 276         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
 277         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
 278         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
 279         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
 280         (UNSPEC_COND_EOR): New unspecs.
 281         (optab): Add mappings for them.
 282         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
 283         (sve_int_op, sve_fp_op): New int attributes.
 284
 285 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 286             Alan Hayward  <alan.hayward@arm.com>
 287             David Sherwood  <david.sherwood@arm.com>
 288
 289         * optabs.def (while_ult_optab): New optab.
 290         * doc/md.texi (while_ult@var{m}@var{n}): Document.
 291         * internal-fn.def (WHILE_ULT): New internal function.
 292         * internal-fn.h (direct_internal_fn_supported_p): New override
 293         that takes two types as argument.
 294         * internal-fn.c (while_direct): New macro.
 295         (expand_while_optab_fn): New function.
 296         (convert_optab_supported_p): Likewise.
 297         (direct_while_optab_supported_p): New macro.
 298         * wide-int.h (wi::udiv_ceil): New function.
 299         * tree-vectorizer.h (rgroup_masks): New structure.
 300         (vec_loop_masks): New typedef.
 301         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
 302         and fully_masked_p.
 303         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
 304         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
 305         (vect_max_vf): New function.
 306         (slpeel_make_loop_iterate_ntimes): Delete.
 307         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
 308         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
 309         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
 310         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
 311         internal-fn.h, stor-layout.h and optabs-query.h.
 312         (vect_set_loop_mask): New function.
 313         (add_preheader_seq): Likewise.
 314         (add_header_seq): Likewise.
 315         (interleave_supported_p): Likewise.
 316         (vect_maybe_permute_loop_masks): Likewise.
 317         (vect_set_loop_masks_directly): Likewise.
 318         (vect_set_loop_condition_masked): Likewise.
 319         (vect_set_loop_condition_unmasked): New function, split out from
 320         slpeel_make_loop_iterate_ntimes.
 321         (slpeel_make_loop_iterate_ntimes): Rename to..
 322         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
 323         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
 324         (vect_do_peeling): Update call accordingly.
 325         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
 326         loops.
 327         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
 328         mask_compare_type, can_fully_mask_p and fully_masked_p.
 329         (release_vec_loop_masks): New function.
 330         (_loop_vec_info): Use it to free the loop masks.
 331         (can_produce_all_loop_masks_p): New function.
 332         (vect_get_max_nscalars_per_iter): Likewise.
 333         (vect_verify_full_masking): Likewise.
 334         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
 335         retries, and free the mask rgroups before retrying.  Check loop-wide
 336         reasons for disallowing fully-masked loops.  Make the final decision
 337         about whether use a fully-masked loop or not.
 338         (vect_estimate_min_profitable_iters): Do not assume that peeling
 339         for the number of iterations will be needed for fully-masked loops.
 340         (vectorizable_reduction): Disable fully-masked loops.
 341         (vectorizable_live_operation): Likewise.
 342         (vect_halve_mask_nunits): New function.
 343         (vect_double_mask_nunits): Likewise.
 344         (vect_record_loop_mask): Likewise.
 345         (vect_get_loop_mask): Likewise.
 346         (vect_transform_loop): Handle the case in which the final loop
 347         iteration might handle a partial vector.  Call vect_set_loop_condition
 348         instead of slpeel_make_loop_iterate_ntimes.
 349         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
 350         (check_load_store_masking): New function.
 351         (prepare_load_store_mask): Likewise.
 352         (vectorizable_store): Handle fully-masked loops.
 353         (vectorizable_load): Likewise.
 354         (supportable_widening_operation): Use vect_halve_mask_nunits for
 355         booleans.
 356         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
 357         (vect_gen_while): New function.
 358         * config/aarch64/aarch64.md (umax<mode>3): New expander.
 359         (aarch64_uqdec<mode>): New insn.
 360
 361 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 362             Alan Hayward  <alan.hayward@arm.com>
 363             David Sherwood  <david.sherwood@arm.com>
 364
 365         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
 366         (reduc_xor_scal_optab): New optabs.
 367         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
 368         (reduc_xor_scal_@var{m}): Document.
 369         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
 370         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
 371         internal functions.
 372         * fold-const-call.c (fold_const_call): Handle them.
 373         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
 374         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
 375         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
 376         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
 377         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
 378         (UNSPEC_XORV): New unspecs.
 379         (optab): Add entries for them.
 380         (BITWISEV): New int iterator.
 381         (bit_reduc_op): New int attributes.
 382
 383 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 384             Alan Hayward  <alan.hayward@arm.com>
 385             David Sherwood  <david.sherwood@arm.com>
 386
 387         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
 388         * internal-fn.def (VEC_SHL_INSERT): New internal function.
 389         * optabs.def (vec_shl_insert_optab): New optab.
 390         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
 391         (duplicate_and_interleave): Likewise.
 392         * tree-vect-loop.c: Include internal-fn.h.
 393         (neutral_op_for_slp_reduction): New function, split out from
 394         get_initial_defs_for_reduction.
 395         (get_initial_def_for_reduction): Handle option 2 for variable-length
 396         vectors by loading the neutral value into a vector and then shifting
 397         the initial value into element 0.
 398         (get_initial_defs_for_reduction): Replace the code argument with
 399         the neutral value calculated by neutral_op_for_slp_reduction.
 400         Use gimple_build_vector for constant-length vectors.
 401         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
 402         but the first group_size elements have a neutral value.
 403         Use duplicate_and_interleave otherwise.
 404         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
 405         Update call to get_initial_defs_for_reduction.  Handle SLP
 406         reductions for variable-length vectors by creating one vector
 407         result for each scalar result, with the elements associated
 408         with other scalar results stubbed out with the neutral value.
 409         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
 410         Require IFN_VEC_SHL_INSERT for double reductions on
 411         variable-length vectors, or SLP reductions that have
 412         a neutral value.  Require can_duplicate_and_interleave_p
 413         support for variable-length unchained SLP reductions if there
 414         is no neutral value, such as for MIN/MAX reductions.  Also require
 415         the number of vector elements to be a multiple of the number of
 416         SLP statements when doing variable-length unchained SLP reductions.
 417         Update call to vect_create_epilog_for_reduction.
 418         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
 419         and remove initial values.
 420         (duplicate_and_interleave): Make public.
 421         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
 422         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
 423
 424 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 425             Alan Hayward  <alan.hayward@arm.com>
 426             David Sherwood  <david.sherwood@arm.com>
 427
 428         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
 429         (can_duplicate_and_interleave_p): New function.
 430         (vect_get_and_check_slp_defs): Take the vector of statements
 431         rather than just the current one.  Remove excess parentheses.
 432         Restriction rejectinon of vect_constant_def and vect_external_def
 433         for variable-length vectors to boolean types, or types for which
 434         can_duplicate_and_interleave_p is false.
 435         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
 436         (duplicate_and_interleave): New function.
 437         (vect_get_constant_vectors): Use gimple_build_vector for
 438         constant-length vectors and suitable variable-length constant
 439         vectors.  Use duplicate_and_interleave for other variable-length
 440         vectors.  Don't defer the update when inserting new statements.
 441
 442 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 443             Alan Hayward  <alan.hayward@arm.com>
 444             David Sherwood  <david.sherwood@arm.com>
 445
 446         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
 447         min_profitable_iters doesn't go negative.
 448
 449 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 450             Alan Hayward  <alan.hayward@arm.com>
 451             David Sherwood  <david.sherwood@arm.com>
 452
 453         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
 454         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
 455         * optabs.def (vec_mask_load_lanes_optab): New optab.
 456         (vec_mask_store_lanes_optab): Likewise.
 457         * internal-fn.def (MASK_LOAD_LANES): New internal function.
 458         (MASK_STORE_LANES): Likewise.
 459         * internal-fn.c (mask_load_lanes_direct): New macro.
 460         (mask_store_lanes_direct): Likewise.
 461         (expand_mask_load_optab_fn): Handle masked operations.
 462         (expand_mask_load_lanes_optab_fn): New macro.
 463         (expand_mask_store_optab_fn): Handle masked operations.
 464         (expand_mask_store_lanes_optab_fn): New macro.
 465         (direct_mask_load_lanes_optab_supported_p): Likewise.
 466         (direct_mask_store_lanes_optab_supported_p): Likewise.
 467         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
 468         parameter.
 469         (vect_load_lanes_supported): Likewise.
 470         * tree-vect-data-refs.c (strip_conversion): New function.
 471         (can_group_stmts_p): Likewise.
 472         (vect_analyze_data_ref_accesses): Use it instead of checking
 473         for a pair of assignments.
 474         (vect_store_lanes_supported): Take a masked_p parameter.
 475         (vect_load_lanes_supported): Likewise.
 476         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
 477         vect_store_lanes_supported and vect_load_lanes_supported.
 478         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
 479         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
 480         parameter.  Don't allow gaps for masked accesses.
 481         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
 482         and vect_load_lanes_supported.
 483         (get_load_store_type): Take a masked_p parameter and update
 484         call to get_group_load_store_type.
 485         (vectorizable_store): Update call to get_load_store_type.
 486         Handle IFN_MASK_STORE_LANES.
 487         (vectorizable_load): Update call to get_load_store_type.
 488         Handle IFN_MASK_LOAD_LANES.
 489
 490 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 491             Alan Hayward  <alan.hayward@arm.com>
 492             David Sherwood  <david.sherwood@arm.com>
 493
 494         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
 495         modes for SVE.
 496         * config/aarch64/aarch64-protos.h
 497         (aarch64_sve_struct_memory_operand_p): Declare.
 498         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
 499         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
 500         (VPRED, vpred): Handle SVE structure modes.
 501         * config/aarch64/constraints.md (Utx): New constraint.
 502         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
 503         (aarch64_sve_struct_nonimmediate_operand): New predicates.
 504         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
 505         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
 506         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
 507         structure modes.  Split into pieces after RA.
 508         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
 509         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
 510         New patterns.
 511         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
 512         SVE structure modes.
 513         (aarch64_classify_address): Likewise.
 514         (sizetochar): Move earlier in file.
 515         (aarch64_print_operand): Handle SVE register lists.
 516         (aarch64_array_mode): New function.
 517         (aarch64_sve_struct_memory_operand_p): Likewise.
 518         (TARGET_ARRAY_MODE): Redefine.
 519
 520 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 521             Alan Hayward  <alan.hayward@arm.com>
 522             David Sherwood  <david.sherwood@arm.com>
 523
 524         * target.def (array_mode): New target hook.
 525         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
 526         * doc/tm.texi: Regenerate.
 527         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
 528         * hooks.c (hook_optmode_mode_uhwi_none): New function.
 529         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
 530         targetm.array_mode.
 531         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
 532         type sizes.
 533
 534 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 535             Alan Hayward  <alan.hayward@arm.com>
 536             David Sherwood  <david.sherwood@arm.com>
 537
 538         * fold-const.c (fold_binary_loc): Check the argument types
 539         rather than the result type when testing for a vector operation.
 540
 541 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 542
 543         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
 544         * doc/tm.texi: Regenerate.
 545
 546 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 547             Alan Hayward  <alan.hayward@arm.com>
 548             David Sherwood  <david.sherwood@arm.com>
 549
 550         * doc/invoke.texi (-msve-vector-bits=): Document new option.
 551         (sve): Document new AArch64 extension.
 552         * doc/md.texi (w): Extend the description of the AArch64
 553         constraint to include SVE vectors.
 554         (Upl, Upa): Document new AArch64 predicate constraints.
 555         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
 556         enum.
 557         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
 558         (msve-vector-bits=): New option.
 559         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
 560         SVE when these are disabled.
 561         (sve): New extension.
 562         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
 563         modes.  Adjust their number of units based on aarch64_sve_vg.
 564         (MAX_BITSIZE_MODE_ANY_MODE): Define.
 565         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
 566         aarch64_addr_query_type.
 567         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
 568         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
 569         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
 570         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
 571         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
 572         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
 573         (aarch64_simd_imm_zero_p): Delete.
 574         (aarch64_check_zero_based_sve_index_immediate): Declare.
 575         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
 576         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
 577         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
 578         (aarch64_sve_float_mul_immediate_p): Likewise.
 579         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
 580         rather than an rtx.
 581         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
 582         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
 583         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
 584         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
 585         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
 586         (aarch64_regmode_natural_size): Likewise.
 587         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
 588         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
 589         left one place.
 590         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
 591         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
 592         for VG and the SVE predicate registers.
 593         (V_ALIASES): Add a "z"-prefixed alias.
 594         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
 595         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
 596         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
 597         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
 598         (REG_CLASS_NAMES): Add entries for them.
 599         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
 600         and the predicate registers.
 601         (aarch64_sve_vg): Declare.
 602         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
 603         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
 604         (REGMODE_NATURAL_SIZE): Define.
 605         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
 606         SVE macros.
 607         * config/aarch64/aarch64.c: Include cfgrtl.h.
 608         (simd_immediate_info): Add a constructor for series vectors,
 609         and an associated step field.
 610         (aarch64_sve_vg): New variable.
 611         (aarch64_dbx_register_number): Handle VG and the predicate registers.
 612         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
 613         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
 614         (VEC_ANY_DATA, VEC_STRUCT): New constants.
 615         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
 616         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
 617         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
 618         (aarch64_get_mask_mode): New functions.
 619         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
 620         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
 621         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
 622         predicate modes and predicate registers.  Explicitly restrict
 623         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
 624         to store a vector mode if it is recognized by
 625         aarch64_classify_vector_mode.
 626         (aarch64_regmode_natural_size): New function.
 627         (aarch64_hard_regno_caller_save_mode): Return the original mode
 628         for predicates.
 629         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
 630         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
 631         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
 632         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
 633         functions.
 634         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
 635         does not overlap dest if the function is frame-related.  Handle
 636         SVE constants.
 637         (aarch64_split_add_offset): New function.
 638         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
 639         them aarch64_add_offset.
 640         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
 641         and update call to aarch64_sub_sp.
 642         (aarch64_add_cfa_expression): New function.
 643         (aarch64_expand_prologue): Pass extra temporary registers to the
 644         functions above.  Handle the case in which we need to emit new
 645         DW_CFA_expressions for registers that were originally saved
 646         relative to the stack pointer, but now have to be expressed
 647         relative to the frame pointer.
 648         (aarch64_output_mi_thunk): Pass extra temporary registers to the
 649         functions above.
 650         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
 651         IP0 and IP1 values for SVE frames.
 652         (aarch64_expand_vec_series): New function.
 653         (aarch64_expand_sve_widened_duplicate): Likewise.
 654         (aarch64_expand_sve_const_vector): Likewise.
 655         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
 656         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
 657         into the register, rather than emitting a SET directly.
 658         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
 659         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
 660         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
 661         (offset_9bit_signed_scaled_p): New functions.
 662         (aarch64_replicate_bitmask_imm): New function.
 663         (aarch64_bitmask_imm): Use it.
 664         (aarch64_cannot_force_const_mem): Reject expressions involving
 665         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
 666         (aarch64_classify_index): Handle SVE indices, by requiring
 667         a plain register index with a scale that matches the element size.
 668         (aarch64_classify_address): Handle SVE addresses.  Assert that
 669         the mode of the address is VOIDmode or an integer mode.
 670         Update call to aarch64_classify_symbol.
 671         (aarch64_classify_symbolic_expression): Update call to
 672         aarch64_classify_symbol.
 673         (aarch64_const_vec_all_in_range_p): New function.
 674         (aarch64_print_vector_float_operand): Likewise.
 675         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
 676         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
 677         and the FP immediates 1.0 and 0.5.
 678         (aarch64_print_address_internal): Handle SVE addresses.
 679         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
 680         (aarch64_regno_regclass): Handle predicate registers.
 681         (aarch64_secondary_reload): Handle big-endian reloads of SVE
 682         data modes.
 683         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
 684         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
 685         (aarch64_convert_sve_vector_bits): New function.
 686         (aarch64_override_options): Use it to handle -msve-vector-bits=.
 687         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
 688         rather than an rtx.
 689         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
 690         Handle SVE vector and predicate modes.  Accept VL-based constants
 691         that need only one temporary register, and VL offsets that require
 692         no temporary registers.
 693         (aarch64_conditional_register_usage): Mark the predicate registers
 694         as fixed if SVE isn't available.
 695         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
 696         Return true for SVE vector and predicate modes.
 697         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
 698         rather than an unsigned int.  Handle SVE modes.
 699         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
 700         SVE modes.
 701         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
 702         if SVE is enabled.
 703         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
 704         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
 705         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
 706         (aarch64_sve_float_mul_immediate_p): New functions.
 707         (aarch64_sve_valid_immediate): New function.
 708         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
 709         Explicitly reject structure modes.  Check for INDEX constants.
 710         Handle PTRUE and PFALSE constants.
 711         (aarch64_check_zero_based_sve_index_immediate): New function.
 712         (aarch64_simd_imm_zero_p): Delete.
 713         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
 714         vector modes.  Accept constants in the range of CNT[BHWD].
 715         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
 716         ask for an Advanced SIMD mode.
 717         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
 718         (aarch64_simd_vector_alignment): Handle SVE predicates.
 719         (aarch64_vectorize_preferred_vector_alignment): New function.
 720         (aarch64_simd_vector_alignment_reachable): Use it instead of
 721         the vector size.
 722         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
 723         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
 724         functions.
 725         (MAX_VECT_LEN): Delete.
 726         (expand_vec_perm_d): Add a vec_flags field.
 727         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
 728         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
 729         (aarch64_evpc_ext): Don't apply a big-endian lane correction
 730         for SVE modes.
 731         (aarch64_evpc_rev): Rename to...
 732         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
 733         (aarch64_evpc_rev_global): New function.
 734         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
 735         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
 736         MAX_VECT_LEN.
 737         (aarch64_evpc_sve_tbl): New function.
 738         (aarch64_expand_vec_perm_const_1): Update after rename of
 739         aarch64_evpc_rev.  Handle SVE permutes too, trying
 740         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
 741         than aarch64_evpc_tbl.
 742         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
 743         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
 744         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
 745         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
 746         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
 747         (aarch64_expand_sve_vcond): New functions.
 748         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
 749         of aarch64_vector_mode_p.
 750         (aarch64_dwarf_poly_indeterminate_value): New function.
 751         (aarch64_compute_pressure_classes): Likewise.
 752         (aarch64_can_change_mode_class): Likewise.
 753         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
 754         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
 755         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
 756         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
 757         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
 758         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
 759         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
 760         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
 761         constraints.
 762         (Dn, Dl, Dr): Accept const as well as const_vector.
 763         (Dz): Likewise.  Compare against CONST0_RTX.
 764         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
 765         of "vector" where appropriate.
 766         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
 767         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
 768         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
 769         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
 770         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
 771         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
 772         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
 773         (v_int_equiv): Extend to SVE modes.
 774         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
 775         mode attributes.
 776         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
 777         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
 778         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
 779         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
 780         (SVE_COND_FP_CMP): New int iterators.
 781         (perm_hilo): Handle the new unpack unspecs.
 782         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
 783         attributes.
 784         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
 785         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
 786         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
 787         (aarch64_equality_operator, aarch64_constant_vector_operand)
 788         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
 789         (aarch64_sve_nonimmediate_operand): Likewise.
 790         (aarch64_sve_general_operand): Likewise.
 791         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
 792         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
 793         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
 794         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
 795         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
 796         (aarch64_sve_float_arith_immediate): Likewise.
 797         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
 798         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
 799         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
 800         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
 801         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
 802         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
 803         (aarch64_sve_float_arith_operand): Likewise.
 804         (aarch64_sve_float_arith_with_sub_operand): Likewise.
 805         (aarch64_sve_float_mul_operand): Likewise.
 806         (aarch64_sve_vec_perm_operand): Likewise.
 807         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
 808         (aarch64_mov_operand): Accept const_poly_int and const_vector.
 809         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
 810         as well as const_vector.
 811         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
 812         in file.  Use CONST0_RTX and CONSTM1_RTX.
 813         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
 814         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
 815         Use aarch64_simd_imm_zero.
 816         * config/aarch64/aarch64-sve.md: New file.
 817         * config/aarch64/aarch64.md: Include it.
 818         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
 819         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
 820         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
 821         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
 822         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
 823         (sve): New attribute.
 824         (enabled): Disable instructions with the sve attribute unless
 825         TARGET_SVE.
 826         (movqi, movhi): Pass CONST_POLY_INT operaneds through
 827         aarch64_expand_mov_immediate.
 828         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
 829         CNT[BHSD] immediates.
 830         (movti): Split CONST_POLY_INT moves into two halves.
 831         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
 832         Split additions that need a temporary here if the destination
 833         is the stack pointer.
 834         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
 835         (*add<mode>3_poly_1): New instruction.
 836         (set_clobber_cc): New expander.
 837
 838 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 839
 840         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
 841         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
 842         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
 843         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
 844         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
 845         Change innermode from fixed_mode_size to machine_mode.
 846         (simplify_subreg): Update call accordingly.  Handle a constant-sized
 847         subreg of a variable-length CONST_VECTOR.
 848
 849 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 850             Alan Hayward  <alan.hayward@arm.com>
 851             David Sherwood  <david.sherwood@arm.com>
 852
 853         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
 854         (add_offset_to_base): New function, split out from...
 855         (create_mem_ref): ...here.  When handling a scale other than 1,
 856         check first whether the address is valid without the offset.
 857         Add it into the base if so, leaving the index and scale as-is.
 858
 859 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
 860
 861         PR c++/83778
 862         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
 863         fold_for_warn before checking if arg2 is INTEGER_CST.
 864
 865 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
 866
 867         * config/rs6000/predicates.md (load_multiple_operation): Delete.
 868         (store_multiple_operation): Delete.
 869         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
 870         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
 871         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
 872         guarded by TARGET_STRING.
 873         (rs6000_output_load_multiple): Delete.
 874         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
 875         OPTION_MASK_STRING / TARGET_STRING handling.
 876         (print_operand) <'N', 'O'>: Add comment that these are unused now.
 877         (const rs6000_opt_masks) <"string">: Change mask to 0.
 878         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
 879         (MASK_STRING): Delete.
 880         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
 881         parts.  Simplify.
 882         (load_multiple): Delete.
 883         (*ldmsi8): Delete.
 884         (*ldmsi7): Delete.
 885         (*ldmsi6): Delete.
 886         (*ldmsi5): Delete.
 887         (*ldmsi4): Delete.
 888         (*ldmsi3): Delete.
 889         (store_multiple): Delete.
 890         (*stmsi8): Delete.
 891         (*stmsi7): Delete.
 892         (*stmsi6): Delete.
 893         (*stmsi5): Delete.
 894         (*stmsi4): Delete.
 895         (*stmsi3): Delete.
 896         (movmemsi_8reg): Delete.
 897         (corresponding unnamed define_insn): Delete.
 898         (movmemsi_6reg): Delete.
 899         (corresponding unnamed define_insn): Delete.
 900         (movmemsi_4reg): Delete.
 901         (corresponding unnamed define_insn): Delete.
 902         (movmemsi_2reg): Delete.
 903         (corresponding unnamed define_insn): Delete.
 904         (movmemsi_1reg): Delete.
 905         (corresponding unnamed define_insn): Delete.
 906         * config/rs6000/rs6000.opt (mno-string): New.
 907         (mstring): Replace by deprecation warning stub.
 908         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
 909
 910 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
 911
 912         * regrename.c (regrename_do_replace): If replacing the same
 913         reg multiple times, try to reuse last created gen_raw_REG.
 914
 915         PR debug/81155
 916         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
 917         main to workaround a bug in GDB.
 918
 919 2018-01-12  Tom de Vries  <tom@codesourcery.com>
 920
 921         PR target/83737
 922         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
 923
 924 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
 925
 926         PR rtl-optimization/80481
 927         * ira-color.c (get_cap_member): New function.
 928         (allocnos_conflict_by_live_ranges_p): Use it.
 929         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
 930         (setup_slot_coalesced_allocno_live_ranges): Ditto.
 931
 932 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
 933
 934         PR target/83628
 935         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
 936         (*saddl_se_1): Ditto.
 937         (*ssubsi_1): Ditto.
 938         (*saddl_se_1): Ditto.
 939
 940 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
 941
 942         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
 943         rather than wi::to_widest for DR_INITs.
 944         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
 945         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
 946         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
 947         INTEGER_CSTs.
 948         (vect_analyze_group_access_1): Note that here.
 949
 950 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
 951
 952         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
 953         polynomial type sizes.
 954
 955 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
 956
 957         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
 958         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
 959         (gimple_add_tmp_var): Likewise.
 960
 961 2018-01-12  Martin Liska  <mliska@suse.cz>
 962
 963         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
 964         (gimple_alloc_sizes): Likewise.
 965         (dump_gimple_statistics): Use PRIu64 in printf format.
 966         * gimple.h: Change uint64_t to int.
 967
 968 2018-01-12  Martin Liska  <mliska@suse.cz>
 969
 970         * tree-core.h: Use uint64_t instead of int.
 971         * tree.c (tree_node_counts): Likewise.
 972         (tree_node_sizes): Likewise.
 973         (dump_tree_statistics): Use PRIu64 in printf format.
 974
 975 2018-01-12  Martin Liska  <mliska@suse.cz>
 976
 977         * Makefile.in: As qsort_chk is implemented in vec.c, add
 978         vec.o to linkage of gencfn-macros.
 979         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
 980         passing the info to record_node_allocation_statistics.
 981         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
 982         and pass the info.
 983         * ggc-common.c (struct ggc_usage): Add operator== and use
 984         it in operator< and compare function.
 985         * mem-stats.h (struct mem_usage): Likewise.
 986         * vec.c (struct vec_usage): Remove operator< and compare
 987         function. Can be simply inherited.
 988
 989 2018-01-12  Martin Jambor  <mjambor@suse.cz>
 990
 991         PR target/81616
 992         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
 993         * tree-ssa-math-opts.c: Include domwalk.h.
 994         (convert_mult_to_fma_1): New function.
 995         (fma_transformation_info): New type.
 996         (fma_deferring_state): Likewise.
 997         (cancel_fma_deferring): New function.
 998         (result_of_phi): Likewise.
 999         (last_fma_candidate_feeds_initial_phi): Likewise.
1000         (convert_mult_to_fma): Added deferring logic, split actual
1001         transformation to convert_mult_to_fma_1.
1002         (math_opts_dom_walker): New type.
1003         (math_opts_dom_walker::after_dom_children): New method, body moved
1004         here from pass_optimize_widening_mul::execute, added deferring logic
1005         bits.
1006         (pass_optimize_widening_mul::execute): Moved most of code to
1007         math_opts_dom_walker::after_dom_children.
1008         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1009         * config/i386/i386.c (ix86_option_override_internal): Added
1010         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1011
1012 2018-01-12  Richard Biener  <rguenther@suse.de>
1013
1014         PR debug/83157
1015         * dwarf2out.c (gen_variable_die): Do not reset old_die for
1016         inline instance vars.
1017
1018 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
1019
1020         PR target/81819
1021         * config/rx/rx.c (rx_is_restricted_memory_address):
1022         Handle SUBREG case.
1023
1024 2018-01-12  Richard Biener  <rguenther@suse.de>
1025
1026         PR tree-optimization/80846
1027         * target.def (split_reduction): New target hook.
1028         * targhooks.c (default_split_reduction): New function.
1029         * targhooks.h (default_split_reduction): Declare.
1030         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1031         target requests first reduce vectors by combining low and high
1032         parts.
1033         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1034         (get_vectype_for_scalar_type_and_size): Export.
1035         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1036         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1037         * doc/tm.texi: Regenerate.
1038         * config/i386/i386.c (ix86_split_reduction): Implement
1039         TARGET_VECTORIZE_SPLIT_REDUCTION.
1040
1041 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
1042
1043         PR target/83368
1044         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1045         in PIC mode except for TARGET_VXWORKS_RTP.
1046         * config/sparc/sparc.c: Include cfgrtl.h.
1047         (TARGET_INIT_PIC_REG): Define.
1048         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1049         (sparc_pic_register_p): New predicate.
1050         (sparc_legitimate_address_p): Use it.
1051         (sparc_legitimize_pic_address): Likewise.
1052         (sparc_delegitimize_address): Likewise.
1053         (sparc_mode_dependent_address_p): Likewise.
1054         (gen_load_pcrel_sym): Remove 4th parameter.
1055         (load_got_register): Adjust call to above.  Remove obsolete stuff.
1056         (sparc_expand_prologue): Do not call load_got_register here.
1057         (sparc_flat_expand_prologue): Likewise.
1058         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1059         (sparc_use_pseudo_pic_reg): New function.
1060         (sparc_init_pic_reg): Likewise.
1061         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1062         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1063
1064 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
1065
1066         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1067         Add item for branch_cost.
1068
1069 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
1070
1071         PR rtl-optimization/83565
1072         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1073         not extend the result to a larger mode for rotate operations.
1074         (num_sign_bit_copies1): Likewise.
1075
1076 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
1077
1078         PR target/40411
1079         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1080         -symbolic.
1081         Use values-Xc.o for -pedantic.
1082         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1083
1084 2018-01-12  Martin Liska  <mliska@suse.cz>
1085
1086         PR ipa/83054
1087         * ipa-devirt.c (final_warning_record::grow_type_warnings):
1088         New function.
1089         (possible_polymorphic_call_targets): Use it.
1090         (ipa_devirt): Likewise.
1091
1092 2018-01-12  Martin Liska  <mliska@suse.cz>
1093
1094         * profile-count.h (enum profile_quality): Use 0 as invalid
1095         enum value of profile_quality.
1096
1097 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
1098
1099         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1100         -mext-string options.
1101
1102 2018-01-12  Richard Biener  <rguenther@suse.de>
1103
1104         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1105         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1106         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1107         Likewise.
1108         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1109
1110 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
1111
1112         * configure.ac (--with-long-double-format): Add support for the
1113         configuration option to change the default long double format on
1114         PowerPC systems.
1115         * config.gcc (powerpc*-linux*-*): Likewise.
1116         * configure: Regenerate.
1117         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1118         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1119         used without modification.
1120
1121 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1122
1123         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1124         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1125         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1126         MISC_BUILTIN_SPEC_BARRIER.
1127         (rs6000_init_builtins): Likewise.
1128         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1129         enum value.
1130         (speculation_barrier): New define_insn.
1131         * doc/extend.texi: Document __builtin_speculation_barrier.
1132
1133 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
1134
1135         PR target/83203
1136         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1137         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1138         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1139         iterators.
1140         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
1141         integral modes instead of "ss" and "sd".
1142         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1143         vectors with 32-bit and 64-bit elements.
1144         (vecdupssescalarmodesuffix): New mode attribute.
1145         (vec_dup<mode>): Use it.
1146
1147 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
1148
1149         PR target/83330
1150         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1151         frame if argument is passed on stack.
1152
1153 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
1154
1155         PR target/82682
1156         * ree.c (combine_reaching_defs): Optimize also
1157         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1158         reg2=any_extend(exp); reg1=reg2;, formatting fix.
1159
1160 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
1161
1162         PR middle-end/83189
1163         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1164
1165 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
1166
1167         PR middle-end/83718
1168         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1169         after they are computed.
1170
1171 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
1172
1173         PR tree-optimization/83695
1174         * gimple-loop-linterchange.cc
1175         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1176         reset cached scev information after interchange.
1177         (pass_linterchange::execute): Remove call to scev_reset_htab.
1178
1179 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1180
1181         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1182         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1183         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1184         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1185         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1186         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1187         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1188         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1189         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1190         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1191         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1192         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1193         (V_lane_reg): Likewise.
1194         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1195         New define_expand.
1196         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1197         (vfmal_lane_low<mode>_intrinsic,
1198         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1199         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1200         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1201         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1202         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1203         vfmsl_lane_high<mode>_intrinsic): New define_insns.
1204
1205 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1206
1207         * config/arm/arm-cpus.in (fp16fml): New feature.
1208         (ALL_SIMD): Add fp16fml.
1209         (armv8.2-a): Add fp16fml as an option.
1210         (armv8.3-a): Likewise.
1211         (armv8.4-a): Add fp16fml as part of fp16.
1212         * config/arm/arm.h (TARGET_FP16FML): Define.
1213         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1214         when appropriate.
1215         * config/arm/arm-modes.def (V2HF): Define.
1216         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1217         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1218         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1219         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1220         vfmsl_low, vfmsl_high): New set of builtins.
1221         * config/arm/iterators.md (PLUSMINUS): New code iterator.
1222         (vfml_op): New code attribute.
1223         (VFMLHALVES): New int iterator.
1224         (VFML, VFMLSEL): New mode attributes.
1225         (V_reg): Define mapping for V2HF.
1226         (V_hi, V_lo): New mode attributes.
1227         (VF_constraint): Likewise.
1228         (vfml_half, vfml_half_selector): New int attributes.
1229         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1230         define_expand.
1231         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1232         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1233         New define_insn.
1234         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1235         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1236         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1237         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
1238         documentation.
1239         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1240         Document new effective target and option set.
1241
1242 2017-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1243
1244         * config/arm/arm-cpus.in (armv8_4): New feature.
1245         (ARMv8_4a): New fgroup.
1246         (armv8.4-a): New arch.
1247         * config/arm/arm-tables.opt: Regenerate.
1248         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1249         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1250         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1251         Add matching rules for -march=armv8.4-a and extensions.
1252         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1253
1254 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
1255
1256         PR target/81821
1257         * config/rx/rx.md (BW): New mode attribute.
1258         (sync_lock_test_and_setsi): Add mode suffix to insn output.
1259
1260 2018-01-11  Richard Biener  <rguenther@suse.de>
1261
1262         PR tree-optimization/83435
1263         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1264         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1265         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1266
1267 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1268             Alan Hayward  <alan.hayward@arm.com>
1269             David Sherwood  <david.sherwood@arm.com>
1270
1271         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1272         field.
1273         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
1274         (aarch64_print_address_internal): Use it to check for a zero offset.
1275
1276 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1277             Alan Hayward  <alan.hayward@arm.com>
1278             David Sherwood  <david.sherwood@arm.com>
1279
1280         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1281         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1282         Return a poly_int64 rather than a HOST_WIDE_INT.
1283         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1284         rather than a HOST_WIDE_INT.
1285         * config/aarch64/aarch64.h (aarch64_frame): Protect with
1286         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
1287         hard_fp_offset, frame_size, initial_adjust, callee_offset and
1288         final_offset from HOST_WIDE_INT to poly_int64.
1289         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1290         to_constant when getting the number of units in an Advanced SIMD
1291         mode.
1292         (aarch64_builtin_vectorized_function): Check for a constant number
1293         of units.
1294         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1295         GET_MODE_SIZE.
1296         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1297         attribute instead of GET_MODE_NUNITS.
1298         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1299         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1300         GET_MODE_SIZE for fixed-size registers.
1301         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1302         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1303         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1304         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1305         (aarch64_print_operand, aarch64_print_address_internal)
1306         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1307         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1308         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1309         Handle polynomial GET_MODE_SIZE.
1310         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
1311         wider than SImode without modification.
1312         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1313         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1314         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1315         passing and returning SVE modes.
1316         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1317         rather than GEN_INT.
1318         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1319         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1320         (aarch64_allocate_and_probe_stack_space): Likewise.
1321         (aarch64_layout_frame): Cope with polynomial offsets.
1322         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1323         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
1324         polynomial offsets.
1325         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1326         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1327         poly_int64 rather than a HOST_WIDE_INT.
1328         (aarch64_get_separate_components, aarch64_process_components)
1329         (aarch64_expand_prologue, aarch64_expand_epilogue)
1330         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1331         (aarch64_anchor_offset): New function, split out from...
1332         (aarch64_legitimize_address): ...here.
1333         (aarch64_builtin_vectorization_cost): Handle polynomial
1334         TYPE_VECTOR_SUBPARTS.
1335         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1336         GET_MODE_NUNITS.
1337         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1338         number of elements from the PARALLEL rather than the mode.
1339         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1340         rather than GET_MODE_BITSIZE.
1341         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1342         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1343         (aarch64_expand_vec_perm_const_1): Handle polynomial
1344         d->perm.length () and d->perm elements.
1345         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
1346         Apply to_constant to d->perm elements.
1347         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1348         polynomial CONST_VECTOR_NUNITS.
1349         (aarch64_move_pointer): Take amount as a poly_int64 rather
1350         than an int.
1351         (aarch64_progress_pointer): Avoid temporary variable.
1352         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1353         the mode attribute instead of GET_MODE.
1354
1355 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1356             Alan Hayward  <alan.hayward@arm.com>
1357             David Sherwood  <david.sherwood@arm.com>
1358
1359         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1360         x exists before using it.
1361         (aarch64_add_constant_internal): Rename to...
1362         (aarch64_add_offset_1): ...this.  Replace regnum with separate
1363         src and dest rtxes.  Handle the case in which they're different,
1364         including when the offset is zero.  Replace scratchreg with an rtx.
1365         Use 2 additions if there is no spare register into which we can
1366         move a 16-bit constant.
1367         (aarch64_add_constant): Delete.
1368         (aarch64_add_offset): Replace reg with separate src and dest
1369         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
1370         Use aarch64_add_offset_1.
1371         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1372         an rtx rather than an int.  Take the delta as a poly_int64
1373         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
1374         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1375         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1376         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1377         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1378         and aarch64_add_sp.
1379         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1380         aarch64_add_constant.
1381
1382 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1383
1384         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1385         Use scalar_float_mode.
1386
1387 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1388
1389         * config/aarch64/aarch64-simd.md
1390         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1391         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1392         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1393         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1394         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1395         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1396         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1397         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1398         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1399         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1400
1401 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
1402
1403         PR target/83514
1404         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1405         targ_options->x_arm_arch_string is non NULL.
1406
1407 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
1408
1409         * config/aarch64/aarch64.h
1410         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
1411
1412 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
1413
1414         PR target/82096
1415         * expmed.c (emit_store_flag_force): Swap if const op0
1416         and change VOIDmode to mode of op0.
1417
1418 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1419
1420         PR rtl-optimization/83761
1421         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1422         than bytes to mode_for_size.
1423
1424 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
1425
1426         PR middle-end/83189
1427         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1428         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1429         profile.
1430
1431 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
1432
1433         PR middle-end/83575
1434         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1435         when in layout mode.
1436         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1437         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1438         partition fixup.
1439
1440 2018-01-10  Michael Collison  <michael.collison@arm.com>
1441
1442         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1443         * config/aarch64/aarch64-option-extension.def: Add
1444         AARCH64_OPT_EXTENSION of 'fp16fml'.
1445         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1446         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1447         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1448         * config/aarch64/constraints.md (Ui7): New constraint.
1449         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1450         (VFMLA_SEL_W): Ditto.
1451         (f16quad): Ditto.
1452         (f16mac1): Ditto.
1453         (VFMLA16_LOW): New int iterator.
1454         (VFMLA16_HIGH): Ditto.
1455         (UNSPEC_FMLAL): New unspec.
1456         (UNSPEC_FMLSL): Ditto.
1457         (UNSPEC_FMLAL2): Ditto.
1458         (UNSPEC_FMLSL2): Ditto.
1459         (f16mac): New code attribute.
1460         * config/aarch64/aarch64-simd-builtins.def
1461         (aarch64_fmlal_lowv2sf): Ditto.
1462         (aarch64_fmlsl_lowv2sf): Ditto.
1463         (aarch64_fmlalq_lowv4sf): Ditto.
1464         (aarch64_fmlslq_lowv4sf): Ditto.
1465         (aarch64_fmlal_highv2sf): Ditto.
1466         (aarch64_fmlsl_highv2sf): Ditto.
1467         (aarch64_fmlalq_highv4sf): Ditto.
1468         (aarch64_fmlslq_highv4sf): Ditto.
1469         (aarch64_fmlal_lane_lowv2sf): Ditto.
1470         (aarch64_fmlsl_lane_lowv2sf): Ditto.
1471         (aarch64_fmlal_laneq_lowv2sf): Ditto.
1472         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1473         (aarch64_fmlalq_lane_lowv4sf): Ditto.
1474         (aarch64_fmlsl_lane_lowv4sf): Ditto.
1475         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1476         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1477         (aarch64_fmlal_lane_highv2sf): Ditto.
1478         (aarch64_fmlsl_lane_highv2sf): Ditto.
1479         (aarch64_fmlal_laneq_highv2sf): Ditto.
1480         (aarch64_fmlsl_laneq_highv2sf): Ditto.
1481         (aarch64_fmlalq_lane_highv4sf): Ditto.
1482         (aarch64_fmlsl_lane_highv4sf): Ditto.
1483         (aarch64_fmlalq_laneq_highv4sf): Ditto.
1484         (aarch64_fmlsl_laneq_highv4sf): Ditto.
1485         * config/aarch64/aarch64-simd.md:
1486         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1487         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1488         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1489         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1490         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1491         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1492         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1493         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1494         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1495         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1496         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1497         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1498         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1499         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1500         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1501         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1502         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1503         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1504         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1505         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1506         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1507         (vfmlsl_low_u32): Ditto.
1508         (vfmlalq_low_u32): Ditto.
1509         (vfmlslq_low_u32): Ditto.
1510         (vfmlal_high_u32): Ditto.
1511         (vfmlsl_high_u32): Ditto.
1512         (vfmlalq_high_u32): Ditto.
1513         (vfmlslq_high_u32): Ditto.
1514         (vfmlal_lane_low_u32): Ditto.
1515         (vfmlsl_lane_low_u32): Ditto.
1516         (vfmlal_laneq_low_u32): Ditto.
1517         (vfmlsl_laneq_low_u32): Ditto.
1518         (vfmlalq_lane_low_u32): Ditto.
1519         (vfmlslq_lane_low_u32): Ditto.
1520         (vfmlalq_laneq_low_u32): Ditto.
1521         (vfmlslq_laneq_low_u32): Ditto.
1522         (vfmlal_lane_high_u32): Ditto.
1523         (vfmlsl_lane_high_u32): Ditto.
1524         (vfmlal_laneq_high_u32): Ditto.
1525         (vfmlsl_laneq_high_u32): Ditto.
1526         (vfmlalq_lane_high_u32): Ditto.
1527         (vfmlslq_lane_high_u32): Ditto.
1528         (vfmlalq_laneq_high_u32): Ditto.
1529         (vfmlslq_laneq_high_u32): Ditto.
1530         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1531         (AARCH64_FL_FOR_ARCH8_4): New.
1532         (AARCH64_ISA_F16FML): New ISA flag.
1533         (TARGET_F16FML): New feature flag for fp16fml.
1534         (doc/invoke.texi): Document new fp16fml option.
1535
1536 2018-01-10  Michael Collison  <michael.collison@arm.com>
1537
1538         * config/aarch64/aarch64-builtins.c:
1539         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1540         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1541         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1542         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1543         (AARCH64_ISA_SHA3): New ISA flag.
1544         (TARGET_SHA3): New feature flag for sha3.
1545         * config/aarch64/iterators.md (sha512_op): New int attribute.
1546         (CRYPTO_SHA512): New int iterator.
1547         (UNSPEC_SHA512H): New unspec.
1548         (UNSPEC_SHA512H2): Ditto.
1549         (UNSPEC_SHA512SU0): Ditto.
1550         (UNSPEC_SHA512SU1): Ditto.
1551         * config/aarch64/aarch64-simd-builtins.def
1552         (aarch64_crypto_sha512hqv2di): New builtin.
1553         (aarch64_crypto_sha512h2qv2di): Ditto.
1554         (aarch64_crypto_sha512su0qv2di): Ditto.
1555         (aarch64_crypto_sha512su1qv2di): Ditto.
1556         (aarch64_eor3qv8hi): Ditto.
1557         (aarch64_rax1qv2di): Ditto.
1558         (aarch64_xarqv2di): Ditto.
1559         (aarch64_bcaxqv8hi): Ditto.
1560         * config/aarch64/aarch64-simd.md:
1561         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1562         (aarch64_crypto_sha512su0qv2di): Ditto.
1563         (aarch64_crypto_sha512su1qv2di): Ditto.
1564         (aarch64_eor3qv8hi): Ditto.
1565         (aarch64_rax1qv2di): Ditto.
1566         (aarch64_xarqv2di): Ditto.
1567         (aarch64_bcaxqv8hi): Ditto.
1568         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1569         (vsha512h2q_u64): Ditto.
1570         (vsha512su0q_u64): Ditto.
1571         (vsha512su1q_u64): Ditto.
1572         (veor3q_u16): Ditto.
1573         (vrax1q_u64): Ditto.
1574         (vxarq_u64): Ditto.
1575         (vbcaxq_u16): Ditto.
1576         * config/arm/types.md (crypto_sha512): New type attribute.
1577         (crypto_sha3): Ditto.
1578         (doc/invoke.texi): Document new sha3 option.
1579
1580 2018-01-10  Michael Collison  <michael.collison@arm.com>
1581
1582         * config/aarch64/aarch64-builtins.c:
1583         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1584         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1585         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1586         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1587         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1588         (AARCH64_ISA_SM4): New ISA flag.
1589         (TARGET_SM4): New feature flag for sm4.
1590         * config/aarch64/aarch64-simd-builtins.def
1591         (aarch64_sm3ss1qv4si): Ditto.
1592         (aarch64_sm3tt1aq4si): Ditto.
1593         (aarch64_sm3tt1bq4si): Ditto.
1594         (aarch64_sm3tt2aq4si): Ditto.
1595         (aarch64_sm3tt2bq4si): Ditto.
1596         (aarch64_sm3partw1qv4si): Ditto.
1597         (aarch64_sm3partw2qv4si): Ditto.
1598         (aarch64_sm4eqv4si): Ditto.
1599         (aarch64_sm4ekeyqv4si): Ditto.
1600         * config/aarch64/aarch64-simd.md:
1601         (aarch64_sm3ss1qv4si): Ditto.
1602         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1603         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1604         (aarch64_sm4eqv4si): Ditto.
1605         (aarch64_sm4ekeyqv4si): Ditto.
1606         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1607         (sm3part_op): Ditto.
1608         (CRYPTO_SM3TT): Ditto.
1609         (CRYPTO_SM3PART): Ditto.
1610         (UNSPEC_SM3SS1): New unspec.
1611         (UNSPEC_SM3TT1A): Ditto.
1612         (UNSPEC_SM3TT1B): Ditto.
1613         (UNSPEC_SM3TT2A): Ditto.
1614         (UNSPEC_SM3TT2B): Ditto.
1615         (UNSPEC_SM3PARTW1): Ditto.
1616         (UNSPEC_SM3PARTW2): Ditto.
1617         (UNSPEC_SM4E): Ditto.
1618         (UNSPEC_SM4EKEY): Ditto.
1619         * config/aarch64/constraints.md (Ui2): New constraint.
1620         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1621         * config/arm/types.md (crypto_sm3): New type attribute.
1622         (crypto_sm4): Ditto.
1623         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1624         (vsm3tt1aq_u32): Ditto.
1625         (vsm3tt1bq_u32): Ditto.
1626         (vsm3tt2aq_u32): Ditto.
1627         (vsm3tt2bq_u32): Ditto.
1628         (vsm3partw1q_u32): Ditto.
1629         (vsm3partw2q_u32): Ditto.
1630         (vsm4eq_u32): Ditto.
1631         (vsm4ekeyq_u32): Ditto.
1632         (doc/invoke.texi): Document new sm4 option.
1633
1634 2018-01-10  Michael Collison  <michael.collison@arm.com>
1635
1636         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1637         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1638         (AARCH64_FL_FOR_ARCH8_4): New.
1639         (AARCH64_FL_V8_4): New flag.
1640         (doc/invoke.texi): Document new armv8.4-a option.
1641
1642 2018-01-10  Michael Collison  <michael.collison@arm.com>
1643
1644         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1645         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1646         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1647         * config/aarch64/aarch64-option-extension.def: Add
1648         AARCH64_OPT_EXTENSION of 'sha2'.
1649         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1650         (crypto): Disable sha2 and aes if crypto disabled.
1651         (crypto): Enable aes and sha2 if enabled.
1652         (simd): Disable sha2 and aes if simd disabled.
1653         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
1654         New flags.
1655         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
1656         (TARGET_SHA2): New feature flag for sha2.
1657         (TARGET_AES): New feature flag for aes.
1658         * config/aarch64/aarch64-simd.md:
1659         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
1660         conditional on TARGET_AES.
1661         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
1662         (aarch64_crypto_sha1hsi): Make pattern conditional
1663         on TARGET_SHA2.
1664         (aarch64_crypto_sha1hv4si): Ditto.
1665         (aarch64_be_crypto_sha1hv4si): Ditto.
1666         (aarch64_crypto_sha1su1v4si): Ditto.
1667         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
1668         (aarch64_crypto_sha1su0v4si): Ditto.
1669         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
1670         (aarch64_crypto_sha256su0v4si): Ditto.
1671         (aarch64_crypto_sha256su1v4si): Ditto.
1672         (doc/invoke.texi): Document new aes and sha2 options.
1673
1674 2018-01-10  Martin Sebor  <msebor@redhat.com>
1675
1676         PR tree-optimization/83781
1677         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
1678         as string arrays.
1679
1680 2018-01-11  Martin Sebor  <msebor@gmail.com>
1681             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
1682
1683         PR tree-optimization/83501
1684         PR tree-optimization/81703
1685
1686         * tree-ssa-strlen.c (get_string_cst): Rename...
1687         (get_string_len): ...to this.  Handle global constants.
1688         (handle_char_store): Adjust.
1689
1690 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
1691             Jim Wilson  <jimw@sifive.com>
1692
1693         * config/riscv/riscv-protos.h (riscv_output_return): New.
1694         * config/riscv/riscv.c (struct machine_function): New naked_p field.
1695         (riscv_attribute_table, riscv_output_return),
1696         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
1697         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
1698         (riscv_compute_frame_info): Only compute frame->mask if not a naked
1699         function.
1700         (riscv_expand_prologue): Add early return for naked function.
1701         (riscv_expand_epilogue): Likewise.
1702         (riscv_function_ok_for_sibcall): Return false for naked function.
1703         (riscv_set_current_function): New.
1704         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
1705         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
1706         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
1707         * doc/extend.texi (RISC-V Function Attributes): New.
1708
1709 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
1710
1711         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
1712         check for 128-bit long double before checking TCmode.
1713         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
1714         128-bit long doubles before checking TFmode or TCmode.
1715         (FLOAT128_IBM_P): Likewise.
1716
1717 2018-01-10  Martin Sebor  <msebor@redhat.com>
1718
1719         PR tree-optimization/83671
1720         * builtins.c (c_strlen): Unconditionally return zero for the empty
1721         string.
1722         Use -Warray-bounds for warnings.
1723         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
1724         for non-constant array indices with COMPONENT_REF, arrays of
1725         arrays, and pointers to arrays.
1726         (gimple_fold_builtin_strlen): Determine and set length range for
1727         non-constant character arrays.
1728
1729 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
1730
1731         PR middle-end/81897
1732         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
1733         empty blocks.
1734
1735 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
1736
1737         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
1738
1739 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
1740
1741         PR target/83399
1742         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
1743         VECTOR_MEM_ALTIVEC_OR_VSX_P.
1744         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
1745         indexed_or_indirect_operand predicate.
1746         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
1747         (*vsx_le_perm_load_v8hi): Likewise.
1748         (*vsx_le_perm_load_v16qi): Likewise.
1749         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
1750         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
1751         (*vsx_le_perm_store_v8hi): Likewise.
1752         (*vsx_le_perm_store_v16qi): Likewise.
1753         (eight unnamed splitters): Likewise.
1754
1755 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
1756
1757         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
1758         * config/rs6000/emmintrin.h: Likewise.
1759         * config/rs6000/mmintrin.h: Likewise.
1760         * config/rs6000/xmmintrin.h: Likewise.
1761
1762 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
1763
1764         PR c++/43486
1765         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
1766         "public_flag".
1767         * tree.c (tree_nop_conversion): Return true for location wrapper
1768         nodes.
1769         (maybe_wrap_with_location): New function.
1770         (selftest::check_strip_nops): New function.
1771         (selftest::test_location_wrappers): New function.
1772         (selftest::tree_c_tests): Call it.
1773         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
1774         (maybe_wrap_with_location): New decl.
1775         (EXPR_LOCATION_WRAPPER_P): New macro.
1776         (location_wrapper_p): New inline function.
1777         (tree_strip_any_location_wrapper): New inline function.
1778
1779 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
1780
1781         PR target/83735
1782         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
1783         stack_realign_offset for the largest alignment of stack slot
1784         actually used.
1785         (ix86_find_max_used_stack_alignment): New function.
1786         (ix86_finalize_stack_frame_flags): Use it.  Set
1787         max_used_stack_alignment if we don't realign stack.
1788         * config/i386/i386.h (machine_function): Add
1789         max_used_stack_alignment.
1790
1791 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
1792
1793         * config/arm/arm.opt (-mbranch-cost): New option.
1794         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
1795         account.
1796
1797 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
1798
1799         PR target/83629
1800         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
1801         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
1802
1803 2018-01-10  Richard Biener  <rguenther@suse.de>
1804
1805         PR debug/83765
1806         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
1807         early out so it also covers the case where we have a non-NULL
1808         origin.
1809
1810 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
1811
1812         PR tree-optimization/83753
1813         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
1814         for non-strided grouped accesses if the number of elements is 1.
1815
1816 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
1817
1818         PR target/81616
1819         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
1820         * i386.h (TARGET_USE_GATHER): Define.
1821         * x86-tune.def (X86_TUNE_USE_GATHER): New.
1822
1823 2018-01-10  Martin Liska  <mliska@suse.cz>
1824
1825         PR bootstrap/82831
1826         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
1827         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
1828         partitioning.
1829         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
1830         CLEANUP_NO_PARTITIONING is not set.
1831
1832 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
1833
1834         * doc/rtl.texi: Remove documentation of (const ...) wrappers
1835         for vectors, as a partial revert of r254296.
1836         * rtl.h (const_vec_p): Delete.
1837         (const_vec_duplicate_p): Don't test for vector CONSTs.
1838         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
1839         * expmed.c (make_tree): Likewise.
1840
1841         Revert:
1842         * common.md (E, F): Use CONSTANT_P instead of checking for
1843         CONST_VECTOR.
1844         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
1845         checking for CONST_VECTOR.
1846
1847 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
1848
1849         PR middle-end/83575
1850         * predict.c (force_edge_cold): Handle in more sane way edges
1851         with no prediction.
1852
1853 2018-01-09  Carl Love  <cel@us.ibm.com>
1854
1855         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
1856         V4SI, V4SF types.
1857         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
1858         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
1859         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
1860         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
1861         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
1862         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
1863         * config/rs6000/rs6000-protos.h: Add extern defition for
1864         rs6000_generate_float2_double_code.
1865         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
1866         function.
1867         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
1868         (float2_v2df): Add define_expand.
1869
1870 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
1871
1872         PR target/83628
1873         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
1874         op_mode in the force_to_mode call.
1875
1876 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
1877
1878         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
1879         instead of checking each element individually.
1880         (aarch64_evpc_uzp): Likewise.
1881         (aarch64_evpc_zip): Likewise.
1882         (aarch64_evpc_ext): Likewise.
1883         (aarch64_evpc_rev): Likewise.
1884         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
1885         instead of checking each element individually.  Return true without
1886         generating rtl if
1887         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
1888         whether all selected elements come from the same input, instead of
1889         checking each element individually.  Remove calls to gen_rtx_REG,
1890         start_sequence and end_sequence and instead assert that no rtl is
1891         generated.
1892
1893 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
1894
1895         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
1896         order of HIGH and CONST checks.
1897
1898 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
1899
1900         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
1901         if the destination isn't an SSA_NAME.
1902
1903 2018-01-09  Richard Biener  <rguenther@suse.de>
1904
1905         PR tree-optimization/83668
1906         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
1907         move prologue...
1908         (canonicalize_loop_form): ... here, renamed from ...
1909         (canonicalize_loop_closed_ssa_form): ... this and amended to
1910         swap successor edges for loop exit blocks to make us use
1911         the RPO order we need for initial schedule generation.
1912
1913 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
1914
1915         PR tree-optimization/64811
1916         * match.pd: When optimizing comparisons with Inf, avoid
1917         introducing or losing exceptions from comparisons with NaN.
1918
1919 2018-01-09  Martin Liska  <mliska@suse.cz>
1920
1921         PR sanitizer/82517
1922         * asan.c (shadow_mem_size): Add gcc_assert.
1923
1924 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
1925
1926         Don't save registers in main().
1927
1928         PR target/83738
1929         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
1930         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
1931         * config/avr/avr.c (avr_set_current_function): Don't error if
1932         naked, OS_task or OS_main are specified at the same time.
1933         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
1934         OS_main.
1935         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
1936         attribute.
1937         * common/config/avr/avr-common.c (avr_option_optimization_table):
1938         Switch on -mmain-is-OS_task for optimizing compilations.
1939
1940 2018-01-09  Richard Biener  <rguenther@suse.de>
1941
1942         PR tree-optimization/83572
1943         * graphite.c: Include cfganal.h.
1944         (graphite_transform_loops): Connect infinite loops to exit
1945         and remove fake edges at the end.
1946
1947 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
1948
1949         * ipa-inline.c (edge_badness): Revert accidental checkin.
1950
1951 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
1952
1953         PR ipa/80763
1954         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
1955         symbols; not inline clones.
1956
1957 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
1958
1959         PR target/83507
1960         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
1961         hard registers.  Formatting fixes.
1962
1963         PR preprocessor/83722
1964         * gcc.c (try_generate_repro): Pass
1965         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
1966         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
1967         do_report_bug.
1968
1969 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
1970             Kito Cheng  <kito.cheng@gmail.com>
1971
1972         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
1973         (riscv_leaf_function_p): Delete.
1974         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
1975
1976 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
1977
1978         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
1979         function.
1980         (do_ifelse): New function.
1981         (do_isel): New function.
1982         (do_sub3): New function.
1983         (do_add3): New function.
1984         (do_load_mask_compare): New function.
1985         (do_overlap_load_compare): New function.
1986         (expand_compare_loop): New function.
1987         (expand_block_compare): Call expand_compare_loop() when appropriate.
1988         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
1989         option description.
1990         (-mblock-compare-inline-loop-limit): New option.
1991
1992 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1993
1994         PR target/83677
1995         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
1996         Reverse order of second and third operands in first alternative.
1997         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
1998         of first and second elements in UNSPEC_VPERMR vector.
1999         (altivec_expand_vec_perm_le): Likewise.
2000
2001 2017-01-08  Jeff Law  <law@redhat.com>
2002
2003         PR rtl-optimizatin/81308
2004         * tree-switch-conversion.c (cfg_altered): New file scoped static.
2005         (process_switch): If group_case_labels makes a change, then set
2006         cfg_altered.
2007         (pass_convert_switch::execute): If a switch is converted, then
2008         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
2009
2010         PR rtl-optimization/81308
2011         * recog.c (split_all_insns): Conditionally cleanup the CFG after
2012         splitting insns.
2013
2014 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
2015
2016         PR target/83663 - Revert r255946
2017         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2018         generation for cases where splatting a value is not useful.
2019         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2020         across a vec_duplicate and a paradoxical subreg forming a vector
2021         mode to a vec_concat.
2022
2023 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2024
2025         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2026         -march=armv8.3-a variants.
2027         * config/arm/t-multilib: Likewise.
2028         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
2029
2030 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
2031
2032         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2033         to generate rtl.
2034         (cceq_ior_compare_complement): Give it a name so I can use it, and
2035         change boolean_or_operator predicate to boolean_operator so it can
2036         be used to generate a crand.
2037         (eqne): New code iterator.
2038         (bd/bd_neg): New code_attrs.
2039         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2040         a single define_insn.
2041         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2042         decrement (bdnzt/bdnzf/bdzt/bdzf).
2043         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2044         with the new names of the branch decrement patterns, and added the
2045         names of the branch decrement conditional patterns.
2046
2047 2018-01-08  Richard Biener  <rguenther@suse.de>
2048
2049         PR tree-optimization/83563
2050         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2051         cache.
2052
2053 2018-01-08  Richard Biener  <rguenther@suse.de>
2054
2055         PR middle-end/83713
2056         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2057
2058 2018-01-08  Richard Biener  <rguenther@suse.de>
2059
2060         PR tree-optimization/83685
2061         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2062         references to abnormals.
2063
2064 2018-01-08  Richard Biener  <rguenther@suse.de>
2065
2066         PR lto/83719
2067         * dwarf2out.c (output_indirect_strings): Handle empty
2068         skeleton_debug_str_hash.
2069         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2070
2071 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
2072
2073         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2074         (emit_store_direct): Likewise.
2075         (arc_trampoline_adjust_address): Likewise.
2076         (arc_asm_trampoline_template): New function.
2077         (arc_initialize_trampoline): Use asm_trampoline_template.
2078         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2079         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2080         * config/arc/arc.md (flush_icache): Delete pattern.
2081
2082 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
2083
2084         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2085         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2086         munaligned-access.
2087
2088 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2089
2090         PR target/83681
2091         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2092         by not USED_FOR_TARGET.
2093         (make_pass_resolve_sw_modes): Likewise.
2094
2095 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2096
2097         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2098         USED_FOR_TARGET.
2099
2100 2018-01-08  Richard Biener  <rguenther@suse.de>
2101
2102         PR middle-end/83580
2103         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2104
2105 2018-01-08  Richard Biener  <rguenther@suse.de>
2106
2107         PR middle-end/83517
2108         * match.pd ((t * 2) / 2) -> t): Add missing :c.
2109
2110 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
2111
2112         PR middle-end/81897
2113         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2114         basic blocks with a small number of successors.
2115         (convert_control_dep_chain_into_preds): Improve handling of
2116         forwarder blocks.
2117         (dump_predicates): Split apart into...
2118         (dump_pred_chain): ...here...
2119         (dump_pred_info): ...and here.
2120         (can_one_predicate_be_invalidated_p): Add debugging printfs.
2121         (can_chain_union_be_invalidated_p): Improve check for invalidation
2122         of paths.
2123         (uninit_uses_cannot_happen): Avoid unnecessary if
2124         convert_control_dep_chain_into_preds yielded nothing.
2125
2126 2018-01-06  Martin Sebor  <msebor@redhat.com>
2127
2128         PR tree-optimization/83640
2129         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2130         subtracting negative offset from size.
2131         (builtin_access::overlap): Adjust offset bounds of the access to fall
2132         within the size of the object if possible.
2133
2134 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
2135
2136         PR rtl-optimization/83699
2137         * expmed.c (extract_bit_field_1): Restrict the vector usage of
2138         extract_bit_field_as_subreg to cases in which the extracted
2139         value is also a vector.
2140
2141         * lra-constraints.c (process_alt_operands): Test for the equivalence
2142         substitutions when detecting a possible reload cycle.
2143
2144 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
2145
2146         PR debug/83480
2147         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2148         by default if flag_selective_schedling{,2}.  Formatting fixes.
2149
2150         PR rtl-optimization/83682
2151         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2152         if it has non-VECTOR_MODE element mode.
2153         (vec_duplicate_p): Likewise.
2154
2155         PR middle-end/83694
2156         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2157         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2158
2159 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
2160
2161         PR target/83604
2162         * config/i386/i386-builtin.def
2163         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2164         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2165         Require also OPTION_MASK_ISA_AVX512F in addition to
2166         OPTION_MASK_ISA_GFNI.
2167         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2168         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2169         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2170         to OPTION_MASK_ISA_GFNI.
2171         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2172         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2173         OPTION_MASK_ISA_AVX512BW.
2174         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2175         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2176         addition to OPTION_MASK_ISA_GFNI.
2177         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2178         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2179         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2180         to OPTION_MASK_ISA_GFNI.
2181         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2182         a requirement for all ISAs rather than any of them with a few
2183         exceptions.
2184         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2185         processing.
2186         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2187         bitmasks to be enabled with 3 exceptions, instead of requiring any
2188         enabled ISA with lots of exceptions.
2189         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2190         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2191         Change avx512bw in isa attribute to avx512f.
2192         * config/i386/sgxintrin.h: Add license boilerplate.
2193         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
2194         to __AVX512F__ and __AVX512VL to __AVX512VL__.
2195         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2196         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2197         defined.
2198         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2199         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2200         temporarily sse2 rather than sse if not enabled already.
2201
2202         PR target/83604
2203         * config/i386/sse.md (VI248_VLBW): Rename to ...
2204         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
2205         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2206         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2207         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2208         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2209         mode iterator instead of VI248_VLBW.
2210
2211 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
2212
2213         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2214         (record_modified): Skip clobbers; add debug output.
2215         (param_change_prob): Use sreal frequencies.
2216
2217 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
2218
2219         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2220         punt for user-aligned variables.
2221
2222 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
2223
2224         * tree-chrec.c (chrec_contains_symbols): Return true for
2225         POLY_INT_CST.
2226
2227 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
2228
2229         PR target/82439
2230         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2231         of (x|y) == x for BICS pattern.
2232
2233 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
2234
2235         PR tree-optimization/83605
2236         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2237         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2238         can throw.
2239
2240 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2241
2242         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2243         * config/epiphany/rtems.h: New file.
2244
2245 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2246             Uros Bizjak  <ubizjak@gmail.com>
2247
2248         PR target/83554
2249         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2250         QIreg_operand instead of register_operand predicate.
2251         * config/i386/i386.c (ix86_rop_should_change_byte_p,
2252         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2253         comments instead of -fmitigate[-_]rop.
2254
2255 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
2256
2257         PR bootstrap/81926
2258         * cgraphunit.c (symbol_table::compile): Switch to text_section
2259         before calling assembly_start debug hook.
2260         * run-rtl-passes.c (run_rtl_passes): Likewise.
2261         Include output.h.
2262
2263 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2264
2265         * tree-vrp.c (extract_range_from_binary_expr_1): Check
2266         range_int_cst_p rather than !symbolic_range_p before calling
2267         extract_range_from_multiplicative_op_1.
2268
2269 2017-01-04  Jeff Law  <law@redhat.com>
2270
2271         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2272         redundant test in assertion.
2273
2274 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2275
2276         * doc/rtl.texi: Document machine_mode wrapper classes.
2277
2278 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2279
2280         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2281         using tree_to_uhwi.
2282
2283 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2284
2285         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2286         the VEC_PERM_EXPR fold to fail.
2287
2288 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2289
2290         PR debug/83585
2291         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2292         to switched_sections.
2293
2294 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2295
2296         PR target/83680
2297         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2298         test for d.testing.
2299
2300 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
2301
2302         PR target/83387
2303         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2304         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2305
2306 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2307
2308         PR debug/83666
2309         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2310         is BLKmode and bitpos not zero or mode change is needed.
2311
2312 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2313
2314         PR target/83675
2315         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2316         TARGET_VIS2.
2317
2318 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
2319
2320         PR target/83628
2321         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2322         instead of MULT rtx.  Update all corresponding splitters.
2323         (*saddl_se): Ditto.
2324         (*ssub<modesuffix>): Ditto.
2325         (*ssubl_se): Ditto.
2326         (*cmp_sadd_di): Update split patterns.
2327         (*cmp_sadd_si): Ditto.
2328         (*cmp_sadd_sidi): Ditto.
2329         (*cmp_ssub_di): Ditto.
2330         (*cmp_ssub_si): Ditto.
2331         (*cmp_ssub_sidi): Ditto.
2332         * config/alpha/predicates.md (const23_operand): New predicate.
2333         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2334         Look for ASHIFT, not MULT inner operand.
2335         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2336
2337 2018-01-04  Martin Liska  <mliska@suse.cz>
2338
2339         PR gcov-profile/83669
2340         * gcov.c (output_intermediate_file): Add version to intermediate
2341         gcov file.
2342         * doc/gcov.texi: Document new field 'version' in intermediate
2343         file format. Fix location of '-k' option of gcov command.
2344
2345 2018-01-04  Martin Liska  <mliska@suse.cz>
2346
2347         PR ipa/82352
2348         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2349
2350 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2351
2352         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2353
2354 2018-01-03  Martin Sebor  <msebor@redhat.com>
2355
2356         PR tree-optimization/83655
2357         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2358         checking calls with invalid arguments.
2359
2360 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2361
2362         * tree-vect-stmts.c (vect_get_store_rhs): New function.
2363         (vectorizable_mask_load_store): Delete.
2364         (vectorizable_call): Return false for masked loads and stores.
2365         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
2366         instead of gimple_assign_rhs1.
2367         (vectorizable_load): Handle IFN_MASK_LOAD.
2368         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2369
2370 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2371
2372         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2373         split out from..,
2374         (vectorizable_mask_load_store): ...here.
2375         (vectorizable_load): ...and here.
2376
2377 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2378
2379         * tree-vect-stmts.c (vect_build_all_ones_mask)
2380         (vect_build_zero_merge_argument): New functions, split out from...
2381         (vectorizable_load): ...here.
2382
2383 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2384
2385         * tree-vect-stmts.c (vect_check_store_rhs): New function,
2386         split out from...
2387         (vectorizable_mask_load_store): ...here.
2388         (vectorizable_store): ...and here.
2389
2390 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2391
2392         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2393         split out from...
2394         (vectorizable_mask_load_store): ...here.
2395
2396 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2397
2398         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2399         (vect_model_store_cost): Take a vec_load_store_type instead of a
2400         vect_def_type.
2401         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2402         (vect_model_store_cost): Take a vec_load_store_type instead of a
2403         vect_def_type.
2404         (vectorizable_mask_load_store): Update accordingly.
2405         (vectorizable_store): Likewise.
2406         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2407
2408 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2409
2410         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2411         IFN_MASK_LOAD calls here rather than...
2412         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2413
2414 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2415             Alan Hayward  <alan.hayward@arm.com>
2416             David Sherwood  <david.sherwood@arm.com>
2417
2418         * expmed.c (extract_bit_field_1): For vector extracts,
2419         fall back to extract_bit_field_as_subreg if vec_extract
2420         isn't available.
2421
2422 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2423             Alan Hayward  <alan.hayward@arm.com>
2424             David Sherwood  <david.sherwood@arm.com>
2425
2426         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2427         they are variable or constant sized.
2428         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2429         slots for constant-sized data.
2430
2431 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2432             Alan Hayward  <alan.hayward@arm.com>
2433             David Sherwood  <david.sherwood@arm.com>
2434
2435         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2436         handling COND_EXPRs with boolean comparisons, try to find a better
2437         basis for the mask type than the boolean itself.
2438
2439 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2440
2441         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2442         is calculated and how it can be overridden.
2443         * genmodes.c (max_bitsize_mode_any_mode): New variable.
2444         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2445         if defined.
2446         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2447         if nonzero.
2448
2449 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2450             Alan Hayward  <alan.hayward@arm.com>
2451             David Sherwood  <david.sherwood@arm.com>
2452
2453         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2454         Remove the mode argument.
2455         (aarch64_simd_valid_immediate): Remove the mode and inverse
2456         arguments.
2457         * config/aarch64/iterators.md (bitsize): New iterator.
2458         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2459         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2460         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2461         aarch64_simd_valid_immediate.
2462         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2463         (aarch64_reg_or_bic_imm): Likewise.
2464         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2465         with an insn_type enum and msl with a modifier_type enum.
2466         Replace element_width with a scalar_mode.  Change the shift
2467         to unsigned int.  Add constructors for scalar_float_mode and
2468         scalar_int_mode elements.
2469         (aarch64_vect_float_const_representable_p): Delete.
2470         (aarch64_can_const_movi_rtx_p)
2471         (aarch64_simd_scalar_immediate_valid_for_move)
2472         (aarch64_simd_make_constant): Update call to
2473         aarch64_simd_valid_immediate.
2474         (aarch64_advsimd_valid_immediate_hs): New function.
2475         (aarch64_advsimd_valid_immediate): Likewise.
2476         (aarch64_simd_valid_immediate): Remove mode and inverse
2477         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
2478         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2479         and aarch64_float_const_representable_p on the result.
2480         (aarch64_output_simd_mov_immediate): Remove mode argument.
2481         Update call to aarch64_simd_valid_immediate and use of
2482         simd_immediate_info.
2483         (aarch64_output_scalar_simd_mov_immediate): Update call
2484         accordingly.
2485
2486 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2487             Alan Hayward  <alan.hayward@arm.com>
2488             David Sherwood  <david.sherwood@arm.com>
2489
2490         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2491         (mode_nunits): Likewise CONST_MODE_NUNITS.
2492         * machmode.def (ADJUST_NUNITS): Document.
2493         * genmodes.c (mode_data::need_nunits_adj): New field.
2494         (blank_mode): Update accordingly.
2495         (adj_nunits): New variable.
2496         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2497         parameter.
2498         (emit_mode_size_inline): Set need_bytesize_adj for all modes
2499         listed in adj_nunits.
2500         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2501         listed in adj_nunits.  Don't emit case statements for such modes.
2502         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2503         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
2504         nothing if adj_nunits is nonnull.
2505         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2506         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2507         (emit_mode_fbit): Update use of print_maybe_const_decl.
2508         (emit_move_size): Likewise.  Treat the array as non-const
2509         if adj_nunits.
2510         (emit_mode_adjustments): Handle adj_nunits.
2511
2512 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2513
2514         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2515         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2516         (VECTOR_MODES): Use it.
2517         (make_vector_modes): Take the prefix as an argument.
2518
2519 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2520             Alan Hayward  <alan.hayward@arm.com>
2521             David Sherwood  <david.sherwood@arm.com>
2522
2523         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2524         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2525         for MODE_VECTOR_BOOL.
2526         * machmode.def (VECTOR_BOOL_MODE): Document.
2527         * genmodes.c (VECTOR_BOOL_MODE): New macro.
2528         (make_vector_bool_mode): New function.
2529         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2530         MODE_VECTOR_BOOL.
2531         * lto-streamer-in.c (lto_input_mode_table): Likewise.
2532         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2533         Likewise.
2534         * stor-layout.c (int_mode_for_mode): Likewise.
2535         * tree.c (build_vector_type_for_mode): Likewise.
2536         * varasm.c (output_constant_pool_2): Likewise.
2537         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2538         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
2539         for MODE_VECTOR_BOOL.
2540         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2541         of mode class checks.
2542         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2543         instead of a list of mode class checks.
2544         (expand_vector_scalar_condition): Likewise.
2545         (type_for_widest_vector_mode): Handle BImode as an inner mode.
2546
2547 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2548             Alan Hayward  <alan.hayward@arm.com>
2549             David Sherwood  <david.sherwood@arm.com>
2550
2551         * machmode.h (mode_size): Change from unsigned short to
2552         poly_uint16_pod.
2553         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2554         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2555         or if measurement_type is not polynomial.
2556         (fixed_size_mode::includes_p): Check for constant-sized modes.
2557         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2558         return a poly_uint16 rather than an unsigned short.
2559         (emit_mode_size): Change the type of mode_size from unsigned short
2560         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
2561         (emit_mode_adjustments): Cope with polynomial vector sizes.
2562         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2563         for GET_MODE_SIZE.
2564         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2565         for GET_MODE_SIZE.
2566         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2567         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2568         * caller-save.c (setup_save_areas): Likewise.
2569         (replace_reg_with_saved_mem): Likewise.
2570         * calls.c (emit_library_call_value_1): Likewise.
2571         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2572         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2573         (gen_lowpart_for_combine): Likewise.
2574         * convert.c (convert_to_integer_1): Likewise.
2575         * cse.c (equiv_constant, cse_insn): Likewise.
2576         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2577         (cselib_subst_to_values): Likewise.
2578         * dce.c (word_dce_process_block): Likewise.
2579         * df-problems.c (df_word_lr_mark_ref): Likewise.
2580         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2581         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2582         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2583         (rtl_for_decl_location): Likewise.
2584         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2585         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2586         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2587         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2588         (expand_expr_real_1): Likewise.
2589         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2590         (pad_below): Likewise.
2591         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2592         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2593         * ira.c (get_subreg_tracking_sizes): Likewise.
2594         * ira-build.c (ira_create_allocno_objects): Likewise.
2595         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2596         (ira_sort_regnos_for_alter_reg): Likewise.
2597         * ira-costs.c (record_operand_costs): Likewise.
2598         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2599         (resolve_simple_move): Likewise.
2600         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2601         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2602         (lra_constraints): Likewise.
2603         (CONST_POOL_OK_P): Reject variable-sized modes.
2604         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2605         (add_pseudo_to_slot, lra_spill): Likewise.
2606         * omp-low.c (omp_clause_aligned_alignment): Likewise.
2607         * optabs-query.c (get_best_extraction_insn): Likewise.
2608         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2609         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2610         (expand_mult_highpart, valid_multiword_target_p): Likewise.
2611         * recog.c (offsettable_address_addr_space_p): Likewise.
2612         * regcprop.c (maybe_mode_change): Likewise.
2613         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2614         * regrename.c (build_def_use): Likewise.
2615         * regstat.c (dump_reg_info): Likewise.
2616         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2617         (find_reloads, find_reloads_subreg_address): Likewise.
2618         * reload1.c (eliminate_regs_1): Likewise.
2619         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2620         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2621         (simplify_binary_operation_1, simplify_subreg): Likewise.
2622         * targhooks.c (default_function_arg_padding): Likewise.
2623         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2624         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2625         (verify_gimple_assign_ternary): Likewise.
2626         * tree-inline.c (estimate_move_cost): Likewise.
2627         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2628         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2629         (get_address_cost_ainc): Likewise.
2630         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2631         (vect_supportable_dr_alignment): Likewise.
2632         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2633         (vectorizable_reduction): Likewise.
2634         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2635         (vectorizable_operation, vectorizable_load): Likewise.
2636         * tree.c (build_same_sized_truth_vector_type): Likewise.
2637         * valtrack.c (cleanup_auto_inc_dec): Likewise.
2638         * var-tracking.c (emit_note_insn_var_location): Likewise.
2639         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2640         (ADDR_VEC_ALIGN): Likewise.
2641
2642 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2643             Alan Hayward  <alan.hayward@arm.com>
2644             David Sherwood  <david.sherwood@arm.com>
2645
2646         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2647         unsigned short.
2648         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2649         or if measurement_type is polynomial.
2650         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2651         * combine.c (make_extraction): Likewise.
2652         * dse.c (find_shift_sequence): Likewise.
2653         * dwarf2out.c (mem_loc_descriptor): Likewise.
2654         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
2655         (extract_bit_field, extract_low_bits): Likewise.
2656         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
2657         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
2658         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
2659         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
2660         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2661         * reload.c (find_reloads): Likewise.
2662         * reload1.c (alter_reg): Likewise.
2663         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
2664         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
2665         * tree-if-conv.c (predicate_mem_writes): Likewise.
2666         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
2667         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
2668         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
2669         * valtrack.c (dead_debug_insert_temp): Likewise.
2670         * varasm.c (mergeable_constant_section): Likewise.
2671         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
2672
2673 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2674             Alan Hayward  <alan.hayward@arm.com>
2675             David Sherwood  <david.sherwood@arm.com>
2676
2677         * expr.c (expand_assignment): Cope with polynomial mode sizes
2678         when assigning to a CONCAT.
2679
2680 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2681             Alan Hayward  <alan.hayward@arm.com>
2682             David Sherwood  <david.sherwood@arm.com>
2683
2684         * machmode.h (mode_precision): Change from unsigned short to
2685         poly_uint16_pod.
2686         (mode_to_precision): Return a poly_uint16 rather than an unsigned
2687         short.
2688         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
2689         or if measurement_type is not polynomial.
2690         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
2691         in which the mode is already known to be a scalar_int_mode.
2692         * genmodes.c (emit_mode_precision): Change the type of mode_precision
2693         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
2694         initializer.
2695         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2696         for GET_MODE_PRECISION.
2697         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2698         for GET_MODE_PRECISION.
2699         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
2700         as polynomial.
2701         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
2702         (expand_field_assignment, make_extraction): Likewise.
2703         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
2704         (get_last_value): Likewise.
2705         * convert.c (convert_to_integer_1): Likewise.
2706         * cse.c (cse_insn): Likewise.
2707         * expr.c (expand_expr_real_1): Likewise.
2708         * lra-constraints.c (simplify_operand_subreg): Likewise.
2709         * optabs-query.c (can_atomic_load_p): Likewise.
2710         * optabs.c (expand_atomic_load): Likewise.
2711         (expand_atomic_store): Likewise.
2712         * ree.c (combine_reaching_defs): Likewise.
2713         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
2714         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
2715         * tree.h (type_has_mode_precision_p): Likewise.
2716         * ubsan.c (instrument_si_overflow): Likewise.
2717
2718 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2719             Alan Hayward  <alan.hayward@arm.com>
2720             David Sherwood  <david.sherwood@arm.com>
2721
2722         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
2723         polynomial numbers of units.
2724         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
2725         (valid_vector_subparts_p): New function.
2726         (build_vector_type): Remove temporary shim and take the number
2727         of units as a poly_uint64 rather than an int.
2728         (build_opaque_vector_type): Take the number of units as a
2729         poly_uint64 rather than an int.
2730         * tree.c (build_vector_from_ctor): Handle polynomial
2731         TYPE_VECTOR_SUBPARTS.
2732         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
2733         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
2734         (build_vector_from_val): If the number of units is variable,
2735         use build_vec_duplicate_cst for constant operands and
2736         VEC_DUPLICATE_EXPR otherwise.
2737         (make_vector_type): Remove temporary is_constant ().
2738         (build_vector_type, build_opaque_vector_type): Take the number of
2739         units as a poly_uint64 rather than an int.
2740         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
2741         VECTOR_CST_NELTS.
2742         * cfgexpand.c (expand_debug_expr): Likewise.
2743         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
2744         (store_constructor, expand_expr_real_1): Likewise.
2745         (const_scalar_mask_from_tree): Likewise.
2746         * fold-const-call.c (fold_const_reduction): Likewise.
2747         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
2748         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
2749         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
2750         (fold_relational_const): Likewise.
2751         (native_interpret_vector): Likewise.  Change the size from an
2752         int to an unsigned int.
2753         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
2754         TYPE_VECTOR_SUBPARTS.
2755         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
2756         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
2757         duplicating a non-constant operand into a variable-length vector.
2758         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
2759         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
2760         * ipa-icf.c (sem_variable::equals): Likewise.
2761         * match.pd: Likewise.
2762         * omp-simd-clone.c (simd_clone_subparts): Likewise.
2763         * print-tree.c (print_node): Likewise.
2764         * stor-layout.c (layout_type): Likewise.
2765         * targhooks.c (default_builtin_vectorization_cost): Likewise.
2766         * tree-cfg.c (verify_gimple_comparison): Likewise.
2767         (verify_gimple_assign_binary): Likewise.
2768         (verify_gimple_assign_ternary): Likewise.
2769         (verify_gimple_assign_single): Likewise.
2770         * tree-pretty-print.c (dump_generic_node): Likewise.
2771         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2772         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
2773         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
2774         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
2775         (vect_shift_permute_load_chain): Likewise.
2776         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
2777         (expand_vector_condition, optimize_vector_constructor): Likewise.
2778         (lower_vec_perm, get_compute_type): Likewise.
2779         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2780         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
2781         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
2782         (vect_recog_mask_conversion_pattern): Likewise.
2783         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
2784         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
2785         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2786         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
2787         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
2788         (vectorizable_shift, vectorizable_operation, vectorizable_store)
2789         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
2790         (supportable_widening_operation): Likewise.
2791         (supportable_narrowing_operation): Likewise.
2792         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
2793         Likewise.
2794         * varasm.c (output_constant): Likewise.
2795
2796 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2797             Alan Hayward  <alan.hayward@arm.com>
2798             David Sherwood  <david.sherwood@arm.com>
2799
2800         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
2801         so that both the length == 3 and length != 3 cases set up their
2802         own permute vectors.  Add comments explaining why we know the
2803         number of elements is constant.
2804         (vect_permute_load_chain): Likewise.
2805
2806 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2807             Alan Hayward  <alan.hayward@arm.com>
2808             David Sherwood  <david.sherwood@arm.com>
2809
2810         * machmode.h (mode_nunits): Change from unsigned char to
2811         poly_uint16_pod.
2812         (ONLY_FIXED_SIZE_MODES): New macro.
2813         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
2814         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
2815         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
2816         New typedefs.
2817         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
2818         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
2819         or if measurement_type is not polynomial.
2820         * genmodes.c (ZERO_COEFFS): New macro.
2821         (emit_mode_nunits_inline): Make mode_nunits_inline return a
2822         poly_uint16.
2823         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
2824         Use ZERO_COEFFS when emitting initializers.
2825         * data-streamer.h (bp_pack_poly_value): New function.
2826         (bp_unpack_poly_value): Likewise.
2827         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2828         for GET_MODE_NUNITS.
2829         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2830         for GET_MODE_NUNITS.
2831         * tree.c (make_vector_type): Remove temporary shim and make
2832         the real function take the number of units as a poly_uint64
2833         rather than an int.
2834         (build_vector_type_for_mode): Handle polynomial nunits.
2835         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
2836         * emit-rtl.c (const_vec_series_p_1): Likewise.
2837         (gen_rtx_CONST_VECTOR): Likewise.
2838         * fold-const.c (test_vec_duplicate_folding): Likewise.
2839         * genrecog.c (validate_pattern): Likewise.
2840         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
2841         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2842         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
2843         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
2844         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
2845         * rtlanal.c (subreg_get_info): Likewise.
2846         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
2847         (vect_grouped_load_supported): Likewise.
2848         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
2849         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
2850         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
2851         (simplify_const_unary_operation, simplify_binary_operation_1)
2852         (simplify_const_binary_operation, simplify_ternary_operation)
2853         (test_vector_ops_duplicate, test_vector_ops): Likewise.
2854         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
2855         instead of CONST_VECTOR_NUNITS.
2856         * varasm.c (output_constant_pool_2): Likewise.
2857         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
2858         explicit-encoded elements in the XVEC for variable-length vectors.
2859
2860 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2861
2862         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
2863
2864 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2865             Alan Hayward  <alan.hayward@arm.com>
2866             David Sherwood  <david.sherwood@arm.com>
2867
2868         * coretypes.h (fixed_size_mode): Declare.
2869         (fixed_size_mode_pod): New typedef.
2870         * builtins.h (target_builtins::x_apply_args_mode)
2871         (target_builtins::x_apply_result_mode): Change type to
2872         fixed_size_mode_pod.
2873         * builtins.c (apply_args_size, apply_result_size, result_vector)
2874         (expand_builtin_apply_args_1, expand_builtin_apply)
2875         (expand_builtin_return): Update accordingly.
2876
2877 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2878
2879         * cse.c (hash_rtx_cb): Hash only the encoded elements.
2880         * cselib.c (cselib_hash_rtx): Likewise.
2881         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
2882         CONST_VECTOR encoding.
2883
2884 2017-01-03  Jakub Jelinek  <jakub@redhat.com>
2885             Jeff Law  <law@redhat.com>
2886
2887         PR target/83641
2888         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
2889         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
2890         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
2891         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
2892
2893         PR target/83641
2894         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
2895         explicitly probe *sp in a noreturn function if there were any callee
2896         register saves or frame pointer is needed.
2897
2898 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
2899
2900         PR debug/83621
2901         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
2902         BLKmode for ternary, binary or unary expressions.
2903
2904         PR debug/83645
2905         * var-tracking.c (delete_vta_debug_insn): New inline function.
2906         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
2907         insns from get_insns () to NULL instead of each bb separately.
2908         Use delete_vta_debug_insn.  No longer static.
2909         (vt_debug_insns_local, variable_tracking_main_1): Adjust
2910         delete_vta_debug_insns callers.
2911         * rtl.h (delete_vta_debug_insns): Declare.
2912         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
2913         instead of variable_tracking_main.
2914
2915 2018-01-03  Martin Sebor  <msebor@redhat.com>
2916
2917         PR tree-optimization/83603
2918         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
2919         arguments past the endof the argument list in functions declared
2920         without a prototype.
2921         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
2922         Avoid checking when arguments are null.
2923
2924 2018-01-03  Martin Sebor  <msebor@redhat.com>
2925
2926         PR c/83559
2927         * doc/extend.texi (attribute const): Fix a typo.
2928         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
2929         issuing -Wsuggest-attribute for void functions.
2930
2931 2018-01-03  Martin Sebor  <msebor@redhat.com>
2932
2933         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
2934         offset_int::from instead of wide_int::to_shwi.
2935         (maybe_diag_overlap): Remove assertion.
2936         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
2937         * gimple-ssa-sprintf.c (format_directive): Same.
2938         (parse_directive): Same.
2939         (sprintf_dom_walker::compute_format_length): Same.
2940         (try_substitute_return_value): Same.
2941
2942 2017-01-03  Jeff Law  <law@redhat.com>
2943
2944         PR middle-end/83654
2945         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
2946         non-constant residual for zero at runtime and avoid probing in
2947         that case.  Reorganize code for trailing problem to mirror handling
2948         of the residual.
2949
2950 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
2951
2952         PR tree-optimization/83501
2953         * tree-ssa-strlen.c (get_string_cst): New.
2954         (handle_char_store): Call get_string_cst.
2955
2956 2018-01-03  Martin Liska  <mliska@suse.cz>
2957
2958         PR tree-optimization/83593
2959         * tree-ssa-strlen.c: Include tree-cfg.h.
2960         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
2961         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
2962         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
2963         to false.
2964         (strlen_dom_walker::before_dom_children): Call
2965         gimple_purge_dead_eh_edges. Dump tranformation with details
2966         dump flags.
2967         (strlen_dom_walker::before_dom_children): Update call by adding
2968         new argument cleanup_eh.
2969         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
2970
2971 2018-01-03  Martin Liska  <mliska@suse.cz>
2972
2973         PR ipa/83549
2974         * cif-code.def (VARIADIC_THUNK): New enum value.
2975         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
2976         thunks.
2977
2978 2018-01-03  Jan Beulich  <jbeulich@suse.com>
2979
2980         * sse.md (mov<mode>_internal): Tighten condition for when to use
2981         vmovdqu<ssescalarsize> for TI and OI modes.
2982
2983 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
2984
2985         Update copyright years.
2986
2987 2018-01-03  Martin Liska  <mliska@suse.cz>
2988
2989         PR ipa/83594
2990         * ipa-visibility.c (function_and_variable_visibility): Skip
2991         functions with noipa attribure.
2992
2993 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
2994
2995         * gcc.c (process_command): Update copyright notice dates.
2996         * gcov-dump.c (print_version): Ditto.
2997         * gcov.c (print_version): Ditto.
2998         * gcov-tool.c (print_version): Ditto.
2999         * gengtype.c (create_file): Ditto.
3000         * doc/cpp.texi: Bump @copying's copyright year.
3001         * doc/cppinternals.texi: Ditto.
3002         * doc/gcc.texi: Ditto.
3003         * doc/gccint.texi: Ditto.
3004         * doc/gcov.texi: Ditto.
3005         * doc/install.texi: Ditto.
3006         * doc/invoke.texi: Ditto.
3007
3008 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3009
3010         * vector-builder.h (vector_builder::m_full_nelts): Change from
3011         unsigned int to poly_uint64.
3012         (vector_builder::full_nelts): Update prototype accordingly.
3013         (vector_builder::new_vector): Likewise.
3014         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3015         (vector_builder::operator ==): Likewise.
3016         (vector_builder::finalize): Likewise.
3017         * int-vector-builder.h (int_vector_builder::int_vector_builder):
3018         Take the number of elements as a poly_uint64 rather than an
3019         unsigned int.
3020         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3021         from unsigned int to poly_uint64.
3022         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3023         (vec_perm_indices::new_vector): Likewise.
3024         (vec_perm_indices::length): Likewise.
3025         (vec_perm_indices::nelts_per_input): Likewise.
3026         (vec_perm_indices::input_nelts): Likewise.
3027         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3028         number of elements per input as a poly_uint64 rather than an
3029         unsigned int.  Use the original encoding for variable-length
3030         vectors, rather than clamping each individual element.
3031         For the second and subsequent elements in each pattern,
3032         clamp the step and base before clamping their sum.
3033         (vec_perm_indices::series_p): Handle polynomial element counts.
3034         (vec_perm_indices::all_in_range_p): Likewise.
3035         (vec_perm_indices_to_tree): Likewise.
3036         (vec_perm_indices_to_rtx): Likewise.
3037         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3038         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3039         (tree_vector_builder::new_binary_operation): Handle polynomial
3040         element counts.  Return false if we need to know the number
3041         of elements at compile time.
3042         * fold-const.c (fold_vec_perm): Punt if the number of elements
3043         isn't known at compile time.
3044
3045 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3046
3047         * vec-perm-indices.h (vec_perm_builder): Change element type
3048         from HOST_WIDE_INT to poly_int64.
3049         (vec_perm_indices::element_type): Update accordingly.
3050         (vec_perm_indices::clamp): Handle polynomial element_types.
3051         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3052         (vec_perm_indices::all_in_range_p): Likewise.
3053         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3054         than shwi trees.
3055         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3056         polynomial vec_perm_indices element types.
3057         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3058         * fold-const.c (fold_vec_perm): Likewise.
3059         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3060         * tree-vect-generic.c (lower_vec_perm): Likewise.
3061         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3062         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3063         element type to HOST_WIDE_INT.
3064
3065 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3066             Alan Hayward  <alan.hayward@arm.com>
3067             David Sherwood  <david.sherwood@arm.com>
3068
3069         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3070         rather than an int.  Use plus_constant.
3071         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3072         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3073
3074 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3075             Alan Hayward  <alan.hayward@arm.com>
3076             David Sherwood  <david.sherwood@arm.com>
3077
3078         * calls.c (emit_call_1, expand_call): Change struct_value_size from
3079         a HOST_WIDE_INT to a poly_int64.
3080
3081 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3082             Alan Hayward  <alan.hayward@arm.com>
3083             David Sherwood  <david.sherwood@arm.com>
3084
3085         * calls.c (load_register_parameters): Cope with polynomial
3086         mode sizes.  Require a constant size for BLKmode parameters
3087         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
3088         forces a parameter to be padded at the lsb end in order to
3089         fill a complete number of words, require the parameter size
3090         to be ordered wrt UNITS_PER_WORD.
3091
3092 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3093             Alan Hayward  <alan.hayward@arm.com>
3094             David Sherwood  <david.sherwood@arm.com>
3095
3096         * reload1.c (spill_stack_slot_width): Change element type
3097         from unsigned int to poly_uint64_pod.
3098         (alter_reg): Treat mode sizes as polynomial.
3099
3100 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3101             Alan Hayward  <alan.hayward@arm.com>
3102             David Sherwood  <david.sherwood@arm.com>
3103
3104         * reload.c (complex_word_subreg_p): New function.
3105         (reload_inner_reg_of_subreg, push_reload): Use it.
3106
3107 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3108             Alan Hayward  <alan.hayward@arm.com>
3109             David Sherwood  <david.sherwood@arm.com>
3110
3111         * lra-constraints.c (process_alt_operands): Reject matched
3112         operands whose sizes aren't ordered.
3113         (match_reload): Refer to this check here.
3114
3115 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3116             Alan Hayward  <alan.hayward@arm.com>
3117             David Sherwood  <david.sherwood@arm.com>
3118
3119         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3120         that the mode size is in the set {1, 2, 4, 8, 16}.
3121
3122 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3123             Alan Hayward  <alan.hayward@arm.com>
3124             David Sherwood  <david.sherwood@arm.com>
3125
3126         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3127         Use plus_constant instead of gen_rtx_PLUS.
3128
3129 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3130             Alan Hayward  <alan.hayward@arm.com>
3131             David Sherwood  <david.sherwood@arm.com>
3132
3133         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3134         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3135         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3136         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3137         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3138         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3139         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3140         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3141         * config/i386/i386.c (ix86_push_rounding): ...this new function.
3142         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3143         a poly_int64.
3144         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3145         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3146         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3147         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3148         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3149         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3150         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3151         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3152         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3153         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3154         function.
3155         * expr.c (emit_move_resolve_push): Treat the input and result
3156         of PUSH_ROUNDING as a poly_int64.
3157         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3158         (emit_push_insn): Likewise.
3159         * lra-eliminations.c (mark_not_eliminable): Likewise.
3160         * recog.c (push_operand): Likewise.
3161         * reload1.c (elimination_effects): Likewise.
3162         * rtlanal.c (nonzero_bits1): Likewise.
3163         * calls.c (store_one_arg): Likewise.  Require the padding to be
3164         known at compile time.
3165
3166 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3167             Alan Hayward  <alan.hayward@arm.com>
3168             David Sherwood  <david.sherwood@arm.com>
3169
3170         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3171         Use plus_constant instead of gen_rtx_PLUS.
3172
3173 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3174             Alan Hayward  <alan.hayward@arm.com>
3175             David Sherwood  <david.sherwood@arm.com>
3176
3177         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3178         rather than an int.
3179
3180 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3181             Alan Hayward  <alan.hayward@arm.com>
3182             David Sherwood  <david.sherwood@arm.com>
3183
3184         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3185         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3186         via stack temporaries.  Treat the mode size as polynomial too.
3187
3188 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3189             Alan Hayward  <alan.hayward@arm.com>
3190             David Sherwood  <david.sherwood@arm.com>
3191
3192         * expr.c (expand_expr_real_2): When handling conversions involving
3193         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3194         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
3195         as a poly_uint64 too.
3196
3197 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3198             Alan Hayward  <alan.hayward@arm.com>
3199             David Sherwood  <david.sherwood@arm.com>
3200
3201         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3202
3203 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3204             Alan Hayward  <alan.hayward@arm.com>
3205             David Sherwood  <david.sherwood@arm.com>
3206
3207         * combine.c (can_change_dest_mode): Handle polynomial
3208         REGMODE_NATURAL_SIZE.
3209         * expmed.c (store_bit_field_1): Likewise.
3210         * expr.c (store_constructor): Likewise.
3211         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3212         and polynomial REGMODE_NATURAL_SIZE.
3213         (gen_lowpart_common): Likewise.
3214         * reginfo.c (record_subregs_of_mode): Likewise.
3215         * rtlanal.c (read_modify_subreg_p): Likewise.
3216
3217 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3218             Alan Hayward  <alan.hayward@arm.com>
3219             David Sherwood  <david.sherwood@arm.com>
3220
3221         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3222         numbers of elements.
3223
3224 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3225             Alan Hayward  <alan.hayward@arm.com>
3226             David Sherwood  <david.sherwood@arm.com>
3227
3228         * match.pd: Cope with polynomial numbers of vector elements.
3229
3230 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3231             Alan Hayward  <alan.hayward@arm.com>
3232             David Sherwood  <david.sherwood@arm.com>
3233
3234         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3235         in a POINTER_PLUS_EXPR.
3236
3237 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3238             Alan Hayward  <alan.hayward@arm.com>
3239             David Sherwood  <david.sherwood@arm.com>
3240
3241         * omp-simd-clone.c (simd_clone_subparts): New function.
3242         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3243         (ipa_simd_modify_function_body): Likewise.
3244
3245 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3246             Alan Hayward  <alan.hayward@arm.com>
3247             David Sherwood  <david.sherwood@arm.com>
3248
3249         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3250         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3251         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3252         (expand_vector_condition, vector_element): Likewise.
3253         (subparts_gt): New function.
3254         (get_compute_type): Use subparts_gt.
3255         (count_type_subparts): Delete.
3256         (expand_vector_operations_1): Use subparts_gt instead of
3257         count_type_subparts.
3258
3259 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3260             Alan Hayward  <alan.hayward@arm.com>
3261             David Sherwood  <david.sherwood@arm.com>
3262
3263         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3264         (vect_compile_time_alias): ...this new function.  Do the calculation
3265         on poly_ints rather than trees.
3266         (vect_prune_runtime_alias_test_list): Update call accordingly.
3267
3268 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3269             Alan Hayward  <alan.hayward@arm.com>
3270             David Sherwood  <david.sherwood@arm.com>
3271
3272         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3273         numbers of units.
3274         (vect_schedule_slp_instance): Likewise.
3275
3276 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3277             Alan Hayward  <alan.hayward@arm.com>
3278             David Sherwood  <david.sherwood@arm.com>
3279
3280         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3281         constant and extern definitions for variable-length vectors.
3282         (vect_get_constant_vectors): Note that the number of units
3283         is known to be constant.
3284
3285 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3286             Alan Hayward  <alan.hayward@arm.com>
3287             David Sherwood  <david.sherwood@arm.com>
3288
3289         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3290         of units as polynomial.  Choose between WIDE and NARROW based
3291         on multiple_p.
3292
3293 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3294             Alan Hayward  <alan.hayward@arm.com>
3295             David Sherwood  <david.sherwood@arm.com>
3296
3297         * tree-vect-stmts.c (simd_clone_subparts): New function.
3298         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3299
3300 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3301             Alan Hayward  <alan.hayward@arm.com>
3302             David Sherwood  <david.sherwood@arm.com>
3303
3304         * tree-vect-stmts.c (vectorizable_call): Treat the number of
3305         vectors as polynomial.  Use build_index_vector for
3306         IFN_GOMP_SIMD_LANE.
3307
3308 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3309             Alan Hayward  <alan.hayward@arm.com>
3310             David Sherwood  <david.sherwood@arm.com>
3311
3312         * tree-vect-stmts.c (get_load_store_type): Treat the number of
3313         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3314         for variable-length vectors.
3315         (vectorizable_mask_load_store): Treat the number of units as
3316         polynomial, asserting that it is constant if the condition has
3317         already been enforced.
3318         (vectorizable_store, vectorizable_load): Likewise.
3319
3320 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3321             Alan Hayward  <alan.hayward@arm.com>
3322             David Sherwood  <david.sherwood@arm.com>
3323
3324         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3325         of units as polynomial.  Punt if we can't tell at compile time
3326         which vector contains the final result.
3327
3328 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3329             Alan Hayward  <alan.hayward@arm.com>
3330             David Sherwood  <david.sherwood@arm.com>
3331
3332         * tree-vect-loop.c (vectorizable_induction): Treat the number
3333         of units as polynomial.  Punt on SLP inductions.  Use an integer
3334         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
3335         cast of such a series for variable-length floating-point
3336         reductions.
3337
3338 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3339             Alan Hayward  <alan.hayward@arm.com>
3340             David Sherwood  <david.sherwood@arm.com>
3341
3342         * tree.h (build_index_vector): Declare.
3343         * tree.c (build_index_vector): New function.
3344         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3345         of units as polynomial, forcibly converting it to a constant if
3346         vectorizable_reduction has already enforced the condition.
3347         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
3348         to create a {1,2,3,...} vector.
3349         (vectorizable_reduction): Treat the number of units as polynomial.
3350         Choose vectype_in based on the largest scalar element size rather
3351         than the smallest number of units.  Enforce the restrictions
3352         relied on above.
3353
3354 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3355             Alan Hayward  <alan.hayward@arm.com>
3356             David Sherwood  <david.sherwood@arm.com>
3357
3358         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3359         number of units as polynomial.
3360
3361 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3362             Alan Hayward  <alan.hayward@arm.com>
3363             David Sherwood  <david.sherwood@arm.com>
3364
3365         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3366         * target.def (autovectorize_vector_sizes): Return the vector sizes
3367         by pointer, using vector_sizes rather than a bitmask.
3368         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3369         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3370         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3371         Likewise.
3372         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3373         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3374         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3375         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3376         * omp-general.c (omp_max_vf): Likewise.
3377         * omp-low.c (omp_clause_aligned_alignment): Likewise.
3378         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3379         * tree-vect-loop.c (vect_analyze_loop): Likewise.
3380         * tree-vect-slp.c (vect_slp_bb): Likewise.
3381         * doc/tm.texi: Regenerate.
3382         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3383         to a poly_uint64.
3384         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3385         the vector size as a poly_uint64 rather than an unsigned int.
3386         (current_vector_size): Change from an unsigned int to a poly_uint64.
3387         (get_vectype_for_scalar_type): Update accordingly.
3388         * tree.h (build_truth_vector_type): Take the size and number of
3389         units as a poly_uint64 rather than an unsigned int.
3390         (build_vector_type): Add a temporary overload that takes
3391         the number of units as a poly_uint64 rather than an unsigned int.
3392         * tree.c (make_vector_type): Likewise.
3393         (build_truth_vector_type): Take the number of units as a poly_uint64
3394         rather than an unsigned int.
3395
3396 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3397             Alan Hayward  <alan.hayward@arm.com>
3398             David Sherwood  <david.sherwood@arm.com>
3399
3400         * target.def (get_mask_mode): Take the number of units and length
3401         as poly_uint64s rather than unsigned ints.
3402         * targhooks.h (default_get_mask_mode): Update accordingly.
3403         * targhooks.c (default_get_mask_mode): Likewise.
3404         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3405         * doc/tm.texi: Regenerate.
3406
3407 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3408             Alan Hayward  <alan.hayward@arm.com>
3409             David Sherwood  <david.sherwood@arm.com>
3410
3411         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3412         * omp-general.c (omp_max_vf): Likewise.
3413         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3414         (expand_omp_simd): Handle polynomial safelen.
3415         * omp-low.c (omplow_simd_context): Add a default constructor.
3416         (omplow_simd_context::max_vf): Change from int to poly_uint64.
3417         (lower_rec_simd_input_clauses): Update accordingly.
3418         (lower_rec_input_clauses): Likewise.
3419
3420 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3421             Alan Hayward  <alan.hayward@arm.com>
3422             David Sherwood  <david.sherwood@arm.com>
3423
3424         * tree-vectorizer.h (vect_nunits_for_cost): New function.
3425         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3426         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3427         (vect_analyze_slp_cost): Likewise.
3428         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3429         (vect_model_load_cost): Likewise.
3430
3431 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3432             Alan Hayward  <alan.hayward@arm.com>
3433             David Sherwood  <david.sherwood@arm.com>
3434
3435         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3436         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3437         from an unsigned int * to a poly_uint64_pod *.
3438         (calculate_unrolling_factor): New function.
3439         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
3440
3441 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3442             Alan Hayward  <alan.hayward@arm.com>
3443             David Sherwood  <david.sherwood@arm.com>
3444
3445         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3446         from an unsigned int to a poly_uint64.
3447         (_loop_vec_info::slp_unrolling_factor): Likewise.
3448         (_loop_vec_info::vectorization_factor): Change from an int
3449         to a poly_uint64.
3450         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3451         (vect_get_num_vectors): New function.
3452         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3453         (vect_get_num_copies): Use vect_get_num_vectors.
3454         (vect_analyze_data_ref_dependences): Change max_vf from an int *
3455         to an unsigned int *.
3456         (vect_analyze_data_refs): Change min_vf from an int * to a
3457         poly_uint64 *.
3458         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3459         than an unsigned HOST_WIDE_INT.
3460         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3461         (vect_analyze_data_ref_dependence): Change max_vf from an int *
3462         to an unsigned int *.
3463         (vect_analyze_data_ref_dependences): Likewise.
3464         (vect_compute_data_ref_alignment): Handle polynomial vf.
3465         (vect_enhance_data_refs_alignment): Likewise.
3466         (vect_prune_runtime_alias_test_list): Likewise.
3467         (vect_shift_permute_load_chain): Likewise.
3468         (vect_supportable_dr_alignment): Likewise.
3469         (dependence_distance_ge_vf): Take the vectorization factor as a
3470         poly_uint64 rather than an unsigned HOST_WIDE_INT.
3471         (vect_analyze_data_refs): Change min_vf from an int * to a
3472         poly_uint64 *.
3473         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3474         vfm1 as a poly_uint64 rather than an int.  Make the same change
3475         for the returned bound_scalar.
3476         (vect_gen_vector_loop_niters): Handle polynomial vf.
3477         (vect_do_peeling): Likewise.  Update call to
3478         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3479         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3480         be constant.
3481         * tree-vect-loop.c (vect_determine_vectorization_factor)
3482         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3483         (vect_get_known_peeling_cost): Likewise.
3484         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3485         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3486         (vect_transform_loop): Likewise.  Use the lowest possible VF when
3487         updating the upper bounds of the loop.
3488         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
3489         rather than an int.
3490         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3491         polynomial unroll factors.
3492         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3493         (vect_make_slp_decision): Likewise.
3494         (vect_supported_load_permutation_p): Likewise, and polynomial
3495         vf too.
3496         (vect_analyze_slp_cost): Handle polynomial vf.
3497         (vect_slp_analyze_node_operations): Likewise.
3498         (vect_slp_analyze_bb_1): Likewise.
3499         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3500         than an unsigned HOST_WIDE_INT.
3501         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3502         (vectorizable_load): Handle polynomial vf.
3503         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3504         a poly_uint64.
3505         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3506
3507 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3508             Alan Hayward  <alan.hayward@arm.com>
3509             David Sherwood  <david.sherwood@arm.com>
3510
3511         * match.pd: Handle bit operations involving three constants
3512         and try to fold one pair.
3513
3514 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3515
3516         * tree-vect-loop-manip.c: Include gimple-fold.h.
3517         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3518         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
3519         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3520         Add a path that uses a step of VF instead of 1, but disable it
3521         for now.
3522         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3523         and niters_no_overflow parameters.  Update calls to
3524         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3525         Create a new SSA name if the latter choses to use a ste other
3526         than zero, and return it via niters_vector_mult_vf_var.
3527         * tree-vect-loop.c (vect_transform_loop): Update calls to
3528         vect_do_peeling, vect_gen_vector_loop_niters and
3529         slpeel_make_loop_iterate_ntimes.
3530         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3531         (vect_gen_vector_loop_niters): Update declarations after above changes.
3532
3533 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
3534
3535         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3536         128-bit round to integer instructions.
3537         (ceil<mode>2): Likewise.
3538         (btrunc<mode>2): Likewise.
3539         (round<mode>2): Likewise.
3540
3541 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3542
3543         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3544         unaligned VSX load/store on P8/P9.
3545         (expand_block_clear): Allow the use of unaligned VSX
3546         load/store on P8/P9.
3547
3548 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3549
3550         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3551         New function.
3552         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3553         swap associated with both a load and a store.
3554
3555 2018-01-02  Andrew Waterman  <andrew@sifive.com>
3556
3557         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3558         * config/riscv/riscv.md (clear_cache): Use it.
3559
3560 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
3561
3562         * web.c: Remove out-of-date comment.
3563
3564 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3565
3566         * expr.c (fixup_args_size_notes): Check that any existing
3567         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3568         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3569         (emit_single_push_insn): ...here.
3570
3571 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3572
3573         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3574         (const_vector_encoded_nelts): New function.
3575         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3576         (const_vector_int_elt, const_vector_elt): Declare.
3577         * emit-rtl.c (const_vector_int_elt_1): New function.
3578         (const_vector_elt): Likewise.
3579         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3580         of CONST_VECTOR_ELT.
3581
3582 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3583
3584         * expr.c: Include rtx-vector-builder.h.
3585         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3586         directly on the tree encoding.
3587         (const_vector_from_tree): Likewise.
3588         * optabs.c: Include rtx-vector-builder.h.
3589         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3590         sequence of "u" values.
3591         * vec-perm-indices.c: Include rtx-vector-builder.h.
3592         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3593         directly on the vec_perm_indices encoding.
3594
3595 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3596
3597         * doc/rtl.texi (const_vector): Describe new encoding scheme.
3598         * Makefile.in (OBJS): Add rtx-vector-builder.o.
3599         * rtx-vector-builder.h: New file.
3600         * rtx-vector-builder.c: Likewise.
3601         * rtl.h (rtx_def::u2): Add a const_vector field.
3602         (CONST_VECTOR_NPATTERNS): New macro.
3603         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3604         (CONST_VECTOR_DUPLICATE_P): Likewise.
3605         (CONST_VECTOR_STEPPED_P): Likewise.
3606         (CONST_VECTOR_ENCODED_ELT): Likewise.
3607         (const_vec_duplicate_p): Check for a duplicated vector encoding.
3608         (unwrap_const_vec_duplicate): Likewise.
3609         (const_vec_series_p): Check for a non-duplicated vector encoding.
3610         Say that the function only returns true for integer vectors.
3611         * emit-rtl.c: Include rtx-vector-builder.h.
3612         (gen_const_vec_duplicate_1): Delete.
3613         (gen_const_vector): Call gen_const_vec_duplicate instead of
3614         gen_const_vec_duplicate_1.
3615         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3616         (gen_const_vec_duplicate): Use rtx_vector_builder.
3617         (gen_const_vec_series): Likewise.
3618         (gen_rtx_CONST_VECTOR): Likewise.
3619         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3620         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3621         Build a new vector rather than modifying a CONST_VECTOR in-place.
3622         (handle_special_swappables): Update call accordingly.
3623         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3624         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3625         Build a new vector rather than modifying a CONST_VECTOR in-place.
3626         (handle_special_swappables): Update call accordingly.
3627
3628 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3629
3630         * simplify-rtx.c (simplify_const_binary_operation): Use
3631         CONST_VECTOR_ELT instead of XVECEXP.
3632
3633 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3634
3635         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3636         the selector elements to be different from the data elements
3637         if the selector is a VECTOR_CST.
3638         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3639         ssizetype for the selector.
3640
3641 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3642
3643         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3644         before testing each element individually.
3645         * tree-vect-generic.c (lower_vec_perm): Likewise.
3646
3647 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3648
3649         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3650         * selftest-run-tests.c (selftest::run_tests): Call it.
3651         * vector-builder.h (vector_builder::operator ==): New function.
3652         (vector_builder::operator !=): Likewise.
3653         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3654         (vec_perm_indices::all_from_input_p): New function.
3655         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3656         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
3657         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
3658         instead of reading the VECTOR_CST directly.  Detect whether both
3659         vector inputs are the same before constructing the vec_perm_indices,
3660         and update the number of inputs argument accordingly.  Use the
3661         utility functions added above.  Only construct sel2 if we need to.
3662
3663 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3664
3665         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
3666         the broadcast of the low byte.
3667         (expand_mult_highpart): Use an explicit encoding for the permutes.
3668         * optabs-query.c (can_mult_highpart_p): Likewise.
3669         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
3670         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3671         (vectorizable_bswap): Likewise.
3672         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
3673         explicit encoding for the power-of-2 permutes.
3674         (vect_permute_store_chain): Likewise.
3675         (vect_grouped_load_supported): Likewise.
3676         (vect_permute_load_chain): Likewise.
3677
3678 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3679
3680         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
3681         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
3682         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
3683         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3684         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
3685         (vect_gen_perm_mask_any): Likewise.
3686
3687 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3688
3689         * int-vector-builder.h: New file.
3690         * vec-perm-indices.h: Include int-vector-builder.h.
3691         (vec_perm_indices): Redefine as an int_vector_builder.
3692         (auto_vec_perm_indices): Delete.
3693         (vec_perm_builder): Redefine as a stand-alone class.
3694         (vec_perm_indices::vec_perm_indices): New function.
3695         (vec_perm_indices::clamp): Likewise.
3696         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
3697         (vec_perm_indices::new_vector): New function.
3698         (vec_perm_indices::new_expanded_vector): Update for new
3699         vec_perm_indices class.
3700         (vec_perm_indices::rotate_inputs): New function.
3701         (vec_perm_indices::all_in_range_p): Operate directly on the
3702         encoded form, without computing elided elements.
3703         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
3704         encoding.  Update for new vec_perm_indices class.
3705         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
3706         the given vec_perm_builder.
3707         (expand_vec_perm_var): Update vec_perm_builder constructor.
3708         (expand_mult_highpart): Use vec_perm_builder instead of
3709         auto_vec_perm_indices.
3710         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
3711         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
3712         or double series encoding as appropriate.
3713         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
3714         vec_perm_indices instead of auto_vec_perm_indices.
3715         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3716         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3717         (vect_permute_store_chain): Likewise.
3718         (vect_grouped_load_supported): Likewise.
3719         (vect_permute_load_chain): Likewise.
3720         (vect_shift_permute_load_chain): Likewise.
3721         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3722         (vect_transform_slp_perm_load): Likewise.
3723         (vect_schedule_slp_instance): Likewise.
3724         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3725         (vectorizable_mask_load_store): Likewise.
3726         (vectorizable_bswap): Likewise.
3727         (vectorizable_store): Likewise.
3728         (vectorizable_load): Likewise.
3729         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
3730         vec_perm_indices instead of auto_vec_perm_indices.  Use
3731         tree_to_vec_perm_builder to read the vector from a tree.
3732         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
3733         vec_perm_builder instead of a vec_perm_indices.
3734         (have_whole_vector_shift): Use vec_perm_builder and
3735         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
3736         truncation to calc_vec_perm_mask_for_shift.
3737         (vect_create_epilog_for_reduction): Likewise.
3738         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
3739         from auto_vec_perm_indices to vec_perm_indices.
3740         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3741         instead of changing individual elements.
3742         (aarch64_vectorize_vec_perm_const): Use new_vector to install
3743         the vector in d.perm.
3744         * config/arm/arm.c (expand_vec_perm_d::perm): Change
3745         from auto_vec_perm_indices to vec_perm_indices.
3746         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3747         instead of changing individual elements.
3748         (arm_vectorize_vec_perm_const): Use new_vector to install
3749         the vector in d.perm.
3750         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
3751         Update vec_perm_builder constructor.
3752         (rs6000_expand_interleave): Likewise.
3753         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
3754         (rs6000_expand_interleave): Likewise.
3755
3756 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3757
3758         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
3759         to qimode could truncate the indices.
3760         * optabs.c (expand_vec_perm_var): Likewise.
3761
3762 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3763
3764         * Makefile.in (OBJS): Add vec-perm-indices.o.
3765         * vec-perm-indices.h: New file.
3766         * vec-perm-indices.c: Likewise.
3767         * target.h (vec_perm_indices): Replace with a forward class
3768         declaration.
3769         (auto_vec_perm_indices): Move to vec-perm-indices.h.
3770         * optabs.h: Include vec-perm-indices.h.
3771         (expand_vec_perm): Delete.
3772         (selector_fits_mode_p, expand_vec_perm_var): Declare.
3773         (expand_vec_perm_const): Declare.
3774         * target.def (vec_perm_const_ok): Replace with...
3775         (vec_perm_const): ...this new hook.
3776         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
3777         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
3778         * doc/tm.texi: Regenerate.
3779         * optabs.def (vec_perm_const): Delete.
3780         * doc/md.texi (vec_perm_const): Likewise.
3781         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
3782         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
3783         expand_vec_perm for constant permutation vectors.  Assert that
3784         the mode of variable permutation vectors is the integer equivalent
3785         of the mode that is being permuted.
3786         * optabs-query.h (selector_fits_mode_p): Declare.
3787         * optabs-query.c: Include vec-perm-indices.h.
3788         (selector_fits_mode_p): New function.
3789         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
3790         is defined, instead of checking whether the vec_perm_const_optab
3791         exists.  Use targetm.vectorize.vec_perm_const instead of
3792         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
3793         fit in the vector mode before using a variable permute.
3794         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
3795         vec_perm_indices instead of an rtx.
3796         (expand_vec_perm): Replace with...
3797         (expand_vec_perm_const): ...this new function.  Take the selector
3798         as a vec_perm_indices rather than an rtx.  Also take the mode of
3799         the selector.  Update call to shift_amt_for_vec_perm_mask.
3800         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
3801         Use vec_perm_indices::new_expanded_vector to expand the original
3802         selector into bytes.  Check whether the indices fit in the vector
3803         mode before using a variable permute.
3804         (expand_vec_perm_var): Make global.
3805         (expand_mult_highpart): Use expand_vec_perm_const.
3806         * fold-const.c: Includes vec-perm-indices.h.
3807         * tree-ssa-forwprop.c: Likewise.
3808         * tree-vect-data-refs.c: Likewise.
3809         * tree-vect-generic.c: Likewise.
3810         * tree-vect-loop.c: Likewise.
3811         * tree-vect-slp.c: Likewise.
3812         * tree-vect-stmts.c: Likewise.
3813         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
3814         Delete.
3815         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
3816         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
3817         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
3818         (aarch64_vectorize_vec_perm_const): ...this new function.
3819         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3820         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3821         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
3822         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
3823         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3824         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3825         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
3826         into...
3827         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
3828         check for NEON modes.
3829         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
3830         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
3831         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
3832         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
3833         into...
3834         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
3835         the old VEC_PERM_CONST conditions.
3836         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
3837         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
3838         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
3839         (ia64_vectorize_vec_perm_const_ok): Merge into...
3840         (ia64_vectorize_vec_perm_const): ...this new function.
3841         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
3842         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
3843         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
3844         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
3845         * config/mips/mips.c (mips_expand_vec_perm_const)
3846         (mips_vectorize_vec_perm_const_ok): Merge into...
3847         (mips_vectorize_vec_perm_const): ...this new function.
3848         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
3849         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
3850         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
3851         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
3852         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
3853         (rs6000_expand_vec_perm_const): Delete.
3854         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
3855         Delete.
3856         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3857         (altivec_expand_vec_perm_const_le): Take each operand individually.
3858         Operate on constant selectors rather than rtxes.
3859         (altivec_expand_vec_perm_const): Likewise.  Update call to
3860         altivec_expand_vec_perm_const_le.
3861         (rs6000_expand_vec_perm_const): Delete.
3862         (rs6000_vectorize_vec_perm_const_ok): Delete.
3863         (rs6000_vectorize_vec_perm_const): New function.
3864         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3865         an element count and rtx array.
3866         (rs6000_expand_extract_even): Update call accordingly.
3867         (rs6000_expand_interleave): Likewise.
3868         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
3869         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
3870         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
3871         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
3872         (rs6000_expand_vec_perm_const): Delete.
3873         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3874         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3875         (altivec_expand_vec_perm_const_le): Take each operand individually.
3876         Operate on constant selectors rather than rtxes.
3877         (altivec_expand_vec_perm_const): Likewise.  Update call to
3878         altivec_expand_vec_perm_const_le.
3879         (rs6000_expand_vec_perm_const): Delete.
3880         (rs6000_vectorize_vec_perm_const_ok): Delete.
3881         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
3882         reference to the SPE evmerge intructions.
3883         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3884         an element count and rtx array.
3885         (rs6000_expand_extract_even): Update call accordingly.
3886         (rs6000_expand_interleave): Likewise.
3887         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
3888         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
3889         new function.
3890         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3891
3892 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3893
3894         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
3895         vector mode and that that mode matches the mode of the data
3896         being permuted.
3897         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
3898         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
3899         directly using expand_vec_perm_1 when forcing selectors into
3900         registers.
3901         (expand_vec_perm_var): New function, split out from expand_vec_perm.
3902
3903 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3904
3905         * optabs-query.h (can_vec_perm_p): Delete.
3906         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
3907         * optabs-query.c (can_vec_perm_p): Split into...
3908         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
3909         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
3910         particular selector is valid.
3911         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3912         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3913         (vect_grouped_load_supported): Likewise.
3914         (vect_shift_permute_load_chain): Likewise.
3915         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3916         (vect_transform_slp_perm_load): Likewise.
3917         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3918         (vectorizable_bswap): Likewise.
3919         (vect_gen_perm_mask_checked): Likewise.
3920         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
3921         implementations of variable permutation vectors into account
3922         when deciding which selector to use.
3923         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
3924         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
3925         with a false third argument.
3926         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
3927         to test whether the constant selector is valid and can_vec_perm_var_p
3928         to test whether a variable selector is valid.
3929
3930 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3931
3932         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
3933         * optabs-query.c (can_vec_perm_p): Likewise.
3934         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
3935         instead of vec_perm_indices.
3936         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
3937         (vect_gen_perm_mask_checked): Likewise,
3938         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
3939         (vect_gen_perm_mask_checked): Likewise,
3940
3941 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3942
3943         * optabs-query.h (qimode_for_vec_perm): Declare.
3944         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
3945         (qimode_for_vec_perm): ...this new function.
3946         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
3947
3948 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3949
3950         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
3951         does not have a conditional at the top.
3952
3953 2018-01-02  Richard Biener  <rguenther@suse.de>
3954
3955         * ipa-inline.c (big_speedup_p): Fix expression.
3956
3957 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
3958
3959         PR target/81616
3960         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
3961         for generic 4->6.
3962
3963 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
3964
3965         PR target/81616
3966         Generic tuning.
3967         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
3968         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
3969         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
3970         cond_taken_branch_cost 3->4.
3971
3972 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
3973
3974         PR tree-optimization/83581
3975         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
3976         TODO_cleanup_cfg if any changes have been made.
3977
3978         PR middle-end/83608
3979         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
3980         convert_modes if target mode has the right side, but different mode
3981         class.
3982
3983         PR middle-end/83609
3984         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
3985         last argument when extracting from CONCAT.  If either from_real or
3986         from_imag is NULL, use expansion through memory.  If result is not
3987         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
3988         the parts directly to inner mode, if even that fails, use expansion
3989         through memory.
3990
3991         PR middle-end/83623
3992         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
3993         check for bswap in mode rather than HImode and use that in expand_unop
3994         too.
3995 \f
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3997
3998 Copying and distribution of this file, with or without modification,
3999 are permitted in any medium without royalty provided the copyright
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