fix pr/45972
[official-gcc.git] / gcc / resource.c
blob6a33ed0bf9dddadf42fc050a2ab7866909d198a4
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
3 2009, 2010 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "tm.h"
25 #include "diagnostic-core.h"
26 #include "toplev.h"
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "hard-reg-set.h"
30 #include "function.h"
31 #include "regs.h"
32 #include "flags.h"
33 #include "output.h"
34 #include "resource.h"
35 #include "except.h"
36 #include "insn-attr.h"
37 #include "params.h"
38 #include "df.h"
40 /* This structure is used to record liveness information at the targets or
41 fallthrough insns of branches. We will most likely need the information
42 at targets again, so save them in a hash table rather than recomputing them
43 each time. */
45 struct target_info
47 int uid; /* INSN_UID of target. */
48 struct target_info *next; /* Next info for same hash bucket. */
49 HARD_REG_SET live_regs; /* Registers live at target. */
50 int block; /* Basic block number containing target. */
51 int bb_tick; /* Generation count of basic block info. */
54 #define TARGET_HASH_PRIME 257
56 /* Indicates what resources are required at the beginning of the epilogue. */
57 static struct resources start_of_epilogue_needs;
59 /* Indicates what resources are required at function end. */
60 static struct resources end_of_function_needs;
62 /* Define the hash table itself. */
63 static struct target_info **target_hash_table = NULL;
65 /* For each basic block, we maintain a generation number of its basic
66 block info, which is updated each time we move an insn from the
67 target of a jump. This is the generation number indexed by block
68 number. */
70 static int *bb_ticks;
72 /* Marks registers possibly live at the current place being scanned by
73 mark_target_live_regs. Also used by update_live_status. */
75 static HARD_REG_SET current_live_regs;
77 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
78 Also only used by the next two functions. */
80 static HARD_REG_SET pending_dead_regs;
82 static void update_live_status (rtx, const_rtx, void *);
83 static int find_basic_block (rtx, int);
84 static rtx next_insn_no_annul (rtx);
85 static rtx find_dead_or_set_registers (rtx, struct resources*,
86 rtx*, int, struct resources,
87 struct resources);
89 /* Utility function called from mark_target_live_regs via note_stores.
90 It deadens any CLOBBERed registers and livens any SET registers. */
92 static void
93 update_live_status (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED)
95 int first_regno, last_regno;
96 int i;
98 if (!REG_P (dest)
99 && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest))))
100 return;
102 if (GET_CODE (dest) == SUBREG)
104 first_regno = subreg_regno (dest);
105 last_regno = first_regno + subreg_nregs (dest);
108 else
110 first_regno = REGNO (dest);
111 last_regno = END_HARD_REGNO (dest);
114 if (GET_CODE (x) == CLOBBER)
115 for (i = first_regno; i < last_regno; i++)
116 CLEAR_HARD_REG_BIT (current_live_regs, i);
117 else
118 for (i = first_regno; i < last_regno; i++)
120 SET_HARD_REG_BIT (current_live_regs, i);
121 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
125 /* Find the number of the basic block with correct live register
126 information that starts closest to INSN. Return -1 if we couldn't
127 find such a basic block or the beginning is more than
128 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
129 an unlimited search.
131 The delay slot filling code destroys the control-flow graph so,
132 instead of finding the basic block containing INSN, we search
133 backwards toward a BARRIER where the live register information is
134 correct. */
136 static int
137 find_basic_block (rtx insn, int search_limit)
139 /* Scan backwards to the previous BARRIER. Then see if we can find a
140 label that starts a basic block. Return the basic block number. */
141 for (insn = prev_nonnote_insn (insn);
142 insn && !BARRIER_P (insn) && search_limit != 0;
143 insn = prev_nonnote_insn (insn), --search_limit)
146 /* The closest BARRIER is too far away. */
147 if (search_limit == 0)
148 return -1;
150 /* The start of the function. */
151 else if (insn == 0)
152 return ENTRY_BLOCK_PTR->next_bb->index;
154 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
155 anything other than a CODE_LABEL or note, we can't find this code. */
156 for (insn = next_nonnote_insn (insn);
157 insn && LABEL_P (insn);
158 insn = next_nonnote_insn (insn))
159 if (BLOCK_FOR_INSN (insn))
160 return BLOCK_FOR_INSN (insn)->index;
162 return -1;
165 /* Similar to next_insn, but ignores insns in the delay slots of
166 an annulled branch. */
168 static rtx
169 next_insn_no_annul (rtx insn)
171 if (insn)
173 /* If INSN is an annulled branch, skip any insns from the target
174 of the branch. */
175 if (INSN_P (insn)
176 && INSN_ANNULLED_BRANCH_P (insn)
177 && NEXT_INSN (PREV_INSN (insn)) != insn)
179 rtx next = NEXT_INSN (insn);
180 enum rtx_code code = GET_CODE (next);
182 while ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
183 && INSN_FROM_TARGET_P (next))
185 insn = next;
186 next = NEXT_INSN (insn);
187 code = GET_CODE (next);
191 insn = NEXT_INSN (insn);
192 if (insn && NONJUMP_INSN_P (insn)
193 && GET_CODE (PATTERN (insn)) == SEQUENCE)
194 insn = XVECEXP (PATTERN (insn), 0, 0);
197 return insn;
200 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
201 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
202 is TRUE, resources used by the called routine will be included for
203 CALL_INSNs. */
205 void
206 mark_referenced_resources (rtx x, struct resources *res,
207 bool include_delayed_effects)
209 enum rtx_code code = GET_CODE (x);
210 int i, j;
211 unsigned int r;
212 const char *format_ptr;
214 /* Handle leaf items for which we set resource flags. Also, special-case
215 CALL, SET and CLOBBER operators. */
216 switch (code)
218 case CONST:
219 case CONST_INT:
220 case CONST_DOUBLE:
221 case CONST_FIXED:
222 case CONST_VECTOR:
223 case PC:
224 case SYMBOL_REF:
225 case LABEL_REF:
226 return;
228 case SUBREG:
229 if (!REG_P (SUBREG_REG (x)))
230 mark_referenced_resources (SUBREG_REG (x), res, false);
231 else
233 unsigned int regno = subreg_regno (x);
234 unsigned int last_regno = regno + subreg_nregs (x);
236 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
237 for (r = regno; r < last_regno; r++)
238 SET_HARD_REG_BIT (res->regs, r);
240 return;
242 case REG:
243 gcc_assert (HARD_REGISTER_P (x));
244 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
245 return;
247 case MEM:
248 /* If this memory shouldn't change, it really isn't referencing
249 memory. */
250 if (MEM_READONLY_P (x))
251 res->unch_memory = 1;
252 else
253 res->memory = 1;
254 res->volatil |= MEM_VOLATILE_P (x);
256 /* Mark registers used to access memory. */
257 mark_referenced_resources (XEXP (x, 0), res, false);
258 return;
260 case CC0:
261 res->cc = 1;
262 return;
264 case UNSPEC_VOLATILE:
265 case TRAP_IF:
266 case ASM_INPUT:
267 /* Traditional asm's are always volatile. */
268 res->volatil = 1;
269 break;
271 case ASM_OPERANDS:
272 res->volatil |= MEM_VOLATILE_P (x);
274 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
275 We can not just fall through here since then we would be confused
276 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
277 traditional asms unlike their normal usage. */
279 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
280 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, false);
281 return;
283 case CALL:
284 /* The first operand will be a (MEM (xxx)) but doesn't really reference
285 memory. The second operand may be referenced, though. */
286 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, false);
287 mark_referenced_resources (XEXP (x, 1), res, false);
288 return;
290 case SET:
291 /* Usually, the first operand of SET is set, not referenced. But
292 registers used to access memory are referenced. SET_DEST is
293 also referenced if it is a ZERO_EXTRACT. */
295 mark_referenced_resources (SET_SRC (x), res, false);
297 x = SET_DEST (x);
298 if (GET_CODE (x) == ZERO_EXTRACT
299 || GET_CODE (x) == STRICT_LOW_PART)
300 mark_referenced_resources (x, res, false);
301 else if (GET_CODE (x) == SUBREG)
302 x = SUBREG_REG (x);
303 if (MEM_P (x))
304 mark_referenced_resources (XEXP (x, 0), res, false);
305 return;
307 case CLOBBER:
308 return;
310 case CALL_INSN:
311 if (include_delayed_effects)
313 /* A CALL references memory, the frame pointer if it exists, the
314 stack pointer, any global registers and any registers given in
315 USE insns immediately in front of the CALL.
317 However, we may have moved some of the parameter loading insns
318 into the delay slot of this CALL. If so, the USE's for them
319 don't count and should be skipped. */
320 rtx insn = PREV_INSN (x);
321 rtx sequence = 0;
322 int seq_size = 0;
323 int i;
325 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
326 if (NEXT_INSN (insn) != x)
328 sequence = PATTERN (NEXT_INSN (insn));
329 seq_size = XVECLEN (sequence, 0);
330 gcc_assert (GET_CODE (sequence) == SEQUENCE);
333 res->memory = 1;
334 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
335 if (frame_pointer_needed)
337 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
338 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
339 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
340 #endif
343 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
344 if (global_regs[i])
345 SET_HARD_REG_BIT (res->regs, i);
347 /* Check for a REG_SETJMP. If it exists, then we must
348 assume that this call can need any register.
350 This is done to be more conservative about how we handle setjmp.
351 We assume that they both use and set all registers. Using all
352 registers ensures that a register will not be considered dead
353 just because it crosses a setjmp call. A register should be
354 considered dead only if the setjmp call returns nonzero. */
355 if (find_reg_note (x, REG_SETJMP, NULL))
356 SET_HARD_REG_SET (res->regs);
359 rtx link;
361 for (link = CALL_INSN_FUNCTION_USAGE (x);
362 link;
363 link = XEXP (link, 1))
364 if (GET_CODE (XEXP (link, 0)) == USE)
366 for (i = 1; i < seq_size; i++)
368 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
369 if (GET_CODE (slot_pat) == SET
370 && rtx_equal_p (SET_DEST (slot_pat),
371 XEXP (XEXP (link, 0), 0)))
372 break;
374 if (i >= seq_size)
375 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
376 res, false);
381 /* ... fall through to other INSN processing ... */
383 case INSN:
384 case JUMP_INSN:
386 #ifdef INSN_REFERENCES_ARE_DELAYED
387 if (! include_delayed_effects
388 && INSN_REFERENCES_ARE_DELAYED (x))
389 return;
390 #endif
392 /* No special processing, just speed up. */
393 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
394 return;
396 default:
397 break;
400 /* Process each sub-expression and flag what it needs. */
401 format_ptr = GET_RTX_FORMAT (code);
402 for (i = 0; i < GET_RTX_LENGTH (code); i++)
403 switch (*format_ptr++)
405 case 'e':
406 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
407 break;
409 case 'E':
410 for (j = 0; j < XVECLEN (x, i); j++)
411 mark_referenced_resources (XVECEXP (x, i, j), res,
412 include_delayed_effects);
413 break;
417 /* A subroutine of mark_target_live_regs. Search forward from TARGET
418 looking for registers that are set before they are used. These are dead.
419 Stop after passing a few conditional jumps, and/or a small
420 number of unconditional branches. */
422 static rtx
423 find_dead_or_set_registers (rtx target, struct resources *res,
424 rtx *jump_target, int jump_count,
425 struct resources set, struct resources needed)
427 HARD_REG_SET scratch;
428 rtx insn, next;
429 rtx jump_insn = 0;
430 int i;
432 for (insn = target; insn; insn = next)
434 rtx this_jump_insn = insn;
436 next = NEXT_INSN (insn);
438 /* If this instruction can throw an exception, then we don't
439 know where we might end up next. That means that we have to
440 assume that whatever we have already marked as live really is
441 live. */
442 if (can_throw_internal (insn))
443 break;
445 switch (GET_CODE (insn))
447 case CODE_LABEL:
448 /* After a label, any pending dead registers that weren't yet
449 used can be made dead. */
450 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
451 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
452 CLEAR_HARD_REG_SET (pending_dead_regs);
454 continue;
456 case BARRIER:
457 case NOTE:
458 continue;
460 case INSN:
461 if (GET_CODE (PATTERN (insn)) == USE)
463 /* If INSN is a USE made by update_block, we care about the
464 underlying insn. Any registers set by the underlying insn
465 are live since the insn is being done somewhere else. */
466 if (INSN_P (XEXP (PATTERN (insn), 0)))
467 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
468 MARK_SRC_DEST_CALL);
470 /* All other USE insns are to be ignored. */
471 continue;
473 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
474 continue;
475 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
477 /* An unconditional jump can be used to fill the delay slot
478 of a call, so search for a JUMP_INSN in any position. */
479 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
481 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
482 if (JUMP_P (this_jump_insn))
483 break;
487 default:
488 break;
491 if (JUMP_P (this_jump_insn))
493 if (jump_count++ < 10)
495 if (any_uncondjump_p (this_jump_insn)
496 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
498 next = JUMP_LABEL (this_jump_insn);
499 if (jump_insn == 0)
501 jump_insn = insn;
502 if (jump_target)
503 *jump_target = JUMP_LABEL (this_jump_insn);
506 else if (any_condjump_p (this_jump_insn))
508 struct resources target_set, target_res;
509 struct resources fallthrough_res;
511 /* We can handle conditional branches here by following
512 both paths, and then IOR the results of the two paths
513 together, which will give us registers that are dead
514 on both paths. Since this is expensive, we give it
515 a much higher cost than unconditional branches. The
516 cost was chosen so that we will follow at most 1
517 conditional branch. */
519 jump_count += 4;
520 if (jump_count >= 10)
521 break;
523 mark_referenced_resources (insn, &needed, true);
525 /* For an annulled branch, mark_set_resources ignores slots
526 filled by instructions from the target. This is correct
527 if the branch is not taken. Since we are following both
528 paths from the branch, we must also compute correct info
529 if the branch is taken. We do this by inverting all of
530 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
531 and then inverting the INSN_FROM_TARGET_P bits again. */
533 if (GET_CODE (PATTERN (insn)) == SEQUENCE
534 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
536 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
537 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
538 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
540 target_set = set;
541 mark_set_resources (insn, &target_set, 0,
542 MARK_SRC_DEST_CALL);
544 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
545 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
546 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
548 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
550 else
552 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
553 target_set = set;
556 target_res = *res;
557 COPY_HARD_REG_SET (scratch, target_set.regs);
558 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
559 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
561 fallthrough_res = *res;
562 COPY_HARD_REG_SET (scratch, set.regs);
563 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
564 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
566 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
567 &target_res, 0, jump_count,
568 target_set, needed);
569 find_dead_or_set_registers (next,
570 &fallthrough_res, 0, jump_count,
571 set, needed);
572 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
573 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
574 break;
576 else
577 break;
579 else
581 /* Don't try this optimization if we expired our jump count
582 above, since that would mean there may be an infinite loop
583 in the function being compiled. */
584 jump_insn = 0;
585 break;
589 mark_referenced_resources (insn, &needed, true);
590 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
592 COPY_HARD_REG_SET (scratch, set.regs);
593 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
594 AND_COMPL_HARD_REG_SET (res->regs, scratch);
597 return jump_insn;
600 /* Given X, a part of an insn, and a pointer to a `struct resource',
601 RES, indicate which resources are modified by the insn. If
602 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
603 set by the called routine.
605 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
606 objects are being referenced instead of set.
608 We never mark the insn as modifying the condition code unless it explicitly
609 SETs CC0 even though this is not totally correct. The reason for this is
610 that we require a SET of CC0 to immediately precede the reference to CC0.
611 So if some other insn sets CC0 as a side-effect, we know it cannot affect
612 our computation and thus may be placed in a delay slot. */
614 void
615 mark_set_resources (rtx x, struct resources *res, int in_dest,
616 enum mark_resource_type mark_type)
618 enum rtx_code code;
619 int i, j;
620 unsigned int r;
621 const char *format_ptr;
623 restart:
625 code = GET_CODE (x);
627 switch (code)
629 case NOTE:
630 case BARRIER:
631 case CODE_LABEL:
632 case USE:
633 case CONST_INT:
634 case CONST_DOUBLE:
635 case CONST_FIXED:
636 case CONST_VECTOR:
637 case LABEL_REF:
638 case SYMBOL_REF:
639 case CONST:
640 case PC:
641 /* These don't set any resources. */
642 return;
644 case CC0:
645 if (in_dest)
646 res->cc = 1;
647 return;
649 case CALL_INSN:
650 /* Called routine modifies the condition code, memory, any registers
651 that aren't saved across calls, global registers and anything
652 explicitly CLOBBERed immediately after the CALL_INSN. */
654 if (mark_type == MARK_SRC_DEST_CALL)
656 rtx link;
658 res->cc = res->memory = 1;
660 IOR_HARD_REG_SET (res->regs, regs_invalidated_by_call);
662 for (link = CALL_INSN_FUNCTION_USAGE (x);
663 link; link = XEXP (link, 1))
664 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
665 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
666 MARK_SRC_DEST);
668 /* Check for a REG_SETJMP. If it exists, then we must
669 assume that this call can clobber any register. */
670 if (find_reg_note (x, REG_SETJMP, NULL))
671 SET_HARD_REG_SET (res->regs);
674 /* ... and also what its RTL says it modifies, if anything. */
676 case JUMP_INSN:
677 case INSN:
679 /* An insn consisting of just a CLOBBER (or USE) is just for flow
680 and doesn't actually do anything, so we ignore it. */
682 #ifdef INSN_SETS_ARE_DELAYED
683 if (mark_type != MARK_SRC_DEST_CALL
684 && INSN_SETS_ARE_DELAYED (x))
685 return;
686 #endif
688 x = PATTERN (x);
689 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
690 goto restart;
691 return;
693 case SET:
694 /* If the source of a SET is a CALL, this is actually done by
695 the called routine. So only include it if we are to include the
696 effects of the calling routine. */
698 mark_set_resources (SET_DEST (x), res,
699 (mark_type == MARK_SRC_DEST_CALL
700 || GET_CODE (SET_SRC (x)) != CALL),
701 mark_type);
703 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
704 return;
706 case CLOBBER:
707 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
708 return;
710 case SEQUENCE:
711 for (i = 0; i < XVECLEN (x, 0); i++)
712 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
713 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
714 mark_set_resources (XVECEXP (x, 0, i), res, 0, mark_type);
715 return;
717 case POST_INC:
718 case PRE_INC:
719 case POST_DEC:
720 case PRE_DEC:
721 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
722 return;
724 case PRE_MODIFY:
725 case POST_MODIFY:
726 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
727 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
728 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
729 return;
731 case SIGN_EXTRACT:
732 case ZERO_EXTRACT:
733 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
734 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
735 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
736 return;
738 case MEM:
739 if (in_dest)
741 res->memory = 1;
742 res->unch_memory |= MEM_READONLY_P (x);
743 res->volatil |= MEM_VOLATILE_P (x);
746 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
747 return;
749 case SUBREG:
750 if (in_dest)
752 if (!REG_P (SUBREG_REG (x)))
753 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
754 else
756 unsigned int regno = subreg_regno (x);
757 unsigned int last_regno = regno + subreg_nregs (x);
759 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
760 for (r = regno; r < last_regno; r++)
761 SET_HARD_REG_BIT (res->regs, r);
764 return;
766 case REG:
767 if (in_dest)
769 gcc_assert (HARD_REGISTER_P (x));
770 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
772 return;
774 case UNSPEC_VOLATILE:
775 case ASM_INPUT:
776 /* Traditional asm's are always volatile. */
777 res->volatil = 1;
778 return;
780 case TRAP_IF:
781 res->volatil = 1;
782 break;
784 case ASM_OPERANDS:
785 res->volatil |= MEM_VOLATILE_P (x);
787 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
788 We can not just fall through here since then we would be confused
789 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
790 traditional asms unlike their normal usage. */
792 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
793 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
794 MARK_SRC_DEST);
795 return;
797 default:
798 break;
801 /* Process each sub-expression and flag what it needs. */
802 format_ptr = GET_RTX_FORMAT (code);
803 for (i = 0; i < GET_RTX_LENGTH (code); i++)
804 switch (*format_ptr++)
806 case 'e':
807 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
808 break;
810 case 'E':
811 for (j = 0; j < XVECLEN (x, i); j++)
812 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
813 break;
817 /* Return TRUE if INSN is a return, possibly with a filled delay slot. */
819 static bool
820 return_insn_p (const_rtx insn)
822 if (JUMP_P (insn) && GET_CODE (PATTERN (insn)) == RETURN)
823 return true;
825 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
826 return return_insn_p (XVECEXP (PATTERN (insn), 0, 0));
828 return false;
831 /* Set the resources that are live at TARGET.
833 If TARGET is zero, we refer to the end of the current function and can
834 return our precomputed value.
836 Otherwise, we try to find out what is live by consulting the basic block
837 information. This is tricky, because we must consider the actions of
838 reload and jump optimization, which occur after the basic block information
839 has been computed.
841 Accordingly, we proceed as follows::
843 We find the previous BARRIER and look at all immediately following labels
844 (with no intervening active insns) to see if any of them start a basic
845 block. If we hit the start of the function first, we use block 0.
847 Once we have found a basic block and a corresponding first insn, we can
848 accurately compute the live status (by starting at a label following a
849 BARRIER, we are immune to actions taken by reload and jump.) Then we
850 scan all insns between that point and our target. For each CLOBBER (or
851 for call-clobbered regs when we pass a CALL_INSN), mark the appropriate
852 registers are dead. For a SET, mark them as live.
854 We have to be careful when using REG_DEAD notes because they are not
855 updated by such things as find_equiv_reg. So keep track of registers
856 marked as dead that haven't been assigned to, and mark them dead at the
857 next CODE_LABEL since reload and jump won't propagate values across labels.
859 If we cannot find the start of a basic block (should be a very rare
860 case, if it can happen at all), mark everything as potentially live.
862 Next, scan forward from TARGET looking for things set or clobbered
863 before they are used. These are not live.
865 Because we can be called many times on the same target, save our results
866 in a hash table indexed by INSN_UID. This is only done if the function
867 init_resource_info () was invoked before we are called. */
869 void
870 mark_target_live_regs (rtx insns, rtx target, struct resources *res)
872 int b = -1;
873 unsigned int i;
874 struct target_info *tinfo = NULL;
875 rtx insn;
876 rtx jump_insn = 0;
877 rtx jump_target;
878 HARD_REG_SET scratch;
879 struct resources set, needed;
881 /* Handle end of function. */
882 if (target == 0)
884 *res = end_of_function_needs;
885 return;
888 /* Handle return insn. */
889 else if (return_insn_p (target))
891 *res = end_of_function_needs;
892 mark_referenced_resources (target, res, false);
893 return;
896 /* We have to assume memory is needed, but the CC isn't. */
897 res->memory = 1;
898 res->volatil = res->unch_memory = 0;
899 res->cc = 0;
901 /* See if we have computed this value already. */
902 if (target_hash_table != NULL)
904 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
905 tinfo; tinfo = tinfo->next)
906 if (tinfo->uid == INSN_UID (target))
907 break;
909 /* Start by getting the basic block number. If we have saved
910 information, we can get it from there unless the insn at the
911 start of the basic block has been deleted. */
912 if (tinfo && tinfo->block != -1
913 && ! INSN_DELETED_P (BB_HEAD (BASIC_BLOCK (tinfo->block))))
914 b = tinfo->block;
917 if (b == -1)
918 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH);
920 if (target_hash_table != NULL)
922 if (tinfo)
924 /* If the information is up-to-date, use it. Otherwise, we will
925 update it below. */
926 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
928 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
929 return;
932 else
934 /* Allocate a place to put our results and chain it into the
935 hash table. */
936 tinfo = XNEW (struct target_info);
937 tinfo->uid = INSN_UID (target);
938 tinfo->block = b;
939 tinfo->next
940 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
941 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
945 CLEAR_HARD_REG_SET (pending_dead_regs);
947 /* If we found a basic block, get the live registers from it and update
948 them with anything set or killed between its start and the insn before
949 TARGET; this custom life analysis is really about registers so we need
950 to use the LR problem. Otherwise, we must assume everything is live. */
951 if (b != -1)
953 regset regs_live = DF_LR_IN (BASIC_BLOCK (b));
954 rtx start_insn, stop_insn;
956 /* Compute hard regs live at start of block. */
957 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
959 /* Get starting and ending insn, handling the case where each might
960 be a SEQUENCE. */
961 start_insn = (b == ENTRY_BLOCK_PTR->next_bb->index ?
962 insns : BB_HEAD (BASIC_BLOCK (b)));
963 stop_insn = target;
965 if (NONJUMP_INSN_P (start_insn)
966 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
967 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
969 if (NONJUMP_INSN_P (stop_insn)
970 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
971 stop_insn = next_insn (PREV_INSN (stop_insn));
973 for (insn = start_insn; insn != stop_insn;
974 insn = next_insn_no_annul (insn))
976 rtx link;
977 rtx real_insn = insn;
978 enum rtx_code code = GET_CODE (insn);
980 if (DEBUG_INSN_P (insn))
981 continue;
983 /* If this insn is from the target of a branch, it isn't going to
984 be used in the sequel. If it is used in both cases, this
985 test will not be true. */
986 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
987 && INSN_FROM_TARGET_P (insn))
988 continue;
990 /* If this insn is a USE made by update_block, we care about the
991 underlying insn. */
992 if (code == INSN && GET_CODE (PATTERN (insn)) == USE
993 && INSN_P (XEXP (PATTERN (insn), 0)))
994 real_insn = XEXP (PATTERN (insn), 0);
996 if (CALL_P (real_insn))
998 /* CALL clobbers all call-used regs that aren't fixed except
999 sp, ap, and fp. Do this before setting the result of the
1000 call live. */
1001 AND_COMPL_HARD_REG_SET (current_live_regs,
1002 regs_invalidated_by_call);
1004 /* A CALL_INSN sets any global register live, since it may
1005 have been modified by the call. */
1006 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1007 if (global_regs[i])
1008 SET_HARD_REG_BIT (current_live_regs, i);
1011 /* Mark anything killed in an insn to be deadened at the next
1012 label. Ignore USE insns; the only REG_DEAD notes will be for
1013 parameters. But they might be early. A CALL_INSN will usually
1014 clobber registers used for parameters. It isn't worth bothering
1015 with the unlikely case when it won't. */
1016 if ((NONJUMP_INSN_P (real_insn)
1017 && GET_CODE (PATTERN (real_insn)) != USE
1018 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1019 || JUMP_P (real_insn)
1020 || CALL_P (real_insn))
1022 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1023 if (REG_NOTE_KIND (link) == REG_DEAD
1024 && REG_P (XEXP (link, 0))
1025 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1026 add_to_hard_reg_set (&pending_dead_regs,
1027 GET_MODE (XEXP (link, 0)),
1028 REGNO (XEXP (link, 0)));
1030 note_stores (PATTERN (real_insn), update_live_status, NULL);
1032 /* If any registers were unused after this insn, kill them.
1033 These notes will always be accurate. */
1034 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1035 if (REG_NOTE_KIND (link) == REG_UNUSED
1036 && REG_P (XEXP (link, 0))
1037 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1038 remove_from_hard_reg_set (&current_live_regs,
1039 GET_MODE (XEXP (link, 0)),
1040 REGNO (XEXP (link, 0)));
1043 else if (LABEL_P (real_insn))
1045 basic_block bb;
1047 /* A label clobbers the pending dead registers since neither
1048 reload nor jump will propagate a value across a label. */
1049 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1050 CLEAR_HARD_REG_SET (pending_dead_regs);
1052 /* We must conservatively assume that all registers that used
1053 to be live here still are. The fallthrough edge may have
1054 left a live register uninitialized. */
1055 bb = BLOCK_FOR_INSN (real_insn);
1056 if (bb)
1058 HARD_REG_SET extra_live;
1060 REG_SET_TO_HARD_REG_SET (extra_live, DF_LR_IN (bb));
1061 IOR_HARD_REG_SET (current_live_regs, extra_live);
1065 /* The beginning of the epilogue corresponds to the end of the
1066 RTL chain when there are no epilogue insns. Certain resources
1067 are implicitly required at that point. */
1068 else if (NOTE_P (real_insn)
1069 && NOTE_KIND (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1070 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1073 COPY_HARD_REG_SET (res->regs, current_live_regs);
1074 if (tinfo != NULL)
1076 tinfo->block = b;
1077 tinfo->bb_tick = bb_ticks[b];
1080 else
1081 /* We didn't find the start of a basic block. Assume everything
1082 in use. This should happen only extremely rarely. */
1083 SET_HARD_REG_SET (res->regs);
1085 CLEAR_RESOURCE (&set);
1086 CLEAR_RESOURCE (&needed);
1088 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1089 set, needed);
1091 /* If we hit an unconditional branch, we have another way of finding out
1092 what is live: we can see what is live at the branch target and include
1093 anything used but not set before the branch. We add the live
1094 resources found using the test below to those found until now. */
1096 if (jump_insn)
1098 struct resources new_resources;
1099 rtx stop_insn = next_active_insn (jump_insn);
1101 mark_target_live_regs (insns, next_active_insn (jump_target),
1102 &new_resources);
1103 CLEAR_RESOURCE (&set);
1104 CLEAR_RESOURCE (&needed);
1106 /* Include JUMP_INSN in the needed registers. */
1107 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1109 mark_referenced_resources (insn, &needed, true);
1111 COPY_HARD_REG_SET (scratch, needed.regs);
1112 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1113 IOR_HARD_REG_SET (new_resources.regs, scratch);
1115 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1118 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1121 if (tinfo != NULL)
1123 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1127 /* Initialize the resources required by mark_target_live_regs ().
1128 This should be invoked before the first call to mark_target_live_regs. */
1130 void
1131 init_resource_info (rtx epilogue_insn)
1133 int i;
1134 basic_block bb;
1136 /* Indicate what resources are required to be valid at the end of the current
1137 function. The condition code never is and memory always is. If the
1138 frame pointer is needed, it is and so is the stack pointer unless
1139 EXIT_IGNORE_STACK is nonzero. If the frame pointer is not needed, the
1140 stack pointer is. Registers used to return the function value are
1141 needed. Registers holding global variables are needed. */
1143 end_of_function_needs.cc = 0;
1144 end_of_function_needs.memory = 1;
1145 end_of_function_needs.unch_memory = 0;
1146 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1148 if (frame_pointer_needed)
1150 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1151 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
1152 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1153 #endif
1154 if (! EXIT_IGNORE_STACK
1155 || current_function_sp_is_unchanging)
1156 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1158 else
1159 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1161 if (crtl->return_rtx != 0)
1162 mark_referenced_resources (crtl->return_rtx,
1163 &end_of_function_needs, true);
1165 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1166 if (global_regs[i]
1167 #ifdef EPILOGUE_USES
1168 || EPILOGUE_USES (i)
1169 #endif
1171 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1173 /* The registers required to be live at the end of the function are
1174 represented in the flow information as being dead just prior to
1175 reaching the end of the function. For example, the return of a value
1176 might be represented by a USE of the return register immediately
1177 followed by an unconditional jump to the return label where the
1178 return label is the end of the RTL chain. The end of the RTL chain
1179 is then taken to mean that the return register is live.
1181 This sequence is no longer maintained when epilogue instructions are
1182 added to the RTL chain. To reconstruct the original meaning, the
1183 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1184 point where these registers become live (start_of_epilogue_needs).
1185 If epilogue instructions are present, the registers set by those
1186 instructions won't have been processed by flow. Thus, those
1187 registers are additionally required at the end of the RTL chain
1188 (end_of_function_needs). */
1190 start_of_epilogue_needs = end_of_function_needs;
1192 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1194 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1195 MARK_SRC_DEST_CALL);
1196 if (return_insn_p (epilogue_insn))
1197 break;
1200 /* Allocate and initialize the tables used by mark_target_live_regs. */
1201 target_hash_table = XCNEWVEC (struct target_info *, TARGET_HASH_PRIME);
1202 bb_ticks = XCNEWVEC (int, last_basic_block);
1204 /* Set the BLOCK_FOR_INSN of each label that starts a basic block. */
1205 FOR_EACH_BB (bb)
1206 if (LABEL_P (BB_HEAD (bb)))
1207 BLOCK_FOR_INSN (BB_HEAD (bb)) = bb;
1210 /* Free up the resources allocated to mark_target_live_regs (). This
1211 should be invoked after the last call to mark_target_live_regs (). */
1213 void
1214 free_resource_info (void)
1216 basic_block bb;
1218 if (target_hash_table != NULL)
1220 int i;
1222 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1224 struct target_info *ti = target_hash_table[i];
1226 while (ti)
1228 struct target_info *next = ti->next;
1229 free (ti);
1230 ti = next;
1234 free (target_hash_table);
1235 target_hash_table = NULL;
1238 if (bb_ticks != NULL)
1240 free (bb_ticks);
1241 bb_ticks = NULL;
1244 FOR_EACH_BB (bb)
1245 if (LABEL_P (BB_HEAD (bb)))
1246 BLOCK_FOR_INSN (BB_HEAD (bb)) = NULL;
1249 /* Clear any hashed information that we have stored for INSN. */
1251 void
1252 clear_hashed_info_for_insn (rtx insn)
1254 struct target_info *tinfo;
1256 if (target_hash_table != NULL)
1258 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1259 tinfo; tinfo = tinfo->next)
1260 if (tinfo->uid == INSN_UID (insn))
1261 break;
1263 if (tinfo)
1264 tinfo->block = -1;
1268 /* Increment the tick count for the basic block that contains INSN. */
1270 void
1271 incr_ticks_for_insn (rtx insn)
1273 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
1275 if (b != -1)
1276 bb_ticks[b]++;
1279 /* Add TRIAL to the set of resources used at the end of the current
1280 function. */
1281 void
1282 mark_end_of_function_resources (rtx trial, bool include_delayed_effects)
1284 mark_referenced_resources (trial, &end_of_function_needs,
1285 include_delayed_effects);