2015-06-03 Hale Wang <hale.wang@arm.com>
[official-gcc.git] / embedded-4_9-branch / gcc / ChangeLog.arm
blob0c3bb27f9c7f42351a1aa454b1a165153e0ea583
1 2015-06-03 Hale Wang <hale.wang@arm.com>
3 Backport from mainline r222306
4 2015-04-22 Hale Wang <hale.wang@arm.com>
5 Terry Guo <terry.guo@arm.com>
7 PR rtl-optimization/64818
8 * combine.c (can_combine_p): Don't combine user-specified
9 register if it is in an asm input.
11 2015-03-02 Terry Guo <terry.guo@arm.com>
13 Backport from mainline r220999
14 2015-02-26 Terry Guo <terry.guo@arm.com>
16 * config/arm/arm-cores.def (cortex-m7): Add flag FL_NO_VOLATILE_CE.
17 * config/arm/arm-protos.h (FL_NO_VOLATILE_CE): New flag.
18 (arm_arch_no_volatile_ce): Declare new global variable.
19 * config/arm/arm.c (arm_arch_no_volatile_ce): New global variable.
20 (arm_option_override): Assign value to arm_arch_no_volatile_ce.
21 * config/arm/arm.h (arm_arch_no_volatile_ce): Declare it.
22 (TARGET_NO_VOLATILE_CE): New macro.
23 * config/arm/arm.md (arm_comparison_operator): Disabled if not allow
24 volatile memory access in IT block
26 2015-02-27 Terry Guo <terry.guo@arm.com>
28 * config/arm/t-rmprofile (Multilibs for M7): Slightly adjust the path.
30 2015-01-29 Terry Guo <terry.guo@arm.com>
32 Backport from mainline r220197
33 2015-01-28 Terry Guo <terry.guo@arm.com>
35 * config/arm/thumb1.md (*thumb1_movpc_insn): New insn pattern.
37 2015-01-29 Terry Guo <terry.guo@arm.com>
39 Backport from mainline r220106
40 2015-01-26 Terry Guo <terry.guo@arm.com>
42 * config/arm/arm.c (arm_file_start): Update the assignment of
43 Tag_ABI_HardFP_use.
45 2015-01-15 Terry Guo <terry.guo@arm.com>
47 * config/arm/t-rmprofile (Multilibs for M7): Five new multilib
48 variants for Cortex-M7.
50 2014-12-02 Terry Guo <terry.guo@arm.com>
52 Backport from mainline r214214
53 2014-08-20 Terry Guo <terry.guo@arm.com>
55 * config/arm/thumb1.md (64bit splitter): Replace const_double_operand
56 with immediate_operand.
58 2014-12-02 Terry Guo <terry.guo@arm.com>
60 Backport from mainline r211817
61 2014-06-19 Terry Guo <terry.guo@arm.com>
63 * config/arm/thumb1.md (define_split): Split 64bit constant in earlier
64 stage.
66 2014-11-19 Terry Guo <terry.guo@arm.com>
68 Backport from mainline r217687
69 2014-11-17 Terry Guo <terry.guo@arm.com>
71 * config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7.
72 * config/arm/arm.md (generic_sched): Exclude cortex-m7.
73 (generic_vfp): Likewise.
74 * config/arm/cortex-m7.md: Pipeline description for cortex-m7.
76 2014-11-10 Hale Wang <hale.wang@arm.com>
78 Backport from mainline r217175
79 2014-11-06 Hale Wang <hale.wang@arm.com>
81 * config/arm/arm-cores.def: Add support for
82 -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
83 cortex-m1.small-multiply.
84 * config/arm/arm-tables.opt: Regenerate.
85 * config/arm/arm-tune.md: Regenerate.
86 * config/arm/arm.c: Update the rtx-costs for MUL.
87 * config/arm/bpabi.h: Handle
88 -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
89 cortex-m1.small-multiply.
90 * doc/invoke.texi: Document
91 -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
92 cortex-m1.small-multiply.
94 2014-11-10 Hale Wang <hale.wang@arm.com>
96 Backport from mainline r217173
97 2014-11-06 Hale Wang <hale.wang@arm.com>
99 * config/arm/arm.c: Add cortex-m7 tune.
100 * config/arm/arm-cores.def: Use cortex-m7 tune.
102 2014-11-03 Hale Wang <hale.wang@arm.com>
104 * Makefile.in (tree-switch-shortcut): New object file.
105 * common.opt (-ftree-switch-shortcut): New option.
106 * opts.c: Likewise.
107 * params.def: Define the maxinum number of instructions and paths
108 to duplicate when shortcutting a switch.
109 * passes.def (pass_tree_switch_shortcut): New pass.
110 * timevar.def (TV_TREE_SWITCH_SHORTCUT): Define new value.
111 * tree-pass.h (make_pass_tree_switch_shortcut): New pass.
112 * tree-switch-shortcut.c: New file.
114 2014-10-08 Zhenqiang Chen <zhenqiang.chen@arm.com>
116 Backport from mainline r215444
117 2014-09-22 Zhenqiang Chen <zhenqiang.chen@arm.com>
119 * config/arm/arm.c: #include "tm-constrs.h"
120 (thumb1_size_rtx_costs): Adjust rtx costs.
122 2014-10-08 Zhenqiang Chen <zhenqiang.chen@arm.com>
124 Backport from mainline r215540
125 2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com>
127 * ira-color.c (assign_hard_reg): Ignore conflict cost if the
128 HARD_REGNO is not availabe for CONFLICT_A.
130 testsuite/ChangeLog:
131 2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com>
133 * gcc.target/arm/pr63210.c: New test.
135 2014-10-08 Zhenqiang Chen <zhenqiang.chen@arm.com>
137 Backport from mainline r213691
138 2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
140 * tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.
142 testsuite/ChangeLog
143 2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
145 * gcc.target/arm/get_address_cost_aligned_max_offset.c: New test.
147 2014-10-06 Terry Guo <terry.guo@arm.com>
149 Backport from mainline r215711
150 2014-09-30 Terry Guo <terry.guo@arm.com>
152 * config/arm/arm-cores.def (cortex-m7): New core name.
153 * config/arm/arm-fpus.def (fpv5-sp-d16): New fpu name.
154 (fpv5-d16): Ditto.
155 * config/arm/arm-tables.opt: Regenerated.
156 * config/arm/arm-tune.md: Regenerated.
157 * config/arm/arm.h (TARGET_VFP5): New macro.
158 * config/arm/bpabi.h (BE8_LINK_SPEC): Include cortex-m7.
159 * config/arm/vfp.md (<vrint_pattern><SDF:mode>2,
160 smax<mode>3, smin<mode>3): Enabled for FPU FPv5.
161 * doc/invoke.texi: Document new cpu and fpu names.
163 2014-10-05 Terry Guo <terry.guo@arm.com>
165 Backport from mainline r212750
166 2014-07-17 Terry Guo <terry.guo@arm.com>
168 * config/arm/types.md (alu_reg): Replaced by alu_sreg and alu_dsp_reg.
169 (alus_reg): Renamed to alus_sreg.
170 * config/arm/arm-fixed.md: Change type of non-dsp instructions
171 from alu_reg to alu_sreg. Change type of dsp instructions from
172 alu_reg to alu_dsp_reg.
173 * config/arm/thumb1.md: Likewise.
174 * config/arm/thumb2.md: Likewise.
175 * config/arm/arm.c (cortexa7_older_only): Use new ALU type names.
176 * config/arm/arm1020e.md (1020alu_op): Replace alu_reg and alus_reg
177 with alu_sreg and alus_sreg.
178 * config/arm/arm1026ejs.md (alu_op): Likewise.
179 * config/arm/arm1136jfs.md (11_alu_op): Likewise.
180 * config/arm/arm926ejs.md (9_alu_op): Likewise.
181 * config/arm/fa526.md (526_alu_op): Likewise.
182 * config/arm/fa606te.md (606te_alu_op): Likewise.
183 * config/arm/fa626te.md (626te_alu_op): Likewise.
184 * config/arm/fa726te.md (726te_alu_op): Likewise.
185 * config/arm/fmp626.md (mp626_alu_op): Likewise.
186 * config/arm/arm.md (core_cycles): Replace alu_reg and alus_reg with
187 alu_sreg, alu_dsp_reg and alus_sreg.
188 * config/arm/cortex-a15.md (cortex_a15_alu): Likewise.
189 * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
190 * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
191 * config/arm/cortex-a7.md (cortex_a7_alu_sreg): Likewise.
192 * config/arm/cortex-a8.md (cortex_a8_alu): Likewise.
193 * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
194 * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
195 * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
196 * config/arm/marvell-pj4.md (pj4_alu, pj4_alu_conds): Likewise.
197 * config/aarch64/aarch64.md (*addsi3_aarch64, *addsi3_aarch64_uxtw,
198 subsi3, *adddi3_aarch64, *subsi3_uxtw, subdi3, absdi2, neg<mode>2,
199 *negsi2_uxtw, tlsle_small_<mode>): Rename type alu_reg to alu_sreg.
200 (add<mode>3_compare0, *addsi3_compare0_uxtw, *add<mode>3nr_compare0,
201 sub<mode>3_compare0, *compare_neg<mode>, *neg<mode>2_compare0,
202 subsi3_compare0_uxtw, *negsi2_compare0_uxtw, *cmp<mode>): Rename type
203 alus_reg to alus_sreg.
205 2014-10-05 Terry Guo <terry.guo@arm.com>
207 Backport from mainline r211443
208 2014-06-11 Terry Guo <terry.guo@arm.com>
210 * config/arm/arm.md (*thumb1_adddi3): Move into new file thumb1.md.
211 (*thumb1_addsi3): Ditto.
212 (*thumb_subdi3): Ditto.
213 (thumb1_subsi3_insn): Ditto.
214 (*thumb_mulsi3): Ditto.
215 (*thumb_mulsi3_v6): Ditto.
216 (*thumb1_andsi3_insn): Ditto.
217 (thumb1_bicsi3): Ditto.
218 (*thumb1_iorsi3_insn): Ditto.
219 (*thumb1_xorsi3_insn): Ditto.
220 (*thumb1_ashlsi3): Ditto.
221 (*thumb1_ashrsi3): Ditto.
222 (*thumb1_lshrsi3): Ditto.
223 (*thumb1_rotrsi3): Ditto.
224 (*thumb1_negdi2): Ditto.
225 (*thumb1_negsi2): Ditto.
226 (*thumb1_abssi2): Ditto.
227 (*thumb1_neg_abssi2): Ditto.
228 (*thumb1_one_cmplsi2): Ditto.
229 (*thumb1_zero_extendhisi2): Ditto.
230 (*thumb1_zero_extendqisi2): Ditto.
231 (*thumb1_zero_extendqisi2_v6): Ditto.
232 (thumb1_extendhisi2): Ditto.
233 (thumb1_extendqisi2): Ditto.
234 (*thumb1_movdi_insn): Ditto.
235 (*thumb1_movsi_insn): Ditto.
236 (*thumb1_movhi_insn): Ditto.
237 (thumb_movhi_clobber): Ditto.
238 (*thumb1_movqi_insn): Ditto.
239 (*thumb1_movhf): Ditto.
240 (*thumb1_movsf_insn): Ditto.
241 (*thumb_movdf_insn): Ditto.
242 (movmem12b): Ditto.
243 (movmem8b): Ditto.
244 (cbranchqi4): Ditto.
245 (cbranchsi4_insn): Ditto.
246 (cbranchsi4_scratch): Ditto.
247 (*negated_cbranchsi4): Ditto.
248 (*tbit_cbranch): Ditto.
249 (*tlobits_cbranch): Ditto.
250 (*tstsi3_cbranch): Ditto.
251 (*cbranchne_decr1): Ditto.
252 (*addsi3_cbranch): Ditto.
253 (*addsi3_cbranch_scratch): Ditto.
254 (*thumb_cmpdi_zero): Ditto.
255 (cstoresi_eq0_thumb1): Ditto.
256 (cstoresi_ne0_thumb1): Ditto.
257 (*cstoresi_eq0_thumb1_insn): Ditto.
258 (*cstoresi_ne0_thumb1_insn): Ditto.
259 (cstoresi_nltu_thumb1): Ditto.
260 (cstoresi_ltu_thumb1): Ditto.
261 (thumb1_addsi3_addgeu): Ditto.
262 (*thumb_jump): Ditto.
263 (*call_reg_thumb1_v5): Ditto.
264 (*call_reg_thumb1): Ditto.
265 (*call_value_reg_thumb1_v5): Ditto.
266 (*call_value_reg_thumb1): Ditto.
267 (*call_insn): Ditto.
268 (*call_value_insn): Ditto.
269 (thumb1_casesi_internal_pic): Ditto.
270 (thumb1_casesi_dispatch): Ditto.
271 (*thumb1_indirect_jump): Ditto.
272 (prologue_thumb1_interwork): Ditto.
273 (*epilogue_insns): Ditto.
274 (consttable_1): Ditto.
275 (consttable_2): Ditto.
276 (tablejump): Ditto.
277 (*thumb1_tablejump): Ditto.
278 (thumb_eh_return): Ditto.
279 (define_peephole2): Two of them are thumb1 only and got moved into
280 new file thumb1.md.
281 (define_split): Six of them are thumb1 only and got moved into new
282 file thumb1.md.
283 * config/arm/thumb1.md: New file comprised of above thumb1 only
284 patterns.
286 2014-09-30 Zhenqiang Chen <zhenqiang.chen@arm.com>
288 * config/arm/arm.c (arm_option_override): Disable loop2_invariant
289 pass when optimize_size and ira-loop-pressure is not enabled.
291 2014-05-12 Terry Guo <terry.guo@arm.com>
293 * config.gcc (--with-multilib-list): Accept arm embedded cores.
294 * configure.ac (with_multilib_list): Export for being used in arm
295 embedded multilib fragment.
296 * configure: Regenerated.
297 * Makefile.in (with_multilib_list): Import for being used in
298 multilib fragment.
299 * config/arm/t-rmprofile: New multilib fragment for arm embedded
300 cores.