1 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3 * combine.cc (simplify_compare_const): Properly handle unsigned
4 constants while narrowing comparison of memory and constants.
6 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
8 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
9 (MASK_ZIFENCEI): Delete;
10 (MASK_ZIHINTNTL): Ditto.
11 (MASK_ZIHINTPAUSE): Ditto.
12 (TARGET_ZICSR): Ditto.
13 (TARGET_ZIFENCEI): Ditto.
14 (TARGET_ZIHINTNTL): Ditto.
15 (TARGET_ZIHINTPAUSE): Ditto.
17 (TARGET_ZAWRS): Ditto.
29 (MASK_ZHINXMIN): Ditto.
30 (TARGET_ZFINX): Ditto.
31 (TARGET_ZDINX): Ditto.
32 (TARGET_ZHINX): Ditto.
33 (TARGET_ZHINXMIN): Ditto.
51 (TARGET_ZKSED): Ditto.
56 (MASK_VECTOR_ELEN_32): Ditto.
57 (MASK_VECTOR_ELEN_64): Ditto.
58 (MASK_VECTOR_ELEN_FP_32): Ditto.
59 (MASK_VECTOR_ELEN_FP_64): Ditto.
60 (MASK_VECTOR_ELEN_FP_16): Ditto.
61 (TARGET_VECTOR_ELEN_32): Ditto.
62 (TARGET_VECTOR_ELEN_64): Ditto.
63 (TARGET_VECTOR_ELEN_FP_32): Ditto.
64 (TARGET_VECTOR_ELEN_FP_64): Ditto.
65 (TARGET_VECTOR_ELEN_FP_16): Ditto.
84 (TARGET_ZVKNED): Ditto.
85 (TARGET_ZVKNHA): Ditto.
86 (TARGET_ZVKNHB): Ditto.
87 (TARGET_ZVKSED): Ditto.
88 (TARGET_ZVKSH): Ditto.
90 (TARGET_ZVKNC): Ditto.
91 (TARGET_ZVKNG): Ditto.
93 (TARGET_ZVKSC): Ditto.
94 (TARGET_ZVKSG): Ditto.
98 (MASK_ZVL128B): Ditto.
99 (MASK_ZVL256B): Ditto.
100 (MASK_ZVL512B): Ditto.
101 (MASK_ZVL1024B): Ditto.
102 (MASK_ZVL2048B): Ditto.
103 (MASK_ZVL4096B): Ditto.
104 (MASK_ZVL8192B): Ditto.
105 (MASK_ZVL16384B): Ditto.
106 (MASK_ZVL32768B): Ditto.
107 (MASK_ZVL65536B): Ditto.
108 (TARGET_ZVL32B): Ditto.
109 (TARGET_ZVL64B): Ditto.
110 (TARGET_ZVL128B): Ditto.
111 (TARGET_ZVL256B): Ditto.
112 (TARGET_ZVL512B): Ditto.
113 (TARGET_ZVL1024B): Ditto.
114 (TARGET_ZVL2048B): Ditto.
115 (TARGET_ZVL4096B): Ditto.
116 (TARGET_ZVL8192B): Ditto.
117 (TARGET_ZVL16384B): Ditto.
118 (TARGET_ZVL32768B): Ditto.
119 (TARGET_ZVL65536B): Ditto.
120 (MASK_ZICBOZ): Ditto.
121 (MASK_ZICBOM): Ditto.
122 (MASK_ZICBOP): Ditto.
123 (TARGET_ZICBOZ): Ditto.
124 (TARGET_ZICBOM): Ditto.
125 (TARGET_ZICBOP): Ditto.
126 (MASK_ZICOND): Ditto.
127 (TARGET_ZICOND): Ditto.
130 (MASK_ZFHMIN): Ditto.
132 (MASK_ZVFHMIN): Ditto.
134 (TARGET_ZFHMIN): Ditto.
136 (TARGET_ZVFHMIN): Ditto.
137 (TARGET_ZVFH): Ditto.
139 (TARGET_ZMMUL): Ditto.
152 (TARGET_ZCMP): Ditto.
153 (TARGET_ZCMT): Ditto.
154 (MASK_SVINVAL): Ditto.
155 (MASK_SVNAPOT): Ditto.
156 (TARGET_SVINVAL): Ditto.
157 (TARGET_SVNAPOT): Ditto.
158 (MASK_XTHEADBA): Ditto.
159 (MASK_XTHEADBB): Ditto.
160 (MASK_XTHEADBS): Ditto.
161 (MASK_XTHEADCMO): Ditto.
162 (MASK_XTHEADCONDMOV): Ditto.
163 (MASK_XTHEADFMEMIDX): Ditto.
164 (MASK_XTHEADFMV): Ditto.
165 (MASK_XTHEADINT): Ditto.
166 (MASK_XTHEADMAC): Ditto.
167 (MASK_XTHEADMEMIDX): Ditto.
168 (MASK_XTHEADMEMPAIR): Ditto.
169 (MASK_XTHEADSYNC): Ditto.
170 (TARGET_XTHEADBA): Ditto.
171 (TARGET_XTHEADBB): Ditto.
172 (TARGET_XTHEADBS): Ditto.
173 (TARGET_XTHEADCMO): Ditto.
174 (TARGET_XTHEADCONDMOV): Ditto.
175 (TARGET_XTHEADFMEMIDX): Ditto.
176 (TARGET_XTHEADFMV): Ditto.
177 (TARGET_XTHEADINT): Ditto.
178 (TARGET_XTHEADMAC): Ditto.
179 (TARGET_XTHEADMEMIDX): Ditto.
180 (TARGET_XTHEADMEMPAIR): Ditto.
181 (TARGET_XTHEADSYNC): Ditto.
182 (MASK_XVENTANACONDOPS): Ditto.
183 (TARGET_XVENTANACONDOPS): Ditto.
184 * config/riscv/riscv.opt: Add new Mask defination.
185 * doc/options.texi: Add explanation for this new usage.
186 * opt-functions.awk: Add new function to find the index
187 of target variable from extra_target_vars.
188 * opt-read.awk: Add new function to store the Mask flags.
189 * opth-gen.awk: Add new function to output the defination of
190 Mask Macro and Target Macro.
192 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
193 Juzhe-Zhong <juzhe.zhong@rivai.ai>
194 Juzhe-Zhong <juzhe.zhong@rivai.ai>
197 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
198 Change second parameter to rtx *.
199 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
200 * config/riscv/vector.md: Changed callers of
201 riscv_vector::legitimize_move.
202 (*mov<mode>_mem_to_mem): Remove.
204 2023-09-30 Jakub Jelinek <jakub@redhat.com>
207 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
208 Replace safe_grow with safe_grow_cleared.
210 2023-09-30 Jakub Jelinek <jakub@redhat.com>
212 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
215 2023-09-30 Jakub Jelinek <jakub@redhat.com>
219 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
221 (bitint_large_huge::handle_operand_addr): For uninitialized operands
222 use limb_prec or -limb_prec precision.
224 2023-09-30 Jakub Jelinek <jakub@redhat.com>
226 * vec.h (quick_grow): Uncomment static_assert.
228 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
230 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
232 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
234 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
235 SETs when the outer code is INSN.
237 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
239 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
242 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
244 * poly-int.h (poly_int_pod): Delete.
245 (poly_coeff_traits::init_cast): New type.
246 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
247 (poly_int): Replace constructors that take 1 and 2 coefficients with
248 a general one that takes an arbitrary number of coefficients.
249 Delegate initialization to two new private constructors, one of
250 which uses the coefficients as-is and one of which adds an extra
251 zero of the appropriate type (and precision, where applicable).
252 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
253 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
254 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
255 * gengtype.cc (main): Don't register poly_int64_pod.
256 * calls.cc (initialize_argument_information): Use poly_int rather
258 (combine_pending_stack_adjustment_and_call): Likewise.
259 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
260 * data-streamer.h (bp_unpack_poly_value): Likewise.
261 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
262 (struct queued_reg_save): Likewise.
263 * dwarf2out.h (struct dw_cfa_location): Likewise.
264 * emit-rtl.h (struct incoming_args): Likewise.
265 (struct rtl_data): Likewise.
266 * expr.cc (get_bit_range): Likewise.
267 (get_inner_reference): Likewise.
268 * expr.h (get_bit_range): Likewise.
269 * fold-const.cc (split_address_to_core_and_offset): Likewise.
270 (ptr_difference_const): Likewise.
271 * fold-const.h (ptr_difference_const): Likewise.
272 * function.cc (try_fit_stack_local): Likewise.
273 (instantiate_new_reg): Likewise.
274 * function.h (struct expr_status): Likewise.
275 (struct args_size): Likewise.
276 * genmodes.cc (ZERO_COEFFS): Likewise.
277 (mode_size_inline): Likewise.
278 (mode_nunits_inline): Likewise.
279 (emit_mode_precision): Likewise.
280 (emit_mode_size): Likewise.
281 (emit_mode_nunits): Likewise.
282 * gimple-fold.cc (get_base_constructor): Likewise.
283 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
284 * inchash.h (class hash): Likewise.
285 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
286 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
288 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
289 * lra-eliminations.cc (self_elim_offsets): Likewise.
290 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
291 * omp-low.cc (omplow_simd_context): Likewise.
292 * pretty-print.cc (pp_wide_integer): Likewise.
293 * pretty-print.h (pp_wide_integer): Likewise.
294 * reload.cc (struct decomposition): Likewise.
295 * reload.h (struct reload): Likewise.
296 * reload1.cc (spill_stack_slot_width): Likewise.
297 (struct elim_table): Likewise.
298 (offsets_at): Likewise.
299 (init_eliminable_invariants): Likewise.
300 * rtl.h (union rtunion): Likewise.
301 (poly_int_rtx_p): Likewise.
302 (strip_offset): Likewise.
303 (strip_offset_and_add): Likewise.
304 * rtlanal.cc (strip_offset): Likewise.
305 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
306 (get_addr_base_and_unit_offset_1): Likewise.
307 (get_addr_base_and_unit_offset): Likewise.
308 * tree-dfa.h (get_ref_base_and_extent): Likewise.
309 (get_addr_base_and_unit_offset_1): Likewise.
310 (get_addr_base_and_unit_offset): Likewise.
311 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
312 (strip_offset): Likewise.
313 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
314 * tree.cc (ptrdiff_tree_p): Likewise.
315 * tree.h (poly_int_tree_p): Likewise.
316 (ptrdiff_tree_p): Likewise.
317 (get_inner_reference): Likewise.
319 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
321 * config/pa/pa.md (memory_barrier): Revise comment.
322 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
323 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
325 2023-09-29 Jakub Jelinek <jakub@redhat.com>
327 * vec.h (quick_insert, ordered_remove, unordered_remove,
328 block_remove, qsort, sort, stablesort, quick_grow): Guard
329 std::is_trivially_{copyable,default_constructible} and
330 vec_detail::is_trivially_copyable_or_pair static assertions
331 with GCC_VERSION >= 5000.
332 (vec_detail::is_trivially_copyable_or_pair): Guard definition
333 with GCC_VERSION >= 5000.
335 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
337 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
338 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
339 and aarch64_stp_policy to aarch64_ldp_stp_policy.
340 (enum aarch64_stp_policy): Removed.
341 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
342 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
343 and left only the definitions to the aarch64-opts one.
344 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
345 (aarch64_parse_stp_policy): Removed.
346 (aarch64_override_options_internal): Removed calls to parsing
347 functions and added obvious direct assignments.
348 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
349 code quality based on the new changes.
350 * config/aarch64/aarch64.opt: Use single enum type
351 aarch64_ldp_stp_policy for both ldp and stp options.
353 2023-09-29 Richard Biener <rguenther@suse.de>
355 PR tree-optimization/111583
356 * tree-loop-distribution.cc (find_single_drs): Ensure the
357 load/store are always executed.
359 2023-09-29 Jakub Jelinek <jakub@redhat.com>
361 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
362 quick_grow_cleared method on unprom rather than quick_grow.
364 2023-09-29 Sergei Trofimovich <siarheit@google.com>
367 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
368 Add new helper. Use helper instead of memset() to wipe out pointers.
370 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
372 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
374 * builtins.cc (c_readstr): Likewise. Build a local array of
375 bytes and use native_decode_rtx to get the rtx image.
376 (builtin_memcpy_read_str): Simplify accordingly.
377 (builtin_strncpy_read_str): Likewise.
378 (builtin_memset_read_str): Likewise.
379 (builtin_memset_gen_str): Likewise.
380 * expr.cc (string_cst_read_str): Likewise.
382 2023-09-29 Jakub Jelinek <jakub@redhat.com>
384 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
385 instead of quick_grow on vec<bitmap_head> members.
386 * cfganal.cc (control_dependences::control_dependences): Likewise.
387 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
388 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
389 on auto_vec<bitmap_head> vars.
390 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
391 of quick_grow on vec<bitmap_head> var.
393 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
396 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
398 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
401 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
404 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
405 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
406 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
408 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
411 2023-09-28 Pan Li <pan2.li@intel.com>
414 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
416 * config/riscv/vector-iterators.md: New iterator.
418 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
420 * rtl.h (lra_in_progress): Change type to bool.
421 (ira_in_progress): Add new extern.
422 * ira.cc (ira_in_progress): New global.
423 (pass_ira::execute): Set up ira_in_progress.
424 * lra.cc: (lra_in_progress): Change type to bool and initialize.
425 (lra): Use bool values for lra_in_progress.
426 * lra-eliminations.cc (init_elim_table): Ditto.
428 2023-09-28 Richard Biener <rguenther@suse.de>
431 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
432 Use a heap allocated worklist for CFG traversal instead of
435 2023-09-28 Jakub Jelinek <jakub@redhat.com>
436 Jonathan Wakely <jwakely@redhat.com>
438 * vec.h: Mention in file comment limited support for non-POD types
440 (vec_destruct): New function template.
441 (release): Use it for non-trivially destructible T.
442 (truncate): Likewise.
443 (quick_push): Perform a placement new into slot
444 instead of assignment.
445 (pop): For non-trivially destructible T return void
446 rather than T & and destruct the popped element.
447 (quick_insert, ordered_remove): Note that they aren't suitable
448 for non-trivially copyable types. Add static_asserts for that.
449 (block_remove): Assert T is trivially copyable.
450 (vec_detail::is_trivially_copyable_or_pair): New trait.
451 (qsort, sort, stablesort): Assert T is trivially copyable or
452 std::pair with both trivally copyable types.
453 (quick_grow): Add assert T is trivially default constructible,
454 for now commented out.
455 (quick_grow_cleared): Don't call quick_grow, instead inline it
456 by hand except for the new static_assert.
457 (gt_ggc_mx): Assert T is trivially destructable.
458 (auto_vec::operator=): Formatting fixes.
459 (auto_vec::auto_vec): Likewise.
460 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
461 it manually and call quick_grow_cleared method rather than quick_grow.
462 (safe_grow_cleared): Likewise.
463 * edit-context.cc (class line_event): Move definition earlier.
464 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
466 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
467 safe_grow_cleared instead of safe_grow followed by placement new
468 constructing the elements.
470 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
472 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
473 * tree-affine.cc (expr_to_aff_combination): Likewise.
475 2023-09-28 Richard Biener <rguenther@suse.de>
477 PR tree-optimization/111614
478 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
479 convert the first vector when required.
481 2023-09-28 xuli <xuli1@eswincomputing.com>
484 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
485 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
487 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
489 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
491 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
494 * configure: Regenerate.
495 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
497 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
498 Philipp Tomsich <philipp.tomsich@vrull.eu>
499 Manolis Tsamis <manolis.tsamis@vrull.eu>
501 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
503 (enum aarch64_stp_policy): New enum type.
504 * config/aarch64/aarch64-protos.h (struct tune_params): Add
505 appropriate enums for the policies.
506 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
507 * config/aarch64/aarch64-tuning-flags.def
508 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
510 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
511 function to parse ldp-policy parameter.
512 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
513 (aarch64_override_options_internal): Call parsing functions.
514 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
515 (aarch64_operands_ok_for_ldpstp): Add call to
516 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
517 check and alignment check and remove superseded ones.
518 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
519 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
520 check and alignment check and remove superseded ones.
521 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
522 (aarch64-stp-policy): New param.
523 * doc/invoke.texi: Document the parameters accordingly.
525 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
527 * tree-data-ref.cc (include calls.h): Add new include.
528 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
530 2023-09-27 Richard Biener <rguenther@suse.de>
532 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
534 2023-09-27 Jakub Jelinek <jakub@redhat.com>
537 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
538 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
540 * function.cc (assign_parm_find_data_types): Likewise.
542 2023-09-27 Pan Li <pan2.li@intel.com>
544 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
545 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
546 (enum insn_type): Ditto.
547 (expand_vec_roundeven): New func decl.
548 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
550 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
553 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
555 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
557 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
559 2023-09-27 Pan Li <pan2.li@intel.com>
561 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
562 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
563 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
564 (expand_vec_trunc): Ditto.
566 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
570 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
571 Handle failure from expand_builtin_atomic_test_and_set.
572 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
573 generate atomic code through target support, return NULL
574 instead of emitting non-atomic code. Also, for code handling
575 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
576 from calling emit_store_flag_force instead of returning NULL.
578 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
580 PR tree-optimization/111599
581 * value-relation.cc (relation_oracle::valid_equivs): Ensure
584 2023-09-26 Andrew Pinski <apinski@marvell.com>
586 PR tree-optimization/106164
587 PR tree-optimization/111456
588 * match.pd (`(A ==/!= B) & (A CMP C)`):
589 Support an optional cast on the second A.
590 (`(A ==/!= B) | (A CMP C)`): Likewise.
592 2023-09-26 Andrew Pinski <apinski@marvell.com>
594 PR tree-optimization/111469
595 * tree-ssa-phiopt.cc (minmax_replacement): Fix
596 the assumption for the `non-diamond` handling cases
599 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
601 * match.pd: Optimize COND_ADD reduction pattern.
603 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
605 PR tree-optimization/111594
606 PR tree-optimization/110660
607 * match.pd: Optimize COND_LEN_ADD reduction.
609 2023-09-26 Pan Li <pan2.li@intel.com>
611 * config/riscv/autovec.md (round<mode>2): New pattern.
612 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
613 (enum insn_type): Ditto.
614 (expand_vec_round): New function decl.
615 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
617 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
619 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
621 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
624 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
625 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
627 2023-09-26 Pan Li <pan2.li@intel.com>
629 * config/riscv/autovec.md (rint<mode>2): New pattern.
630 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
631 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
633 2023-09-26 Pan Li <pan2.li@intel.com>
635 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
636 * config/riscv/riscv-protos.h (enum insn_type): New enum.
637 (expand_vec_nearbyint): New function decl.
638 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
640 2023-09-26 Pan Li <pan2.li@intel.com>
642 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
643 (get_fp_rounding_coefficient): Rename.
644 (gen_floor_const_fp): Remove.
645 (expand_vec_ceil): Take renamed func.
646 (expand_vec_floor): Ditto.
648 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
651 * lra-constraints.cc (lra_constraints): Copy substituted
653 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
655 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
657 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
658 return statement in the varying case.
660 2023-09-25 Xi Ruoyao <xry111@xry111.site>
662 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
664 2023-09-25 Andrew Pinski <apinski@marvell.com>
666 PR tree-optimization/110386
667 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
669 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
672 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
674 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
677 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
680 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
683 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
684 target_option_default_node when the callee has no option
685 attributes, also simplify the existing code accordingly.
687 2023-09-25 Guo Jie <guojie@loongson.cn>
689 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
690 pattern for vector construction.
691 (vec_set<mode>_internal): Ditto.
692 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
693 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
694 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
695 Optimized the implementation of vector construction.
696 (loongarch_expand_vector_init_same): New function.
697 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
698 pattern for vector construction.
699 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
701 (vec_concatv2df): Ditto.
702 (vec_concatv4sf): Ditto.
704 2023-09-24 Pan Li <pan2.li@intel.com>
707 * config/riscv/riscv-v.cc
708 (expand_vector_init_merge_repeating_sequence): Bugfix
710 2023-09-24 Andrew Pinski <apinski@marvell.com>
712 PR tree-optimization/111543
713 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
715 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
717 * config/riscv/autovec-opt.md: Extend VLS modes
718 * config/riscv/vector-iterators.md: Ditto.
720 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
722 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
724 2023-09-23 Pan Li <pan2.li@intel.com>
726 * config/riscv/autovec.md (floor<mode>2): New pattern.
727 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
728 (enum insn_type): Ditto.
729 (expand_vec_floor): New function decl.
730 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
731 (expand_vec_floor): Ditto.
733 2023-09-22 Pan Li <pan2.li@intel.com>
735 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
736 (emit_vec_float_cmp_mask): Rename.
737 (expand_vec_copysign): Ditto.
738 (emit_vec_copysign): Ditto.
739 (emit_vec_abs): New function impl.
740 (emit_vec_cvt_x_f): Ditto.
741 (emit_vec_cvt_f_x): Ditto.
742 (expand_vec_ceil): Ditto.
744 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
746 * config/riscv/vector-iterators.md: Extend VLS modes.
748 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
750 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
751 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
752 (vec_duplicate<mode>): Ditto.
754 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
756 * config/riscv/autovec.md: Add VLS conditional patterns.
757 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
758 (expand_cond_binop): Ditto.
759 (expand_cond_ternop): Ditto.
760 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
761 (expand_cond_binop): Ditto.
762 (expand_cond_ternop): Ditto.
764 2023-09-22 xuli <xuli1@eswincomputing.com>
767 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
768 into vrgatherei16.vv.
770 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
772 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
773 New combine patterns.
774 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
776 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
778 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
779 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
781 2023-09-22 Pan Li <pan2.li@intel.com>
783 * config/riscv/autovec.md (ceil<mode>2): New pattern.
784 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
785 (enum insn_type): Ditto.
786 (expand_vec_ceil): New function decl.
787 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
788 (expand_vec_float_cmp_mask): Ditto.
789 (expand_vec_copysign): Ditto.
790 (expand_vec_ceil): Ditto.
791 * config/riscv/vector.md: Add VLS mode support.
793 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
795 * config/riscv/autovec.md: Extend VLS modes.
797 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
799 * config/riscv/vector-iterators.md: Extend VLS modes.
801 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
802 Robin Dapp <rdapp.gcc@gmail.com>
804 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
805 (emit_nonvlmax_insn): Adjust comments.
806 (emit_vlmax_insn_lra): Adjust comments.
808 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
810 * config.gcc (*linux*): Set rust target_objs, and
811 target_has_targetrustm,
812 * config/t-linux (linux-rust.o): New rule.
813 * config/linux-rust.cc: New file.
815 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
817 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
818 rust_target_objs and target_has_targetrustm.
819 * config/t-winnt (winnt-rust.o): New rule.
820 * config/winnt-rust.cc: New file.
822 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
824 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
825 and target_has_targetrustm.
826 * config/fuchsia-rust.cc: New file.
827 * config/t-fuchsia: New file.
829 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
831 * config.gcc (*-*-vxworks*): Set rust_target_objs and
832 target_has_targetrustm.
833 * config/t-vxworks (vxworks-rust.o): New rule.
834 * config/vxworks-rust.cc: New file.
836 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
838 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
839 target_has_targetrustm.
840 * config/t-dragonfly (dragonfly-rust.o): New rule.
841 * config/dragonfly-rust.cc: New file.
843 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
845 * config.gcc (*-*-solaris2*): Set rust_target_objs and
846 target_has_targetrustm.
847 * config/t-sol2 (sol2-rust.o): New rule.
848 * config/sol2-rust.cc: New file.
850 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
852 * config.gcc (*-*-openbsd*): Set rust_target_objs and
853 target_has_targetrustm.
854 * config/t-openbsd (openbsd-rust.o): New rule.
855 * config/openbsd-rust.cc: New file.
857 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
859 * config.gcc (*-*-netbsd*): Set rust_target_objs and
860 target_has_targetrustm.
861 * config/t-netbsd (netbsd-rust.o): New rule.
862 * config/netbsd-rust.cc: New file.
864 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
866 * config.gcc (*-*-freebsd*): Set rust_target_objs and
867 target_has_targetrustm.
868 * config/t-freebsd (freebsd-rust.o): New rule.
869 * config/freebsd-rust.cc: New file.
871 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
873 * config.gcc (*-*-darwin*): Set rust_target_objs and
874 target_has_targetrustm.
875 * config/t-darwin (darwin-rust.o): New rule.
876 * config/darwin-rust.cc: New file.
878 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
880 * config/i386/t-i386 (i386-rust.o): New rule.
881 * config/i386/i386-rust.cc: New file.
882 * config/i386/i386-rust.h: New file.
884 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
886 * doc/tm.texi: Regenerate.
887 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
889 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
891 * doc/tm.texi: Regenerate.
892 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
893 TARGET_RUST_CPU_INFO.
895 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
897 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
898 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
899 (tm_rust.h, cs-tm_rust.h, default-rust.o,
900 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
901 (s-tm-texi): Also check timestamp on rust-target.def.
902 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
903 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
904 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
906 * configure: Regenerate.
907 * configure.ac (tm_rust_file_list, tm_rust_include_list,
908 rust_target_objs): Add substitutes.
909 * doc/tm.texi: Regenerate.
910 * doc/tm.texi.in (targetrustm): Document.
911 (target_has_targetrustm): Document.
912 * genhooks.cc: Include rust/rust-target.def.
913 * config/default-rust.cc: New file.
915 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
918 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
919 * config/riscv/predicates.md (autovec_else_operand): New predicate.
920 * config/riscv/riscv-v.cc (get_else_operand): New function.
921 (expand_cond_len_unop): Adapt ELSE value.
922 (expand_cond_len_binop): Ditto.
923 (expand_cond_len_ternop): Ditto.
924 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
925 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
927 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
930 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
932 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
934 PR tree-optimization/111355
935 * match.pd ((X + C) / N): Update pattern.
937 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
939 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
941 2023-09-21 xuli <xuli1@eswincomputing.com>
944 * config/riscv/constraints.md (c01): const_int 1.
948 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
949 (vector_eew16_stride_operand): Ditto.
950 (vector_eew32_stride_operand): Ditto.
951 (vector_eew64_stride_operand): Ditto.
952 * config/riscv/vector-iterators.md: New iterator for stride operand.
953 * config/riscv/vector.md: Add stride = element width constraint.
955 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
957 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
958 (const_1_or_4_operand): Ditto.
959 (vector_gs_scale_operand_16): Ditto.
960 (vector_gs_scale_operand_32): Ditto.
961 * config/riscv/vector-iterators.md: Adjust.
963 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
965 * config/riscv/autovec.md: Extend VLS modes.
966 * config/riscv/vector-iterators.md: Ditto.
967 * config/riscv/vector.md: Ditto.
969 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
971 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
973 (ssa_cache::dump): Don't print GLOBAL RANGE header.
974 (ssa_lazy_cache::merge_range): Adjust return value meaning.
975 (ranger_cache::dump): Print GLOBAL RANGE header.
977 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
979 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
981 (foperator_unordered_gt::fold_range): Same.
982 (foperator_unordered_lt::fold_range): Same.
983 (foperator_unordered_le::fold_range): Same.
985 2023-09-20 Jakub Jelinek <jakub@redhat.com>
987 * builtins.h (type_to_class): Declare.
988 * builtins.cc (type_to_class): No longer static. Return
989 int rather than enum.
990 * doc/extend.texi (__builtin_classify_type): Document.
992 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
995 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
996 * optabs.cc (maybe_legitimize_operand): Ditto.
997 (can_reuse_operands_p): Ditto.
998 * optabs.h (enum expand_operand_type): Ditto.
999 (create_undefined_input_operand): Ditto.
1001 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
1003 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
1004 'omp allocate' variables; move stack cleanup after other
1006 (omp_notice_variable): Process original decl when decl
1007 of the value-expression for a 'omp allocate' variable is passed.
1008 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
1010 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
1012 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
1013 support simplifying vector int not only scalar int.
1015 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1017 * config/riscv/vector-iterators.md: Extend VLS floating-point.
1019 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1021 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
1023 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
1026 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
1027 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
1029 2023-09-20 Richard Biener <rguenther@suse.de>
1031 PR tree-optimization/111489
1032 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
1034 2023-09-20 Richard Biener <rguenther@suse.de>
1036 PR tree-optimization/111489
1037 * doc/invoke.texi (--param uninit-max-chain-len): Document.
1038 (--param uninit-max-num-chains): Likewise.
1039 * params.opt (-param=uninit-max-chain-len=): New.
1040 (-param=uninit-max-num-chains=): Likewise.
1041 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
1042 param_uninit_max_num_chains.
1043 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
1044 (uninit_analysis::init_use_preds): Avoid VLA.
1045 (uninit_analysis::init_from_phi_def): Likewise.
1046 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
1049 2023-09-20 Jakub Jelinek <jakub@redhat.com>
1051 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
1052 GET_MODE_PRECISION of TImode or DImode depending on whether
1053 TImode is supported scalar mode.
1054 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
1055 * expr.cc (expand_expr_real_1): Likewise.
1056 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
1057 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
1059 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
1061 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
1062 (*n<optab><mode>): Ditto.
1063 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
1064 (*<any_shiftrt:optab>trunc<mode>): Ditto.
1065 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
1066 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
1067 (*single_widen_mult<any_extend:su><mode>): Ditto.
1068 (*single_widen_mul<any_extend:su><mode>): Ditto.
1069 (*single_widen_mult<mode>): Ditto.
1070 (*single_widen_mul<mode>): Ditto.
1071 (*dual_widen_fma<mode>): Ditto.
1072 (*dual_widen_fma<su><mode>): Ditto.
1073 (*single_widen_fma<mode>): Ditto.
1074 (*single_widen_fma<su><mode>): Ditto.
1075 (*dual_fma<mode>): Ditto.
1076 (*single_fma<mode>): Ditto.
1077 (*dual_fnma<mode>): Ditto.
1078 (*dual_widen_fnma<mode>): Ditto.
1079 (*single_fnma<mode>): Ditto.
1080 (*single_widen_fnma<mode>): Ditto.
1081 (*dual_fms<mode>): Ditto.
1082 (*dual_widen_fms<mode>): Ditto.
1083 (*single_fms<mode>): Ditto.
1084 (*single_widen_fms<mode>): Ditto.
1085 (*dual_fnms<mode>): Ditto.
1086 (*dual_widen_fnms<mode>): Ditto.
1087 (*single_fnms<mode>): Ditto.
1088 (*single_widen_fnms<mode>): Ditto.
1090 2023-09-20 Jakub Jelinek <jakub@redhat.com>
1093 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
1094 on vars or function decls if -fopenmp or -fopenmp-simd.
1096 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
1099 * config/riscv/autovec-opt.md: Add missed operand.
1101 2023-09-20 Omar Sandoval <osandov@osandov.com>
1104 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
1105 dwarf_split_debug_info.
1107 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1109 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
1110 (vectorize_related_mode): Add VLS related modes.
1111 * config/riscv/vector-iterators.md: Extend VLS modes.
1113 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
1115 PR rtl-optimization/110071
1116 * ira-color.cc (improve_allocation): Consider cost of callee
1119 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
1120 Xi Ruoyao <xry111@xry111.site>
1122 * configure: Regenerate.
1123 * configure.ac: Checking assembler for -mno-relax support.
1124 Disable relaxation when probing leb128 support.
1126 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
1128 * config.in: Regenerate.
1129 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
1130 mrelax. And set the initial value of explicit-relocs according to the
1132 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
1133 --no-relax option to the linker.
1134 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
1135 -mno-relax, pass the -mno-relax option to the assembler.
1136 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
1137 * config/loongarch/loongarch.opt: Regenerate.
1138 * configure: Regenerate.
1139 * configure.ac: Add detection of support for binutils relax function.
1141 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
1143 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
1144 -fdeps-target= flags.
1145 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
1146 only -fdeps-format= is specified.
1147 * json.h: Add a TODO item to refactor out to share with
1150 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
1151 Jason Merrill <jason@redhat.com>
1153 * gcc.cc (join_spec_func): Add a spec function to join all
1156 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
1158 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
1159 src_op_0 var to avoid rtl check error.
1161 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
1163 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
1165 (operator_not_equal::fold_range): Handle VREL_EQ.
1166 (operator_lt::fold_range): Remove special casing for VREL_EQ.
1167 (operator_gt::fold_range): Same.
1168 (foperator_unordered_equal::fold_range): Same.
1170 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
1172 * doc/extend.texi: Document attributes hot, cold on C++ types.
1174 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
1176 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
1177 modulo instruction is disabled.
1178 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
1179 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
1180 (define_expand umod<mode>3): New.
1181 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
1182 instruction is disabled.
1183 (umodti3, modti3): Check if the modulo instruction is disabled.
1185 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
1187 * doc/gm2.texi (fdebug-builtins): Correct description.
1189 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
1191 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
1192 * config/iq2000/iq2000.md (rotrsi3): Use it.
1194 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
1196 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
1197 (operator_lt::op2_range): Same.
1198 (operator_le::op1_range): Same.
1199 (operator_le::op2_range): Same.
1200 (operator_gt::op1_range): Same.
1201 (operator_gt::op2_range): Same.
1202 (operator_ge::op1_range): Same.
1203 (operator_ge::op2_range): Same.
1204 (foperator_unordered_lt::op1_range): Same.
1205 (foperator_unordered_lt::op2_range): Same.
1206 (foperator_unordered_le::op1_range): Same.
1207 (foperator_unordered_le::op2_range): Same.
1208 (foperator_unordered_gt::op1_range): Same.
1209 (foperator_unordered_gt::op2_range): Same.
1210 (foperator_unordered_ge::op1_range): Same.
1211 (foperator_unordered_ge::op2_range): Same.
1213 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
1215 * value-range.h (frange::update_nan): New.
1217 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
1219 * range-op-float.cc (operator_not_equal::op2_range): New.
1220 * range-op-mixed.h: Add operator_not_equal::op2_range.
1222 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
1224 PR tree-optimization/110080
1225 PR tree-optimization/110249
1226 * tree-vrp.cc (remove_unreachable::final_p): New.
1227 (remove_unreachable::maybe_register): Rename from
1228 maybe_register_block and call early or final routine.
1229 (fully_replaceable): New.
1230 (remove_unreachable::handle_early): New.
1231 (remove_unreachable::remove_and_update_globals): Remove
1232 non-final processing.
1233 (rvrp_folder::rvrp_folder): Add final flag to constructor.
1234 (rvrp_folder::post_fold_bb): Remove unreachable registration.
1235 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
1236 (execute_ranger_vrp): Adjust some call parameters.
1238 2023-09-19 Richard Biener <rguenther@suse.de>
1241 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
1243 * tree-pretty-print.cc (op_symbol): Likewise.
1244 (op_symbol_code): Print TDF_GIMPLE variant if requested.
1245 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
1247 (dump_gimple_cond): Likewise.
1249 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
1250 Pan Li <pan2.li@intel.com>
1252 * tree-streamer.h (bp_unpack_machine_mode): If
1253 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
1255 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1257 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
1259 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1261 * config/riscv/autovec.md: Extend VLS modes.
1262 * config/riscv/vector.md: Ditto.
1264 2023-09-19 Richard Biener <rguenther@suse.de>
1266 PR tree-optimization/111465
1267 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
1268 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
1270 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1272 * config/riscv/autovec.md: Extend VLS floating-point modes.
1273 * config/riscv/vector.md: Ditto.
1275 2023-09-19 Jakub Jelinek <jakub@redhat.com>
1277 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
1278 nor check type_has_mode_precision_p for width larger than [TD]Imode
1280 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
1281 to type. Use boolean_true_node instead of
1282 constant_boolean_node (true, boolean_type_node). Formatting fixes.
1284 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1286 * config/riscv/autovec.md: Add VLS modes.
1287 * config/riscv/vector.md: Ditto.
1289 2023-09-19 Jakub Jelinek <jakub@redhat.com>
1291 * tree.cc (build_bitint_type): Assert precision is not 0, or
1293 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
1294 of unsigned _BitInt(1).
1296 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
1298 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
1299 Removed old combine patterns.
1300 (*single_<optab>mult_plus<mode>): Ditto.
1301 (*double_<optab>mult_plus<mode>): Ditto.
1302 (*sign_zero_extend_fma): Ditto.
1303 (*zero_sign_extend_fma): Ditto.
1304 (*double_widen_fma<mode>): Ditto.
1305 (*single_widen_fma<mode>): Ditto.
1306 (*double_widen_fnma<mode>): Ditto.
1307 (*single_widen_fnma<mode>): Ditto.
1308 (*double_widen_fms<mode>): Ditto.
1309 (*single_widen_fms<mode>): Ditto.
1310 (*double_widen_fnms<mode>): Ditto.
1311 (*single_widen_fnms<mode>): Ditto.
1312 (*reduc_plus_scal_<mode>): Adjust name.
1313 (*widen_reduc_plus_scal_<mode>): Adjust name.
1314 (*dual_widen_fma<mode>): New combine pattern.
1315 (*dual_widen_fmasu<mode>): Ditto.
1316 (*dual_widen_fmaus<mode>): Ditto.
1317 (*dual_fma<mode>): Ditto.
1318 (*single_fma<mode>): Ditto.
1319 (*dual_fnma<mode>): Ditto.
1320 (*single_fnma<mode>): Ditto.
1321 (*dual_fms<mode>): Ditto.
1322 (*single_fms<mode>): Ditto.
1323 (*dual_fnms<mode>): Ditto.
1324 (*single_fnms<mode>): Ditto.
1325 * config/riscv/autovec.md (fma<mode>4):
1326 Reafctor fma pattern.
1327 (*fma<VI:mode><P:mode>): Removed.
1328 (fnma<mode>4): Reafctor.
1329 (*fnma<VI:mode><P:mode>): Removed.
1330 (*fma<VF:mode><P:mode>): Removed.
1331 (*fnma<VF:mode><P:mode>): Removed.
1332 (fms<mode>4): Reafctor.
1333 (*fms<VF:mode><P:mode>): Removed.
1334 (fnms<mode>4): Reafctor.
1335 (*fnms<VF:mode><P:mode>): Removed.
1336 * config/riscv/riscv-protos.h (prepare_ternary_operands):
1338 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
1339 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
1340 (*pred_mul_plus<mode>): Removed.
1341 (*pred_mul_plus<mode>_scalar): Removed.
1342 (*pred_mul_plus<mode>_extended_scalar): Removed.
1343 (*pred_minus_mul<mode>_undef): New pattern.
1344 (*pred_minus_mul<mode>): Removed.
1345 (*pred_minus_mul<mode>_scalar): Removed.
1346 (*pred_minus_mul<mode>_extended_scalar): Removed.
1347 (*pred_mul_<optab><mode>_undef): New pattern.
1348 (*pred_mul_<optab><mode>): Removed.
1349 (*pred_mul_<optab><mode>_scalar): Removed.
1350 (*pred_mul_neg_<optab><mode>_undef): New pattern.
1351 (*pred_mul_neg_<optab><mode>): Removed.
1352 (*pred_mul_neg_<optab><mode>_scalar): Removed.
1354 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
1356 * config/riscv/riscv-vector-builtins.cc
1357 (builtin_decl, expand_builtin): Replace SVE with RVV.
1359 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
1361 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
1362 riscv-cmo.def and riscv-scalar-crypto.def.
1364 2023-09-18 Pan Li <pan2.li@intel.com>
1366 * config/riscv/autovec.md: Extend to vls mode.
1368 2023-09-18 Pan Li <pan2.li@intel.com>
1370 * config/riscv/autovec.md: Bugfix.
1371 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
1373 2023-09-18 Andrew Pinski <apinski@marvell.com>
1375 PR tree-optimization/111442
1376 * match.pd (zero_one_valued_p): Have the bit_and match not be
1379 2023-09-18 Andrew Pinski <apinski@marvell.com>
1381 PR tree-optimization/111435
1382 * match.pd (zero_one_valued_p): Don't do recursion
1385 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
1387 * config/darwin-protos.h (enum darwin_external_toolchain): New.
1388 * config/darwin.cc (DSYMUTIL_VERSION): New.
1389 (darwin_override_options): Choose the default debug DWARF version
1390 depending on the configured dsymutil version.
1392 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
1394 * configure: Regenerate.
1395 * configure.ac: Handle explict disable of stdlib option, set
1396 defaults for Darwin.
1398 2023-09-18 Andrew Pinski <apinski@marvell.com>
1400 PR tree-optimization/111431
1401 * match.pd (`(a == CST) & a`): New pattern.
1403 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1405 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
1406 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
1408 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
1411 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
1412 Add support for immediates using shifted ORR/BIC.
1413 (aarch64_split_dimode_const_store): Apply if we save one instruction.
1414 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
1415 Make pattern global.
1417 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
1419 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
1420 (neoverse-v1): Place before zeus.
1421 (neoverse-v2): Place before demeter.
1422 * config/aarch64/aarch64-tune.md: Regenerate.
1424 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1426 * config/riscv/autovec.md: Add VLS modes.
1427 * config/riscv/vector-iterators.md: Ditto.
1428 * config/riscv/vector.md: Ditto.
1430 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1432 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
1433 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
1435 2023-09-18 Richard Biener <rguenther@suse.de>
1437 PR tree-optimization/111294
1438 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
1440 (back_threader::find_paths_to_names): Adjust.
1441 (back_threader::maybe_thread_block): Likewise.
1442 (back_threader_profitability::possibly_profitable_path_p): Remove
1443 code applying extra costs to copies PHIs.
1445 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1447 * config/riscv/autovec.md: Extend VLS modes.
1448 * config/riscv/vector.md: Ditto.
1450 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1452 * config/riscv/vector.md (mov<mode>): New pattern.
1453 (*mov<mode>_mem_to_mem): Ditto.
1454 (*mov<mode>): Ditto.
1455 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
1456 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
1457 (*mov<mode>_vls): Ditto.
1458 (movmisalign<mode>): Ditto.
1459 (@vec_duplicate<mode>): Ditto.
1460 * config/riscv/autovec-vls.md: Removed.
1462 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1465 * config/riscv/autovec.md: Add VLS modes.
1467 2023-09-18 Jason Merrill <jason@redhat.com>
1469 * doc/gty.texi: Add discussion of cache vs. deletable.
1471 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1473 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
1474 (copysign<mode>3): Ditto.
1475 (xorsign<mode>3): Ditto.
1476 (<optab><mode>2): Ditto.
1477 * config/riscv/autovec.md: Extend VLS modes.
1479 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
1481 PR middle-end/111303
1482 * match.pd ((t * 2) / 2): Update pattern.
1484 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
1486 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
1488 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1491 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
1492 (vec_extract<mode><vel>): Ditto.
1493 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
1494 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
1495 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
1497 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
1499 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
1500 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
1501 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
1502 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
1503 new insn/expansions.
1504 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
1505 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
1506 (*riscv_<sha256_op>_si): New raw instruction for RV32.
1507 (*riscv_<sm3_op>_si): Ditto.
1508 (*riscv_<sm4_op>_si): Ditto.
1509 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
1510 (riscv_<sm3_op>_di_extended): Ditto.
1511 (riscv_<sm4_op>_di_extended): Ditto.
1512 (riscv_<sha256_op>_si): New common instruction expansion.
1513 (riscv_<sm3_op>_si): Ditto.
1514 (riscv_<sm4_op>_si): Ditto.
1515 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
1516 "crypto_zksh" and "crypto_zksed". Remove availability
1517 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
1518 * config/riscv/riscv-ftypes.def: Remove unused function type.
1519 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
1520 intrinsics to operate on uint32_t.
1522 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
1524 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
1525 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
1526 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
1527 Removed as no longer used.
1528 (RISCV_ATYPE_UDI): New for uint64_t.
1529 * config/riscv/riscv-cmo.def: Make types unsigned for not working
1530 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
1531 argument/return types.
1532 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
1533 number and shift amount types unsigned.
1534 * config/riscv/riscv-scalar-crypto.def: Ditto.
1536 2023-09-16 Pan Li <pan2.li@intel.com>
1538 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
1540 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
1542 * config/riscv/predicates.md: Restrict predicate
1543 to allow 'reg' only.
1545 2023-09-15 Andrew Pinski <apinski@marvell.com>
1547 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
1548 Also match `a & zero_one_valued_p` too.
1550 2023-09-15 Andrew Pinski <apinski@marvell.com>
1552 PR tree-optimization/111414
1553 * match.pd (`(1 >> X) != 0`): Check to see if
1554 the integer_onep was an integral type (not a vector type).
1556 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
1558 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
1559 run phi analysis, and do it before loop analysis.
1561 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
1563 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
1566 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
1568 PR tree-optimization/111407
1569 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
1570 when one of the operands is subject to abnormal coalescing.
1572 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
1574 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
1575 (enum insn_type): Ditto.
1576 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
1577 (emit_vlmax_insn): Adjust.
1578 (emit_nonvlmax_insn): Adjust.
1579 (emit_vlmax_insn_lra): Adjust.
1581 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
1583 * config/riscv/autovec-opt.md: Adjust.
1584 * config/riscv/autovec.md: Ditto.
1585 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
1586 (expand_reduction): Adjust expand_reduction prototype.
1587 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
1588 (expand_reduction): Refactor expand_reduction.
1590 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
1593 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
1594 the lower memory access to a mem-pair operand.
1596 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
1598 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
1599 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
1600 before the driver canonicalization routines.
1601 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
1602 to loongarch-driver.h
1603 * config/loongarch/t-linux: Move multilib-related definitions to
1605 * config/loongarch/t-multilib: New file. Inject library build
1606 options obtained from --with-multilib-list.
1607 * config/loongarch/t-loongarch: Same.
1609 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
1612 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
1613 New combine pattern.
1614 (*fold_left_widen_plus_<mode>): Ditto.
1615 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
1616 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
1617 Change from define_expand to define_insn_and_split.
1618 (fold_left_plus_<mode>): Ditto.
1619 (mask_len_fold_left_plus_<mode>): Ditto.
1620 * config/riscv/riscv-v.cc (expand_reduction):
1621 Support widen reduction.
1622 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
1623 Add new iterators and attrs.
1625 2023-09-14 David Malcolm <dmalcolm@redhat.com>
1627 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
1628 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
1629 (sarif_thread_flow::sarif_thread_flow): New.
1630 (sarif_builder::make_code_flow_object): Reimplement, creating
1631 per-thread threadFlow objects, populating them with the relevant
1633 (sarif_builder::make_thread_flow_object): Delete, moving the
1634 code into sarif_builder::make_code_flow_object.
1635 (sarif_builder::make_thread_flow_location_object): Add
1636 "path_event_idx" param. Use it to set "executionOrder"
1638 * diagnostic-path.h (diagnostic_event::get_thread_id): New
1640 (class diagnostic_thread): New.
1641 (diagnostic_path::num_threads): New pure-virtual vfunc.
1642 (diagnostic_path::get_thread): New pure-virtual vfunc.
1643 (diagnostic_path::multithreaded_p): New decl.
1644 (simple_diagnostic_event::simple_diagnostic_event): Add optional
1646 (simple_diagnostic_event::get_thread_id): New accessor.
1647 (simple_diagnostic_event::m_thread_id): New.
1648 (class simple_diagnostic_thread): New.
1649 (simple_diagnostic_path::simple_diagnostic_path): Move definition
1651 (simple_diagnostic_path::num_threads): New.
1652 (simple_diagnostic_path::get_thread): New.
1653 (simple_diagnostic_path::add_thread): New.
1654 (simple_diagnostic_path::add_thread_event): New.
1655 (simple_diagnostic_path::m_threads): New.
1656 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
1657 param for overriding the context's printer.
1658 (diagnostic_show_locus): Likwise.
1659 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
1660 Move here from diagnostic-path.h. Add main thread.
1661 (simple_diagnostic_path::num_threads): New.
1662 (simple_diagnostic_path::get_thread): New.
1663 (simple_diagnostic_path::add_thread): New.
1664 (simple_diagnostic_path::add_thread_event): New.
1665 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
1666 param and use it to initialize m_thread_id. Reformat.
1667 * diagnostic.h: Add pretty_printer param for overriding the
1669 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
1670 (can_consolidate_events): Compare thread ids.
1671 (class per_thread_summary): New.
1672 (event_range::event_range): Add per_thread_summary arg.
1673 (event_range::print): Add "pp" param and use it rather than dc's
1675 (event_range::m_thread_id): New field.
1676 (event_range::m_per_thread_summary): New field.
1677 (path_summary::multithreaded_p): New.
1678 (path_summary::get_events_for_thread_id): New.
1679 (path_summary::m_per_thread_summary): New field.
1680 (path_summary::m_thread_id_to_events): New field.
1681 (path_summary::get_or_create_events_for_thread_id): New.
1682 (path_summary::path_summary): Create per_thread_summary instances
1683 as needed and associate the event_range instances with them.
1684 (base_indent): Move here from print_path_summary_as_text.
1685 (per_frame_indent): Likewise.
1686 (class thread_event_printer): New, adapted from parts of
1687 print_path_summary_as_text.
1688 (print_path_summary_as_text): Make static. Reimplement to
1689 moving most of existing code to class thread_event_printer,
1690 capturing state as per-thread as appropriate.
1691 (default_tree_diagnostic_path_printer): Add missing 'break' on
1694 2023-09-14 David Malcolm <dmalcolm@redhat.com>
1696 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
1697 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
1698 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
1699 clearing the deletable gcc_root_tab_t.
1700 (ggc_common_finalize): New.
1701 * ggc.h (ggc_common_finalize): New decl.
1702 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
1703 ggc_common_finalize.
1705 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
1707 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
1708 unsigned comparisons.
1709 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
1710 generation of salt/saltu instructions.
1711 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
1712 * config/xtensa/xtensa.md (salt, saltu): New instruction
1715 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
1717 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
1720 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
1722 * config/riscv/autovec.md: Change rtx code to unspec.
1723 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
1724 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
1725 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
1727 (class widen_freducop): Removed.
1728 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
1729 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
1730 (@pred_<reduc_op><mode>): New name.
1731 (@pred_widen_reduc_plus<v_su><mode>): Change name.
1732 (@pred_reduc_plus<order><mode>): Change name.
1733 (@pred_widen_reduc_plus<order><mode>): Change name.
1735 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
1737 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
1738 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
1739 * config/riscv/vector-iterators.md: New iterators and attrs.
1740 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
1742 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
1743 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
1744 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
1745 (@pred_reduc_<reduc><mode>): Added.
1746 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
1747 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
1748 (@pred_widen_reduc_plus<v_su><mode>): Added.
1749 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
1750 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
1751 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
1752 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
1753 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
1754 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
1755 (@pred_reduc_plus<order><mode>): Added.
1756 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
1757 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
1758 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
1759 (@pred_widen_reduc_plus<order><mode>): Added.
1761 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
1763 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
1764 Move WHILELO handling to...
1765 (aarch64_vector_costs::finish_cost): ...here. Check whether the
1766 vectorizer has decided to use a predicated loop.
1768 2023-09-14 Andrew Pinski <apinski@marvell.com>
1770 PR tree-optimization/106164
1771 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
1772 Expand to support constants that are off by one.
1774 2023-09-14 Andrew Pinski <apinski@marvell.com>
1776 * genmatch.cc (parser::parse_result): For an else clause
1777 of an if statement inside a switch, error out explictly.
1779 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1781 * config/riscv/autovec-opt.md: Add VLS mask modes.
1782 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
1783 (vcond_mask_<mode><vm>): Add VLS mask modes.
1784 * config/riscv/vector.md: Ditto.
1786 2023-09-14 Richard Biener <rguenther@suse.de>
1788 PR tree-optimization/111294
1789 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
1790 operands that eventually become dead and use simple_dce_from_worklist
1791 to remove their definitions if they did so.
1793 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
1795 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
1796 Accept all nonimmediate_operands, but keep the existing constraints.
1797 If the instruction is split before RA, load invalid addresses into
1798 a temporary register.
1799 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
1801 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1804 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
1805 (vector_insn_info::global_merge): Ditto.
1806 (vector_insn_info::get_avl_or_vl_reg): Ditto.
1808 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1810 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
1812 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
1814 * config/loongarch/loongarch-def.c: Modify the default value of
1817 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
1819 * config/xtensa/xtensa.cc (xtensa_expand_scc):
1820 Revert the changes from the last patch, as the work in the RTL
1821 expansion pass is too far to determine the physical registers.
1822 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
1823 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
1825 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
1828 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
1830 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1832 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
1833 (@vec_extract<mode><vel>): Ditto.
1834 * config/riscv/vector.md: Ditto
1836 2023-09-13 Andrew Pinski <apinski@marvell.com>
1838 * match.pd (`X <= MAX(X, Y)`):
1839 Move before `MIN (X, C1) < C2` pattern.
1841 2023-09-13 Andrew Pinski <apinski@marvell.com>
1843 PR tree-optimization/111364
1844 * match.pd (`MIN (X, Y) == X`): Extend
1845 to min/lt, min/ge, max/gt, max/le.
1847 2023-09-13 Andrew Pinski <apinski@marvell.com>
1849 PR tree-optimization/111345
1850 * match.pd (`Y > (X % Y)`): Merge
1852 (`(X % Y) < Y`): Pattern by adding `:c`
1855 2023-09-13 Richard Biener <rguenther@suse.de>
1857 PR tree-optimization/111387
1858 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
1859 EDGE_DFS_BACK when doing BB vectorization.
1860 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
1861 to compute RPO and mark backedges.
1863 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
1865 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
1866 New combine pattern.
1867 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
1868 (<mulh_table><mode>3_highpart): Merged pattern.
1869 (umul<mode>3_highpart): Mrege smul and umul.
1870 * config/riscv/vector-iterators.md (umul): New iterators.
1871 (UNSPEC_VMULHU): New iterators.
1873 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
1875 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
1876 New combine pattern.
1877 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
1879 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
1881 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
1882 (*cond_copysign<mode>): New combine pattern.
1883 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
1885 2023-09-13 Richard Biener <rguenther@suse.de>
1887 PR tree-optimization/111397
1888 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
1889 argument to specify whether the PHI destination doesn't flow in
1890 from an abnormal PHI.
1891 (propagate_value): Adjust.
1892 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
1894 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
1896 (process_bb): Likewise.
1898 2023-09-13 Pan Li <pan2.li@intel.com>
1901 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
1903 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
1905 PR tree-optimization/111303
1906 * match.pd ((X - N * M) / N): Add undefined_p checking.
1907 ((X + N * M) / N): Likewise.
1908 ((X + C) div_rshift N): Likewise.
1910 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1913 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
1915 2023-09-12 Martin Jambor <mjambor@suse.cz>
1917 * dbgcnt.def (form_fma): New.
1918 * tree-ssa-math-opts.cc: Include dbgcnt.h.
1919 (convert_mult_to_fma): Bail out if the debug counter say so.
1921 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
1923 * config/riscv/autovec-opt.md: Update type
1924 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
1926 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1928 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
1930 (aarch64_layout_frame): Use it to decide whether locals should
1931 go above or below the saved registers.
1932 (aarch64_expand_prologue): Update stack layout comment.
1933 Emit a stack tie after the final adjustment.
1935 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1937 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
1938 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
1939 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
1941 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1943 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
1944 (aarch64_frame::hard_fp_save_and_probe): New fields.
1945 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
1946 Rather than asserting that a leaf function saves LR, instead assert
1947 that a leaf function saves something.
1948 (aarch64_get_separate_components): Prevent the chosen probe
1949 registers from being individually shrink-wrapped.
1950 (aarch64_allocate_and_probe_stack_space): Remove workaround for
1951 probe registers that aren't at the bottom of the previous allocation.
1953 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1955 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
1956 Always probe the residual allocation at offset 1024, asserting
1957 that that is in range.
1959 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1961 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
1962 the LR save slot is in the first 16 bytes of the register save area.
1963 Only form STP/LDP push/pop candidates if both registers are valid.
1964 (aarch64_allocate_and_probe_stack_space): Remove workaround for
1965 when LR was not in the first 16 bytes.
1967 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1969 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
1970 Don't probe final allocations that are exactly 1KiB in size (after
1971 unprobed space above the final allocation has been deducted).
1973 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1975 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
1976 calculation of initial_adjust for frames in which all saves
1979 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1981 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
1982 the allocation of the top of the frame.
1984 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1986 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
1988 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
1989 from the bottom of the frame, rather than the bottom of the saved
1990 register area. Measure reg_offset from the bottom of the frame
1991 rather than the bottom of the saved register area.
1992 (aarch64_save_callee_saves): Update accordingly.
1993 (aarch64_restore_callee_saves): Likewise.
1994 (aarch64_get_separate_components): Likewise.
1995 (aarch64_process_components): Likewise.
1997 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1999 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
2001 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2003 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
2005 (aarch64_frame::bytes_above_hard_fp): ...this.
2006 * config/aarch64/aarch64.cc (aarch64_layout_frame)
2007 (aarch64_expand_prologue): Update accordingly.
2008 (aarch64_initial_elimination_offset): Likewise.
2010 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2012 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
2013 (aarch64_frame::bytes_above_locals): ...this.
2014 * config/aarch64/aarch64.cc (aarch64_layout_frame)
2015 (aarch64_initial_elimination_offset): Update accordingly.
2017 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2019 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
2020 calculation of chain_offset into the emit_frame_chain block.
2022 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2024 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
2025 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
2026 callee_offset handling.
2027 (aarch64_save_callee_saves): Replace the start_offset parameter
2028 with a bytes_below_sp parameter.
2029 (aarch64_restore_callee_saves): Likewise.
2030 (aarch64_expand_prologue): Update accordingly.
2031 (aarch64_expand_epilogue): Likewise.
2033 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2035 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
2037 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
2038 (aarch64_expand_epilogue): Use it instead of
2039 below_hard_fp_saved_regs_size.
2041 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2043 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
2045 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
2046 and use it instead of crtl->outgoing_args_size.
2047 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
2048 of outgoing_args_size.
2049 (aarch64_process_components): Likewise.
2051 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2053 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
2054 allocate the frame in one go if there are no saved registers.
2056 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2058 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
2059 chain_offset rather than callee_offset.
2061 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
2063 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
2064 a local shorthand for cfun->machine->frame.
2065 (aarch64_restore_callee_saves, aarch64_get_separate_components):
2066 (aarch64_process_components): Likewise.
2067 (aarch64_allocate_and_probe_stack_space): Likewise.
2068 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
2069 (aarch64_layout_frame): Use existing shorthand for one more case.
2071 2023-09-12 Andrew Pinski <apinski@marvell.com>
2073 PR tree-optimization/107881
2074 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
2075 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
2077 2023-09-12 Pan Li <pan2.li@intel.com>
2079 * config/riscv/riscv-vector-costs.h (struct range): Removed.
2081 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2083 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
2084 (compute_nregs_for_mode): Ditto.
2085 (live_range_conflict_p): Ditto.
2086 (max_number_of_live_regs): Ditto.
2087 (compute_lmul): Ditto.
2088 (costs::prefer_new_lmul_p): Ditto.
2089 (costs::better_main_loop_than_p): Ditto.
2090 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
2091 (struct var_live_range): Ditto.
2092 (struct autovec_info): Ditto.
2093 * config/riscv/t-riscv: Update makefile for COST model.
2095 2023-09-12 Jakub Jelinek <jakub@redhat.com>
2097 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
2100 2023-09-12 Jakub Jelinek <jakub@redhat.com>
2102 PR middle-end/111338
2103 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
2105 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
2106 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
2107 optimization if type's precision is too large for
2108 vn_walk_cb_data::bufsize.
2110 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
2112 * doc/gm2.texi (Compiler options): Document new option
2115 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
2117 * doc/sourcebuild.texi (stack_size): Update.
2119 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
2121 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
2122 (<optab>_not<mode>3): Likewise.
2123 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
2125 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
2127 (GEN_EMIT_HELPER2): Likewise.
2128 (emit_strcmp_scalar_compare_byte): New function.
2129 (emit_strcmp_scalar_compare_subword): Likewise.
2130 (emit_strcmp_scalar_compare_word): Likewise.
2131 (emit_strcmp_scalar_load_and_compare): Likewise.
2132 (emit_strcmp_scalar_call_to_libc): Likewise.
2133 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
2134 (emit_strcmp_scalar_result_calculation): Likewise.
2135 (riscv_expand_strcmp_scalar): Likewise.
2136 (riscv_expand_strcmp): Likewise.
2137 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
2139 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
2140 (cmpstrnsi): Invoke expansion function for str(n)cmp.
2141 (cmpstrsi): Likewise.
2142 * config/riscv/riscv.opt: Add new parameter
2143 '-mstring-compare-inline-limit'.
2144 * doc/invoke.texi: Document new parameter
2145 '-mstring-compare-inline-limit'.
2147 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
2149 * config.gcc: Add new object riscv-string.o.
2151 * config/riscv/riscv-protos.h (riscv_expand_strlen):
2153 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
2154 * config/riscv/riscv.opt: New flag 'minline-strlen'.
2155 * config/riscv/t-riscv: Add new object riscv-string.o.
2156 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
2157 (th_rev<mode>2): Likewise.
2158 (th_tstnbz<mode>2): New INSN.
2159 * doc/invoke.texi: Document '-minline-strlen'.
2160 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
2161 (emit_unlikely_jump_insn): Likewise.
2162 * rtl.h (emit_likely_jump_insn): New prototype.
2163 (emit_unlikely_jump_insn): Likewise.
2164 * config/riscv/riscv-string.cc: New file.
2166 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
2168 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
2169 (TARGET_SUPPORTS_ALIASES): Define.
2171 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
2173 * doc/sourcebuild.texi (check-function-bodies): Update.
2175 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
2177 * gimplify.cc (gimplify_bind_expr): Check for
2178 insertion after variable cleanup. Convert 'omp allocate'
2179 var-decl attribute to GOMP_alloc/GOMP_free calls.
2181 2023-09-12 xuli <xuli1@eswincomputing.com>
2183 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
2184 parameter e and replace NULL_RTX with gcc_unreachable.
2186 2023-09-12 xuli <xuli1@eswincomputing.com>
2188 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
2190 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2191 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
2192 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
2194 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
2195 * config/riscv/riscv-vector-builtins.cc: Add args type.
2197 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
2199 * config/riscv/riscv.cc
2200 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
2201 riscv_avoid_shrink_wrapping_separate.
2202 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
2204 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
2206 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
2208 * shrink-wrap.cc (try_shrink_wrapping_separate):call
2209 use_shrink_wrapping_separate.
2210 (use_shrink_wrapping_separate): wrap the condition
2211 check in use_shrink_wrapping_separate.
2212 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
2214 2023-09-11 Andrew Pinski <apinski@marvell.com>
2216 PR tree-optimization/111348
2217 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
2218 the cmp part of the pattern.
2220 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
2223 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
2224 Call output_addr_const for CASE_CONST_SCALAR_INT.
2226 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2228 * config/riscv/thead.md: Update types
2230 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2232 * config/riscv/riscv.md: Update types
2234 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2236 * config/riscv/riscv.md: Add "zicond" type
2237 * config/riscv/zicond.md: Update types
2239 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2241 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
2242 * config/riscv/zc.md: Update types
2244 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
2246 * config/riscv/autovec-opt.md: Update types
2247 * config/riscv/autovec.md: likewise
2249 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2251 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
2253 (s390_vec_unsigned_flt): Ditto.
2254 (s390_vec_revb_flt): Ditto.
2255 (s390_vec_reve_flt): Ditto.
2256 (s390_vclfnhs): Fix operand flags.
2257 (s390_vclfnls): Ditto.
2258 (s390_vcrnfs): Ditto.
2262 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2264 * config/s390/s390-builtins.def (O_U64): New.
2269 (O_M12): Change bit position.
2280 (OB_DEF_VAR): Add operand constraints.
2282 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
2285 2023-09-11 Andrew Pinski <apinski@marvell.com>
2287 PR tree-optimization/111349
2288 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
2289 the cmp part of the pattern.
2291 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2294 * config/riscv/riscv.opt: Set default as scalable vectorization.
2296 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2298 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
2299 (get_all_successors): Ditto.
2300 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
2301 (get_all_successors): Ditto.
2303 2023-09-11 Jakub Jelinek <jakub@redhat.com>
2305 PR middle-end/111329
2306 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
2307 function. For printing values which don't fit into digit_buffer
2308 use out-of-line function.
2309 * wide-int-print.h (pp_wide_int_large): Declare.
2310 * wide-int-print.cc: Include pretty-print.h.
2311 (pp_wide_int_large): Define.
2313 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2315 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
2316 Use dominance analysis.
2317 (pass_vsetvl::init): Ditto.
2318 (pass_vsetvl::done): Ditto.
2320 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2323 * config/riscv/autovec.md: Add VLS modes.
2324 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
2325 (cmp_lmul_gt_one): Ditto.
2326 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
2327 (cmp_lmul_gt_one): Ditto.
2328 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
2329 (riscv_vectorize_vec_perm_const): Ditto.
2330 * config/riscv/vector-iterators.md: Ditto.
2331 * config/riscv/vector.md: Ditto.
2333 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2335 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
2336 * config/riscv/vector-iterators.md: New iterator
2338 2023-09-11 Andrew Pinski <apinski@marvell.com>
2340 PR tree-optimization/111346
2341 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
2344 2023-09-11 liuhongt <hongtao.liu@intel.com>
2348 * config/i386/sse.md (int_comm): New int_attr.
2349 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
2350 Remove % for Complex conjugate operations since they're not
2352 (fma_<complexpairopname>_<mode>_pair): Ditto.
2353 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
2354 (cmul<conj_op><mode>3): Ditto.
2356 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2358 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
2359 fixed-vlmax/vls vector permutation.
2361 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2363 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
2365 2023-09-10 Andrew Pinski <apinski@marvell.com>
2367 PR tree-optimization/111331
2368 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
2369 Fix the LE/GE comparison to the correct value.
2370 * tree-ssa-phiopt.cc (minmax_replacement):
2371 Fix the LE/GE comparison for the
2372 `(a CMP CST1) ? max<a,CST2> : a` optimization.
2374 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
2376 * config/darwin.cc (darwin_function_section): Place unlikely
2377 executed global init code into the standard cold section.
2379 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2382 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
2383 (pass_vsetvl::pre_vsetvl): Ditto.
2384 (pass_vsetvl::init): Ditto.
2385 (pass_vsetvl::lazy_vsetvl): Ditto.
2387 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
2389 * config/loongarch/loongarch.md (mulsidi3_64bit):
2390 Field unsigned extension support.
2391 (<u>muldi3_highpart): Modify template name.
2392 (<u>mulsi3_highpart): Likewise.
2393 (<u>mulsidi3_64bit): Field unsigned extension support.
2394 (<su>muldi3_highpart): Modify muldi3_highpart to
2396 (<su>mulsi3_highpart): Modify mulsi3_highpart to
2399 2023-09-09 Xi Ruoyao <xry111@xry111.site>
2401 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
2402 Check precondition (delta must be a power of 2) and use
2403 popcount_hwi instead of a homebrew loop.
2405 2023-09-09 Xi Ruoyao <xry111@xry111.site>
2407 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
2408 Define to the maximum amount of bytes able to be loaded or
2409 stored with one machine instruction.
2410 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
2411 New static function.
2412 (loongarch_block_move_straight): Call
2413 loongarch_mode_for_move_size for machine_mode to be moved.
2414 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
2415 instead of UNITS_PER_WORD.
2417 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2419 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
2421 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
2423 * fold-const.cc (can_min_p): New function.
2424 (poly_int_binop): Try fold MIN_EXPR.
2426 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
2428 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
2429 case VREL_EQ nor call frelop_early_resolve.
2431 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
2433 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
2435 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
2436 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
2438 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
2440 * config/riscv/thead.md: Use more appropriate mode attributes
2443 2023-09-08 Guo Jie <guojie@loongson.cn>
2445 * common/config/loongarch/loongarch-common.cc:
2446 (default_options loongarch_option_optimization_table):
2447 Default to -fsched-pressure.
2449 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
2451 * config.gcc: remove non-POSIX syntax "<<<".
2453 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
2455 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
2456 Rename postfix to _bitmanip.
2457 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
2458 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
2460 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2462 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
2464 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2466 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
2468 2023-09-07 liuhongt <hongtao.liu@intel.com>
2470 * config/i386/sse.md
2471 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
2472 (VHFBF_AVX512VL): New mode iterator.
2473 (VI2HFBF_AVX512VL): New mode iterator.
2475 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
2477 * value-range.h (contains_zero_p): Return false for undefined ranges.
2478 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
2479 contains_zero_p change above.
2480 (operator_ge::op1_op2_relation): Same.
2481 (operator_equal::op1_op2_relation): Same.
2482 (operator_not_equal::op1_op2_relation): Same.
2483 (operator_lt::op1_op2_relation): Same.
2484 (operator_le::op1_op2_relation): Same.
2485 (operator_ge::op1_op2_relation): Same.
2486 * range-op.cc (operator_equal::op1_op2_relation): Same.
2487 (operator_not_equal::op1_op2_relation): Same.
2488 (operator_lt::op1_op2_relation): Same.
2489 (operator_le::op1_op2_relation): Same.
2490 (operator_cast::op1_range): Same.
2491 (set_nonzero_range_from_mask): Same.
2492 (operator_bitwise_xor::op1_range): Same.
2493 (operator_addr_expr::fold_range): Same.
2494 (operator_addr_expr::op1_range): Same.
2496 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
2498 PR tree-optimization/110875
2499 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
2500 cache-prefilling routine when the ssa-name has no global value.
2502 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
2505 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
2506 (process_alt_operands): Set up the flag. Clear flag for chosen
2507 alternative with special memory constraints.
2508 (process_alt_operands): Set up used insn alternative depending on the flag.
2510 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2512 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
2513 * config/riscv/riscv.md: Ditto.
2514 * config/riscv/vector-iterators.md: Ditto.
2515 * config/riscv/vector.md: Ditto.
2517 2023-09-07 David Malcolm <dmalcolm@redhat.com>
2519 * diagnostic-core.h (error_meta): New decl.
2520 * diagnostic.cc (error_meta): New.
2522 2023-09-07 Jakub Jelinek <jakub@redhat.com>
2525 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
2526 inside gcc_assert, as later code relies on it filling info variable.
2527 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
2528 clear_padding_type): Likewise.
2529 * varasm.cc (output_constant): Likewise.
2530 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
2531 * stor-layout.cc (finish_bitfield_representative, layout_type):
2533 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
2535 2023-09-07 Xi Ruoyao <xry111@xry111.site>
2538 * config/loongarch/loongarch-protos.h
2539 (loongarch_pre_reload_split): Declare new function.
2540 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
2541 * config/loongarch/loongarch.cc
2542 (loongarch_pre_reload_split): Implement.
2543 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
2544 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
2546 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
2547 New define_insn_and_split.
2548 (bstrins_<mode>_for_ior_mask): Likewise.
2549 (define_peephole2): Further optimize code sequence produced by
2550 bstrins_<mode>_for_ior_mask if possible.
2552 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
2554 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
2555 rather than gen_rtx_PLUS.
2557 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2560 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
2561 (pass_vsetvl::df_post_optimization): Remove incorrect function.
2563 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
2565 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
2566 Parse 'XVentanaCondOps' extension.
2567 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
2568 (TARGET_XVENTANACONDOPS): Ditto.
2569 (TARGET_ZICOND_LIKE): New to represent targets with conditional
2570 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
2571 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
2572 with TARGET_ZICOND_LIKE.
2573 (riscv_expand_conditional_move): Ditto.
2574 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
2576 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
2577 * config/riscv/zicond.md: Modify description.
2578 (eqz_ventana): New to match corresponding czero instructions.
2579 (nez_ventana): Ditto.
2580 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
2581 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
2582 (*czero.<eqz>.<GPR><X>): Ditto.
2583 (*czero.eqz.<GPR><X>.opt1): Ditto.
2584 (*czero.nez.<GPR><X>.opt2): Ditto.
2586 2023-09-06 Ian Lance Taylor <iant@golang.org>
2589 * godump.cc (go_format_type): Handle BITINT_TYPE.
2591 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2594 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
2597 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2600 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
2601 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
2602 rather than make_edge, initialize bb->count.
2604 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2607 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
2608 Document general rules for _BitInt support library functions
2609 and document __mulbitint3 and __divmodbitint4.
2610 (Conversion functions): Document __fix{s,d,x,t}fbitint,
2611 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
2612 __bid_floatbitint{s,d,t}d.
2614 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2617 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
2620 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2623 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
2624 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
2625 check if all padding bits up to mode precision are zeros or sign
2626 bit copies and if not, jump to DO_ERROR.
2627 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
2628 Adjust expand_ubsan_result_store callers.
2629 * ubsan.cc: Include target.h and langhooks.h.
2630 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
2631 size converted to pointer sized integer, pass BITINT_TYPE values
2632 which fit into TImode (if supported) or DImode as those integer types
2633 or otherwise for now punt (pass 0).
2634 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
2635 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
2636 TImode/DImode precision rather than TK_Unknown used otherwise for
2637 large/huge BITINT_TYPEs.
2638 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
2639 they don't have mode precision.
2640 * ubsan.h (enum ubsan_print_style): New enumerator.
2642 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2645 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
2646 (ix86_bitint_type_info): New function.
2647 (TARGET_C_BITINT_TYPE_INFO): Redefine.
2649 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2652 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
2653 * passes.def: Add pass_lower_bitint after pass_lower_complex and
2654 pass_lower_bitint_O0 after pass_lower_complex_O0.
2655 * tree-pass.h (PROP_gimple_lbitint): Define.
2656 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
2657 * gimple-lower-bitint.h: New file.
2658 * tree-ssa-live.h (struct _var_map): Add bitint member.
2659 (init_var_map): Adjust declaration.
2660 (region_contains_p): Handle map->bitint like map->outofssa_p.
2661 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
2662 map->bitint and set map->outofssa_p to false if it is non-NULL.
2663 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
2664 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
2666 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
2667 not in that bitmap, and allow res without default def.
2668 (compute_optimized_partition_bases): In map->bitint mode try hard to
2669 coalesce any SSA_NAMEs with the same size.
2670 (coalesce_bitint): New function.
2671 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
2672 used_in_copies and call coalesce_bitint.
2673 * gimple-lower-bitint.cc: New file.
2675 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2678 * tree.def (BITINT_TYPE): New type.
2679 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
2680 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
2682 (BITINT_TYPE_P): Define.
2683 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
2684 they have BITINT_TYPE type.
2685 (tree_check6, tree_not_check6): New inline functions.
2686 (any_integral_type_check): Include BITINT_TYPE.
2687 (build_bitint_type): Declare.
2688 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
2689 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
2690 type_hash_canon): Handle BITINT_TYPE.
2691 (bitint_type_cache): New variable.
2692 (build_bitint_type): New function.
2693 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
2695 (tree_cc_finalize): Free bitint_type_cache.
2696 * builtins.cc (type_to_class): Handle BITINT_TYPE.
2697 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
2698 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
2700 * convert.cc (convert_to_pointer_1, convert_to_real_1,
2701 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
2702 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
2703 GET_MODE_PRECISION (TYPE_MODE (type)).
2704 * doc/generic.texi (BITINT_TYPE): Document.
2705 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
2706 * doc/tm.texi: Regenerated.
2707 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
2708 gen_type_die_with_usage): Handle BITINT_TYPE.
2709 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
2710 handle those which fit into shwi.
2711 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
2712 to bitfield precision reads from BITINT_TYPE vars, parameters or
2713 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
2715 * fold-const.cc (fold_convert_loc, make_range_step): Handle
2717 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
2718 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
2719 (native_encode_int, native_interpret_int, native_interpret_expr):
2721 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
2722 to some other integral type or vice versa conversions non-useless.
2723 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
2724 (clear_padding_unit): Mention in comment that _BitInt types don't need
2726 (clear_padding_bitint_needs_padding_p): New function.
2727 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
2728 (clear_padding_type): Likewise.
2729 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
2730 precision operands force pos_neg? to 1.
2731 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
2732 expand_BITINTTOFLOAT): New functions.
2733 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
2734 BITINTTOFLOAT): New internal functions.
2735 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
2736 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
2737 * match.pd (non-equality compare simplifications from fold_binary):
2738 Punt if TYPE_MODE (arg1_type) is BLKmode.
2739 * pretty-print.h (pp_wide_int): Handle printing of large precision
2740 wide_ints which would buffer overflow digit_buffer.
2741 * stor-layout.cc (finish_bitfield_representative): For bit-fields
2742 with BITINT_TYPE, prefer representatives with precisions in
2743 multiple of limb precision.
2744 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
2745 element type and assert it is BITINT_TYPE.
2746 * target.def (bitint_type_info): New C target hook.
2747 * target.h (struct bitint_info): New type.
2748 * targhooks.cc (default_bitint_type_info): New function.
2749 * targhooks.h (default_bitint_type_info): Declare.
2750 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
2751 Handle printing large wide_ints which would buffer overflow
2753 * tree-ssa-sccvn.cc: Include target.h.
2754 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
2756 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
2757 64-bit BITINT_TYPE subtract low bound from expression and cast to
2758 64-bit integer type both the controlling expression and case labels.
2759 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
2760 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
2761 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
2763 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
2764 unsigned_type_for rather than build_nonstandard_integer_type.
2766 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2769 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
2770 tieable for RVV modes.
2772 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2775 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
2777 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2779 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
2781 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
2783 * config/xtensa/xtensa.cc (xtensa_expand_scc):
2784 Add code for particular constants (only 0 and INT_MIN for now)
2785 for EQ/NE boolean evaluation in SImode.
2786 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
2787 implementation has been integrated into the above.
2789 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2792 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
2794 (*pred_widen_mulsu<mode>): Delete.
2795 (*pred_single_widen_mul<mode>): Delete.
2796 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
2797 Add new combine patterns.
2798 (*single_widen_sub<any_extend:su><mode>): Ditto.
2799 (*single_widen_add<any_extend:su><mode>): Ditto.
2800 (*single_widen_mult<any_extend:su><mode>): Ditto.
2801 (*dual_widen_mulsu<mode>): Ditto.
2802 (*dual_widen_mulus<mode>): Ditto.
2803 (*dual_widen_<optab><mode>): Ditto.
2804 (*single_widen_add<mode>): Ditto.
2805 (*single_widen_sub<mode>): Ditto.
2806 (*single_widen_mult<mode>): Ditto.
2807 * config/riscv/autovec.md (<optab><mode>3):
2808 Change define_expand to define_insn_and_split.
2809 (<optab><mode>2): Ditto.
2810 (abs<mode>2): Ditto.
2811 (smul<mode>3_highpart): Ditto.
2812 (umul<mode>3_highpart): Ditto.
2814 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2816 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
2817 (riscv_asm_output_alias): Ditto.
2818 (riscv_asm_output_external): Ditto.
2819 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
2820 Output .variant_cc directive for vector function.
2821 (riscv_declare_function_name): Ditto.
2822 (riscv_asm_output_alias): Ditto.
2823 (riscv_asm_output_external): Ditto.
2824 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
2825 Implement ASM_DECLARE_FUNCTION_NAME.
2826 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
2827 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
2829 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2831 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
2832 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
2833 (riscv_frame_info::reset): Reset new fileds.
2834 (riscv_call_tls_get_addr): Pass riscv_cc.
2835 (riscv_function_arg): Return riscv_cc for call patterm.
2836 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
2837 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
2838 (riscv_save_reg_p): Add vector callee-saved check.
2839 (riscv_stack_align): Add vector save area comment.
2840 (riscv_compute_frame_info): Ditto.
2841 (riscv_restore_reg): Update for type change.
2842 (riscv_for_each_saved_v_reg): New function save vector registers.
2843 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
2844 (riscv_expand_prologue): Ditto.
2845 (riscv_expand_epilogue): Ditto.
2846 (riscv_output_mi_thunk): Pass riscv_cc.
2847 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
2848 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
2849 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
2851 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2853 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
2854 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
2855 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
2856 (riscv_init_cumulative_args): Setup variant_cc field.
2857 (riscv_vector_type_p): New function for checking vector type.
2858 (riscv_hard_regno_nregs): Hoist declare.
2859 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
2860 (riscv_get_arg_info): Support vector cc.
2861 (riscv_function_arg_advance): Update cum.
2862 (riscv_pass_by_reference): Handle vector args.
2863 (riscv_v_abi): New function return vector abi.
2864 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
2865 (riscv_arguments_is_vector_type_p): New function for check vector returns.
2866 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
2867 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
2868 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
2869 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
2870 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
2871 (V_ARG_FIRST): Ditto.
2872 (V_ARG_LAST): Ditto.
2873 (enum riscv_cc): Define all RISCV_CC variants.
2874 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
2876 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2878 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
2879 Add sqrt + vcond_mask combine pattern.
2880 * config/riscv/autovec.md (<optab><mode>2):
2881 Change define_expand to define_insn_and_split.
2883 2023-09-06 Jason Merrill <jason@redhat.com>
2885 * common.opt: Update -fabi-version=19.
2887 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
2889 * config/riscv/zicond.md: Add closing parent to a comment.
2891 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
2893 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
2894 large constant cons/alt into a register.
2896 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
2898 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
2899 require one zero bit in the upper 32 bits for LI+RORI synthesis.
2901 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
2903 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
2905 2023-09-05 Andrew Pinski <apinski@marvell.com>
2907 PR tree-optimization/98710
2908 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
2909 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
2911 2023-09-05 Andrew Pinski <apinski@marvell.com>
2913 PR tree-optimization/103536
2914 * match.pd (`(x | y) & (x & z)`,
2915 `(x & y) | (x | z)`): New patterns.
2917 2023-09-05 Andrew Pinski <apinski@marvell.com>
2919 PR tree-optimization/107137
2920 * match.pd (`(nop_convert)-(convert)a`): New pattern.
2922 2023-09-05 Andrew Pinski <apinski@marvell.com>
2924 PR tree-optimization/96694
2925 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
2927 2023-09-05 Andrew Pinski <apinski@marvell.com>
2929 PR tree-optimization/105832
2930 * match.pd (`(1 >> X) != 0`): New pattern
2932 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
2934 * config/riscv/riscv.md: Update/Add types
2936 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
2938 * config/riscv/pic.md: Update types
2940 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
2942 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
2943 synthesis with rotate-right for XTheadBb.
2945 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
2947 * config/riscv/zicond.md: Fix op2 pattern.
2949 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
2951 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
2953 2023-09-05 Xi Ruoyao <xry111@xry111.site>
2955 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
2956 Define to 0 if not defined yet.
2958 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
2960 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
2961 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
2963 2023-09-05 Pan Li <pan2.li@intel.com>
2965 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
2966 * config/riscv/vector.md: Extend iterator for VLS.
2968 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2970 * config.gcc: Export the header file lasxintrin.h.
2971 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
2972 Add Loongson ASX builtin functions support.
2974 (LASX_BUILTIN): Ditto.
2975 (LASX_NO_TARGET_BUILTIN): Ditto.
2976 (LASX_BUILTIN_TEST_BRANCH): Ditto.
2977 (CODE_FOR_lasx_xvsadd_b): Ditto.
2978 (CODE_FOR_lasx_xvsadd_h): Ditto.
2979 (CODE_FOR_lasx_xvsadd_w): Ditto.
2980 (CODE_FOR_lasx_xvsadd_d): Ditto.
2981 (CODE_FOR_lasx_xvsadd_bu): Ditto.
2982 (CODE_FOR_lasx_xvsadd_hu): Ditto.
2983 (CODE_FOR_lasx_xvsadd_wu): Ditto.
2984 (CODE_FOR_lasx_xvsadd_du): Ditto.
2985 (CODE_FOR_lasx_xvadd_b): Ditto.
2986 (CODE_FOR_lasx_xvadd_h): Ditto.
2987 (CODE_FOR_lasx_xvadd_w): Ditto.
2988 (CODE_FOR_lasx_xvadd_d): Ditto.
2989 (CODE_FOR_lasx_xvaddi_bu): Ditto.
2990 (CODE_FOR_lasx_xvaddi_hu): Ditto.
2991 (CODE_FOR_lasx_xvaddi_wu): Ditto.
2992 (CODE_FOR_lasx_xvaddi_du): Ditto.
2993 (CODE_FOR_lasx_xvand_v): Ditto.
2994 (CODE_FOR_lasx_xvandi_b): Ditto.
2995 (CODE_FOR_lasx_xvbitsel_v): Ditto.
2996 (CODE_FOR_lasx_xvseqi_b): Ditto.
2997 (CODE_FOR_lasx_xvseqi_h): Ditto.
2998 (CODE_FOR_lasx_xvseqi_w): Ditto.
2999 (CODE_FOR_lasx_xvseqi_d): Ditto.
3000 (CODE_FOR_lasx_xvslti_b): Ditto.
3001 (CODE_FOR_lasx_xvslti_h): Ditto.
3002 (CODE_FOR_lasx_xvslti_w): Ditto.
3003 (CODE_FOR_lasx_xvslti_d): Ditto.
3004 (CODE_FOR_lasx_xvslti_bu): Ditto.
3005 (CODE_FOR_lasx_xvslti_hu): Ditto.
3006 (CODE_FOR_lasx_xvslti_wu): Ditto.
3007 (CODE_FOR_lasx_xvslti_du): Ditto.
3008 (CODE_FOR_lasx_xvslei_b): Ditto.
3009 (CODE_FOR_lasx_xvslei_h): Ditto.
3010 (CODE_FOR_lasx_xvslei_w): Ditto.
3011 (CODE_FOR_lasx_xvslei_d): Ditto.
3012 (CODE_FOR_lasx_xvslei_bu): Ditto.
3013 (CODE_FOR_lasx_xvslei_hu): Ditto.
3014 (CODE_FOR_lasx_xvslei_wu): Ditto.
3015 (CODE_FOR_lasx_xvslei_du): Ditto.
3016 (CODE_FOR_lasx_xvdiv_b): Ditto.
3017 (CODE_FOR_lasx_xvdiv_h): Ditto.
3018 (CODE_FOR_lasx_xvdiv_w): Ditto.
3019 (CODE_FOR_lasx_xvdiv_d): Ditto.
3020 (CODE_FOR_lasx_xvdiv_bu): Ditto.
3021 (CODE_FOR_lasx_xvdiv_hu): Ditto.
3022 (CODE_FOR_lasx_xvdiv_wu): Ditto.
3023 (CODE_FOR_lasx_xvdiv_du): Ditto.
3024 (CODE_FOR_lasx_xvfadd_s): Ditto.
3025 (CODE_FOR_lasx_xvfadd_d): Ditto.
3026 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
3027 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
3028 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
3029 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
3030 (CODE_FOR_lasx_xvffint_s_w): Ditto.
3031 (CODE_FOR_lasx_xvffint_d_l): Ditto.
3032 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
3033 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
3034 (CODE_FOR_lasx_xvfsub_s): Ditto.
3035 (CODE_FOR_lasx_xvfsub_d): Ditto.
3036 (CODE_FOR_lasx_xvfmul_s): Ditto.
3037 (CODE_FOR_lasx_xvfmul_d): Ditto.
3038 (CODE_FOR_lasx_xvfdiv_s): Ditto.
3039 (CODE_FOR_lasx_xvfdiv_d): Ditto.
3040 (CODE_FOR_lasx_xvfmax_s): Ditto.
3041 (CODE_FOR_lasx_xvfmax_d): Ditto.
3042 (CODE_FOR_lasx_xvfmin_s): Ditto.
3043 (CODE_FOR_lasx_xvfmin_d): Ditto.
3044 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
3045 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
3046 (CODE_FOR_lasx_xvflogb_s): Ditto.
3047 (CODE_FOR_lasx_xvflogb_d): Ditto.
3048 (CODE_FOR_lasx_xvmax_b): Ditto.
3049 (CODE_FOR_lasx_xvmax_h): Ditto.
3050 (CODE_FOR_lasx_xvmax_w): Ditto.
3051 (CODE_FOR_lasx_xvmax_d): Ditto.
3052 (CODE_FOR_lasx_xvmaxi_b): Ditto.
3053 (CODE_FOR_lasx_xvmaxi_h): Ditto.
3054 (CODE_FOR_lasx_xvmaxi_w): Ditto.
3055 (CODE_FOR_lasx_xvmaxi_d): Ditto.
3056 (CODE_FOR_lasx_xvmax_bu): Ditto.
3057 (CODE_FOR_lasx_xvmax_hu): Ditto.
3058 (CODE_FOR_lasx_xvmax_wu): Ditto.
3059 (CODE_FOR_lasx_xvmax_du): Ditto.
3060 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
3061 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
3062 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
3063 (CODE_FOR_lasx_xvmaxi_du): Ditto.
3064 (CODE_FOR_lasx_xvmin_b): Ditto.
3065 (CODE_FOR_lasx_xvmin_h): Ditto.
3066 (CODE_FOR_lasx_xvmin_w): Ditto.
3067 (CODE_FOR_lasx_xvmin_d): Ditto.
3068 (CODE_FOR_lasx_xvmini_b): Ditto.
3069 (CODE_FOR_lasx_xvmini_h): Ditto.
3070 (CODE_FOR_lasx_xvmini_w): Ditto.
3071 (CODE_FOR_lasx_xvmini_d): Ditto.
3072 (CODE_FOR_lasx_xvmin_bu): Ditto.
3073 (CODE_FOR_lasx_xvmin_hu): Ditto.
3074 (CODE_FOR_lasx_xvmin_wu): Ditto.
3075 (CODE_FOR_lasx_xvmin_du): Ditto.
3076 (CODE_FOR_lasx_xvmini_bu): Ditto.
3077 (CODE_FOR_lasx_xvmini_hu): Ditto.
3078 (CODE_FOR_lasx_xvmini_wu): Ditto.
3079 (CODE_FOR_lasx_xvmini_du): Ditto.
3080 (CODE_FOR_lasx_xvmod_b): Ditto.
3081 (CODE_FOR_lasx_xvmod_h): Ditto.
3082 (CODE_FOR_lasx_xvmod_w): Ditto.
3083 (CODE_FOR_lasx_xvmod_d): Ditto.
3084 (CODE_FOR_lasx_xvmod_bu): Ditto.
3085 (CODE_FOR_lasx_xvmod_hu): Ditto.
3086 (CODE_FOR_lasx_xvmod_wu): Ditto.
3087 (CODE_FOR_lasx_xvmod_du): Ditto.
3088 (CODE_FOR_lasx_xvmul_b): Ditto.
3089 (CODE_FOR_lasx_xvmul_h): Ditto.
3090 (CODE_FOR_lasx_xvmul_w): Ditto.
3091 (CODE_FOR_lasx_xvmul_d): Ditto.
3092 (CODE_FOR_lasx_xvclz_b): Ditto.
3093 (CODE_FOR_lasx_xvclz_h): Ditto.
3094 (CODE_FOR_lasx_xvclz_w): Ditto.
3095 (CODE_FOR_lasx_xvclz_d): Ditto.
3096 (CODE_FOR_lasx_xvnor_v): Ditto.
3097 (CODE_FOR_lasx_xvor_v): Ditto.
3098 (CODE_FOR_lasx_xvori_b): Ditto.
3099 (CODE_FOR_lasx_xvnori_b): Ditto.
3100 (CODE_FOR_lasx_xvpcnt_b): Ditto.
3101 (CODE_FOR_lasx_xvpcnt_h): Ditto.
3102 (CODE_FOR_lasx_xvpcnt_w): Ditto.
3103 (CODE_FOR_lasx_xvpcnt_d): Ditto.
3104 (CODE_FOR_lasx_xvxor_v): Ditto.
3105 (CODE_FOR_lasx_xvxori_b): Ditto.
3106 (CODE_FOR_lasx_xvsll_b): Ditto.
3107 (CODE_FOR_lasx_xvsll_h): Ditto.
3108 (CODE_FOR_lasx_xvsll_w): Ditto.
3109 (CODE_FOR_lasx_xvsll_d): Ditto.
3110 (CODE_FOR_lasx_xvslli_b): Ditto.
3111 (CODE_FOR_lasx_xvslli_h): Ditto.
3112 (CODE_FOR_lasx_xvslli_w): Ditto.
3113 (CODE_FOR_lasx_xvslli_d): Ditto.
3114 (CODE_FOR_lasx_xvsra_b): Ditto.
3115 (CODE_FOR_lasx_xvsra_h): Ditto.
3116 (CODE_FOR_lasx_xvsra_w): Ditto.
3117 (CODE_FOR_lasx_xvsra_d): Ditto.
3118 (CODE_FOR_lasx_xvsrai_b): Ditto.
3119 (CODE_FOR_lasx_xvsrai_h): Ditto.
3120 (CODE_FOR_lasx_xvsrai_w): Ditto.
3121 (CODE_FOR_lasx_xvsrai_d): Ditto.
3122 (CODE_FOR_lasx_xvsrl_b): Ditto.
3123 (CODE_FOR_lasx_xvsrl_h): Ditto.
3124 (CODE_FOR_lasx_xvsrl_w): Ditto.
3125 (CODE_FOR_lasx_xvsrl_d): Ditto.
3126 (CODE_FOR_lasx_xvsrli_b): Ditto.
3127 (CODE_FOR_lasx_xvsrli_h): Ditto.
3128 (CODE_FOR_lasx_xvsrli_w): Ditto.
3129 (CODE_FOR_lasx_xvsrli_d): Ditto.
3130 (CODE_FOR_lasx_xvsub_b): Ditto.
3131 (CODE_FOR_lasx_xvsub_h): Ditto.
3132 (CODE_FOR_lasx_xvsub_w): Ditto.
3133 (CODE_FOR_lasx_xvsub_d): Ditto.
3134 (CODE_FOR_lasx_xvsubi_bu): Ditto.
3135 (CODE_FOR_lasx_xvsubi_hu): Ditto.
3136 (CODE_FOR_lasx_xvsubi_wu): Ditto.
3137 (CODE_FOR_lasx_xvsubi_du): Ditto.
3138 (CODE_FOR_lasx_xvpackod_d): Ditto.
3139 (CODE_FOR_lasx_xvpackev_d): Ditto.
3140 (CODE_FOR_lasx_xvpickod_d): Ditto.
3141 (CODE_FOR_lasx_xvpickev_d): Ditto.
3142 (CODE_FOR_lasx_xvrepli_b): Ditto.
3143 (CODE_FOR_lasx_xvrepli_h): Ditto.
3144 (CODE_FOR_lasx_xvrepli_w): Ditto.
3145 (CODE_FOR_lasx_xvrepli_d): Ditto.
3146 (CODE_FOR_lasx_xvandn_v): Ditto.
3147 (CODE_FOR_lasx_xvorn_v): Ditto.
3148 (CODE_FOR_lasx_xvneg_b): Ditto.
3149 (CODE_FOR_lasx_xvneg_h): Ditto.
3150 (CODE_FOR_lasx_xvneg_w): Ditto.
3151 (CODE_FOR_lasx_xvneg_d): Ditto.
3152 (CODE_FOR_lasx_xvbsrl_v): Ditto.
3153 (CODE_FOR_lasx_xvbsll_v): Ditto.
3154 (CODE_FOR_lasx_xvfmadd_s): Ditto.
3155 (CODE_FOR_lasx_xvfmadd_d): Ditto.
3156 (CODE_FOR_lasx_xvfmsub_s): Ditto.
3157 (CODE_FOR_lasx_xvfmsub_d): Ditto.
3158 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
3159 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
3160 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
3161 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
3162 (CODE_FOR_lasx_xvpermi_q): Ditto.
3163 (CODE_FOR_lasx_xvpermi_d): Ditto.
3164 (CODE_FOR_lasx_xbnz_v): Ditto.
3165 (CODE_FOR_lasx_xbz_v): Ditto.
3166 (CODE_FOR_lasx_xvssub_b): Ditto.
3167 (CODE_FOR_lasx_xvssub_h): Ditto.
3168 (CODE_FOR_lasx_xvssub_w): Ditto.
3169 (CODE_FOR_lasx_xvssub_d): Ditto.
3170 (CODE_FOR_lasx_xvssub_bu): Ditto.
3171 (CODE_FOR_lasx_xvssub_hu): Ditto.
3172 (CODE_FOR_lasx_xvssub_wu): Ditto.
3173 (CODE_FOR_lasx_xvssub_du): Ditto.
3174 (CODE_FOR_lasx_xvabsd_b): Ditto.
3175 (CODE_FOR_lasx_xvabsd_h): Ditto.
3176 (CODE_FOR_lasx_xvabsd_w): Ditto.
3177 (CODE_FOR_lasx_xvabsd_d): Ditto.
3178 (CODE_FOR_lasx_xvabsd_bu): Ditto.
3179 (CODE_FOR_lasx_xvabsd_hu): Ditto.
3180 (CODE_FOR_lasx_xvabsd_wu): Ditto.
3181 (CODE_FOR_lasx_xvabsd_du): Ditto.
3182 (CODE_FOR_lasx_xvavg_b): Ditto.
3183 (CODE_FOR_lasx_xvavg_h): Ditto.
3184 (CODE_FOR_lasx_xvavg_w): Ditto.
3185 (CODE_FOR_lasx_xvavg_d): Ditto.
3186 (CODE_FOR_lasx_xvavg_bu): Ditto.
3187 (CODE_FOR_lasx_xvavg_hu): Ditto.
3188 (CODE_FOR_lasx_xvavg_wu): Ditto.
3189 (CODE_FOR_lasx_xvavg_du): Ditto.
3190 (CODE_FOR_lasx_xvavgr_b): Ditto.
3191 (CODE_FOR_lasx_xvavgr_h): Ditto.
3192 (CODE_FOR_lasx_xvavgr_w): Ditto.
3193 (CODE_FOR_lasx_xvavgr_d): Ditto.
3194 (CODE_FOR_lasx_xvavgr_bu): Ditto.
3195 (CODE_FOR_lasx_xvavgr_hu): Ditto.
3196 (CODE_FOR_lasx_xvavgr_wu): Ditto.
3197 (CODE_FOR_lasx_xvavgr_du): Ditto.
3198 (CODE_FOR_lasx_xvmuh_b): Ditto.
3199 (CODE_FOR_lasx_xvmuh_h): Ditto.
3200 (CODE_FOR_lasx_xvmuh_w): Ditto.
3201 (CODE_FOR_lasx_xvmuh_d): Ditto.
3202 (CODE_FOR_lasx_xvmuh_bu): Ditto.
3203 (CODE_FOR_lasx_xvmuh_hu): Ditto.
3204 (CODE_FOR_lasx_xvmuh_wu): Ditto.
3205 (CODE_FOR_lasx_xvmuh_du): Ditto.
3206 (CODE_FOR_lasx_xvssran_b_h): Ditto.
3207 (CODE_FOR_lasx_xvssran_h_w): Ditto.
3208 (CODE_FOR_lasx_xvssran_w_d): Ditto.
3209 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
3210 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
3211 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
3212 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
3213 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
3214 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
3215 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
3216 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
3217 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
3218 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
3219 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
3220 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
3221 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
3222 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
3223 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
3224 (CODE_FOR_lasx_xvftint_w_s): Ditto.
3225 (CODE_FOR_lasx_xvftint_l_d): Ditto.
3226 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
3227 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
3228 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
3229 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
3230 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
3231 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
3232 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
3233 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
3234 (CODE_FOR_lasx_xvsat_b): Ditto.
3235 (CODE_FOR_lasx_xvsat_h): Ditto.
3236 (CODE_FOR_lasx_xvsat_w): Ditto.
3237 (CODE_FOR_lasx_xvsat_d): Ditto.
3238 (CODE_FOR_lasx_xvsat_bu): Ditto.
3239 (CODE_FOR_lasx_xvsat_hu): Ditto.
3240 (CODE_FOR_lasx_xvsat_wu): Ditto.
3241 (CODE_FOR_lasx_xvsat_du): Ditto.
3242 (loongarch_builtin_vectorized_function): Ditto.
3243 (loongarch_expand_builtin_insn): Ditto.
3244 (loongarch_expand_builtin): Ditto.
3245 * config/loongarch/loongarch-ftypes.def (1): Ditto.
3249 * config/loongarch/lasxintrin.h: New file.
3251 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
3253 * config/loongarch/loongarch-modes.def
3254 (VECTOR_MODES): Add Loongson ASX instruction support.
3255 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
3256 (loongarch_split_256bit_move_p): Ditto.
3257 (loongarch_expand_vector_group_init): Ditto.
3258 (loongarch_expand_vec_perm_1): Ditto.
3259 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
3260 (loongarch_valid_offset_p): Ditto.
3261 (loongarch_address_insns): Ditto.
3262 (loongarch_const_insns): Ditto.
3263 (loongarch_legitimize_move): Ditto.
3264 (loongarch_builtin_vectorization_cost): Ditto.
3265 (loongarch_split_move_p): Ditto.
3266 (loongarch_split_move): Ditto.
3267 (loongarch_output_move_index_float): Ditto.
3268 (loongarch_split_256bit_move_p): Ditto.
3269 (loongarch_split_256bit_move): Ditto.
3270 (loongarch_output_move): Ditto.
3271 (loongarch_print_operand_reloc): Ditto.
3272 (loongarch_print_operand): Ditto.
3273 (loongarch_hard_regno_mode_ok_uncached): Ditto.
3274 (loongarch_hard_regno_nregs): Ditto.
3275 (loongarch_class_max_nregs): Ditto.
3276 (loongarch_can_change_mode_class): Ditto.
3277 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
3278 (loongarch_vector_mode_supported_p): Ditto.
3279 (loongarch_preferred_simd_mode): Ditto.
3280 (loongarch_autovectorize_vector_modes): Ditto.
3281 (loongarch_lsx_output_division): Ditto.
3282 (loongarch_expand_lsx_shuffle): Ditto.
3283 (loongarch_expand_vec_perm): Ditto.
3284 (loongarch_expand_vec_perm_interleave): Ditto.
3285 (loongarch_try_expand_lsx_vshuf_const): Ditto.
3286 (loongarch_expand_vec_perm_even_odd_1): Ditto.
3287 (loongarch_expand_vec_perm_even_odd): Ditto.
3288 (loongarch_expand_vec_perm_1): Ditto.
3289 (loongarch_expand_vec_perm_const_2): Ditto.
3290 (loongarch_is_quad_duplicate): Ditto.
3291 (loongarch_is_double_duplicate): Ditto.
3292 (loongarch_is_odd_extraction): Ditto.
3293 (loongarch_is_even_extraction): Ditto.
3294 (loongarch_is_extraction_permutation): Ditto.
3295 (loongarch_is_center_extraction): Ditto.
3296 (loongarch_is_reversing_permutation): Ditto.
3297 (loongarch_is_di_misalign_extract): Ditto.
3298 (loongarch_is_si_misalign_extract): Ditto.
3299 (loongarch_is_lasx_lowpart_interleave): Ditto.
3300 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
3301 (COMPARE_SELECTOR): Ditto.
3302 (loongarch_is_lasx_lowpart_extract): Ditto.
3303 (loongarch_is_lasx_highpart_interleave): Ditto.
3304 (loongarch_is_lasx_highpart_interleave_2): Ditto.
3305 (loongarch_is_elem_duplicate): Ditto.
3306 (loongarch_is_op_reverse_perm): Ditto.
3307 (loongarch_is_single_op_perm): Ditto.
3308 (loongarch_is_divisible_perm): Ditto.
3309 (loongarch_is_triple_stride_extract): Ditto.
3310 (loongarch_vectorize_vec_perm_const): Ditto.
3311 (loongarch_cpu_sched_reassociation_width): Ditto.
3312 (loongarch_expand_vector_extract): Ditto.
3313 (emit_reduc_half): Ditto.
3314 (loongarch_expand_vec_unpack): Ditto.
3315 (loongarch_expand_vector_group_init): Ditto.
3316 (loongarch_expand_vector_init): Ditto.
3317 (loongarch_expand_lsx_cmp): Ditto.
3318 (loongarch_builtin_support_vector_misalignment): Ditto.
3319 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
3320 (BITS_PER_LASX_REG): Ditto.
3321 (STRUCTURE_SIZE_BOUNDARY): Ditto.
3322 (LASX_REG_FIRST): Ditto.
3323 (LASX_REG_LAST): Ditto.
3324 (LASX_REG_NUM): Ditto.
3325 (LASX_REG_P): Ditto.
3326 (LASX_REG_RTX_P): Ditto.
3327 (LASX_SUPPORTED_MODE_P): Ditto.
3328 * config/loongarch/loongarch.md: Ditto.
3329 * config/loongarch/lasx.md: New file.
3331 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
3333 * config.gcc: Export the header file lsxintrin.h.
3334 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
3335 (enum loongarch_builtin_type): Ditto.
3337 (LARCH_BUILTIN): Ditto.
3338 (LSX_BUILTIN): Ditto.
3339 (LSX_BUILTIN_TEST_BRANCH): Ditto.
3340 (LSX_NO_TARGET_BUILTIN): Ditto.
3341 (CODE_FOR_lsx_vsadd_b): Ditto.
3342 (CODE_FOR_lsx_vsadd_h): Ditto.
3343 (CODE_FOR_lsx_vsadd_w): Ditto.
3344 (CODE_FOR_lsx_vsadd_d): Ditto.
3345 (CODE_FOR_lsx_vsadd_bu): Ditto.
3346 (CODE_FOR_lsx_vsadd_hu): Ditto.
3347 (CODE_FOR_lsx_vsadd_wu): Ditto.
3348 (CODE_FOR_lsx_vsadd_du): Ditto.
3349 (CODE_FOR_lsx_vadd_b): Ditto.
3350 (CODE_FOR_lsx_vadd_h): Ditto.
3351 (CODE_FOR_lsx_vadd_w): Ditto.
3352 (CODE_FOR_lsx_vadd_d): Ditto.
3353 (CODE_FOR_lsx_vaddi_bu): Ditto.
3354 (CODE_FOR_lsx_vaddi_hu): Ditto.
3355 (CODE_FOR_lsx_vaddi_wu): Ditto.
3356 (CODE_FOR_lsx_vaddi_du): Ditto.
3357 (CODE_FOR_lsx_vand_v): Ditto.
3358 (CODE_FOR_lsx_vandi_b): Ditto.
3359 (CODE_FOR_lsx_bnz_v): Ditto.
3360 (CODE_FOR_lsx_bz_v): Ditto.
3361 (CODE_FOR_lsx_vbitsel_v): Ditto.
3362 (CODE_FOR_lsx_vseqi_b): Ditto.
3363 (CODE_FOR_lsx_vseqi_h): Ditto.
3364 (CODE_FOR_lsx_vseqi_w): Ditto.
3365 (CODE_FOR_lsx_vseqi_d): Ditto.
3366 (CODE_FOR_lsx_vslti_b): Ditto.
3367 (CODE_FOR_lsx_vslti_h): Ditto.
3368 (CODE_FOR_lsx_vslti_w): Ditto.
3369 (CODE_FOR_lsx_vslti_d): Ditto.
3370 (CODE_FOR_lsx_vslti_bu): Ditto.
3371 (CODE_FOR_lsx_vslti_hu): Ditto.
3372 (CODE_FOR_lsx_vslti_wu): Ditto.
3373 (CODE_FOR_lsx_vslti_du): Ditto.
3374 (CODE_FOR_lsx_vslei_b): Ditto.
3375 (CODE_FOR_lsx_vslei_h): Ditto.
3376 (CODE_FOR_lsx_vslei_w): Ditto.
3377 (CODE_FOR_lsx_vslei_d): Ditto.
3378 (CODE_FOR_lsx_vslei_bu): Ditto.
3379 (CODE_FOR_lsx_vslei_hu): Ditto.
3380 (CODE_FOR_lsx_vslei_wu): Ditto.
3381 (CODE_FOR_lsx_vslei_du): Ditto.
3382 (CODE_FOR_lsx_vdiv_b): Ditto.
3383 (CODE_FOR_lsx_vdiv_h): Ditto.
3384 (CODE_FOR_lsx_vdiv_w): Ditto.
3385 (CODE_FOR_lsx_vdiv_d): Ditto.
3386 (CODE_FOR_lsx_vdiv_bu): Ditto.
3387 (CODE_FOR_lsx_vdiv_hu): Ditto.
3388 (CODE_FOR_lsx_vdiv_wu): Ditto.
3389 (CODE_FOR_lsx_vdiv_du): Ditto.
3390 (CODE_FOR_lsx_vfadd_s): Ditto.
3391 (CODE_FOR_lsx_vfadd_d): Ditto.
3392 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
3393 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
3394 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
3395 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
3396 (CODE_FOR_lsx_vffint_s_w): Ditto.
3397 (CODE_FOR_lsx_vffint_d_l): Ditto.
3398 (CODE_FOR_lsx_vffint_s_wu): Ditto.
3399 (CODE_FOR_lsx_vffint_d_lu): Ditto.
3400 (CODE_FOR_lsx_vfsub_s): Ditto.
3401 (CODE_FOR_lsx_vfsub_d): Ditto.
3402 (CODE_FOR_lsx_vfmul_s): Ditto.
3403 (CODE_FOR_lsx_vfmul_d): Ditto.
3404 (CODE_FOR_lsx_vfdiv_s): Ditto.
3405 (CODE_FOR_lsx_vfdiv_d): Ditto.
3406 (CODE_FOR_lsx_vfmax_s): Ditto.
3407 (CODE_FOR_lsx_vfmax_d): Ditto.
3408 (CODE_FOR_lsx_vfmin_s): Ditto.
3409 (CODE_FOR_lsx_vfmin_d): Ditto.
3410 (CODE_FOR_lsx_vfsqrt_s): Ditto.
3411 (CODE_FOR_lsx_vfsqrt_d): Ditto.
3412 (CODE_FOR_lsx_vflogb_s): Ditto.
3413 (CODE_FOR_lsx_vflogb_d): Ditto.
3414 (CODE_FOR_lsx_vmax_b): Ditto.
3415 (CODE_FOR_lsx_vmax_h): Ditto.
3416 (CODE_FOR_lsx_vmax_w): Ditto.
3417 (CODE_FOR_lsx_vmax_d): Ditto.
3418 (CODE_FOR_lsx_vmaxi_b): Ditto.
3419 (CODE_FOR_lsx_vmaxi_h): Ditto.
3420 (CODE_FOR_lsx_vmaxi_w): Ditto.
3421 (CODE_FOR_lsx_vmaxi_d): Ditto.
3422 (CODE_FOR_lsx_vmax_bu): Ditto.
3423 (CODE_FOR_lsx_vmax_hu): Ditto.
3424 (CODE_FOR_lsx_vmax_wu): Ditto.
3425 (CODE_FOR_lsx_vmax_du): Ditto.
3426 (CODE_FOR_lsx_vmaxi_bu): Ditto.
3427 (CODE_FOR_lsx_vmaxi_hu): Ditto.
3428 (CODE_FOR_lsx_vmaxi_wu): Ditto.
3429 (CODE_FOR_lsx_vmaxi_du): Ditto.
3430 (CODE_FOR_lsx_vmin_b): Ditto.
3431 (CODE_FOR_lsx_vmin_h): Ditto.
3432 (CODE_FOR_lsx_vmin_w): Ditto.
3433 (CODE_FOR_lsx_vmin_d): Ditto.
3434 (CODE_FOR_lsx_vmini_b): Ditto.
3435 (CODE_FOR_lsx_vmini_h): Ditto.
3436 (CODE_FOR_lsx_vmini_w): Ditto.
3437 (CODE_FOR_lsx_vmini_d): Ditto.
3438 (CODE_FOR_lsx_vmin_bu): Ditto.
3439 (CODE_FOR_lsx_vmin_hu): Ditto.
3440 (CODE_FOR_lsx_vmin_wu): Ditto.
3441 (CODE_FOR_lsx_vmin_du): Ditto.
3442 (CODE_FOR_lsx_vmini_bu): Ditto.
3443 (CODE_FOR_lsx_vmini_hu): Ditto.
3444 (CODE_FOR_lsx_vmini_wu): Ditto.
3445 (CODE_FOR_lsx_vmini_du): Ditto.
3446 (CODE_FOR_lsx_vmod_b): Ditto.
3447 (CODE_FOR_lsx_vmod_h): Ditto.
3448 (CODE_FOR_lsx_vmod_w): Ditto.
3449 (CODE_FOR_lsx_vmod_d): Ditto.
3450 (CODE_FOR_lsx_vmod_bu): Ditto.
3451 (CODE_FOR_lsx_vmod_hu): Ditto.
3452 (CODE_FOR_lsx_vmod_wu): Ditto.
3453 (CODE_FOR_lsx_vmod_du): Ditto.
3454 (CODE_FOR_lsx_vmul_b): Ditto.
3455 (CODE_FOR_lsx_vmul_h): Ditto.
3456 (CODE_FOR_lsx_vmul_w): Ditto.
3457 (CODE_FOR_lsx_vmul_d): Ditto.
3458 (CODE_FOR_lsx_vclz_b): Ditto.
3459 (CODE_FOR_lsx_vclz_h): Ditto.
3460 (CODE_FOR_lsx_vclz_w): Ditto.
3461 (CODE_FOR_lsx_vclz_d): Ditto.
3462 (CODE_FOR_lsx_vnor_v): Ditto.
3463 (CODE_FOR_lsx_vor_v): Ditto.
3464 (CODE_FOR_lsx_vori_b): Ditto.
3465 (CODE_FOR_lsx_vnori_b): Ditto.
3466 (CODE_FOR_lsx_vpcnt_b): Ditto.
3467 (CODE_FOR_lsx_vpcnt_h): Ditto.
3468 (CODE_FOR_lsx_vpcnt_w): Ditto.
3469 (CODE_FOR_lsx_vpcnt_d): Ditto.
3470 (CODE_FOR_lsx_vxor_v): Ditto.
3471 (CODE_FOR_lsx_vxori_b): Ditto.
3472 (CODE_FOR_lsx_vsll_b): Ditto.
3473 (CODE_FOR_lsx_vsll_h): Ditto.
3474 (CODE_FOR_lsx_vsll_w): Ditto.
3475 (CODE_FOR_lsx_vsll_d): Ditto.
3476 (CODE_FOR_lsx_vslli_b): Ditto.
3477 (CODE_FOR_lsx_vslli_h): Ditto.
3478 (CODE_FOR_lsx_vslli_w): Ditto.
3479 (CODE_FOR_lsx_vslli_d): Ditto.
3480 (CODE_FOR_lsx_vsra_b): Ditto.
3481 (CODE_FOR_lsx_vsra_h): Ditto.
3482 (CODE_FOR_lsx_vsra_w): Ditto.
3483 (CODE_FOR_lsx_vsra_d): Ditto.
3484 (CODE_FOR_lsx_vsrai_b): Ditto.
3485 (CODE_FOR_lsx_vsrai_h): Ditto.
3486 (CODE_FOR_lsx_vsrai_w): Ditto.
3487 (CODE_FOR_lsx_vsrai_d): Ditto.
3488 (CODE_FOR_lsx_vsrl_b): Ditto.
3489 (CODE_FOR_lsx_vsrl_h): Ditto.
3490 (CODE_FOR_lsx_vsrl_w): Ditto.
3491 (CODE_FOR_lsx_vsrl_d): Ditto.
3492 (CODE_FOR_lsx_vsrli_b): Ditto.
3493 (CODE_FOR_lsx_vsrli_h): Ditto.
3494 (CODE_FOR_lsx_vsrli_w): Ditto.
3495 (CODE_FOR_lsx_vsrli_d): Ditto.
3496 (CODE_FOR_lsx_vsub_b): Ditto.
3497 (CODE_FOR_lsx_vsub_h): Ditto.
3498 (CODE_FOR_lsx_vsub_w): Ditto.
3499 (CODE_FOR_lsx_vsub_d): Ditto.
3500 (CODE_FOR_lsx_vsubi_bu): Ditto.
3501 (CODE_FOR_lsx_vsubi_hu): Ditto.
3502 (CODE_FOR_lsx_vsubi_wu): Ditto.
3503 (CODE_FOR_lsx_vsubi_du): Ditto.
3504 (CODE_FOR_lsx_vpackod_d): Ditto.
3505 (CODE_FOR_lsx_vpackev_d): Ditto.
3506 (CODE_FOR_lsx_vpickod_d): Ditto.
3507 (CODE_FOR_lsx_vpickev_d): Ditto.
3508 (CODE_FOR_lsx_vrepli_b): Ditto.
3509 (CODE_FOR_lsx_vrepli_h): Ditto.
3510 (CODE_FOR_lsx_vrepli_w): Ditto.
3511 (CODE_FOR_lsx_vrepli_d): Ditto.
3512 (CODE_FOR_lsx_vsat_b): Ditto.
3513 (CODE_FOR_lsx_vsat_h): Ditto.
3514 (CODE_FOR_lsx_vsat_w): Ditto.
3515 (CODE_FOR_lsx_vsat_d): Ditto.
3516 (CODE_FOR_lsx_vsat_bu): Ditto.
3517 (CODE_FOR_lsx_vsat_hu): Ditto.
3518 (CODE_FOR_lsx_vsat_wu): Ditto.
3519 (CODE_FOR_lsx_vsat_du): Ditto.
3520 (CODE_FOR_lsx_vavg_b): Ditto.
3521 (CODE_FOR_lsx_vavg_h): Ditto.
3522 (CODE_FOR_lsx_vavg_w): Ditto.
3523 (CODE_FOR_lsx_vavg_d): Ditto.
3524 (CODE_FOR_lsx_vavg_bu): Ditto.
3525 (CODE_FOR_lsx_vavg_hu): Ditto.
3526 (CODE_FOR_lsx_vavg_wu): Ditto.
3527 (CODE_FOR_lsx_vavg_du): Ditto.
3528 (CODE_FOR_lsx_vavgr_b): Ditto.
3529 (CODE_FOR_lsx_vavgr_h): Ditto.
3530 (CODE_FOR_lsx_vavgr_w): Ditto.
3531 (CODE_FOR_lsx_vavgr_d): Ditto.
3532 (CODE_FOR_lsx_vavgr_bu): Ditto.
3533 (CODE_FOR_lsx_vavgr_hu): Ditto.
3534 (CODE_FOR_lsx_vavgr_wu): Ditto.
3535 (CODE_FOR_lsx_vavgr_du): Ditto.
3536 (CODE_FOR_lsx_vssub_b): Ditto.
3537 (CODE_FOR_lsx_vssub_h): Ditto.
3538 (CODE_FOR_lsx_vssub_w): Ditto.
3539 (CODE_FOR_lsx_vssub_d): Ditto.
3540 (CODE_FOR_lsx_vssub_bu): Ditto.
3541 (CODE_FOR_lsx_vssub_hu): Ditto.
3542 (CODE_FOR_lsx_vssub_wu): Ditto.
3543 (CODE_FOR_lsx_vssub_du): Ditto.
3544 (CODE_FOR_lsx_vabsd_b): Ditto.
3545 (CODE_FOR_lsx_vabsd_h): Ditto.
3546 (CODE_FOR_lsx_vabsd_w): Ditto.
3547 (CODE_FOR_lsx_vabsd_d): Ditto.
3548 (CODE_FOR_lsx_vabsd_bu): Ditto.
3549 (CODE_FOR_lsx_vabsd_hu): Ditto.
3550 (CODE_FOR_lsx_vabsd_wu): Ditto.
3551 (CODE_FOR_lsx_vabsd_du): Ditto.
3552 (CODE_FOR_lsx_vftint_w_s): Ditto.
3553 (CODE_FOR_lsx_vftint_l_d): Ditto.
3554 (CODE_FOR_lsx_vftint_wu_s): Ditto.
3555 (CODE_FOR_lsx_vftint_lu_d): Ditto.
3556 (CODE_FOR_lsx_vandn_v): Ditto.
3557 (CODE_FOR_lsx_vorn_v): Ditto.
3558 (CODE_FOR_lsx_vneg_b): Ditto.
3559 (CODE_FOR_lsx_vneg_h): Ditto.
3560 (CODE_FOR_lsx_vneg_w): Ditto.
3561 (CODE_FOR_lsx_vneg_d): Ditto.
3562 (CODE_FOR_lsx_vshuf4i_d): Ditto.
3563 (CODE_FOR_lsx_vbsrl_v): Ditto.
3564 (CODE_FOR_lsx_vbsll_v): Ditto.
3565 (CODE_FOR_lsx_vfmadd_s): Ditto.
3566 (CODE_FOR_lsx_vfmadd_d): Ditto.
3567 (CODE_FOR_lsx_vfmsub_s): Ditto.
3568 (CODE_FOR_lsx_vfmsub_d): Ditto.
3569 (CODE_FOR_lsx_vfnmadd_s): Ditto.
3570 (CODE_FOR_lsx_vfnmadd_d): Ditto.
3571 (CODE_FOR_lsx_vfnmsub_s): Ditto.
3572 (CODE_FOR_lsx_vfnmsub_d): Ditto.
3573 (CODE_FOR_lsx_vmuh_b): Ditto.
3574 (CODE_FOR_lsx_vmuh_h): Ditto.
3575 (CODE_FOR_lsx_vmuh_w): Ditto.
3576 (CODE_FOR_lsx_vmuh_d): Ditto.
3577 (CODE_FOR_lsx_vmuh_bu): Ditto.
3578 (CODE_FOR_lsx_vmuh_hu): Ditto.
3579 (CODE_FOR_lsx_vmuh_wu): Ditto.
3580 (CODE_FOR_lsx_vmuh_du): Ditto.
3581 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
3582 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
3583 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
3584 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
3585 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
3586 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
3587 (CODE_FOR_lsx_vssran_b_h): Ditto.
3588 (CODE_FOR_lsx_vssran_h_w): Ditto.
3589 (CODE_FOR_lsx_vssran_w_d): Ditto.
3590 (CODE_FOR_lsx_vssran_bu_h): Ditto.
3591 (CODE_FOR_lsx_vssran_hu_w): Ditto.
3592 (CODE_FOR_lsx_vssran_wu_d): Ditto.
3593 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
3594 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
3595 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
3596 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
3597 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
3598 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
3599 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
3600 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
3601 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
3602 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
3603 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
3604 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
3605 (loongarch_builtin_vector_type): Ditto.
3606 (loongarch_build_cvpointer_type): Ditto.
3607 (LARCH_ATYPE_CVPOINTER): Ditto.
3608 (LARCH_ATYPE_BOOLEAN): Ditto.
3609 (LARCH_ATYPE_V2SF): Ditto.
3610 (LARCH_ATYPE_V2HI): Ditto.
3611 (LARCH_ATYPE_V2SI): Ditto.
3612 (LARCH_ATYPE_V4QI): Ditto.
3613 (LARCH_ATYPE_V4HI): Ditto.
3614 (LARCH_ATYPE_V8QI): Ditto.
3615 (LARCH_ATYPE_V2DI): Ditto.
3616 (LARCH_ATYPE_V4SI): Ditto.
3617 (LARCH_ATYPE_V8HI): Ditto.
3618 (LARCH_ATYPE_V16QI): Ditto.
3619 (LARCH_ATYPE_V2DF): Ditto.
3620 (LARCH_ATYPE_V4SF): Ditto.
3621 (LARCH_ATYPE_V4DI): Ditto.
3622 (LARCH_ATYPE_V8SI): Ditto.
3623 (LARCH_ATYPE_V16HI): Ditto.
3624 (LARCH_ATYPE_V32QI): Ditto.
3625 (LARCH_ATYPE_V4DF): Ditto.
3626 (LARCH_ATYPE_V8SF): Ditto.
3627 (LARCH_ATYPE_UV2DI): Ditto.
3628 (LARCH_ATYPE_UV4SI): Ditto.
3629 (LARCH_ATYPE_UV8HI): Ditto.
3630 (LARCH_ATYPE_UV16QI): Ditto.
3631 (LARCH_ATYPE_UV4DI): Ditto.
3632 (LARCH_ATYPE_UV8SI): Ditto.
3633 (LARCH_ATYPE_UV16HI): Ditto.
3634 (LARCH_ATYPE_UV32QI): Ditto.
3635 (LARCH_ATYPE_UV2SI): Ditto.
3636 (LARCH_ATYPE_UV4HI): Ditto.
3637 (LARCH_ATYPE_UV8QI): Ditto.
3638 (loongarch_builtin_vectorized_function): Ditto.
3639 (LARCH_GET_BUILTIN): Ditto.
3640 (loongarch_expand_builtin_insn): Ditto.
3641 (loongarch_expand_builtin_lsx_test_branch): Ditto.
3642 (loongarch_expand_builtin): Ditto.
3643 * config/loongarch/loongarch-ftypes.def (1): Ditto.
3647 * config/loongarch/lsxintrin.h: New file.
3649 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
3651 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
3671 * config/loongarch/genopts/loongarch.opt.in: Ditto.
3672 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
3673 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
3674 (VECTOR_MODE): Ditto.
3676 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
3677 (loongarch_split_move_insn): Ditto.
3678 (loongarch_split_128bit_move): Ditto.
3679 (loongarch_split_128bit_move_p): Ditto.
3680 (loongarch_split_lsx_copy_d): Ditto.
3681 (loongarch_split_lsx_insert_d): Ditto.
3682 (loongarch_split_lsx_fill_d): Ditto.
3683 (loongarch_expand_vec_cmp): Ditto.
3684 (loongarch_const_vector_same_val_p): Ditto.
3685 (loongarch_const_vector_same_bytes_p): Ditto.
3686 (loongarch_const_vector_same_int_p): Ditto.
3687 (loongarch_const_vector_shuffle_set_p): Ditto.
3688 (loongarch_const_vector_bitimm_set_p): Ditto.
3689 (loongarch_const_vector_bitimm_clr_p): Ditto.
3690 (loongarch_lsx_vec_parallel_const_half): Ditto.
3691 (loongarch_gen_const_int_vector): Ditto.
3692 (loongarch_lsx_output_division): Ditto.
3693 (loongarch_expand_vector_init): Ditto.
3694 (loongarch_expand_vec_unpack): Ditto.
3695 (loongarch_expand_vec_perm): Ditto.
3696 (loongarch_expand_vector_extract): Ditto.
3697 (loongarch_expand_vector_reduc): Ditto.
3698 (loongarch_ldst_scaled_shift): Ditto.
3699 (loongarch_expand_vec_cond_expr): Ditto.
3700 (loongarch_expand_vec_cond_mask_expr): Ditto.
3701 (loongarch_builtin_vectorized_function): Ditto.
3702 (loongarch_gen_const_int_vector_shuffle): Ditto.
3703 (loongarch_build_signbit_mask): Ditto.
3704 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
3705 (loongarch_setup_incoming_varargs): Ditto.
3706 (loongarch_emit_move): Ditto.
3707 (loongarch_const_vector_bitimm_set_p): Ditto.
3708 (loongarch_const_vector_bitimm_clr_p): Ditto.
3709 (loongarch_const_vector_same_val_p): Ditto.
3710 (loongarch_const_vector_same_bytes_p): Ditto.
3711 (loongarch_const_vector_same_int_p): Ditto.
3712 (loongarch_const_vector_shuffle_set_p): Ditto.
3713 (loongarch_symbol_insns): Ditto.
3714 (loongarch_cannot_force_const_mem): Ditto.
3715 (loongarch_valid_offset_p): Ditto.
3716 (loongarch_valid_index_p): Ditto.
3717 (loongarch_classify_address): Ditto.
3718 (loongarch_address_insns): Ditto.
3719 (loongarch_ldst_scaled_shift): Ditto.
3720 (loongarch_const_insns): Ditto.
3721 (loongarch_split_move_insn_p): Ditto.
3722 (loongarch_subword_at_byte): Ditto.
3723 (loongarch_legitimize_move): Ditto.
3724 (loongarch_builtin_vectorization_cost): Ditto.
3725 (loongarch_split_move_p): Ditto.
3726 (loongarch_split_move): Ditto.
3727 (loongarch_split_move_insn): Ditto.
3728 (loongarch_output_move_index_float): Ditto.
3729 (loongarch_split_128bit_move_p): Ditto.
3730 (loongarch_split_128bit_move): Ditto.
3731 (loongarch_split_lsx_copy_d): Ditto.
3732 (loongarch_split_lsx_insert_d): Ditto.
3733 (loongarch_split_lsx_fill_d): Ditto.
3734 (loongarch_output_move): Ditto.
3735 (loongarch_extend_comparands): Ditto.
3736 (loongarch_print_operand_reloc): Ditto.
3737 (loongarch_print_operand): Ditto.
3738 (loongarch_hard_regno_mode_ok_uncached): Ditto.
3739 (loongarch_hard_regno_call_part_clobbered): Ditto.
3740 (loongarch_hard_regno_nregs): Ditto.
3741 (loongarch_class_max_nregs): Ditto.
3742 (loongarch_can_change_mode_class): Ditto.
3743 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
3744 (loongarch_secondary_reload): Ditto.
3745 (loongarch_vector_mode_supported_p): Ditto.
3746 (loongarch_preferred_simd_mode): Ditto.
3747 (loongarch_autovectorize_vector_modes): Ditto.
3748 (loongarch_lsx_output_division): Ditto.
3749 (loongarch_option_override_internal): Ditto.
3750 (loongarch_hard_regno_caller_save_mode): Ditto.
3751 (MAX_VECT_LEN): Ditto.
3752 (loongarch_spill_class): Ditto.
3753 (struct expand_vec_perm_d): Ditto.
3754 (loongarch_promote_function_mode): Ditto.
3755 (loongarch_expand_vselect): Ditto.
3756 (loongarch_starting_frame_offset): Ditto.
3757 (loongarch_expand_vselect_vconcat): Ditto.
3758 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
3759 (TARGET_OPTION_OVERRIDE): Ditto.
3760 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
3761 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
3762 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
3763 (loongarch_expand_lsx_shuffle): Ditto.
3764 (TARGET_SCHED_INIT): Ditto.
3765 (TARGET_SCHED_REORDER): Ditto.
3766 (TARGET_SCHED_REORDER2): Ditto.
3767 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
3768 (TARGET_SCHED_ADJUST_COST): Ditto.
3769 (TARGET_SCHED_ISSUE_RATE): Ditto.
3770 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
3771 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
3772 (TARGET_VALID_POINTER_MODE): Ditto.
3773 (TARGET_REGISTER_MOVE_COST): Ditto.
3774 (TARGET_MEMORY_MOVE_COST): Ditto.
3775 (TARGET_RTX_COSTS): Ditto.
3776 (TARGET_ADDRESS_COST): Ditto.
3777 (TARGET_IN_SMALL_DATA_P): Ditto.
3778 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
3779 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
3780 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
3781 (loongarch_expand_vec_perm): Ditto.
3782 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
3783 (TARGET_RETURN_IN_MEMORY): Ditto.
3784 (TARGET_FUNCTION_VALUE): Ditto.
3785 (TARGET_LIBCALL_VALUE): Ditto.
3786 (loongarch_try_expand_lsx_vshuf_const): Ditto.
3787 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
3788 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
3789 (TARGET_PRINT_OPERAND): Ditto.
3790 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
3791 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
3792 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
3793 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
3794 (TARGET_MUST_PASS_IN_STACK): Ditto.
3795 (TARGET_PASS_BY_REFERENCE): Ditto.
3796 (TARGET_ARG_PARTIAL_BYTES): Ditto.
3797 (TARGET_FUNCTION_ARG): Ditto.
3798 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
3799 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
3800 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
3801 (TARGET_INIT_BUILTINS): Ditto.
3802 (loongarch_expand_vec_perm_const_1): Ditto.
3803 (loongarch_expand_vec_perm_const_2): Ditto.
3804 (loongarch_vectorize_vec_perm_const): Ditto.
3805 (loongarch_cpu_sched_reassociation_width): Ditto.
3806 (loongarch_sched_reassociation_width): Ditto.
3807 (loongarch_expand_vector_extract): Ditto.
3808 (emit_reduc_half): Ditto.
3809 (loongarch_expand_vector_reduc): Ditto.
3810 (loongarch_expand_vec_unpack): Ditto.
3811 (loongarch_lsx_vec_parallel_const_half): Ditto.
3812 (loongarch_constant_elt_p): Ditto.
3813 (loongarch_gen_const_int_vector_shuffle): Ditto.
3814 (loongarch_expand_vector_init): Ditto.
3815 (loongarch_expand_lsx_cmp): Ditto.
3816 (loongarch_expand_vec_cond_expr): Ditto.
3817 (loongarch_expand_vec_cond_mask_expr): Ditto.
3818 (loongarch_expand_vec_cmp): Ditto.
3819 (loongarch_case_values_threshold): Ditto.
3820 (loongarch_build_const_vector): Ditto.
3821 (loongarch_build_signbit_mask): Ditto.
3822 (loongarch_builtin_support_vector_misalignment): Ditto.
3823 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
3824 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
3825 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
3826 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
3827 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
3828 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
3829 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
3830 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
3831 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
3832 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
3833 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
3834 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
3835 (UNITS_PER_LSX_REG): Ditto.
3836 (BITS_PER_LSX_REG): Ditto.
3837 (BIGGEST_ALIGNMENT): Ditto.
3838 (LSX_REG_FIRST): Ditto.
3839 (LSX_REG_LAST): Ditto.
3840 (LSX_REG_NUM): Ditto.
3842 (LSX_REG_RTX_P): Ditto.
3843 (IMM13_OPERAND): Ditto.
3844 (LSX_SUPPORTED_MODE_P): Ditto.
3845 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
3846 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
3847 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
3854 * config/loongarch/loongarch.opt: Ditto.
3855 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
3856 (const_uimm3_operand): Ditto.
3857 (const_8_to_11_operand): Ditto.
3858 (const_12_to_15_operand): Ditto.
3859 (const_uimm4_operand): Ditto.
3860 (const_uimm6_operand): Ditto.
3861 (const_uimm7_operand): Ditto.
3862 (const_uimm8_operand): Ditto.
3863 (const_imm5_operand): Ditto.
3864 (const_imm10_operand): Ditto.
3865 (const_imm13_operand): Ditto.
3866 (reg_imm10_operand): Ditto.
3867 (aq8b_operand): Ditto.
3868 (aq8h_operand): Ditto.
3869 (aq8w_operand): Ditto.
3870 (aq8d_operand): Ditto.
3871 (aq10b_operand): Ditto.
3872 (aq10h_operand): Ditto.
3873 (aq10w_operand): Ditto.
3874 (aq10d_operand): Ditto.
3875 (aq12b_operand): Ditto.
3876 (aq12h_operand): Ditto.
3877 (aq12w_operand): Ditto.
3878 (aq12d_operand): Ditto.
3879 (const_m1_operand): Ditto.
3880 (reg_or_m1_operand): Ditto.
3881 (const_exp_2_operand): Ditto.
3882 (const_exp_4_operand): Ditto.
3883 (const_exp_8_operand): Ditto.
3884 (const_exp_16_operand): Ditto.
3885 (const_exp_32_operand): Ditto.
3886 (const_0_or_1_operand): Ditto.
3887 (const_0_to_3_operand): Ditto.
3888 (const_0_to_7_operand): Ditto.
3889 (const_2_or_3_operand): Ditto.
3890 (const_4_to_7_operand): Ditto.
3891 (const_8_to_15_operand): Ditto.
3892 (const_16_to_31_operand): Ditto.
3893 (qi_mask_operand): Ditto.
3894 (hi_mask_operand): Ditto.
3895 (si_mask_operand): Ditto.
3897 (db4_operand): Ditto.
3898 (db7_operand): Ditto.
3899 (db8_operand): Ditto.
3900 (ib3_operand): Ditto.
3901 (sb4_operand): Ditto.
3902 (sb5_operand): Ditto.
3903 (sb8_operand): Ditto.
3904 (sd8_operand): Ditto.
3905 (ub4_operand): Ditto.
3906 (ub8_operand): Ditto.
3907 (uh4_operand): Ditto.
3908 (uw4_operand): Ditto.
3909 (uw5_operand): Ditto.
3910 (uw6_operand): Ditto.
3911 (uw8_operand): Ditto.
3912 (addiur2_operand): Ditto.
3913 (addiusp_operand): Ditto.
3914 (andi16_operand): Ditto.
3915 (movep_src_register): Ditto.
3916 (movep_src_operand): Ditto.
3917 (fcc_reload_operand): Ditto.
3918 (muldiv_target_operand): Ditto.
3919 (const_vector_same_val_operand): Ditto.
3920 (const_vector_same_simm5_operand): Ditto.
3921 (const_vector_same_uimm5_operand): Ditto.
3922 (const_vector_same_ximm5_operand): Ditto.
3923 (const_vector_same_uimm6_operand): Ditto.
3924 (par_const_vector_shf_set_operand): Ditto.
3925 (reg_or_vector_same_val_operand): Ditto.
3926 (reg_or_vector_same_simm5_operand): Ditto.
3927 (reg_or_vector_same_uimm5_operand): Ditto.
3928 (reg_or_vector_same_ximm5_operand): Ditto.
3929 (reg_or_vector_same_uimm6_operand): Ditto.
3930 * doc/md.texi: Ditto.
3931 * config/loongarch/lsx.md: New file.
3933 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3935 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
3936 (get_all_predecessors): New function.
3937 (get_all_successors): Ditto.
3938 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
3939 (get_all_successors): Ditto.
3940 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
3941 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
3943 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
3945 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
3946 (split_addsi): Likewise.
3947 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
3948 'N', 'x', and 'J' code letters.
3949 (arc_output_addsi): Make it static.
3950 (split_addsi): Remove it.
3951 * config/arc/arc.h (UNSIGNED_INT*): New defines.
3952 (SINNED_INT*): Likewise.
3953 * config/arc/arc.md (type): Add add, sub, bxor types.
3954 (tst_movb): Change code letter from 's' to 'x'.
3955 (andsi3_i): Likewise.
3956 (addsi3_mixed): Refurbish the pattern.
3957 (call_i): Change code letter from 'S' to 'J'.
3958 * config/arc/arc700.md: Add newly introduced types.
3959 * config/arc/arcHS.md: Likewsie.
3960 * config/arc/arcHS4x.md: Likewise.
3961 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
3962 (CM4): Update description.
3963 (CP4, C6u, C6n, CIs, C4p): New constraint.
3965 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
3967 * common/config/arc/arc-common.cc (arc_option_optimization_table):
3968 Remove mbbit_peephole.
3969 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
3970 (store_direct): Likewise.
3971 (BBIT peephole2): Likewise.
3972 * config/arc/arc.opt (mbbit-peephole): Ignore option.
3973 * doc/invoke.texi (mbbit-peephole): Update document.
3975 2023-09-05 Jakub Jelinek <jakub@redhat.com>
3977 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
3980 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3982 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
3983 options passed from driver to gnat1 as explicit for multilib.
3985 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3987 * config.gcc: add loongarch*-elf target.
3988 * config/loongarch/elf.h: New file.
3989 Link against newlib by default.
3991 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3993 * config.gcc: use -mstrict-align for building libraries
3994 if --with-strict-align-lib is given.
3995 * doc/install.texi: likewise.
3997 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3999 * config/loongarch/loongarch-c.cc: Export macros
4000 "__loongarch_{arch,tune}" in the preprocessor.
4002 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
4004 * config.gcc: Make --with-abi= obsolete, decide the default ABI
4005 with target triplet. Allow specifying multilib library build
4006 options with --with-multilib-list and --with-multilib-default.
4007 * config/loongarch/t-linux: Likewise.
4008 * config/loongarch/genopts/loongarch-strings: Likewise.
4009 * config/loongarch/loongarch-str.h: Likewise.
4010 * doc/install.texi: Likewise.
4011 * config/loongarch/genopts/loongarch.opt.in: Introduce
4012 -m[no-]l[a]sx options. Only process -m*-float and
4013 -m[no-]l[a]sx in the GCC driver.
4014 * config/loongarch/loongarch.opt: Likewise.
4015 * config/loongarch/la464.md: Likewise.
4016 * config/loongarch/loongarch-c.cc: Likewise.
4017 * config/loongarch/loongarch-cpu.cc: Likewise.
4018 * config/loongarch/loongarch-cpu.h: Likewise.
4019 * config/loongarch/loongarch-def.c: Likewise.
4020 * config/loongarch/loongarch-def.h: Likewise.
4021 * config/loongarch/loongarch-driver.cc: Likewise.
4022 * config/loongarch/loongarch-driver.h: Likewise.
4023 * config/loongarch/loongarch-opts.cc: Likewise.
4024 * config/loongarch/loongarch-opts.h: Likewise.
4025 * config/loongarch/loongarch.cc: Likewise.
4026 * doc/invoke.texi: Likewise.
4028 2023-09-05 liuhongt <hongtao.liu@intel.com>
4030 * config/i386/sse.md: (V8BFH_128): Renamed to ..
4031 (VHFBF_128): .. this.
4032 (V16BFH_256): Renamed to ..
4033 (VHFBF_256): .. this.
4034 (avx512f_mov<mode>): Extend to V_128.
4035 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
4036 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
4037 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
4038 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
4039 * config/i386/i386-expand.cc (expand_vec_perm_blend):
4040 Canonicalize vec_merge.
4042 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4044 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
4045 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
4046 (autovectorize_vector_modes): Ditto.
4047 (vectorize_related_mode): Ditto.
4049 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
4051 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
4052 all 32b Darwin PowerPC cases.
4054 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
4056 * config/darwin-sections.def (static_init_section): Add the
4057 __TEXT,__StaticInit section.
4058 * config/darwin.cc (darwin_function_section): Use the static init
4059 section for global initializers, to match other platform toolchains.
4061 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
4063 * config/darwin-sections.def (darwin_exception_section): Move to
4065 * config/darwin.cc (darwin_emit_except_table_label): Align before
4066 the exception table label.
4067 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
4068 relative 4byte relocs.
4070 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
4072 * config/darwin.cc (dump_machopic_symref_flags): New.
4073 (debug_machopic_symref_flags): New.
4075 2023-09-04 Pan Li <pan2.li@intel.com>
4077 * config/riscv/riscv-vector-builtins-types.def
4078 (vfloat16mf4_t): Add FP16 intrinsic def.
4079 (vfloat16mf2_t): Ditto.
4080 (vfloat16m1_t): Ditto.
4081 (vfloat16m2_t): Ditto.
4082 (vfloat16m4_t): Ditto.
4083 (vfloat16m8_t): Ditto.
4085 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
4087 PR tree-optimization/108757
4088 * match.pd ((X - N * M) / N): New pattern.
4089 ((X + N * M) / N): New pattern.
4090 ((X + C) div_rshift N): New pattern.
4092 2023-09-04 Guo Jie <guojie@loongson.cn>
4094 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
4095 movsf_hardfloat and movdf_hardfloat.
4097 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
4099 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
4100 In unsigned QImode test, check for sign extended subreg and/or
4101 constant operands, and do a sign extension in that case.
4102 * config/loongarch/loongarch.md (TARGET_64BIT): Define
4103 template cbranchqi4.
4105 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
4107 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
4108 from memory into floating-point registers.
4110 2023-09-03 Pan Li <pan2.li@intel.com>
4112 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
4114 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
4116 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
4118 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
4119 pointer before overwriting it.
4121 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
4123 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
4124 Associate the __float128 type to float128_type_node so that it can
4125 be recognized by the compiler.
4126 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
4127 Add the flag "FLOAT128_TYPE" to gcc and associate a function
4128 with the suffix "q" to "f128".
4129 * doc/extend.texi:Added support for 128-bit floating-point functions on
4130 the LoongArch architecture.
4132 2023-09-01 Jakub Jelinek <jakub@redhat.com>
4135 * common.opt (fabi-version=): Document version 19.
4136 * doc/invoke.texi (-fabi-version=): Likewise.
4138 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
4140 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
4141 New combine pattern.
4142 (*cond_<float_cvt><vconvert><mode>): Ditto.
4143 (*cond_<optab><vnconvert><mode>): Ditto.
4144 (*cond_<float_cvt><vnconvert><mode>): Ditto.
4145 (*cond_<optab><mode><vnconvert>): Ditto.
4146 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
4147 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
4148 (<float_cvt><vconvert><mode>2): Adjust.
4149 (<optab><vnconvert><mode>2): Adjust.
4150 (<float_cvt><vnconvert><mode>2): Adjust.
4151 (<optab><mode><vnconvert>2): Adjust.
4152 (<float_cvt><mode><vnconvert>2): Adjust.
4153 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
4155 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
4157 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
4158 New combine pattern.
4159 (*cond_trunc<mode><v_double_trunc>): Ditto.
4160 * config/riscv/autovec.md: Adjust.
4161 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
4163 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
4165 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
4166 New combine pattern.
4167 (*cond_<optab><v_quad_trunc><mode>): Ditto.
4168 (*cond_<optab><v_oct_trunc><mode>): Ditto.
4169 (*cond_trunc<mode><v_double_trunc>): Ditto.
4170 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
4171 (<optab><v_oct_trunc><mode>2): Ditto.
4173 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
4175 * config/riscv/autovec.md: Adjust.
4176 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
4177 (expand_cond_len_binop): Ditto.
4178 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
4179 (expand_cond_len_op): Ditto.
4180 (expand_cond_len_unop): Ditto.
4181 (expand_cond_len_binop): Ditto.
4182 (expand_cond_len_ternop): Ditto.
4184 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4186 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
4187 VECT_COMPARE_COSTS by default.
4189 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
4191 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
4193 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4195 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
4197 * config/riscv/riscv.opt: Add dynamic compile option.
4199 2023-09-01 Pan Li <pan2.li@intel.com>
4201 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
4202 vls floating-point autovec.
4203 * config/riscv/vector-iterators.md: New iterator for
4204 floating-point V and VLS.
4205 * config/riscv/vector.md: Add VLS to floating-point binop.
4207 2023-09-01 Andrew Pinski <apinski@marvell.com>
4209 PR tree-optimization/19832
4210 * match.pd: Add pattern to optimize
4211 `(a != b) ? a OP b : c`.
4213 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
4214 Guo Jie <guojie@loongson.cn>
4217 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
4218 frame_pointer_needed to determine whether to use the $fp register.
4220 2023-08-31 Andrew Pinski <apinski@marvell.com>
4222 PR tree-optimization/110915
4223 * match.pd (min_value, max_value): Extend to vector constants.
4225 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
4227 * config.in: Regenerate.
4228 * config/darwin-c.cc: Change spelling to macOS.
4229 * config/darwin-driver.cc: Likewise.
4230 * config/darwin.h: Likewise.
4231 * configure.ac: Likewise.
4232 * doc/contrib.texi: Likewise.
4233 * doc/extend.texi: Likewise.
4234 * doc/invoke.texi: Likewise.
4235 * doc/plugins.texi: Likewise.
4236 * doc/tm.texi: Regenerate.
4237 * doc/tm.texi.in: Change spelling to macOS.
4238 * plugin.cc: Likewise.
4240 2023-08-31 Pan Li <pan2.li@intel.com>
4242 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
4243 * config/riscv/autovec.md: Ditto.
4245 2023-08-31 Pan Li <pan2.li@intel.com>
4247 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
4248 * config/riscv/autovec.md: Ditto.
4250 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
4252 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
4253 rather than a call. List each possible destination register
4254 in the call pattern.
4256 2023-08-31 Pan Li <pan2.li@intel.com>
4258 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
4259 * config/riscv/autovec.md: Ditto.
4261 2023-08-31 Pan Li <pan2.li@intel.com>
4262 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4264 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
4265 * config/riscv/autovec.md: Ditto.
4266 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
4268 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
4270 * config/riscv/autovec.md (shifts): Use
4271 vector_scalar_shift_operand.
4272 * config/riscv/predicates.md (vector_scalar_shift_operand): New
4275 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4277 * config.gcc: Add vector cost model framework for RVV.
4278 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
4279 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
4280 * config/riscv/t-riscv: Ditto.
4281 * config/riscv/riscv-vector-costs.cc: New file.
4282 * config/riscv/riscv-vector-costs.h: New file.
4284 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
4287 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
4288 AltiVec address operands.
4289 (define_insn_and_split movxo): Likewise.
4290 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
4291 redundant mode size check.
4293 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
4295 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
4296 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
4297 Change to default policy.
4298 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
4299 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
4300 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
4302 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
4304 * config/riscv/autovec-opt.md: Adjust.
4305 * config/riscv/autovec-vls.md: Ditto.
4306 * config/riscv/autovec.md: Ditto.
4307 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
4308 (enum insn_flags): Add insn flags.
4309 (emit_vlmax_insn): Adjust.
4310 (emit_vlmax_fp_insn): Delete.
4311 (emit_vlmax_ternary_insn): Delete.
4312 (emit_vlmax_fp_ternary_insn): Delete.
4313 (emit_nonvlmax_insn): Adjust.
4314 (emit_vlmax_slide_insn): Delete.
4315 (emit_nonvlmax_slide_tu_insn): Delete.
4316 (emit_vlmax_merge_insn): Delete.
4317 (emit_vlmax_cmp_insn): Delete.
4318 (emit_vlmax_cmp_mu_insn): Delete.
4319 (emit_vlmax_masked_mu_insn): Delete.
4320 (emit_scalar_move_insn): Delete.
4321 (emit_nonvlmax_integer_move_insn): Delete.
4322 (emit_vlmax_insn_lra): Add.
4323 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
4324 (emit_vlmax_insn): Adjust.
4325 (emit_nonvlmax_insn): Adjust.
4326 (emit_vlmax_insn_lra): Add.
4327 (emit_vlmax_fp_insn): Delete.
4328 (emit_vlmax_ternary_insn): Delete.
4329 (emit_vlmax_fp_ternary_insn): Delete.
4330 (emit_vlmax_slide_insn): Delete.
4331 (emit_nonvlmax_slide_tu_insn): Delete.
4332 (emit_nonvlmax_slide_insn): Delete.
4333 (emit_vlmax_merge_insn): Delete.
4334 (emit_vlmax_cmp_insn): Delete.
4335 (emit_vlmax_cmp_mu_insn): Delete.
4336 (emit_vlmax_masked_insn): Delete.
4337 (emit_nonvlmax_masked_insn): Delete.
4338 (emit_vlmax_masked_store_insn): Delete.
4339 (emit_nonvlmax_masked_store_insn): Delete.
4340 (emit_vlmax_masked_mu_insn): Delete.
4341 (emit_vlmax_masked_fp_mu_insn): Delete.
4342 (emit_nonvlmax_tu_insn): Delete.
4343 (emit_nonvlmax_fp_tu_insn): Delete.
4344 (emit_nonvlmax_tumu_insn): Delete.
4345 (emit_nonvlmax_fp_tumu_insn): Delete.
4346 (emit_scalar_move_insn): Delete.
4347 (emit_cpop_insn): Delete.
4348 (emit_vlmax_integer_move_insn): Delete.
4349 (emit_nonvlmax_integer_move_insn): Delete.
4350 (emit_vlmax_gather_insn): Delete.
4351 (emit_vlmax_masked_gather_mu_insn): Delete.
4352 (emit_vlmax_compress_insn): Delete.
4353 (emit_nonvlmax_compress_insn): Delete.
4354 (emit_vlmax_reduction_insn): Delete.
4355 (emit_vlmax_fp_reduction_insn): Delete.
4356 (emit_nonvlmax_fp_reduction_insn): Delete.
4357 (expand_vec_series): Adjust.
4358 (expand_const_vector): Adjust.
4359 (legitimize_move): Adjust.
4360 (sew64_scalar_helper): Adjust.
4361 (expand_tuple_move): Adjust.
4362 (expand_vector_init_insert_elems): Adjust.
4363 (expand_vector_init_merge_repeating_sequence): Adjust.
4364 (expand_vec_cmp): Adjust.
4365 (expand_vec_cmp_float): Adjust.
4366 (expand_vec_perm): Adjust.
4367 (shuffle_merge_patterns): Adjust.
4368 (shuffle_compress_patterns): Adjust.
4369 (shuffle_decompress_patterns): Adjust.
4370 (expand_load_store): Adjust.
4371 (expand_cond_len_op): Adjust.
4372 (expand_cond_len_unop): Adjust.
4373 (expand_cond_len_binop): Adjust.
4374 (expand_gather_scatter): Adjust.
4375 (expand_cond_len_ternop): Adjust.
4376 (expand_reduction): Adjust.
4377 (expand_lanes_load_store): Adjust.
4378 (expand_fold_extract_last): Adjust.
4379 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
4380 * config/riscv/vector.md: Adjust.
4382 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
4385 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
4386 load/store with length only on 64-bit Power10.
4388 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
4390 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
4391 SWAP option is enabled.
4392 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
4394 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
4396 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
4397 Use common insn for signed and unsigned front-end definitions.
4398 * config/arm/arm_mve_builtins.def
4399 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
4400 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
4401 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
4404 (mve_rot): Likewise.
4406 (VxCADDQ_M): Likewise.
4407 * config/arm/unspecs.md (unspec): Likewise.
4408 * config/arm/mve.md: Fix minor typo.
4410 2023-08-31 liuhongt <hongtao.liu@intel.com>
4412 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
4413 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
4414 (VF_AVX512HFBF16): Renamed to VHFBF.
4415 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
4416 (VF_AVX512FP16): Removed.
4417 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
4418 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
4419 (rsqrt<mode>2): Ditto.
4420 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
4421 (vcond<mode><code>): Ditto.
4422 (vcond<sseintvecmodelower><mode>): Ditto.
4423 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
4424 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
4425 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
4426 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
4427 (cmla<conj_op><mode>4): Ditto.
4428 (fma_<mode>_fadd_fmul): Ditto.
4429 (fma_<mode>_fadd_fcmul): Ditto.
4430 (fma_<complexopname>_<mode>_fma_zero): Ditto.
4431 (fma_<mode>_fmaddc_bcst): Ditto.
4432 (fma_<mode>_fcmaddc_bcst): Ditto.
4433 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
4434 (cmul<conj_op><mode>3): Ditto.
4435 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
4437 (vec_unpacks_lo_<mode>): Ditto.
4438 (vec_unpacks_hi_<mode>): Ditto.
4439 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
4440 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
4441 (*vec_extract<mode>_0): Ditto.
4442 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
4444 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
4447 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
4449 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
4451 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
4452 (operator_minus::overflow_free_p): New declare.
4453 (operator_mult::overflow_free_p): New declare.
4454 * range-op.cc (range_op_handler::overflow_free_p): New function.
4455 (range_operator::overflow_free_p): New default function.
4456 (operator_plus::overflow_free_p): New function.
4457 (operator_minus::overflow_free_p): New function.
4458 (operator_mult::overflow_free_p): New function.
4459 * range-op.h (range_op_handler::overflow_free_p): New declare.
4460 (range_operator::overflow_free_p): New declare.
4461 * value-range.cc (irange::nonnegative_p): New function.
4462 (irange::nonpositive_p): New function.
4463 * value-range.h (irange::nonnegative_p): New declare.
4464 (irange::nonpositive_p): New declare.
4466 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
4469 * config/pru/predicates.md (const_0_operand): New predicate.
4470 (pru_cstore_comparison_operator): Ditto.
4471 * config/pru/pru.md (cstore<mode>4): New pattern.
4474 2023-08-30 Richard Biener <rguenther@suse.de>
4476 PR tree-optimization/111228
4477 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
4478 New simplifications.
4480 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4482 * config/riscv/autovec.md (movmisalign<mode>): Delete.
4484 2023-08-30 Die Li <lidie@eswincomputing.com>
4485 Fei Gao <gaofei@eswincomputing.com>
4487 * config/riscv/peephole.md: New pattern.
4488 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
4489 (zcmp_mv_sreg_operand): New predicate.
4490 * config/riscv/riscv.md: New predicate.
4491 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
4492 (*mvsa01<X:mode>): New pattern.
4494 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
4496 * config/riscv/riscv.cc
4497 (riscv_zcmp_can_use_popretz): true if popretz can be used
4498 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
4499 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
4500 * config/riscv/riscv.md: define A0_REGNUM
4501 * config/riscv/zc.md
4502 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
4503 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
4504 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
4505 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
4506 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
4507 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
4508 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
4509 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
4510 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
4511 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
4512 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
4513 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
4515 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
4517 * config/riscv/iterators.md
4518 (slot0_offset): slot 0 offset in stack GPRs area in bytes
4519 (slot1_offset): slot 1 offset in stack GPRs area in bytes
4520 (slot2_offset): likewise
4521 (slot3_offset): likewise
4522 (slot4_offset): likewise
4523 (slot5_offset): likewise
4524 (slot6_offset): likewise
4525 (slot7_offset): likewise
4526 (slot8_offset): likewise
4527 (slot9_offset): likewise
4528 (slot10_offset): likewise
4529 (slot11_offset): likewise
4530 (slot12_offset): likewise
4531 * config/riscv/predicates.md
4532 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
4533 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
4534 (stack_push_up_to_s1_operand): likewise
4535 (stack_push_up_to_s2_operand): likewise
4536 (stack_push_up_to_s3_operand): likewise
4537 (stack_push_up_to_s4_operand): likewise
4538 (stack_push_up_to_s5_operand): likewise
4539 (stack_push_up_to_s6_operand): likewise
4540 (stack_push_up_to_s7_operand): likewise
4541 (stack_push_up_to_s8_operand): likewise
4542 (stack_push_up_to_s9_operand): likewise
4543 (stack_push_up_to_s11_operand): likewise
4544 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
4545 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
4546 (stack_pop_up_to_s1_operand): likewise
4547 (stack_pop_up_to_s2_operand): likewise
4548 (stack_pop_up_to_s3_operand): likewise
4549 (stack_pop_up_to_s4_operand): likewise
4550 (stack_pop_up_to_s5_operand): likewise
4551 (stack_pop_up_to_s6_operand): likewise
4552 (stack_pop_up_to_s7_operand): likewise
4553 (stack_pop_up_to_s8_operand): likewise
4554 (stack_pop_up_to_s9_operand): likewise
4555 (stack_pop_up_to_s11_operand): likewise
4556 * config/riscv/riscv-protos.h
4557 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
4558 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
4559 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
4560 (riscv_use_multi_push): true if multi push is used
4561 (riscv_multi_push_sregs_count): num of sregs in multi-push
4562 (riscv_multi_push_regs_count): num of regs in multi-push
4563 (riscv_16bytes_align): align to 16 bytes
4564 (riscv_stack_align): moved to a better place
4565 (riscv_save_libcall_count): no functional change
4566 (riscv_compute_frame_info): add zcmp frame info
4567 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
4568 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
4569 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
4570 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
4571 (riscv_expand_prologue): allocate stack by cm.push
4572 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
4573 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
4574 (zcmp_base_adj): calculate stack adjustment base size
4575 (zcmp_additional_adj): calculate stack adjustment additional size
4576 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
4577 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
4588 (S10_MASK): likewise
4589 (S11_MASK): likewise
4590 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
4591 (ZCMP_MAX_SPIMM): max spimm value
4592 (ZCMP_SP_INC_STEP): zcmp sp increment step
4593 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
4594 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
4595 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
4596 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
4597 * config/riscv/riscv.md: include zc.md
4598 * config/riscv/zc.md: New file. machine description for zcmp
4600 2023-08-30 Jakub Jelinek <jakub@redhat.com>
4602 PR tree-optimization/110914
4603 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
4604 adjust_last_stmt unless len is known constant.
4606 2023-08-30 Jakub Jelinek <jakub@redhat.com>
4608 PR tree-optimization/111015
4609 * gimple-ssa-store-merging.cc
4610 (imm_store_chain_info::output_merged_store): Use wi::mask and
4611 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
4612 build_int_cst to build BIT_AND_EXPR mask.
4614 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4616 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
4617 (call_may_clobber_ref_p_1): Ditto.
4618 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
4619 (get_alias_ptr_type_for_ptr_address): Ditto.
4621 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4623 * config/riscv/riscv-vsetvl.cc
4624 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
4626 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4628 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
4629 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
4632 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
4634 * config/riscv/zicond.md: New splitters to rewrite single bit
4635 sign extension as the condition to a czero in the desired form.
4637 2023-08-29 David Malcolm <dmalcolm@redhat.com>
4640 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
4642 2023-08-29 David Malcolm <dmalcolm@redhat.com>
4645 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
4647 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
4649 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
4650 zvfh can generate zfa extended instruction fli.h, just like zfh.
4652 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
4653 Vineet Gupta <vineetg@rivosinc.com>
4655 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
4656 __riscv_unaligned_avoid with value 1 or
4657 __riscv_unaligned_slow with value 1 or
4658 __riscv_unaligned_fast with value 1
4659 * config/riscv/riscv.cc (riscv_option_override): Define
4660 riscv_user_wants_strict_align. Set
4661 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
4662 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
4664 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
4666 * config/riscv/autovec-vls.md: Update types
4667 * config/riscv/riscv.md: Add vector placeholder type
4668 * config/riscv/vector.md: Update types
4670 2023-08-29 Carl Love <cel@us.ibm.com>
4672 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
4673 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
4674 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
4675 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
4676 New buit-in definitions.
4677 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
4678 overloaded definition.
4679 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
4681 2023-08-29 Pan Li <pan2.li@intel.com>
4682 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4684 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
4685 (riscv_legitimize_const_move): Handle ref plus const poly.
4687 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
4689 * common/config/riscv/riscv-common.cc
4690 (riscv_implied_info): Add implications from unprivileged extensions.
4691 (riscv_ext_version_table): Add stub support for all unprivileged
4692 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
4694 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
4696 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
4697 Add stub support for all vendor extensions supported by Binutils.
4699 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
4701 * common/config/riscv/riscv-common.cc
4702 (riscv_implied_info): Add implications from privileged extensions.
4703 (riscv_ext_version_table): Add stub support for all privileged
4704 extensions supported by Binutils.
4706 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
4708 * config/riscv/autovec.md: Adjust
4709 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
4710 (get_vlmax_rtx): Exported.
4711 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
4712 (emit_vlmax_masked_gather_mu_insn): Adjust.
4713 (get_vlmax_rtx): New func.
4714 (expand_load_store): Adjust.
4715 (expand_cond_len_unop): Call expand_cond_len_op.
4716 (expand_cond_len_op): New subroutine.
4717 (expand_cond_len_binop): Call expand_cond_len_op.
4718 (expand_cond_len_ternop): Call expand_cond_len_op.
4719 (expand_lanes_load_store): Adjust.
4721 2023-08-29 Jakub Jelinek <jakub@redhat.com>
4724 PR middle-end/111209
4725 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
4726 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
4727 carry-out on higher limb. Don't match it though if it could be
4728 matched later on 4 argument addition/subtraction.
4730 2023-08-29 Andrew Pinski <apinski@marvell.com>
4732 PR tree-optimization/111147
4733 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
4734 instead of matching bit_not.
4736 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
4738 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
4741 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4743 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
4744 (pass_vsetvl::compute_local_properties): Fix bug.
4745 (pass_vsetvl::commit_vsetvls): Ditto.
4746 * config/riscv/riscv-vsetvl.h: New function.
4748 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
4751 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
4753 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
4754 force_reg mem target operand.
4755 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
4756 (*pred_mov<mode>): Remove imm -> reg pattern.
4757 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
4759 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
4761 * common/config/loongarch/loongarch-common.cc:
4762 Enable '-free' on O2 and above.
4763 * doc/invoke.texi: Modify the description information
4764 of the '-free' compilation option and add the LoongArch
4767 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
4769 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
4771 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
4773 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
4774 Implement the 'Zihintpause' extension, version 2.0.
4775 (riscv_ext_flag_table) Add 'Zihintpause' handling.
4776 * config/riscv/riscv-builtins.cc: Remove availability predicate
4777 "always" and add "hint_pause".
4778 (riscv_builtins) : Add "pause" extension.
4779 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
4780 * config/riscv/riscv.md (riscv_pause): Adjust output based on
4783 2023-08-28 Andrew Pinski <apinski@marvell.com>
4785 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
4786 instead of specifically checking for ~X.
4788 2023-08-28 Andrew Pinski <apinski@marvell.com>
4790 PR tree-optimization/111146
4791 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
4794 2023-08-28 Andrew Pinski <apinski@marvell.com>
4796 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
4797 when resimplify returns true.
4798 (match_simplify_replacement): Print only if accepted the match-and-simplify
4799 result rather than the full sequence.
4801 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4803 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
4805 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
4807 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4809 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
4811 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4813 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
4814 (vmulltq_poly): New.
4815 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
4816 (vmulltq_poly): New.
4817 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
4818 (vmulltq_poly): New.
4819 * config/arm/arm_mve.h (vmulltq_poly): Remove.
4820 (vmullbq_poly): Remove.
4821 (vmullbq_poly_m): Remove.
4822 (vmulltq_poly_m): Remove.
4823 (vmullbq_poly_x): Remove.
4824 (vmulltq_poly_x): Remove.
4825 (vmulltq_poly_p8): Remove.
4826 (vmullbq_poly_p8): Remove.
4827 (vmulltq_poly_p16): Remove.
4828 (vmullbq_poly_p16): Remove.
4829 (vmullbq_poly_m_p8): Remove.
4830 (vmullbq_poly_m_p16): Remove.
4831 (vmulltq_poly_m_p8): Remove.
4832 (vmulltq_poly_m_p16): Remove.
4833 (vmullbq_poly_x_p8): Remove.
4834 (vmullbq_poly_x_p16): Remove.
4835 (vmulltq_poly_x_p8): Remove.
4836 (vmulltq_poly_x_p16): Remove.
4837 (__arm_vmulltq_poly_p8): Remove.
4838 (__arm_vmullbq_poly_p8): Remove.
4839 (__arm_vmulltq_poly_p16): Remove.
4840 (__arm_vmullbq_poly_p16): Remove.
4841 (__arm_vmullbq_poly_m_p8): Remove.
4842 (__arm_vmullbq_poly_m_p16): Remove.
4843 (__arm_vmulltq_poly_m_p8): Remove.
4844 (__arm_vmulltq_poly_m_p16): Remove.
4845 (__arm_vmullbq_poly_x_p8): Remove.
4846 (__arm_vmullbq_poly_x_p16): Remove.
4847 (__arm_vmulltq_poly_x_p8): Remove.
4848 (__arm_vmulltq_poly_x_p16): Remove.
4849 (__arm_vmulltq_poly): Remove.
4850 (__arm_vmullbq_poly): Remove.
4851 (__arm_vmullbq_poly_m): Remove.
4852 (__arm_vmulltq_poly_m): Remove.
4853 (__arm_vmullbq_poly_x): Remove.
4854 (__arm_vmulltq_poly_x): Remove.
4856 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4858 * config/arm/arm-mve-builtins-functions.h (class
4859 unspec_mve_function_exact_insn_vmull_poly): New.
4861 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4863 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
4864 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
4866 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4868 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
4869 support for 'U' and 'p' format specifiers.
4871 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4873 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
4875 (TYPES_poly_8_16): New.
4877 * config/arm/arm-mve-builtins.def (p8): New type suffix.
4879 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
4881 (struct type_suffix_info): Add poly_p field.
4883 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4885 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
4887 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
4889 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
4891 * config/arm/arm_mve.h (vmulltq_int): Remove.
4892 (vmullbq_int): Remove.
4893 (vmullbq_int_m): Remove.
4894 (vmulltq_int_m): Remove.
4895 (vmullbq_int_x): Remove.
4896 (vmulltq_int_x): Remove.
4897 (vmulltq_int_u8): Remove.
4898 (vmullbq_int_u8): Remove.
4899 (vmulltq_int_s8): Remove.
4900 (vmullbq_int_s8): Remove.
4901 (vmulltq_int_u16): Remove.
4902 (vmullbq_int_u16): Remove.
4903 (vmulltq_int_s16): Remove.
4904 (vmullbq_int_s16): Remove.
4905 (vmulltq_int_u32): Remove.
4906 (vmullbq_int_u32): Remove.
4907 (vmulltq_int_s32): Remove.
4908 (vmullbq_int_s32): Remove.
4909 (vmullbq_int_m_s8): Remove.
4910 (vmullbq_int_m_s32): Remove.
4911 (vmullbq_int_m_s16): Remove.
4912 (vmullbq_int_m_u8): Remove.
4913 (vmullbq_int_m_u32): Remove.
4914 (vmullbq_int_m_u16): Remove.
4915 (vmulltq_int_m_s8): Remove.
4916 (vmulltq_int_m_s32): Remove.
4917 (vmulltq_int_m_s16): Remove.
4918 (vmulltq_int_m_u8): Remove.
4919 (vmulltq_int_m_u32): Remove.
4920 (vmulltq_int_m_u16): Remove.
4921 (vmullbq_int_x_s8): Remove.
4922 (vmullbq_int_x_s16): Remove.
4923 (vmullbq_int_x_s32): Remove.
4924 (vmullbq_int_x_u8): Remove.
4925 (vmullbq_int_x_u16): Remove.
4926 (vmullbq_int_x_u32): Remove.
4927 (vmulltq_int_x_s8): Remove.
4928 (vmulltq_int_x_s16): Remove.
4929 (vmulltq_int_x_s32): Remove.
4930 (vmulltq_int_x_u8): Remove.
4931 (vmulltq_int_x_u16): Remove.
4932 (vmulltq_int_x_u32): Remove.
4933 (__arm_vmulltq_int_u8): Remove.
4934 (__arm_vmullbq_int_u8): Remove.
4935 (__arm_vmulltq_int_s8): Remove.
4936 (__arm_vmullbq_int_s8): Remove.
4937 (__arm_vmulltq_int_u16): Remove.
4938 (__arm_vmullbq_int_u16): Remove.
4939 (__arm_vmulltq_int_s16): Remove.
4940 (__arm_vmullbq_int_s16): Remove.
4941 (__arm_vmulltq_int_u32): Remove.
4942 (__arm_vmullbq_int_u32): Remove.
4943 (__arm_vmulltq_int_s32): Remove.
4944 (__arm_vmullbq_int_s32): Remove.
4945 (__arm_vmullbq_int_m_s8): Remove.
4946 (__arm_vmullbq_int_m_s32): Remove.
4947 (__arm_vmullbq_int_m_s16): Remove.
4948 (__arm_vmullbq_int_m_u8): Remove.
4949 (__arm_vmullbq_int_m_u32): Remove.
4950 (__arm_vmullbq_int_m_u16): Remove.
4951 (__arm_vmulltq_int_m_s8): Remove.
4952 (__arm_vmulltq_int_m_s32): Remove.
4953 (__arm_vmulltq_int_m_s16): Remove.
4954 (__arm_vmulltq_int_m_u8): Remove.
4955 (__arm_vmulltq_int_m_u32): Remove.
4956 (__arm_vmulltq_int_m_u16): Remove.
4957 (__arm_vmullbq_int_x_s8): Remove.
4958 (__arm_vmullbq_int_x_s16): Remove.
4959 (__arm_vmullbq_int_x_s32): Remove.
4960 (__arm_vmullbq_int_x_u8): Remove.
4961 (__arm_vmullbq_int_x_u16): Remove.
4962 (__arm_vmullbq_int_x_u32): Remove.
4963 (__arm_vmulltq_int_x_s8): Remove.
4964 (__arm_vmulltq_int_x_s16): Remove.
4965 (__arm_vmulltq_int_x_s32): Remove.
4966 (__arm_vmulltq_int_x_u8): Remove.
4967 (__arm_vmulltq_int_x_u16): Remove.
4968 (__arm_vmulltq_int_x_u32): Remove.
4969 (__arm_vmulltq_int): Remove.
4970 (__arm_vmullbq_int): Remove.
4971 (__arm_vmullbq_int_m): Remove.
4972 (__arm_vmulltq_int_m): Remove.
4973 (__arm_vmullbq_int_x): Remove.
4974 (__arm_vmulltq_int_x): Remove.
4976 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4978 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
4979 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
4981 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4983 * config/arm/arm-mve-builtins-functions.h (class
4984 unspec_mve_function_exact_insn_vmull): New.
4986 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4988 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
4989 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
4991 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
4993 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
4994 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
4995 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
4996 (mve_vmulltq_int_<supf><mode>): Merge into ...
4997 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
4998 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
4999 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
5000 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
5001 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
5002 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
5003 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
5005 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5007 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
5010 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
5012 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
5013 (binary_acca_int64): Likewise.
5015 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
5017 * range-op-float.cc (fold_range): Handle relations.
5019 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
5021 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
5022 Optimize the function implementation.
5024 2023-08-28 liuhongt <hongtao.liu@intel.com>
5027 * config/i386/sse.md (V48_AVX2): Rename to ..
5028 (V48_128_256): .. this.
5029 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
5030 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
5031 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
5032 integral modes when TARGET_AVX2 is not available.
5033 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
5034 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
5036 (maskstore<mode><sseintvecmodelower>): Ditto.
5038 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5040 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
5042 (after_or_same_p): Ditto.
5043 (find_reg_killed_by): Delete.
5044 (has_vsetvl_killed_avl_p): Ditto.
5045 (anticipatable_occurrence_p): Refactor.
5046 (any_set_in_bb_p): Delete.
5047 (count_regno_occurrences): Ditto.
5048 (backward_propagate_worthwhile_p): Ditto.
5049 (demands_can_be_fused_p): Ditto.
5050 (earliest_pred_can_be_fused_p): New function.
5051 (vsetvl_dominated_by_p): Ditto.
5052 (vector_insn_info::parse_insn): Refactor.
5053 (vector_insn_info::merge): Refactor.
5054 (vector_insn_info::dump): Refactor.
5055 (vector_infos_manager::vector_infos_manager): Refactor.
5056 (vector_infos_manager::all_empty_predecessor_p): Delete.
5057 (vector_infos_manager::all_same_avl_p): Ditto.
5058 (vector_infos_manager::create_bitmap_vectors): Refactor.
5059 (vector_infos_manager::free_bitmap_vectors): Refactor.
5060 (vector_infos_manager::dump): Refactor.
5061 (pass_vsetvl::update_block_info): New function.
5062 (enum fusion_type): Ditto.
5063 (pass_vsetvl::get_backward_fusion_type): Delete.
5064 (pass_vsetvl::hard_empty_block_p): Ditto.
5065 (pass_vsetvl::backward_demand_fusion): Ditto.
5066 (pass_vsetvl::forward_demand_fusion): Ditto.
5067 (pass_vsetvl::demand_fusion): Ditto.
5068 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
5069 (pass_vsetvl::compute_local_properties): Ditto.
5070 (pass_vsetvl::earliest_fusion): New function.
5071 (pass_vsetvl::vsetvl_fusion): Ditto.
5072 (pass_vsetvl::commit_vsetvls): Refactor.
5073 (get_first_vsetvl_before_rvv_insns): Ditto.
5074 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
5075 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
5076 (pass_vsetvl::df_post_optimization): Refactor.
5077 (pass_vsetvl::lazy_vsetvl): Ditto.
5078 * config/riscv/riscv-vsetvl.h: Ditto.
5080 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5082 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
5083 * config/riscv/riscv-protos.h (enum insn_type): New enum.
5084 (expand_fold_extract_last): New function.
5085 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
5086 (emit_cpop_insn): Ditto.
5087 (emit_nonvlmax_compress_insn): Ditto.
5088 (expand_fold_extract_last): Ditto.
5089 * config/riscv/vector.md: Fix vcpop.m ratio demand.
5091 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
5093 * config/riscv/sync-rvwmo.md: updated types to "multi" or
5094 "atomic" based on number of assembly lines generated
5095 * config/riscv/sync-ztso.md: likewise
5096 * config/riscv/sync.md: likewise
5098 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
5100 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
5102 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
5103 instructions FLI.H/S/D can load.
5104 * config/riscv/iterators.md (ceil): New.
5105 * config/riscv/riscv-opts.h (MASK_ZFA): New.
5107 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
5108 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
5109 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
5111 (riscv_const_insns): Likewise.
5112 (riscv_legitimize_const_move): Likewise.
5113 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
5115 (riscv_split_doubleword_move): Likewise.
5116 (riscv_output_move): Output the mov instructions in zfa extension.
5117 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
5119 (riscv_secondary_memory_needed): Likewise.
5120 * config/riscv/riscv.md (fminm<mode>3): New.
5121 (fmaxm<mode>3): New.
5122 (movsidf2_low_rv32): New.
5123 (movsidf2_high_rv32): New.
5124 (movdfsisi3_rv32): New.
5125 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
5126 * config/riscv/riscv.opt: New.
5128 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
5131 * omp-general.cc (omp_runtime_api_procname): New.
5132 (omp_runtime_api_call): Moved here from omp-low.cc, and make
5134 * omp-general.h: Include omp-api.h.
5135 * omp-low.cc (omp_runtime_api_call): Delete this copy.
5137 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
5139 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
5140 * doc/gimple.texi (GIMPLE instruction set): Add
5141 GIMPLE_OMP_STRUCTURED_BLOCK.
5142 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
5143 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
5144 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
5145 GIMPLE_OMP_STRUCTURED_BLOCK.
5146 (pp_gimple_stmt_1): Likewise.
5147 * gimple-walk.cc (walk_gimple_stmt): Likewise.
5148 * gimple.cc (gimple_build_omp_structured_block): New.
5149 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
5150 * gimple.h (gimple_build_omp_structured_block): Declare.
5151 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
5152 (CASE_GIMPLE_OMP): Likewise.
5153 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
5154 (gimplify_expr): Likewise.
5155 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
5156 GIMPLE_OMP_STRUCTURED_BLOCK.
5157 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
5158 (lower_omp_1): Likewise.
5159 (diagnose_sb_1): Likewise.
5160 (diagnose_sb_2): Likewise.
5161 * tree-inline.cc (remap_gimple_stmt): Handle
5162 GIMPLE_OMP_STRUCTURED_BLOCK.
5163 (estimate_num_insns): Likewise.
5164 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
5165 (convert_local_reference_stmt): Likewise.
5166 (convert_gimple_call): Likewise.
5167 * tree-pretty-print.cc (dump_generic_node): Handle
5168 OMP_STRUCTURED_BLOCK.
5169 * tree.def (OMP_STRUCTURED_BLOCK): New.
5170 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
5172 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
5174 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
5175 cost. Add some comments about different constants handling.
5177 2023-08-25 Andrew Pinski <apinski@marvell.com>
5179 * match.pd (`a ? one_zero : one_zero`): Move
5180 below detection of minmax.
5182 2023-08-25 Andrew Pinski <apinski@marvell.com>
5184 * match.pd (`a | C -> C`): New pattern.
5186 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
5188 * caller-save.cc (new_saved_hard_reg):
5189 Rename TRUE/FALSE to true/false.
5190 (setup_save_areas): Ditto.
5191 * gcc.cc (set_collect_gcc_options): Ditto.
5192 (driver::build_multilib_strings): Ditto.
5193 (print_multilib_info): Ditto.
5194 * genautomata.cc (gen_cpu_unit): Ditto.
5195 (gen_query_cpu_unit): Ditto.
5196 (gen_bypass): Ditto.
5197 (gen_excl_set): Ditto.
5198 (gen_presence_absence_set): Ditto.
5199 (gen_presence_set): Ditto.
5200 (gen_final_presence_set): Ditto.
5201 (gen_absence_set): Ditto.
5202 (gen_final_absence_set): Ditto.
5203 (gen_automaton): Ditto.
5204 (gen_regexp_repeat): Ditto.
5205 (gen_regexp_allof): Ditto.
5206 (gen_regexp_oneof): Ditto.
5207 (gen_regexp_sequence): Ditto.
5208 (process_decls): Ditto.
5209 (reserv_sets_are_intersected): Ditto.
5210 (initiate_excl_sets): Ditto.
5211 (form_reserv_sets_list): Ditto.
5212 (check_presence_pattern_sets): Ditto.
5213 (check_absence_pattern_sets): Ditto.
5214 (check_regexp_units_distribution): Ditto.
5215 (check_unit_distributions_to_automata): Ditto.
5216 (create_ainsns): Ditto.
5217 (output_insn_code_cases): Ditto.
5218 (output_internal_dead_lock_func): Ditto.
5219 (form_important_insn_automata_lists): Ditto.
5220 * gengtype-state.cc (read_state_files_list): Ditto.
5221 * gengtype.cc (main): Ditto.
5222 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
5224 * gimple.cc (gimple_build_call_from_tree): Ditto.
5225 (preprocess_case_label_vec_for_gimple): Ditto.
5226 * gimplify.cc (gimplify_call_expr): Ditto.
5227 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
5229 2023-08-25 Richard Biener <rguenther@suse.de>
5231 PR tree-optimization/111137
5232 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
5233 Properly handle grouped stores from other SLP instances.
5235 2023-08-25 Richard Biener <rguenther@suse.de>
5237 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
5238 Split out from vect_slp_analyze_node_dependences, remove
5240 (vect_slp_analyze_load_dependences): Split out from
5241 vect_slp_analyze_node_dependences, adjust comments. Process
5242 queued stores before any disambiguation.
5243 (vect_slp_analyze_node_dependences): Remove.
5244 (vect_slp_analyze_instance_dependence): Adjust.
5246 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
5248 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
5250 (operator_not_equal::fold_range): Adjust for relations.
5251 (operator_lt::fold_range): Same.
5252 (operator_gt::fold_range): Same.
5253 (foperator_unordered_equal::fold_range): Same.
5254 (foperator_unordered_lt::fold_range): Same.
5255 (foperator_unordered_le::fold_range): Same.
5256 (foperator_unordered_gt::fold_range): Same.
5257 (foperator_unordered_ge::fold_range): Same.
5259 2023-08-25 Richard Biener <rguenther@suse.de>
5261 PR tree-optimization/111136
5262 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
5263 stores force STMT_VINFO_STRIDED_P and also duplicate that
5266 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5268 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
5271 2023-08-25 liuhongt <hongtao.liu@intel.com>
5273 * config/i386/sse.md (vec_set<mode>): Removed.
5274 (V_128H): Merge into ..
5276 (V_256H): Merge into ..
5278 (V_512): Add V32HF, V32BF.
5279 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
5281 (vcond<mode><sseintvecmodelower>): Removed
5282 (vcondu<mode><sseintvecmodelower>): Removed.
5283 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
5285 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
5288 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
5289 Adjust paramter order.
5291 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
5294 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
5296 2023-08-24 David Malcolm <dmalcolm@redhat.com>
5299 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
5300 list of functions known to the analyzer.
5302 2023-08-24 Richard Biener <rguenther@suse.de>
5304 PR tree-optimization/111123
5305 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
5306 remove indirect clobbers here ...
5307 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
5308 (remove_indirect_clobbers): New function.
5310 2023-08-24 Jan Hubicka <jh@suse.cz>
5312 * cfg.h (struct control_flow_graph): New field full_profile.
5313 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
5314 * cfg.cc (init_flow): Set full_profile to false.
5315 * graphite.cc (graphite_transform_loops): Set full_profile to false.
5316 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
5317 * predict.cc (pass_profile::execute): Set full_profile to true.
5318 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
5319 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
5320 if full_profile is set.
5321 * tree-inline.cc (initialize_cfun): Initialize full_profile.
5322 (expand_call_inline): Combine full_profile.
5324 2023-08-24 Richard Biener <rguenther@suse.de>
5326 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
5327 load_p to ldst_p, fix mistakes and rely on
5328 STMT_VINFO_DATA_REF.
5330 2023-08-24 Jan Hubicka <jh@suse.cz>
5332 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
5333 of newly build trap bb.
5335 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5337 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
5338 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
5339 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
5341 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
5343 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
5344 * config/riscv/riscv.cc (riscv_option_override): Set sched
5347 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
5349 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
5351 2023-08-24 Richard Biener <rguenther@suse.de>
5353 PR tree-optimization/111125
5354 * tree-vect-slp.cc (vect_slp_function): Split at novector
5355 loop entry, do not push blocks in novector loops.
5357 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
5359 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
5361 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5363 * genmatch.cc (decision_tree::gen): Support
5364 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
5365 * gimple-match-exports.cc (gimple_simplify): Ditto.
5366 (gimple_resimplify6): New function.
5367 (gimple_resimplify7): New function.
5368 (gimple_match_op::resimplify): Support
5369 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
5370 (convert_conditional_op): Ditto.
5371 (build_call_internal): Ditto.
5372 (try_conditional_simplification): Ditto.
5373 (gimple_extract): Ditto.
5374 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
5375 * internal-fn.cc (CASE): Ditto.
5377 2023-08-24 Richard Biener <rguenther@suse.de>
5379 PR tree-optimization/111115
5380 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
5381 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
5383 * tree-vect-slp.cc (arg3_arg2_map): New.
5384 (vect_get_operand_map): Handle IFN_MASK_STORE.
5385 (vect_slp_child_index_for_operand): New function.
5386 (vect_build_slp_tree_1): Handle statements with no LHS,
5388 (vect_remove_slp_scalar_calls): Likewise.
5389 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
5390 SLP child corresponding to the ifn value index.
5391 (vectorizable_store): Likewise for the mask index. Support
5393 (vectorizable_load): Lookup the SLP child corresponding to the
5396 2023-08-24 Richard Biener <rguenther@suse.de>
5398 PR tree-optimization/111125
5399 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
5400 for the remain_defs processing.
5402 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
5404 * config/aarch64/aarch64.cc: Include ssa.h.
5405 (aarch64_multiply_add_p): Require the second operand of an
5406 Advanced SIMD subtraction to be a multiplication. Assume that
5407 such an operation won't be fused if the second operand is used
5408 multiple times and if the first operand is also a multiplication.
5410 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5412 * tree-vect-loop.cc (vectorizable_reduction): Apply
5413 LEN_FOLD_EXTRACT_LAST.
5414 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
5416 2023-08-24 Richard Biener <rguenther@suse.de>
5418 PR tree-optimization/111128
5419 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
5420 Emit external shift operand inline if we promoted it with
5421 another pattern stmt.
5423 2023-08-24 Pan Li <pan2.li@intel.com>
5425 * config/riscv/autovec.md: Fix typo.
5427 2023-08-24 Pan Li <pan2.li@intel.com>
5429 * config/riscv/riscv-vector-builtins-bases.cc
5430 (class binop_frm): Removed.
5431 (class reverse_binop_frm): Ditto.
5432 (class widen_binop_frm): Ditto.
5433 (class vfmacc_frm): Ditto.
5434 (class vfnmacc_frm): Ditto.
5435 (class vfmsac_frm): Ditto.
5436 (class vfnmsac_frm): Ditto.
5437 (class vfmadd_frm): Ditto.
5438 (class vfnmadd_frm): Ditto.
5439 (class vfmsub_frm): Ditto.
5440 (class vfnmsub_frm): Ditto.
5441 (class vfwmacc_frm): Ditto.
5442 (class vfwnmacc_frm): Ditto.
5443 (class vfwmsac_frm): Ditto.
5444 (class vfwnmsac_frm): Ditto.
5445 (class unop_frm): Ditto.
5446 (class vfrec7_frm): Ditto.
5447 (class binop): Add frm_op_type template arg.
5448 (class unop): Ditto.
5449 (class widen_binop): Ditto.
5450 (class widen_binop_fp): Ditto.
5451 (class reverse_binop): Ditto.
5452 (class vfmacc): Ditto.
5453 (class vfnmsac): Ditto.
5454 (class vfmadd): Ditto.
5455 (class vfnmsub): Ditto.
5456 (class vfnmacc): Ditto.
5457 (class vfmsac): Ditto.
5458 (class vfnmadd): Ditto.
5459 (class vfmsub): Ditto.
5460 (class vfwmacc): Ditto.
5461 (class vfwnmacc): Ditto.
5462 (class vfwmsac): Ditto.
5463 (class vfwnmsac): Ditto.
5464 (class float_misc): Ditto.
5466 2023-08-24 Andrew Pinski <apinski@marvell.com>
5468 PR tree-optimization/111109
5469 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
5470 Add check to make sure cmp and icmp are inverse.
5472 2023-08-24 Andrew Pinski <apinski@marvell.com>
5474 PR tree-optimization/95929
5475 * match.pd (convert?(-a)): New pattern
5476 for 1bit integer types.
5478 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5481 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5483 * common/config/i386/cpuinfo.h (get_available_features):
5484 Add avx10_set and version and detect avx10.1.
5485 (cpu_indicator_init): Handle avx10.1-512.
5486 * common/config/i386/i386-common.cc
5487 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
5488 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
5489 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
5490 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
5491 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
5492 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
5494 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5495 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
5496 FEATURE_AVX10_512BIT.
5497 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
5498 AVX10_512BIT, AVX10_1 and AVX10_1_512.
5499 * config/i386/constraints.md (Yk): Add AVX10_1.
5502 * config/i386/cpuid.h (bit_AVX10): New.
5503 (bit_AVX10_256): Ditto.
5504 (bit_AVX10_512): Ditto.
5505 * config/i386/i386-c.cc (ix86_target_macros_internal):
5506 Define AVX10_512BIT and AVX10_1.
5507 * config/i386/i386-isa.def
5508 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
5509 (AVX10_1): Add DEF_PTA(AVX10_1).
5510 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
5511 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
5513 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
5514 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
5515 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
5516 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
5517 (ix86_conditional_register_usage): Ditto.
5518 (ix86_hard_regno_mode_ok): Ditto.
5519 (ix86_rtx_costs): Ditto.
5520 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
5521 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
5523 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
5524 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
5525 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
5528 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5531 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5533 * common/config/i386/i386-common.cc
5534 (ix86_check_avx10): New function to check isa_flags and
5535 isa_flags_explicit to emit warning when AVX10 is enabled
5537 (ix86_check_avx512): New function to check isa_flags and
5538 isa_flags_explicit to emit warning when AVX512 is enabled
5540 (ix86_handle_option): Do not change the flags when warning
5542 * config/i386/driver-i386.cc (host_detect_local_cpu):
5543 Do not append -mno-avx10.1 for -march=native.
5545 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5548 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5550 * common/config/i386/i386-common.cc
5551 (ix86_check_avx10_vector_width): New function to check isa_flags
5552 to emit a warning when there is a conflict in AVX10 options for
5554 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
5555 * config/i386/driver-i386.cc (host_detect_local_cpu):
5556 Do not append -mno-avx10-max-512bit for -march=native.
5558 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5561 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5563 * config/i386/avx512vldqintrin.h: Remove target attribute.
5564 * config/i386/i386-builtin.def (BDESC):
5565 Add OPTION_MASK_ISA2_AVX10_1.
5566 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
5567 * config/i386/i386-expand.cc
5568 (ix86_check_builtin_isa_match): Ditto.
5569 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
5570 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
5571 and avx10_1_or_avx512vl.
5572 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
5573 (VF1_128_256VLDQ_AVX10_1): Ditto.
5574 (VI8_AVX512VLDQ_AVX10_1): Ditto.
5575 (<sse>_andnot<mode>3<mask_name>):
5576 Add TARGET_AVX10_1 and change isa attr from avx512dq to
5577 avx10_1_or_avx512dq.
5578 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
5579 avx512vl to avx10_1_or_avx512vl.
5580 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
5581 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5582 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5584 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5586 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
5587 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5588 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
5590 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
5591 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
5592 Remove target check.
5593 (avx512dq_mul<mode>3<mask_name>): Ditto.
5594 (*avx512dq_mul<mode>3<mask_name>): Ditto.
5595 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5596 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
5597 Remove target check.
5598 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5599 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
5600 Remove target check.
5601 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
5602 (mask_avx512vl_condition): Ditto.
5605 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5608 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5610 * config/i386/avx512vldqintrin.h: Remove target attribute.
5611 * config/i386/i386-builtin.def (BDESC):
5612 Add OPTION_MASK_ISA2_AVX10_1.
5613 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
5614 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
5615 (VI48_AVX512VLDQ_AVX10_1): Ditto.
5616 (VF2_AVX512VL): Remove.
5617 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
5619 (*<code><mode>3<mask_name>): Change isa attribute to
5620 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
5621 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
5622 to avx10_1_or_avx512vl.
5623 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
5624 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5625 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
5627 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
5628 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5629 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
5631 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
5632 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5633 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
5634 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5635 (float<floatunssuffix>v4div4sf2<mask_name>):
5637 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5638 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5639 (float<floatunssuffix>v2div2sf2): Ditto.
5640 (float<floatunssuffix>v2div2sf2_mask): Ditto.
5641 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
5642 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
5643 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
5644 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
5645 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
5646 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
5647 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
5648 Change when constraint is enabled.
5650 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5653 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5655 * config/i386/avx512vldqintrin.h: Remove target attribute.
5656 * config/i386/i386-builtin.def (BDESC):
5657 Add OPTION_MASK_ISA2_AVX10_1.
5658 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
5659 (VFH_AVX512VLDQ_AVX10_1): Ditto.
5660 (VF1_AVX512VLDQ_AVX10_1): Ditto.
5661 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
5662 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5663 (vec_pack<floatprefix>_float_<mode>): Change iterator to
5664 VI8_AVX512VLDQ_AVX10_1. Remove target check.
5665 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
5666 VF1_AVX512VLDQ_AVX10_1. Remove target check.
5667 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
5668 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
5669 (avx512vl_vextractf128<mode>): Change iterator to
5670 VI48F_256_DQVL_AVX10_1. Remove target check.
5671 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
5672 (vec_extract_hi_<mode>): Ditto.
5673 (avx512vl_vinsert<mode>): Ditto.
5674 (vec_set_lo_<mode><mask_name>): Ditto.
5675 (vec_set_hi_<mode><mask_name>): Ditto.
5676 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
5677 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
5678 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
5679 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5680 * config/i386/subst.md (mask_avx512dq_condition): Add
5682 (mask_scalar_merge): Ditto.
5684 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5687 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
5690 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
5693 2023-08-24 Richard Biener <rguenther@suse.de>
5696 * dwarf2out.cc (prune_unused_types_walk): Handle
5697 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
5698 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
5699 and DW_TAG_dynamic_type as to only output them when referenced.
5701 2023-08-24 liuhongt <hongtao.liu@intel.com>
5703 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
5706 2023-08-24 liuhongt <hongtao.liu@intel.com>
5708 * common/config/i386/i386-common.cc (processor_names): Add new
5709 member graniterapids-s and arrowlake-s.
5710 * config/i386/i386-options.cc (processor_alias_table): Update
5711 table with PROCESSOR_ARROWLAKE_S and
5712 PROCESSOR_GRANITERAPIDS_D.
5713 (m_GRANITERAPID_D): New macro.
5714 (m_ARROWLAKE_S): Ditto.
5715 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
5716 (processor_cost_table): Add icelake_cost for
5717 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
5718 PROCESSOR_ARROWLAKE_S.
5719 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
5721 * config/i386/i386.h (enum processor_type): Add new member
5722 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
5723 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
5724 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
5726 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
5728 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
5729 to help simplify code further.
5731 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
5733 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
5734 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
5735 Initialize using a range instead of value and edge.
5736 (phi_group::calculate_using_modifier): Use initializer value and
5737 process for relations after trying for iteration convergence.
5738 (phi_group::refine_using_relation): Use initializer range.
5739 (phi_group::dump): Rework the dump output.
5740 (phi_analyzer::process_phi): Allow multiple constant initilizers.
5741 Dump groups immediately as created.
5742 (phi_analyzer::dump): Tweak output.
5743 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
5744 (phi_group::initial_value): Delete.
5745 (phi_group::refine_using_relation): Adjust prototype.
5746 (phi_group::m_initial_value): Delete.
5747 (phi_group::m_initial_edge): Delete.
5748 (phi_group::m_vr): Use int_range_max.
5749 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
5751 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
5753 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
5754 no group was created.
5755 (phi_analyzer::process_phi): Do not create groups of one phi node.
5757 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
5759 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
5760 CODE, CMP_CODE and BIT_CODE arguments.
5761 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
5762 (aarch64_gen_ccmp_next): Likewise.
5763 * doc/tm.texi: Regenerated.
5765 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
5767 * coretypes.h (rtx_code): Add forward declaration.
5768 * rtl.h (rtx_code): Make compatible with forward declaration.
5770 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
5773 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
5774 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
5775 DWIH mode iterator. Disable (=&r,m,m) alternative for
5777 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
5778 alternative for 32-bit targets.
5780 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
5782 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
5783 appropriate type attribute.
5785 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
5787 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
5788 (*copysign<mode>_neg): Ditto.
5789 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
5790 (<optab><mode>2): Ditto.
5791 (cond_<optab><mode>): New.
5792 (cond_len_<optab><mode>): Ditto.
5793 * config/riscv/riscv-protos.h (enum insn_type): New.
5794 (expand_cond_len_unop): New helper func.
5795 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
5796 (expand_cond_len_unop): New helper func.
5798 2023-08-23 Jan Hubicka <jh@suse.cz>
5800 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
5801 (should_duplicate_loop_header_p): Fix return value for static exits.
5802 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
5804 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
5806 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
5807 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
5808 and update the final nest accordingly.
5810 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
5812 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
5813 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
5814 and update the final nest accordingly.
5816 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
5818 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
5819 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
5820 gvec_oprnds with auto_delete_vec.
5822 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5824 * config/riscv/riscv-vsetvl.cc
5825 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
5827 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5829 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
5831 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
5833 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5835 * config/riscv/vector.md: Add attribute.
5837 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5839 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
5840 (vector_infos_manager::all_same_ratio_p): Ditto.
5841 (vector_infos_manager::all_same_avl_p): Ditto.
5842 (pass_vsetvl::refine_vsetvls): Ditto.
5843 (pass_vsetvl::cleanup_vsetvls): Ditto.
5844 (pass_vsetvl::commit_vsetvls): Ditto.
5845 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
5846 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
5847 (pass_vsetvl::compute_probabilities): Ditto.
5849 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5851 * config/riscv/t-riscv: Add riscv-vsetvl.def
5853 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
5855 * config/riscv/riscv.opt: Add --param names
5856 riscv-autovec-preference and riscv-autovec-lmul
5858 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
5860 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
5862 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
5864 * tree-core.h (enum omp_clause_defaultmap_kind): Add
5865 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
5866 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
5867 * tree-pretty-print.cc (dump_omp_clause): Likewise.
5869 2023-08-22 Jakub Jelinek <jakub@redhat.com>
5872 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
5873 types aren't supported in C++.
5875 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5877 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
5878 * internal-fn.cc (fold_len_extract_direct): Ditto.
5879 (expand_fold_len_extract_optab_fn): Ditto.
5880 (direct_fold_len_extract_optab_supported_p): Ditto.
5881 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
5882 * optabs.def (OPTAB_D): Ditto.
5884 2023-08-22 Richard Biener <rguenther@suse.de>
5886 * tree-vect-stmts.cc (vectorizable_store): Do not bump
5887 DR_GROUP_STORE_COUNT here. Remove early out.
5888 (vect_transform_stmt): Only call vectorizable_store on
5889 the last element of an interleaving chain.
5891 2023-08-22 Richard Biener <rguenther@suse.de>
5893 PR tree-optimization/94864
5894 PR tree-optimization/94865
5895 PR tree-optimization/93080
5896 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
5897 for vector insertion from vector extraction.
5899 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5900 Kewen.Lin <linkw@linux.ibm.com>
5902 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
5903 (vectorizable_live_operation): Add live vectorization for length loop
5906 2023-08-22 David Malcolm <dmalcolm@redhat.com>
5909 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
5911 2023-08-22 Pan Li <pan2.li@intel.com>
5913 * config/riscv/riscv-vector-builtins-bases.cc
5914 (vfwredusum_frm_obj): New declaration.
5916 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5917 * config/riscv/riscv-vector-builtins-functions.def
5918 (vfwredusum_frm): New intrinsic function def.
5920 2023-08-21 David Faust <david.faust@oracle.com>
5922 * config/bpf/bpf.md (neg): Second operand must be a register.
5924 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
5926 * config/riscv/bitmanip.md: Added bitmanip type to insns
5927 that are missing types.
5929 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
5931 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
5934 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
5936 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
5937 Fix format specifier.
5939 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
5941 * value-range.cc (frange::union_nans): Return false if nothing
5943 (range_tests_floats): New test.
5945 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
5947 PR tree-optimization/111048
5948 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
5950 (fold_vec_perm_cst): Remove workaround and again call
5951 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
5952 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
5954 2023-08-21 Richard Biener <rguenther@suse.de>
5956 PR tree-optimization/111082
5957 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
5958 pun operations that can overflow.
5960 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5962 * lcm.cc (compute_antinout_edge): Export as global use.
5963 (compute_earliest): Ditto.
5964 (compute_rev_insert_delete): Ditto.
5965 * lcm.h (compute_antinout_edge): Ditto.
5966 (compute_earliest): Ditto.
5968 2023-08-21 Richard Biener <rguenther@suse.de>
5970 PR tree-optimization/111070
5971 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
5972 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
5974 2023-08-21 Andrew Pinski <apinski@marvell.com>
5976 PR tree-optimization/111002
5977 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
5979 2023-08-21 liuhongt <hongtao.liu@intel.com>
5981 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
5983 * common/config/i386/i386-common.cc (alias_table): Support
5984 -march=gracemont as an alias of -march=alderlake.
5986 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
5988 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
5989 instead of src in the call to ix86_expand_sse_cmp.
5990 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
5991 force operands[1] to a register.
5992 (<any_extend:insn>v4hiv4si2): Ditto.
5993 (<any_extend:insn>v2siv2di2): Ditto.
5995 2023-08-20 Andrew Pinski <apinski@marvell.com>
5997 PR tree-optimization/111006
5998 PR tree-optimization/110986
5999 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
6001 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
6004 * Makefile.in: improve error message when /usr/include is
6007 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
6009 PR middle-end/111017
6010 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
6011 to expand_omp_build_cond for 'factor != 0' condition, resulting
6012 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
6014 2023-08-19 Guo Jie <guojie@loongson.cn>
6015 Lulu Cheng <chenglulu@loongson.cn>
6017 * config/loongarch/t-loongarch: Add loongarch-driver.h into
6018 TM_H. Add loongarch-def.h and loongarch-tune.h into
6021 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
6024 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
6025 Also handle V2QImode.
6026 (ix86_expand_sse_extend): New function.
6027 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
6028 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
6029 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
6030 (<any_extend:insn>v2hiv2si2): Ditto.
6031 (<any_extend:insn>v2qiv2hi2): Ditto.
6032 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
6033 (<any_extend:insn>v4hiv4si2): Ditto.
6034 (<any_extend:insn>v2siv2di2): Ditto.
6036 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
6039 * value-range.cc (irange::union_bitmask): Return FALSE if updated
6040 bitmask is semantically equivalent to the original mask.
6041 (irange::intersect_bitmask): Same.
6042 (irange::get_bitmask): Add comment.
6044 2023-08-18 Richard Biener <rguenther@suse.de>
6046 PR tree-optimization/111019
6047 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
6048 also scrap base and offset in case the ref is indirect.
6050 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
6052 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
6054 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
6057 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
6059 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
6061 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
6063 (vectorizable_store): ... here.
6065 2023-08-18 Richard Biener <rguenther@suse.de>
6067 PR tree-optimization/111048
6068 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
6071 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
6074 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
6077 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
6079 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
6080 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
6081 and update the final nest accordingly.
6083 2023-08-18 Andrew Pinski <apinski@marvell.com>
6085 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
6086 cond_len_neg and cond_len_one_cmpl.
6088 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
6090 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
6091 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
6092 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
6093 (*local_pic_load_32d<ANYF:mode>): Ditto.
6094 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
6095 (*local_pic_store<ANYF:mode>): Ditto.
6096 (*local_pic_store<ANYLSF:mode>): Ditto.
6097 (*local_pic_store_32d<ANYF:mode>): Ditto.
6098 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
6100 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
6101 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6103 * config/riscv/predicates.md (vector_const_0_operand): New.
6104 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
6106 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
6108 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
6111 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
6113 PR tree-optimization/111009
6114 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
6116 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
6118 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
6119 slots_num initialization from here ...
6120 (lra_spill): ... to here before the 1st call of
6121 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
6124 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
6127 * doc/invoke.texi (Option Summary): Mention
6128 -Wcompare-distinct-pointer-types under `Warning Options'.
6129 (Warning Options): Document -Wcompare-distinct-pointer-types.
6131 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
6133 * recog.cc (memory_address_addr_space_p): Mark possibly unused
6136 2023-08-17 Richard Biener <rguenther@suse.de>
6138 PR tree-optimization/111039
6139 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
6140 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
6142 2023-08-17 Alex Coplan <alex.coplan@arm.com>
6144 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
6146 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
6149 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
6150 `naked' function attribute.
6151 (bpf_warn_func_return): New function.
6152 (TARGET_WARN_FUNC_RETURN): Define.
6153 (bpf_expand_prologue): Add preventive comment.
6154 (bpf_expand_epilogue): Likewise.
6155 * doc/extend.texi (BPF Function Attributes): Document the `naked'
6158 2023-08-17 Richard Biener <rguenther@suse.de>
6160 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
6161 !needs_fold_left_reduction_p to decide whether we can
6162 handle the reduction with association.
6163 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
6164 reductions perform all arithmetic in an unsigned type.
6166 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
6168 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
6170 * configure: Regenerate.
6172 2023-08-17 Pan Li <pan2.li@intel.com>
6174 * config/riscv/riscv-vector-builtins-bases.cc
6175 (widen_freducop): Add frm_opt_type template arg.
6176 (vfwredosum_frm_obj): New declaration.
6178 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6179 * config/riscv/riscv-vector-builtins-functions.def
6180 (vfwredosum_frm): New intrinsic function def.
6182 2023-08-17 Pan Li <pan2.li@intel.com>
6184 * config/riscv/riscv-vector-builtins-bases.cc
6185 (vfredosum_frm_obj): New declaration.
6187 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6188 * config/riscv/riscv-vector-builtins-functions.def
6189 (vfredosum_frm): New intrinsic function def.
6191 2023-08-17 Pan Li <pan2.li@intel.com>
6193 * config/riscv/riscv-vector-builtins-bases.cc
6194 (class freducop): Add frm_op_type template arg.
6195 (vfredusum_frm_obj): New declaration.
6197 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6198 * config/riscv/riscv-vector-builtins-functions.def
6199 (vfredusum_frm): New intrinsic function def.
6200 * config/riscv/riscv-vector-builtins-shapes.cc
6201 (struct reduc_alu_frm_def): New class for frm shape.
6202 (SHAPE): New declaration.
6203 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
6205 2023-08-17 Pan Li <pan2.li@intel.com>
6207 * config/riscv/riscv-vector-builtins-bases.cc
6208 (class vfncvt_f): Add frm_op_type template arg.
6209 (vfncvt_f_frm_obj): New declaration.
6211 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6212 * config/riscv/riscv-vector-builtins-functions.def
6213 (vfncvt_f_frm): New intrinsic function def.
6215 2023-08-17 Pan Li <pan2.li@intel.com>
6217 * config/riscv/riscv-vector-builtins-bases.cc
6218 (vfncvt_xu_frm_obj): New declaration.
6220 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6221 * config/riscv/riscv-vector-builtins-functions.def
6222 (vfncvt_xu_frm): New intrinsic function def.
6224 2023-08-17 Pan Li <pan2.li@intel.com>
6226 * config/riscv/riscv-vector-builtins-bases.cc
6227 (class vfncvt_x): Add frm_op_type template arg.
6228 (BASE): New declaration.
6229 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6230 * config/riscv/riscv-vector-builtins-functions.def
6231 (vfncvt_x_frm): New intrinsic function def.
6232 * config/riscv/riscv-vector-builtins-shapes.cc
6233 (struct narrow_alu_frm_def): New shape function for frm.
6234 (SHAPE): New declaration.
6235 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
6237 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6239 * config/i386/avx512vldqintrin.h: Remove target attribute.
6240 * config/i386/i386-builtin.def (BDESC):
6241 Add OPTION_MASK_ISA2_AVX10_1.
6242 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
6243 (VFH_AVX512VLDQ_AVX10_1): Ditto.
6244 (VF1_AVX512VLDQ_AVX10_1): Ditto.
6245 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
6246 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
6247 (vec_pack<floatprefix>_float_<mode>): Change iterator to
6248 VI8_AVX512VLDQ_AVX10_1. Remove target check.
6249 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
6250 VF1_AVX512VLDQ_AVX10_1. Remove target check.
6251 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
6252 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
6253 (avx512vl_vextractf128<mode>): Change iterator to
6254 VI48F_256_DQVL_AVX10_1. Remove target check.
6255 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
6256 (vec_extract_hi_<mode>): Ditto.
6257 (avx512vl_vinsert<mode>): Ditto.
6258 (vec_set_lo_<mode><mask_name>): Ditto.
6259 (vec_set_hi_<mode><mask_name>): Ditto.
6260 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
6261 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
6262 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
6263 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
6264 * config/i386/subst.md (mask_avx512dq_condition): Add
6266 (mask_scalar_merge): Ditto.
6268 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6270 * config/i386/avx512vldqintrin.h: Remove target attribute.
6271 * config/i386/i386-builtin.def (BDESC):
6272 Add OPTION_MASK_ISA2_AVX10_1.
6273 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
6274 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
6275 (VI48_AVX512VLDQ_AVX10_1): Ditto.
6276 (VF2_AVX512VL): Remove.
6277 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
6279 (*<code><mode>3<mask_name>): Change isa attribute to
6280 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
6281 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
6282 to avx10_1_or_avx512vl.
6283 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
6284 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
6285 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
6287 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
6288 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
6289 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
6291 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
6292 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
6293 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
6294 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
6295 (float<floatunssuffix>v4div4sf2<mask_name>):
6297 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
6298 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
6299 (float<floatunssuffix>v2div2sf2): Ditto.
6300 (float<floatunssuffix>v2div2sf2_mask): Ditto.
6301 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
6302 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
6303 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
6304 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
6305 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
6306 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
6307 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
6308 Change when constraint is enabled.
6310 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6313 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
6314 (second_sew_less_than_first_sew_p): Fix bug.
6315 (first_sew_less_than_second_sew_p): Ditto.
6317 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6319 * config/i386/avx512vldqintrin.h: Remove target attribute.
6320 * config/i386/i386-builtin.def (BDESC):
6321 Add OPTION_MASK_ISA2_AVX10_1.
6322 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
6323 * config/i386/i386-expand.cc
6324 (ix86_check_builtin_isa_match): Ditto.
6325 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
6326 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
6327 and avx10_1_or_avx512vl.
6328 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
6329 (VF1_128_256VLDQ_AVX10_1): Ditto.
6330 (VI8_AVX512VLDQ_AVX10_1): Ditto.
6331 (<sse>_andnot<mode>3<mask_name>):
6332 Add TARGET_AVX10_1 and change isa attr from avx512dq to
6333 avx10_1_or_avx512dq.
6334 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
6335 avx512vl to avx10_1_or_avx512vl.
6336 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
6337 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
6338 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
6340 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
6342 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
6343 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
6344 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
6346 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
6347 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
6348 Remove target check.
6349 (avx512dq_mul<mode>3<mask_name>): Ditto.
6350 (*avx512dq_mul<mode>3<mask_name>): Ditto.
6351 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
6352 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
6353 Remove target check.
6354 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
6355 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
6356 Remove target check.
6357 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
6358 (mask_avx512vl_condition): Ditto.
6361 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6363 * common/config/i386/i386-common.cc
6364 (ix86_check_avx10_vector_width): New function to check isa_flags
6365 to emit a warning when there is a conflict in AVX10 options for
6367 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
6368 * config/i386/driver-i386.cc (host_detect_local_cpu):
6369 Do not append -mno-avx10-max-512bit for -march=native.
6371 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6373 * common/config/i386/i386-common.cc
6374 (ix86_check_avx10): New function to check isa_flags and
6375 isa_flags_explicit to emit warning when AVX10 is enabled
6377 (ix86_check_avx512): New function to check isa_flags and
6378 isa_flags_explicit to emit warning when AVX512 is enabled
6380 (ix86_handle_option): Do not change the flags when warning
6382 * config/i386/driver-i386.cc (host_detect_local_cpu):
6383 Do not append -mno-avx10.1 for -march=native.
6385 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
6387 * common/config/i386/cpuinfo.h (get_available_features):
6388 Add avx10_set and version and detect avx10.1.
6389 (cpu_indicator_init): Handle avx10.1-512.
6390 * common/config/i386/i386-common.cc
6391 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
6392 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
6393 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
6394 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
6395 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
6396 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
6398 * common/config/i386/i386-cpuinfo.h (enum processor_features):
6399 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
6400 FEATURE_AVX10_512BIT.
6401 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
6402 AVX10_512BIT, AVX10_1 and AVX10_1_512.
6403 * config/i386/constraints.md (Yk): Add AVX10_1.
6406 * config/i386/cpuid.h (bit_AVX10): New.
6407 (bit_AVX10_256): Ditto.
6408 (bit_AVX10_512): Ditto.
6409 * config/i386/i386-c.cc (ix86_target_macros_internal):
6410 Define AVX10_512BIT and AVX10_1.
6411 * config/i386/i386-isa.def
6412 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
6413 (AVX10_1): Add DEF_PTA(AVX10_1).
6414 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
6415 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
6417 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
6418 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
6419 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
6420 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
6421 (ix86_conditional_register_usage): Ditto.
6422 (ix86_hard_regno_mode_ok): Ditto.
6423 (ix86_rtx_costs): Ditto.
6424 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
6425 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
6427 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
6428 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
6429 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
6432 2023-08-17 Sergei Trofimovich <siarheit@google.com>
6434 * flag-types.h (vrp_mode): Remove unused.
6436 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
6438 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
6441 2023-08-17 Andrew Pinski <apinski@marvell.com>
6443 * internal-fn.def (COND_NOT): New internal function.
6444 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
6446 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
6447 into conditional not.
6448 * optabs.def (cond_one_cmpl): New optab.
6449 (cond_len_one_cmpl): Likewise.
6451 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
6453 PR rtl-optimization/110254
6454 * ira-color.cc (improve_allocation): Update array
6455 allocated_hard_reg_p.
6457 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
6459 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
6460 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
6461 (lra_update_fp2sp_elimination): Ditto.
6462 (update_reg_eliminate): Adjust spill_pseudos call.
6463 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
6464 in lra_update_fp2sp_elimination.
6466 2023-08-16 Richard Ball <richard.ball@arm.com>
6468 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
6469 * config/aarch64/aarch64-tune.md: Regenerate.
6470 * doc/invoke.texi: Document Cortex-A720 CPU.
6472 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
6474 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
6476 (<u>avg<v_double_trunc>3_ceil): Ditto.
6477 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
6480 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
6482 * internal-fn.cc (vec_extract_direct): Change type argument
6484 (expand_vec_extract_optab_fn): Call convert_optab_fn.
6485 (direct_vec_extract_optab_supported_p): Use
6486 convert_optab_supported_p.
6488 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
6489 Richard Sandiford <richard.sandiford@arm.com>
6491 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
6492 (valid_mask_for_fold_vec_perm_cst_p): New function.
6493 (fold_vec_perm_cst): Likewise.
6494 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
6495 (test_fold_vec_perm_cst): New namespace.
6496 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
6497 (test_fold_vec_perm_cst::validate_res): Likewise.
6498 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
6499 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
6500 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
6501 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
6502 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
6503 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
6504 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
6505 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
6506 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
6507 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
6508 (test_fold_vec_perm_cst::test): Likewise.
6509 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
6511 2023-08-16 Pan Li <pan2.li@intel.com>
6513 * config/riscv/riscv-vector-builtins-bases.cc
6514 (BASE): New declaration.
6515 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6516 * config/riscv/riscv-vector-builtins-functions.def
6517 (vfwcvt_xu_frm): New intrinsic function def.
6519 2023-08-16 Pan Li <pan2.li@intel.com>
6521 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
6523 2023-08-16 Pan Li <pan2.li@intel.com>
6525 * config/riscv/riscv-vector-builtins-bases.cc
6526 (BASE): New declaration.
6527 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6528 * config/riscv/riscv-vector-builtins-functions.def
6529 (vfwcvt_x_frm): New intrinsic function def.
6531 2023-08-16 Pan Li <pan2.li@intel.com>
6533 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
6534 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6535 * config/riscv/riscv-vector-builtins-functions.def
6536 (vfcvt_f_frm): New intrinsic function def.
6538 2023-08-16 Pan Li <pan2.li@intel.com>
6540 * config/riscv/riscv-vector-builtins-bases.cc
6541 (BASE): New declaration.
6542 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6543 * config/riscv/riscv-vector-builtins-functions.def
6544 (vfcvt_xu_frm): New intrinsic function def..
6546 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
6549 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
6550 extract when the element is 7 on BE while 8 on LE for byte or 3 on
6551 BE while 4 on LE for halfword.
6553 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
6556 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
6558 (vsx_extract_v4si): New expand for V4SI extraction.
6559 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
6560 word 1 from BE order.
6561 (*mfvsrwz): New insn pattern for mfvsrwz.
6562 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
6563 word 1 from BE order.
6564 (*vsx_extract_si): Remove.
6565 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
6568 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6570 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
6572 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
6573 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
6574 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
6575 (expand_lanes_load_store): New function.
6576 * config/riscv/vector-iterators.md: New iterator.
6578 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6580 * internal-fn.cc (internal_load_fn_p): Apply
6581 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
6582 (internal_store_fn_p): Ditto.
6583 (internal_fn_len_index): Ditto.
6584 (internal_fn_mask_index): Ditto.
6585 (internal_fn_stored_value_index): Ditto.
6586 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
6587 (vect_load_lanes_supported): Ditto.
6588 * tree-vect-loop.cc: Ditto.
6589 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
6590 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
6591 (get_group_load_store_type): Ditto.
6592 (vectorizable_store): Ditto.
6593 (vectorizable_load): Ditto.
6594 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
6595 (vect_load_lanes_supported): Ditto.
6597 2023-08-16 Pan Li <pan2.li@intel.com>
6599 * config/riscv/riscv-vector-builtins-bases.cc
6600 (enum frm_op_type): New type for frm.
6601 (BASE): New declaration.
6602 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6603 * config/riscv/riscv-vector-builtins-functions.def
6604 (vfcvt_x_frm): New intrinsic function def.
6606 2023-08-16 liuhongt <hongtao.liu@intel.com>
6608 * config/i386/i386-builtins.cc
6609 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
6610 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
6611 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
6612 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
6613 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
6614 for use_scatter_8parts
6615 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
6616 (TARGET_USE_GATHER_8PARTS): .. this.
6617 (TARGET_USE_SCATTER): Rename to ..
6618 (TARGET_USE_SCATTER_8PARTS): .. this.
6619 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
6620 (X86_TUNE_USE_GATHER_8PARTS): .. this.
6621 (X86_TUNE_USE_SCATTER): Rename to
6622 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
6623 * config/i386/i386.opt: Add new options mgather, mscatter.
6625 2023-08-16 liuhongt <hongtao.liu@intel.com>
6627 * config/i386/i386-options.cc (m_GDS): New macro.
6628 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
6630 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
6631 (X86_TUNE_USE_GATHER): Ditto.
6633 2023-08-16 liuhongt <hongtao.liu@intel.com>
6635 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
6636 vmovsd when moving DFmode between SSE_REGS.
6637 (movhi_internal): Generate vmovdqa instead of vmovsh when
6638 moving HImode between SSE_REGS.
6639 (mov<mode>_internal): Use vmovaps instead of vmovsh when
6640 moving HF/BFmode between SSE_REGS.
6642 2023-08-15 David Faust <david.faust@oracle.com>
6644 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
6646 2023-08-15 David Faust <david.faust@oracle.com>
6649 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
6650 for any mode 32-bits or smaller, not just SImode.
6652 2023-08-15 Martin Jambor <mjambor@suse.cz>
6656 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
6657 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
6658 (ipcp_transform_function): Do not deallocate transformation info.
6659 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
6661 (vn_reference_lookup_2): When hitting default-def vuse, query
6662 IPA-CP transformation info for any known constants.
6664 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
6665 Thomas Schwinge <thomas@codesourcery.com>
6667 * gimplify.cc (oacc_region_type_name): New function.
6668 (oacc_default_clause): If no 'default' clause appears on this
6669 compute construct, see if one appears on a lexically containing
6671 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
6672 ctx->oacc_default_clause_ctx to current context.
6674 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6677 * config/riscv/predicates.md: Fix predicate.
6679 2023-08-15 Richard Biener <rguenther@suse.de>
6681 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
6682 slp_inst_kind_ctor handling.
6683 (vect_analyze_slp): Simplify.
6684 (vect_build_slp_instance): Dump when we analyze a CTOR.
6685 (vect_slp_check_for_constructors): Rename to ...
6686 (vect_slp_check_for_roots): ... this. Register a
6687 slp_root for CONSTRUCTORs instead of shoving them to
6688 the set of grouped stores.
6689 (vect_slp_analyze_bb_1): Adjust.
6691 2023-08-15 Richard Biener <rguenther@suse.de>
6693 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
6695 (_slp_instance::remain_defs): ... this.
6696 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
6697 (SLP_INSTANCE_REMAIN_DEFS): ... this.
6698 (slp_root::remain): New.
6699 (slp_root::slp_root): Adjust.
6700 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
6701 (vect_build_slp_instance): Get extra remain parameter,
6702 adjust former handling of a cut off stmt.
6703 (vect_analyze_slp_instance): Adjust.
6704 (vect_analyze_slp): Likewise.
6705 (_bb_vec_info::~_bb_vec_info): Likewise.
6706 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
6707 (vect_slp_check_for_constructors): Handle non-internal
6708 defs as remain defs of a reduction.
6709 (vectorize_slp_instance_root_stmt): Adjust.
6711 2023-08-15 Richard Biener <rguenther@suse.de>
6713 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
6714 (canonicalize_loop_induction_variables): Use find_loop_location.
6716 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
6719 * config/cris/cris-protos.h: Revert recent change.
6720 * config/cris/cris.cc (cris_legitimate_address_p): Remove
6721 code_helper unused parameter.
6722 (cris_legitimate_address_p_hook): New wrapper function.
6723 (TARGET_LEGITIMATE_ADDRESS_P): Change to
6724 cris_legitimate_address_p_hook.
6726 2023-08-15 Richard Biener <rguenther@suse.de>
6728 PR tree-optimization/110963
6729 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
6730 a PHI node when the expression is available on all edges
6731 and we insert at most one copy from a constant.
6733 2023-08-15 Richard Biener <rguenther@suse.de>
6735 PR tree-optimization/110991
6736 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
6737 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
6738 that will end up constant.
6740 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
6743 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
6745 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
6747 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
6748 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
6749 and update the final nest accordingly.
6751 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
6753 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
6756 2023-08-15 Pan Li <pan2.li@intel.com>
6758 * mode-switching.cc (create_pre_exit): Add SET insn check.
6760 2023-08-15 Pan Li <pan2.li@intel.com>
6762 * config/riscv/riscv-vector-builtins-bases.cc
6763 (class vfrec7_frm): New class for frm.
6764 (vfrec7_frm_obj): New declaration.
6766 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6767 * config/riscv/riscv-vector-builtins-functions.def
6768 (vfrec7_frm): New intrinsic function definition.
6769 * config/riscv/vector-iterators.md
6770 (VFMISC): Remove VFREC7.
6772 (float_insn_type): Ditto.
6773 (VFMISC_FRM): New int iterator.
6774 (misc_frm_op): New op for frm.
6775 (float_frm_insn_type): New type for frm.
6776 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
6777 New pattern for misc frm.
6779 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
6781 * lra-constraints.cc (curr_insn_transform): Process output stack
6782 pointer reloads before emitting reload insns.
6784 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
6787 * doc/invoke.texi: Add documentation of
6788 fanalyzer-show-events-in-system-headers
6790 2023-08-14 Jan Hubicka <jh@suse.cz>
6792 PR gcov-profile/110988
6793 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
6795 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
6797 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
6798 Enable compressed builtins when ZC* extensions enabled.
6799 * config/riscv/riscv-shorten-memrefs.cc:
6800 Enable shorten_memrefs pass when ZC* extensions enabled.
6801 * config/riscv/riscv.cc (riscv_compressed_reg_p):
6802 Enable compressible registers when ZC* extensions enabled.
6803 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
6804 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
6805 (riscv_first_stack_step): Allow compression of the register saves
6806 without adding extra instructions.
6807 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
6808 to 16 bits when ZC* extensions enabled.
6810 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
6812 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
6813 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
6820 (TARGET_ZCA): New target.
6821 (TARGET_ZCB): Ditto.
6822 (TARGET_ZCE): Ditto.
6823 (TARGET_ZCF): Ditto.
6824 (TARGET_ZCD): Ditto.
6825 (TARGET_ZCMP): Ditto.
6826 (TARGET_ZCMT): Ditto.
6827 * config/riscv/riscv.opt: New target variable.
6829 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6832 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
6834 * genrecog.cc (print_nonbool_test): Fix type error of
6835 switch (SUBREG_BYTE (op))'.
6837 2023-08-14 Richard Biener <rguenther@suse.de>
6839 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
6841 2023-08-14 Pan Li <pan2.li@intel.com>
6843 * config/riscv/riscv-vector-builtins-bases.cc
6844 (class unop_frm): New class for frm.
6845 (vfsqrt_frm_obj): New declaration.
6847 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6848 * config/riscv/riscv-vector-builtins-functions.def
6849 (vfsqrt_frm): New intrinsic function definition.
6851 2023-08-14 Pan Li <pan2.li@intel.com>
6853 * config/riscv/riscv-vector-builtins-bases.cc
6854 (class vfwnmsac_frm): New class for frm.
6855 (vfwnmsac_frm_obj): New declaration.
6857 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6858 * config/riscv/riscv-vector-builtins-functions.def
6859 (vfwnmsac_frm): New intrinsic function definition.
6861 2023-08-14 Pan Li <pan2.li@intel.com>
6863 * config/riscv/riscv-vector-builtins-bases.cc
6864 (class vfwmsac_frm): New class for frm.
6865 (vfwmsac_frm_obj): New declaration.
6867 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6868 * config/riscv/riscv-vector-builtins-functions.def
6869 (vfwmsac_frm): New intrinsic function definition.
6871 2023-08-14 Pan Li <pan2.li@intel.com>
6873 * config/riscv/riscv-vector-builtins-bases.cc
6874 (class vfwnmacc_frm): New class for frm.
6875 (vfwnmacc_frm_obj): New declaration.
6877 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6878 * config/riscv/riscv-vector-builtins-functions.def
6879 (vfwnmacc_frm): New intrinsic function definition.
6881 2023-08-14 Cui, Lili <lili.cui@intel.com>
6883 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
6886 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6888 * config/mmix/predicates.md (mmix_address_operand): Use
6889 lra_in_progress, not reload_in_progress.
6891 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6893 * config/mmix/mmix.cc: Re-enable LRA.
6895 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6897 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
6898 when lra_in_progress.
6900 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6902 * config/mmix/mmix.cc: Disable LRA for MMIX.
6904 2023-08-14 Pan Li <pan2.li@intel.com>
6906 * config/riscv/riscv-vector-builtins-bases.cc
6907 (class vfwmacc_frm): New class for vfwmacc frm.
6908 (vfwmacc_frm_obj): New declaration.
6910 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6911 * config/riscv/riscv-vector-builtins-functions.def
6912 (vfwmacc_frm): Function definition for vfwmacc.
6913 * config/riscv/riscv-vector-builtins.cc
6914 (function_expander::use_widen_ternop_insn): Add frm support.
6916 2023-08-14 Pan Li <pan2.li@intel.com>
6918 * config/riscv/riscv-vector-builtins-bases.cc
6919 (class vfnmsub_frm): New class for vfnmsub frm.
6920 (vfnmsub_frm): New declaration.
6922 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6923 * config/riscv/riscv-vector-builtins-functions.def
6924 (vfnmsub_frm): New function declaration.
6926 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
6928 * lra-constraints.cc (curr_insn_transform): Set done_p up and
6929 check it on true after processing output stack pointer reload.
6931 2023-08-12 Jakub Jelinek <jakub@redhat.com>
6933 * Makefile.in (USER_H): Add stdckdint.h.
6934 * ginclude/stdckdint.h: New file.
6936 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6939 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
6941 2023-08-12 Patrick Palka <ppalka@redhat.com>
6943 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
6944 Delimit output with braces.
6946 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6949 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
6951 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6953 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
6954 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
6955 * config/riscv/vector.md: Ditto.
6957 2023-08-11 David Malcolm <dmalcolm@redhat.com>
6960 * doc/analyzer.texi (__analyzer_get_strlen): New.
6961 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
6963 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
6965 * config/rx/rx.md (subdi3): Fix test for borrow.
6967 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6969 PR middle-end/110989
6970 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
6971 (vectorizable_load): Ditto.
6973 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
6975 * config/bpf/bpf.md (allocate_stack): Define.
6976 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
6977 stack pointer register.
6978 (FIXED_REGISTERS): Adjust accordingly.
6979 (CALL_USED_REGISTERS): Likewise.
6980 (REG_CLASS_CONTENTS): Likewise.
6981 (REGISTER_NAMES): Likewise.
6982 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
6983 space for callee-saved registers.
6984 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
6985 (bpf_expand_epilogue): Do not restore callee-saved registers in
6988 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
6990 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
6991 about too many arguments if function is always inlined.
6993 2023-08-11 Patrick Palka <ppalka@redhat.com>
6995 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
6996 Don't call component_ref_field_offset if the RHS isn't a decl.
6998 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
7001 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
7003 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
7005 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
7006 (process_alt_operands): Set the flag.
7007 (curr_insn_transform): Modify stack pointer offsets if output
7008 stack pointer reload is generated.
7010 2023-08-11 Joseph Myers <joseph@codesourcery.com>
7012 * configure: Regenerate.
7014 2023-08-11 Richard Biener <rguenther@suse.de>
7016 PR tree-optimization/110979
7017 * tree-vect-loop.cc (vectorizable_reduction): For
7018 FOLD_LEFT_REDUCTION without target support make sure
7019 we don't need to honor signed zeros and sign dependent rounding.
7021 2023-08-11 Richard Biener <rguenther@suse.de>
7023 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
7024 subgraph entries. Dump the used vector size based on the
7025 SLP subgraph entry root vector type.
7027 2023-08-11 Pan Li <pan2.li@intel.com>
7029 * config/riscv/riscv-vector-builtins-bases.cc
7030 (class vfmsub_frm): New class for vfmsub frm.
7031 (vfmsub_frm): New declaration.
7033 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7034 * config/riscv/riscv-vector-builtins-functions.def
7035 (vfmsub_frm): New function declaration.
7037 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7039 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
7040 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
7041 (expand_partial_store_optab_fn): Ditto.
7042 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
7043 (MASK_LEN_STORE_LANES): Ditto.
7044 * optabs.def (OPTAB_CD): Ditto.
7046 2023-08-11 Pan Li <pan2.li@intel.com>
7048 * config/riscv/riscv-vector-builtins-bases.cc
7049 (class vfnmadd_frm): New class for vfnmadd frm.
7050 (vfnmadd_frm): New declaration.
7052 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7053 * config/riscv/riscv-vector-builtins-functions.def
7054 (vfnmadd_frm): New function declaration.
7056 2023-08-11 Drew Ross <drross@redhat.com>
7057 Jakub Jelinek <jakub@redhat.com>
7059 PR tree-optimization/109938
7060 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
7062 2023-08-11 Pan Li <pan2.li@intel.com>
7064 * config/riscv/riscv-vector-builtins-bases.cc
7065 (class vfmadd_frm): New class for vfmadd frm.
7066 (vfmadd_frm_obj): New declaration.
7068 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7069 * config/riscv/riscv-vector-builtins-functions.def
7070 (vfmadd_frm): New function definition.
7072 2023-08-11 Pan Li <pan2.li@intel.com>
7074 * config/riscv/riscv-vector-builtins-bases.cc
7075 (class vfnmsac_frm): New class for vfnmsac frm.
7076 (vfnmsac_frm_obj): New declaration.
7078 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7079 * config/riscv/riscv-vector-builtins-functions.def
7080 (vfnmsac_frm): New function definition.
7082 2023-08-11 Jakub Jelinek <jakub@redhat.com>
7084 * doc/extend.texi (Typeof): Document typeof_unqual
7085 and __typeof_unqual__.
7087 2023-08-11 Andrew Pinski <apinski@marvell.com>
7089 PR tree-optimization/110954
7090 * generic-match-head.cc (bitwise_inverted_equal_p): Add
7091 wascmp argument and set it accordingly.
7092 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
7093 wascmp argument to the macro.
7094 (gimple_bitwise_inverted_equal_p): Add
7095 wascmp argument and set it accordingly.
7096 * match.pd (`a & ~a`, `a ^| ~a`): Update call
7097 to bitwise_inverted_equal_p and handle wascmp case.
7098 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
7099 call to bitwise_inverted_equal_p and check to see
7100 if was !wascmp or if precision was 1.
7102 2023-08-11 Martin Uecker <uecker@tugraz.at>
7105 * doc/invoke.texi: Update.
7107 2023-08-11 Pan Li <pan2.li@intel.com>
7109 * config/riscv/riscv-vector-builtins-bases.cc
7110 (class vfmsac_frm): New class for vfmsac frm.
7111 (vfmsac_frm_obj): New declaration.
7113 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7114 * config/riscv/riscv-vector-builtins-functions.def
7115 (vfmsac_frm): New function definition
7117 2023-08-10 Jan Hubicka <jh@suse.cz>
7119 PR middle-end/110923
7120 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
7122 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
7124 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
7125 dependent on 'a' extension.
7126 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
7127 (TARGET_ZTSO): New target.
7128 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
7130 (riscv_memmodel_needs_amo_release): Add Ztso case.
7131 (riscv_print_operand): Add Ztso case for LR/SC annotations.
7132 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
7133 * config/riscv/riscv.opt: Add Ztso target variable.
7134 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
7136 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
7137 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
7138 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
7139 specific load/store/fence mappings.
7140 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
7141 specific load/store/fence mappings.
7143 2023-08-10 Jan Hubicka <jh@suse.cz>
7145 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
7148 2023-08-10 Jan Hubicka <jh@suse.cz>
7150 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
7152 2023-08-10 Jan Hubicka <jh@suse.cz>
7154 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
7155 handling of undefined values.
7157 2023-08-10 Jakub Jelinek <jakub@redhat.com>
7160 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
7161 return virtual phis and return NULL if there is a virtual phi
7162 where the arguments from E0 and E1 edges aren't equal.
7164 2023-08-10 Richard Biener <rguenther@suse.de>
7166 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
7167 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
7169 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7172 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
7174 2023-08-10 Pan Li <pan2.li@intel.com>
7176 * config/riscv/riscv-vector-builtins-bases.cc
7177 (class vfnmacc_frm): New class for vfnmacc.
7178 (vfnmacc_frm_obj): New declaration.
7180 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7181 * config/riscv/riscv-vector-builtins-functions.def
7182 (vfnmacc_frm): New function definition.
7184 2023-08-10 Pan Li <pan2.li@intel.com>
7186 * config/riscv/riscv-vector-builtins-bases.cc
7187 (class vfmacc_frm): New class for vfmacc frm.
7188 (vfmacc_frm_obj): New declaration.
7190 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7191 * config/riscv/riscv-vector-builtins-functions.def
7192 (vfmacc_frm): New function definition.
7194 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7197 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
7199 2023-08-10 Richard Biener <rguenther@suse.de>
7201 * tree-vectorizer.h (vectorizable_live_operation): Remove
7202 gimple_stmt_iterator * argument.
7203 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
7204 Adjust plumbing around vect_get_loop_mask.
7205 (vect_analyze_loop_operations): Adjust.
7206 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
7207 (vect_bb_slp_mark_live_stmts): Likewise.
7208 (vect_schedule_slp_node): Likewise.
7209 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
7210 Remove gimple_stmt_iterator * argument.
7211 (vect_transform_stmt): Adjust.
7213 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7215 * config/riscv/vector-iterators.md: Add missing modes.
7217 2023-08-10 Jakub Jelinek <jakub@redhat.com>
7220 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
7221 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
7223 2023-08-10 Jakub Jelinek <jakub@redhat.com>
7226 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
7227 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
7230 2023-08-10 liuhongt <hongtao.liu@intel.com>
7233 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
7234 sanitize upper part of V4HFmode register with
7236 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
7238 (<insn>v2hf3): Ditto.
7240 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
7241 register with -fno-trapping-math.
7243 2023-08-10 Pan Li <pan2.li@intel.com>
7244 Kito Cheng <kito.cheng@sifive.com>
7246 * config/riscv/riscv-protos.h
7247 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
7248 (get_frm_mode): New declaration.
7249 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
7250 * config/riscv/riscv-vector-builtins.cc
7251 (function_expander::use_ternop_insn): Take care of frm reg.
7252 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
7253 (riscv_emit_frm_mode_set): Ditto.
7254 (riscv_emit_mode_set): Ditto.
7255 (riscv_frm_adjust_mode_after_call): Ditto.
7256 (riscv_frm_mode_needed): Ditto.
7257 (riscv_frm_mode_after): Ditto.
7258 (riscv_mode_entry): Ditto.
7259 (riscv_mode_exit): Ditto.
7260 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
7261 * config/riscv/vector.md
7262 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
7263 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
7265 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7267 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
7268 incorrect anticipate info.
7270 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
7272 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
7273 Remove 'Zve32d' from the version list.
7275 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
7277 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
7278 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
7279 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
7280 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7282 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
7284 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
7285 (mem_shadd_or_shadd_rtx_p): New function.
7287 2023-08-09 Andrew Pinski <apinski@marvell.com>
7289 PR tree-optimization/110937
7290 PR tree-optimization/100798
7291 * match.pd (`a ? ~b : b`): Handle this
7294 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
7296 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
7298 2023-08-09 Richard Ball <richard.ball@arm.com>
7300 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
7301 * config/aarch64/aarch64-tune.md: Regenerate.
7302 * doc/invoke.texi: Document Cortex-A520 CPU.
7304 2023-08-09 Carl Love <cel@us.ibm.com>
7306 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
7307 Move definitions to Altivec stanza.
7308 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
7311 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7314 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
7315 stepped vector support.
7317 2023-08-09 liuhongt <hongtao.liu@intel.com>
7319 * common/config/i386/cpuinfo.h (get_available_features):
7320 Rename local variable subleaf_level to max_subleaf_level.
7322 2023-08-09 Richard Biener <rguenther@suse.de>
7324 PR rtl-optimization/110587
7325 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
7327 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
7329 PR tree-optimization/110248
7330 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
7331 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
7332 legitimate when outer code is PLUS.
7334 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
7336 PR tree-optimization/110248
7337 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
7338 type code_helper and pass it to targetm.addr_space.legitimate_address_p
7339 instead of ERROR_MARK.
7340 (offsettable_address_addr_space_p): Update one function pointer with
7341 one more argument of type code_helper as its assignees
7342 memory_address_addr_space_p and strict_memory_address_addr_space_p
7343 have been adjusted, and adjust some call sites with ERROR_MARK.
7344 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
7345 (memory_address_addr_space_p): Adjust with one more unnamed argument
7346 of type code_helper with default ERROR_MARK.
7347 (strict_memory_address_addr_space_p): Likewise.
7348 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
7349 argument of type code_helper.
7350 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
7351 type code_helper and pass it to memory_address_addr_space_p.
7352 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
7353 one more unnamed argument of type code_helper with default value
7355 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
7356 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
7357 pass it to all valid_mem_ref_p calls.
7359 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
7361 PR tree-optimization/110248
7362 * coretypes.h (class code_helper): Add forward declaration.
7363 * doc/tm.texi: Regenerate.
7364 * lra-constraints.cc (valid_address_p): Call target hook
7365 targetm.addr_space.legitimate_address_p with an extra parameter
7366 ERROR_MARK as its prototype changes.
7367 * recog.cc (memory_address_addr_space_p): Likewise.
7368 * reload.cc (strict_memory_address_addr_space_p): Likewise.
7369 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
7370 Extend with one more argument of type code_helper, update the
7371 documentation accordingly.
7372 * targhooks.cc (default_legitimate_address_p): Adjust for the
7373 new code_helper argument.
7374 (default_addr_space_legitimate_address_p): Likewise.
7375 * targhooks.h (default_legitimate_address_p): Likewise.
7376 (default_addr_space_legitimate_address_p): Likewise.
7377 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
7378 with extra unnamed code_helper argument with default ERROR_MARK.
7379 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
7380 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
7381 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
7382 (tree.h): New include for tree_code ERROR_MARK.
7383 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
7384 unnamed code_helper argument with default ERROR_MARK.
7385 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
7386 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
7387 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
7388 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
7389 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
7390 (tree.h): New include for tree_code ERROR_MARK.
7391 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
7392 unnamed code_helper argument with default ERROR_MARK.
7393 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
7394 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
7396 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
7397 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
7398 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
7399 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
7400 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
7401 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
7402 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
7403 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
7404 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
7406 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
7407 (m32c_addr_space_legitimate_address_p): Likewise.
7408 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
7409 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
7410 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
7411 * config/microblaze/microblaze-protos.h (tree.h): New include for
7412 tree_code ERROR_MARK.
7413 (microblaze_legitimate_address_p): Adjust with extra unnamed
7414 code_helper argument with default ERROR_MARK.
7415 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
7417 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
7418 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
7419 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
7420 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
7421 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
7422 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
7423 argument with default ERROR_MARK and adjust the call to function
7424 msp430_legitimate_address_p.
7425 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
7426 unnamed code_helper argument with default ERROR_MARK.
7427 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
7428 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
7429 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
7430 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
7431 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
7432 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
7433 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
7434 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
7435 (tree.h): New include for tree_code ERROR_MARK.
7436 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
7437 extra unnamed code_helper argument with default ERROR_MARK.
7438 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
7439 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
7440 argument and adjust the call to function rs6000_legitimate_address_p.
7441 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
7442 unnamed code_helper argument with default ERROR_MARK.
7443 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
7444 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
7445 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
7446 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
7447 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
7448 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
7449 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
7450 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
7452 (tree.h): New include for tree_code ERROR_MARK.
7453 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
7454 Adjust with extra unnamed code_helper argument with default
7457 2023-08-09 liuhongt <hongtao.liu@intel.com>
7459 * common/config/i386/cpuinfo.h (get_available_features): Check
7460 EAX for valid subleaf before use CPUID.
7462 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
7464 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
7465 for the temporary when canonicalizing the condition.
7467 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
7469 * config/bpf/core-builtins.cc: Cleaned include headers.
7470 (struct cr_builtins): Added GTY.
7471 (cr_builtins_ref): Created.
7472 (builtins_data) Changed to GC root.
7473 (allocate_builtin_data): Changed.
7474 Included gt-core-builtins.h.
7475 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
7476 (bpf_core_extra_ref): Created.
7477 (bpf_comment_info): Changed to GC root.
7478 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
7480 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
7483 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
7484 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
7485 upper part of V2SFmode register with -fno-trapping-math.
7486 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
7488 (<smaxmin:code>v2sf3): Ditto.
7490 (*mmx_haddv2sf3_low): Ditto.
7491 (*mmx_hsubv2sf3_low): Ditto.
7492 (vec_addsubv2sf3): Ditto.
7493 (vec_cmpv2sfv2si): Ditto.
7494 (vcond<V2FI:mode>v2sf): Ditto.
7499 (fix_truncv2sfv2si2): Ditto.
7500 (fixuns_truncv2sfv2si2): Ditto.
7501 (floatv2siv2sf2): Ditto.
7502 (floatunsv2siv2sf2): Ditto.
7503 (nearbyintv2sf2): Ditto.
7505 (lrintv2sfv2si2): Ditto.
7507 (lceilv2sfv2si2): Ditto.
7508 (floorv2sf2): Ditto.
7509 (lfloorv2sfv2si2): Ditto.
7510 (btruncv2sf2): Ditto.
7511 (roundv2sf2): Ditto.
7512 (lroundv2sfv2si2): Ditto.
7513 * doc/invoke.texi (x86 Options): Document
7514 -mpartial-vector-fp-math option.
7516 2023-08-08 Andrew Pinski <apinski@marvell.com>
7518 PR tree-optimization/103281
7519 PR tree-optimization/28794
7520 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
7522 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
7523 (simplify_using_ranges::simplify_casted_cond): Rename to ...
7524 (simplify_using_ranges::simplify_casted_compare): This
7525 and change arguments to take op0 and op1.
7526 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
7527 (simplify_using_ranges::simplify): For tcc_comparison assignments call
7528 simplify_compare_assign_using_ranges_1.
7529 * vr-values.h (simplify_using_ranges): Add
7530 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
7531 Rename simplify_casted_cond and simplify_casted_compare and
7532 update argument types.
7534 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
7536 * genmatch.cc: Log line numbers indirectly.
7538 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
7540 * genmatch.cc: Make sinfo map ordered.
7541 * Makefile.in: Require the ordered map header for genmatch.o.
7543 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
7545 * ordered-hash-map.h: Add get_or_insert.
7546 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
7548 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7550 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
7551 (cond_len_<optab><mode>): Ditto.
7552 (cond_fma<mode>): Ditto.
7553 (cond_len_fma<mode>): Ditto.
7554 (cond_fnma<mode>): Ditto.
7555 (cond_len_fnma<mode>): Ditto.
7556 (cond_fms<mode>): Ditto.
7557 (cond_len_fms<mode>): Ditto.
7558 (cond_fnms<mode>): Ditto.
7559 (cond_len_fnms<mode>): Ditto.
7560 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
7562 (enum insn_type): Add new enum type.
7563 (prepare_ternary_operands): New function.
7564 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
7565 (emit_nonvlmax_tumu_insn): Ditto.
7566 (emit_nonvlmax_fp_tumu_insn): Ditto.
7567 (expand_cond_len_binop): Add condtional operations.
7568 (expand_cond_len_ternop): Ditto.
7569 (prepare_ternary_operands): New function.
7570 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
7571 riscv_get_v_regno_alignment as global scope.
7572 * config/riscv/vector.md: Fix ternary bugs.
7574 2023-08-08 Richard Biener <rguenther@suse.de>
7576 PR tree-optimization/49955
7577 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
7578 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
7579 * tree-vect-slp.cc (vect_free_slp_instance): Release
7580 SLP_INSTANCE_REMAIN_STMTS.
7581 (vect_build_slp_instance): Make the number of lanes of
7582 a BB reduction even.
7583 (vectorize_slp_instance_root_stmt): Handle unvectorized
7584 defs of a BB reduction.
7586 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7588 * internal-fn.cc (get_len_internal_fn): New function.
7589 (DEF_INTERNAL_COND_FN): Ditto.
7590 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
7591 * internal-fn.h (get_len_internal_fn): Ditto.
7592 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
7594 2023-08-08 Richard Biener <rguenther@suse.de>
7596 PR tree-optimization/110924
7597 * tree-ssa-live.h (virtual_operand_live): Update comment.
7598 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
7599 optimization, look at each predecessor.
7600 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
7602 2023-08-08 yulong <shiyulong@iscas.ac.cn>
7604 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
7606 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7608 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
7609 * config/riscv/vector.md: Ditto.
7611 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7613 * config/riscv/autovec.md: Add VLS shift.
7615 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7617 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
7618 * config/riscv/vector-iterators.md: Ditto.
7619 * config/riscv/vector.md: Ditto.
7621 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
7623 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
7625 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
7627 * configure: Regenerate.
7629 2023-08-07 John Ericson <git@JohnEricson.me>
7631 * configure: Regenerate.
7633 2023-08-07 Alan Modra <amodra@gmail.com>
7635 * configure: Regenerate.
7637 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
7639 * configure: Regenerate.
7641 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
7643 * configure: Regenerate.
7645 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
7647 * configure: Regenerate.
7649 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
7651 * configure: Regenerate.
7653 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
7655 * configure: Regenerate.
7657 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
7659 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
7660 VOIDmode operands to conditional before canonicalization.
7662 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
7664 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
7665 (find_oldest_value_reg): Inline stack_pointer_rtx check.
7666 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
7668 2023-08-07 Martin Jambor <mjambor@suse.cz>
7671 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
7672 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
7673 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
7674 (ptr_parm_has_nonarg_uses): Likewise.
7675 * ipa-param-manipulation.cc
7676 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
7677 (ipa_param_body_adjustments::mark_dead_statements): Move initial
7678 checks to get_ddef_if_exists_and_is_used.
7679 (ipa_param_body_adjustments::mark_clobbers_dead): New.
7680 (ipa_param_body_adjustments::common_initialization): Call
7681 mark_clobbers_dead when splitting.
7683 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
7685 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
7686 as an argument and pass it to riscv_emit_int_order_test.
7687 (riscv_expand_conditional_move): Handle cases where the condition
7688 is not EQ/NE or the second argument to the conditional is not
7690 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
7691 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7693 2023-08-07 Andrew Pinski <apinski@marvell.com>
7695 PR tree-optimization/109959
7696 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
7699 2023-08-07 Richard Biener <rguenther@suse.de>
7701 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
7702 calculate post-dominators. Calculate RPO on the inverted
7703 graph and process blocks in that order.
7705 2023-08-07 liuhongt <hongtao.liu@intel.com>
7708 * config/i386/i386-protos.h
7709 (vpternlog_redundant_operand_mask): Adjust parameter type.
7710 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
7711 INTVAL instead of XINT, also adjust parameter type from rtx*
7712 to rtx since the function only needs operands[4] in vpternlog
7714 (substitute_vpternlog_operands): Pass operands[4] instead of
7715 operands to vpternlog_redundant_operand_mask.
7716 * config/i386/sse.md: Ditto.
7718 2023-08-07 Richard Biener <rguenther@suse.de>
7720 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
7721 around dumping code.
7723 2023-08-07 liuhongt <hongtao.liu@intel.com>
7726 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
7727 to define_expand and break into ..
7728 (<insn>v4hf3): .. this.
7729 (divv4hf3): .. this.
7730 (<insn>v2hf3): .. this.
7731 (divv2hf3): .. this.
7732 (movd_v2hf_to_sse): New define_expand.
7733 (movq_<mode>_to_sse): Extend to V4HFmode.
7734 (mmxdoublevecmode): Ditto.
7735 (V2FI_V4HF): New mode iterator.
7736 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
7737 by using mode iterator V4SF_V8HF, renamed to ..
7738 (*vec_concat<mode>): .. this.
7739 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
7740 iterator V4SF_V8HF, renamed to ..
7741 (*vec_concat<mode>_0): .. this.
7742 (*vec_concatv8hf_movss): New define_insn.
7743 (V4SF_V8HF): New mode iterator.
7745 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7747 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
7749 2023-08-07 Jan Beulich <jbeulich@suse.com>
7751 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
7752 (*mmx_pinsrb): Likewise.
7753 (*mmx_pextrb): Likewise.
7754 (*mmx_pextrb_zext): Likewise.
7755 (mmx_pshufbv8qi3): Likewise.
7756 (mmx_pshufbv4qi3): Likewise.
7757 (mmx_pswapdv2si2): Likewise.
7758 (*pinsrb): Likewise.
7759 (*pextrb): Likewise.
7760 (*pextrb_zext): Likewise.
7761 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
7762 (*sse2_eq<mode>3): Likewise.
7763 (*sse2_gt<mode>3): Likewise.
7764 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
7765 (*vec_extract<mode>): Likewise.
7766 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
7767 (*vec_extractv16qi_zext): Likewise.
7768 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
7769 (ssse3_pmaddubsw128): Likewise.
7770 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
7771 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
7772 (<ssse3_avx2>_psign<mode>3): Likewise.
7773 (<ssse3_avx2>_palignr<mode>): Likewise.
7774 (*abs<mode>2): Likewise.
7775 (sse4_2_pcmpestr): Likewise.
7776 (sse4_2_pcmpestri): Likewise.
7777 (sse4_2_pcmpestrm): Likewise.
7778 (sse4_2_pcmpestr_cconly): Likewise.
7779 (sse4_2_pcmpistr): Likewise.
7780 (sse4_2_pcmpistri): Likewise.
7781 (sse4_2_pcmpistrm): Likewise.
7782 (sse4_2_pcmpistr_cconly): Likewise.
7783 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
7784 (vgf2p8affineqb_<mode><mask_name>): Likewise.
7785 (vgf2p8mulb_<mode><mask_name>): Likewise.
7786 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
7788 (*<code>v16qi3 [umaxmin]): Likewise.
7790 2023-08-07 Jan Beulich <jbeulich@suse.com>
7792 * config/i386/i386.md (sse4_1_round<mode>2): Make
7793 "length_immediate" uniformly 1.
7794 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
7795 (mmx_pblendvb_<mode>): Likewise.
7797 2023-08-07 Jan Beulich <jbeulich@suse.com>
7799 * config/i386/sse.md
7800 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
7802 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
7805 2023-08-07 Jan Beulich <jbeulich@suse.com>
7807 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
7808 "prefix_extra", and "mode" attributes.
7809 (xop_phadd<u>bd): Likewise.
7810 (xop_phadd<u>bq): Likewise.
7811 (xop_phadd<u>wd): Likewise.
7812 (xop_phadd<u>wq): Likewise.
7813 (xop_phadd<u>dq): Likewise.
7814 (xop_phsubbw): Likewise.
7815 (xop_phsubwd): Likewise.
7816 (xop_phsubdq): Likewise.
7817 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
7818 (xop_rotr<mode>3): Likewise.
7819 (xop_frcz<mode>2): Likewise.
7820 (*xop_vmfrcz<mode>2): Likewise.
7821 (xop_vrotl<mode>3): Add "prefix" attribute. Change
7822 "prefix_extra" to 1.
7823 (xop_sha<mode>3): Likewise.
7824 (xop_shl<mode>3): Likewise.
7826 2023-08-07 Jan Beulich <jbeulich@suse.com>
7828 * config/i386/sse.md
7829 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
7831 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
7832 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
7833 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
7834 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
7835 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
7836 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
7837 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
7838 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
7839 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
7840 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
7841 (vec_extract_lo_v64qi): Likewise.
7842 (vec_extract_hi_v64qi): Likewise.
7843 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
7844 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
7845 (*avx512f_<code><mode>3<mask_name>): Likewise.
7846 (*vec_extractv4ti): Likewise.
7847 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
7848 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
7849 Add "length_immediate".
7851 2023-08-07 Jan Beulich <jbeulich@suse.com>
7853 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
7855 (@rdseed<mode>): Likewise.
7856 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
7857 Adjust "prefix_extra".
7858 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
7859 (*sse4_1_<code><mode>3<mask_name>): Likewise.
7860 (*avx2_eq<mode>3): Likewise.
7861 (avx2_gt<mode>3): Likewise.
7862 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
7863 (*vec_extract<mode>): Likewise.
7864 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
7866 2023-08-07 Jan Beulich <jbeulich@suse.com>
7868 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
7869 "prefix_rep". Drop "prefix_extra".
7870 (wr<fsgs>base<mode>): Likewise.
7871 (ptwrite<mode>): Likewise.
7873 2023-08-07 Jan Beulich <jbeulich@suse.com>
7875 * config/i386/i386.md (isa): Move up.
7876 (length_immediate): Handle "fma4".
7877 (prefix): Handle "ssemuladd".
7878 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
7879 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
7881 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
7882 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
7883 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
7885 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
7886 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
7887 (*fma_fnmadd_<mode>): Likewise.
7888 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
7890 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
7891 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
7892 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
7894 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
7895 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
7896 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
7898 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
7899 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
7900 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
7902 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
7903 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
7904 (*fmai_fmadd_<mode>): Likewise.
7905 (*fmai_fmsub_<mode>): Likewise.
7906 (*fmai_fnmadd_<mode><round_name>): Likewise.
7907 (*fmai_fnmsub_<mode><round_name>): Likewise.
7908 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
7909 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
7910 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
7911 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
7912 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
7913 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
7914 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
7915 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
7916 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
7917 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
7918 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
7919 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
7920 (*fma4i_vmfmadd_<mode>): Likewise.
7921 (*fma4i_vmfmsub_<mode>): Likewise.
7922 (*fma4i_vmfnmadd_<mode>): Likewise.
7923 (*fma4i_vmfnmsub_<mode>): Likewise.
7924 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
7925 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
7926 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
7928 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
7929 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
7930 (xop_p<macs>dql): Likewise.
7931 (xop_p<macs>dqh): Likewise.
7932 (xop_p<macs>wd): Likewise.
7933 (xop_p<madcs>wd): Likewise.
7934 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
7936 2023-08-07 Jan Beulich <jbeulich@suse.com>
7938 * config/i386/i386.md (length_immediate): Handle "sse4arg".
7940 (*xop_pcmov_<mode>): Add "mode" attribute.
7941 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
7942 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
7943 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
7944 (*xop_pcmov_<mode>): Add "mode" attribute.
7945 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
7947 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
7948 "prefix_extra", and "length_immediate" attributes.
7949 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
7950 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
7951 and "length_immediate" attributes. Switch "type" to "sse4arg".
7952 (xop_pcom_tf<mode>3): Likewise.
7953 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
7955 2023-08-07 Jan Beulich <jbeulich@suse.com>
7957 * config/i386/i386.md (prefix_extra): Correct comment. Fold
7958 cases yielding 2 into ones yielding 1.
7960 2023-08-07 Jan Hubicka <jh@suse.cz>
7962 PR tree-optimization/106293
7963 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
7964 * tree-vect-loop.cc (vect_transform_loop): Likewise.
7966 2023-08-07 Andrew Pinski <apinski@marvell.com>
7968 PR tree-optimization/96695
7969 * match.pd (min_value, max_value): Extend to
7972 2023-08-06 Jan Hubicka <jh@suse.cz>
7974 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
7975 __builtin_expect that CPU likely supports cpuid.
7977 2023-08-06 Jan Hubicka <jh@suse.cz>
7979 * tree-loop-distribution.cc (loop_distribution::execute): Disable
7980 distribution for loops with estimated iterations 0.
7982 2023-08-06 Jan Hubicka <jh@suse.cz>
7984 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
7986 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
7988 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
7989 more Zicond patterns. Fix whitespace typo.
7990 (riscv_rtx_costs): Remove accidental code duplication.
7991 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7993 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
7996 * config/i386/i386-protos.h
7997 (vpternlog_redundant_operand_mask): Declare.
7998 (substitute_vpternlog_operands): Declare.
7999 * config/i386/i386.cc
8000 (vpternlog_redundant_operand_mask): New helper.
8001 (substitute_vpternlog_operands): New function. Use them...
8002 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
8004 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
8006 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
8007 value of -1 is equivalent to don't care.
8008 (extract_integral_bit_field): Indicate that we don't require
8009 the most significant word to be zero extended, if we're about
8011 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
8012 of -1 is equivalent to don't care. Don't clear the most
8013 significant bits with AND mask when UNSIGNEDP is -1.
8015 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
8017 * config/i386/sse.md (define_split): Convert highpart:DF extract
8018 from V2DFmode register into a sse2_storehpd instruction.
8019 (define_split): Likewise, convert lowpart:DF extract from V2DF
8020 register into a sse2_storelpd instruction.
8022 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
8024 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
8027 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
8029 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
8030 against early clobber hard regs.
8032 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8034 * doc/extend.texi: Document it.
8036 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8039 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
8040 vec_widen_<sur>shiftl_hi_<mode>): Remove.
8041 (aarch64_<sur>shll<mode>_internal): Renamed to...
8042 (aarch64_<su>shll<mode>): .. This.
8043 (aarch64_<sur>shll2<mode>_internal): Renamed to...
8044 (aarch64_<su>shll2<mode>): .. This.
8045 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
8047 * config/aarch64/constraints.md (D2, DL): New.
8048 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
8050 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8052 * gensupport.cc (conlist): Support length 0 attribute.
8054 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8056 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
8057 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
8059 2023-08-04 Tamar Christina <tamar.christina@arm.com>
8061 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
8063 (aarch64_adjust_stmt_cost): Use it.
8064 (aarch64_vector_costs::count_ops): Likewise.
8065 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
8066 aarch64_adjust_stmt_cost.
8068 2023-08-04 Richard Biener <rguenther@suse.de>
8070 PR tree-optimization/110838
8071 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
8072 Fix right-shift value sanitizing. Properly emit external
8073 def mangling in the preheader rather than in the pattern
8074 def sequence where it will fail vectorizing.
8076 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
8078 PR middle-end/110316
8080 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
8081 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
8082 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
8083 (timer::validate_phases): Use integral arithmetic to check
8085 (timer::print_row, timer::print): Convert from integral
8086 nanoseconds to floating point seconds before printing.
8087 (timer::all_zero): Change limit to nanosec count instead of
8088 fractional count of seconds.
8089 (make_json_for_timevar_time_def): Convert from integral
8090 nanoseconds to floating point seconds before recording.
8091 * timevar.h (struct timevar_time_def): Update all measurements
8092 to use uint64_t nanoseconds rather than seconds stored in a
8095 2023-08-04 Richard Biener <rguenther@suse.de>
8097 PR tree-optimization/110838
8098 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
8099 the arithmetic right-shift case to non-negative operands.
8101 2023-08-04 Pan Li <pan2.li@intel.com>
8104 2023-08-04 Pan Li <pan2.li@intel.com>
8106 * config/riscv/riscv-vector-builtins-bases.cc
8107 (class vfmacc_frm): New class for vfmacc frm.
8108 (vfmacc_frm_obj): New declaration.
8110 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8111 * config/riscv/riscv-vector-builtins-functions.def
8112 (vfmacc_frm): New function definition.
8113 * config/riscv/riscv-vector-builtins.cc
8114 (function_expander::use_ternop_insn): Add frm operand support.
8115 * config/riscv/vector.md: Add vfmuladd to frm_mode.
8117 2023-08-04 Pan Li <pan2.li@intel.com>
8120 2023-08-04 Pan Li <pan2.li@intel.com>
8122 * config/riscv/riscv-vector-builtins-bases.cc
8123 (class vfnmacc_frm): New class for vfnmacc.
8124 (vfnmacc_frm_obj): New declaration.
8126 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8127 * config/riscv/riscv-vector-builtins-functions.def
8128 (vfnmacc_frm): New function definition.
8130 2023-08-04 Pan Li <pan2.li@intel.com>
8133 2023-08-04 Pan Li <pan2.li@intel.com>
8135 * config/riscv/riscv-vector-builtins-bases.cc
8136 (class vfmsac_frm): New class for vfmsac frm.
8137 (vfmsac_frm_obj): New declaration.
8139 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8140 * config/riscv/riscv-vector-builtins-functions.def
8141 (vfmsac_frm): New function definition.
8143 2023-08-04 Pan Li <pan2.li@intel.com>
8146 2023-08-04 Pan Li <pan2.li@intel.com>
8148 * config/riscv/riscv-vector-builtins-bases.cc
8149 (class vfnmsac_frm): New class for vfnmsac frm.
8150 (vfnmsac_frm_obj): New declaration.
8152 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8153 * config/riscv/riscv-vector-builtins-functions.def
8154 (vfnmsac_frm): New function definition.
8156 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
8158 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
8159 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
8160 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
8161 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
8162 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
8163 (attiny102, attiny104): New devices.
8164 * doc/avr-mmcu.texi: Regenerate.
8166 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
8168 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
8169 and PM_OFFSET entries.
8171 2023-08-04 Andrew Pinski <apinski@marvell.com>
8173 PR tree-optimization/110874
8174 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
8175 (gimple_maybe_cmp): Likewise.
8176 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
8177 and gimple_maybe_cmp instead of being recursive.
8178 * match.pd (bit_not_with_nop): New match pattern.
8179 (maybe_cmp): Likewise.
8181 2023-08-04 Drew Ross <drross@redhat.com>
8183 PR middle-end/101955
8184 * match.pd ((signed x << c) >> c): New canonicalization.
8186 2023-08-04 Pan Li <pan2.li@intel.com>
8188 * config/riscv/riscv-vector-builtins-bases.cc
8189 (class vfnmsac_frm): New class for vfnmsac frm.
8190 (vfnmsac_frm_obj): New declaration.
8192 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8193 * config/riscv/riscv-vector-builtins-functions.def
8194 (vfnmsac_frm): New function definition.
8196 2023-08-04 Pan Li <pan2.li@intel.com>
8198 * config/riscv/riscv-vector-builtins-bases.cc
8199 (class vfmsac_frm): New class for vfmsac frm.
8200 (vfmsac_frm_obj): New declaration.
8202 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8203 * config/riscv/riscv-vector-builtins-functions.def
8204 (vfmsac_frm): New function definition.
8206 2023-08-04 Pan Li <pan2.li@intel.com>
8208 * config/riscv/riscv-vector-builtins-bases.cc
8209 (class vfnmacc_frm): New class for vfnmacc.
8210 (vfnmacc_frm_obj): New declaration.
8212 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8213 * config/riscv/riscv-vector-builtins-functions.def
8214 (vfnmacc_frm): New function definition.
8216 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
8219 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
8220 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
8222 2023-08-04 Pan Li <pan2.li@intel.com>
8224 * config/riscv/riscv-vector-builtins-bases.cc
8225 (class vfmacc_frm): New class for vfmacc frm.
8226 (vfmacc_frm_obj): New declaration.
8228 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8229 * config/riscv/riscv-vector-builtins-functions.def
8230 (vfmacc_frm): New function definition.
8231 * config/riscv/riscv-vector-builtins.cc
8232 (function_expander::use_ternop_insn): Add frm operand support.
8233 * config/riscv/vector.md: Add vfmuladd to frm_mode.
8235 2023-08-04 Pan Li <pan2.li@intel.com>
8237 * config/riscv/riscv-vector-builtins-bases.cc
8238 (vfwmul_frm_obj): New declaration.
8239 (vfwmul_frm): Ditto.
8240 * config/riscv/riscv-vector-builtins-bases.h:
8241 (vfwmul_frm): Ditto.
8242 * config/riscv/riscv-vector-builtins-functions.def
8243 (vfwmul_frm): New function definition.
8244 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
8246 2023-08-04 Pan Li <pan2.li@intel.com>
8248 * config/riscv/riscv-vector-builtins-bases.cc
8249 (binop_frm): New declaration.
8250 (reverse_binop_frm): Likewise.
8252 * config/riscv/riscv-vector-builtins-bases.h:
8253 (vfdiv_frm): New extern declaration.
8254 (vfrdiv_frm): Likewise.
8255 * config/riscv/riscv-vector-builtins-functions.def
8256 (vfdiv_frm): New function definition.
8257 (vfrdiv_frm): Likewise.
8258 * config/riscv/vector.md: Add vfdiv to frm_mode.
8260 2023-08-03 Jan Hubicka <jh@suse.cz>
8262 * tree-cfg.cc (print_loop_info): Print entry count.
8264 2023-08-03 Jan Hubicka <jh@suse.cz>
8266 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
8268 2023-08-03 Jan Hubicka <jh@suse.cz>
8271 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
8272 unadjusted_exit_count.
8274 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
8276 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
8279 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
8281 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
8282 various Zicond patterns.
8283 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
8284 sfb_alu_operand for both arms of the conditional move.
8285 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
8287 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
8293 * config.gcc: Added core-builtins.cc and .o files.
8294 * config/bpf/bpf-passes.def: Removed file.
8295 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
8296 bpf_replace_core_move_operands): New prototypes.
8297 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
8298 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
8299 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
8300 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
8301 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
8303 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
8304 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
8305 (mov_reloc_core<mode>): Added.
8306 * config/bpf/core-builtins.cc (struct cr_builtin, enum
8307 cr_decision struct cr_local, struct cr_final, struct
8308 core_builtin_helpers, enum bpf_plugin_states): Added types.
8309 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
8311 (allocate_builtin_data, get_builtin-data, search_builtin_data,
8312 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
8313 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
8314 bpf_core_get_index, compute_field_expr,
8315 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
8316 process_field_expr, pack_enum_value, process_enum_value, pack_type,
8317 process_type, bpf_require_core_support, make_core_relo, read_kind,
8318 kind_access_index, kind_preserve_field_info, kind_enum_value,
8319 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
8320 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
8321 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
8322 bpf_expand_core_builtin, bpf_add_core_reloc,
8323 bpf_replace_core_move_operands): Added functions.
8324 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
8325 (bpf_init_core_builtins, bpf_expand_core_builtin,
8326 bpf_resolve_overloaded_core_builtin): Added functions.
8327 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
8328 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
8329 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
8330 * config/bpf/t-bpf: Added core-builtins.o.
8331 * doc/extend.texi: Added documentation for new BPF builtins.
8333 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
8335 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
8336 ranges to the call to relation_fold_and_or.
8337 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
8338 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
8339 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
8340 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
8341 a varying op1 and op2 to call.
8342 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
8343 (operator_equal::op1_op2_relation): New float version.
8344 (operator_not_equal::op1_op2_relation): Ditto.
8345 (operator_lt::op1_op2_relation): Ditto.
8346 (operator_le::op1_op2_relation): Ditto.
8347 (operator_gt::op1_op2_relation): Ditto.
8348 (operator_ge::op1_op2_relation) Ditto.
8349 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
8351 (operator_not_equal::op1_op2_relation): Ditto.
8352 (operator_lt::op1_op2_relation): Ditto.
8353 (operator_le::op1_op2_relation): Ditto.
8354 (operator_gt::op1_op2_relation): Ditto.
8355 (operator_ge::op1_op2_relation): Ditto.
8356 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
8358 (range_operator::op1_op2_relation): Add extra params.
8359 (operator_equal::op1_op2_relation): Ditto.
8360 (operator_not_equal::op1_op2_relation): Ditto.
8361 (operator_lt::op1_op2_relation): Ditto.
8362 (operator_le::op1_op2_relation): Ditto.
8363 (operator_gt::op1_op2_relation): Ditto.
8364 (operator_ge::op1_op2_relation): Ditto.
8365 * range-op.h (range_operator): New prototypes.
8366 (range_op_handler): Ditto.
8368 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
8370 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
8371 Use identity relation.
8372 (gori_compute::compute_operand2_range): Ditto.
8373 * value-relation.cc (get_identity_relation): New.
8374 * value-relation.h (get_identity_relation): New prototype.
8376 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
8378 * value-range.h (Value_Range::set_varying): Set the type.
8379 (Value_Range::set_zero): Ditto.
8380 (Value_Range::set_nonzero): Ditto.
8382 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
8384 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
8387 2023-08-03 Pan Li <pan2.li@intel.com>
8389 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
8391 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
8393 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
8395 2023-08-03 Richard Biener <rguenther@suse.de>
8397 PR tree-optimization/110838
8398 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
8399 Adjust the shift operand of RSHIFT_EXPRs.
8401 2023-08-03 Richard Biener <rguenther@suse.de>
8403 PR tree-optimization/110702
8404 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
8405 we created a NULL pointer based access rewrite that to
8408 2023-08-03 Richard Biener <rguenther@suse.de>
8410 * tree-ssa-sink.cc: Include tree-ssa-live.h.
8411 (pass_sink_code::execute): Instantiate virtual_operand_live
8413 (sink_code_in_bb): Pass down virtual_operand_live.
8414 (statement_sink_location): Get virtual_operand_live and
8415 verify we are not sinking loads across stores by looking up
8416 the live virtual operand at the sink location.
8418 2023-08-03 Richard Biener <rguenther@suse.de>
8420 * tree-ssa-live.h (class virtual_operand_live): New.
8421 * tree-ssa-live.cc (virtual_operand_live::init): New.
8422 (virtual_operand_live::get_live_in): Likewise.
8423 (virtual_operand_live::get_live_out): Likewise.
8425 2023-08-03 Richard Biener <rguenther@suse.de>
8427 * passes.def: Exchange loop splitting and final value
8430 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8432 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
8433 New function which handles bswap patterns for vec_perm_const.
8434 (vectorize_vec_perm_const_1): Call new function.
8435 * config/s390/vector.md (*bswap<mode>): Fix operands in output
8437 (*vstbr<mode>): New insn.
8439 2023-08-03 Alexandre Oliva <oliva@adacore.com>
8441 * config/vxworks-smp.opt: New. Introduce -msmp.
8442 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
8443 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
8444 lib_smp when -msmp is present in the command line.
8445 * doc/invoke.texi: Document it.
8447 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
8449 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
8450 when enabling -mno-omit-leaf-frame-pointer
8451 (riscv_option_override): Override omit-frame-pointer.
8452 (riscv_frame_pointer_required): Save s0 for non-leaf function
8453 (TARGET_FRAME_POINTER_REQUIRED): Override defination
8454 * config/riscv/riscv.opt: Add option support.
8456 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
8459 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
8460 place operand in a register before gen_<insn>64ti2_doubleword.
8461 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
8462 operand in a register before gen_<insn>32di2_doubleword.
8463 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
8464 (<any_rotate>64ti2_doubleword): Likewise.
8466 2023-08-03 Pan Li <pan2.li@intel.com>
8468 * config/riscv/riscv-vector-builtins-bases.cc
8469 (vfmul_frm_obj): New declaration.
8471 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
8472 * config/riscv/riscv-vector-builtins-functions.def
8473 (vfmul_frm): New function definition.
8474 * config/riscv/vector.md: Add vfmul to frm_mode.
8476 2023-08-03 Andrew Pinski <apinski@marvell.com>
8478 * match.pd (`~X & X`): Check that the types match.
8479 (`~x | x`, `~x ^ x`): Likewise.
8481 2023-08-03 Pan Li <pan2.li@intel.com>
8483 * config/riscv/riscv-vector-builtins-bases.h: Remove
8484 redudant declaration.
8486 2023-08-03 Pan Li <pan2.li@intel.com>
8488 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
8490 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
8491 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
8492 Add vfwsub function definitions.
8494 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8496 PR rtl-optimization/110867
8497 * combine.cc (simplify_compare_const): Try the optimization only
8498 in case the constant fits into the comparison mode.
8500 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
8502 * config/riscv/zicond.md: Remove incorrect zicond patterns and
8503 renumber/rename them.
8504 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
8506 2023-08-02 Richard Biener <rguenther@suse.de>
8508 * tree-phinodes.h (add_phi_node_to_bb): Remove.
8509 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
8511 2023-08-02 Jan Beulich <jbeulich@suse.com>
8513 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
8514 two of the alternatives.
8516 2023-08-02 Richard Biener <rguenther@suse.de>
8518 PR tree-optimization/92335
8519 * tree-ssa-sink.cc (select_best_block): Before loop
8520 optimizations avoid sinking unconditional loads/stores
8521 in innermost loops to conditional executed places.
8523 2023-08-02 Andrew Pinski <apinski@marvell.com>
8525 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
8526 the comparison operands before comparing them.
8528 2023-08-02 Andrew Pinski <apinski@marvell.com>
8530 * match.pd (`~X & X`, `~X | X`): Move over to
8531 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
8532 handles that already.
8533 Remove range test simplifications to true/false as they
8534 are now handled by these patterns.
8536 2023-08-02 Andrew Pinski <apinski@marvell.com>
8538 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
8539 statement's lhs and rhs to check if trivial dead.
8540 Rename inserted_exprs to exprs_maybe_dce; also move it so
8541 bitmap is not allocated if not needed.
8543 2023-08-02 Pan Li <pan2.li@intel.com>
8545 * config/riscv/riscv-vector-builtins-bases.cc
8546 (class widen_binop_frm): New class for binop frm.
8547 (BASE): Add vfwadd_frm.
8548 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
8549 * config/riscv/riscv-vector-builtins-functions.def
8550 (vfwadd_frm): New function definition.
8551 * config/riscv/riscv-vector-builtins-shapes.cc
8552 (BASE_NAME_MAX_LEN): New macro.
8553 (struct alu_frm_def): Leverage new base class.
8554 (struct build_frm_base): New build base for frm.
8555 (struct widen_alu_frm_def): New struct for widen alu frm.
8556 (SHAPE): Add widen_alu_frm shape.
8557 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
8558 * config/riscv/vector.md (frm_mode): Add vfwalu type.
8560 2023-08-02 Jan Hubicka <jh@suse.cz>
8562 * cfgloop.h (loop_count_in): Declare.
8563 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
8564 (loop_count_in): Move here from ...
8565 * cfgloopmanip.cc (loop_count_in): ... here.
8566 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
8568 2023-08-02 Jan Hubicka <jh@suse.cz>
8570 * cfg.cc (scale_strictly_dominated_blocks): New function.
8571 * cfg.h (scale_strictly_dominated_blocks): Declare.
8572 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
8574 2023-08-02 Richard Biener <rguenther@suse.de>
8576 PR rtl-optimization/110587
8577 * lra-spills.cc (return_regno_p): Remove.
8578 (regno_in_use_p): Likewise.
8579 (lra_final_code_change): Do not remove noop moves
8580 between hard registers.
8582 2023-08-02 liuhongt <hongtao.liu@intel.com>
8585 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
8586 HFmode, use mode iterator VFH instead.
8587 (vec_fmsubadd<mode>4): Ditto.
8588 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
8589 Remove scalar mode from iterator, use VFH_AVX512VL instead.
8590 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
8593 2023-08-02 liuhongt <hongtao.liu@intel.com>
8595 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
8596 pre_reload define_insn_and_split.
8598 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
8600 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
8601 using Zicond to implement some conditional moves.
8603 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
8605 * config/riscv/zicond.md: Use the X iterator instead of ANYI
8606 on the comparison input operands.
8608 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
8610 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
8612 (case SET): For INSNs that just set a REG, take the cost from the
8614 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
8616 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
8618 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
8619 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
8620 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
8621 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
8622 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
8623 (OPTION_MASK_ISA_ABM_SET):
8624 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
8626 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
8628 * config/s390/s390.cc (s390_encode_section_info): Assume external
8629 symbols without explicit alignment to be unaligned if
8630 -munaligned-symbols has been specified.
8631 * config/s390/s390.opt (-munaligned-symbols): New option.
8633 2023-08-01 Richard Ball <richard.ball@arm.com>
8635 * gimple-fold.cc (fold_ctor_reference):
8636 Add support for poly_int.
8638 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
8641 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
8642 LABEL_NUSES of new conditional branch instruction.
8644 2023-08-01 Jan Hubicka <jh@suse.cz>
8646 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
8647 constant prologue peeling.
8649 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
8651 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
8653 2023-08-01 Pan Li <pan2.li@intel.com>
8654 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8656 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
8657 (STATIC_FRM_P): Ditto.
8658 (struct mode_switching_info): New struct for mode switching.
8659 (struct machine_function): Add new field mode switching.
8660 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
8661 (riscv_frm_adjust_mode_after_call): New function for call mode.
8662 (riscv_frm_emit_after_call_in_bb_end): New function for emit
8663 insn when call as the end of bb.
8664 (riscv_frm_mode_needed): New function for frm mode needed.
8665 (frm_unknown_dynamic_p): Remove call check.
8666 (riscv_mode_needed): Extrac function for frm.
8667 (riscv_frm_mode_after): Add DYN_CALL after.
8668 (riscv_mode_entry): Remove backup rtl initialization.
8669 * config/riscv/vector.md (frm_mode): Add dyn_call.
8670 (fsrmsi_restore_exit): Rename to _volatile.
8671 (fsrmsi_restore_volatile): Likewise.
8673 2023-08-01 Pan Li <pan2.li@intel.com>
8675 * config/riscv/riscv-vector-builtins-bases.cc
8676 (class reverse_binop_frm): Add new template for reversed frm.
8677 (vfsub_frm_obj): New obj.
8678 (vfrsub_frm_obj): Likewise.
8679 * config/riscv/riscv-vector-builtins-bases.h:
8680 (vfsub_frm): New declaration.
8681 (vfrsub_frm): Likewise.
8682 * config/riscv/riscv-vector-builtins-functions.def
8683 (vfsub_frm): New function define.
8684 (vfrsub_frm): Likewise.
8686 2023-08-01 Andrew Pinski <apinski@marvell.com>
8688 PR tree-optimization/93044
8689 * match.pd (nested int casts): A truncation (to the same size or smaller)
8690 can always remove the inner cast.
8692 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
8695 * doc/invoke.texi (-Wmissing-variable-declarations): Document
8698 2023-07-31 Andrew Pinski <apinski@marvell.com>
8700 PR tree-optimization/106164
8701 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
8702 `a == b | a < b`, `a == b | a > b`): Handle these cases
8705 2023-07-31 Andrew Pinski <apinski@marvell.com>
8707 PR tree-optimization/106164
8708 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
8709 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
8711 2023-07-31 Andrew Pinski <apinski@marvell.com>
8713 PR tree-optimization/100864
8714 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
8715 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
8716 (gimple_bitwise_inverted_equal_p): New function.
8717 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
8718 instead of direct matching bit_not.
8720 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
8723 * gcc-ar.cc (main): Expand argv and use
8724 temporary response file to call ar if any
8725 expansions were made.
8727 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
8729 PR tree-optimization/110582
8730 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
8731 range vector for non-ssa names.
8733 2023-07-31 David Malcolm <dmalcolm@redhat.com>
8736 * diagnostic-client-data-hooks.h (class sarif_object): New forward
8738 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
8740 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
8741 (class sarif_invocation): Inherit from sarif_object rather than
8743 (class sarif_result): Likewise.
8744 (class sarif_ice_notification): Likewise.
8745 (sarif_object::get_or_create_properties): New.
8746 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
8747 to call the context's add_sarif_invocation_properties hook.
8748 (sarif_builder::flush_to_file): Pass m_context to
8749 sarif_invocation::prepare_to_flush.
8750 * diagnostic-format-sarif.h: New header.
8751 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
8752 writes to stderr. Document that if SARIF diagnostic output is
8753 requested then any timing information is written in JSON form as
8754 part of the SARIF output, rather than to stderr.
8755 * timevar.cc: Include "json.h".
8756 (timer::named_items::m_hash_map): Split out type into...
8757 (timer::named_items::hash_map_t): ...this new typedef.
8758 (timer::named_items::make_json): New function.
8759 (timevar_diff): New function.
8760 (make_json_for_timevar_time_def): New function.
8761 (timer::timevar_def::make_json): New function.
8762 (timer::make_json): New function.
8763 * timevar.h (class json::value): New forward decl.
8764 (timer::make_json): New decl.
8765 (timer::timevar_def::make_json): New decl.
8766 * tree-diagnostic-client-data-hooks.cc: Include
8767 "diagnostic-format-sarif.h" and "timevar.h".
8768 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
8771 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8773 * combine.cc (simplify_compare_const): Narrow comparison of
8774 memory and constant.
8775 (try_combine): Adapt new function signature.
8776 (simplify_comparison): Adapt new function signature.
8778 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
8780 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
8782 (expand_vector_init_insert_elems): Ditto.
8784 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
8787 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
8788 single_defuse_cycle while counting reduction_latency.
8790 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8792 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
8793 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
8814 (COND_LEN_ADD): Ditto.
8815 (COND_LEN_SUB): Ditto.
8816 (COND_LEN_MUL): Ditto.
8817 (COND_LEN_DIV): Ditto.
8818 (COND_LEN_MOD): Ditto.
8819 (COND_LEN_RDIV): Ditto.
8820 (COND_LEN_MIN): Ditto.
8821 (COND_LEN_MAX): Ditto.
8822 (COND_LEN_FMIN): Ditto.
8823 (COND_LEN_FMAX): Ditto.
8824 (COND_LEN_AND): Ditto.
8825 (COND_LEN_IOR): Ditto.
8826 (COND_LEN_XOR): Ditto.
8827 (COND_LEN_SHL): Ditto.
8828 (COND_LEN_SHR): Ditto.
8829 (COND_LEN_FMA): Ditto.
8830 (COND_LEN_FMS): Ditto.
8831 (COND_LEN_FNMA): Ditto.
8832 (COND_LEN_FNMS): Ditto.
8833 (COND_LEN_NEG): Ditto.
8834 (ADD): New macro define.
8855 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
8858 * config/i386/i386-features.cc (compute_convert_gain): Check
8859 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
8860 and V4SImode rotates in STV.
8861 (general_scalar_chain::convert_rotate): Likewise.
8863 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
8865 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
8866 * config/riscv/riscv-protos.h (get_mask_mode): Update return
8868 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
8870 (emit_vlmax_insn): Ditto.
8871 (emit_vlmax_fp_insn): Ditto.
8872 (emit_vlmax_ternary_insn): Ditto.
8873 (emit_vlmax_fp_ternary_insn): Ditto.
8874 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
8875 (emit_nonvlmax_insn): Ditto.
8876 (emit_vlmax_slide_insn): Ditto.
8877 (emit_nonvlmax_slide_tu_insn): Ditto.
8878 (emit_vlmax_merge_insn): Ditto.
8879 (emit_vlmax_masked_insn): Ditto.
8880 (emit_nonvlmax_masked_insn): Ditto.
8881 (emit_vlmax_masked_store_insn): Ditto.
8882 (emit_nonvlmax_masked_store_insn): Ditto.
8883 (emit_vlmax_masked_mu_insn): Ditto.
8884 (emit_nonvlmax_tu_insn): Ditto.
8885 (emit_nonvlmax_fp_tu_insn): Ditto.
8886 (emit_scalar_move_insn): Ditto.
8887 (emit_vlmax_compress_insn): Ditto.
8888 (emit_vlmax_reduction_insn): Ditto.
8889 (emit_vlmax_fp_reduction_insn): Ditto.
8890 (emit_nonvlmax_fp_reduction_insn): Ditto.
8891 (expand_vec_series): Ditto.
8892 (expand_vector_init_merge_repeating_sequence): Ditto.
8893 (expand_vec_perm): Ditto.
8894 (shuffle_merge_patterns): Ditto.
8895 (shuffle_compress_patterns): Ditto.
8896 (shuffle_decompress_patterns): Ditto.
8897 (expand_reduction): Ditto.
8898 (get_mask_mode): Update return type.
8899 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
8900 is valid, and use new get_mask_mode interface.
8902 2023-07-31 Pan Li <pan2.li@intel.com>
8904 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
8905 Move rm suffix before mask.
8907 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8909 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
8910 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
8913 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
8916 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
8917 (extzv<mode>): Likewise.
8918 (insv<mode>): Likewise.
8919 (*testqi_ext_3): Likewise.
8920 (*btr<mode>_2): Likewise.
8921 (define_split): Likewise.
8922 (*btsq_imm): Likewise.
8923 (*btrq_imm): Likewise.
8924 (*btcq_imm): Likewise.
8925 (define_peephole2 x3): Likewise.
8926 (*bt<mode>): Likewise
8927 (*bt<mode>_mask): New define_insn_and_split.
8928 (*jcc_bt<mode>): Use QImode for offsets.
8929 (*jcc_bt<mode>_1): Delete obsolete pattern.
8930 (*jcc_bt<mode>_mask): Use QImode offsets.
8931 (*jcc_bt<mode>_mask_1): Likewise.
8932 (define_split): Likewise.
8933 (*bt<mode>_setcqi): Likewise.
8934 (*bt<mode>_setncqi): Likewise.
8935 (*bt<mode>_setnc<mode>): Likewise.
8936 (*bt<mode>_setncqi_2): Likewise.
8937 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
8938 (bmi2_bzhi_<mode>3): Use QImode offsets.
8939 (*bmi2_bzhi_<mode>3): Likewise.
8940 (*bmi2_bzhi_<mode>3_1): Likewise.
8941 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
8942 (@tbm_bextri_<mode>): Likewise.
8944 2023-07-29 Jan Hubicka <jh@suse.cz>
8946 * profile-count.cc (profile_probability::sqrt): New member function.
8947 (profile_probability::pow): Likewise.
8948 * profile-count.h: (profile_probability::sqrt): Declare
8949 (profile_probability::pow): Likewise.
8950 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
8952 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
8954 * gimple-range-cache.cc (ssa_cache::merge_range): New.
8955 (ssa_lazy_cache::merge_range): New.
8956 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
8957 (class ssa_lazy_cache): Ditto.
8958 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
8960 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
8962 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
8963 Move from value-query.cc.
8964 (substitute_and_fold_engine::value_of_stmt): Ditto.
8965 (substitute_and_fold_engine::range_of_expr): New.
8966 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
8967 range_query. New prototypes.
8968 * value-query.cc (value_query::value_on_edge): Relocate.
8969 (value_query::value_of_stmt): Ditto.
8970 * value-query.h (class value_query): Remove.
8971 (class range_query): Remove base class. Adjust prototypes.
8973 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
8975 PR tree-optimization/110205
8976 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
8977 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
8979 * range-op.cc (operator_lshift): Add missing final overrides.
8980 (operator_rshift): Ditto.
8982 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
8984 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
8985 optimizations in BPF target.
8987 2023-07-28 Honza <jh@ryzen4.suse.cz>
8989 * cfgloopmanip.cc (loop_count_in): Break out from ...
8990 (loop_exit_for_scaling): Break out from ...
8991 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
8992 add more sanity check and debug info.
8993 (scale_loop_profile): ... here.
8994 (create_empty_loop_on_edge): Fix whitespac.
8995 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
8996 * loop-unroll.cc (unroll_loop_constant_iterations): Use
8997 update_loop_exit_probability_scale_dom_bbs.
8998 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
8999 (tree_transform_and_unroll_loop): Use
9000 update_loop_exit_probability_scale_dom_bbs.
9001 * tree-ssa-loop-split.cc (split_loop): Use
9002 update_loop_exit_probability_scale_dom_bbs.
9004 2023-07-28 Jan Hubicka <jh@suse.cz>
9007 * tree-ssa-loop-split.cc: Include value-query.h.
9008 (split_at_bb_p): Analyze cases where EQ/NE can be turned
9009 into LT/LE/GT/GE; return updated guard code.
9010 (split_loop): Use guard code.
9012 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
9013 Richard Biener <rguenther@suse.de>
9016 PR rtl-optimization/110587
9017 * expr.cc (emit_group_load_1): Simplify logic for calling
9018 force_reg on ORIG_SRC, to avoid making a copy if the source
9019 is already in a pseudo register.
9021 2023-07-28 Jan Hubicka <jh@suse.cz>
9023 PR middle-end/106923
9024 * tree-ssa-loop-split.cc (connect_loops): Change probability
9025 of the test preconditioning second loop to very_likely.
9026 (fix_loop_bb_probability): Handle correctly case where
9027 on of the arms of the conditional is empty.
9028 (split_loop): Fold the test guarding first condition to
9029 see if it is constant true; Set correct entry block
9030 probabilities of the split loops; determine correct loop
9033 2023-07-28 xuli <xuli1@eswincomputing.com>
9035 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
9036 vsadd[u] and vssub[u].
9037 * config/riscv/vector.md: Ditto.
9039 2023-07-28 Jan Hubicka <jh@suse.cz>
9041 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
9042 loops when IV test is not overflowing.
9044 2023-07-28 liuhongt <hongtao.liu@intel.com>
9047 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
9049 (avx512cd_maskw_vec_dup<mode>): Ditto.
9051 2023-07-27 David Faust <david.faust@oracle.com>
9055 * config/bpf/bpf.opt (msmov): New option.
9056 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
9057 * config/bpf/bpf.md (*extendsidi2): New.
9063 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
9064 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
9065 also enables -msmov.
9067 2023-07-27 David Faust <david.faust@oracle.com>
9069 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
9070 Add -mbswap and -msdiv eBPF options.
9071 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
9072 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
9075 2023-07-27 David Faust <david.faust@oracle.com>
9077 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
9078 in pseudo-C dialect output template.
9079 (sub<AM:mode>3): Likewise.
9081 2023-07-27 Jan Hubicka <jh@suse.cz>
9083 * tree-vect-loop.cc (optimize_mask_stores): Make store
9086 2023-07-27 Jan Hubicka <jh@suse.cz>
9088 * cfgloop.h (single_dom_exit): Declare.
9089 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
9090 * cfgrtl.cc (struct cfg_hooks): Fix comment.
9091 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
9092 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
9093 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
9095 (tree_transform_and_unroll_loop): ... here;
9097 2023-07-27 Jan Hubicka <jh@suse.cz>
9099 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
9100 tree-ssa-loop-manip.cc and avoid recursion.
9101 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
9102 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
9104 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
9105 (scale_dominated_blocks_in_loop): Declare.
9106 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
9107 (change_edge_frequency): Remove.
9108 * predict.h (change_edge_frequency): Remove.
9109 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
9111 (niter_for_unrolled_loop): Remove.
9112 (tree_transform_and_unroll_loop): Fix profile update.
9114 2023-07-27 Jan Hubicka <jh@suse.cz>
9116 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
9117 to guessed; fix count of new_bb.
9119 2023-07-27 Jan Hubicka <jh@suse.cz>
9121 * profile-count.h (profile_count::apply_probability): Fix
9122 handling of uninitialized probabilities, optimize scaling
9125 2023-07-27 Richard Biener <rguenther@suse.de>
9127 PR tree-optimization/91838
9128 * gimple-match-head.cc: Include attribs.h and asan.h.
9129 * generic-match-head.cc: Likewise.
9130 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
9132 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9134 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
9135 (ADJUST_ALIGNMENT): Ditto.
9136 (ADJUST_PRECISION): Ditto.
9138 (VECTOR_MODE_WITH_PREFIX): Ditto.
9139 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
9140 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
9141 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
9142 (legitimize_move): Enable basic VLS modes support.
9145 (get_vector_mode): Ditto.
9146 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
9147 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
9148 (VLS_ENTRY): New macro.
9149 (riscv_v_ext_mode_p): Add vls modes.
9150 (riscv_get_v_regno_alignment): New function.
9151 (riscv_print_operand): Add vls modes.
9152 (riscv_hard_regno_nregs): Ditto.
9153 (riscv_hard_regno_mode_ok): Ditto.
9154 (riscv_regmode_natural_size): Ditto.
9155 (riscv_vectorize_preferred_vector_alignment): Ditto.
9156 * config/riscv/riscv.md: Ditto.
9157 * config/riscv/vector-iterators.md: Ditto.
9158 * config/riscv/vector.md: Ditto.
9159 * config/riscv/autovec-vls.md: New file.
9161 2023-07-27 Pan Li <pan2.li@intel.com>
9163 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
9165 (vwrite_csr): Ditto.
9167 2023-07-27 demin.han <demin.han@starfivetech.com>
9169 * config/riscv/autovec.md: Delete which_alternative use in split
9171 2023-07-27 Richard Biener <rguenther@suse.de>
9173 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
9175 (pass_sink_code::execute): ... in the caller.
9177 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
9178 Richard Biener <rguenther@suse.de>
9180 PR tree-optimization/110776
9181 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
9184 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
9186 * config/riscv/riscv.md: Include zicond.md
9187 * config/riscv/zicond.md: New file.
9189 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
9191 * common/config/riscv/riscv-common.cc: New extension.
9192 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
9193 (TARGET_ZICOND): New target.
9195 2023-07-26 Carl Love <cel@us.ibm.com>
9197 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
9198 specifies the number of built-in arguments to check.
9199 (altivec_resolve_overloaded_builtin): Update calls to find_instance
9200 to pass the number of built-in arguments to be checked.
9202 2023-07-26 David Faust <david.faust@oracle.com>
9204 * config/bpf/bpf.opt (mv3-atomics): New option.
9205 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
9206 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
9207 (REG_CLASS_NAMES): Likewise.
9208 (REG_CLASS_CONTENTS): Likewise.
9209 (REGNO_REG_CLASS): Handle R0.
9210 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
9211 (UNSPEC_AAND): New unspec.
9212 (UNSPEC_AOR): Likewise.
9213 (UNSPEC_AXOR): Likewise.
9214 (UNSPEC_AFADD): Likewise.
9215 (UNSPEC_AFAND): Likewise.
9216 (UNSPEC_AFOR): Likewise.
9217 (UNSPEC_AFXOR): Likewise.
9218 (UNSPEC_AXCHG): Likewise.
9219 (UNSPEC_ACMPX): Likewise.
9220 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
9222 * config/bpf/atomic.md: ...Here. New file.
9223 * config/bpf/constraints.md (t): New constraint for R0.
9224 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
9226 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
9228 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
9231 2023-07-26 Carl Love <cel@us.ibm.com>
9233 * config/rs6000/rs6000-builtins.def: Rename
9234 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
9235 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
9236 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
9237 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
9238 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
9239 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
9240 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
9241 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
9242 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
9243 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
9244 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
9245 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
9246 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
9247 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
9248 * config/rs6000/rs6000-c.cc (find_instance): Add case
9249 RS6000_OVLD_VEC_REPLACE_UN.
9250 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
9251 Fix first argument type. Rename VREPLACE_UN_UV4SI as
9252 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
9253 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
9254 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
9255 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
9256 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
9257 REPLACE_ELT_V for vector modes.
9258 (REPLACE_ELT): New scalar mode iterator.
9259 (REPLACE_ELT_char): Add scalar attributes.
9260 (vreplace_un_<mode>): Change iterator and mode attribute.
9262 2023-07-26 David Malcolm <dmalcolm@redhat.com>
9265 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
9267 2023-07-26 Richard Biener <rguenther@suse.de>
9269 PR tree-optimization/106081
9270 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
9271 Assign layout -1 to splats.
9273 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9275 * range-op-mixed.h (class operator_cast): Add update_bitmask.
9276 * range-op.cc (operator_cast::update_bitmask): New.
9277 (operator_cast::fold_range): Call update_bitmask.
9279 2023-07-26 Li Xu <xuli1@eswincomputing.com>
9281 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
9282 scalar type to float16, eliminate warning.
9283 (vfloat16mf4x3_t): Ditto.
9284 (vfloat16mf4x4_t): Ditto.
9285 (vfloat16mf4x5_t): Ditto.
9286 (vfloat16mf4x6_t): Ditto.
9287 (vfloat16mf4x7_t): Ditto.
9288 (vfloat16mf4x8_t): Ditto.
9289 (vfloat16mf2x2_t): Ditto.
9290 (vfloat16mf2x3_t): Ditto.
9291 (vfloat16mf2x4_t): Ditto.
9292 (vfloat16mf2x5_t): Ditto.
9293 (vfloat16mf2x6_t): Ditto.
9294 (vfloat16mf2x7_t): Ditto.
9295 (vfloat16mf2x8_t): Ditto.
9296 (vfloat16m1x2_t): Ditto.
9297 (vfloat16m1x3_t): Ditto.
9298 (vfloat16m1x4_t): Ditto.
9299 (vfloat16m1x5_t): Ditto.
9300 (vfloat16m1x6_t): Ditto.
9301 (vfloat16m1x7_t): Ditto.
9302 (vfloat16m1x8_t): Ditto.
9303 (vfloat16m2x2_t): Ditto.
9304 (vfloat16m2x3_t): Ditto.
9305 (vfloat16m2x4_t): Ditto.
9306 (vfloat16m4x2_t): Ditto.
9307 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
9308 * config/riscv/vector.md: add tuple mode in attr sew.
9310 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
9313 * config/i386/i386.md (plusminusmult): New code iterator.
9314 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
9315 (movq_<mode>_to_sse): New expander.
9316 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
9317 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
9318 as a wrapper around V4SFmode operation.
9319 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
9320 nonimmediate_operand.
9321 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
9322 operand 2 predicates to nonimmediate_operand.
9323 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
9324 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
9325 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
9326 operand 2 predicates to nonimmediate_operand.
9327 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
9328 nonimmediate_operand.
9329 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
9330 operand 2 predicates to nonimmediate_operand.
9331 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
9332 (<smaxmin:code>v2sf3): Ditto.
9333 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
9334 predicates to nonimmediate_operand.
9335 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
9336 operand 1 and operand 2 predicates to nonimmediate_operand.
9337 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
9338 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
9339 (*mmx_haddv2sf3_low): Ditto.
9340 (*mmx_hsubv2sf3_low): Ditto.
9341 (vec_addsubv2sf3): Ditto.
9342 (*mmx_maskcmpv2sf3_comm): Remove.
9343 (*mmx_maskcmpv2sf3): Remove.
9344 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
9345 (vcond<V2FI:mode>v2sf): Ditto.
9350 (fix_truncv2sfv2si2): Ditto.
9351 (fixuns_truncv2sfv2si2): Ditto.
9352 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
9353 Change operand 1 predicate to nonimmediate_operand.
9354 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
9355 (floatunsv2siv2sf2): Ditto.
9356 (mmx_floatv2siv2sf2): Remove SSE alternatives.
9357 Change operand 1 predicate to nonimmediate_operand.
9358 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
9360 (lrintv2sfv2si2): Ditto.
9362 (lceilv2sfv2si2): Ditto.
9363 (floorv2sf2): Ditto.
9364 (lfloorv2sfv2si2): Ditto.
9365 (btruncv2sf2): Ditto.
9366 (roundv2sf2): Ditto.
9367 (lroundv2sfv2si2): Ditto.
9368 (*mmx_roundv2sf2): Remove.
9370 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
9372 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
9374 2023-07-26 Richard Biener <rguenther@suse.de>
9376 PR tree-optimization/110799
9377 * tree-ssa-pre.cc (compute_avail): More thoroughly match
9378 up TBAA behavior of redundant loads.
9380 2023-07-26 Jakub Jelinek <jakub@redhat.com>
9382 PR tree-optimization/110755
9383 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
9384 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
9385 it is exact op1 + (-op1) or op1 - op1.
9387 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
9390 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
9391 operands output with "x".
9393 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9395 * range-op.cc (class operator_absu): Add update_bitmask.
9396 (operator_absu::update_bitmask): New.
9398 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9400 * range-op-mixed.h (class operator_abs): Add update_bitmask.
9401 * range-op.cc (operator_abs::update_bitmask): New.
9403 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9405 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
9406 * range-op.cc (operator_bitwise_not::update_bitmask): New.
9408 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9410 * range-op.cc (update_known_bitmask): Handle unary operators.
9412 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
9414 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
9416 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
9418 * config/riscv/riscv.md: Likewise.
9420 2023-07-26 Jan Hubicka <jh@suse.cz>
9422 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
9423 if we divide by zero.
9425 2023-07-25 David Faust <david.faust@oracle.com>
9427 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
9428 enclosing parentheses for pseudo-C dialect.
9429 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
9430 operands of pseudo-C dialect output templates where needed.
9431 (zero_extendqidi2): Likewise.
9432 (zero_extendsidi2): Likewise.
9433 (*mov<MM:mode>): Likewise.
9435 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
9437 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
9438 (bit_value_mult_const): Same.
9439 (get_individual_bits): Same.
9441 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
9444 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
9445 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
9446 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
9447 (minmax_op): New int attribute.
9448 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
9449 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
9450 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
9452 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
9454 2023-07-24 David Faust <david.faust@oracle.com>
9456 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
9458 2023-07-24 Drew Ross <drross@redhat.com>
9459 Jakub Jelinek <jakub@redhat.com>
9461 PR middle-end/109986
9462 * generic-match-head.cc (bitwise_equal_p): New macro.
9463 * gimple-match-head.cc (bitwise_equal_p): New macro.
9464 (gimple_nop_convert): Declare.
9465 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
9466 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
9468 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
9470 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
9471 single quote rather than backquote in diagnostic.
9473 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
9476 * config/bpf/bpf.opt: New command-line option -msdiv.
9477 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
9478 * config/bpf/bpf.cc (bpf_option_override): Initialize
9480 * doc/invoke.texi (eBPF Options): Document -msdiv.
9482 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
9484 * config/riscv/riscv.cc (riscv_option_override): Spell out
9485 greater than and use cannot in diagnostic string.
9487 2023-07-24 Richard Biener <rguenther@suse.de>
9489 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
9490 (_slp_tree::vec_stmts): Remove.
9491 (SLP_TREE_VEC_STMTS): Remove.
9492 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
9493 (_slp_tree::_slp_tree): Adjust.
9494 (_slp_tree::~_slp_tree): Likewise.
9495 (vect_get_slp_vect_def): Simplify.
9496 (vect_get_slp_defs): Likewise.
9497 (vect_transform_slp_perm_load_1): Adjust.
9498 (vect_add_slp_permutation): Likewise.
9499 (vect_schedule_slp_node): Likewise.
9500 (vectorize_slp_instance_root_stmt): Likewise.
9501 (vect_schedule_scc): Likewise.
9502 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
9503 (vectorizable_call): Likewise.
9504 (vectorizable_call): Likewise.
9505 (vect_create_vectorized_demotion_stmts): Likewise.
9506 (vectorizable_conversion): Likewise.
9507 (vectorizable_assignment): Likewise.
9508 (vectorizable_shift): Likewise.
9509 (vectorizable_operation): Likewise.
9510 (vectorizable_load): Likewise.
9511 (vectorizable_condition): Likewise.
9512 (vectorizable_comparison): Likewise.
9513 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
9514 (vectorize_fold_left_reduction): Use push_vec_def.
9515 (vect_transform_reduction): Likewise.
9516 (vect_transform_cycle_phi): Likewise.
9517 (vectorizable_lc_phi): Likewise.
9518 (vectorizable_phi): Likewise.
9519 (vectorizable_recurr): Likewise.
9520 (vectorizable_induction): Likewise.
9521 (vectorizable_live_operation): Likewise.
9523 2023-07-24 Richard Biener <rguenther@suse.de>
9525 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
9527 2023-07-24 Richard Biener <rguenther@suse.de>
9529 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
9530 * config/i386/i386-expand.cc: Likewise.
9531 * config/i386/i386-features.cc: Likewise.
9532 * config/i386/i386-options.cc: Likewise.
9534 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
9536 * tree-vect-stmts.cc (vectorizable_conversion): Handle
9537 more demotion/promotion for modifier == NONE.
9539 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
9544 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
9545 (extzv<mode>): Likewise.
9546 (insv<mode>): Likewise.
9547 (*testqi_ext_3): Likewise.
9548 (*btr<mode>_2): Likewise.
9549 (define_split): Likewise.
9550 (*btsq_imm): Likewise.
9551 (*btrq_imm): Likewise.
9552 (*btcq_imm): Likewise.
9553 (define_peephole2 x3): Likewise.
9554 (*bt<mode>): Likewise
9555 (*bt<mode>_mask): New define_insn_and_split.
9556 (*jcc_bt<mode>): Use QImode for offsets.
9557 (*jcc_bt<mode>_1): Delete obsolete pattern.
9558 (*jcc_bt<mode>_mask): Use QImode offsets.
9559 (*jcc_bt<mode>_mask_1): Likewise.
9560 (define_split): Likewise.
9561 (*bt<mode>_setcqi): Likewise.
9562 (*bt<mode>_setncqi): Likewise.
9563 (*bt<mode>_setnc<mode>): Likewise.
9564 (*bt<mode>_setncqi_2): Likewise.
9565 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
9566 (bmi2_bzhi_<mode>3): Use QImode offsets.
9567 (*bmi2_bzhi_<mode>3): Likewise.
9568 (*bmi2_bzhi_<mode>3_1): Likewise.
9569 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
9570 (@tbm_bextri_<mode>): Likewise.
9572 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
9574 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
9575 * config/bpf/bpf.opt (mkernel): Remove option.
9576 * config/bpf/bpf.cc (bpf_target_macros): Do not define
9577 BPF_KERNEL_VERSION_CODE.
9579 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
9582 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
9583 (mbswap): New option.
9584 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
9585 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
9586 * config/bpf/bpf.md: Use bswap instructions if available for
9587 bswap* insn, and fix constraint.
9588 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
9590 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9592 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
9593 (mask_len_fold_left_plus_<mode>): Ditto.
9594 * config/riscv/riscv-protos.h (enum insn_type): New enum.
9595 (enum reduction_type): Ditto.
9596 (expand_reduction): Add in-order reduction.
9597 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
9598 (expand_reduction): Add in-order reduction.
9600 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9602 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
9603 (vectorize_fold_left_reduction): Ditto.
9604 (vectorizable_reduction): Ditto.
9605 (vect_transform_reduction): Ditto.
9607 2023-07-24 Richard Biener <rguenther@suse.de>
9609 PR tree-optimization/110777
9610 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
9611 Avoid propagating abnormals.
9613 2023-07-24 Richard Biener <rguenther@suse.de>
9615 PR tree-optimization/110766
9616 * tree-scalar-evolution.cc
9617 (analyze_and_compute_bitwise_induction_effect): Check the PHI
9618 is defined in the loop header.
9620 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
9622 PR tree-optimization/110740
9623 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
9624 loop with a single scalar iteration.
9626 2023-07-24 Pan Li <pan2.li@intel.com>
9628 * config/riscv/riscv-vector-builtins-shapes.cc
9629 (struct alu_frm_def): Take range check.
9631 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
9634 * config/riscv/predicates.md (const_0_operand): Add back
9637 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
9639 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
9640 64-bit insertions into TImode optimizations with -O0, unless
9641 the function has the "naked" attribute (for PR target/110533).
9643 2023-07-22 Andrew Pinski <apinski@marvell.com>
9646 * rtl.h (extended_count): Change last argument type
9649 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
9651 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
9652 (extzv<mode>): Likewise.
9653 (insv<mode>): Likewise.
9654 (*testqi_ext_3): Likewise.
9655 (*btr<mode>_2): Likewise.
9656 (define_split): Likewise.
9657 (*btsq_imm): Likewise.
9658 (*btrq_imm): Likewise.
9659 (*btcq_imm): Likewise.
9660 (define_peephole2 x3): Likewise.
9661 (*bt<mode>): Likewise
9662 (*bt<mode>_mask): New define_insn_and_split.
9663 (*jcc_bt<mode>): Use QImode for offsets.
9664 (*jcc_bt<mode>_1): Delete obsolete pattern.
9665 (*jcc_bt<mode>_mask): Use QImode offsets.
9666 (*jcc_bt<mode>_mask_1): Likewise.
9667 (define_split): Likewise.
9668 (*bt<mode>_setcqi): Likewise.
9669 (*bt<mode>_setncqi): Likewise.
9670 (*bt<mode>_setnc<mode>): Likewise.
9671 (*bt<mode>_setncqi_2): Likewise.
9672 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
9673 (bmi2_bzhi_<mode>3): Use QImode offsets.
9674 (*bmi2_bzhi_<mode>3): Likewise.
9675 (*bmi2_bzhi_<mode>3_1): Likewise.
9676 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
9677 (@tbm_bextri_<mode>): Likewise.
9679 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
9681 * config/bfin/bfin.md (ones): Fix length computation.
9683 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
9685 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
9686 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
9687 instead of FRAME_POINTER_REGNUM to spill pseudos.
9689 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
9690 Richard Biener <rguenther@suse.de>
9693 * gimplify.cc (gimplify_compound_lval): If the array's type
9694 is error_mark_node then return GS_ERROR.
9696 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
9699 * config/bpf/bpf.opt: Added option -masm=<dialect>.
9700 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
9701 * config/bpf/bpf.cc (bpf_print_register): New function.
9702 (bpf_print_register): Support pseudo-c syntax for registers.
9703 (bpf_print_operand_address): Likewise.
9704 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
9705 (ASSEMBLER_DIALECT): Define.
9706 * config/bpf/bpf.md: Added pseudo-c templates.
9707 * doc/invoke.texi (-masm=): New eBPF option item.
9709 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
9711 * config/bpf/bpf.md: fixed template for neg instruction.
9713 2023-07-21 Jan Hubicka <jh@suse.cz>
9716 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
9717 profiles by vectorization factor.
9718 (vect_transform_loop): Check for flat profiles.
9720 2023-07-21 Jan Hubicka <jh@suse.cz>
9722 * cfgloop.h (maybe_flat_loop_profile): Declare
9723 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
9724 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
9726 2023-07-21 Jan Hubicka <jh@suse.cz>
9728 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
9729 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
9730 * predict.cc (estimate_bb_frequencies): Likewise.
9731 * profile.cc (branch_prob): Likewise.
9732 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
9734 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
9736 * config.in: Regenerate.
9737 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
9738 (LINK_COMMAND_SPEC_A): Add demangle handling.
9739 * configure: Regenerate.
9740 * configure.ac: Detect linker support for '-demangle'.
9742 2023-07-21 Jan Hubicka <jh@suse.cz>
9744 * sreal.cc (sreal::to_nearest_int): New.
9745 (sreal_verify_basics): Verify also to_nearest_int.
9746 (verify_aritmetics): Likewise.
9747 (sreal_verify_conversions): New.
9748 (sreal_cc_tests): Call sreal_verify_conversions.
9749 * sreal.h: (sreal::to_nearest_int): Declare
9751 2023-07-21 Jan Hubicka <jh@suse.cz>
9753 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
9754 (should_duplicate_loop_header_p): Return info on profitability.
9755 (do_while_loop_p): Watch for constant conditionals.
9756 (update_profile_after_ch): Do not sanity check that all
9757 static exits are taken.
9758 (ch_base::copy_headers): Run on all loops.
9759 (pass_ch::process_loop_p): Improve heuristics by handling also
9760 do_while loop and duplicating shortest sequence containing all
9763 2023-07-21 Jan Hubicka <jh@suse.cz>
9765 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
9766 tests first; update finite_p flag.
9768 2023-07-21 Jan Hubicka <jh@suse.cz>
9770 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
9771 * cfgloop.h (print_loop_info): Declare.
9772 * tree-cfg.cc (print_loop_info): Break out from ...; add
9773 printing of missing fields and profile
9774 (print_loop): ... here.
9776 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9778 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
9780 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9782 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
9783 (vectorizable_operation): Ditto.
9785 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9787 * config/riscv/autovec.md: Align order of mask and len.
9788 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
9789 (expand_gather_scatter): Ditto.
9790 * doc/md.texi: Ditto.
9791 * internal-fn.cc (add_len_and_mask_args): Ditto.
9792 (add_mask_and_len_args): Ditto.
9793 (expand_partial_load_optab_fn): Ditto.
9794 (expand_partial_store_optab_fn): Ditto.
9795 (expand_scatter_store_optab_fn): Ditto.
9796 (expand_gather_load_optab_fn): Ditto.
9797 (internal_fn_len_index): Ditto.
9798 (internal_fn_mask_index): Ditto.
9799 (internal_len_load_store_bias): Ditto.
9800 * tree-vect-stmts.cc (vectorizable_store): Ditto.
9801 (vectorizable_load): Ditto.
9803 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9805 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
9806 (mask_len_load<mode><vm>): Ditto.
9807 (len_maskstore<mode><vm>): Ditto.
9808 (mask_len_store<mode><vm>): Ditto.
9809 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
9810 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
9811 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
9812 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
9813 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
9814 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
9815 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
9816 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
9817 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
9818 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
9819 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
9820 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
9821 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
9822 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
9823 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
9824 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
9825 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
9826 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
9827 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
9828 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
9829 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
9830 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
9831 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
9832 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
9833 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
9834 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
9835 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
9836 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
9837 * doc/md.texi: Ditto.
9838 * genopinit.cc (main): Ditto.
9839 (CMP_NAME): Ditto. Ditto.
9840 * gimple-fold.cc (arith_overflowed_p): Ditto.
9841 (gimple_fold_partial_load_store_mem_ref): Ditto.
9842 (gimple_fold_call): Ditto.
9843 * internal-fn.cc (len_maskload_direct): Ditto.
9844 (mask_len_load_direct): Ditto.
9845 (len_maskstore_direct): Ditto.
9846 (mask_len_store_direct): Ditto.
9847 (expand_call_mem_ref): Ditto.
9848 (expand_len_maskload_optab_fn): Ditto.
9849 (expand_mask_len_load_optab_fn): Ditto.
9850 (expand_len_maskstore_optab_fn): Ditto.
9851 (expand_mask_len_store_optab_fn): Ditto.
9852 (direct_len_maskload_optab_supported_p): Ditto.
9853 (direct_mask_len_load_optab_supported_p): Ditto.
9854 (direct_len_maskstore_optab_supported_p): Ditto.
9855 (direct_mask_len_store_optab_supported_p): Ditto.
9856 (internal_load_fn_p): Ditto.
9857 (internal_store_fn_p): Ditto.
9858 (internal_gather_scatter_fn_p): Ditto.
9859 (internal_fn_len_index): Ditto.
9860 (internal_fn_mask_index): Ditto.
9861 (internal_fn_stored_value_index): Ditto.
9862 (internal_len_load_store_bias): Ditto.
9863 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
9864 (MASK_LEN_GATHER_LOAD): Ditto.
9865 (LEN_MASK_LOAD): Ditto.
9866 (MASK_LEN_LOAD): Ditto.
9867 (LEN_MASK_SCATTER_STORE): Ditto.
9868 (MASK_LEN_SCATTER_STORE): Ditto.
9869 (LEN_MASK_STORE): Ditto.
9870 (MASK_LEN_STORE): Ditto.
9871 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
9872 (supports_vec_scatter_store_p): Ditto.
9873 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
9874 (target_supports_len_load_store_p): Ditto.
9875 * optabs.def (OPTAB_CD): Ditto.
9876 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
9877 (call_may_clobber_ref_p_1): Ditto.
9878 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
9879 (dse_optimize_stmt): Ditto.
9880 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
9881 (get_alias_ptr_type_for_ptr_address): Ditto.
9882 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
9883 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
9884 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
9885 (vect_get_strided_load_store_ops): Ditto.
9886 (vectorizable_store): Ditto.
9887 (vectorizable_load): Ditto.
9889 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
9891 * config/i386/i386.opt: Fix a typo.
9893 2023-07-21 Richard Biener <rguenther@suse.de>
9895 PR tree-optimization/88540
9896 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
9897 with NaNs but handle the simple case by if-converting to a
9900 2023-07-21 Andrew Pinski <apinski@marvell.com>
9902 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
9905 2023-07-21 Richard Biener <rguenther@suse.de>
9907 PR tree-optimization/110742
9908 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
9909 Do not materialize an edge permutation in an external node with
9911 (vect_slp_analyze_node_operations_1): Guard purely internal
9914 2023-07-21 Jan Hubicka <jh@suse.cz>
9916 * cfgloop.cc: Include sreal.h.
9917 (flow_loop_dump): Dump sreal iteration exsitmate.
9918 (get_estimated_loop_iterations): Update.
9919 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
9920 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
9921 (expected_loop_iterations_unbounded): Use new API.
9922 * cfgloopmanip.cc (scale_loop_profile): Use
9923 expected_loop_iterations_by_profile
9924 * predict.cc (pass_profile::execute): Likewise.
9925 * profile.cc (branch_prob): Likewise.
9926 * tree-ssa-loop-niter.cc: Include sreal.h.
9927 (estimate_numbers_of_iterations): Likewise
9929 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
9931 PR tree-optimization/110744
9932 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
9933 operand for ifn IFN_LEN_STORE.
9935 2023-07-21 liuhongt <hongtao.liu@intel.com>
9938 * common.opt: (fcf-protection=): Add EnumSet attribute to
9939 support combination of params.
9941 2023-07-21 David Malcolm <dmalcolm@redhat.com>
9943 PR middle-end/110612
9944 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
9946 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
9947 (table_geometry::table_y_to_canvas_y): Likewise.
9948 * text-art/table.h (table_geometry::m_table): Drop unused field.
9949 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
9952 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
9955 * config/i386/i386-features.cc
9956 (general_scalar_chain::compute_convert_gain): Calculate gain
9957 for extend higpart case.
9958 (general_scalar_chain::convert_op): Handle
9959 ASHIFTRT/ASHIFT combined RTX.
9960 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
9961 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
9962 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
9963 New define_insn_and_split pattern.
9964 (*extendv2di2_highpart_stv): Ditto.
9966 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
9968 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
9971 2023-07-20 Andrew Pinski <apinski@marvell.com>
9973 * combine.cc (dump_combine_stats): Remove.
9974 (dump_combine_total_stats): Remove.
9975 (total_attempts, total_merges, total_extras,
9976 total_successes): Remove.
9977 (combine_instructions): Don't increment total stats
9978 instead use statistics_counter_event.
9979 * dumpfile.cc (print_combine_total_stats): Remove.
9980 * dumpfile.h (print_combine_total_stats): Remove.
9981 (dump_combine_total_stats): Remove.
9982 * passes.cc (finish_optimization_passes):
9983 Don't call print_combine_total_stats.
9984 * rtl.h (dump_combine_total_stats): Remove.
9985 (dump_combine_stats): Remove.
9987 2023-07-20 Jan Hubicka <jh@suse.cz>
9989 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
9992 2023-07-20 Martin Jambor <mjambor@suse.cz>
9994 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
9995 (analyzer-text-art-ideal-canvas-width): Likewise.
9996 (analyzer-text-art-string-ellipsis-head-len): Likewise.
9997 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
9999 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10001 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
10002 Refine code structure.
10004 2023-07-20 Jan Hubicka <jh@suse.cz>
10006 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
10007 (get_range_query): ... this one; do
10008 (static_loop_exit): Add query parametr, turn ranger to reference.
10009 (loop_static_stmt_p): New function.
10010 (loop_static_op_p): New function.
10011 (loop_iv_derived_p): Remove.
10012 (loop_combined_static_and_iv_p): New function.
10013 (should_duplicate_loop_header_p): Discover combined onditionals;
10014 do not track iv derived; improve dumps.
10015 (pass_ch::execute): Fix whitespace.
10017 2023-07-20 Richard Biener <rguenther@suse.de>
10019 PR tree-optimization/110204
10020 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
10021 Look through copies generated by PRE.
10023 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
10025 * tree-vect-stmts.cc (get_group_load_store_type): Account for
10026 `gap` when checking if need to peel twice.
10028 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
10030 PR middle-end/77928
10031 * doc/extend.texi: Document iseqsig builtin.
10032 * builtins.cc (fold_builtin_iseqsig): New function.
10033 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
10034 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
10035 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
10037 2023-07-20 Pan Li <pan2.li@intel.com>
10039 * config/riscv/vector.md: Fix incorrect match_operand.
10041 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
10043 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
10044 force_reg, to use SUBREG rather than create a new pseudo when
10045 inserting DFmode fields into TImode with insvti_{high,low}part.
10046 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
10047 define_insn_and_split...
10048 (*concatditi3_3): 64-bit implementation. Provide alternative
10049 that allows register allocation to use SSE registers that is
10050 split into vec_concatv2di after reload.
10051 (*concatsidi3_3): 32-bit implementation.
10053 2023-07-20 Richard Biener <rguenther@suse.de>
10055 PR middle-end/61747
10056 * internal-fn.cc (expand_vec_cond_optab_fn): When the
10057 value operands are equal to the original comparison operands
10058 preserve that equality by re-using the comparison expansion.
10059 * optabs.cc (emit_conditional_move): When the value operands
10060 are equal to the comparison operands and would be forced to
10061 a register by prepare_cmp_insn do so earlier, preserving the
10064 2023-07-20 Pan Li <pan2.li@intel.com>
10066 * config/riscv/vector.md: Align pattern format.
10068 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
10070 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
10071 Granite Rapids{, D} from documentation.
10073 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10075 * config/riscv/autovec.md
10076 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
10077 Refactor RVV machine modes.
10078 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
10079 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10080 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
10081 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10082 (len_mask_gather_load<mode><mode>): Ditto.
10083 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
10084 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10085 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10086 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
10087 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10088 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
10089 (len_mask_scatter_store<mode><mode>): Ditto.
10090 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
10091 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
10092 (ADJUST_NUNITS): Ditto.
10093 (ADJUST_ALIGNMENT): Ditto.
10094 (ADJUST_BYTESIZE): Ditto.
10095 (ADJUST_PRECISION): Ditto.
10096 (RVV_MODES): Ditto.
10097 (RVV_WHOLE_MODES): Ditto.
10098 (RVV_FRACT_MODE): Ditto.
10099 (RVV_NF8_MODES): Ditto.
10100 (RVV_NF4_MODES): Ditto.
10101 (VECTOR_MODES_WITH_PREFIX): Ditto.
10102 (VECTOR_MODE_WITH_PREFIX): Ditto.
10103 (RVV_TUPLE_MODES): Ditto.
10104 (RVV_NF2_MODES): Ditto.
10105 (RVV_TUPLE_PARTIAL_MODES): Ditto.
10106 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
10108 (TUPLE_ENTRY): Ditto.
10109 (get_vlmul): Ditto.
10111 (get_ratio): Ditto.
10112 (preferred_simd_mode): Ditto.
10113 (autovectorize_vector_modes): Ditto.
10114 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
10115 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
10116 (vbool64_t): Ditto.
10117 (vbool32_t): Ditto.
10118 (vbool16_t): Ditto.
10123 (vint8mf8_t): Ditto.
10124 (vuint8mf8_t): Ditto.
10125 (vint8mf4_t): Ditto.
10126 (vuint8mf4_t): Ditto.
10127 (vint8mf2_t): Ditto.
10128 (vuint8mf2_t): Ditto.
10129 (vint8m1_t): Ditto.
10130 (vuint8m1_t): Ditto.
10131 (vint8m2_t): Ditto.
10132 (vuint8m2_t): Ditto.
10133 (vint8m4_t): Ditto.
10134 (vuint8m4_t): Ditto.
10135 (vint8m8_t): Ditto.
10136 (vuint8m8_t): Ditto.
10137 (vint16mf4_t): Ditto.
10138 (vuint16mf4_t): Ditto.
10139 (vint16mf2_t): Ditto.
10140 (vuint16mf2_t): Ditto.
10141 (vint16m1_t): Ditto.
10142 (vuint16m1_t): Ditto.
10143 (vint16m2_t): Ditto.
10144 (vuint16m2_t): Ditto.
10145 (vint16m4_t): Ditto.
10146 (vuint16m4_t): Ditto.
10147 (vint16m8_t): Ditto.
10148 (vuint16m8_t): Ditto.
10149 (vint32mf2_t): Ditto.
10150 (vuint32mf2_t): Ditto.
10151 (vint32m1_t): Ditto.
10152 (vuint32m1_t): Ditto.
10153 (vint32m2_t): Ditto.
10154 (vuint32m2_t): Ditto.
10155 (vint32m4_t): Ditto.
10156 (vuint32m4_t): Ditto.
10157 (vint32m8_t): Ditto.
10158 (vuint32m8_t): Ditto.
10159 (vint64m1_t): Ditto.
10160 (vuint64m1_t): Ditto.
10161 (vint64m2_t): Ditto.
10162 (vuint64m2_t): Ditto.
10163 (vint64m4_t): Ditto.
10164 (vuint64m4_t): Ditto.
10165 (vint64m8_t): Ditto.
10166 (vuint64m8_t): Ditto.
10167 (vfloat16mf4_t): Ditto.
10168 (vfloat16mf2_t): Ditto.
10169 (vfloat16m1_t): Ditto.
10170 (vfloat16m2_t): Ditto.
10171 (vfloat16m4_t): Ditto.
10172 (vfloat16m8_t): Ditto.
10173 (vfloat32mf2_t): Ditto.
10174 (vfloat32m1_t): Ditto.
10175 (vfloat32m2_t): Ditto.
10176 (vfloat32m4_t): Ditto.
10177 (vfloat32m8_t): Ditto.
10178 (vfloat64m1_t): Ditto.
10179 (vfloat64m2_t): Ditto.
10180 (vfloat64m4_t): Ditto.
10181 (vfloat64m8_t): Ditto.
10182 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
10183 (TUPLE_ENTRY): Ditto.
10184 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
10185 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
10186 (riscv_v_adjust_nunits): Ditto.
10187 (riscv_v_adjust_bytesize): Ditto.
10188 (riscv_v_adjust_precision): Ditto.
10189 (riscv_convert_vector_bits): Ditto.
10190 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
10191 * config/riscv/riscv.md: Ditto.
10192 * config/riscv/vector-iterators.md: Ditto.
10193 * config/riscv/vector.md
10194 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10195 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
10196 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10197 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
10198 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10199 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
10200 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
10201 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
10202 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
10203 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
10204 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
10205 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
10206 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
10207 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
10208 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
10209 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
10210 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
10211 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
10212 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
10213 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
10214 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
10215 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
10216 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
10217 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
10218 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
10219 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
10220 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
10221 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
10222 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
10223 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
10224 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
10225 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
10226 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
10228 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
10230 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
10231 (lra_asm_insn_error): New prototype.
10232 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
10234 (lra_spill): Call lra_update_fp2sp_elimination.
10235 * lra-eliminations.cc: Remove trailing spaces.
10236 (elimination_fp2sp_occured_p): New static flag.
10237 (lra_eliminate_regs_1): Set the flag up.
10238 (update_reg_eliminate): Modify the assert for stack to frame
10239 pointer elimination.
10240 (lra_update_fp2sp_elimination): New function.
10241 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
10243 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
10245 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
10247 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
10248 dependencies from target pragmas.
10249 * config/aarch64/arm_fp16.h (target): Likewise.
10250 * config/aarch64/arm_neon.h (target): Likewise.
10252 2023-07-19 Andrew Pinski <apinski@marvell.com>
10254 PR tree-optimization/110252
10255 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
10256 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
10257 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
10258 (match_simplify_replacement): Temporarily
10259 remove the flow sensitive info on the two statements that might
10262 2023-07-19 Andrew Pinski <apinski@marvell.com>
10264 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
10265 with flow_sensitive_info_storage.
10266 (follow_outer_ssa_edges): Update how to save off the flow
10268 (maybe_fold_comparisons_from_match_pd): Update restoring
10269 of flow sensitive info.
10270 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
10271 (flow_sensitive_info_storage::restore): New method.
10272 (flow_sensitive_info_storage::save_and_clear): New method.
10273 (flow_sensitive_info_storage::clear_storage): New method.
10274 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
10276 2023-07-19 Andrew Pinski <apinski@marvell.com>
10278 PR tree-optimization/110726
10279 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
10280 Add checks to make sure the type was one bit precision
10283 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10285 * doc/md.texi: Add mask_len_fold_left_plus.
10286 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
10287 (expand_mask_len_fold_left_optab_fn): Ditto.
10288 (direct_mask_len_fold_left_optab_supported_p): Ditto.
10289 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
10290 * optabs.def (OPTAB_D): Ditto.
10292 2023-07-19 Jakub Jelinek <jakub@redhat.com>
10294 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
10296 2023-07-19 Jakub Jelinek <jakub@redhat.com>
10298 PR tree-optimization/110731
10299 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
10300 divisor as UNSIGNED regardless of sgn.
10302 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
10304 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
10305 (standard_extensions_p): Add check.
10306 (riscv_subset_list::add): Just return NULL if it failed before.
10307 (riscv_subset_list::parse_std_ext): Continue parse when find a error
10308 (riscv_subset_list::parse): Just return NULL if it failed before.
10309 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
10311 2023-07-19 Jan Beulich <jbeulich@suse.com>
10313 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
10315 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
10316 gen_vec_extract_hi.
10317 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
10318 gen_vec_interleave_low. Rename local variable.
10320 2023-07-19 Jan Beulich <jbeulich@suse.com>
10322 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
10323 alternative. Move AVX512VL part of condition to new "enabled"
10326 2023-07-19 liuhongt <hongtao.liu@intel.com>
10329 * config/i386/i386-builtins.cc
10330 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
10331 (ix86_register_bf16_builtin_type): Ditto.
10332 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
10333 isn't available, undef the macros which are used to check the
10334 backend support of the _Float16/__bf16 types when building
10335 libstdc++ and libgcc.
10336 * config/i386/i386.cc (construct_container): Issue errors for
10337 HFmode/BFmode when TARGET_SSE2 is not available.
10338 (function_value_32): Ditto.
10339 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
10340 (ix86_libgcc_floating_mode_supported_p): Ditto.
10341 (ix86_emit_support_tinfos): Adjust codes.
10342 (ix86_invalid_conversion): Return diagnostic message string
10343 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
10344 (ix86_invalid_unary_op): New function.
10345 (ix86_invalid_binary_op): Ditto.
10346 (TARGET_INVALID_UNARY_OP): Define.
10347 (TARGET_INVALID_BINARY_OP): Define.
10348 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
10349 related instrinsics header files.
10350 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
10352 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
10354 * dwarf2asm.cc: Change FALSE to false.
10355 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
10356 * dwarf2out.cc (matches_main_base): Change return type from
10357 int to bool. Change "last_match" variable to bool.
10358 (dump_struct_debug): Change return type from int to bool.
10359 Change "matches" and "result" function arguments to bool.
10360 (is_pseudo_reg): Change return type from int to bool.
10361 (is_tagged_type): Ditto.
10362 (same_loc_p): Ditto.
10363 (same_dw_val_p): Change return type from int to bool and adjust
10364 function body accordingly.
10365 (same_attr_p): Ditto.
10366 (same_die_p): Ditto.
10367 (is_type_die): Ditto.
10368 (is_declaration_die): Ditto.
10369 (should_move_die_to_comdat): Ditto.
10370 (is_base_type): Ditto.
10371 (is_based_loc): Ditto.
10372 (local_scope_p): Ditto.
10373 (class_scope_p): Ditto.
10374 (class_or_namespace_scope_p): Ditto.
10375 (is_tagged_type): Ditto.
10376 (is_rust): Use void argument.
10377 (is_nested_in_subprogram): Change return type from int to bool.
10378 (contains_subprogram_definition): Ditto.
10379 (gen_struct_or_union_type_die): Change "nested", "complete"
10380 and "ns_decl" variables to bool.
10381 (is_naming_typedef_decl): Change FALSE to false.
10383 2023-07-18 Jan Hubicka <jh@suse.cz>
10385 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
10386 for queries not in headers.
10387 (static_loop_exit): Add basic blck parameter; update use of
10389 (should_duplicate_loop_header_p): Add ranger and static_exits
10390 parameter. Do not account statements that will be optimized
10391 out after duplicaiton in overall size. Add ranger query to
10393 (update_profile_after_ch): Take static_exits has set instead of
10394 single eliminated_edge.
10395 (ch_base::copy_headers): Do all analysis in the first pass;
10396 remember invariant_exits and static_exits.
10398 2023-07-18 Jason Merrill <jason@redhat.com>
10400 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
10402 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
10404 * doc/gm2.texi (Semantic checking): Change example testwithptr
10407 2023-07-18 Richard Biener <rguenther@suse.de>
10409 PR middle-end/105715
10410 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
10411 (pass_gimple_isel::execute): ... this. Duplicate
10412 comparison defs of COND_EXPRs.
10414 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10416 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
10417 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
10418 (riscv_convert_vector_bits): Ditto.
10420 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10422 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
10423 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
10425 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
10427 * config/s390/vx-builtins.md: New vsel pattern.
10429 2023-07-18 liuhongt <hongtao.liu@intel.com>
10432 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
10433 Remove # from assemble output.
10435 2023-07-18 liuhongt <hongtao.liu@intel.com>
10438 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
10439 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
10440 3 define_peephole2 after the pattern.
10442 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10444 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
10446 2023-07-18 Pan Li <pan2.li@intel.com>
10447 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10449 * config/riscv/riscv.cc (struct machine_function): Add new field.
10450 (riscv_static_frm_mode_p): New function.
10451 (riscv_emit_frm_mode_set): New function for emit FRM.
10452 (riscv_emit_mode_set): Extract function for FRM.
10453 (riscv_mode_needed): Fix the TODO.
10454 (riscv_mode_entry): Initial dynamic frm RTL.
10455 (riscv_mode_exit): Return DYN_EXIT.
10456 * config/riscv/riscv.md: Add rdfrm.
10457 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
10458 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
10460 (fsrmsi_backup): New pattern for swap.
10461 (fsrmsi_restore): New pattern for restore.
10462 (fsrmsi_restore_exit): New pattern for restore exit.
10463 (frrmsi): New pattern for backup.
10465 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
10467 * doc/extend.texi: Add @cindex on __auto_type.
10469 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
10471 * combine-stack-adj.cc (stack_memref_p): Change return type from
10472 int to bool and adjust function body accordingly.
10473 (rest_of_handle_stack_adjustments): Change return type to void.
10475 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
10477 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
10478 (cant_combine_insn_p): Change return type from int to bool and adjust
10479 function body accordingly.
10480 (can_combine_p): Ditto.
10481 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
10482 function arguments from int to bool.
10483 (contains_muldiv): Change return type from int to bool and adjust
10484 function body accordingly.
10485 (try_combine): Ditto. Change "new_direct_jump" pointer function
10486 argument from int to bool. Change "substed_i2", "substed_i1",
10487 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
10488 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
10489 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
10490 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
10491 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
10492 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
10494 (subst): Change "in_dest", "in_cond" and "unique_copy" function
10495 arguments from int to bool.
10496 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
10497 arguments from int to bool.
10498 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
10499 function argument from int to bool.
10500 (force_int_to_mode): Change "just_select" function argument
10501 from int to bool. Change "next_select" variable to bool.
10502 (rtx_equal_for_field_assignment_p): Change return type from
10503 int to bool and adjust function body accordingly.
10504 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
10505 argument from int to bool.
10506 (get_last_value_validate): Change return type from int to bool
10507 and adjust function body accordingly.
10508 (reg_dead_at_p): Ditto.
10509 (reg_bitfield_target_p): Ditto.
10510 (combine_instructions): Ditto. Change "new_direct_jump"
10512 (can_combine_p): Change return type from int to bool
10513 and adjust function body accordingly.
10514 (likely_spilled_retval_p): Ditto.
10515 (can_change_dest_mode): Change "added_sets" function argument
10517 (find_split_point): Change "unsignedp" variable to bool.
10518 (simplify_if_then_else): Change "comparison_p" and "swapped"
10520 (simplify_set): Change "other_changed" variable to bool.
10521 (expand_compound_operation): Change "unsignedp" variable to bool.
10522 (force_to_mode): Change "just_select" function argument
10523 from int to bool. Change "next_select" variable to bool.
10524 (extended_count): Change "unsignedp" function argument to bool.
10525 (simplify_shift_const_1): Change "complement_p" variable to bool.
10526 (simplify_comparison): Change "changed" variable to bool.
10527 (rest_of_handle_combine): Change return type to void.
10529 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10532 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
10534 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
10536 * ira.cc (setup_reg_class_relations): Continue
10537 if regclass cl3 is hard_reg_set_empty_p.
10539 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10541 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
10543 2023-07-17 Martin Jambor <mjambor@suse.cz>
10545 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
10548 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
10550 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
10552 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
10555 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
10556 recur add all implied extensions.
10557 (riscv_subset_list::check_implied_ext): Add new method.
10558 (riscv_subset_list::parse): Call checker check_implied_ext.
10559 * config/riscv/riscv-subset.h: Add new method.
10561 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10563 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
10564 (reduc_smax_scal_<mode>): Ditto.
10565 (reduc_umax_scal_<mode>): Ditto.
10566 (reduc_smin_scal_<mode>): Ditto.
10567 (reduc_umin_scal_<mode>): Ditto.
10568 (reduc_and_scal_<mode>): Ditto.
10569 (reduc_ior_scal_<mode>): Ditto.
10570 (reduc_xor_scal_<mode>): Ditto.
10571 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
10572 (expand_reduction): New function.
10573 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
10574 (emit_vlmax_fp_reduction_insn): Ditto.
10575 (get_m1_mode): Ditto.
10576 (expand_cond_len_binop): Fix name.
10577 (expand_reduction): New function
10578 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
10579 (validate_change_or_fail): New function.
10580 (change_insn): Fix VSETVL BUG.
10581 (change_vsetvl_insn): Ditto.
10582 (pass_vsetvl::backward_demand_fusion): Ditto.
10583 (pass_vsetvl::df_post_optimization): Ditto.
10585 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
10587 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
10589 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
10591 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
10592 Remove parameter name from declaration of unused parameter.
10594 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
10596 PR tree-optimization/110652
10597 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
10600 2023-07-17 Richard Biener <rguenther@suse.de>
10602 PR tree-optimization/110669
10603 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
10604 Check we matched a header PHI.
10606 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
10608 * tree-ssanames.cc (set_bitmask): New.
10609 * tree-ssanames.h (set_bitmask): New.
10611 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
10613 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
10615 * value-range.h (irange_bitmask::union_): Normalize beforehand.
10616 (irange_bitmask::intersect): Same.
10618 2023-07-17 Andrew Pinski <apinski@marvell.com>
10620 PR tree-optimization/95923
10621 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
10623 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
10625 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
10626 to the std::sort comparison lambda function const.
10628 2023-07-17 Andrew Pinski <apinski@marvell.com>
10630 PR tree-optimization/110666
10631 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
10633 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
10635 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
10636 Arrow Lake and Arrow Lake S.
10637 * common/config/i386/i386-common.cc:
10638 (processor_name): Add arrowlake.
10639 (processor_alias_table): Add arrow lake, arrow lake s and lunar
10641 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
10642 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
10643 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
10644 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
10646 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
10648 * config/i386/i386-options.cc (m_ARROWLAKE): New.
10649 (processor_cost_table): Add arrowlake.
10650 * config/i386/i386.h (enum processor_type):
10651 Add PROCESSOR_ARROWLAKE.
10652 * config/i386/x86-tune.def: Add m_ARROWLAKE.
10653 * doc/extend.texi: Add arrowlake and arrowlake-s.
10654 * doc/invoke.texi: Ditto.
10656 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10658 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
10659 have the same iterator. Also renaming all the occurence to
10661 (usdot_prod<mode>): New define_expand.
10662 (udot_prod<mode>): Ditto.
10664 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10666 * common/config/i386/cpuinfo.h (get_available_features):
10668 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
10669 OPTION_MASK_ISA2_SM4_UNSET): New.
10670 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
10671 (ix86_handle_option): Handle -msm4.
10672 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10674 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10676 * config.gcc: Add sm4intrin.h.
10677 * config/i386/cpuid.h (bit_SM4): New.
10678 * config/i386/i386-builtin.def (BDESC): Add new builtins.
10679 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10681 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
10682 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
10683 (ix86_valid_target_attribute_inner_p): Handle sm4.
10684 * config/i386/i386.opt: Add option -msm4.
10685 * config/i386/immintrin.h: Include sm4intrin.h
10686 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
10687 (vsm4rnds4_<mode>): Ditto.
10688 * doc/extend.texi: Document sm4.
10689 * doc/invoke.texi: Document -msm4.
10690 * doc/sourcebuild.texi: Document target sm4.
10691 * config/i386/sm4intrin.h: New file.
10693 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10695 * common/config/i386/cpuinfo.h (get_available_features):
10697 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
10698 OPTION_MASK_ISA2_SHA512_UNSET): New.
10699 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
10700 (ix86_handle_option): Handle -msha512.
10701 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10702 Add FEATURE_SHA512.
10703 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10705 * config.gcc: Add sha512intrin.h.
10706 * config/i386/cpuid.h (bit_SHA512): New.
10707 * config/i386/i386-builtin-types.def:
10708 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
10709 * config/i386/i386-builtin.def (BDESC): Add new builtins.
10710 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10712 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
10713 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
10714 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
10715 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
10716 (ix86_valid_target_attribute_inner_p): Handle sha512.
10717 * config/i386/i386.opt: Add option -msha512.
10718 * config/i386/immintrin.h: Include sha512intrin.h.
10719 * config/i386/sse.md (vsha512msg1): New define insn.
10720 (vsha512msg2): Ditto.
10721 (vsha512rnds2): Ditto.
10722 * doc/extend.texi: Document sha512.
10723 * doc/invoke.texi: Document -msha512.
10724 * doc/sourcebuild.texi: Document target sha512.
10725 * config/i386/sha512intrin.h: New file.
10727 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10729 * common/config/i386/cpuinfo.h (get_available_features):
10731 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
10732 OPTION_MASK_ISA2_SM3_UNSET): New.
10733 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
10734 (ix86_handle_option): Handle -msm3.
10735 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10737 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10739 * config.gcc: Add sm3intrin.h
10740 * config/i386/cpuid.h (bit_SM3): New.
10741 * config/i386/i386-builtin-types.def:
10742 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
10743 * config/i386/i386-builtin.def (BDESC): Add new builtins.
10744 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10746 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
10747 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
10748 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
10749 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
10750 (ix86_valid_target_attribute_inner_p): Handle sm3.
10751 * config/i386/i386.opt: Add option -msm3.
10752 * config/i386/immintrin.h: Include sm3intrin.h.
10753 * config/i386/sse.md (vsm3msg1): New define insn.
10755 (vsm3rnds2): Ditto.
10756 * doc/extend.texi: Document sm3.
10757 * doc/invoke.texi: Document -msm3.
10758 * doc/sourcebuild.texi: Document target sm3.
10759 * config/i386/sm3intrin.h: New file.
10761 2023-07-17 Kong Lingling <lingling.kong@intel.com>
10762 Haochen Jiang <haochen.jiang@intel.com>
10764 * common/config/i386/cpuinfo.h (get_available_features): Detect
10766 * common/config/i386/i386-common.cc
10767 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
10768 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
10769 (ix86_handle_option): Handle -mavxvnniint16.
10770 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10771 Add FEATURE_AVXVNNIINT16.
10772 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10774 * config.gcc: Add avxvnniint16.h.
10775 * config/i386/avxvnniint16intrin.h: New file.
10776 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
10777 * config/i386/i386-builtin.def: Add new builtins.
10778 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10780 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
10781 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
10782 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
10783 * config/i386/i386.opt: Add option -mavxvnniint16.
10784 * config/i386/immintrin.h: Include avxvnniint16.h.
10785 * config/i386/sse.md
10786 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
10787 * doc/extend.texi: Document avxvnniint16.
10788 * doc/invoke.texi: Document -mavxvnniint16.
10789 * doc/sourcebuild.texi: Document target avxvnniint16.
10791 2023-07-16 Jan Hubicka <jh@suse.cz>
10793 PR middle-end/110649
10794 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
10795 (vect_transform_loop): Move scale_profile_for_vect_loop after
10796 upper bound updates.
10798 2023-07-16 Jan Hubicka <jh@suse.cz>
10800 PR tree-optimization/110649
10801 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
10802 probability of the if-then-else construct.
10804 2023-07-16 Jan Hubicka <jh@suse.cz>
10806 PR middle-end/110649
10807 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
10809 2023-07-15 Andrew Pinski <apinski@marvell.com>
10811 * doc/contrib.texi: Update my entry.
10813 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
10815 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
10817 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
10818 (tld_load): Likewise.
10819 (tgd_load_pic): Change to expander.
10820 (tld_load_pic, tld_offset_load, tp_load): Likewise.
10821 (tie_load_pic, tle_load): Likewise.
10822 (tgd_load_picsi, tgd_load_picdi): New.
10823 (tld_load_picsi, tld_load_picdi): New.
10824 (tld_offset_load<P:mode>): New.
10825 (tp_load<P:mode>): New.
10826 (tie_load_picsi, tie_load_picdi): New.
10827 (tle_load<P:mode>): New.
10829 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10831 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
10832 (vcmlaq_rot180, vcmlaq_rot270): New.
10833 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
10834 (vcmlaq_rot180, vcmlaq_rot270): New.
10835 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
10836 (vcmlaq_rot180, vcmlaq_rot270): New.
10837 * config/arm/arm-mve-builtins.cc
10838 (function_instance::has_inactive_argument): Handle vcmlaq,
10839 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
10840 * config/arm/arm_mve.h (vcmlaq): Delete.
10841 (vcmlaq_rot180): Delete.
10842 (vcmlaq_rot270): Delete.
10843 (vcmlaq_rot90): Delete.
10844 (vcmlaq_m): Delete.
10845 (vcmlaq_rot180_m): Delete.
10846 (vcmlaq_rot270_m): Delete.
10847 (vcmlaq_rot90_m): Delete.
10848 (vcmlaq_f16): Delete.
10849 (vcmlaq_rot180_f16): Delete.
10850 (vcmlaq_rot270_f16): Delete.
10851 (vcmlaq_rot90_f16): Delete.
10852 (vcmlaq_f32): Delete.
10853 (vcmlaq_rot180_f32): Delete.
10854 (vcmlaq_rot270_f32): Delete.
10855 (vcmlaq_rot90_f32): Delete.
10856 (vcmlaq_m_f32): Delete.
10857 (vcmlaq_m_f16): Delete.
10858 (vcmlaq_rot180_m_f32): Delete.
10859 (vcmlaq_rot180_m_f16): Delete.
10860 (vcmlaq_rot270_m_f32): Delete.
10861 (vcmlaq_rot270_m_f16): Delete.
10862 (vcmlaq_rot90_m_f32): Delete.
10863 (vcmlaq_rot90_m_f16): Delete.
10864 (__arm_vcmlaq_f16): Delete.
10865 (__arm_vcmlaq_rot180_f16): Delete.
10866 (__arm_vcmlaq_rot270_f16): Delete.
10867 (__arm_vcmlaq_rot90_f16): Delete.
10868 (__arm_vcmlaq_f32): Delete.
10869 (__arm_vcmlaq_rot180_f32): Delete.
10870 (__arm_vcmlaq_rot270_f32): Delete.
10871 (__arm_vcmlaq_rot90_f32): Delete.
10872 (__arm_vcmlaq_m_f32): Delete.
10873 (__arm_vcmlaq_m_f16): Delete.
10874 (__arm_vcmlaq_rot180_m_f32): Delete.
10875 (__arm_vcmlaq_rot180_m_f16): Delete.
10876 (__arm_vcmlaq_rot270_m_f32): Delete.
10877 (__arm_vcmlaq_rot270_m_f16): Delete.
10878 (__arm_vcmlaq_rot90_m_f32): Delete.
10879 (__arm_vcmlaq_rot90_m_f16): Delete.
10880 (__arm_vcmlaq): Delete.
10881 (__arm_vcmlaq_rot180): Delete.
10882 (__arm_vcmlaq_rot270): Delete.
10883 (__arm_vcmlaq_rot90): Delete.
10884 (__arm_vcmlaq_m): Delete.
10885 (__arm_vcmlaq_rot180_m): Delete.
10886 (__arm_vcmlaq_rot270_m): Delete.
10887 (__arm_vcmlaq_rot90_m): Delete.
10889 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10891 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
10892 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
10893 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
10894 (mve_insn): Add vcmla.
10895 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
10897 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
10899 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
10900 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
10901 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
10902 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
10904 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
10906 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10908 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
10909 (vcmulq_rot180, vcmulq_rot270): New.
10910 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
10911 (vcmulq_rot180, vcmulq_rot270): New.
10912 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
10913 (vcmulq_rot180, vcmulq_rot270): New.
10914 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
10915 (vcmulq_rot270): Delete.
10916 (vcmulq_rot180): Delete.
10918 (vcmulq_m): Delete.
10919 (vcmulq_rot180_m): Delete.
10920 (vcmulq_rot270_m): Delete.
10921 (vcmulq_rot90_m): Delete.
10922 (vcmulq_x): Delete.
10923 (vcmulq_rot90_x): Delete.
10924 (vcmulq_rot180_x): Delete.
10925 (vcmulq_rot270_x): Delete.
10926 (vcmulq_rot90_f16): Delete.
10927 (vcmulq_rot270_f16): Delete.
10928 (vcmulq_rot180_f16): Delete.
10929 (vcmulq_f16): Delete.
10930 (vcmulq_rot90_f32): Delete.
10931 (vcmulq_rot270_f32): Delete.
10932 (vcmulq_rot180_f32): Delete.
10933 (vcmulq_f32): Delete.
10934 (vcmulq_m_f32): Delete.
10935 (vcmulq_m_f16): Delete.
10936 (vcmulq_rot180_m_f32): Delete.
10937 (vcmulq_rot180_m_f16): Delete.
10938 (vcmulq_rot270_m_f32): Delete.
10939 (vcmulq_rot270_m_f16): Delete.
10940 (vcmulq_rot90_m_f32): Delete.
10941 (vcmulq_rot90_m_f16): Delete.
10942 (vcmulq_x_f16): Delete.
10943 (vcmulq_x_f32): Delete.
10944 (vcmulq_rot90_x_f16): Delete.
10945 (vcmulq_rot90_x_f32): Delete.
10946 (vcmulq_rot180_x_f16): Delete.
10947 (vcmulq_rot180_x_f32): Delete.
10948 (vcmulq_rot270_x_f16): Delete.
10949 (vcmulq_rot270_x_f32): Delete.
10950 (__arm_vcmulq_rot90_f16): Delete.
10951 (__arm_vcmulq_rot270_f16): Delete.
10952 (__arm_vcmulq_rot180_f16): Delete.
10953 (__arm_vcmulq_f16): Delete.
10954 (__arm_vcmulq_rot90_f32): Delete.
10955 (__arm_vcmulq_rot270_f32): Delete.
10956 (__arm_vcmulq_rot180_f32): Delete.
10957 (__arm_vcmulq_f32): Delete.
10958 (__arm_vcmulq_m_f32): Delete.
10959 (__arm_vcmulq_m_f16): Delete.
10960 (__arm_vcmulq_rot180_m_f32): Delete.
10961 (__arm_vcmulq_rot180_m_f16): Delete.
10962 (__arm_vcmulq_rot270_m_f32): Delete.
10963 (__arm_vcmulq_rot270_m_f16): Delete.
10964 (__arm_vcmulq_rot90_m_f32): Delete.
10965 (__arm_vcmulq_rot90_m_f16): Delete.
10966 (__arm_vcmulq_x_f16): Delete.
10967 (__arm_vcmulq_x_f32): Delete.
10968 (__arm_vcmulq_rot90_x_f16): Delete.
10969 (__arm_vcmulq_rot90_x_f32): Delete.
10970 (__arm_vcmulq_rot180_x_f16): Delete.
10971 (__arm_vcmulq_rot180_x_f32): Delete.
10972 (__arm_vcmulq_rot270_x_f16): Delete.
10973 (__arm_vcmulq_rot270_x_f32): Delete.
10974 (__arm_vcmulq_rot90): Delete.
10975 (__arm_vcmulq_rot270): Delete.
10976 (__arm_vcmulq_rot180): Delete.
10977 (__arm_vcmulq): Delete.
10978 (__arm_vcmulq_m): Delete.
10979 (__arm_vcmulq_rot180_m): Delete.
10980 (__arm_vcmulq_rot270_m): Delete.
10981 (__arm_vcmulq_rot90_m): Delete.
10982 (__arm_vcmulq_x): Delete.
10983 (__arm_vcmulq_rot90_x): Delete.
10984 (__arm_vcmulq_rot180_x): Delete.
10985 (__arm_vcmulq_rot270_x): Delete.
10987 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10989 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
10990 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
10991 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
10992 (MVE_VCADDQ_VCMULQ_M): New.
10993 (mve_insn): Add vcmul.
10994 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
10997 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
10999 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
11000 @mve_<mve_insn>q<mve_rot>_f<mode>.
11001 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
11002 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
11003 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
11005 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
11007 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
11008 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
11009 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
11010 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
11011 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
11012 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
11013 * config/arm/arm-mve-builtins-functions.h (class
11014 unspec_mve_function_exact_insn_rot): New.
11015 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
11016 (vcaddq_rot270): Delete.
11017 (vhcaddq_rot90): Delete.
11018 (vhcaddq_rot270): Delete.
11019 (vcaddq_rot270_m): Delete.
11020 (vcaddq_rot90_m): Delete.
11021 (vhcaddq_rot270_m): Delete.
11022 (vhcaddq_rot90_m): Delete.
11023 (vcaddq_rot90_x): Delete.
11024 (vcaddq_rot270_x): Delete.
11025 (vhcaddq_rot90_x): Delete.
11026 (vhcaddq_rot270_x): Delete.
11027 (vcaddq_rot90_u8): Delete.
11028 (vcaddq_rot270_u8): Delete.
11029 (vhcaddq_rot90_s8): Delete.
11030 (vhcaddq_rot270_s8): Delete.
11031 (vcaddq_rot90_s8): Delete.
11032 (vcaddq_rot270_s8): Delete.
11033 (vcaddq_rot90_u16): Delete.
11034 (vcaddq_rot270_u16): Delete.
11035 (vhcaddq_rot90_s16): Delete.
11036 (vhcaddq_rot270_s16): Delete.
11037 (vcaddq_rot90_s16): Delete.
11038 (vcaddq_rot270_s16): Delete.
11039 (vcaddq_rot90_u32): Delete.
11040 (vcaddq_rot270_u32): Delete.
11041 (vhcaddq_rot90_s32): Delete.
11042 (vhcaddq_rot270_s32): Delete.
11043 (vcaddq_rot90_s32): Delete.
11044 (vcaddq_rot270_s32): Delete.
11045 (vcaddq_rot90_f16): Delete.
11046 (vcaddq_rot270_f16): Delete.
11047 (vcaddq_rot90_f32): Delete.
11048 (vcaddq_rot270_f32): Delete.
11049 (vcaddq_rot270_m_s8): Delete.
11050 (vcaddq_rot270_m_s32): Delete.
11051 (vcaddq_rot270_m_s16): Delete.
11052 (vcaddq_rot270_m_u8): Delete.
11053 (vcaddq_rot270_m_u32): Delete.
11054 (vcaddq_rot270_m_u16): Delete.
11055 (vcaddq_rot90_m_s8): Delete.
11056 (vcaddq_rot90_m_s32): Delete.
11057 (vcaddq_rot90_m_s16): Delete.
11058 (vcaddq_rot90_m_u8): Delete.
11059 (vcaddq_rot90_m_u32): Delete.
11060 (vcaddq_rot90_m_u16): Delete.
11061 (vhcaddq_rot270_m_s8): Delete.
11062 (vhcaddq_rot270_m_s32): Delete.
11063 (vhcaddq_rot270_m_s16): Delete.
11064 (vhcaddq_rot90_m_s8): Delete.
11065 (vhcaddq_rot90_m_s32): Delete.
11066 (vhcaddq_rot90_m_s16): Delete.
11067 (vcaddq_rot270_m_f32): Delete.
11068 (vcaddq_rot270_m_f16): Delete.
11069 (vcaddq_rot90_m_f32): Delete.
11070 (vcaddq_rot90_m_f16): Delete.
11071 (vcaddq_rot90_x_s8): Delete.
11072 (vcaddq_rot90_x_s16): Delete.
11073 (vcaddq_rot90_x_s32): Delete.
11074 (vcaddq_rot90_x_u8): Delete.
11075 (vcaddq_rot90_x_u16): Delete.
11076 (vcaddq_rot90_x_u32): Delete.
11077 (vcaddq_rot270_x_s8): Delete.
11078 (vcaddq_rot270_x_s16): Delete.
11079 (vcaddq_rot270_x_s32): Delete.
11080 (vcaddq_rot270_x_u8): Delete.
11081 (vcaddq_rot270_x_u16): Delete.
11082 (vcaddq_rot270_x_u32): Delete.
11083 (vhcaddq_rot90_x_s8): Delete.
11084 (vhcaddq_rot90_x_s16): Delete.
11085 (vhcaddq_rot90_x_s32): Delete.
11086 (vhcaddq_rot270_x_s8): Delete.
11087 (vhcaddq_rot270_x_s16): Delete.
11088 (vhcaddq_rot270_x_s32): Delete.
11089 (vcaddq_rot90_x_f16): Delete.
11090 (vcaddq_rot90_x_f32): Delete.
11091 (vcaddq_rot270_x_f16): Delete.
11092 (vcaddq_rot270_x_f32): Delete.
11093 (__arm_vcaddq_rot90_u8): Delete.
11094 (__arm_vcaddq_rot270_u8): Delete.
11095 (__arm_vhcaddq_rot90_s8): Delete.
11096 (__arm_vhcaddq_rot270_s8): Delete.
11097 (__arm_vcaddq_rot90_s8): Delete.
11098 (__arm_vcaddq_rot270_s8): Delete.
11099 (__arm_vcaddq_rot90_u16): Delete.
11100 (__arm_vcaddq_rot270_u16): Delete.
11101 (__arm_vhcaddq_rot90_s16): Delete.
11102 (__arm_vhcaddq_rot270_s16): Delete.
11103 (__arm_vcaddq_rot90_s16): Delete.
11104 (__arm_vcaddq_rot270_s16): Delete.
11105 (__arm_vcaddq_rot90_u32): Delete.
11106 (__arm_vcaddq_rot270_u32): Delete.
11107 (__arm_vhcaddq_rot90_s32): Delete.
11108 (__arm_vhcaddq_rot270_s32): Delete.
11109 (__arm_vcaddq_rot90_s32): Delete.
11110 (__arm_vcaddq_rot270_s32): Delete.
11111 (__arm_vcaddq_rot270_m_s8): Delete.
11112 (__arm_vcaddq_rot270_m_s32): Delete.
11113 (__arm_vcaddq_rot270_m_s16): Delete.
11114 (__arm_vcaddq_rot270_m_u8): Delete.
11115 (__arm_vcaddq_rot270_m_u32): Delete.
11116 (__arm_vcaddq_rot270_m_u16): Delete.
11117 (__arm_vcaddq_rot90_m_s8): Delete.
11118 (__arm_vcaddq_rot90_m_s32): Delete.
11119 (__arm_vcaddq_rot90_m_s16): Delete.
11120 (__arm_vcaddq_rot90_m_u8): Delete.
11121 (__arm_vcaddq_rot90_m_u32): Delete.
11122 (__arm_vcaddq_rot90_m_u16): Delete.
11123 (__arm_vhcaddq_rot270_m_s8): Delete.
11124 (__arm_vhcaddq_rot270_m_s32): Delete.
11125 (__arm_vhcaddq_rot270_m_s16): Delete.
11126 (__arm_vhcaddq_rot90_m_s8): Delete.
11127 (__arm_vhcaddq_rot90_m_s32): Delete.
11128 (__arm_vhcaddq_rot90_m_s16): Delete.
11129 (__arm_vcaddq_rot90_x_s8): Delete.
11130 (__arm_vcaddq_rot90_x_s16): Delete.
11131 (__arm_vcaddq_rot90_x_s32): Delete.
11132 (__arm_vcaddq_rot90_x_u8): Delete.
11133 (__arm_vcaddq_rot90_x_u16): Delete.
11134 (__arm_vcaddq_rot90_x_u32): Delete.
11135 (__arm_vcaddq_rot270_x_s8): Delete.
11136 (__arm_vcaddq_rot270_x_s16): Delete.
11137 (__arm_vcaddq_rot270_x_s32): Delete.
11138 (__arm_vcaddq_rot270_x_u8): Delete.
11139 (__arm_vcaddq_rot270_x_u16): Delete.
11140 (__arm_vcaddq_rot270_x_u32): Delete.
11141 (__arm_vhcaddq_rot90_x_s8): Delete.
11142 (__arm_vhcaddq_rot90_x_s16): Delete.
11143 (__arm_vhcaddq_rot90_x_s32): Delete.
11144 (__arm_vhcaddq_rot270_x_s8): Delete.
11145 (__arm_vhcaddq_rot270_x_s16): Delete.
11146 (__arm_vhcaddq_rot270_x_s32): Delete.
11147 (__arm_vcaddq_rot90_f16): Delete.
11148 (__arm_vcaddq_rot270_f16): Delete.
11149 (__arm_vcaddq_rot90_f32): Delete.
11150 (__arm_vcaddq_rot270_f32): Delete.
11151 (__arm_vcaddq_rot270_m_f32): Delete.
11152 (__arm_vcaddq_rot270_m_f16): Delete.
11153 (__arm_vcaddq_rot90_m_f32): Delete.
11154 (__arm_vcaddq_rot90_m_f16): Delete.
11155 (__arm_vcaddq_rot90_x_f16): Delete.
11156 (__arm_vcaddq_rot90_x_f32): Delete.
11157 (__arm_vcaddq_rot270_x_f16): Delete.
11158 (__arm_vcaddq_rot270_x_f32): Delete.
11159 (__arm_vcaddq_rot90): Delete.
11160 (__arm_vcaddq_rot270): Delete.
11161 (__arm_vhcaddq_rot90): Delete.
11162 (__arm_vhcaddq_rot270): Delete.
11163 (__arm_vcaddq_rot270_m): Delete.
11164 (__arm_vcaddq_rot90_m): Delete.
11165 (__arm_vhcaddq_rot270_m): Delete.
11166 (__arm_vhcaddq_rot90_m): Delete.
11167 (__arm_vcaddq_rot90_x): Delete.
11168 (__arm_vcaddq_rot270_x): Delete.
11169 (__arm_vhcaddq_rot90_x): Delete.
11170 (__arm_vhcaddq_rot270_x): Delete.
11172 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
11174 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
11175 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
11176 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
11177 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
11178 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
11179 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
11181 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
11182 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
11183 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
11184 VHCADDQ_ROT270_M_S.
11185 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
11186 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
11187 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
11188 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
11189 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
11190 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
11192 (VCADDQ_ROT270_M): Delete.
11193 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
11194 (VCADDQ_ROT90_M): Delete.
11195 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
11196 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
11198 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
11199 (mve_vcaddq<mve_rot><mode>): Rename into ...
11200 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
11201 (mve_vcaddq_rot270_m_<supf><mode>)
11202 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
11203 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
11204 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
11205 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
11207 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
11209 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
11212 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
11213 preparation statement over braces for a single statement.
11214 (*bt<mode>_setncqi): Likewise.
11215 (*bt<mode>_setncqi_2): New define_insn_and_split.
11217 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
11219 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
11220 case inserting of 64-bit values into a TImode register, to handle
11221 both DImode and DFmode using either *insvti_lowpart_1
11222 or *isnvti_highpart_1.
11224 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
11227 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
11228 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
11229 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
11230 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
11231 when the original source contains a paradoxical subreg.
11233 2023-07-14 Jan Hubicka <jh@suse.cz>
11235 * passes.cc (execute_function_todo): Remove
11236 TODO_rebuild_frequencies
11237 * passes.def: Add rebuild_frequencies pass.
11238 * predict.cc (estimate_bb_frequencies): Drop
11240 (tree_estimate_probability): Update call of
11241 estimate_bb_frequencies.
11242 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
11243 first and do not rebuild if not necessary.
11244 (class pass_rebuild_frequencies): New.
11245 (make_pass_rebuild_frequencies): New.
11246 * profile-count.h: Add profile_count::very_large_p.
11247 * tree-inline.cc (optimize_inline_calls): Do not return
11248 TODO_rebuild_frequencies
11249 * tree-pass.h (TODO_rebuild_frequencies): Remove.
11250 (make_pass_rebuild_frequencies): Declare.
11252 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11254 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
11255 * config/riscv/riscv-protos.h (enum insn_type): New enum.
11256 (expand_cond_len_ternop): New function.
11257 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
11258 (expand_cond_len_ternop): Ditto.
11260 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
11263 * config/bpf/bpf.md: Enable instruction scheduling.
11265 2023-07-14 Tamar Christina <tamar.christina@arm.com>
11267 PR tree-optimization/109154
11268 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
11269 (struct bb_predicate): Add no_predicate_stmts.
11270 (set_bb_predicate): Increase predicate count.
11271 (set_bb_predicate_gimplified_stmts): Conditionally initialize
11272 no_predicate_stmts.
11273 (get_bb_num_predicate_stmts): New.
11274 (init_bb_predicate): Initialzie no_predicate_stmts.
11275 (release_bb_predicate): Cleanup no_predicate_stmts.
11276 (insert_gimplified_predicates): Preserve no_predicate_stmts.
11278 2023-07-14 Tamar Christina <tamar.christina@arm.com>
11280 PR tree-optimization/109154
11281 * tree-if-conv.cc (gen_simplified_condition,
11282 gen_phi_nest_statement): New.
11283 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
11285 2023-07-14 Richard Biener <rguenther@suse.de>
11287 * gimple.h (gimple_phi_arg): New const overload.
11288 (gimple_phi_arg_def): Make gimple arg const.
11289 (gimple_phi_arg_def_from_edge): New inline function.
11290 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
11292 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
11293 new inline function.
11294 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
11296 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
11298 * common/config/riscv/riscv-common.cc:
11299 (riscv_implied_info): Add zihintntl item.
11300 (riscv_ext_version_table): Ditto.
11301 (riscv_ext_flag_table): Ditto.
11302 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
11303 (TARGET_ZIHINTNTL): Ditto.
11305 2023-07-14 Die Li <lidie@eswincomputing.com>
11307 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
11309 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
11312 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
11313 used by the address of the following memory operand.
11315 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
11318 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
11319 deallocate alloca-only frame.
11321 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
11324 * config/darwin.h (DARWIN_PLATFORM_ID): New.
11325 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
11326 and SDK data to the static linker.
11328 2023-07-13 Carl Love <cel@us.ibm.com>
11330 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
11331 built-in definition return type.
11332 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
11333 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
11334 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
11335 argument to return FPSCR fields.
11336 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
11337 the return value. Add description for
11338 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
11340 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
11343 * config/alpha/alpha.cc (alpha_emit_set_long_const):
11344 Always use DImode when constructing long const.
11346 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
11348 * haifa-sched.cc: Change TRUE/FALSE to true/false.
11350 * lra-assigns.cc: Ditto.
11351 * lra-constraints.cc: Ditto.
11352 * sel-sched.cc: Ditto.
11354 2023-07-13 Andrew Pinski <apinski@marvell.com>
11356 PR tree-optimization/110293
11357 PR tree-optimization/110539
11358 * match.pd: Expand the `x != (typeof x)(x == 0)`
11359 pattern to handle where the inner and outer comparsions
11360 are either `!=` or `==` and handle other constants
11363 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
11365 PR middle-end/109520
11366 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
11367 (lra_asm_insn_error): New prototype.
11368 * lra.cc: Include rtl_error.h.
11369 (lra_set_insn_recog_data): Initialize asm_reloads_num.
11370 (lra_asm_insn_error): New func whose code is taken from ...
11371 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
11372 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
11374 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11376 * genmatch.cc (commutative_op): Add COND_LEN_*
11377 * internal-fn.cc (first_commutative_argument): Ditto.
11379 (get_unconditional_internal_fn): Ditto.
11380 (can_interpret_as_conditional_op_p): Ditto.
11381 (internal_fn_len_index): Ditto.
11382 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
11383 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
11384 (convert_mult_to_fma): Ditto.
11385 (math_opts_dom_walker::after_dom_children): Ditto.
11387 2023-07-13 Pan Li <pan2.li@intel.com>
11389 * config/riscv/riscv.cc (vxrm_rtx): New static var.
11391 (global_state_unknown_p): Removed.
11392 (riscv_entity_mode_after): Removed.
11393 (asm_insn_p): New function.
11394 (vxrm_unknown_p): New function for fixed-point.
11395 (riscv_vxrm_mode_after): Ditto.
11396 (frm_unknown_dynamic_p): New function for floating-point.
11397 (riscv_frm_mode_after): Ditto.
11398 (riscv_mode_after): Leverage new functions.
11400 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11402 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
11403 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
11404 calling vect_model_load_cost.
11406 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11408 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
11409 handle memory_access_type VMAT_CONTIGUOUS, remove some
11410 VMAT_CONTIGUOUS_PERMUTE related handlings.
11411 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
11412 without calling vect_model_load_cost.
11414 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11416 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
11417 VMAT_CONTIGUOUS_REVERSE any more.
11418 (vectorizable_load): Adjust the costing handling on
11419 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
11421 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11423 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
11424 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
11425 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
11426 assert it will never get VMAT_LOAD_STORE_LANES.
11428 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11430 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
11431 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
11432 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
11433 remove VMAT_GATHER_SCATTER related handlings and the related parameter
11436 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11438 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
11439 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
11440 vect_model_load_cost.
11441 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
11442 VMAT_STRIDED_SLP any more, and remove their related handlings.
11444 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11446 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
11447 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
11448 hoisting decision and without calling vect_model_load_cost.
11449 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
11450 and remove VMAT_INVARIANT related handlings.
11452 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11454 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
11455 on costing with one extra argument cost_vec.
11456 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
11457 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
11458 gs_info.decl set any more.
11460 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11462 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
11463 to vect_model_load_cost down to some different transform paths
11464 according to the handlings of different vect_memory_access_types.
11466 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
11468 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
11470 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11472 * config/riscv/autovec.md
11473 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
11474 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
11475 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
11476 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
11477 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
11478 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
11479 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
11480 (len_mask_gather_load<mode><mode>): Ditto.
11481 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
11482 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
11483 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
11484 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
11485 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
11486 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
11487 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
11488 (len_mask_scatter_store<mode><mode>): Ditto.
11489 * config/riscv/predicates.md (const_1_operand): New predicate.
11490 (vector_gs_scale_operand_16): Ditto.
11491 (vector_gs_scale_operand_32): Ditto.
11492 (vector_gs_scale_operand_64): Ditto.
11493 (vector_gs_extension_operand): Ditto.
11494 (vector_gs_scale_operand_16_rv32): Ditto.
11495 (vector_gs_scale_operand_32_rv32): Ditto.
11496 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
11497 (expand_gather_scatter): New function.
11498 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
11499 (emit_vlmax_masked_store_insn): New function.
11500 (emit_nonvlmax_masked_store_insn): Ditto.
11501 (modulo_sel_indices): Ditto.
11502 (expand_vec_perm): Fix SLP for gather/scatter.
11503 (prepare_gather_scatter): New function.
11504 (expand_gather_scatter): Ditto.
11505 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
11506 (subreg:SI (DI CONST_POLY_INT)).
11507 * config/riscv/vector-iterators.md: Add gather/scatter.
11508 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
11509 (@vec_duplicate<mode>): Ditto.
11510 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
11512 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
11514 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11516 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
11517 * config/riscv/riscv-protos.h (enum insn_type): New enum.
11518 (expand_cond_len_binop): New function.
11519 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
11520 (emit_nonvlmax_fp_tu_insn): Ditto.
11521 (need_fp_rounding_p): Ditto.
11522 (expand_cond_len_binop): Ditto.
11523 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
11524 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
11526 2023-07-12 Jan Hubicka <jh@suse.cz>
11528 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
11529 (gimple_duplicate_seme_region): ... this; break out profile updating
11531 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
11532 (ch_base::copy_headers): Update.
11533 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
11534 (gimple_duplicate_seme_region): ... this.
11536 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
11538 PR tree-optimization/107043
11539 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
11541 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
11543 PR tree-optimization/107053
11544 * gimple-range-op.cc (cfn_popcount): Use known set bits.
11546 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
11548 * ira.cc (equiv_init_varies_p): Change return type from int to bool
11549 and adjust function body accordingly.
11550 (equiv_init_movable_p): Ditto.
11551 (memref_used_between_p): Ditto.
11552 * lra-constraints.cc (valid_address_p): Ditto.
11554 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
11556 * range-op.cc (irange_to_masked_value): Remove.
11557 (update_known_bitmask): Update irange value/mask pair instead of
11558 only updating nonzero bits.
11560 2023-07-12 Jan Hubicka <jh@suse.cz>
11562 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
11563 parameter and rewrite profile updating code to handle edges elimination.
11564 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
11565 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
11566 (loop_iv_derived_p): New function.
11567 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
11568 of PHIs and propagation of IV derived variables.
11569 (ch_base::copy_headers): Pass around the invariant edges hash set.
11571 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
11573 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
11574 (last_active_insn): Change "skip_use_p" function argument to bool.
11575 (noce_operand_ok): Change return type from int to bool.
11576 (find_cond_trap): Ditto.
11577 (block_jumps_and_fallthru_p): Change "fallthru_p" and
11578 "jump_p" variables to bool.
11579 (noce_find_if_block): Change return type from int to bool.
11580 (cond_exec_find_if_block): Ditto.
11581 (find_if_case_1): Ditto.
11582 (find_if_case_2): Ditto.
11583 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
11584 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
11585 (cond_exec_process_insns): Change return type from int to bool.
11586 Change "mod_ok" function arg to bool.
11587 (cond_exec_process_if_block): Change return type from int to bool.
11588 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
11590 (noce_emit_store_flag): Change return type from int to bool.
11591 Change "reversep" function arg to bool. Change "cond_complex"
11593 (noce_try_move): Change return type from int to bool.
11594 (noce_try_ifelse_collapse): Ditto.
11595 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
11596 (noce_try_addcc): Change return type from int to bool. Change
11597 "subtract" variable to bool.
11598 (noce_try_store_flag_constants): Change return type from int to bool.
11599 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
11600 (noce_try_cmove): Change return type from int to bool.
11601 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
11602 (noce_try_minmax): Change return type from int to bool. Change
11603 "unsignedp" variable to bool.
11604 (noce_try_abs): Change return type from int to bool. Change
11605 "negate" variable to bool.
11606 (noce_try_sign_mask): Change return type from int to bool.
11607 (noce_try_move): Ditto.
11608 (noce_try_store_flag_constants): Ditto.
11609 (noce_try_cmove): Ditto.
11610 (noce_try_cmove_arith): Ditto.
11611 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
11612 (noce_try_bitop): Change return type from int to bool.
11613 (noce_operand_ok): Ditto.
11614 (noce_convert_multiple_sets): Ditto.
11615 (noce_convert_multiple_sets_1): Ditto.
11616 (noce_process_if_block): Ditto.
11617 (check_cond_move_block): Ditto.
11618 (cond_move_process_if_block): Ditto. Change "success_p"
11620 (rest_of_handle_if_conversion): Change return type to void.
11622 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11624 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
11626 (get_conditional_len_internal_fn): New function.
11627 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
11628 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
11631 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
11634 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
11636 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
11639 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
11640 define_insn_and_split derived from *add<dwi>3_doubleword_concat
11641 and *add<dwi>3_doubleword_zext.
11643 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
11646 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
11647 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
11648 (peephole2): Simplify rega = 0; rega op= rega cases.
11650 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
11652 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
11653 testing a TImode SUBREG of a 128-bit vector register against
11654 zero, use a PTEST instruction instead of first moving it to
11655 a pair of scalar registers.
11657 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
11659 * genopinit.cc (main): Adjust maximal number of optabs and
11661 * gensupport.cc (find_optab): Shift optab by 20 and mode by
11663 * optabs-query.h (optab_handler): Ditto.
11664 (convert_optab_handler): Ditto.
11666 2023-07-12 Richard Biener <rguenther@suse.de>
11668 PR tree-optimization/110630
11669 * tree-vect-slp.cc (vect_add_slp_permutation): New
11670 offset parameter, honor that for the extract code generation.
11671 (vectorizable_slp_permutation_1): Handle offsetted identities.
11673 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11675 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
11676 (umul<mode>3_highpart): Ditto.
11678 2023-07-12 Jan Beulich <jbeulich@suse.com>
11680 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
11681 alternative. Adjust original last alternative's "prefix"
11682 attribute to maybe_evex.
11684 2023-07-12 Jan Beulich <jbeulich@suse.com>
11686 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
11687 vbroadcastss for AVX2. New AVX512F alternative.
11688 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
11689 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
11691 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11693 * config/riscv/peephole.md: Remove XThead* peephole passes.
11694 * config/riscv/thead.md: Include thead-peephole.md.
11695 * config/riscv/thead-peephole.md: New file.
11697 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11699 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
11701 (riscv_index_reg_class): Likewise.
11702 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
11703 (riscv_index_reg_class): New function.
11704 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
11705 riscv_index_reg_class().
11706 (REGNO_OK_FOR_INDEX_P): Call new function
11707 riscv_regno_ok_for_index_p().
11709 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11711 * config/riscv/riscv-protos.h (enum riscv_address_type):
11712 New location of type definition.
11713 (struct riscv_address_info): Likewise.
11714 * config/riscv/riscv.cc (enum riscv_address_type):
11715 Old location of type definition.
11716 (struct riscv_address_info): Likewise.
11718 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11720 * config/riscv/riscv.h (Xmode): New macro.
11722 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11724 * config/riscv/riscv.cc (riscv_print_operand_address): Use
11725 output_addr_const rather than riscv_print_operand.
11727 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11729 * config/riscv/thead.md: Adjust constraints of th_addsl.
11731 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11733 * config/riscv/thead.cc (th_mempair_operands_p):
11734 Fix documentation of th_mempair_order_operands().
11736 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11738 * config/riscv/thead.cc (th_mempair_save_regs):
11739 Emit REG_FRAME_RELATED_EXPR notes in prologue.
11741 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11743 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
11744 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
11745 New XThead extension INSN.
11746 (*zero_extendsidi2_th_extu): New XThead extension INSN.
11747 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
11749 2023-07-12 liuhongt <hongtao.liu@intel.com>
11753 * config/i386/predicates.md
11754 (int_float_vector_all_ones_operand): New predicate.
11755 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
11757 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
11759 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
11761 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
11762 define_insn_and_split to avoid false dependence.
11763 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
11764 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
11765 of operands 1 to '0' to avoid false dependence.
11766 (*andnot<mode>3): Ditto.
11767 (iornot<mode>3): Ditto.
11768 (*<nlogic><mode>3): Ditto.
11770 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
11772 * common/config/i386/cpuinfo.h
11773 (get_intel_cpu): Handle Granite Rapids D.
11774 * common/config/i386/i386-common.cc:
11775 (processor_alias_table): Add graniterapids-d.
11776 * common/config/i386/i386-cpuinfo.h
11777 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
11778 * config.gcc: Add -march=graniterapids-d.
11779 * config/i386/driver-i386.cc (host_detect_local_cpu):
11780 Handle graniterapids-d.
11781 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
11782 * doc/extend.texi: Add graniterapids-d.
11783 * doc/invoke.texi: Ditto.
11785 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
11787 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
11788 Add OPTION_MASK_ISA_AVX512VL.
11789 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
11792 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11794 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
11795 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
11796 (shuffle_compress_patterns): Ditto.
11797 (expand_vec_perm_const_1): Ditto.
11799 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
11801 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
11802 * cfghooks.h (struct cfg_hooks): Change return type of
11803 verify_flow_info from integer to bool.
11804 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
11805 (can_delete_label_p): Ditto.
11806 (rtl_verify_flow_info): Change return type from int to bool
11807 and adjust function body accordingly. Change "err" variable to bool.
11808 (rtl_verify_flow_info_1): Ditto.
11809 (free_bb_for_insn): Change return type to void.
11810 (rtl_merge_blocks): Change "b_empty" variable to bool.
11811 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
11812 (verify_hot_cold_block_grouping): Change return type from int to bool.
11813 Change "err" variable to bool.
11814 (rtl_verify_edges): Ditto.
11815 (rtl_verify_bb_insns): Ditto.
11816 (rtl_verify_bb_pointers): Ditto.
11817 (rtl_verify_bb_insn_chain): Ditto.
11818 (rtl_verify_fallthru): Ditto.
11819 (rtl_verify_bb_layout): Ditto.
11820 (purge_all_dead_edges): Change "purged" variable to bool.
11821 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
11822 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
11823 (load_killed_in_block_p): Change return type from int to bool
11824 and adjust function body accordingly.
11825 (oprs_unchanged_p): Return true/false.
11826 (rest_of_handle_gcse2): Change return type to void.
11827 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
11828 int to bool. Change "err" variable to bool.
11830 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
11832 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
11834 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11836 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
11837 * internal-fn.cc (cond_len_unary_direct): Ditto.
11838 (cond_len_binary_direct): Ditto.
11839 (cond_len_ternary_direct): Ditto.
11840 (expand_cond_len_unary_optab_fn): Ditto.
11841 (expand_cond_len_binary_optab_fn): Ditto.
11842 (expand_cond_len_ternary_optab_fn): Ditto.
11843 (direct_cond_len_unary_optab_supported_p): Ditto.
11844 (direct_cond_len_binary_optab_supported_p): Ditto.
11845 (direct_cond_len_ternary_optab_supported_p): Ditto.
11846 * internal-fn.def (COND_LEN_ADD): Ditto.
11847 (COND_LEN_SUB): Ditto.
11848 (COND_LEN_MUL): Ditto.
11849 (COND_LEN_DIV): Ditto.
11850 (COND_LEN_MOD): Ditto.
11851 (COND_LEN_RDIV): Ditto.
11852 (COND_LEN_MIN): Ditto.
11853 (COND_LEN_MAX): Ditto.
11854 (COND_LEN_FMIN): Ditto.
11855 (COND_LEN_FMAX): Ditto.
11856 (COND_LEN_AND): Ditto.
11857 (COND_LEN_IOR): Ditto.
11858 (COND_LEN_XOR): Ditto.
11859 (COND_LEN_SHL): Ditto.
11860 (COND_LEN_SHR): Ditto.
11861 (COND_LEN_FMA): Ditto.
11862 (COND_LEN_FMS): Ditto.
11863 (COND_LEN_FNMA): Ditto.
11864 (COND_LEN_FNMS): Ditto.
11865 (COND_LEN_NEG): Ditto.
11866 * optabs.def (OPTAB_D): Ditto.
11868 2023-07-11 Richard Biener <rguenther@suse.de>
11870 PR tree-optimization/110614
11871 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
11872 SLP splats are not suitable for re-align ops.
11874 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
11876 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
11878 (vsx_quad_dform_memory_operand): Likewise.
11880 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
11882 * reorg.cc (stop_search_p): Change return type from int to bool
11883 and adjust function body accordingly.
11884 (resource_conflicts_p): Ditto.
11885 (insn_references_resource_p): Change return type from int to bool.
11886 (insn_sets_resource_p): Ditto.
11887 (redirect_with_delay_slots_safe_p): Ditto.
11888 (condition_dominates_p): Change return type from int to bool
11889 and adjust function body accordingly.
11890 (redirect_with_delay_list_safe_p): Ditto.
11891 (check_annul_list_true_false): Ditto. Change "annul_true_p"
11892 function argument to bool.
11893 (steal_delay_list_from_target): Change "pannul_p" function
11894 argument to bool pointer. Change "must_annul" and "used_annul"
11895 variables from int to bool.
11896 (steal_delay_list_from_fallthrough): Ditto.
11897 (own_thread_p): Change return type from int to bool and adjust
11898 function body accordingly. Change "allow_fallthrough" function
11900 (reorg_redirect_jump): Change return type from int to bool.
11901 (fill_simple_delay_slots): Change "non_jumps_p" function
11902 argument from int to bool. Change "maybe_never" varible to bool.
11903 (fill_slots_from_thread): Change "likely", "thread_if_true" and
11904 "own_thread" function arguments to bool. Change "lose" and
11905 "must_annul" variables to bool.
11906 (delete_from_delay_slot): Change "had_barrier" variable to bool.
11907 (try_merge_delay_insns): Change "annul_p" variable to bool.
11908 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
11910 (rest_of_handle_delay_slots): Change return type from int to void
11911 and adjust function body accordingly.
11913 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
11915 * doc/extend.texi (RISC-V Operand Modifiers): New.
11917 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11919 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
11920 (insert_insn_end_basic_block): Ditto.
11921 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
11922 * gcse.cc (insert_insn_end_basic_block): Export as global function.
11923 * gcse.h (insert_insn_end_basic_block): Ditto.
11925 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
11928 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
11929 (arm_builtin_decl): Hahndle MVE builtins.
11930 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
11931 (add_unique_function): Fix handling of
11932 __ARM_MVE_PRESERVE_USER_NAMESPACE.
11933 (add_overloaded_function): Likewise.
11934 * config/arm/arm-protos.h (builtin_decl): New declaration.
11936 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
11938 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
11940 2023-07-10 Xi Ruoyao <xry111@xry111.site>
11942 PR tree-optimization/110557
11943 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
11944 Ensure the output sign-extended if necessary.
11946 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
11948 * config/i386/i386.md (peephole2): Transform xchg insn with a
11949 REG_UNUSED note to a (simple) move.
11950 (*insvti_lowpart_1): New define_insn_and_split.
11951 (*insvdi_lowpart_1): Likewise.
11953 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
11955 * config/i386/i386-features.cc (compute_convert_gain): Tweak
11956 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
11957 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
11958 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
11960 2023-07-10 liuhongt <hongtao.liu@intel.com>
11963 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
11964 splitter to detect fp max pattern.
11965 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
11967 2023-07-09 Jan Hubicka <jh@suse.cz>
11969 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
11970 (dump_edge_info): Likewise.
11971 (dump_bb_info): Likewise.
11972 * profile-count.cc (profile_count::dump): Add comma between quality and
11975 2023-07-08 Jan Hubicka <jh@suse.cz>
11977 PR tree-optimization/110600
11978 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
11980 2023-07-08 Jan Hubicka <jh@suse.cz>
11982 PR middle-end/110590
11983 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
11984 inner loops and be more careful about inconsistent profiles.
11985 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
11986 exit is followed by other exit.
11988 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
11990 * cprop.cc (reg_available_p): Change return type from int to bool.
11991 (reg_not_set_p): Ditto.
11992 (try_replace_reg): Ditto. Change "success" variable to bool.
11993 (cprop_jump): Change return type from int to void
11994 and adjust function body accordingly.
11995 (constprop_register): Ditto.
11996 (cprop_insn): Ditto. Change "changed" variable to bool.
11997 (local_cprop_pass): Change return type from int to void
11998 and adjust function body accordingly.
11999 (bypass_block): Ditto. Change "change", "may_be_loop_header"
12000 and "removed_p" variables to bool.
12001 (bypass_conditional_jumps): Change return type from int to void
12002 and adjust function body accordingly. Change "changed"
12004 (one_cprop_pass): Ditto.
12006 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
12008 * gcse.cc (expr_equiv_p): Change return type from int to bool.
12009 (oprs_unchanged_p): Change return type from int to void
12010 and adjust function body accordingly.
12011 (oprs_anticipatable_p): Ditto.
12012 (oprs_available_p): Ditto.
12013 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
12014 arguments to bool. Change "found" variable to bool.
12015 (load_killed_in_block_p): Change return type from int to void and
12016 adjust function body accordingly. Change "avail_p" argument to bool.
12017 (pre_expr_reaches_here_p): Change return type from int to void
12018 and adjust function body accordingly.
12019 (pre_delete): Ditto. Change "changed" variable to bool.
12020 (pre_gcse): Change return type from int to void
12021 and adjust function body accordingly. Change "did_insert" and
12022 "changed" variables to bool.
12023 (one_pre_gcse_pass): Change return type from int to void
12024 and adjust function body accordingly. Change "changed" variable
12026 (should_hoist_expr_to_dom): Change return type from int to void
12027 and adjust function body accordingly. Change
12028 "visited_allocated_locally" variable to bool.
12029 (hoist_code): Change return type from int to void and adjust
12030 function body accordingly. Change "changed" variable to bool.
12031 (one_code_hoisting_pass): Ditto.
12032 (pre_edge_insert): Change return type from int to void and adjust
12033 function body accordingly. Change "did_insert" variable to bool.
12034 (pre_expr_reaches_here_p_work): Change return type from int to void
12035 and adjust function body accordingly.
12036 (simple_mem): Ditto.
12037 (want_to_gcse_p): Change return type from int to void
12038 and adjust function body accordingly.
12039 (can_assign_to_reg_without_clobbers_p): Update function body
12040 for bool return type.
12041 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
12042 (pre_insert_copies): Change "added_copy" variable to bool.
12044 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
12048 * doc/invoke.texi (Warning Options): Fix typos.
12050 2023-07-07 Jan Hubicka <jh@suse.cz>
12052 * profile-count.cc (profile_count::dump): Add FUN
12053 parameter; print relative frequency.
12054 (profile_count::debug): Update.
12055 * profile-count.h (profile_count::dump): Update
12058 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
12062 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
12063 TImode destinations from paradoxical SUBREGs (setting the lowpart)
12064 into explicit zero extensions. Use *insvti_highpart_1 instruction
12065 to set the highpart of a TImode destination.
12067 2023-07-07 Jan Hubicka <jh@suse.cz>
12069 * predict.cc (force_edge_cold): Use
12070 set_edge_probability_and_rescale_others; improve dumps.
12072 2023-07-07 Jan Hubicka <jh@suse.cz>
12074 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
12076 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
12079 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
12081 * config/s390/s390.cc (vec_init): Fix default case
12083 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
12085 * lra-assigns.cc (assign_by_spills): Add reload insns involving
12086 reload pseudos with non-refined class to be processed on the next
12088 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
12089 (in_class_p): Use it.
12090 (print_curr_insn_alt): New func.
12091 (process_alt_operands): Use it. Improve debug info.
12092 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
12093 pseudo class if it is not refined yet.
12095 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
12097 * value-range.cc (irange::get_bitmask_from_range): Return all the
12098 known bits for a singleton.
12099 (irange::set_range_from_bitmask): Set a range of a singleton when
12100 all bits are known.
12102 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
12104 * value-range.cc (irange::intersect): Leave normalization to
12107 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
12109 * data-streamer-in.cc (streamer_read_value_range): Adjust for
12111 * data-streamer-out.cc (streamer_write_vrange): Same.
12112 * range-op.cc (operator_cast::fold_range): Same.
12113 * value-range-pretty-print.cc
12114 (vrange_printer::print_irange_bitmasks): Same.
12115 * value-range-storage.cc (irange_storage::write_lengths_address):
12117 (irange_storage::set_irange): Same.
12118 (irange_storage::get_irange): Same.
12119 (irange_storage::size): Same.
12120 (irange_storage::dump): Same.
12121 * value-range-storage.h: Same.
12122 * value-range.cc (debug): New.
12123 (irange_bitmask::dump): New.
12124 (add_vrange): Adjust for value/mask.
12125 (irange::operator=): Same.
12126 (irange::set): Same.
12127 (irange::verify_range): Same.
12128 (irange::operator==): Same.
12129 (irange::contains_p): Same.
12130 (irange::irange_single_pair_union): Same.
12131 (irange::union_): Same.
12132 (irange::intersect): Same.
12133 (irange::invert): Same.
12134 (irange::get_nonzero_bits_from_range): Rename to...
12135 (irange::get_bitmask_from_range): ...this.
12136 (irange::set_range_from_nonzero_bits): Rename to...
12137 (irange::set_range_from_bitmask): ...this.
12138 (irange::set_nonzero_bits): Rename to...
12139 (irange::update_bitmask): ...this.
12140 (irange::get_nonzero_bits): Rename to...
12141 (irange::get_bitmask): ...this.
12142 (irange::intersect_nonzero_bits): Rename to...
12143 (irange::intersect_bitmask): ...this.
12144 (irange::union_nonzero_bits): Rename to...
12145 (irange::union_bitmask): ...this.
12146 (irange_bitmask::verify_mask): New.
12147 * value-range.h (class irange_bitmask): New.
12148 (irange_bitmask::set_unknown): New.
12149 (irange_bitmask::unknown_p): New.
12150 (irange_bitmask::irange_bitmask): New.
12151 (irange_bitmask::get_precision): New.
12152 (irange_bitmask::get_nonzero_bits): New.
12153 (irange_bitmask::set_nonzero_bits): New.
12154 (irange_bitmask::operator==): New.
12155 (irange_bitmask::union_): New.
12156 (irange_bitmask::intersect): New.
12157 (class irange): Friend vrange_printer.
12158 (irange::varying_compatible_p): Adjust for bitmask.
12159 (irange::set_varying): Same.
12160 (irange::set_nonzero): Same.
12162 2023-07-07 Jan Beulich <jbeulich@suse.com>
12164 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
12166 2023-07-07 Jan Beulich <jbeulich@suse.com>
12168 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
12169 alternative. Switch new last alternative's "isa" attribute to
12171 (vec_extract_hi_v32qi): Likewise.
12173 2023-07-07 Pan Li <pan2.li@intel.com>
12174 Robin Dapp <rdapp@ventanamicro.com>
12176 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
12178 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
12179 (riscv_mode_exit): Likewise for exit mode.
12180 (riscv_mode_needed): Likewise for needed mode.
12181 (riscv_mode_after): Likewise for after mode.
12183 2023-07-07 Pan Li <pan2.li@intel.com>
12185 * config/riscv/vector.md: Fix typo.
12187 2023-07-06 Jan Hubicka <jh@suse.cz>
12189 PR middle-end/25623
12190 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
12191 of iterations determined.
12192 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
12194 2023-07-06 Jan Hubicka <jh@suse.cz>
12196 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
12197 probability update to be safe on loops with subloops.
12198 Make bound parameter to be iteration bound.
12199 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
12200 of scale_loop_profile.
12201 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
12203 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
12205 PR tree-optimization/110449
12206 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
12207 vec_loop for the unrolled loop.
12209 2023-07-06 Jan Hubicka <jh@suse.cz>
12211 * cfg.cc (set_edge_probability_and_rescale_others): New function.
12212 (update_bb_profile_for_threading): Use it; simplify the rest.
12213 * cfg.h (set_edge_probability_and_rescale_others): Declare.
12214 * profile-count.h (profile_probability::apply_scale): New.
12216 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
12218 * doc/extend.texi (ARC Built-in Functions): Update documentation
12219 with missing builtins.
12221 2023-07-06 Richard Biener <rguenther@suse.de>
12223 PR tree-optimization/110556
12224 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
12225 assign code and all operands of non-stores.
12227 2023-07-06 Richard Biener <rguenther@suse.de>
12229 PR tree-optimization/110563
12230 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
12231 Remove second argument.
12232 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
12233 Remove for_epilogue_p argument. Merge assert ...
12234 (vect_analyze_loop_2): ... with check done before determining
12235 partial vectors by moving it after.
12236 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
12238 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12240 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
12241 few things re 'reorder' option and strings.
12242 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
12244 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12246 * gengtype-parse.cc: Clean up obsolete parametrized structs
12248 * gengtype.cc: Likewise.
12249 * gengtype.h: Likewise.
12251 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12253 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
12256 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12258 * gengtype-parse.cc (token_names): Add '"user"'.
12259 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
12260 'FIRST_TOKEN_WITH_VALUE'.
12262 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12264 * doc/gty.texi (GTY Options) <string_length>: Enhance.
12266 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12268 * gengtype.cc (write_root, write_roots): Explicitly reject
12269 'string_length' option.
12270 * doc/gty.texi (GTY Options) <string_length>: Document.
12272 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
12274 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
12275 (ggc_pch_write_object): Remove 'bool is_string' argument.
12276 * ggc-common.cc: Adjust.
12277 * ggc-page.cc: Likewise.
12279 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
12281 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
12283 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
12285 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
12286 and add description for inling of function with arch and tune
12289 2023-07-06 Richard Biener <rguenther@suse.de>
12291 PR tree-optimization/110515
12292 * tree-ssa-pre.cc (compute_avail): Make code dealing
12293 with hoisting loads with different alias-sets more
12296 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12298 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
12300 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
12302 * config/i386/i386.cc (ix86_can_inline_p): If callee has
12303 default arch=x86-64 and tune=generic, do not block the
12304 inlining to its caller. Also allow callee with different
12305 arch= to be inlined if it has always_inline attribute and
12306 it's ISA is subset of caller's.
12308 2023-07-06 liuhongt <hongtao.liu@intel.com>
12310 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
12311 DF/SFmode AND/IOR/XOR/ANDN operations.
12313 2023-07-06 Andrew Pinski <apinski@marvell.com>
12315 PR middle-end/110554
12316 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
12317 just build using boolean_type_node instead of the cond_type.
12318 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
12319 that will feed into the COND_EXPR.
12321 2023-07-06 liuhongt <hongtao.liu@intel.com>
12324 * config/i386/i386.md (movdf_internal): Disparage slightly for
12325 2 alternatives (r,v) and (v,r) by adding constraint modifier
12328 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
12331 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
12332 initialization of new_addr.
12334 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
12336 PR tree-optimization/110474
12337 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
12338 unroll factor while selecting the epilog vect loop VF.
12340 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12342 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
12345 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12347 * gimple-range-gori.cc (compute_operand_range): After calling
12348 compute_operand2_range, recursively call self if needed.
12349 (compute_operand2_range): Turn into a leaf function.
12350 (gori_compute::compute_operand1_and_operand2_range): Finish
12351 operand2 calculation.
12352 * gimple-range-gori.h (compute_operand2_range): Remove name param.
12354 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12356 * gimple-range-gori.cc (compute_operand_range): After calling
12357 compute_operand1_range, recursively call self if needed.
12358 (compute_operand1_range): Turn into a leaf function.
12359 (gori_compute::compute_operand1_and_operand2_range): Finish
12360 operand1 calculation.
12361 * gimple-range-gori.h (compute_operand1_range): Remove name param.
12363 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12365 * gimple-range-gori.cc (compute_operand_range): Check for
12366 operand interdependence when both op1 and op2 are computed.
12367 (compute_operand1_and_operand2_range): No checks required now.
12369 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
12371 * gimple-range-gori.cc (compute_operand_range): Check for
12372 a relation between op1 and op2 and use that instead.
12373 (compute_operand1_range): Don't look for a relation override.
12374 (compute_operand2_range): Ditto.
12376 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
12378 * doc/contrib.texi (Contributors): Update my entry.
12380 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
12382 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
12385 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
12387 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
12388 scehdule_more_p and contributes_to_priority indirect frunction
12389 type from int to bool.
12390 (no_real_insns_p): Change return type from int to bool.
12391 (contributes_to_priority): Ditto.
12392 * haifa-sched.cc (no_real_insns_p): Change return type from
12393 int to bool and adjust function body accordingly.
12394 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
12395 variable type from int to bool.
12396 (ps_insn_advance_column): Change return type from int to bool.
12397 (ps_has_conflicts): Ditto. Change "has_conflicts"
12398 variable type from int to bool.
12399 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
12400 (conditions_mutex_p): Ditto.
12401 * sched-ebb.cc (schedule_more_p): Ditto.
12402 (ebb_contributes_to_priority): Change return type from
12403 int to bool and adjust function body accordingly.
12404 * sched-rgn.cc (is_cfg_nonregular): Ditto.
12405 (check_live_1): Ditto.
12407 (find_conditional_protection): Ditto.
12408 (is_conditionally_protected): Ditto.
12409 (is_prisky): Ditto.
12410 (is_exception_free): Ditto.
12411 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
12412 variables from int to bool.
12413 (extend_rgns): Change "rescan" variable from int to bool.
12414 (check_live): Change return type from
12415 int to bool and adjust function body accordingly.
12416 (can_schedule_ready_p): Ditto.
12417 (schedule_more_p): Ditto.
12418 (contributes_to_priority): Ditto.
12420 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12422 * doc/md.texi: Document that vec_set and vec_extract must not
12424 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
12425 (gimple_expand_vec_set_extract_expr): ...to this.
12426 (gimple_expand_vec_exprs): Call renamed function.
12427 * internal-fn.cc (vec_extract_direct): Add.
12428 (expand_vec_extract_optab_fn): New function to expand
12430 (direct_vec_extract_optab_supported_p): Add.
12431 * internal-fn.def (VEC_EXTRACT): Add.
12432 * optabs.cc (can_vec_extract_var_idx_p): New function.
12433 * optabs.h (can_vec_extract_var_idx_p): Declare.
12435 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12437 * config/riscv/autovec.md: Add gen_lowpart.
12439 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12441 * config/riscv/autovec.md: Allow register index operand.
12443 2023-07-05 Pan Li <pan2.li@intel.com>
12445 * config/riscv/riscv-vector-builtins.cc
12446 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
12448 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12450 * config/riscv/autovec.md: Use float_truncate.
12452 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12454 * internal-fn.cc (internal_fn_len_index): Apply
12455 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
12456 (internal_fn_mask_index): Ditto.
12457 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
12458 (supports_vec_scatter_store_p): Ditto.
12459 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
12460 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
12461 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
12462 (vect_get_strided_load_store_ops): Ditto.
12463 (vectorizable_store): Ditto.
12464 (vectorizable_load): Ditto.
12466 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
12467 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12469 * simplify-rtx.cc (native_encode_rtx): Ditto.
12470 (native_decode_vector_rtx): Ditto.
12471 (simplify_const_vector_byte_offset): Ditto.
12472 (simplify_const_vector_subreg): Ditto.
12473 * tree.cc (build_truth_vector_type_for_mode): Ditto.
12474 * varasm.cc (output_constant_pool_2): Ditto.
12476 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
12478 * config/mips/mips.cc (mips_expand_block_move): don't expand for
12479 r6 with -mno-unaligned-access option if one or both of src and
12480 dest are unaligned. restruct: return directly if length is not const.
12481 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
12483 2023-07-05 Jan Beulich <jbeulich@suse.com>
12486 * config/i386/sse.md: New splitters to simplify
12487 not;vec_duplicate as a singular vpternlog.
12488 (one_cmpl<mode>2): Allow broadcast for operand 1.
12489 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
12491 2023-07-05 Jan Beulich <jbeulich@suse.com>
12494 * config/i386/sse.md: New splitters to simplify
12495 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
12497 2023-07-05 Jan Beulich <jbeulich@suse.com>
12500 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
12501 form of splitter for PR target/100711.
12503 2023-07-05 Richard Biener <rguenther@suse.de>
12505 PR middle-end/110541
12506 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
12509 2023-07-05 Jan Beulich <jbeulich@suse.com>
12512 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
12513 for memory form operand 1.
12515 2023-07-05 Jan Beulich <jbeulich@suse.com>
12518 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
12519 bitwise vector operations.
12520 * config/i386/sse.md (*iornot<mode>3): New insn.
12521 (*xnor<mode>3): Likewise.
12522 (*<nlogic><mode>3): Likewise.
12523 (andor): New code iterator.
12524 (nlogic): New code attribute.
12525 (ternlog_nlogic): Likewise.
12527 2023-07-05 Richard Biener <rguenther@suse.de>
12529 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
12531 2023-07-05 yulong <shiyulong@iscas.ac.cn>
12533 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
12535 2023-07-05 yulong <shiyulong@iscas.ac.cn>
12537 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
12538 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
12539 (ADJUST_ALIGNMENT): Ditto.
12540 (RVV_TUPLE_PARTIAL_MODES): Ditto.
12541 (ADJUST_NUNITS): Ditto.
12542 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
12544 (vfloat16mf4x3_t): Ditto.
12545 (vfloat16mf4x4_t): Ditto.
12546 (vfloat16mf4x5_t): Ditto.
12547 (vfloat16mf4x6_t): Ditto.
12548 (vfloat16mf4x7_t): Ditto.
12549 (vfloat16mf4x8_t): Ditto.
12550 (vfloat16mf2x2_t): Ditto.
12551 (vfloat16mf2x3_t): Ditto.
12552 (vfloat16mf2x4_t): Ditto.
12553 (vfloat16mf2x5_t): Ditto.
12554 (vfloat16mf2x6_t): Ditto.
12555 (vfloat16mf2x7_t): Ditto.
12556 (vfloat16mf2x8_t): Ditto.
12557 (vfloat16m1x2_t): Ditto.
12558 (vfloat16m1x3_t): Ditto.
12559 (vfloat16m1x4_t): Ditto.
12560 (vfloat16m1x5_t): Ditto.
12561 (vfloat16m1x6_t): Ditto.
12562 (vfloat16m1x7_t): Ditto.
12563 (vfloat16m1x8_t): Ditto.
12564 (vfloat16m2x2_t): Ditto.
12565 (vfloat16m2x3_t): Ditto.
12566 (vfloat16m2x4_t): Ditto.
12567 (vfloat16m4x2_t): Ditto.
12568 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
12569 (vfloat16mf4x3_t): Ditto.
12570 (vfloat16mf4x4_t): Ditto.
12571 (vfloat16mf4x5_t): Ditto.
12572 (vfloat16mf4x6_t): Ditto.
12573 (vfloat16mf4x7_t): Ditto.
12574 (vfloat16mf4x8_t): Ditto.
12575 (vfloat16mf2x2_t): Ditto.
12576 (vfloat16mf2x3_t): Ditto.
12577 (vfloat16mf2x4_t): Ditto.
12578 (vfloat16mf2x5_t): Ditto.
12579 (vfloat16mf2x6_t): Ditto.
12580 (vfloat16mf2x7_t): Ditto.
12581 (vfloat16mf2x8_t): Ditto.
12582 (vfloat16m1x2_t): Ditto.
12583 (vfloat16m1x3_t): Ditto.
12584 (vfloat16m1x4_t): Ditto.
12585 (vfloat16m1x5_t): Ditto.
12586 (vfloat16m1x6_t): Ditto.
12587 (vfloat16m1x7_t): Ditto.
12588 (vfloat16m1x8_t): Ditto.
12589 (vfloat16m2x2_t): Ditto.
12590 (vfloat16m2x3_t): Ditto.
12591 (vfloat16m2x4_t): Ditto.
12592 (vfloat16m4x2_t): Ditto.
12593 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
12594 * config/riscv/riscv.md: New.
12595 * config/riscv/vector-iterators.md: New.
12597 2023-07-04 Andrew Pinski <apinski@marvell.com>
12599 PR tree-optimization/110487
12600 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
12601 build a nonstandard integer and use that.
12603 2023-07-04 Andrew Pinski <apinski@marvell.com>
12605 * match.pd (a?-1:0): Cast type an integer type
12606 rather the type before the negative.
12607 (a?0:-1): Likewise.
12609 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12611 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
12612 Change to use HARD_REG_BIT and its macros.
12613 * config/xtensa/xtensa.md
12614 (peephole2: regmove elimination during DFmode input reload):
12617 2023-07-04 Richard Biener <rguenther@suse.de>
12619 PR tree-optimization/110491
12620 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
12621 whether the PHI args are possibly undefined before folding
12624 2023-07-04 Pan Li <pan2.li@intel.com>
12625 Thomas Schwinge <thomas@codesourcery.com>
12627 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
12628 bits for machine mode table.
12629 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
12630 HOST machine mode bits.
12631 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
12632 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
12634 * tree-streamer.h (streamer_mode_table): Ditto.
12635 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
12636 as the packing limit.
12637 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
12639 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
12641 * lto-streamer.h (class lto_input_block): Capture
12642 'lto_file_decl_data *file_data' instead of just
12643 'unsigned char *mode_table'.
12644 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
12645 * ipa-fnsummary.cc (inline_read_section): Likewise.
12646 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
12647 * ipa-modref.cc (read_section): Likewise.
12648 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
12650 * ipa-sra.cc (isra_read_summary_section): Likewise.
12651 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
12652 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
12653 * lto-streamer-in.cc (lto_read_body_or_constructor)
12654 (lto_input_toplevel_asms): Likewise.
12655 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
12657 2023-07-04 Richard Biener <rguenther@suse.de>
12659 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
12660 (empty_bb_or_one_feeding_into_p): Check for them.
12661 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
12662 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
12664 2023-07-04 Richard Biener <rguenther@suse.de>
12666 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
12667 check guarding scalar_niter underflow.
12669 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
12671 PR tree-optimization/110531
12672 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
12673 slp_done_for_suggested_uf to false.
12675 2023-07-04 Richard Biener <rguenther@suse.de>
12677 PR tree-optimization/110228
12678 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
12679 Mark SSA may-undefs.
12680 (bb_no_side_effects_p): Check stmt uses for undefs.
12682 2023-07-04 Richard Biener <rguenther@suse.de>
12684 PR tree-optimization/110436
12685 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
12686 force live but not relevant pattern stmts relevant.
12688 2023-07-04 Lili Cui <lili.cui@intel.com>
12690 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
12691 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
12693 2023-07-04 Richard Biener <rguenther@suse.de>
12695 PR middle-end/110495
12696 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
12697 since we do not set TREE_OVERFLOW on those since the
12698 introduction of VL vectors.
12699 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
12700 at TREE_OVERFLOW to determine validity of association.
12702 2023-07-04 Richard Biener <rguenther@suse.de>
12704 PR tree-optimization/110310
12705 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
12706 Move costing part ...
12707 (vect_analyze_loop_costing): ... here. Integrate better
12708 estimate for epilogues from ...
12709 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
12710 with actual epilogue status.
12711 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
12712 avoid cancelling epilogue vectorization.
12713 (vect_update_epilogue_niters): Remove. No longer update
12714 epilogue LOOP_VINFO_NITERS.
12716 2023-07-04 Pan Li <pan2.li@intel.com>
12719 2023-07-03 Pan Li <pan2.li@intel.com>
12721 * config/riscv/vector.md: Fix typo.
12723 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12725 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
12726 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
12727 (expand_gather_load_optab_fn): Ditto.
12728 (internal_load_fn_p): Ditto.
12729 (internal_store_fn_p): Ditto.
12730 (internal_gather_scatter_fn_p): Ditto.
12731 (internal_fn_len_index): Ditto.
12732 (internal_fn_mask_index): Ditto.
12733 (internal_fn_stored_value_index): Ditto.
12734 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
12735 (LEN_MASK_SCATTER_STORE): Ditto.
12736 * optabs.def (OPTAB_CD): Ditto.
12738 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12740 * config/riscv/riscv-vsetvl.cc
12741 (vector_insn_info::parse_insn): Add early break.
12743 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
12745 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
12746 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
12748 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
12750 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
12752 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
12754 * common/config/riscv/riscv-common.cc: Add support for zvbb,
12755 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
12756 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
12757 * config/riscv/arch-canonicalize: Add canonicalization info for
12758 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
12759 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
12760 (MASK_ZVBC): Likewise.
12761 (TARGET_ZVBB): Likewise.
12762 (TARGET_ZVBC): Likewise.
12763 (MASK_ZVKG): Likewise.
12764 (MASK_ZVKNED): Likewise.
12765 (MASK_ZVKNHA): Likewise.
12766 (MASK_ZVKNHB): Likewise.
12767 (MASK_ZVKSED): Likewise.
12768 (MASK_ZVKSH): Likewise.
12769 (MASK_ZVKN): Likewise.
12770 (MASK_ZVKNC): Likewise.
12771 (MASK_ZVKNG): Likewise.
12772 (MASK_ZVKS): Likewise.
12773 (MASK_ZVKSC): Likewise.
12774 (MASK_ZVKSG): Likewise.
12775 (MASK_ZVKT): Likewise.
12776 (TARGET_ZVKG): Likewise.
12777 (TARGET_ZVKNED): Likewise.
12778 (TARGET_ZVKNHA): Likewise.
12779 (TARGET_ZVKNHB): Likewise.
12780 (TARGET_ZVKSED): Likewise.
12781 (TARGET_ZVKSH): Likewise.
12782 (TARGET_ZVKN): Likewise.
12783 (TARGET_ZVKNC): Likewise.
12784 (TARGET_ZVKNG): Likewise.
12785 (TARGET_ZVKS): Likewise.
12786 (TARGET_ZVKSC): Likewise.
12787 (TARGET_ZVKSG): Likewise.
12788 (TARGET_ZVKT): Likewise.
12789 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
12791 2023-07-03 Andrew Pinski <apinski@marvell.com>
12793 PR middle-end/110510
12794 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
12796 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
12798 * config/darwin.h: Avoid duplicate multiply_defined specs on
12799 earlier Darwin versions with shared libgcc.
12801 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
12803 * tree.h (tree_int_cst_equal): Change return type from int to bool.
12804 (operand_equal_for_phi_arg_p): Ditto.
12805 (tree_map_base_marked_p): Ditto.
12806 * tree.cc (contains_placeholder_p): Update function body
12807 for bool return type.
12808 (type_cache_hasher::equal): Ditto.
12809 (tree_map_base_hash): Change return type
12810 from int to void and adjust function body accordingly.
12811 (tree_int_cst_equal): Ditto.
12812 (operand_equal_for_phi_arg_p): Ditto.
12813 (get_narrower): Change "first" variable to bool.
12814 (cl_option_hasher::equal): Update function body for bool return type.
12815 * ggc.h (ggc_set_mark): Change return type from int to bool.
12816 (ggc_marked_p): Ditto.
12817 * ggc-page.cc (gt_ggc_mx): Change return type
12818 from int to void and adjust function body accordingly.
12819 (ggc_set_mark): Ditto.
12821 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12823 * config/riscv/autovec.md: Change order of
12824 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12825 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
12826 * doc/md.texi: Ditto.
12827 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
12828 * internal-fn.cc (len_maskload_direct): Ditto.
12829 (len_maskstore_direct): Ditto.
12830 (add_len_and_mask_args): New function.
12831 (expand_partial_load_optab_fn): Change order of
12832 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12833 (expand_partial_store_optab_fn): Ditto.
12834 (internal_fn_len_index): New function.
12835 (internal_fn_mask_index): Change order of
12836 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12837 (internal_fn_stored_value_index): Ditto.
12838 (internal_len_load_store_bias): Ditto.
12839 * internal-fn.h (internal_fn_len_index): New function.
12840 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
12841 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12842 * tree-vect-stmts.cc (vectorizable_store): Ditto.
12843 (vectorizable_load): Ditto.
12845 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
12848 * doc/gm2.texi (Semantic checking): Include examples using
12849 -Wuninit-variable-checking.
12851 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12853 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
12854 (*single_widen_fnma<mode>): Ditto.
12855 (*double_widen_fms<mode>): Ditto.
12856 (*single_widen_fms<mode>): Ditto.
12857 (*double_widen_fnms<mode>): Ditto.
12858 (*single_widen_fnms<mode>): Ditto.
12860 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12862 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
12863 into "*" in pattern name which simplifies build files.
12864 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
12865 (*pred_single_widen_mul<mode>): New pattern.
12867 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
12869 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
12870 the index to be 0 or 1.
12872 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
12875 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12877 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
12878 (*single_widen_fnma<mode>): Ditto.
12879 (*double_widen_fms<mode>): Ditto.
12880 (*single_widen_fms<mode>): Ditto.
12881 (*double_widen_fnms<mode>): Ditto.
12882 (*single_widen_fnms<mode>): Ditto.
12884 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12886 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
12887 (*single_widen_fnma<mode>): Ditto.
12888 (*double_widen_fms<mode>): Ditto.
12889 (*single_widen_fms<mode>): Ditto.
12890 (*double_widen_fnms<mode>): Ditto.
12891 (*single_widen_fnms<mode>): Ditto.
12893 2023-07-03 Pan Li <pan2.li@intel.com>
12895 * config/riscv/vector.md: Fix typo.
12897 2023-07-03 Richard Biener <rguenther@suse.de>
12899 PR tree-optimization/110506
12900 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
12901 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
12903 2023-07-03 Richard Biener <rguenther@suse.de>
12905 PR tree-optimization/110506
12906 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
12907 type before relying on TYPE_PRECISION to produce a nonzero mask.
12909 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12911 * config/mips/mips.md(*and<mode>3_mips16): Generates
12912 ZEB/ZEH instructions.
12914 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12916 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
12917 address register to M16_REGS for MIPS16.
12918 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
12919 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
12920 (AVAIL_NON_MIPS16 (cache..)): Update to
12921 AVAIL_MIPS16E2_OR_NON_MIPS16.
12922 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
12923 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
12925 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12927 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
12928 for ISA_HAS_MIPS16E2.
12929 (ISA_HAS_SYNC): Same as above.
12930 (ISA_HAS_LL_SC): Same as above.
12932 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12934 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
12935 Add logics for generating instruction.
12936 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
12937 * config/mips/mips.md(mov_<load>l): Generates instructions.
12938 (mov_<load>r): Same as above.
12939 (mov_<store>l): Adjusted for the conditions above.
12940 (mov_<store>r): Same as above.
12941 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
12942 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
12944 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12946 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
12947 (mips_const_insns): Same as above.
12948 (mips_output_move): Same as above.
12949 (mips_output_function_prologue): Same as above.
12950 * config/mips/mips.md: Same as above
12952 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12954 * config/mips/constraints.md(Yz): New constraints for mips16e2.
12955 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
12956 (mips_bit_clear_info): Same as above.
12957 * config/mips/mips.cc(mips_bit_clear_info): New function for
12958 generating instructions.
12959 (mips_bit_clear_p): Same as above.
12960 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
12961 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
12962 (*and<mode>3): Generates INS instruction.
12963 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
12964 (ior<mode>3): Add logics for ORI instruction.
12965 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
12966 (*ior<mode>3_mips16): Add logics for XORI instruction.
12967 (*xor<mode>3_mips16): Generates XORI instrucion.
12968 (*extzv<mode>): Add logics for EXT instruction.
12969 (*insv<mode>): Add logics for INS instruction.
12970 * config/mips/predicates.md(bit_clear_operand): New predicate for
12971 generating bitwise instructions.
12972 (and_reg_operand): Add logics for generating bitwise instructions.
12974 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12976 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
12977 that uses global pointer register.
12978 (mips16_unextended_reference_p): Same as above.
12979 (mips_pic_base_register): Same as above.
12980 (mips_init_relocs): Same as above.
12981 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
12982 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
12983 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
12984 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
12986 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12988 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
12989 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
12990 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
12991 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
12992 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
12993 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
12995 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12997 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
12999 * config/mips/mips.h(__mips_mips16e2): Defined a new
13001 (ISA_HAS_MIPS16E2): Defined a new macro.
13002 (ASM_SPEC): Pass mmips16e2 to the assembler.
13003 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
13004 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
13005 * doc/invoke.texi: Add -m(no-)mips16e2 option..
13007 2023-07-02 Jakub Jelinek <jakub@redhat.com>
13009 PR tree-optimization/110508
13010 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
13011 REALPART_EXPR opf nlhs if re2 is non-NULL.
13013 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13015 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
13017 * config/xtensa/xtensa.md (*xtensa_clamps):
13018 Add TARGET_MINMAX to the condition.
13020 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13022 * config/xtensa/xtensa.md (*eqne_INT_MIN):
13023 Add missing ":SI" to the match_operator.
13025 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
13028 * config/darwin.opt: Add fconstant-cfstrings alias to
13029 mconstant-cfstrings.
13030 * doc/invoke.texi: Amend invocation descriptions to reflect
13031 that the fconstant-cfstrings is a target-option alias and to
13032 add the missing mconstant-cfstrings option description to the
13035 2023-07-01 Jan Hubicka <jh@suse.cz>
13037 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
13038 parmaeter; update profile.
13039 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
13040 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
13041 (static_loop_exit): ... this; return the edge to be elliminated.
13042 (ch_base::copy_headers): Handle profile updating for eliminated exits.
13044 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
13046 * config/i386/i386-features.cc (compute_convert_gain): Provide
13047 gains/costs for ROTATE and ROTATERT (by an integer constant).
13048 (general_scalar_chain::convert_rotate): New helper function to
13049 convert a DImode or SImode rotation by an integer constant into
13051 (general_scalar_chain::convert_insn): Call the new convert_rotate
13052 for ROTATE and ROTATERT.
13053 (general_scalar_to_vector_candidate_p): Consider ROTATE and
13054 ROTATERT to be candidates if the second operand is an integer
13055 constant, valid for a rotation (or shift) in the given mode.
13056 * config/i386/i386-features.h (general_scalar_chain): Add new
13057 helper method convert_rotate.
13059 2023-07-01 Jan Hubicka <jh@suse.cz>
13061 PR tree-optimization/103680
13062 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
13063 make message clearer.
13065 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
13067 PR tree-optimization/101832
13068 * tree-object-size.cc (addr_object_size): Handle structure/union type
13069 when it has flexible size.
13071 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
13073 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
13074 (fold_nonarray_ctor_reference): Likewise. Specifically deal
13075 with integral bit-fields.
13076 (fold_ctor_reference): Make sure that the constructor uses the
13077 native storage order.
13079 2023-06-30 Jan Hubicka <jh@suse.cz>
13081 PR middle-end/109849
13082 * predict.cc (estimate_bb_frequencies): Turn to static function.
13083 (expr_expected_value_1): Fix handling of binary expressions with
13085 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
13086 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
13088 * predict.h (estimate_bb_frequencies): No longer declare it.
13090 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
13092 * fold-const.h (multiple_of_p): Change return type from int to bool.
13093 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
13094 neg_conp_p and neg_var_p variables to bool.
13095 (const_binop): Change sat_p variable to bool.
13096 (merge_ranges): Change no_overlap variable to bool.
13097 (extract_muldiv_1): Change same_p variable to bool.
13098 (tree_swap_operands_p): Update function body for bool return type.
13099 (fold_truth_andor): Change commutative variable to bool.
13100 (multiple_of_p): Change return type
13101 from int to void and adjust function body accordingly.
13102 * optabs.h (expand_twoval_unop): Change return type from int to bool.
13103 (expand_twoval_binop): Ditto.
13104 (can_compare_p): Ditto.
13105 (have_add2_insn): Ditto.
13106 (have_addptr3_insn): Ditto.
13107 (have_sub2_insn): Ditto.
13108 (have_insn_for): Ditto.
13109 * optabs.cc (add_equal_note): Ditto.
13110 (widen_operand): Change no_extend argument from int to bool.
13111 (expand_binop): Ditto.
13112 (expand_twoval_unop): Change return type
13113 from int to void and adjust function body accordingly.
13114 (expand_twoval_binop): Ditto.
13115 (can_compare_p): Ditto.
13116 (have_add2_insn): Ditto.
13117 (have_addptr3_insn): Ditto.
13118 (have_sub2_insn): Ditto.
13119 (have_insn_for): Ditto.
13121 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
13123 * config/aarch64/aarch64-simd.md
13124 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
13125 Expansions for abd vec widen optabs.
13126 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
13127 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
13128 that give the appropriate extend RTL for the max RTL.
13130 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
13132 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
13133 * optabs.def (vec_widen_sabd_optab,
13134 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
13135 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
13136 vec_widen_uabd_optab,
13137 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
13138 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
13140 * doc/md.texi: Document them.
13141 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
13142 to build a VEC_WIDEN_ABD call if the input precision is smaller
13143 than the precision of the output.
13144 (vect_recog_widen_abd_pattern): Should an ABD expression be
13145 found preceeding an extension, replace the two with a
13148 2023-06-30 Pan Li <pan2.li@intel.com>
13150 * config/riscv/vector.md: Refactor the common condition.
13152 2023-06-30 Richard Biener <rguenther@suse.de>
13154 PR tree-optimization/110496
13155 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
13156 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
13158 2023-06-30 Richard Biener <rguenther@suse.de>
13160 PR middle-end/110489
13161 * statistics.cc (curr_statistics_hash): Add argument
13162 indicating whether we should allocate the hash.
13163 (statistics_fini_pass): If the hash isn't allocated
13164 only print the summary header.
13166 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
13167 Thomas Schwinge <thomas@codesourcery.com>
13169 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
13171 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
13174 * config/mips/mips.cc (mips_function_arg_alignment): Returns
13175 the alignment of function argument. In case of typedef type,
13176 it returns the aligment of the aliased type.
13177 (mips_function_arg_boundary): Relocated calculation of the
13178 aligment of function arguments.
13180 2023-06-29 Jan Hubicka <jh@suse.cz>
13182 PR tree-optimization/109849
13183 * ipa-fnsummary.cc (decompose_param_expr): Skip
13184 functions returning its parameter.
13185 (set_cond_stmt_execution_predicate): Return early
13186 if predicate was constructed.
13188 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
13191 * doc/extend.texi: Document GCC extension on a structure containing
13192 a flexible array member to be a member of another structure.
13194 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
13196 * print-tree.cc (print_node): Print new bit type_include_flexarray.
13197 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
13198 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
13199 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
13200 in bit no_named_args_stdarg_p properly for its corresponding type.
13201 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
13202 out bit no_named_args_stdarg_p properly for its corresponding type.
13203 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
13205 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
13207 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
13208 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
13209 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
13211 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
13213 * value-range.cc (frange::set): Do not call verify_range.
13214 (frange::normalize_kind): Verify range.
13215 (frange::union_nans): Do not call verify_range.
13216 (frange::union_): Same.
13217 (frange::intersect): Same.
13218 (irange::irange_single_pair_union): Call normalize_kind if
13220 (irange::union_): Same.
13221 (irange::intersect): Same.
13222 (irange::set_range_from_nonzero_bits): Verify range.
13223 (irange::set_nonzero_bits): Call normalize_kind if necessary.
13224 (irange::get_nonzero_bits): Tweak comment.
13225 (irange::intersect_nonzero_bits): Call normalize_kind if
13227 (irange::union_nonzero_bits): Same.
13228 * value-range.h (irange::normalize_kind): Verify range.
13230 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
13232 * cselib.h (rtx_equal_for_cselib_1):
13233 Change return type from int to bool.
13234 (references_value_p): Ditto.
13235 (rtx_equal_for_cselib_p): Ditto.
13236 * expr.h (can_store_by_pieces): Ditto.
13237 (try_casesi): Ditto.
13238 (try_tablejump): Ditto.
13239 (safe_from_p): Ditto.
13240 * sbitmap.h (bitmap_equal_p): Ditto.
13241 * cselib.cc (references_value_p): Change return type
13242 from int to void and adjust function body accordingly.
13243 (rtx_equal_for_cselib_1): Ditto.
13244 * expr.cc (is_aligning_offset): Ditto.
13245 (can_store_by_pieces): Ditto.
13246 (mostly_zeros_p): Ditto.
13247 (all_zeros_p): Ditto.
13248 (safe_from_p): Ditto.
13249 (is_aligning_offset): Ditto.
13250 (try_casesi): Ditto.
13251 (try_tablejump): Ditto.
13252 (store_constructor): Change "need_to_clear" and
13253 "const_bounds_p" variables to bool.
13254 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
13256 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
13258 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
13261 2023-06-29 Richard Biener <rguenther@suse.de>
13263 PR tree-optimization/110460
13264 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
13265 Only allow integral, pointer and scalar float type scalar_type.
13267 2023-06-29 Lili Cui <lili.cui@intel.com>
13269 PR tree-optimization/110148
13270 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
13271 ops in this function.
13273 2023-06-29 Richard Biener <rguenther@suse.de>
13275 PR middle-end/110452
13276 * expr.cc (store_constructor): Handle uniform boolean
13277 vectors with integer mode specially.
13279 2023-06-29 Richard Biener <rguenther@suse.de>
13281 PR middle-end/110461
13282 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
13285 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
13287 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
13288 (array_slice): Relax va_gc constructor to handle all vectors
13289 with a vl_embed layout.
13291 2023-06-29 Pan Li <pan2.li@intel.com>
13293 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
13294 (riscv_mode_needed): Likewise.
13295 (riscv_entity_mode_after): Likewise.
13296 (riscv_mode_after): Likewise.
13297 (riscv_mode_entry): Likewise.
13298 (riscv_mode_exit): Likewise.
13299 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
13301 * config/riscv/riscv.md: Add FRM register.
13302 * config/riscv/vector-iterators.md: Add FRM type.
13303 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
13304 (fsrm): Define new insn for fsrm instruction.
13306 2023-06-29 Pan Li <pan2.li@intel.com>
13308 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
13309 Add macro for static frm min and max.
13310 * config/riscv/riscv-vector-builtins-bases.cc
13311 (class binop_frm): New class for floating-point with frm.
13312 (BASE): Add vfadd for frm.
13313 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
13314 * config/riscv/riscv-vector-builtins-functions.def
13315 (vfadd_frm): Likewise.
13316 * config/riscv/riscv-vector-builtins-shapes.cc
13317 (struct alu_frm_def): New struct for alu with frm.
13318 (SHAPE): Add alu with frm.
13319 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
13320 * config/riscv/riscv-vector-builtins.cc
13321 (function_checker::report_out_of_range_and_not): New function
13322 for report out of range and not val.
13323 (function_checker::require_immediate_range_or): New function
13324 for checking in range or one val.
13325 * config/riscv/riscv-vector-builtins.h: Add function decl.
13327 2023-06-29 Cui, Lili <lili.cui@intel.com>
13329 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
13330 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
13332 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
13335 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
13336 to insn before validating it.
13338 2023-06-28 Jan Hubicka <jh@suse.cz>
13340 PR middle-end/110334
13341 * ipa-fnsummary.h (ipa_fn_summary): Add
13342 safe_to_inline_to_always_inline.
13343 * ipa-inline.cc (can_early_inline_edge_p): ICE
13344 if SSA is not built; do cycle checking for
13345 always_inline functions.
13346 (inline_always_inline_functions): Be recrusive;
13347 watch for cycles; do not updat overall summary.
13348 (early_inliner): Do not give up on always_inlines.
13349 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
13352 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
13354 * output.h (leaf_function_p): Change return type from int to bool.
13355 (final_forward_branch_p): Ditto.
13356 (only_leaf_regs_used): Ditto.
13357 (maybe_assemble_visibility): Ditto.
13358 * varasm.h (supports_one_only): Ditto.
13359 * rtl.h (compute_alignments): Change return type from int to void.
13360 * final.cc (app_on): Change return type from int to bool.
13361 (compute_alignments): Change return type from int to void
13362 and adjust function body accordingly.
13363 (shorten_branches): Change "something_changed" variable
13364 type from int to bool.
13365 (leaf_function_p): Change return type from int to bool
13366 and adjust function body accordingly.
13367 (final_forward_branch_p): Ditto.
13368 (only_leaf_regs_used): Ditto.
13369 * varasm.cc (contains_pointers_p): Change return type from
13370 int to bool and adjust function body accordingly.
13371 (compare_constant): Ditto.
13372 (maybe_assemble_visibility): Ditto.
13373 (supports_one_only): Ditto.
13375 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
13378 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
13379 (maybe_copy_reg_attrs): New function.
13380 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
13381 (copyprop_hardreg_forward_1): Ditto.
13383 2023-06-28 Richard Biener <rguenther@suse.de>
13385 PR tree-optimization/110434
13386 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
13387 VAR we replace with <retval>.
13389 2023-06-28 Richard Biener <rguenther@suse.de>
13391 PR tree-optimization/110451
13392 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
13393 tcc_comparison are expensive.
13395 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
13397 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
13398 for TImode comparisons on 32-bit architectures.
13399 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
13400 SWIM1248x to exclude/avoid TImode being conditional on -m64.
13401 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
13402 and/or with TARGET_SSE4_1.
13403 * config/i386/predicates.md (ix86_timode_comparison_operator):
13404 New predicate that depends upon TARGET_64BIT.
13405 (ix86_timode_comparison_operand): Likewise.
13407 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
13410 * config/i386/i386-features.cc (compute_convert_gain): Provide
13411 more accurate gains for conversion of scalar comparisons to
13414 2023-06-28 Richard Biener <rguenther@suse.de>
13416 PR tree-optimization/110443
13417 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
13420 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
13422 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
13423 (peephole2 for move_and_compare): New.
13424 (mode_iterator WORD): New. Set the mode to SI/DImode by
13426 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
13427 (split pattern for compare_and_move): Likewise.
13429 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13431 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
13432 (*single_widen_fma<mode>): Ditto.
13434 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
13437 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
13439 (altivec_vupkhs<VU_char>_direct): ...this.
13440 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
13441 predicate to test if a constant can be loaded with vspltisw and
13443 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
13444 a vector constant can be synthesized with a vspltisw and a vupkhsw.
13445 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
13447 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
13448 function to return true if OP mode is V2DI and can be synthesized
13449 with vupkhsw and vspltisw.
13450 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
13451 constants with vspltisw and vupkhsw.
13453 2023-06-28 Jan Hubicka <jh@suse.cz>
13455 PR tree-optimization/110377
13456 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
13458 (ipa_analyze_node): Enable ranger.
13460 2023-06-28 Richard Biener <rguenther@suse.de>
13462 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
13463 (TYPE_PRECISION_RAW): Provide raw access to the precision
13465 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
13466 (gimple_canonical_types_compatible_p): Likewise.
13467 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
13468 Stream TYPE_PRECISION_RAW.
13469 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
13471 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
13473 2023-06-28 Alexandre Oliva <oliva@adacore.com>
13475 * doc/extend.texi (zero-call-used-regs): Document leafy and
13477 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
13478 LEAFY and variants.
13479 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
13480 functions in leafy mode.
13481 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
13483 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13485 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
13486 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
13488 (@pred_single_widen_add<mode>): New pattern.
13489 (@pred_single_widen_sub<mode>): New pattern.
13491 2023-06-28 liuhongt <hongtao.liu@intel.com>
13493 * config/i386/i386.cc (ix86_invalid_conversion): New function.
13494 (TARGET_INVALID_CONVERSION): Define as
13495 ix86_invalid_conversion.
13497 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13499 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
13501 (<float_cvt><vnconvert><mode>2): Ditto.
13502 (<optab><mode><vnconvert>2): Ditto.
13503 (<float_cvt><mode><vnconvert>2): Ditto.
13504 * config/riscv/vector-iterators.md: Add vnconvert.
13506 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13508 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
13510 (extend<v_quad_trunc><mode>2): Ditto.
13511 (trunc<mode><v_double_trunc>2): Ditto.
13512 (trunc<mode><v_quad_trunc>2): Ditto.
13513 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
13514 V_QUAD_TRUNC and v_quad_trunc.
13516 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13518 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
13521 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13523 * config/riscv/autovec.md (copysign<mode>3): Add expander.
13524 (xorsign<mode>3): Ditto.
13525 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
13527 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
13531 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
13532 (@pred_ncopysign<mode>_scalar): Ditto.
13534 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13536 * config/riscv/autovec.md: VF_AUTO -> VF.
13537 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
13538 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
13540 * config/riscv/vector.md: Use new iterators.
13542 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
13544 * match.pd: Use element_mode and check if target supports
13545 operation with new type.
13547 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13549 * config/aarch64/aarch64-sve-builtins-base.cc
13550 (svdupq_impl::fold_nonconst_dupq): New method.
13551 (svdupq_impl::fold): Call fold_nonconst_dupq.
13553 2023-06-27 Andrew Pinski <apinski@marvell.com>
13555 PR middle-end/110420
13556 PR middle-end/103979
13557 PR middle-end/98619
13558 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
13560 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
13562 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
13563 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
13565 (set_switch_stmt_execution_predicate): Same.
13566 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
13568 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
13570 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
13571 ipa_vr instead of value_range.
13574 (ipa_get_value_range): Same.
13575 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
13579 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
13581 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
13582 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
13583 (ipa_set_jfunc_vr): Take a range.
13584 (ipa_compute_jump_functions_for_edge): Pass range to
13586 (ipa_write_jump_function): Call streamer write helper.
13587 (ipa_read_jump_function): Call streamer read helper.
13588 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
13590 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
13592 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
13593 as a probable initializer rather than a probable complete statement.
13595 2023-06-27 Richard Biener <rguenther@suse.de>
13597 PR tree-optimization/96208
13598 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
13599 a non-grouped load if it is the same for all lanes.
13600 (vect_build_slp_tree_2): Handle not grouped loads.
13601 (vect_optimize_slp_pass::remove_redundant_permutations):
13603 (vect_transform_slp_perm_load_1): Likewise.
13604 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
13605 (get_group_load_store_type): Likewise. Handle
13606 invariant accesses.
13607 (vectorizable_load): Likewise.
13609 2023-06-27 liuhongt <hongtao.liu@intel.com>
13611 PR rtl-optimization/110237
13612 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
13614 (maskstore<mode><avx512fmaskmodelower): Ditto.
13615 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
13616 from original <avx512>_store<mode>_mask.
13618 2023-06-27 liuhongt <hongtao.liu@intel.com>
13620 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
13621 Move flag_expensive_optimizations && !optimize_size to ..
13622 * config/i386/i386-options.cc (ix86_option_override_internal):
13623 .. this, it makes -mvzeroupper independent of optimization
13624 level, but still keeps the behavior of architecture
13625 tuning(emit_vzeroupper) unchanged.
13627 2023-06-27 liuhongt <hongtao.liu@intel.com>
13630 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
13631 vzeroupper for vzeroupper call_insn.
13633 2023-06-27 Andrew Pinski <apinski@marvell.com>
13635 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
13638 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13640 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
13643 2023-06-26 Andrew Pinski <apinski@marvell.com>
13645 * doc/extend.texi (access attribute): Add
13647 (interrupt/interrupt_handler attribute):
13650 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13652 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
13653 Use <DWI> instead of <V2XWIDE>.
13654 (aarch64_sqrshrun_n<mode>): Likewise.
13656 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13658 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
13660 (aarch64_rnd_imm_p): ... This.
13661 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
13663 (aarch64_int_rnd_operand): ... This.
13664 (aarch64_simd_rshrn_imm_vec): Delete.
13665 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
13666 Adjust for the above.
13667 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
13668 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
13669 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
13670 (aarch64_sqrshrun_n<mode>_insn): Likewise.
13671 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
13672 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
13673 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
13674 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
13675 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
13677 (aarch64_rnd_imm_p): ... This.
13679 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
13681 * config/s390/s390.cc (s390_encode_section_info): Set
13682 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
13685 2023-06-26 Jan Hubicka <jh@suse.cz>
13687 PR tree-optimization/109849
13688 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
13689 count of newly constructed forwarder block.
13691 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
13693 * doc/optinfo.texi: Fix "steam" -> "stream".
13695 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13697 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
13699 (dse_optimize_stmt): Add LEN_MASK_STORE.
13701 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13703 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
13704 fold of LOAD/STORE with length.
13706 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
13708 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
13709 Check for interdependence between operands 1 and 2.
13711 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
13713 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
13714 into account when costing non-widening/truncating conversions.
13716 2023-06-26 Richard Biener <rguenther@suse.de>
13718 PR tree-optimization/110381
13719 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
13720 Materialize permutes before fold-left reductions.
13722 2023-06-26 Pan Li <pan2.li@intel.com>
13724 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
13726 2023-06-26 Richard Biener <rguenther@suse.de>
13728 * varasm.cc (initializer_constant_valid_p_1): Also
13729 constrain the type of value to be scalar integral
13730 before dispatching to narrowing_initializer_constant_valid_p.
13732 2023-06-26 Richard Biener <rguenther@suse.de>
13734 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
13735 Use element_precision.
13737 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13739 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
13741 (vcondu<V:mode><VI:mode>): Ditto.
13742 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
13743 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
13745 2023-06-26 Richard Biener <rguenther@suse.de>
13747 PR tree-optimization/110392
13748 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
13749 Do early exits on true/false predicate only after normalization.
13751 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13753 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
13756 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
13758 * config/i386/i386.md (peephole2): Simplify zeroing a register
13759 followed by an IOR, XOR or PLUS operation on it, into a move.
13760 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
13761 eliminate (and hide from reload) unnecessary word to doubleword
13762 extensions that are followed by left shifts by sufficiently large,
13763 but valid, bit counts.
13765 2023-06-26 liuhongt <hongtao.liu@intel.com>
13767 PR tree-optimization/110371
13768 PR tree-optimization/110018
13769 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
13770 save intermediate type operand instead of "subtle" vec_dest
13773 2023-06-26 liuhongt <hongtao.liu@intel.com>
13775 PR tree-optimization/110371
13776 PR tree-optimization/110018
13777 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
13778 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
13780 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
13782 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
13783 Override tune_string with arch_string if tune_string is not
13784 explicitly specified.
13786 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13788 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
13790 * config/riscv/riscv-vsetvl.h: New function.
13792 2023-06-25 Li Xu <xuli1@eswincomputing.com>
13794 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
13797 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13799 * config/riscv/autovec.md (len_load_<mode>): Remove.
13800 (len_maskload<mode><vm>): Remove.
13801 (len_store_<mode>): New pattern.
13802 (len_maskstore<mode><vm>): New pattern.
13803 * config/riscv/predicates.md (autovec_length_operand): New predicate.
13804 * config/riscv/riscv-protos.h (enum insn_type): New enum.
13805 (expand_load_store): New function.
13806 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
13807 (emit_nonvlmax_masked_insn): Ditto.
13808 (expand_load_store): Ditto.
13809 * config/riscv/riscv-vector-builtins.cc
13810 (function_expander::use_contiguous_store_insn): Add avl_type operand
13812 * config/riscv/vector.md: Ditto.
13814 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13816 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
13819 2023-06-25 Pan Li <pan2.li@intel.com>
13821 * config/riscv/vector.md: Revert.
13823 2023-06-25 Pan Li <pan2.li@intel.com>
13825 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
13826 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
13827 (ADJUST_ALIGNMENT): Ditto.
13828 (RVV_TUPLE_PARTIAL_MODES): Ditto.
13829 (ADJUST_NUNITS): Ditto.
13830 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
13831 (vfloat16mf4x3_t): Ditto.
13832 (vfloat16mf4x4_t): Ditto.
13833 (vfloat16mf4x5_t): Ditto.
13834 (vfloat16mf4x6_t): Ditto.
13835 (vfloat16mf4x7_t): Ditto.
13836 (vfloat16mf4x8_t): Ditto.
13837 (vfloat16mf2x2_t): Ditto.
13838 (vfloat16mf2x3_t): Ditto.
13839 (vfloat16mf2x4_t): Ditto.
13840 (vfloat16mf2x5_t): Ditto.
13841 (vfloat16mf2x6_t): Ditto.
13842 (vfloat16mf2x7_t): Ditto.
13843 (vfloat16mf2x8_t): Ditto.
13844 (vfloat16m1x2_t): Ditto.
13845 (vfloat16m1x3_t): Ditto.
13846 (vfloat16m1x4_t): Ditto.
13847 (vfloat16m1x5_t): Ditto.
13848 (vfloat16m1x6_t): Ditto.
13849 (vfloat16m1x7_t): Ditto.
13850 (vfloat16m1x8_t): Ditto.
13851 (vfloat16m2x2_t): Ditto.
13852 (vfloat16m2x3_t): Diito.
13853 (vfloat16m2x4_t): Diito.
13854 (vfloat16m4x2_t): Diito.
13855 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
13856 (vfloat16mf4x3_t): Ditto.
13857 (vfloat16mf4x4_t): Ditto.
13858 (vfloat16mf4x5_t): Ditto.
13859 (vfloat16mf4x6_t): Ditto.
13860 (vfloat16mf4x7_t): Ditto.
13861 (vfloat16mf4x8_t): Ditto.
13862 (vfloat16mf2x2_t): Ditto.
13863 (vfloat16mf2x3_t): Ditto.
13864 (vfloat16mf2x4_t): Ditto.
13865 (vfloat16mf2x5_t): Ditto.
13866 (vfloat16mf2x6_t): Ditto.
13867 (vfloat16mf2x7_t): Ditto.
13868 (vfloat16mf2x8_t): Ditto.
13869 (vfloat16m1x2_t): Ditto.
13870 (vfloat16m1x3_t): Ditto.
13871 (vfloat16m1x4_t): Ditto.
13872 (vfloat16m1x5_t): Ditto.
13873 (vfloat16m1x6_t): Ditto.
13874 (vfloat16m1x7_t): Ditto.
13875 (vfloat16m1x8_t): Ditto.
13876 (vfloat16m2x2_t): Ditto.
13877 (vfloat16m2x3_t): Ditto.
13878 (vfloat16m2x4_t): Ditto.
13879 (vfloat16m4x2_t): Ditto.
13880 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
13881 * config/riscv/riscv.md: Ditto.
13882 * config/riscv/vector-iterators.md: Ditto.
13884 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13886 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
13887 (gimple_fold_partial_load_store_mem_ref): Ditto.
13888 (gimple_fold_partial_store): Ditto.
13889 (gimple_fold_call): Ditto.
13891 2023-06-25 liuhongt <hongtao.liu@intel.com>
13894 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
13895 Refine pattern with UNSPEC_MASKLOAD.
13896 (maskload<mode><avx512fmaskmodelower>): Ditto.
13897 (*<avx512>_load<mode>_mask): Extend mode iterator to
13899 (*<avx512>_load<mode>): Ditto.
13901 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13903 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
13905 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13907 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
13908 LEN_MASK_{LOAD,STORE}
13910 2023-06-25 yulong <shiyulong@iscas.ac.cn>
13912 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
13914 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
13916 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
13918 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13920 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
13921 (*fma<VI:mode><P:mode>): Ditto.
13922 (*fnma<mode>): Ditto.
13923 (*fnma<VI:mode><P:mode>): Ditto.
13925 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13927 * config/riscv/autovec.md (fma<mode>4): New pattern.
13928 (*fma<mode>): Ditto.
13929 (fnma<mode>4): Ditto.
13930 (*fnma<mode>): Ditto.
13931 (fms<mode>4): Ditto.
13932 (*fms<mode>): Ditto.
13933 (fnms<mode>4): Ditto.
13934 (*fnms<mode>): Ditto.
13935 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
13937 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
13938 * config/riscv/vector.md: Fix attribute bug.
13940 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13942 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
13943 Apply LEN_MASK_{LOAD,STORE}.
13945 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13947 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
13948 Add LEN_MASK_{LOAD,STORE}.
13950 2023-06-24 David Malcolm <dmalcolm@redhat.com>
13952 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
13953 * diagnostic.cc: Likewise.
13954 * text-art/box-drawing.cc: Likewise.
13955 * text-art/canvas.cc: Likewise.
13956 * text-art/ruler.cc: Likewise.
13957 * text-art/selftests.cc: Likewise.
13958 * text-art/selftests.h (text_art::canvas): New forward decl.
13959 * text-art/style.cc: Add #define INCLUDE_VECTOR.
13960 * text-art/styled-string.cc: Likewise.
13961 * text-art/table.cc: Likewise.
13962 * text-art/table.h: Remove #include <vector>.
13963 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
13964 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
13965 Remove #include of <vector> and <string>.
13966 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
13967 * text-art/widget.h: Remove #include <vector>.
13969 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13971 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
13972 (internal_load_fn_p): Add LEN_MASK_LOAD.
13973 (internal_store_fn_p): Add LEN_MASK_STORE.
13974 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
13975 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
13976 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
13977 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
13978 (get_len_load_store_mode): Ditto.
13979 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
13980 (get_len_load_store_mode): Ditto.
13981 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
13982 (get_all_ones_mask): New function.
13983 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
13984 (vectorizable_load): Ditto.
13986 2023-06-23 Marek Polacek <polacek@redhat.com>
13988 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
13989 -std=gnu++26. Document that for C++23, its value is 202302L.
13990 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
13991 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
13992 (gen_compile_unit_die): Likewise.
13994 2023-06-23 Jan Hubicka <jh@suse.cz>
13996 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
13998 (pass_phiprop::execute): Do not compute it here; return
13999 update_ssa_only_virtuals if something changed.
14000 (pass_data_phiprop): Remove TODO_update_ssa from todos.
14002 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
14003 Aaron Sawdey <acsawdey@linux.ibm.com>
14006 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
14007 allowed prefixed lwa to be generated.
14008 * config/rs6000/fusion.md: Regenerate.
14009 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
14010 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
14011 plus compare immediate fused insns.
14012 (maybe_prefixed): Likewise.
14014 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
14016 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
14017 of ASHIFT to const0_rtx with sufficiently large shift count.
14018 Optimize highpart SUBREGs of ASHIFT as the shift operand when
14019 the shift count is the correct offset. Optimize SUBREGs of
14020 multi-word logic operations if the SUBREGs of both operands
14023 2023-06-23 Richard Biener <rguenther@suse.de>
14025 * varasm.cc (initializer_constant_valid_p_1): Only
14026 allow conversions between scalar floating point types.
14028 2023-06-23 Richard Biener <rguenther@suse.de>
14030 * tree-vect-stmts.cc (vectorizable_assignment):
14031 Properly handle non-integral operands when analyzing
14034 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
14036 PR tree-optimization/110280
14037 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
14038 using build_vector_from_val with the element of input operand, and
14039 mask's type if operand and mask's types don't match.
14041 2023-06-23 Richard Biener <rguenther@suse.de>
14043 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
14044 the truth_value_p case with !VECTOR_TYPE_P.
14046 2023-06-23 Richard Biener <rguenther@suse.de>
14048 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
14049 Exit early when the type isn't scalar integral.
14051 2023-06-23 Richard Biener <rguenther@suse.de>
14053 * match.pd ((outertype)((innertype0)a+(innertype1)b)
14054 -> ((newtype)a+(newtype)b)): Use element_precision
14057 2023-06-23 Richard Biener <rguenther@suse.de>
14059 * fold-const.cc (fold_binary_loc): Use element_precision
14060 when trying (double)float1 CMP (double)float2 to
14061 float1 CMP float2 simplification.
14062 * match.pd: Likewise.
14064 2023-06-23 Richard Biener <rguenther@suse.de>
14066 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
14067 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
14069 2023-06-23 Richard Biener <rguenther@suse.de>
14071 * tree-vect-stmts.cc (vector_vector_composition_type):
14072 Handle composition of a vector from a number of elements that
14073 happens to match its number of lanes.
14075 2023-06-22 Marek Polacek <polacek@redhat.com>
14077 * configure.ac (--enable-host-bind-now): New check. Add
14078 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
14079 * configure: Regenerate.
14080 * doc/install.texi: Document --enable-host-bind-now.
14082 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
14084 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
14086 2023-06-22 Richard Biener <rguenther@suse.de>
14088 PR tree-optimization/110332
14089 * tree-ssa-phiprop.cc (propagate_with_phi): Always
14090 check aliasing with edge inserted loads.
14092 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
14093 Uros Bizjak <ubizjak@gmail.com>
14095 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
14096 expansion of ptestc with equal operands as producing const1_rtx.
14097 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
14098 estimates of UNSPEC_PTEST, where the ptest performs the PAND
14099 or PAND of its operands.
14100 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
14101 of reg_equal_p operands into an x86_stc instruction.
14102 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
14103 (define_split): Similar to above for strict_low_part destinations.
14104 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
14106 2023-06-22 David Malcolm <dmalcolm@redhat.com>
14109 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
14110 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
14112 (fanalyzer-debug-text-art): New.
14114 2023-06-22 David Malcolm <dmalcolm@redhat.com>
14116 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
14117 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
14118 text-art/style.o, text-art/styled-string.o, text-art/table.o,
14119 text-art/theme.o, and text-art/widget.o.
14120 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
14121 (COLOR_FG_BRIGHT_RED): New.
14122 (COLOR_FG_BRIGHT_GREEN): New.
14123 (COLOR_FG_BRIGHT_YELLOW): New.
14124 (COLOR_FG_BRIGHT_BLUE): New.
14125 (COLOR_FG_BRIGHT_MAGENTA): New.
14126 (COLOR_FG_BRIGHT_CYAN): New.
14127 (COLOR_FG_BRIGHT_WHITE): New.
14128 (COLOR_BG_BRIGHT_BLACK): New.
14129 (COLOR_BG_BRIGHT_RED): New.
14130 (COLOR_BG_BRIGHT_GREEN): New.
14131 (COLOR_BG_BRIGHT_YELLOW): New.
14132 (COLOR_BG_BRIGHT_BLUE): New.
14133 (COLOR_BG_BRIGHT_MAGENTA): New.
14134 (COLOR_BG_BRIGHT_CYAN): New.
14135 (COLOR_BG_BRIGHT_WHITE): New.
14136 * common.opt (fdiagnostics-text-art-charset=): New option.
14137 (diagnostic-text-art.h): New SourceInclude.
14138 (diagnostic_text_art_charset) New Enum and EnumValues.
14139 * configure: Regenerate.
14140 * configure.ac (gccdepdir): Add text-art to loop.
14141 * diagnostic-diagram.h: New file.
14142 * diagnostic-format-json.cc (json_emit_diagram): New.
14143 (diagnostic_output_format_init_json): Wire it up to
14144 context->m_diagrams.m_emission_cb.
14145 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
14146 "text-art/canvas.h".
14147 (sarif_result::on_nested_diagnostic): Move code to...
14148 (sarif_result::add_related_location): ...this new function.
14149 (sarif_result::on_diagram): New.
14150 (sarif_builder::emit_diagram): New.
14151 (sarif_builder::make_message_object_for_diagram): New.
14152 (sarif_emit_diagram): New.
14153 (diagnostic_output_format_init_sarif): Set
14154 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
14155 * diagnostic-text-art.h: New file.
14156 * diagnostic.cc: Include "diagnostic-text-art.h",
14157 "diagnostic-diagram.h", and "text-art/theme.h".
14158 (diagnostic_initialize): Initialize context->m_diagrams and
14159 call diagnostics_text_art_charset_init.
14160 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
14161 (diagnostic_emit_diagram): New.
14162 (diagnostics_text_art_charset_init): New.
14163 * diagnostic.h (text_art::theme): New forward decl.
14164 (class diagnostic_diagram): Likewise.
14165 (diagnostic_context::m_diagrams): New field.
14166 (diagnostic_emit_diagram): New decl.
14167 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
14168 -fdiagnostics-text-art-charset=.
14169 (-fdiagnostics-plain-output): Add
14170 -fdiagnostics-text-art-charset=none.
14171 * gcc.cc: Include "diagnostic-text-art.h".
14172 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
14173 * opts-common.cc (decode_cmdline_options_to_array): Add
14174 "-fdiagnostics-text-art-charset=none" to expanded_args for
14175 -fdiagnostics-plain-output.
14176 * opts.cc: Include "diagnostic-text-art.h".
14177 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
14178 * pretty-print.cc (pp_unicode_character): New.
14179 * pretty-print.h (pp_unicode_character): New decl.
14180 * selftest-run-tests.cc: Include "text-art/selftests.h".
14181 (selftest::run_tests): Call text_art_tests.
14182 * text-art/box-drawing-chars.inc: New file, generated by
14183 contrib/unicode/gen-box-drawing-chars.py.
14184 * text-art/box-drawing.cc: New file.
14185 * text-art/box-drawing.h: New file.
14186 * text-art/canvas.cc: New file.
14187 * text-art/canvas.h: New file.
14188 * text-art/ruler.cc: New file.
14189 * text-art/ruler.h: New file.
14190 * text-art/selftests.cc: New file.
14191 * text-art/selftests.h: New file.
14192 * text-art/style.cc: New file.
14193 * text-art/styled-string.cc: New file.
14194 * text-art/table.cc: New file.
14195 * text-art/table.h: New file.
14196 * text-art/theme.cc: New file.
14197 * text-art/theme.h: New file.
14198 * text-art/types.h: New file.
14199 * text-art/widget.cc: New file.
14200 * text-art/widget.h: New file.
14202 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
14204 * function.h (emit_initial_value_sets):
14205 Change return type from int to void.
14206 (aggregate_value_p): Change return type from int to bool.
14207 (prologue_contains): Ditto.
14208 (epilogue_contains): Ditto.
14209 (prologue_epilogue_contains): Ditto.
14210 * function.cc (temp_slot): Make "in_use" variable bool.
14211 (make_slot_available): Update for changed "in_use" variable.
14212 (assign_stack_temp_for_type): Ditto.
14213 (emit_initial_value_sets): Change return type from int to void
14214 and update function body accordingly.
14215 (instantiate_virtual_regs): Ditto.
14216 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
14217 (safe_insn_predicate): Change return type from int to bool.
14218 (aggregate_value_p): Change return type from int to bool
14219 and update function body accordingly.
14220 (prologue_contains): Change return type from int to bool.
14221 (prologue_epilogue_contains): Ditto.
14223 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
14225 * common.opt (fp_contract_mode) [on]: Remove fallback.
14226 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
14227 * doc/invoke.texi (-ffp-contract): Update.
14228 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
14230 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14232 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
14233 Add alternatives to prefer to avoid same input and output Z register.
14234 (mask_gather_load<mode><v_int_container>): Likewise.
14235 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
14236 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
14237 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
14238 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
14240 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
14242 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14243 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
14244 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14245 <SVE_2BHSI:mode>_sxtw): Likewise.
14246 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14247 <SVE_2BHSI:mode>_uxtw): Likewise.
14248 (@aarch64_ldff1_gather<mode>): Likewise.
14249 (@aarch64_ldff1_gather<mode>): Likewise.
14250 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
14251 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
14252 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
14253 <VNx4_NARROW:mode>): Likewise.
14254 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14255 <VNx2_NARROW:mode>): Likewise.
14256 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14257 <VNx2_NARROW:mode>_sxtw): Likewise.
14258 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14259 <VNx2_NARROW:mode>_uxtw): Likewise.
14260 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
14261 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
14262 <SVE_PARTIAL_I:mode>): Likewise.
14264 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14266 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
14267 Convert to compact alternatives syntax.
14268 (mask_gather_load<mode><v_int_container>): Likewise.
14269 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
14270 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
14271 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
14272 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
14274 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
14276 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14277 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
14278 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14279 <SVE_2BHSI:mode>_sxtw): Likewise.
14280 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14281 <SVE_2BHSI:mode>_uxtw): Likewise.
14282 (@aarch64_ldff1_gather<mode>): Likewise.
14283 (@aarch64_ldff1_gather<mode>): Likewise.
14284 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
14285 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
14286 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
14287 <VNx4_NARROW:mode>): Likewise.
14288 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14289 <VNx2_NARROW:mode>): Likewise.
14290 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14291 <VNx2_NARROW:mode>_sxtw): Likewise.
14292 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14293 <VNx2_NARROW:mode>_uxtw): Likewise.
14294 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
14295 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
14296 <SVE_PARTIAL_I:mode>): Likewise.
14298 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14301 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14303 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
14304 Convert to compact alternatives syntax.
14305 (mask_gather_load<mode><v_int_container>): Likewise.
14306 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
14307 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
14308 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
14309 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
14311 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
14313 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14314 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
14315 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14316 <SVE_2BHSI:mode>_sxtw): Likewise.
14317 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14318 <SVE_2BHSI:mode>_uxtw): Likewise.
14319 (@aarch64_ldff1_gather<mode>): Likewise.
14320 (@aarch64_ldff1_gather<mode>): Likewise.
14321 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
14322 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
14323 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
14324 <VNx4_NARROW:mode>): Likewise.
14325 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14326 <VNx2_NARROW:mode>): Likewise.
14327 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14328 <VNx2_NARROW:mode>_sxtw): Likewise.
14329 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14330 <VNx2_NARROW:mode>_uxtw): Likewise.
14331 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
14332 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
14333 <SVE_PARTIAL_I:mode>): Likewise.
14335 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14337 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
14338 (get_len_load_store_mode): Ditto.
14339 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
14340 (get_len_load_store_mode): Ditto.
14341 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
14342 (get_len_load_store_mode): Ditto.
14343 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
14344 (get_len_load_store_mode): Ditto.
14345 * tree-if-conv.cc: include optabs-tree instead of optabs-query
14347 2023-06-21 Richard Biener <rguenther@suse.de>
14349 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
14350 split_constant_offset for the POINTER_PLUS_EXPR case.
14352 2023-06-21 Richard Biener <rguenther@suse.de>
14354 * tree-ssa-loop-ivopts.cc (record_group_use): Use
14355 split_constant_offset.
14357 2023-06-21 Richard Biener <rguenther@suse.de>
14359 * tree-loop-distribution.cc (classify_builtin_st): Use
14360 split_constant_offset.
14361 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
14362 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
14364 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14366 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
14367 Convert to compact alternatives syntax.
14368 (mask_gather_load<mode><v_int_container>): Likewise.
14369 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
14370 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
14371 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
14372 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
14374 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
14376 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14377 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
14378 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14379 <SVE_2BHSI:mode>_sxtw): Likewise.
14380 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
14381 <SVE_2BHSI:mode>_uxtw): Likewise.
14382 (@aarch64_ldff1_gather<mode>): Likewise.
14383 (@aarch64_ldff1_gather<mode>): Likewise.
14384 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
14385 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
14386 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
14387 <VNx4_NARROW:mode>): Likewise.
14388 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14389 <VNx2_NARROW:mode>): Likewise.
14390 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14391 <VNx2_NARROW:mode>_sxtw): Likewise.
14392 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
14393 <VNx2_NARROW:mode>_uxtw): Likewise.
14394 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
14395 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
14396 <SVE_PARTIAL_I:mode>): Likewise.
14398 2023-06-21 Tamar Christina <tamar.christina@arm.com>
14401 * doc/md.texi: Replace backslashchar.
14403 2023-06-21 Richard Biener <rguenther@suse.de>
14405 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
14406 Overload. For masked main loops make sure the vectorization
14407 factor isn't more than double the number of iterations.
14409 2023-06-21 Jan Beulich <jbeulich@suse.com>
14411 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
14412 value duplication by ix86_build_signbit_mask() when AVX512F and
14414 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
14415 2-alternative form. Adjust "mode" attribute. Add "enabled"
14417 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
14418 && !TARGET_PREFER_AVX256.
14419 (*<avx512>_vpternlog<mode>_2): Likewise.
14420 (*<avx512>_vpternlog<mode>_3): Likewise.
14422 2023-06-21 liuhongt <hongtao.liu@intel.com>
14425 * tree-vect-stmts.cc (vectorizable_conversion): Use
14426 intermiediate integer type for float_expr/fix_trunc_expr when
14427 direct optab is not existed.
14429 2023-06-20 Tamar Christina <tamar.christina@arm.com>
14431 PR bootstrap/110324
14432 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
14434 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
14436 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
14437 register operand to the stack pointer. Require the second register
14438 operand to have the number specified in a separate const_int operand.
14439 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
14440 (aarch64_allocate_and_probe_stack_space): Use it.
14441 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
14442 (aarch64_expand_epilogue): Likewise.
14444 2023-06-20 Jakub Jelinek <jakub@redhat.com>
14446 PR middle-end/79173
14447 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
14448 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
14451 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
14453 * calls.h (setjmp_call_p): Change return type from int to bool.
14454 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
14455 (store_one_arg): Change return type from int to bool
14456 and adjust function body accordingly. Change "sibcall_failure"
14458 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
14459 argument to bool. Change "partial_seen" variable to bool.
14460 (load_register_parameters): Change *sibcall_failure
14461 pointer argument to bool.
14462 (check_sibcall_argument_overlap_1): Change return type from int to bool
14463 and adjust function body accordingly.
14464 (check_sibcall_argument_overlap): Ditto. Change
14465 "mark_stored_args_map" argument to bool.
14466 (emit_call_1): Change "already_popped" variable to bool.
14467 (setjmp_call_p): Change return type from int to bool
14468 and adjust function body accordingly.
14469 (initialize_argument_information): Change *must_preallocate
14470 pointer argument to bool.
14471 (expand_call): Change "pcc_struct_value", "must_preallocate"
14472 and "sibcall_failure" variables to bool.
14473 (emit_library_call_value_1): Change "pcc_struct_value"
14476 2023-06-20 Martin Jambor <mjambor@suse.cz>
14479 * ipa-sra.cc (struct caller_issues): New field there_is_one.
14480 (check_for_caller_issues): Set it.
14481 (check_all_callers_for_issues): Check it.
14483 2023-06-20 Martin Jambor <mjambor@suse.cz>
14485 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
14486 (struct ipcp_transformation): Rearrange members according to
14487 C++ class coding convention, add m_uid_to_idx,
14488 get_param_index and maybe_create_parm_idx_map.
14489 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
14490 (compare_uids): Likewise.
14491 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
14492 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
14493 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
14494 (ipcp_update_vr): Likewise.
14495 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
14496 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
14498 2023-06-20 Carl Love <cel@us.ibm.com>
14500 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
14501 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
14502 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
14503 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
14504 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
14505 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
14506 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
14507 * config/rs6000/rs6000-builtins.def
14508 (__builtin_vsx_scalar_extract_exp_to_vec,
14509 __builtin_vsx_scalar_extract_sig_to_vec,
14510 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
14511 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
14512 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
14513 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
14514 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
14515 overloaded instance. Update comments.
14516 * config/rs6000/rs6000-overload.def
14517 (__builtin_vec_scalar_insert_exp): Add new overload definition with
14519 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
14520 overloaded definitions.
14521 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
14522 (DI_to_TI): New mode attribute.
14523 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
14524 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
14525 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
14526 * doc/extend.texi (scalar_extract_exp_to_vec,
14527 scalar_extract_sig_to_vec): Add documentation for new builtins.
14528 (scalar_insert_exp): Add new overloaded builtin definition.
14530 2023-06-20 Li Xu <xuli1@eswincomputing.com>
14532 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
14533 size of vector mask mode to one rvv register.
14535 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14537 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
14539 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
14541 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
14544 2023-06-20 Richard Biener <rguenther@suse.de>
14546 * tree-ssa-dse.cc (dse_classify_store): When we found
14547 no defs and the basic-block with the original definition
14548 ends in __builtin_unreachable[_trap] the store is dead.
14550 2023-06-20 Richard Biener <rguenther@suse.de>
14552 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
14553 keep the virtual SSA form up-to-date.
14555 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14557 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
14558 New define_insn_and_split.
14560 2023-06-20 Tamar Christina <tamar.christina@arm.com>
14562 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
14564 2023-06-20 Jan Beulich <jbeulich@suse.com>
14566 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
14567 constraint. Add new AVX512F alternative.
14569 2023-06-20 Richard Biener <rguenther@suse.de>
14572 * dwarf2out.cc (process_scope_var): Continue processing
14573 the decl after setting a parent in case the existing DIE
14576 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
14578 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
14579 (riscv_arg_has_vector): Simplify.
14580 (riscv_pass_in_vector_p): Adjust warning message.
14582 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
14584 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
14585 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
14586 * config/riscv/riscv.md (riscv_frcsr): New patterns.
14587 (riscv_fscsr): Likewise.
14589 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
14591 PR rtl-optimization/110305
14592 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
14593 Handle HONOR_SNANS for x + 0.0.
14595 2023-06-19 Jan Hubicka <jh@suse.cz>
14597 PR tree-optimization/109811
14598 PR tree-optimization/109849
14599 * passes.def: Add phiprop to early optimization passes.
14600 * tree-ssa-phiprop.cc: Allow clonning.
14602 2023-06-19 Tamar Christina <tamar.christina@arm.com>
14604 * config/aarch64/aarch64.md (arches): Add nosimd.
14605 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
14608 2023-06-19 Tamar Christina <tamar.christina@arm.com>
14609 Omar Tahir <Omar.Tahir2@arm.com>
14611 * gensupport.cc (class conlist, add_constraints, add_attributes,
14612 skip_spaces, expect_char, preprocess_compact_syntax,
14613 parse_section_layout, parse_section, convert_syntax): New.
14614 (process_rtx): Check for conversion.
14615 * genoutput.cc (process_template): Check for unresolved iterators.
14616 (class data): Add compact_syntax_p.
14617 (gen_insn): Use it.
14618 * gensupport.h (compact_syntax): New.
14619 (hash-set.h): Include.
14620 * doc/md.texi: Document it.
14622 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
14624 * recog.h (check_asm_operands): Change return type from int to bool.
14625 (insn_invalid_p): Ditto.
14626 (verify_changes): Ditto.
14627 (apply_change_group): Ditto.
14628 (constrain_operands): Ditto.
14629 (constrain_operands_cached): Ditto.
14630 (validate_replace_rtx_subexp): Ditto.
14631 (validate_replace_rtx): Ditto.
14632 (validate_replace_rtx_part): Ditto.
14633 (validate_replace_rtx_part_nosimplify): Ditto.
14634 (added_clobbers_hard_reg_p): Ditto.
14635 (peep2_regno_dead_p): Ditto.
14636 (peep2_reg_dead_p): Ditto.
14637 (store_data_bypass_p): Ditto.
14638 (if_test_bypass_p): Ditto.
14639 * rtl.h (split_all_insns_noflow): Change
14640 return type from unsigned int to void.
14641 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
14642 of generated added_clobbers_hard_reg_p from int to bool and adjust
14643 function body accordingly. Change "used" variable type from
14645 * recog.cc (check_asm_operands): Change return type
14646 from int to bool and adjust function body accordingly.
14647 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
14648 (verify_changes): Change return type from int to bool.
14649 (apply_change_group): Change return type from int to bool
14650 and adjust function body accordingly.
14651 (validate_replace_rtx_subexp): Change return type from int to bool.
14652 (validate_replace_rtx): Ditto.
14653 (validate_replace_rtx_part): Ditto.
14654 (validate_replace_rtx_part_nosimplify): Ditto.
14655 (constrain_operands_cached): Ditto.
14656 (constrain_operands): Ditto. Change "lose" and "win"
14657 variables type from int to bool.
14658 (split_all_insns_noflow): Change return type from unsigned int
14659 to void and adjust function body accordingly.
14660 (peep2_regno_dead_p): Change return type from int to bool.
14661 (peep2_reg_dead_p): Ditto.
14662 (peep2_find_free_register): Change "success"
14663 variable type from int to bool
14664 (store_data_bypass_p_1): Change return type from int to bool.
14665 (store_data_bypass_p): Ditto.
14667 2023-06-19 Li Xu <xuli1@eswincomputing.com>
14669 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
14672 2023-06-19 Pan Li <pan2.li@intel.com>
14675 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
14677 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
14678 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
14679 VF_ZVE63 and VF_ZVE32.
14680 * config/riscv/vector.md
14681 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
14682 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
14683 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
14684 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
14685 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
14686 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
14687 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
14688 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
14689 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
14690 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
14692 2023-06-19 Pan Li <pan2.li@intel.com>
14695 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
14697 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
14698 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
14699 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
14700 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
14701 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
14702 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
14703 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
14704 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
14705 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
14706 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
14707 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
14708 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
14709 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
14710 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
14712 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
14714 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
14715 (gcn_init_libfuncs): Add div and mod functions for all modes.
14716 Add placeholders for divmod functions.
14717 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
14719 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
14721 * tree-vect-generic.cc: Include optabs-libfuncs.h.
14722 (get_compute_type): Check optab_libfunc.
14723 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
14724 (vectorizable_operation): Check optab_libfunc.
14726 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
14728 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
14729 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
14730 (V_MOV, V_MOV_ALT): Likewise.
14731 (scalar_mode, SCALAR_MODE): Add TImode.
14732 (vnsi, VnSI, vndi, VnDI): Likewise.
14733 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
14734 (mov<mode>, mov<mode>_unspec): Use V_MOV.
14735 (*mov<mode>_4reg): New insn.
14736 (mov<mode>_exec): New 4reg variant.
14737 (mov<mode>_sgprbase): Likewise.
14738 (reload_in<mode>, reload_out<mode>): Use V_MOV.
14739 (vec_set<mode>): Likewise.
14740 (vec_duplicate<mode><exec>): New 4reg variant.
14741 (vec_extract<mode><scalar_mode>): Likewise.
14742 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
14743 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
14744 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
14745 (fold_extract_last_<mode>): Use V_MOV.
14746 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
14747 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
14748 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
14749 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
14750 gather<mode>_insn_2offsets<exec>): Use V_MOV.
14751 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
14752 scatter<mode>_insn_1offset<exec_scatter>,
14753 scatter<mode>_insn_1offset_ds<exec_scatter>,
14754 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
14755 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
14756 mask_scatter_store<mode><vnsi>): Likewise.
14757 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
14758 (gcn_hard_regno_mode_ok): Likewise.
14759 (GEN_VNM): Add TImode support.
14760 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
14761 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
14762 V8TImode, and V2TImode.
14763 (print_operand): Add 'J' and 'K' print codes.
14765 2023-06-19 Richard Biener <rguenther@suse.de>
14767 PR tree-optimization/110298
14768 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
14769 Clear number of iterations info before cleaning up the CFG.
14771 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14773 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
14774 Simplify vec_concat of lowpart subreg and high part vec_select.
14776 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
14778 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
14780 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
14782 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
14783 Handle null niters_skip.
14785 2023-06-19 Richard Biener <rguenther@suse.de>
14787 * config/aarch64/aarch64.cc
14788 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
14789 to LOOP_VINFO_MASKS.
14791 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
14794 * common/config/avr/avr-common.cc: Remove setting
14795 of OPT_fdelete_null_pointer_checks.
14796 * config/avr/avr.cc (avr_option_override): Clear
14797 flag_delete_null_pointer_checks if zero_address_valid.
14798 (avr_addr_space_zero_address_valid): New function.
14799 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
14802 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14803 Robin Dapp <rdapp.gcc@gmail.com>
14805 * doc/md.texi: Add len_mask{load,store}.
14806 * genopinit.cc (main): Ditto.
14808 * internal-fn.cc (len_maskload_direct): Ditto.
14809 (len_maskstore_direct): Ditto.
14810 (expand_call_mem_ref): Ditto.
14811 (expand_partial_load_optab_fn): Ditto.
14812 (expand_len_maskload_optab_fn): Ditto.
14813 (expand_partial_store_optab_fn): Ditto.
14814 (expand_len_maskstore_optab_fn): Ditto.
14815 (direct_len_maskload_optab_supported_p): Ditto.
14816 (direct_len_maskstore_optab_supported_p): Ditto.
14817 * internal-fn.def (LEN_MASK_LOAD): Ditto.
14818 (LEN_MASK_STORE): Ditto.
14819 * optabs.def (OPTAB_CD): Ditto.
14821 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14823 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
14825 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14827 * config/riscv/autovec.md (<optab><mode>3): Implement binop
14829 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
14830 (enum vxrm_field_enum): Rename this...
14831 (enum fixed_point_rounding_mode): ...to this.
14832 (enum frm_field_enum): Rename this...
14833 (enum floating_point_rounding_mode): ...to this.
14834 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
14835 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
14837 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
14838 (riscv_excess_precision): Do not convert to float for ZVFH.
14839 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
14841 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14843 * config/riscv/vector-iterators.md: Add VI_QH iterator.
14844 * config/riscv/autovec-opt.md
14845 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
14846 that includes sign extension.
14847 (@pred_extract_first_sextsi<mode>): Dito for SImode.
14849 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14851 * config/riscv/autovec.md (vec_set<mode>): Implement.
14852 (vec_extract<mode><vel>): Implement.
14853 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
14854 (emit_vlmax_slide_insn): Declare.
14855 (emit_nonvlmax_slide_tu_insn): Declare.
14856 (emit_scalar_move_insn): Export.
14857 (emit_nonvlmax_integer_move_insn): Export.
14858 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
14859 (emit_nonvlmax_slide_tu_insn): New function.
14860 (emit_vlmax_masked_mu_insn): No change.
14861 (emit_vlmax_integer_move_insn): Export.
14863 2023-06-19 Richard Biener <rguenther@suse.de>
14865 * tree-vectorizer.h (enum vect_partial_vector_style): New.
14866 (_loop_vec_info::partial_vector_style): Likewise.
14867 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
14868 (rgroup_controls::compare_type): Add.
14869 (vec_loop_masks): Change from a typedef to auto_vec<>
14871 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
14872 Adjust. Convert niters_skip to compare_type.
14873 (vect_set_loop_condition_partial_vectors_avx512): New function
14874 implementing the AVX512 partial vector codegen.
14875 (vect_set_loop_condition): Dispatch to the correct
14876 vect_set_loop_condition_partial_vectors_* function based on
14877 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
14878 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
14879 in the original niter type.
14880 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
14881 partial_vector_style.
14882 (can_produce_all_loop_masks_p): Adjust.
14883 (vect_verify_full_masking): Produce the rgroup_controls vector
14884 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
14885 (vect_verify_full_masking_avx512): New function implementing
14886 verification of AVX512 style masking.
14887 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
14888 (vect_analyze_loop_2): Also try AVX512 style masking.
14890 (vect_estimate_min_profitable_iters): Implement AVX512 style
14891 mask producing cost.
14892 (vect_record_loop_mask): Do not build the rgroup_controls
14893 vector here but record masks in a hash-set.
14894 (vect_get_loop_mask): Implement AVX512 style mask query,
14895 complementing the existing while_ult style.
14897 2023-06-19 Richard Biener <rguenther@suse.de>
14899 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
14901 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
14902 (vectorize_fold_left_reduction): Adjust.
14903 (vect_transform_reduction): Likewise.
14904 (vectorizable_live_operation): Likewise.
14905 * tree-vect-stmts.cc (vectorizable_call): Likewise.
14906 (vectorizable_operation): Likewise.
14907 (vectorizable_store): Likewise.
14908 (vectorizable_load): Likewise.
14909 (vectorizable_condition): Likewise.
14911 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
14914 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
14915 Add Optimization option property.
14917 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14919 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
14920 Add new pattern for the abovementioned case.
14922 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14924 * config/xtensa/xtensa.cc
14925 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
14927 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
14929 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
14931 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
14933 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
14935 2023-06-19 liuhongt <hongtao.liu@intel.com>
14938 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
14940 (sse2_packsswb<mask_name>): .. this, ..
14941 (avx2_packsswb<mask_name>): .. this and ..
14942 (avx512bw_packsswb<mask_name>): .. this.
14943 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
14944 (sse2_packssdw<mask_name>): .. this, ..
14945 (avx2_packssdw<mask_name>): .. this and ..
14946 (avx512bw_packssdw<mask_name>): .. this.
14948 2023-06-19 liuhongt <hongtao.liu@intel.com>
14951 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
14952 UNSPEC_US_TRUNCATE instead of original us_truncate for
14954 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
14956 (mmx_packsswb): .. this and ..
14957 (mmx_packuswb): .. this.
14958 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
14960 (s_trunsuffix): Removed code iterator.
14961 (any_s_truncate): Ditto.
14962 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
14963 UNSPEC_US_TRUNCATE instead of original us_truncate.
14964 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
14965 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
14967 2023-06-18 Pan Li <pan2.li@intel.com>
14969 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
14971 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
14973 * rtl.h (*rtx_equal_p_callback_function):
14974 Change return type from int to bool.
14975 (rtx_equal_p): Ditto.
14976 (*hash_rtx_callback_function): Ditto.
14977 * rtl.cc (rtx_equal_p): Change return type from int to bool
14978 and adjust function body accordingly.
14979 * early-remat.cc (scratch_equal): Ditto.
14980 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
14981 (hash_with_unspec_callback): Ditto.
14983 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
14985 * config/arc/arc.md (movqi_insn): Allow certain constants to
14986 be stored into memory in the pattern's condition.
14987 (movsf_insn): Similarly.
14989 2023-06-18 Honza <jh@ryzen3.suse.cz>
14991 PR tree-optimization/109849
14992 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
14993 ES; handle ipa_predicate::not_sra_candidate.
14994 (evaluate_properties_for_edge): Pass es to
14995 evaluate_conditions_for_known_args.
14996 (ipa_fn_summary_t::duplicate): Handle sra candidates.
14997 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
14998 (load_or_store_of_ptr_parameter): New function.
14999 (points_to_possible_sra_candidate_p): New function.
15000 (analyze_function_body): Initialize points_to_possible_sra_candidate;
15001 determine sra predicates.
15002 (estimate_ipcp_clone_size_and_time): Update call of
15003 evaluate_conditions_for_known_args.
15004 (remap_edge_params): Update points_to_possible_sra_candidate.
15005 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
15006 (write_ipa_call_summary): Likewise.
15007 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
15008 (dump_condition): Dump it.
15009 * ipa-predicate.h (struct inline_param_summary): Add
15010 points_to_possible_sra_candidate.
15012 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
15014 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
15015 function for setting the carry flag.
15016 (ix86_expand_builtin) <handlecarry>: Use it here.
15017 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
15018 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
15019 (usubc<mode>5): Likewise.
15021 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
15023 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
15024 for the immediate constant shift count.
15025 (*concat<mode><dwi>3_2): Likewise.
15026 (*concat<mode><dwi>3_3): Likewise.
15027 (*concat<mode><dwi>3_4): Likewise.
15028 (*concat<mode><dwi>3_5): Likewise.
15029 (*concat<mode><dwi>3_6): Likewise.
15031 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
15033 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
15034 (hash_rtx): Remove.
15035 * early-remat.cc (remat_candidate_hasher::equal): Update
15036 to call rtx_equal_p with rtx_equal_p_callback_function argument.
15037 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
15038 (rtx_equal_p): Remove.
15039 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
15040 argument with NULL default value.
15041 (rtx_equal_p_cb): Remove function declaration.
15042 (hash_rtx_cb): Ditto.
15043 (hash_rtx): Add hash_rtx_callback_function argument
15044 with NULL default value.
15045 * sel-sched-ir.cc (free_nop_pool): Update function comment.
15046 (skip_unspecs_callback): Ditto.
15047 (vinsn_init): Update to call hash_rtx with
15048 hash_rtx_callback_function argument.
15049 (vinsn_equal_p): Ditto.
15051 2023-06-18 yulong <shiyulong@iscas.ac.cn>
15053 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
15054 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
15055 (ADJUST_ALIGNMENT): Ditto.
15056 (RVV_TUPLE_PARTIAL_MODES): Ditto.
15057 (ADJUST_NUNITS): Ditto.
15058 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
15060 (vfloat16mf4x3_t): Ditto.
15061 (vfloat16mf4x4_t): Ditto.
15062 (vfloat16mf4x5_t): Ditto.
15063 (vfloat16mf4x6_t): Ditto.
15064 (vfloat16mf4x7_t): Ditto.
15065 (vfloat16mf4x8_t): Ditto.
15066 (vfloat16mf2x2_t): Ditto.
15067 (vfloat16mf2x3_t): Ditto.
15068 (vfloat16mf2x4_t): Ditto.
15069 (vfloat16mf2x5_t): Ditto.
15070 (vfloat16mf2x6_t): Ditto.
15071 (vfloat16mf2x7_t): Ditto.
15072 (vfloat16mf2x8_t): Ditto.
15073 (vfloat16m1x2_t): Ditto.
15074 (vfloat16m1x3_t): Ditto.
15075 (vfloat16m1x4_t): Ditto.
15076 (vfloat16m1x5_t): Ditto.
15077 (vfloat16m1x6_t): Ditto.
15078 (vfloat16m1x7_t): Ditto.
15079 (vfloat16m1x8_t): Ditto.
15080 (vfloat16m2x2_t): Ditto.
15081 (vfloat16m2x3_t): Ditto.
15082 (vfloat16m2x4_t): Ditto.
15083 (vfloat16m4x2_t): Ditto.
15084 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
15085 (vfloat16mf4x3_t): Ditto.
15086 (vfloat16mf4x4_t): Ditto.
15087 (vfloat16mf4x5_t): Ditto.
15088 (vfloat16mf4x6_t): Ditto.
15089 (vfloat16mf4x7_t): Ditto.
15090 (vfloat16mf4x8_t): Ditto.
15091 (vfloat16mf2x2_t): Ditto.
15092 (vfloat16mf2x3_t): Ditto.
15093 (vfloat16mf2x4_t): Ditto.
15094 (vfloat16mf2x5_t): Ditto.
15095 (vfloat16mf2x6_t): Ditto.
15096 (vfloat16mf2x7_t): Ditto.
15097 (vfloat16mf2x8_t): Ditto.
15098 (vfloat16m1x2_t): Ditto.
15099 (vfloat16m1x3_t): Ditto.
15100 (vfloat16m1x4_t): Ditto.
15101 (vfloat16m1x5_t): Ditto.
15102 (vfloat16m1x6_t): Ditto.
15103 (vfloat16m1x7_t): Ditto.
15104 (vfloat16m1x8_t): Ditto.
15105 (vfloat16m2x2_t): Ditto.
15106 (vfloat16m2x3_t): Ditto.
15107 (vfloat16m2x4_t): Ditto.
15108 (vfloat16m4x2_t): Ditto.
15109 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
15110 * config/riscv/riscv.md: New.
15111 * config/riscv/vector-iterators.md: New.
15113 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
15115 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
15116 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
15117 Generalize special case for converting TImode to V1TImode to handle
15118 all 128-bit vector conversions.
15120 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
15122 * gcc-ar.cc (main): Refactor to slightly reduce code
15123 duplication. Avoid unnecessary elements in nargv.
15125 2023-06-16 Pan Li <pan2.li@intel.com>
15128 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
15129 integer reduction expand.
15130 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
15131 and the LMUL1 attr respectively.
15132 * config/riscv/vector.md
15133 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
15134 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
15135 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
15136 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
15137 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
15138 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
15139 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
15141 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15144 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
15146 2023-06-16 Jakub Jelinek <jakub@redhat.com>
15148 PR middle-end/79173
15149 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
15150 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
15151 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
15153 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
15154 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
15155 * builtins.cc (fold_builtin_addc_subc): New function.
15156 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
15157 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
15159 2023-06-16 Jakub Jelinek <jakub@redhat.com>
15161 PR tree-optimization/110271
15162 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
15163 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
15164 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
15166 2023-06-16 Martin Jambor <mjambor@suse.cz>
15168 * configure: Regenerate.
15170 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
15171 Uros Bizjak <ubizjak@gmail.com>
15174 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
15175 define_insn_and_split combine *add<dwi>3_doubleword with
15176 a *concat<mode><dwi>3 for more efficient lowering after reload.
15178 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
15180 * ira-lives.cc: Include except.h.
15181 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
15182 when the pseudo does not live at the exception landing pad.
15184 2023-06-16 Alex Coplan <alex.coplan@arm.com>
15186 * doc/invoke.texi: Document -Welaborated-enum-base.
15188 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15190 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
15191 (ushrn2_n): ... This.
15192 (sqshrn2_n): Rename builtins to...
15193 (ssqshrn2_n): ... This.
15194 (uqshrn2_n): Rename builtins to...
15195 (uqushrn2_n): ... This.
15196 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
15197 (vqshrn_high_n_s32): Likewise.
15198 (vqshrn_high_n_s64): Likewise.
15199 (vqshrn_high_n_u16): Likewise.
15200 (vqshrn_high_n_u32): Likewise.
15201 (vqshrn_high_n_u64): Likewise.
15202 (vshrn_high_n_s16): Likewise.
15203 (vshrn_high_n_s32): Likewise.
15204 (vshrn_high_n_s64): Likewise.
15205 (vshrn_high_n_u16): Likewise.
15206 (vshrn_high_n_u32): Likewise.
15207 (vshrn_high_n_u64): Likewise.
15208 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
15210 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
15211 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
15212 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
15213 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
15214 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
15215 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
15216 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
15217 Update expander for the above.
15219 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15221 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
15222 (shrn2_n): ... This.
15223 (rshrn2): Rename builtins to...
15224 (rshrn2_n): ... This.
15225 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
15226 (vrshrn_high_n_s32): Likewise.
15227 (vrshrn_high_n_s64): Likewise.
15228 (vrshrn_high_n_u16): Likewise.
15229 (vrshrn_high_n_u32): Likewise.
15230 (vrshrn_high_n_u64): Likewise.
15231 (vshrn_high_n_s16): Likewise.
15232 (vshrn_high_n_s32): Likewise.
15233 (vshrn_high_n_s64): Likewise.
15234 (vshrn_high_n_u16): Likewise.
15235 (vshrn_high_n_u32): Likewise.
15236 (vshrn_high_n_u64): Likewise.
15237 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
15239 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
15240 (aarch64_shrn2<mode>_insn_le): Likewise.
15241 (aarch64_shrn2<mode>_insn_be): Likewise.
15242 (aarch64_shrn2<mode>): Likewise.
15243 (aarch64_rshrn2<mode>_insn_le): Likewise.
15244 (aarch64_rshrn2<mode>_insn_be): Likewise.
15245 (aarch64_rshrn2<mode>): Likewise.
15246 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
15247 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
15248 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
15249 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
15250 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
15251 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
15252 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
15253 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
15254 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
15255 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
15256 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
15257 (aarch64_sqshrun2_n<mode>): New define_expand.
15258 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
15259 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
15260 (aarch64_sqrshrun2_n<mode>): New define_expand.
15261 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
15262 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
15263 Delete unspec values.
15264 (VQSHRN_N): Delete int iterator.
15266 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15268 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
15269 * config/aarch64/aarch64-simd.md
15270 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
15271 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
15272 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
15273 * config/aarch64/iterators.md (shrn_s): New code attribute.
15275 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15277 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
15279 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
15280 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
15281 (aarch64_sqrshrun_n<mode>_insn): Likewise.
15282 (aarch64_sqshrun_n<mode>_insn): Likewise.
15283 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
15284 (aarch64_sqshrun_n<mode>): Likewise.
15285 (aarch64_sqrshrun_n<mode>): Likewise.
15286 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
15288 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15290 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
15291 (shrn_n): ... This.
15292 (rshrn): Rename builtins to...
15293 (rshrn_n): ... This.
15294 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
15295 (vshrn_n_s32): Likewise.
15296 (vshrn_n_s64): Likewise.
15297 (vshrn_n_u16): Likewise.
15298 (vshrn_n_u32): Likewise.
15299 (vshrn_n_u64): Likewise.
15300 (vrshrn_n_s16): Likewise.
15301 (vrshrn_n_s32): Likewise.
15302 (vrshrn_n_s64): Likewise.
15303 (vrshrn_n_u16): Likewise.
15304 (vrshrn_n_u32): Likewise.
15305 (vrshrn_n_u64): Likewise.
15306 * config/aarch64/aarch64-simd.md
15307 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
15308 (aarch64_shrn<mode>): Likewise.
15309 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
15310 (aarch64_rshrn<mode>): Likewise.
15311 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
15312 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
15313 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
15314 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
15315 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
15316 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
15317 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
15318 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
15319 (aarch64_sqshrun_n<mode>): Likewise.
15320 (aarch64_sqrshrun_n<mode>): Likewise.
15321 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
15322 (TRUNCEXTEND): New code attribute.
15323 (TRUNC_SHIFT): Likewise.
15324 (shrn_op): Likewise.
15325 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
15328 2023-06-16 Pan Li <pan2.li@intel.com>
15330 * config/riscv/riscv-vsetvl.cc
15331 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
15333 2023-06-16 Richard Biener <rguenther@suse.de>
15335 PR tree-optimization/110278
15336 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
15337 (x != (typeof x)(x == 0) -> true): Likewise.
15339 2023-06-16 Pali Rohár <pali@kernel.org>
15341 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
15342 (REAL_LIBGCC_SPEC): New define.
15343 * config/i386/mingw.opt: Add mcrtdll=
15344 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
15345 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
15346 (STARTFILE_SPEC): Adjust for -mcrtdll=.
15347 * doc/invoke.texi: Add mcrtdll= documentation.
15349 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
15351 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
15352 (mips_handle_code_readable_attr):New static function.
15353 (mips_get_code_readable_attr):New static enum function.
15354 (mips_set_current_function):Set the code_readable mode.
15355 (mips_option_override):Same as above.
15356 * doc/extend.texi:Document code_readable.
15358 2023-06-16 Richard Biener <rguenther@suse.de>
15360 PR tree-optimization/110269
15361 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
15362 with tree_expr_nonzero_p ...
15363 * match.pd (cmp (convert? addr@0) integer_zerop): With this
15366 2023-06-15 Marek Polacek <polacek@redhat.com>
15368 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
15369 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
15370 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
15371 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
15372 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
15374 * configure: Regenerate.
15375 * doc/install.texi: Document --enable-host-pie.
15377 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
15379 * regcprop.cc (maybe_mode_change): Enable stack pointer
15382 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
15384 PR tree-optimization/110266
15385 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
15387 (adjust_realpart_expr): Ditto.
15389 2023-06-15 Jan Beulich <jbeulich@suse.com>
15391 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
15394 2023-06-15 Jan Beulich <jbeulich@suse.com>
15396 * config/i386/constraints.md: Mention k and r for B.
15398 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
15399 Andrew Pinski <apinski@marvell.com>
15402 * config/loongarch/loongarch.md: Modify the register constraints for template
15403 "jumptable" and "indirect_jump" from "r" to "e".
15405 2023-06-15 Xi Ruoyao <xry111@xry111.site>
15407 * config/loongarch/loongarch-tune.h (loongarch_align): New
15409 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
15411 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
15413 * config/loongarch/loongarch.cc
15414 (loongarch_option_override_internal): Set the value of
15415 -falign-functions= if -falign-functions is enabled but no value
15416 is given. Likewise for -falign-labels=.
15418 2023-06-15 Jakub Jelinek <jakub@redhat.com>
15420 PR middle-end/79173
15421 * internal-fn.def (UADDC, USUBC): New internal functions.
15422 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
15423 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
15424 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
15425 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
15426 match_uaddc_usubc): New functions.
15427 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
15428 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
15429 other optimizations have been successful for those.
15430 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
15431 * fold-const-call.cc (fold_const_call): Likewise.
15432 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
15433 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
15434 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
15436 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
15437 define_expand patterns.
15438 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
15439 into NOTE_INSN_DELETED note rather than nop instruction.
15440 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
15443 2023-06-15 Jakub Jelinek <jakub@redhat.com>
15445 PR middle-end/79173
15446 * config/i386/i386.md (subborrow<mode>): Add alternative with
15447 memory destination and add for it define_peephole2
15448 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
15449 destination in these patterns.
15451 2023-06-15 Jakub Jelinek <jakub@redhat.com>
15453 PR middle-end/79173
15454 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
15455 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
15456 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
15457 using memory destination in these patterns.
15459 2023-06-15 Jakub Jelinek <jakub@redhat.com>
15461 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
15462 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
15463 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
15464 * fold-const-call.cc (fold_const_call): ... here.
15466 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15468 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
15469 Rename to <su>abd<mode>3.
15470 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
15473 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15475 * doc/md.texi (sabd, uabd): Document them.
15476 * internal-fn.def (ABD): Use new optab.
15477 * optabs.def (sabd_optab, uabd_optab): New optabs,
15478 * tree-vect-patterns.cc (vect_recog_absolute_difference):
15479 Recognize the following idiom abs (a - b).
15480 (vect_recog_sad_pattern): Refactor to use
15481 vect_recog_absolute_difference.
15482 (vect_recog_abd_pattern): Use patterns found by
15483 vect_recog_absolute_difference to build a new ABD
15486 2023-06-15 chenxiaolong <chenxl04200420@163.com>
15488 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
15489 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
15491 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15493 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
15494 (expand_vec_perm_const_1): Add merge optmization.
15496 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
15499 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
15500 (riscv_pass_by_reference): Return true for vector mode
15502 2023-06-15 Pan Li <pan2.li@intel.com>
15504 * config/riscv/autovec-opt.md: Align the predictor sytle.
15505 * config/riscv/autovec.md: Ditto.
15507 2023-06-15 Pan Li <pan2.li@intel.com>
15509 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
15510 Take elen instead of scalar BITS_PER_WORD.
15511 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
15512 instead of scaler BITS_PER_WORD.
15514 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
15516 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
15518 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15520 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
15521 Fix signed comparison warning in loop from npats to enelts.
15523 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
15525 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
15526 to offloading compilation.
15527 * config/gcn/mkoffload.cc (main): Adjust.
15528 * config/nvptx/mkoffload.cc (main): Likewise.
15529 * doc/invoke.texi (foffload-options): Update example.
15531 2023-06-14 liuhongt <hongtao.liu@intel.com>
15534 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
15535 for alternative 2 since there's no evex version for vpcmpeqd
15538 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
15540 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
15542 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
15544 * config/sh/divtab.cc: Remove.
15546 2023-06-13 Jakub Jelinek <jakub@redhat.com>
15548 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
15549 superfluous spaces around \t for vpcmpeqd.
15551 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
15553 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
15554 clearing vectors with only a single element. Set CLEARED if the
15555 vector was initialized to zero.
15557 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
15559 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
15562 (TUPLE_ENTRY): Undef.
15564 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15566 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
15567 (shuffle_generic_patterns): Ditto.
15568 (expand_vec_perm_const_1): Ditto.
15570 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15572 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
15573 (shuffle_decompress_patterns): Ditto.
15575 2023-06-13 Richard Biener <rguenther@suse.de>
15577 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
15579 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
15580 Kito Cheng <kito.cheng@sifive.com>
15582 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
15583 warning flag if func is not builtin
15584 * config/riscv/riscv.cc
15585 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
15586 (riscv_arg_has_vector): Determine whether the arg is vector type.
15587 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
15588 (riscv_init_cumulative_args): The same as header.
15589 (riscv_get_arg_info): Add the checking.
15590 (riscv_function_value): Check the func return and set warning flag
15591 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
15592 determine whether warning psabi or not.
15594 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15596 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
15597 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
15598 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
15599 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
15601 (arm_output_load_tpidr): Define.
15602 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
15603 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
15605 (reload_tp_hard): Likewise.
15606 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
15608 * doc/invoke.texi (Arm Options, mtp): Document new values.
15610 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15613 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
15614 AARCH64_TPIDRRO_EL0 value.
15615 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
15616 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
15617 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
15618 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
15620 2023-06-13 Alexandre Oliva <oliva@adacore.com>
15622 * range-op-float.cc (frange_nextafter): Drop inline.
15623 (frelop_early_resolve): Add static.
15624 (frange_float): Likewise.
15626 2023-06-13 Richard Biener <rguenther@suse.de>
15628 PR middle-end/110232
15629 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
15630 to check whether the buffer covers the whole vector.
15632 2023-06-13 Richard Biener <rguenther@suse.de>
15634 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
15635 .MASK_LOAD and friends set the size of the access to unknown.
15637 2023-06-13 Tejas Belagod <tbelagod@arm.com>
15640 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
15641 calls that have a constant input predicate vector.
15642 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
15643 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
15644 (svlast_impl::vect_all_same): Check if all vector elements are equal.
15646 2023-06-13 Andi Kleen <ak@linux.intel.com>
15648 * config/i386/gcc-auto-profile: Regenerate.
15650 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15652 * config/riscv/vector-iterators.md: Fix requirement.
15654 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15656 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
15657 (shuffle_decompress_patterns): New function.
15658 (expand_vec_perm_const_1): Add decompress optimization.
15660 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
15662 PR rtl-optimization/101188
15663 * postreload.cc (reload_cse_move2add_invalidate): New function,
15665 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
15667 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15669 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
15670 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
15671 and if maxv == 1, use constant element for duplicating into register.
15673 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
15675 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
15676 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
15677 (gimplify_adjust_omp_clauses): Change
15678 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
15679 GOMP_MAP_FORCE_PRESENT.
15680 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
15681 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
15682 to/from clauses with present modifier.
15684 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15686 PR tree-optimization/110205
15687 * range-op-float.cc (range_operator::fold_range): Add default FII
15689 * range-op-mixed.h (class operator_gt): Add missing final overrides.
15690 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
15691 (operator_lshift ::update_bitmask): Add final override.
15692 (operator_rshift ::update_bitmask): Add final override.
15693 * range-op.h (range_operator::fold_range): Add FII prototype.
15695 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15697 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
15698 Use range_op_handler directly.
15699 * range-op.cc (range_op_handler::range_op_handler): Unsigned
15700 param instead of tree-code.
15701 (ptr_op_widen_plus_signed): Delete.
15702 (ptr_op_widen_plus_unsigned): Delete.
15703 (ptr_op_widen_mult_signed): Delete.
15704 (ptr_op_widen_mult_unsigned): Delete.
15705 (range_op_table::initialize_integral_ops): Add new opcodes.
15706 * range-op.h (range_op_handler): Use unsigned.
15707 (OP_WIDEN_MULT_SIGNED): New.
15708 (OP_WIDEN_MULT_UNSIGNED): New.
15709 (OP_WIDEN_PLUS_SIGNED): New.
15710 (OP_WIDEN_PLUS_UNSIGNED): New.
15711 (RANGE_OP_TABLE_SIZE): New.
15712 (range_op_table::operator []): Use unsigned.
15713 (range_op_table::set): Use unsigned.
15714 (m_range_tree): Make unsigned.
15715 (ptr_op_widen_mult_signed): Remove.
15716 (ptr_op_widen_mult_unsigned): Remove.
15717 (ptr_op_widen_plus_signed): Remove.
15718 (ptr_op_widen_plus_unsigned): Remove.
15720 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15722 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
15723 manually as there is no access to the default operator.
15724 (cfn_copysign::fold_range): Don't check for validity.
15725 (cfn_ubsan::fold_range): Ditto.
15726 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
15727 * range-op.cc (default_operator): New.
15728 (range_op_handler::range_op_handler): Use default_operator
15730 (range_op_handler::operator bool): Move from header, compare
15731 against default operator.
15732 (range_op_handler::range_op): New.
15733 * range-op.h (range_op_handler::operator bool): Move.
15735 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15737 * range-op.cc (unified_table): Delete.
15738 (range_op_table operator_table): Instantiate.
15739 (range_op_table::range_op_table): Rename from unified_table.
15740 (range_op_handler::range_op_handler): Use range_op_table.
15741 * range-op.h (range_op_table::operator []): Inline.
15742 (range_op_table::set): Inline.
15744 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15746 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
15748 * gimple-range-op.cc (get_code): Rename from get_code_and_type
15750 (gimple_range_op_handler::supported_p): No need for type.
15751 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
15752 (cfn_copysign::fold_range): Ditto.
15753 (cfn_ubsan::fold_range): Ditto.
15754 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
15755 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
15756 * range-op-float.cc (operator_plus::op1_range): Ditto.
15757 (operator_mult::op1_range): Ditto.
15758 (range_op_float_tests): Ditto.
15759 * range-op.cc (get_op_handler): Remove.
15760 (range_op_handler::set_op_handler): Remove.
15761 (operator_plus::op1_range): No need for type.
15762 (operator_minus::op1_range): Ditto.
15763 (operator_mult::op1_range): Ditto.
15764 (operator_exact_divide::op1_range): Ditto.
15765 (operator_cast::op1_range): Ditto.
15766 (perator_bitwise_not::fold_range): Ditto.
15767 (operator_negate::fold_range): Ditto.
15768 * range-op.h (range_op_handler::range_op_handler): Remove type param.
15769 (range_cast): No need for type.
15770 (range_op_table::operator[]): Check for enum_code >= 0.
15771 * tree-data-ref.cc (compute_distributive_range): No need for type.
15772 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
15773 * value-query.cc (range_query::get_tree_range): Ditto.
15774 * value-relation.cc (relation_oracle::validate_relation): Ditto.
15775 * vr-values.cc (range_of_var_in_loop): Ditto.
15776 (simplify_using_ranges::fold_cond_with_ops): Ditto.
15778 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15780 * range-op-mixed.h (operator_max): Remove final.
15781 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
15782 (pointer_table::pointer_table): Remove.
15783 (class hybrid_max_operator): New.
15784 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
15785 * range-op.cc (pointer_tree_table): Remove.
15786 (unified_table::unified_table): Comment out MAX_EXPR.
15787 (get_op_handler): Remove check of pointer table.
15788 * range-op.h (class pointer_table): Remove.
15790 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15792 * range-op-mixed.h (operator_min): Remove final.
15793 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
15794 (class hybrid_min_operator): New.
15795 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
15796 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
15798 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15800 * range-op-mixed.h (operator_bitwise_or): Remove final.
15801 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
15802 (class hybrid_or_operator): New.
15803 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
15804 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
15806 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15808 * range-op-mixed.h (operator_bitwise_and): Remove final.
15809 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
15810 (class hybrid_and_operator): New.
15811 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
15812 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
15814 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15816 * Makefile.in (OBJS): Add range-op-ptr.o.
15817 * range-op-mixed.h (update_known_bitmask): Move prototype here.
15818 (minus_op1_op2_relation_effect): Move prototype here.
15819 (wi_includes_zero_p): Move function to here.
15820 (wi_zero_p): Ditto.
15821 * range-op.cc (update_known_bitmask): Remove static.
15822 (wi_includes_zero_p): Move to header.
15823 (wi_zero_p): Move to header.
15824 (minus_op1_op2_relation_effect): Remove static.
15825 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
15826 (pointer_plus_operator): Ditto.
15827 (pointer_min_max_operator): Ditto.
15828 (pointer_and_operator): Ditto.
15829 (pointer_or_operator): Ditto.
15830 (pointer_table): Ditto.
15831 (range_op_table::initialize_pointer_ops): Ditto.
15832 * range-op-ptr.cc: New.
15834 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15836 * range-op-mixed.h (class operator_max): Move from...
15837 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
15838 (get_op_handler): Remove the integral table.
15839 (class operator_max): Move from here.
15840 (integral_table::integral_table): Delete.
15841 * range-op.h (class integral_table): Delete.
15843 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15845 * range-op-mixed.h (class operator_min): Move from...
15846 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
15847 (class operator_min): Move from here.
15848 (integral_table::integral_table): Remove MIN_EXPR.
15850 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15852 * range-op-mixed.h (class operator_bitwise_or): Move from...
15853 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
15854 (class operator_bitwise_or): Move from here.
15855 (integral_table::integral_table): Remove BIT_IOR_EXPR.
15857 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15859 * range-op-mixed.h (class operator_bitwise_and): Move from...
15860 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
15861 (get_op_handler): Check for a pointer table entry first.
15862 (class operator_bitwise_and): Move from here.
15863 (integral_table::integral_table): Remove BIT_AND_EXPR.
15865 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15867 * range-op-mixed.h (class operator_bitwise_xor): Move from...
15868 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
15869 (class operator_bitwise_xor): Move from here.
15870 (integral_table::integral_table): Remove BIT_XOR_EXPR.
15871 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
15873 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15875 * range-op-mixed.h (class operator_bitwise_not): Move from...
15876 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
15877 (class operator_bitwise_not): Move from here.
15878 (integral_table::integral_table): Remove BIT_NOT_EXPR.
15879 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
15881 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15883 * range-op-mixed.h (class operator_addr_expr): Move from...
15884 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
15885 (class operator_addr_expr): Move from here.
15886 (integral_table::integral_table): Remove ADDR_EXPR.
15887 (pointer_table::pointer_table): Remove ADDR_EXPR.
15889 2023-06-12 Pan Li <pan2.li@intel.com>
15891 * config/riscv/riscv-vector-builtins-types.def
15892 (vfloat16m1_t): Add type to lmul1 ops.
15893 (vfloat16m2_t): Likewise.
15894 (vfloat16m4_t): Likewise.
15896 2023-06-12 Richard Biener <rguenther@suse.de>
15898 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
15899 .MASK_STORE and friend set the size of the access to
15902 2023-06-12 Tamar Christina <tamar.christina@arm.com>
15904 * config.in: Regenerate.
15905 * configure: Regenerate.
15906 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
15908 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15910 * config/riscv/autovec-opt.md
15911 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
15912 (*<any_shiftrt:optab>trunc<mode>): Ditto.
15913 * config/riscv/autovec.md (<optab><mode>3): Change to
15914 define_insn_and_split.
15915 (v<optab><mode>3): Ditto.
15916 (trunc<mode><v_double_trunc>2): Ditto.
15918 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15920 * simplify-rtx.cc (simplify_const_unary_operation):
15921 Handle US_TRUNCATE, SS_TRUNCATE.
15923 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
15926 * doc/gm2.texi (Standard procedures): Fix Next link.
15928 2023-06-12 Tamar Christina <tamar.christina@arm.com>
15930 * config.in: Regenerate.
15932 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
15934 PR middle-end/110142
15935 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
15936 subtype to vect_widened_op_tree and remove subtype parameter, also
15937 remove superfluous overloaded function definition.
15938 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
15939 to call to vect_recog_widen_op_pattern.
15940 (vect_recog_widen_minus_pattern): Likewise.
15942 2023-06-12 liuhongt <hongtao.liu@intel.com>
15944 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
15945 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
15946 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
15947 (vec_unpacks_lo_<mode>): Ditto.
15948 (vec_unpacks_hi_<mode>): Ditto.
15949 (sse_movlhps_<mode>): New define_insn.
15950 (ssse3_palignr<mode>_perm): Extend to V_128H.
15951 (V_128H): New mode iterator.
15952 (ssepackPHmode): New mode attribute.
15953 (vunpck_extract_mode): Ditto.
15954 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
15955 (vpckfloat_temp_mode): Ditto.
15956 (vpckfloat_op_mode): Ditto.
15957 (vunpckfixt_mode): Extend to VxHF.
15958 (vunpckfixt_model): Ditto.
15959 (vunpckfixt_extract_mode): Ditto.
15961 2023-06-12 Richard Biener <rguenther@suse.de>
15963 PR middle-end/110200
15964 * genmatch.cc (expr::gen_transform): Put braces around
15965 the if arm for the (convert ...) short-cut.
15967 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
15970 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
15971 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
15973 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
15976 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
15977 floating constant itself for real_to_target call.
15979 2023-06-12 Pan Li <pan2.li@intel.com>
15981 * config/riscv/riscv-vector-builtins-types.def
15982 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
15983 (vfloat16mf2_t): Ditto.
15984 (vfloat16m1_t): Ditto.
15985 (vfloat16m2_t): Ditto.
15986 (vfloat16m4_t): Ditto.
15988 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
15990 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
15991 Do not require a stack frame when debugging is enabled for AIX.
15993 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
15995 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
15996 Remove attribute values.
15997 (insv_notbit): New post-reload insn.
15998 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
15999 (*insv.not-bit.0_split, *insv.not-bit.7_split)
16000 (*insv.xor-extract_split): Split to insv_notbit.
16001 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
16002 (*insv.xor-extract): Remove post-reload insns.
16003 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
16004 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
16005 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
16006 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
16008 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
16011 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
16012 (MSB, SIZE): New mode attributes.
16013 (any_shift): New code iterator.
16014 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
16015 (*lshr<mode>3_const_split): Add constraint alternative for
16016 the case of shift-offset = MSB. Ditch "length" attribute.
16017 (extzv<mode): New. replaces extzv. Adjust following patterns.
16018 Use avr_out_extr, avr_out_extr_not to print asm.
16019 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
16020 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
16021 * config/avr/constraints.md (C15, C23, C31, Yil): New
16022 * config/avr/predicates.md (reg_or_low_io_operand)
16023 (const7_operand, reg_or_low_io_operand)
16024 (const15_operand, const_0_to_15_operand)
16025 (const23_operand, const_0_to_23_operand)
16026 (const31_operand, const_0_to_31_operand): New.
16027 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
16028 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
16029 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
16030 MSB case to new insn constraint "r" for operands[1].
16031 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
16032 Handle these cases.
16033 (avr_rtx_costs_1): Adjust cost for a new pattern.
16035 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16037 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
16038 (vector_insn_info::parse_insn): Add rtx_insn parse.
16039 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
16040 (get_first_vsetvl): New function.
16041 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
16042 (pass_vsetvl::cleanup_insns): Remove it.
16043 (pass_vsetvl::ssa_post_optimization): New function.
16044 (has_no_uses): Ditto.
16045 (pass_vsetvl::propagate_avl): Remove it.
16046 (pass_vsetvl::df_post_optimization): New function.
16047 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
16048 * config/riscv/riscv-vsetvl.h: Adapt declaration.
16050 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
16052 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
16053 (ipcp_vr_lattice::print): Call dump method.
16054 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
16056 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
16057 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
16059 (initialize_node_lattices): Pass type when appropriate.
16060 (ipa_vr_operation_and_type_effects): Make type agnostic.
16061 (ipa_value_range_from_jfunc): Same.
16062 (propagate_vr_across_jump_function): Same.
16063 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
16064 (evaluate_properties_for_edge): Same.
16065 * ipa-prop.cc (ipa_vr::get_vrange): Same.
16066 (ipcp_update_vr): Same.
16067 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
16068 (ipa_range_set_and_normalize): Same.
16070 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
16074 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
16075 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
16076 (avr_pass_data_ifelse): New pass_data for it.
16077 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
16078 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
16079 (avr_out_cmp_ext): New functions.
16080 (compare_condtition): Make sure REG_CC dies in the branch insn.
16081 (avr_rtx_costs_1): Add computation of cbranch costs.
16082 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
16083 [ADJUST_LEN_CMP_SEXT]Handle them.
16084 (TARGET_CANONICALIZE_COMPARISON): New define.
16085 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
16086 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
16087 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
16088 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
16089 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
16090 (avr_out_cmp_zext): New Protos
16091 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
16092 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
16093 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
16094 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
16095 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
16096 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
16097 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
16098 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
16099 (adjust_len) [add_set_ZN, cmp_zext]: New.
16100 (QIPSI): New mode iterator.
16101 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
16102 (gelt): New code iterator.
16103 (gelt_eqne): New code attribute.
16104 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
16105 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
16106 (*cmpqi_sign_extend): Remove insns.
16107 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
16108 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
16109 * config/avr/predicates.md (scratch_or_d_register_operand): New.
16110 * config/avr/constraints.md (Yxx): New constraint.
16112 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16114 * config/riscv/autovec.md (select_vl<mode>): New pattern.
16115 * config/riscv/riscv-protos.h (expand_select_vl): New function.
16116 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
16118 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16120 * range-op-float.cc (foperator_mult_div_base): Delete.
16121 (foperator_mult_div_base::find_range): Make static local function.
16122 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
16123 (operator_mult::op1_range): Rename from foperator_mult.
16124 (operator_mult::op2_range): Ditto.
16125 (operator_mult::rv_fold): Ditto.
16126 (float_table::float_table): Remove MULT_EXPR.
16127 (class foperator_div): Inherit from range_operator.
16128 (float_table::float_table): Delete.
16129 * range-op-mixed.h (class operator_mult): Combined from integer
16131 * range-op.cc (float_tree_table): Delete.
16132 (op_mult): New object.
16133 (unified_table::unified_table): Add MULT_EXPR.
16134 (get_op_handler): Do not check float table any longer.
16135 (class cross_product_operator): Move to range-op-mixed.h.
16136 (class operator_mult): Move to range-op-mixed.h.
16137 (integral_table::integral_table): Remove MULT_EXPR.
16138 (pointer_table::pointer_table): Remove MULT_EXPR.
16139 * range-op.h (float_table): Remove.
16141 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16143 * range-op-float.cc (foperator_negate): Remove. Move prototypes
16144 to range-op-mixed.h
16145 (operator_negate::fold_range): Rename from foperator_negate.
16146 (operator_negate::op1_range): Ditto.
16147 (float_table::float_table): Remove NEGATE_EXPR.
16148 * range-op-mixed.h (class operator_negate): Combined from integer
16150 * range-op.cc (op_negate): New object.
16151 (unified_table::unified_table): Add NEGATE_EXPR.
16152 (class operator_negate): Move to range-op-mixed.h.
16153 (integral_table::integral_table): Remove NEGATE_EXPR.
16154 (pointer_table::pointer_table): Remove NEGATE_EXPR.
16156 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16158 * range-op-float.cc (foperator_minus): Remove. Move prototypes
16159 to range-op-mixed.h
16160 (operator_minus::fold_range): Rename from foperator_minus.
16161 (operator_minus::op1_range): Ditto.
16162 (operator_minus::op2_range): Ditto.
16163 (operator_minus::rv_fold): Ditto.
16164 (float_table::float_table): Remove MINUS_EXPR.
16165 * range-op-mixed.h (class operator_minus): Combined from integer
16167 * range-op.cc (op_minus): New object.
16168 (unified_table::unified_table): Add MINUS_EXPR.
16169 (class operator_minus): Move to range-op-mixed.h.
16170 (integral_table::integral_table): Remove MINUS_EXPR.
16171 (pointer_table::pointer_table): Remove MINUS_EXPR.
16173 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16175 * range-op-float.cc (foperator_abs): Remove. Move prototypes
16176 to range-op-mixed.h
16177 (operator_abs::fold_range): Rename from foperator_abs.
16178 (operator_abs::op1_range): Ditto.
16179 (float_table::float_table): Remove ABS_EXPR.
16180 * range-op-mixed.h (class operator_abs): Combined from integer
16182 * range-op.cc (op_abs): New object.
16183 (unified_table::unified_table): Add ABS_EXPR.
16184 (class operator_abs): Move to range-op-mixed.h.
16185 (integral_table::integral_table): Remove ABS_EXPR.
16186 (pointer_table::pointer_table): Remove ABS_EXPR.
16188 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16190 * range-op-float.cc (foperator_plus): Remove. Move prototypes
16191 to range-op-mixed.h
16192 (operator_plus::fold_range): Rename from foperator_plus.
16193 (operator_plus::op1_range): Ditto.
16194 (operator_plus::op2_range): Ditto.
16195 (operator_plus::rv_fold): Ditto.
16196 (float_table::float_table): Remove PLUS_EXPR.
16197 * range-op-mixed.h (class operator_plus): Combined from integer
16199 * range-op.cc (op_plus): New object.
16200 (unified_table::unified_table): Add PLUS_EXPR.
16201 (class operator_plus): Move to range-op-mixed.h.
16202 (integral_table::integral_table): Remove PLUS_EXPR.
16203 (pointer_table::pointer_table): Remove PLUS_EXPR.
16205 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16207 * range-op-mixed.h (class operator_cast): Combined from integer
16209 * range-op.cc (op_cast): New object.
16210 (unified_table::unified_table): Add op_cast
16211 (class operator_cast): Move to range-op-mixed.h.
16212 (integral_table::integral_table): Remove op_cast
16213 (pointer_table::pointer_table): Remove op_cast.
16215 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16217 * range-op-float.cc (operator_cst::fold_range): New.
16218 * range-op-mixed.h (class operator_cst): Move from integer file.
16219 * range-op.cc (op_cst): New object.
16220 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
16221 (class operator_cst): Move to range-op-mixed.h.
16222 (integral_table::integral_table): Remove op_cst.
16223 (pointer_table::pointer_table): Remove op_cst.
16225 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16227 * range-op-float.cc (foperator_identity): Remove. Move prototypes
16228 to range-op-mixed.h
16229 (operator_identity::fold_range): Rename from foperator_identity.
16230 (operator_identity::op1_range): Ditto.
16231 (float_table::float_table): Remove fop_identity.
16232 * range-op-mixed.h (class operator_identity): Combined from integer
16234 * range-op.cc (op_identity): New object.
16235 (unified_table::unified_table): Add op_identity.
16236 (class operator_identity): Move to range-op-mixed.h.
16237 (integral_table::integral_table): Remove identity.
16238 (pointer_table::pointer_table): Remove identity.
16240 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16242 * range-op-float.cc (foperator_ge): Remove. Move prototypes
16243 to range-op-mixed.h
16244 (operator_ge::fold_range): Rename from foperator_ge.
16245 (operator_ge::op1_range): Ditto.
16246 (float_table::float_table): Remove GE_EXPR.
16247 * range-op-mixed.h (class operator_ge): Combined from integer
16249 * range-op.cc (op_ge): New object.
16250 (unified_table::unified_table): Add GE_EXPR.
16251 (class operator_ge): Move to range-op-mixed.h.
16252 (ge_op1_op2_relation): Fold into
16253 operator_ge::op1_op2_relation.
16254 (integral_table::integral_table): Remove GE_EXPR.
16255 (pointer_table::pointer_table): Remove GE_EXPR.
16256 * range-op.h (ge_op1_op2_relation): Delete.
16258 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16260 * range-op-float.cc (foperator_gt): Remove. Move prototypes
16261 to range-op-mixed.h
16262 (operator_gt::fold_range): Rename from foperator_gt.
16263 (operator_gt::op1_range): Ditto.
16264 (float_table::float_table): Remove GT_EXPR.
16265 * range-op-mixed.h (class operator_gt): Combined from integer
16267 * range-op.cc (op_gt): New object.
16268 (unified_table::unified_table): Add GT_EXPR.
16269 (class operator_gt): Move to range-op-mixed.h.
16270 (gt_op1_op2_relation): Fold into
16271 operator_gt::op1_op2_relation.
16272 (integral_table::integral_table): Remove GT_EXPR.
16273 (pointer_table::pointer_table): Remove GT_EXPR.
16274 * range-op.h (gt_op1_op2_relation): Delete.
16276 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16278 * range-op-float.cc (foperator_le): Remove. Move prototypes
16279 to range-op-mixed.h
16280 (operator_le::fold_range): Rename from foperator_le.
16281 (operator_le::op1_range): Ditto.
16282 (float_table::float_table): Remove LE_EXPR.
16283 * range-op-mixed.h (class operator_le): Combined from integer
16285 * range-op.cc (op_le): New object.
16286 (unified_table::unified_table): Add LE_EXPR.
16287 (class operator_le): Move to range-op-mixed.h.
16288 (le_op1_op2_relation): Fold into
16289 operator_le::op1_op2_relation.
16290 (integral_table::integral_table): Remove LE_EXPR.
16291 (pointer_table::pointer_table): Remove LE_EXPR.
16292 * range-op.h (le_op1_op2_relation): Delete.
16294 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16296 * range-op-float.cc (foperator_lt): Remove. Move prototypes
16297 to range-op-mixed.h
16298 (operator_lt::fold_range): Rename from foperator_lt.
16299 (operator_lt::op1_range): Ditto.
16300 (float_table::float_table): Remove LT_EXPR.
16301 * range-op-mixed.h (class operator_lt): Combined from integer
16303 * range-op.cc (op_lt): New object.
16304 (unified_table::unified_table): Add LT_EXPR.
16305 (class operator_lt): Move to range-op-mixed.h.
16306 (lt_op1_op2_relation): Fold into
16307 operator_lt::op1_op2_relation.
16308 (integral_table::integral_table): Remove LT_EXPR.
16309 (pointer_table::pointer_table): Remove LT_EXPR.
16310 * range-op.h (lt_op1_op2_relation): Delete.
16312 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16314 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
16315 to range-op-mixed.h
16316 (operator_equal::fold_range): Rename from foperator_not_equal.
16317 (operator_equal::op1_range): Ditto.
16318 (float_table::float_table): Remove NE_EXPR.
16319 * range-op-mixed.h (class operator_not_equal): Combined from integer
16321 * range-op.cc (op_equal): New object.
16322 (unified_table::unified_table): Add NE_EXPR.
16323 (class operator_not_equal): Move to range-op-mixed.h.
16324 (not_equal_op1_op2_relation): Fold into
16325 operator_not_equal::op1_op2_relation.
16326 (integral_table::integral_table): Remove NE_EXPR.
16327 (pointer_table::pointer_table): Remove NE_EXPR.
16328 * range-op.h (not_equal_op1_op2_relation): Delete.
16330 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16332 * range-op-float.cc (foperator_equal): Remove. Move prototypes
16333 to range-op-mixed.h
16334 (operator_equal::fold_range): Rename from foperator_equal.
16335 (operator_equal::op1_range): Ditto.
16336 (float_table::float_table): Remove EQ_EXPR.
16337 * range-op-mixed.h (class operator_equal): Combined from integer
16339 * range-op.cc (op_equal): New object.
16340 (unified_table::unified_table): Add EQ_EXPR.
16341 (class operator_equal): Move to range-op-mixed.h.
16342 (equal_op1_op2_relation): Fold into
16343 operator_equal::op1_op2_relation.
16344 (integral_table::integral_table): Remove EQ_EXPR.
16345 (pointer_table::pointer_table): Remove EQ_EXPR.
16346 * range-op.h (equal_op1_op2_relation): Delete.
16348 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
16350 * range-op-float.cc (class float_table): Move to header.
16351 (float_table::float_table): Move float only operators to...
16352 (range_op_table::initialize_float_ops): Here.
16353 * range-op-mixed.h: New.
16354 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
16356 (float_tree_table): Moved from range-op-float.cc.
16357 (unified_tree_table): New.
16358 (unified_table::unified_table): New. Call initialize routines.
16359 (get_op_handler): Check unified table first.
16360 (range_op_handler::range_op_handler): Handle no type constructor.
16361 (integral_table::integral_table): Move integral only operators to...
16362 (range_op_table::initialize_integral_ops): Here.
16363 (pointer_table::pointer_table): Move pointer only operators to...
16364 (range_op_table::initialize_pointer_ops): Here.
16365 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
16366 (get_bool_state): Ditto.
16367 (empty_range_varying): Ditto.
16368 (relop_early_resolve): Ditto.
16369 (class range_op_table): Add new init methods for range types.
16370 (class integral_table): Move declaration to here.
16371 (class pointer_table): Move declaration to here.
16372 (class float_table): Move declaration to here.
16374 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16375 Richard Sandiford <richard.sandiford@arm.com>
16376 Richard Biener <rguenther@suse.de>
16378 * doc/md.texi: Add SELECT_VL support.
16379 * internal-fn.def (SELECT_VL): Ditto.
16380 * optabs.def (OPTAB_D): Ditto.
16381 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
16382 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
16383 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
16384 (vectorizable_store): Ditto.
16385 (vectorizable_load): Ditto.
16386 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
16388 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
16391 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
16394 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
16396 * range-op.cc (range_cast): Move to...
16397 * range-op.h (range_cast): Here and add generic a version.
16399 2023-06-09 Marek Polacek <polacek@redhat.com>
16403 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
16404 warn about designated initializers in C only.
16406 2023-06-09 Andrew Pinski <apinski@marvell.com>
16408 PR tree-optimization/97711
16409 PR tree-optimization/110155
16410 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
16411 ((zero_one != 0) ? z <op> y : y): Likewise.
16413 2023-06-09 Andrew Pinski <apinski@marvell.com>
16415 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
16416 multiply rather than negation/bit_and.
16418 2023-06-09 Andrew Pinski <apinski@marvell.com>
16420 * match.pd (`X & -Y -> X * Y`): Allow for truncation
16421 and the same type for unsigned types.
16423 2023-06-09 Andrew Pinski <apinski@marvell.com>
16425 PR tree-optimization/110165
16426 PR tree-optimization/110166
16427 * match.pd (zero_one_valued_p): Don't accept
16428 signed 1-bit integers.
16430 2023-06-09 Richard Biener <rguenther@suse.de>
16432 * match.pd (two conversions in a row): Use element_precision
16433 to DTRT for VECTOR_TYPE.
16435 2023-06-09 Pan Li <pan2.li@intel.com>
16437 * config/riscv/riscv.md (enabled): Move to another place, and
16438 add fp_vector_disabled to the cond.
16439 (fp_vector_disabled): New attr defined for disabling fp.
16440 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
16442 2023-06-09 Pan Li <pan2.li@intel.com>
16444 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
16447 2023-06-09 liuhongt <hongtao.liu@intel.com>
16450 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
16451 view_convert_expr mask to signed type when folding pblendvb
16454 2023-06-09 liuhongt <hongtao.liu@intel.com>
16457 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
16458 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
16459 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
16461 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
16462 real codename for __builtin_ia32_pabs{b,w,d}.
16464 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
16466 * gimple-range-op.cc
16467 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
16468 (gimple_range_op_handler::maybe_builtin_call): Adjust.
16469 * gimple-range-op.h (operand1, operand2): Use m_operator.
16470 * range-op.cc (integral_table, pointer_table): Relocate.
16471 (get_op_handler): Rename from get_handler and handle all types.
16472 (range_op_handler::range_op_handler): Relocate.
16473 (range_op_handler::set_op_handler): Relocate and adjust.
16474 (range_op_handler::range_op_handler): Relocate.
16475 (dispatch_trio): New.
16476 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
16477 (range_op_handler::dispatch_kind): New.
16478 (range_op_handler::fold_range): Relocate and Use new dispatch value.
16479 (range_op_handler::op1_range): Ditto.
16480 (range_op_handler::op2_range): Ditto.
16481 (range_op_handler::lhs_op1_relation): Ditto.
16482 (range_op_handler::lhs_op2_relation): Ditto.
16483 (range_op_handler::op1_op2_relation): Ditto.
16484 (range_op_handler::set_op_handler): Use m_operator member.
16485 * range-op.h (range_op_handler::operator bool): Use m_operator.
16486 (range_op_handler::dispatch_kind): New.
16487 (range_op_handler::m_valid): Delete.
16488 (range_op_handler::m_int): Delete
16489 (range_op_handler::m_float): Delete
16490 (range_op_handler::m_operator): New.
16491 (range_op_table::operator[]): Relocate from .cc file.
16492 (range_op_table::set): Ditto.
16493 * value-range.h (class vrange): Make range_op_handler a friend.
16495 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
16497 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
16498 (cfn_pass_through_arg1): Adjust using statemenmt.
16499 (cfn_signbit): Change base class, adjust using statement.
16500 (cfn_copysign): Ditto.
16502 (cfn_sincos): Ditto.
16503 * range-op-float.cc (fold_range): Change class to range_operator.
16507 (lhs_op1_relation): Ditto.
16508 (lhs_op2_relation): Ditto.
16509 (op1_op2_relation): Ditto.
16510 (foperator_*): Ditto.
16511 (class float_table): New. Inherit from range_op_table.
16512 (floating_tree_table) Change to range_op_table pointer.
16513 (class floating_op_table): Delete.
16514 * range-op.cc (operator_equal): Adjust using statement.
16515 (operator_not_equal): Ditto.
16516 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
16517 (operator_minus, operator_cast): Ditto.
16518 (operator_bitwise_and, pointer_plus_operator): Ditto.
16519 (get_float_handle): Change return type.
16520 * range-op.h (range_operator_float): Delete. Relocate all methods
16521 into class range_operator.
16522 (range_op_handler::m_float): Change type to range_operator.
16523 (floating_op_table): Delete.
16524 (floating_tree_table): Change type.
16526 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
16528 * range-op.cc (range_operator::fold_range): Call virtual routine.
16529 (range_operator::update_bitmask): New.
16530 (operator_equal::update_bitmask): New.
16531 (operator_not_equal::update_bitmask): New.
16532 (operator_lt::update_bitmask): New.
16533 (operator_le::update_bitmask): New.
16534 (operator_gt::update_bitmask): New.
16535 (operator_ge::update_bitmask): New.
16536 (operator_ge::update_bitmask): New.
16537 (operator_plus::update_bitmask): New.
16538 (operator_minus::update_bitmask): New.
16539 (operator_pointer_diff::update_bitmask): New.
16540 (operator_min::update_bitmask): New.
16541 (operator_max::update_bitmask): New.
16542 (operator_mult::update_bitmask): New.
16543 (operator_div:operator_div):New.
16544 (operator_div::update_bitmask): New.
16545 (operator_div::m_code): New member.
16546 (operator_exact_divide::operator_exact_divide): New constructor.
16547 (operator_lshift::update_bitmask): New.
16548 (operator_rshift::update_bitmask): New.
16549 (operator_bitwise_and::update_bitmask): New.
16550 (operator_bitwise_or::update_bitmask): New.
16551 (operator_bitwise_xor::update_bitmask): New.
16552 (operator_trunc_mod::update_bitmask): New.
16553 (op_ident, op_unknown, op_ptr_min_max): New.
16554 (op_nop, op_convert): Delete.
16555 (op_ssa, op_paren, op_obj_type): Delete.
16556 (op_realpart, op_imagpart): Delete.
16557 (op_ptr_min, op_ptr_max): Delete.
16558 (pointer_plus_operator:update_bitmask): New.
16559 (range_op_table::set): Do not use m_code.
16560 (integral_table::integral_table): Adjust to single instances.
16561 * range-op.h (range_operator::range_operator): Delete.
16562 (range_operator::m_code): Delete.
16563 (range_operator::update_bitmask): New.
16565 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
16567 * range-op-float.cc (range_operator_float::fold_range): Return
16568 NAN of the result type.
16570 2023-06-08 Jakub Jelinek <jakub@redhat.com>
16572 * optabs.cc (expand_ffs): Add forward declaration.
16573 (expand_doubleword_clz): Rename to ...
16574 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
16575 handle also doubleword CTZ and FFS in addition to CLZ.
16576 (expand_unop): Adjust caller. Also call it for doubleword
16577 ctz_optab and ffs_optab.
16579 2023-06-08 Jakub Jelinek <jakub@redhat.com>
16582 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
16583 n_words == 2 recurse with mmx_ok as first argument rather than false.
16585 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
16587 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
16588 avoid sign extension/undefined behaviour when setting each bit.
16590 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
16591 Uros Bizjak <ubizjak@gmail.com>
16593 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
16594 Use new x86_stc instruction when the carry flag must be set.
16595 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
16596 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
16597 * config/i386/i386.h (TARGET_SLOW_STC): New define.
16598 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
16599 (x86_stc): New define_insn.
16600 (define_peephole2): Convert x86_stc into alternate implementation
16601 on pentium4 without -Os when a QImode register is available.
16602 (*x86_cmc): New define_insn.
16603 (define_peephole2): Convert *x86_cmc into alternate implementation
16604 on pentium4 without -Os when a QImode register is available.
16605 (*setccc): New define_insn_and_split for a no-op CCCmode move.
16606 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
16607 recognize (and eliminate) the carry flag being copied to itself.
16608 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
16609 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
16611 2023-06-07 Andrew Pinski <apinski@marvell.com>
16613 * match.pd: Fix comment for the
16614 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
16616 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
16617 Jeff Law <jlaw@ventanamicro.com>
16619 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
16620 (rotrsi3_sext): Expose generator.
16621 (rotlsi3 pattern): Hide generator.
16622 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
16624 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
16625 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
16626 (mulsi3, <optab>si3): Likewise.
16627 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
16628 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
16629 (<u>mulsidi3): Likewise.
16630 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
16631 (mulsi3_extended, <optab>si3_extended): Likewise.
16632 (splitter for shadd feeding divison): Update RTL pattern to account
16633 for changes in how 32 bit ops are expanded for TARGET_64BIT.
16634 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
16636 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
16639 * config/riscv/riscv.cc (riscv_print_operand): Calculate
16640 memmodel only when it is valid.
16642 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
16644 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
16645 for constant element of a vector.
16647 2023-06-07 Jakub Jelinek <jakub@redhat.com>
16649 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
16650 instead compare tree_nonzero_bits <= 1U rather than just == 1.
16652 2023-06-07 Alex Coplan <alex.coplan@arm.com>
16655 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
16657 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
16658 names for builtins.
16659 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
16660 setup if in_lto_p, just like we do for SVE.
16661 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
16662 (__arm_st64b): Delete.
16663 (__arm_st64bv): Delete.
16664 (__arm_st64bv0): Delete.
16666 2023-06-07 Alex Coplan <alex.coplan@arm.com>
16669 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
16670 Use input operand for the destination address.
16671 * config/aarch64/aarch64.md (st64b): Fix constraint on address
16674 2023-06-07 Alex Coplan <alex.coplan@arm.com>
16677 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
16678 Replace eight consecutive spaces with tabs.
16679 (aarch64_init_ls64_builtins): Likewise.
16680 (aarch64_expand_builtin_ls64): Likewise.
16681 * config/aarch64/aarch64.md (ld64b): Likewise.
16684 (st64bv0): Likewise.
16686 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
16688 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
16689 offset table pseudo to a general reg subset.
16691 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16693 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
16695 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
16697 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
16698 (aarch64_sqxtun2<mode>_le): Likewise.
16699 (aarch64_sqxtun2<mode>_be): Likewise.
16700 (aarch64_sqxtun2<mode>): Adjust for the above.
16701 (aarch64_sqmovun<mode>): New define_expand.
16702 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
16703 (half_mask): New mode attribute.
16704 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
16707 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16709 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
16711 (aarch64_addp<mode>_insn): ... This...
16712 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
16713 (aarch64_addp<mode>): New define_expand.
16715 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16717 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
16718 * config/riscv/riscv-v.cc
16719 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
16721 (rvv_builder::single_step_npatterns_p): New function.
16722 (rvv_builder::npatterns_all_equal_p): Ditto.
16723 (const_vec_all_in_range_p): Support POLY handling.
16724 (gen_const_vector_dup): Ditto.
16725 (emit_vlmax_gather_insn): Add vrgatherei16.
16726 (emit_vlmax_masked_gather_mu_insn): Ditto.
16727 (expand_const_vector): Add VLA SLP const vector support.
16728 (expand_vec_perm): Support POLY.
16729 (struct expand_vec_perm_d): New struct.
16730 (shuffle_generic_patterns): New function.
16731 (expand_vec_perm_const_1): Ditto.
16732 (expand_vec_perm_const): Ditto.
16733 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
16734 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
16736 2023-06-07 Andrew Pinski <apinski@marvell.com>
16738 PR middle-end/110117
16739 * expr.cc (expand_single_bit_test): Handle
16740 const_int from expand_expr.
16742 2023-06-07 Andrew Pinski <apinski@marvell.com>
16744 * expr.cc (do_store_flag): Rearrange the
16745 TER code so that it overrides the nonzero bits
16746 info if we had `a & POW2`.
16748 2023-06-07 Andrew Pinski <apinski@marvell.com>
16750 PR tree-optimization/110134
16751 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
16753 (-A CMP CST -> B CMP (-CST)): Likewise.
16755 2023-06-07 Andrew Pinski <apinski@marvell.com>
16757 PR tree-optimization/89263
16758 PR tree-optimization/99069
16759 PR tree-optimization/20083
16760 PR tree-optimization/94898
16761 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
16762 one of the operands are constant.
16764 2023-06-07 Andrew Pinski <apinski@marvell.com>
16766 * match.pd (zero_one_valued_p): Match 0 integer constant
16769 2023-06-07 Pan Li <pan2.li@intel.com>
16771 * config/riscv/riscv-vector-builtins-types.def
16772 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
16773 (vfloat32m1_t): Ditto.
16774 (vfloat32m2_t): Ditto.
16775 (vfloat32m4_t): Ditto.
16776 (vfloat32m8_t): Ditto.
16777 (vint16mf4_t): Ditto.
16778 (vint16mf2_t): Ditto.
16779 (vint16m1_t): Ditto.
16780 (vint16m2_t): Ditto.
16781 (vint16m4_t): Ditto.
16782 (vint16m8_t): Ditto.
16783 (vuint16mf4_t): Ditto.
16784 (vuint16mf2_t): Ditto.
16785 (vuint16m1_t): Ditto.
16786 (vuint16m2_t): Ditto.
16787 (vuint16m4_t): Ditto.
16788 (vuint16m8_t): Ditto.
16789 (vint32mf2_t): Ditto.
16790 (vint32m1_t): Ditto.
16791 (vint32m2_t): Ditto.
16792 (vint32m4_t): Ditto.
16793 (vint32m8_t): Ditto.
16794 (vuint32mf2_t): Ditto.
16795 (vuint32m1_t): Ditto.
16796 (vuint32m2_t): Ditto.
16797 (vuint32m4_t): Ditto.
16798 (vuint32m8_t): Ditto.
16800 2023-06-07 Jason Merrill <jason@redhat.com>
16803 * doc/invoke.texi: Document it.
16805 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
16807 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
16808 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
16809 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
16810 NOT (BITREVERSE x) as BITREVERSE (NOT x).
16811 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
16812 Optimize PARITY (BITREVERSE x) as PARITY x.
16813 Optimize BITREVERSE (BITREVERSE x) as x.
16814 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
16815 BITREVERSE of a constant integer at compile-time.
16816 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
16817 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
16818 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
16819 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
16820 Optimize COPYSIGN (x, ABS y) as ABS x.
16821 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
16822 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
16823 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
16824 arguments at compile-time.
16826 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
16828 * rtl.h (function_invariant_p): Change return type from int to bool.
16829 * reload1.cc (function_invariant_p): Change return type from
16830 int to bool and adjust function body accordingly.
16832 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16834 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
16835 (*single_<optab>mult_plus<mode>): Ditto.
16836 (*double_<optab>mult_plus<mode>): Ditto.
16837 (*sign_zero_extend_fma): Ditto.
16838 (*zero_sign_extend_fma): Ditto.
16839 * config/riscv/riscv-protos.h (enum insn_type): New enum.
16841 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
16842 Tobias Burnus <tobias@codesourcery.com>
16844 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
16845 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
16847 (omp_get_attachment): Handle map clauses with 'present' modifier.
16848 (omp_group_base): Likewise.
16849 (gimplify_scan_omp_clauses): Reorder present maps to come first.
16850 Set GOVD flags for present defaultmaps.
16851 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
16852 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
16854 (lower_omp_target): Handle map clauses with 'present' modifier.
16855 Handle 'to' and 'from' clauses with 'present'.
16856 * tree-core.h (enum omp_clause_defaultmap_kind): Add
16857 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
16858 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
16859 'from' clauses with 'present' modifier. Handle present defaultmap.
16860 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
16862 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
16864 * config/rs6000/genfusion.pl: Delete some dead code.
16866 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
16868 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
16870 (gen_ld_cmpi_p10): ... this.
16872 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
16875 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
16876 duplicate expression.
16878 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16880 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
16881 Handle unsigned reduc_plus_scal_ builtins.
16882 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
16883 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
16884 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
16885 __builtin_aarch64_reduc_plus_scal_v2di.
16886 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
16888 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16890 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
16891 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
16892 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
16894 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16896 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
16897 (aarch64_shrn<mode>_insn_be): Delete.
16898 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
16899 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
16900 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
16901 (aarch64_rshrn<mode>_insn_le): Delete.
16902 (aarch64_rshrn<mode>_insn_be): Delete.
16903 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
16904 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
16906 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16908 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
16910 (aarch64_pars_overlap_p): Likewise.
16911 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
16912 Express in terms of UNSPEC_ADDV.
16913 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
16914 (*aarch64_<su>addlv<mode>_reduction): Define.
16915 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
16916 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
16917 (aarch64_pars_overlap_p): Likewise.
16918 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
16919 (VQUADW): New mode attribute.
16920 (VWIDE2X_S): Likewise.
16922 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
16923 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
16925 2023-06-06 Richard Biener <rguenther@suse.de>
16927 PR middle-end/110055
16928 * gimplify.cc (gimplify_target_expr): Do not emit
16929 CLOBBERs for variables which have static storage duration
16930 after gimplifying their initializers.
16932 2023-06-06 Richard Biener <rguenther@suse.de>
16934 PR tree-optimization/109143
16935 * tree-ssa-structalias.cc (solution_set_expand): Avoid
16936 one bitmap iteration and optimize bit range setting.
16938 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
16940 PR bootstrap/110120
16941 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
16942 XVECEXP, not XEXP, to access first item of a PARALLEL.
16944 2023-06-06 Pan Li <pan2.li@intel.com>
16946 * config/riscv/riscv-vector-builtins-types.def
16947 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
16948 (vfloat16mf2_t): Likewise.
16949 (vfloat16m1_t): Likewise.
16950 (vfloat16m2_t): Likewise.
16951 (vfloat16m4_t): Likewise.
16952 (vfloat16m8_t): Likewise.
16953 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
16954 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
16956 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
16958 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
16959 for cfi reg/mem machmode
16960 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
16962 2023-06-06 Li Xu <xuli1@eswincomputing.com>
16964 * config/riscv/vector-iterators.md:
16965 Fix 'REQUIREMENT' for machine_mode 'MODE'.
16966 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
16967 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
16968 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
16970 2023-06-06 Pan Li <pan2.li@intel.com>
16972 * config/riscv/vector-iterators.md: Fix typo in mode attr.
16974 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
16975 Joel Hutton <joel.hutton@arm.com>
16977 * doc/generic.texi: Remove old tree codes.
16978 * expr.cc (expand_expr_real_2): Remove old tree code cases.
16979 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
16980 * optabs-tree.cc (optab_for_tree_code): Likewise.
16981 (supportable_half_widening_operation): Likewise.
16982 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
16983 * tree-inline.cc (estimate_operator_cost): Likewise.
16984 (op_symbol_code): Likewise.
16985 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
16986 (vect_analyze_data_ref_accesses): Likewise.
16987 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
16988 * cfgexpand.cc (expand_debug_expr): Likewise.
16989 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
16990 (supportable_widening_operation): Likewise.
16991 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
16993 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
16994 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
16995 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
16996 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
16997 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
16998 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
16999 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
17000 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
17002 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
17003 Joel Hutton <joel.hutton@arm.com>
17004 Tamar Christina <tamar.christina@arm.com>
17006 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
17008 (vec_widen_<su>add_lo_<mode>): ... to this.
17009 (vec_widen_<su>addl_hi_<mode>): Rename this ...
17010 (vec_widen_<su>add_hi_<mode>): ... to this.
17011 (vec_widen_<su>subl_lo_<mode>): Rename this ...
17012 (vec_widen_<su>sub_lo_<mode>): ... to this.
17013 (vec_widen_<su>subl_hi_<mode>): Rename this ...
17014 (vec_widen_<su>sub_hi_<mode>): ...to this.
17015 * doc/generic.texi: Document new IFN codes.
17016 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
17017 (commutative_binary_fn_p): Add widen_plus fn's.
17018 (widening_fn_p): New function.
17019 (narrowing_fn_p): New function.
17020 (direct_internal_fn_optab): Change visibility.
17021 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
17022 internal_fn that expands into multiple internal_fns for widening.
17023 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
17024 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
17025 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
17026 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
17027 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
17028 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
17029 (lookup_hilo_internal_fn): Likewise.
17030 (widening_fn_p): Likewise.
17031 (Narrowing_fn_p): Likewise.
17032 * optabs.cc (commutative_optab_p): Add widening plus optabs.
17033 * optabs.def (OPTAB_D): Define widen add, sub optabs.
17034 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
17035 patterns with a hi/lo or even/odd split.
17036 (vect_recog_sad_pattern): Refactor to use new IFN codes.
17037 (vect_recog_widen_plus_pattern): Likewise.
17038 (vect_recog_widen_minus_pattern): Likewise.
17039 (vect_recog_average_pattern): Likewise.
17040 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
17042 (supportable_widening_operation): Likewise.
17043 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
17045 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
17046 Joel Hutton <joel.hutton@arm.com>
17048 * tree-vect-patterns.cc: Add include for gimple-iterator.
17049 (vect_recog_widen_op_pattern): Refactor to use code_helper.
17050 (vect_gimple_build): New function.
17051 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
17053 (vectorizable_call): Likewise.
17054 (vect_gen_widened_results_half): Likewise.
17055 (vect_create_vectorized_demotion_stmts): Likewise.
17056 (vect_create_vectorized_promotion_stmts): Likewise.
17057 (vect_create_half_widening_stmts): Likewise.
17058 (vectorizable_conversion): Likewise.
17059 (supportable_widening_operation): Likewise.
17060 (supportable_narrowing_operation): Likewise.
17061 * tree-vectorizer.h (supportable_widening_operation): Change
17062 prototype to use code_helper.
17063 (supportable_narrowing_operation): Likewise.
17064 (vect_gimple_build): New function prototype.
17065 * tree.h (code_helper::safe_as_tree_code): New function.
17066 (code_helper::safe_as_fn_code): New function.
17068 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
17070 * wide-int.cc (wi::bitreverse_large): New function implementing
17071 bit reversal of an integer.
17072 * wide-int.h (wi::bitreverse): New (template) function prototype.
17073 (bitreverse_large): Prototype helper function/implementation.
17074 (wi::bitreverse): New template wrapper around bitreverse_large.
17076 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
17078 * rtl.h (print_rtl_single): Change return type from int to void.
17079 (print_rtl_single_with_indent): Ditto.
17080 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
17081 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
17082 (rtx_writer::print_rtx_operand_code_0): Ditto.
17083 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
17084 (rtx_writer::print_rtx_operand_code_i): Ditto.
17085 (rtx_writer::print_rtx_operand_code_u): Ditto.
17086 (rtx_writer::print_rtx_operand): Ditto.
17087 (rtx_writer::print_rtx): Ditto.
17088 (rtx_writer::finish_directive): Ditto.
17089 (print_rtl_single): Change return type from int to void
17090 and adjust function body accordingly.
17091 (rtx_writer::print_rtl_single_with_indent): Ditto.
17093 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
17095 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
17096 (reg_class_subset_p): Ditto.
17097 * reginfo.cc (reg_classes_intersect_p): Ditto.
17098 (reg_class_subset_p): Ditto.
17100 2023-06-05 Pan Li <pan2.li@intel.com>
17102 * config/riscv/riscv-vector-builtins-types.def
17103 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
17104 (vfloat32m1_t): Ditto.
17105 (vfloat32m2_t): Ditto.
17106 (vfloat32m4_t): Ditto.
17107 (vfloat32m8_t): Ditto.
17108 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
17109 (vint16mf2_t): Ditto.
17110 (vint16m1_t): Ditto.
17111 (vint16m2_t): Ditto.
17112 (vint16m4_t): Ditto.
17113 (vint16m8_t): Ditto.
17114 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
17115 (vuint16mf2_t): Ditto.
17116 (vuint16m1_t): Ditto.
17117 (vuint16m2_t): Ditto.
17118 (vuint16m4_t): Ditto.
17119 (vuint16m8_t): Ditto.
17120 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
17121 (vint32m1_t): Ditto.
17122 (vint32m2_t): Ditto.
17123 (vint32m4_t): Ditto.
17124 (vint32m8_t): Ditto.
17125 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
17126 (vuint32m1_t): Ditto.
17127 (vuint32m2_t): Ditto.
17128 (vuint32m4_t): Ditto.
17129 (vuint32m8_t): Ditto.
17130 * config/riscv/vector-iterators.md: Add FP=16 support for V,
17131 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
17133 2023-06-05 Andrew Pinski <apinski@marvell.com>
17135 PR bootstrap/110085
17136 * Makefile.in (clean): Remove the removing of
17137 MULTILIB_DIR/MULTILIB_OPTIONS directories.
17139 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
17141 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
17143 * config/mips/mips.cc (speculation_barrier_libfunc): New static
17145 (mips_init_libfuncs): Initialize it.
17146 (mips_emit_speculation_barrier): New function.
17147 * config/mips/mips.md (speculation_barrier): Call
17148 mips_emit_speculation_barrier.
17150 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17152 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
17153 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
17154 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
17155 (rvv_builder::get_merged_repeating_sequence): Ditto.
17156 (rvv_builder::get_merge_scalar_mask): Ditto.
17157 (emit_scalar_move_insn): Ditto.
17158 (emit_vlmax_integer_move_insn): Ditto.
17159 (emit_nonvlmax_integer_move_insn): Ditto.
17160 (emit_vlmax_gather_insn): Ditto.
17161 (emit_vlmax_masked_gather_mu_insn): Ditto.
17162 (get_repeating_sequence_dup_machine_mode): Ditto.
17164 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17166 * config/riscv/autovec.md: Split arguments.
17167 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
17168 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
17170 2023-06-04 Andrew Pinski <apinski@marvell.com>
17172 * expr.cc (do_store_flag): Improve for single bit testing
17173 not against zero but against that single bit.
17175 2023-06-04 Andrew Pinski <apinski@marvell.com>
17177 * expr.cc (do_store_flag): Extend the one bit checking case
17178 to handle the case where we don't have an and but rather still
17179 one bit is known to be non-zero.
17181 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
17183 * config/h8300/constraints.md (Zz): Make this a normal
17185 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
17186 * config/h8300/logical.md (H8/SX bit patterns): Remove.
17188 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17190 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
17191 New insn_and_split patterns.
17193 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17196 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
17197 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
17198 (@vlmul_extx4<mode>): Ditto.
17199 (@vlmul_extx8<mode>): Ditto.
17200 (@vlmul_extx16<mode>): Ditto.
17201 (@vlmul_extx32<mode>): Ditto.
17202 (@vlmul_extx64<mode>): Ditto.
17203 (*vlmul_extx2<mode>): Ditto.
17204 (*vlmul_extx4<mode>): Ditto.
17205 (*vlmul_extx8<mode>): Ditto.
17206 (*vlmul_extx16<mode>): Ditto.
17207 (*vlmul_extx32<mode>): Ditto.
17208 (*vlmul_extx64<mode>): Ditto.
17210 2023-06-04 Pan Li <pan2.li@intel.com>
17212 * config/riscv/riscv-vector-builtins-types.def
17213 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
17214 (vfloat32m1_t): Likewise.
17215 (vfloat32m2_t): Likewise.
17216 (vfloat32m4_t): Likewise.
17217 (vfloat32m8_t): Likewise.
17218 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
17219 * config/riscv/vector-iterators.md: Add single to half machine
17222 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17224 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
17225 (*n<optab><mode>): Ditto.
17226 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
17227 (*n<optab><mode>): Ditto.
17228 * config/riscv/vector.md: Ditto.
17230 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
17233 * config/i386/i386-features.cc (scalar_chain::convert_compare):
17234 Update or delete REG_EQUAL notes, converting CONST_INT and
17235 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
17237 2023-06-04 Jason Merrill <jason@redhat.com>
17240 * tree-eh.cc (lower_resx): Pass the exception pointer to the
17242 * except.h: Tweak comment.
17244 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
17246 * postreload.cc (move2add_use_add2_insn): Handle
17247 trivial single_sets. Rename variable PAT to SET.
17248 (move2add_use_add3_insn, reload_cse_move2add): Similar.
17250 2023-06-04 Pan Li <pan2.li@intel.com>
17252 * config/riscv/riscv-vector-builtins-types.def
17253 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
17254 (vfloat16mf2_t): Likewise.
17255 (vfloat16m1_t): Likewise.
17256 (vfloat16m2_t): Likewise.
17257 (vfloat16m4_t): Likewise.
17258 (vfloat16m8_t): Likewise.
17259 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
17260 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
17261 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
17262 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
17265 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
17267 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
17270 2023-06-03 Die Li <lidie@eswincomputing.com>
17272 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
17274 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17276 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
17278 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17280 * config/riscv/vector.md: Add vector-opt.md.
17281 * config/riscv/autovec-opt.md: New file.
17283 2023-06-03 liuhongt <hongtao.liu@intel.com>
17285 PR tree-optimization/110067
17286 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
17287 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
17289 2023-06-03 liuhongt <hongtao.liu@intel.com>
17292 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
17293 (truncv2si<mode>2): Ditto.
17295 2023-06-02 Andrew Pinski <apinski@marvell.com>
17297 PR rtl-optimization/102733
17298 * dse.cc (store_info): Add addrspace field.
17299 (record_store): Record the address space
17300 and check to make sure they are the same.
17302 2023-06-02 Andrew Pinski <apinski@marvell.com>
17304 PR rtl-optimization/110042
17305 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
17306 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
17308 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
17311 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
17312 Make sure that we do not have a cap on field alignment before altering
17313 the struct layout based on the type alignment of the first entry.
17315 2023-06-02 David Faust <david.faust@oracle.com>
17318 * btfout.cc (btf_absolute_func_id): New function.
17319 (btf_asm_func_type): Call it here. Change index parameter from
17320 size_t to ctf_id_t. Use PRIu64 formatter.
17322 2023-06-02 Alex Coplan <alex.coplan@arm.com>
17324 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
17325 (btf_asm_datasec_type): Likewise.
17327 2023-06-02 Carl Love <cel@us.ibm.com>
17329 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
17330 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
17332 2023-06-02 Jason Merrill <jason@redhat.com>
17336 * tree.h (DECL_MERGEABLE): New.
17337 * tree-core.h (struct tree_decl_common): Mention it.
17338 * gimplify.cc (gimplify_init_constructor): Check it.
17339 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
17340 * varasm.cc (categorize_decl_for_section): Likewise.
17342 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
17344 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
17345 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
17346 (stack_regs_mentioned_p): Change return type from int to bool
17347 and adjust function body accordingly.
17348 (stack_regs_mentioned): Ditto.
17349 (check_asm_stack_operands): Ditto. Change "malformed_asm"
17351 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
17352 (swap_rtx_condition_1): Change return type from int to bool
17353 and adjust function body accordingly. Change "r" variable to bool.
17354 (swap_rtx_condition): Change return type from int to bool
17355 and adjust function body accordingly.
17356 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
17357 (subst_stack_regs): Ditto.
17358 (convert_regs_entry): Change return type from int to bool and adjust
17359 function body accordingly. Change "inserted" variable to bool.
17360 (convert_regs_1): Recode handling of control_flow_insn_deleted.
17361 (convert_regs_2): Recode handling of cfg_altered.
17362 (convert_regs): Ditto. Change "inserted" variable to bool.
17364 2023-06-02 Jason Merrill <jason@redhat.com>
17367 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
17368 (initializer_constant_valid_p_1): Compare float precision.
17370 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
17372 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
17375 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17377 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
17378 (vect_set_loop_condition_partial_vectors): Ditto.
17380 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
17383 * config/avr/avr.md: Add an RTL peephole to optimize operations on
17384 non-LD_REGS after a move from LD_REGS.
17385 (piaop): New code iterator.
17387 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
17390 * doc/install.texi: Document (optional) Perl usage for parallel
17391 testing of libgomp.
17393 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
17396 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
17399 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17400 KuanLin Chen <best124612@gmail.com>
17402 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
17403 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
17405 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17407 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
17409 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17411 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
17413 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17415 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
17417 (DEF_RVV_FRM_ENUM): Ditto.
17419 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17421 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
17422 intrinsic API expander
17423 * config/riscv/vector.md
17424 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
17425 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
17426 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
17428 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17430 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
17431 * config/riscv/predicates.md (vector_perm_operand): New predicate.
17432 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17433 (expand_vec_perm): New function.
17434 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
17435 (gen_const_vector_dup): Ditto.
17436 (emit_vlmax_gather_insn): Ditto.
17437 (emit_vlmax_masked_gather_mu_insn): Ditto.
17438 (expand_vec_perm): Ditto.
17440 2023-06-01 Jason Merrill <jason@redhat.com>
17442 * doc/invoke.texi (-Wpedantic): Improve clarity.
17444 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
17446 * rtl.h (exp_equiv_p): Change return type from int to bool.
17447 * cse.cc (mention_regs): Change return type from int to bool
17448 and adjust function body accordingly.
17449 (exp_equiv_p): Ditto.
17450 (insert_regs): Ditto. Change "modified" function argument to bool
17451 and update usage accordingly.
17452 (record_jump_cond): Remove always zero "reversed_nonequality"
17453 function argument and update usage accordingly.
17454 (fold_rtx): Change "changed" variable to bool.
17455 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
17456 (is_dead_reg): Change return type from int to bool.
17458 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17460 * config/xtensa/xtensa.md (adddi3, subdi3):
17461 New RTL generation patterns implemented according to the instruc-
17462 tion idioms described in the Xtensa ISA reference manual (p. 600).
17464 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
17465 Uros Bizjak <ubizjak@gmail.com>
17468 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
17469 CODE_for_sse4_1_ptestzv2di.
17470 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
17471 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
17472 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
17473 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
17474 when expanding UNSPEC_PTEST to compare against zero.
17475 * config/i386/i386-features.cc (scalar_chain::convert_compare):
17476 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
17477 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
17478 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
17479 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
17480 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
17481 check for suitable matching modes for the UNSPEC_PTEST pattern.
17482 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
17483 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
17484 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
17485 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
17486 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
17487 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
17488 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
17490 (*ptest<mode>_and): Specify CCZ to only perform this optimization
17491 when only the Z flag is required.
17493 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
17496 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
17498 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17500 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
17501 Add =r,m and =r,m alternatives.
17502 (load_pair<DREG:mode><DREG2:mode>): Likewise.
17503 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
17505 2023-06-01 Pan Li <pan2.li@intel.com>
17507 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
17509 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
17510 (main): Disable FP16 tuple.
17511 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
17512 (TARGET_VECTOR_ELEN_FP_16): Ditto.
17513 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
17515 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
17516 (vfloat16mf2_t): Ditto.
17517 (vfloat16m1_t): Ditto.
17518 (vfloat16m2_t): Ditto.
17519 (vfloat16m4_t): Ditto.
17520 (vfloat16m8_t): Ditto.
17521 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
17523 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
17524 machine mode based on TARGET_VECTOR_ELEN_FP_16.
17526 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17528 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
17529 (DEF_RVV_FRM_ENUM): New macro.
17530 (handle_pragma_vector): Add FRM enum
17531 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
17538 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
17539 Richard Sandiford <richard.sandiford@arm.com>
17541 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
17542 Update call to wi::bswap.
17543 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
17544 Update call to wi::bswap.
17545 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
17546 Update calls to wi::bswap.
17547 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
17548 (wi::bswap_large): New function, with revised API.
17549 * wide-int.h (wi::bswap): New (template) function prototype.
17550 (wide_int_storage::bswap): Remove method.
17551 (sext_large, zext_large): Consistent indentation/line wrapping.
17552 (bswap_large): Prototype helper function containing implementation.
17553 (wi::bswap): New template wrapper around bswap_large.
17555 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17558 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
17559 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
17560 (usdot_prod<vsi2qi>): Rename to...
17561 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
17562 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
17563 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
17564 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
17565 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
17566 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
17567 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
17570 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17573 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
17574 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
17575 (aarch64_sq<r>dmulh_n<mode>): Rename to...
17576 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
17577 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
17578 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
17579 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
17580 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
17581 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
17582 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
17583 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
17584 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
17585 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
17586 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
17588 2023-05-31 David Faust <david.faust@oracle.com>
17590 * btfout.cc (btf_kind_names): New.
17591 (btf_kind_name): New.
17592 (btf_absolute_var_id): New utility function.
17593 (btf_relative_var_id): Likewise.
17594 (btf_relative_func_id): Likewise.
17595 (btf_absolute_datasec_id): Likewise.
17596 (btf_asm_type_ref): New.
17597 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
17598 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
17599 (btf_asm_varent): Likewise.
17600 (btf_asm_func_arg): Likewise.
17601 (btf_asm_datasec_entry): Likewise.
17602 (btf_asm_datasec_type): Likewise.
17603 (btf_asm_func_type): Likewise. Add index parameter.
17604 (btf_asm_enum_const): Likewise.
17605 (btf_asm_sou_member): Likewise.
17606 (output_btf_vars): Update btf_asm_* call accordingly.
17607 (output_asm_btf_sou_fields): Likewise.
17608 (output_asm_btf_enum_list): Likewise.
17609 (output_asm_btf_func_args_list): Likewise.
17610 (output_asm_btf_vlen_bytes): Likewise.
17611 (output_btf_func_types): Add ctf_container_ref parameter.
17612 Pass it to btf_asm_func_type.
17613 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
17614 (btf_output): Update output_btf_func_types call similarly.
17616 2023-05-31 David Faust <david.faust@oracle.com>
17618 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
17619 and BTF_KIND_FWD which do not use the size/type field at all.
17621 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
17623 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
17624 (active_insn_p): Ditto.
17625 (in_sequence_p): Ditto.
17626 (unshare_all_rtl): Change return type from int to void.
17627 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
17628 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
17629 and adjust function body accordingly.
17630 (mem_expr_equal_p): Ditto.
17631 (unshare_all_rtl): Change return type from int to void
17632 and adjust function body accordingly.
17633 (verify_rtx_sharing): Remove unneeded return.
17634 (active_insn_p): Change return type from int to bool
17635 and adjust function body accordingly.
17636 (in_sequence_p): Ditto.
17638 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
17640 * rtl.h (true_dependence): Change return type from int to bool.
17641 (canon_true_dependence): Ditto.
17642 (read_dependence): Ditto.
17643 (anti_dependence): Ditto.
17644 (canon_anti_dependence): Ditto.
17645 (output_dependence): Ditto.
17646 (canon_output_dependence): Ditto.
17647 (may_alias_p): Ditto.
17648 * alias.h (alias_sets_conflict_p): Ditto.
17649 (alias_sets_must_conflict_p): Ditto.
17650 (objects_must_conflict_p): Ditto.
17651 (nonoverlapping_memrefs_p): Ditto.
17652 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
17653 (record_set): Ditto.
17654 (base_alias_check): Ditto.
17655 (find_base_value): Ditto.
17656 (mems_in_disjoint_alias_sets_p): Ditto.
17657 (get_alias_set_entry): Ditto.
17658 (decl_for_component_ref): Ditto.
17659 (write_dependence_p): Ditto.
17660 (memory_modified_1): Ditto.
17661 (mems_in_disjoint_alias_set_p): Change return type from int to bool
17662 and adjust function body accordingly.
17663 (alias_sets_conflict_p): Ditto.
17664 (alias_sets_must_conflict_p): Ditto.
17665 (objects_must_conflict_p): Ditto.
17666 (rtx_equal_for_memref_p): Ditto.
17667 (base_alias_check): Ditto.
17668 (read_dependence): Ditto.
17669 (nonoverlapping_memrefs_p): Ditto.
17670 (true_dependence_1): Ditto.
17671 (true_dependence): Ditto.
17672 (canon_true_dependence): Ditto.
17673 (write_dependence_p): Ditto.
17674 (anti_dependence): Ditto.
17675 (canon_anti_dependence): Ditto.
17676 (output_dependence): Ditto.
17677 (canon_output_dependence): Ditto.
17678 (may_alias_p): Ditto.
17679 (init_alias_analysis): Change "changed" variable to bool.
17681 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17683 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
17684 expand into define_insn_and_split.
17686 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17688 * config/riscv/vector.md: Remove FRM.
17690 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17692 * config/riscv/vector.md: Remove FRM.
17694 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17696 * config/riscv/vector.md: Remove FRM.
17698 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
17701 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
17704 2023-05-31 Richard Biener <rguenther@suse.de>
17707 PR tree-optimization/109143
17708 * tree-ssa-structalias.cc (struct topo_info): Remove.
17709 (init_topo_info): Likewise.
17710 (free_topo_info): Likewise.
17711 (compute_topo_order): Simplify API, put the component
17712 with ESCAPED last so it's processed first.
17713 (topo_visit): Adjust.
17714 (solve_graph): Likewise.
17716 2023-05-31 Richard Biener <rguenther@suse.de>
17718 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
17720 (add_graph_edge): Count redundant edges we avoid to create.
17721 (dump_sa_stats): Dump them.
17722 (ipa_pta_execute): Do not dump generating constraints when
17723 we are not dumping them.
17725 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17727 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
17728 output template to avoid explicit switch on which_alternative.
17729 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
17730 (and<mode>3): Likewise.
17731 (ior<mode>3): Likewise.
17732 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
17734 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17736 * config/xtensa/predicates.md (xtensa_bit_join_operator):
17738 * config/xtensa/xtensa.md (ior_op): Remove.
17739 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
17740 insn_and_split pattern of the same name to express and capture
17741 the bit-combining operation with both sides swapped.
17742 In addition, replace use of code iterator with new operator
17744 (*shlrd_const, *shlrd_per_byte):
17745 Likewise regarding the code iterator.
17747 2023-05-31 Cui, Lili <lili.cui@intel.com>
17749 PR tree-optimization/110038
17750 * params.opt: Add a limit on tree-reassoc-width.
17751 * tree-ssa-reassoc.cc
17752 (rewrite_expr_tree_parallel): Add width limit.
17754 2023-05-31 Pan Li <pan2.li@intel.com>
17756 * common/config/riscv/riscv-common.cc:
17757 (riscv_implied_info): Add zvfh item.
17758 (riscv_ext_version_table): Ditto.
17759 (riscv_ext_flag_table): Ditto.
17760 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
17761 (TARGET_ZVFH): Ditto.
17763 2023-05-30 liuhongt <hongtao.liu@intel.com>
17765 PR tree-optimization/108804
17766 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
17767 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
17768 Add new parameter narrow_src_p.
17769 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
17770 vectorization by truncating to lower precision.
17771 * tree-vectorizer.h (vect_get_range_info): New declare.
17773 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
17775 * lra-int.h (lra_update_sp_offset): Add the prototype.
17776 * lra.cc (setup_sp_offset): Change the return type. Use
17777 lra_update_sp_offset.
17778 * lra-eliminations.cc (lra_update_sp_offset): New function.
17779 (lra_process_new_insns): Push the current insn to reprocess if the
17780 input reload changes sp offset.
17782 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
17785 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
17786 Fix misleading identation.
17788 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
17790 * rtl.h (comparison_dominates_p): Change return type from int to bool.
17791 (condjump_p): Ditto.
17792 (any_condjump_p): Ditto.
17793 (any_uncondjump_p): Ditto.
17794 (simplejump_p): Ditto.
17795 (returnjump_p): Ditto.
17796 (eh_returnjump_p): Ditto.
17797 (onlyjump_p): Ditto.
17798 (invert_jump_1): Ditto.
17799 (invert_jump): Ditto.
17800 (rtx_renumbered_equal_p): Ditto.
17801 (redirect_jump_1): Ditto.
17802 (redirect_jump): Ditto.
17803 (condjump_in_parallel_p): Ditto.
17804 * jump.cc (invert_exp_1): Adjust forward declaration.
17805 (comparison_dominates_p): Change return type from int to bool
17806 and adjust function body accordingly.
17807 (simplejump_p): Ditto.
17808 (condjump_p): Ditto.
17809 (condjump_in_parallel_p): Ditto.
17810 (any_uncondjump_p): Ditto.
17811 (any_condjump_p): Ditto.
17812 (returnjump_p): Ditto.
17813 (eh_returnjump_p): Ditto.
17814 (onlyjump_p): Ditto.
17815 (redirect_jump_1): Ditto.
17816 (redirect_jump): Ditto.
17817 (invert_exp_1): Ditto.
17818 (invert_jump_1): Ditto.
17819 (invert_jump): Ditto.
17820 (rtx_renumbered_equal_p): Ditto.
17822 2023-05-30 Andrew Pinski <apinski@marvell.com>
17824 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
17825 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
17826 Add ne as a possible cmp.
17827 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
17829 2023-05-30 Andrew Pinski <apinski@marvell.com>
17831 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
17834 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
17836 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
17837 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
17838 (and (extend X) C) as (zero_extend (and X C)), to also optimize
17839 modes wider than HOST_WIDE_INT.
17841 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
17844 * simplify-rtx.cc (simplify_const_relational_operation): Return
17845 early if we have a MODE_CC comparison that isn't a COMPARE against
17848 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
17850 * config/riscv/riscv.cc (riscv_const_insns): Allow
17851 const_vec_duplicates.
17853 2023-05-30 liuhongt <hongtao.liu@intel.com>
17855 PR middle-end/108938
17856 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
17857 function, cut from original find_bswap_or_nop function.
17858 (find_bswap_or_nop): Add a new parameter, detect bswap +
17859 rotate and save rotate result in the new parameter.
17860 (bswap_replace): Add a new parameter to indicate rotate and
17861 generate rotate stmt if needed.
17862 (maybe_optimize_vector_constructor): Adjust for new rotate
17863 parameter in the upper 2 functions.
17864 (pass_optimize_bswap::execute): Ditto.
17865 (imm_store_chain_info::output_merged_store): Ditto.
17867 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17869 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
17870 (aarch64_<su>adalp<mode>): New define_expand.
17871 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
17872 (aarch64_<su>addlp<mode>): Convert to define_expand.
17873 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
17874 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
17876 (USADDLP): Likewise.
17877 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
17879 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17881 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
17882 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
17883 srhadd, urhadd builtin codes for standard optab ones.
17884 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
17885 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
17887 (<u>avg<mode>3_ceil): Rename to...
17888 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
17890 (aarch64_<su>hsub<mode>): New define_expand.
17891 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
17892 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
17893 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
17895 2023-05-30 Andreas Schwab <schwab@suse.de>
17898 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
17899 match libsanitizer.
17901 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17903 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
17904 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
17906 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
17907 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
17908 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
17909 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
17910 (aarch64_<sra_op>sra_n<mode>): New define_expand.
17911 (aarch64_<sra_op>rsra_n<mode>): Likewise.
17912 (aarch64_<sur>sra_n<mode>): Rename to...
17913 (aarch64_<sur>sra_ndi): ... This.
17914 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
17915 any_target_p argument.
17916 (aarch64_extract_vec_duplicate_wide_int): Define.
17917 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
17918 (aarch64_const_vec_rnd_cst_p): Likewise.
17919 (aarch64_vector_mode_supported_any_target_p): Likewise.
17920 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
17921 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
17922 (VSRA): Adjust for the above.
17924 (V2XWIDE): New mode_attr.
17925 (vec_or_offset): Likewise.
17926 (SHIFTEXTEND): Likewise.
17927 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
17929 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
17930 clarify that it applies to current target options.
17931 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
17932 * doc/tm.texi.in: Regenerate.
17933 * stor-layout.cc (mode_for_vector): Check
17934 vector_mode_supported_any_target_p when iterating through vector modes.
17935 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
17936 clarify that it applies to current target options.
17937 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
17939 2023-05-30 Lili Cui <lili.cui@intel.com>
17941 PR tree-optimization/98350
17942 * tree-ssa-reassoc.cc
17943 (rewrite_expr_tree_parallel): Rewrite this function.
17944 (rank_ops_for_fma): New.
17945 (reassociate_bb): Handle new function.
17947 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
17949 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
17950 (rtx_unstable_p): Ditto.
17951 (reg_mentioned_p): Ditto.
17952 (reg_referenced_p): Ditto.
17953 (reg_used_between_p): Ditto.
17954 (reg_set_between_p): Ditto.
17955 (modified_between_p): Ditto.
17956 (no_labels_between_p): Ditto.
17957 (modified_in_p): Ditto.
17958 (reg_set_p): Ditto.
17959 (multiple_sets): Ditto.
17960 (set_noop_p): Ditto.
17961 (noop_move_p): Ditto.
17962 (reg_overlap_mentioned_p): Ditto.
17963 (dead_or_set_p): Ditto.
17964 (dead_or_set_regno_p): Ditto.
17965 (find_reg_fusage): Ditto.
17966 (find_regno_fusage): Ditto.
17967 (side_effects_p): Ditto.
17968 (volatile_refs_p): Ditto.
17969 (volatile_insn_p): Ditto.
17970 (may_trap_p_1): Ditto.
17971 (may_trap_p): Ditto.
17972 (may_trap_or_fault_p): Ditto.
17973 (computed_jump_p): Ditto.
17974 (auto_inc_p): Ditto.
17975 (loc_mentioned_in_p): Ditto.
17976 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
17977 (rtx_unstable_p): Change return type from int to bool
17978 and adjust function body accordingly.
17979 (rtx_addr_can_trap_p): Ditto.
17980 (reg_mentioned_p): Ditto.
17981 (no_labels_between_p): Ditto.
17982 (reg_used_between_p): Ditto.
17983 (reg_referenced_p): Ditto.
17984 (reg_set_between_p): Ditto.
17985 (reg_set_p): Ditto.
17986 (modified_between_p): Ditto.
17987 (modified_in_p): Ditto.
17988 (multiple_sets): Ditto.
17989 (set_noop_p): Ditto.
17990 (noop_move_p): Ditto.
17991 (reg_overlap_mentioned_p): Ditto.
17992 (dead_or_set_p): Ditto.
17993 (dead_or_set_regno_p): Ditto.
17994 (find_reg_fusage): Ditto.
17995 (find_regno_fusage): Ditto.
17996 (remove_node_from_insn_list): Ditto.
17997 (volatile_insn_p): Ditto.
17998 (volatile_refs_p): Ditto.
17999 (side_effects_p): Ditto.
18000 (may_trap_p_1): Ditto.
18001 (may_trap_p): Ditto.
18002 (may_trap_or_fault_p): Ditto.
18003 (computed_jump_p): Ditto.
18004 (auto_inc_p): Ditto.
18005 (loc_mentioned_in_p): Ditto.
18006 * combine.cc (can_combine_p): Update indirect function.
18008 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18010 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
18011 * config/riscv/iterators.md: New attribute.
18012 * config/riscv/vector-iterators.md: New attribute.
18014 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
18016 * config/riscv/riscv.md: Fix signed and unsigned comparison
18019 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18021 * config/riscv/autovec.md (fnma<mode>4): New pattern.
18022 (*fnma<mode>): Ditto.
18024 2023-05-29 Die Li <lidie@eswincomputing.com>
18026 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
18028 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
18029 process for TARGET_XTHEADCONDMOV
18031 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
18034 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
18035 TARGET_AVX512BW to generate truncv16hiv16qi2.
18037 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
18039 * config/riscv/riscv.md (and<mode>3): New expander.
18040 (*and<mode>3) New pattern.
18041 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
18044 2023-05-29 Pan Li <pan2.li@intel.com>
18046 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
18047 comments and rename local variables.
18048 (emit_nonvlmax_insn): Diito.
18049 (emit_vlmax_merge_insn): Ditto.
18050 (emit_vlmax_cmp_insn): Ditto.
18051 (emit_vlmax_cmp_mu_insn): Ditto.
18052 (emit_scalar_move_insn): Ditto.
18054 2023-05-29 Pan Li <pan2.li@intel.com>
18056 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
18058 (emit_nonvlmax_insn): Ditto.
18059 (emit_vlmax_merge_insn): Ditto.
18060 (emit_vlmax_cmp_insn): Ditto.
18061 (emit_vlmax_cmp_mu_insn): Ditto.
18062 (expand_vec_series): Ditto.
18064 2023-05-29 Pan Li <pan2.li@intel.com>
18066 * config/riscv/riscv-protos.h (enum insn_type): New type.
18067 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
18068 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
18070 (rvv_builder::get_merged_repeating_sequence): Ditto.
18071 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
18072 to evaluate the optimization cost.
18073 (rvv_builder::get_merge_scalar_mask): New function to get the merge
18075 (emit_scalar_move_insn): New function to emit vmv.s.x.
18076 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
18077 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
18079 (get_repeating_sequence_dup_machine_mode): New function to get the dup
18081 (expand_vector_init_merge_repeating_sequence): New function to perform
18083 (expand_vec_init): Add this vector init optimization.
18084 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
18086 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
18088 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
18089 put onto the increment when it is inserted after the position.
18091 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
18093 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
18096 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18098 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
18100 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18102 * config/riscv/autovec.md (fma<mode>4): New pattern.
18103 (*fma<mode>): Ditto.
18104 * config/riscv/riscv-protos.h (enum insn_type): New enum.
18105 (emit_vlmax_ternary_insn): New function.
18106 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
18108 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18110 * config/riscv/vector.md: Fix vimuladd instruction bug.
18112 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18114 * config/riscv/riscv.cc (global_state_unknown_p): New function.
18115 (riscv_mode_after): Fix incorrect VXM.
18117 2023-05-29 Pan Li <pan2.li@intel.com>
18119 * common/config/riscv/riscv-common.cc:
18120 (riscv_implied_info): Add zvfhmin item.
18121 (riscv_ext_version_table): Ditto.
18122 (riscv_ext_flag_table): Ditto.
18123 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
18124 (TARGET_ZFHMIN): Align indent.
18125 (TARGET_ZFH): Ditto.
18126 (TARGET_ZVFHMIN): New macro.
18128 2023-05-27 liuhongt <hongtao.liu@intel.com>
18131 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
18132 to VI_AVX2 to cover more modes.
18134 2023-05-27 liuhongt <hongtao.liu@intel.com>
18136 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
18137 Remove ATOM and ICELAKE(and later) core processors.
18139 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
18141 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
18143 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
18145 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
18148 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
18149 Juzhe Zhong <juzhe.zhong@rivai.ai>
18151 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
18153 (<optab><v_quad_trunc><mode>2): Dito.
18154 (<optab><v_oct_trunc><mode>2): Dito.
18155 (trunc<mode><v_double_trunc>2): Dito.
18156 (trunc<mode><v_quad_trunc>2): Dito.
18157 (trunc<mode><v_oct_trunc>2): Dito.
18158 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
18159 (autovectorize_vector_modes): Define.
18160 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
18162 (autovectorize_vector_modes): Implement hook.
18163 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
18164 Implement target hook.
18165 (riscv_vectorize_related_mode): Implement target hook.
18166 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
18167 (TARGET_VECTORIZE_RELATED_MODE): Define.
18168 * config/riscv/vector-iterators.md: Add lowercase versions of
18169 mode_attr iterators.
18171 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
18172 Tobias Burnus <tobias@codesourcery.com>
18174 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
18175 (ASM_SPEC): Use XNACKOPT.
18176 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
18177 (enum hsaco_attr_type): ... this, and generalize the names.
18178 (TARGET_XNACK): New macro.
18179 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
18181 (output_file_start): Update xnack handling.
18182 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
18183 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
18184 (sram_ecc_type): Rename to ...
18185 (hsaco_attr_type: ... this.)
18186 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
18187 (TEST_XNACK): Delete.
18188 (TEST_XNACK_ANY): New macro.
18189 (TEST_XNACK_ON): New macro.
18190 (main): Support the new -mxnack=on/off/any syntax.
18191 * doc/invoke.texi (-mxnack): Update for new syntax.
18193 2023-05-26 Andrew Pinski <apinski@marvell.com>
18195 * genmatch.cc (emit_debug_printf): New function.
18196 (dt_simplify::gen_1): Emit printf into the code
18197 before the `return true` or returning the folded result
18198 instead of emitting it always.
18200 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18202 * config/xtensa/xtensa-protos.h
18203 (xtensa_expand_block_set_unrolled_loop,
18204 xtensa_expand_block_set_small_loop): Remove.
18205 (xtensa_expand_block_set): New prototype.
18206 * config/xtensa/xtensa.cc
18207 (xtensa_expand_block_set_libcall): New subfunction.
18208 (xtensa_expand_block_set_unrolled_loop,
18209 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
18210 (xtensa_expand_block_set): New function that calls the above
18212 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
18213 xtensa_expand_block_set().
18215 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18217 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
18219 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
18221 * config/xtensa/constraints.md (O):
18222 Change to use the above function.
18223 * config/xtensa/xtensa.md (*subsi3_from_const):
18224 New insn_and_split pattern.
18226 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18228 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
18229 Retract excessive line folding, and correct the value of
18230 the "length" insn attribute related to TARGET_DENSITY.
18231 (*extzvsi-1bit_addsubx): Ditto.
18233 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
18235 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
18236 Do not disable call to ix86_expand_vecop_qihi2.
18238 2023-05-26 liuhongt <hongtao.liu@intel.com>
18242 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
18243 calculation when !hard_regno_mode_ok for GENERAL_REGS and
18244 mode, otherwise still use GENERAL_REGS.
18246 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18248 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
18249 explict VL and drop VL in ops.
18251 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
18253 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
18254 in different BB blocks.
18256 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
18258 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
18259 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
18260 instructions when available. Emulate truncation via
18261 ix86_expand_vec_perm_const_1 when native truncate insn
18263 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
18264 when available. Trivially rename some variables.
18265 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
18266 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
18267 calculation of V*QImode emulations to account for generation of
18268 2x-wider mode instructions.
18269 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
18270 emulations to account for generation of 2x-wider mode instructions.
18272 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
18275 * config/avr/avr.cc (avr_can_inline_p): New static function.
18276 (TARGET_CAN_INLINE_P): Define to that function.
18278 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
18281 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
18282 Handle any bit position and use mode QISI.
18283 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
18284 of 2 insns for bit-transfer of respective style.
18286 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
18288 * config/arm/iterators.md (MVE_6): Remove.
18289 * config/arm/mve.md: Replace MVE_6 with MVE_5.
18291 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18292 Richard Sandiford <richard.sandiford@arm.com>
18294 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
18296 (vect_set_loop_controls_directly): Add decrement IV support.
18297 (vect_set_loop_condition_partial_vectors): Ditto.
18298 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
18300 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
18303 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18306 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
18307 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
18308 Fix canonicalization of PLUS operands.
18309 (aarch64_fcmla<rot><mode>): Rename to...
18310 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
18311 Fix canonicalization of PLUS operands.
18312 (aarch64_fcmla_lane<rot><mode>): Rename to...
18313 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
18314 Fix canonicalization of PLUS operands.
18315 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
18316 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
18317 Fix canonicalization of PLUS operands.
18318 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
18320 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
18322 * config/arm/arm.md (rbitsi2): Rename to...
18323 (arm_rbit): ... This.
18324 (ctzsi2): Adjust for the above.
18325 (arm_rev16si2): Convert to define_expand.
18326 (arm_rev16si2_alt1): New pattern.
18327 (arm_rev16si2_alt): Rename to...
18328 (*arm_rev16si2_alt2): ... This.
18329 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
18330 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
18331 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
18332 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
18334 2023-05-25 Alex Coplan <alex.coplan@arm.com>
18337 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
18339 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
18340 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
18341 DFmode as an rvalue.
18343 2023-05-25 Richard Biener <rguenther@suse.de>
18346 * tree-vect-stmts.cc (vectorizable_condition): For
18347 embedded comparisons also handle the case when the target
18348 only provides vec_cmp and vcond_mask.
18350 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
18352 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
18355 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
18357 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
18358 (seq_cost_ignoring_scalar_moves): Likewise.
18359 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
18361 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18363 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
18364 (vcage_f32): Likewise.
18365 (vcages_f32): Likewise.
18366 (vcageq_f32): Likewise.
18367 (vcaged_f64): Likewise.
18368 (vcageq_f64): Likewise.
18369 (vcagts_f32): Likewise.
18370 (vcagt_f32): Likewise.
18371 (vcagt_f64): Likewise.
18372 (vcagtq_f32): Likewise.
18373 (vcagtd_f64): Likewise.
18374 (vcagtq_f64): Likewise.
18375 (vcale_f32): Likewise.
18376 (vcale_f64): Likewise.
18377 (vcaled_f64): Likewise.
18378 (vcales_f32): Likewise.
18379 (vcaleq_f32): Likewise.
18380 (vcaleq_f64): Likewise.
18381 (vcalt_f32): Likewise.
18382 (vcalt_f64): Likewise.
18383 (vcaltd_f64): Likewise.
18384 (vcaltq_f32): Likewise.
18385 (vcaltq_f64): Likewise.
18386 (vcalts_f32): Likewise.
18388 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
18392 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
18393 int to const int or const int to const unsigned int.
18394 (_mm512_mask_srli_epi16): Ditto.
18395 (_mm512_slli_epi16): Ditto.
18396 (_mm512_mask_slli_epi16): Ditto.
18397 (_mm512_maskz_slli_epi16): Ditto.
18398 (_mm512_srai_epi16): Ditto.
18399 (_mm512_mask_srai_epi16): Ditto.
18400 (_mm512_maskz_srai_epi16): Ditto.
18401 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
18402 (_mm512_mask_slli_epi64): Ditto.
18403 (_mm512_maskz_slli_epi64): Ditto.
18404 (_mm512_srli_epi64): Ditto.
18405 (_mm512_mask_srli_epi64): Ditto.
18406 (_mm512_maskz_srli_epi64): Ditto.
18407 (_mm512_srai_epi64): Ditto.
18408 (_mm512_mask_srai_epi64): Ditto.
18409 (_mm512_maskz_srai_epi64): Ditto.
18410 (_mm512_slli_epi32): Ditto.
18411 (_mm512_mask_slli_epi32): Ditto.
18412 (_mm512_maskz_slli_epi32): Ditto.
18413 (_mm512_srli_epi32): Ditto.
18414 (_mm512_mask_srli_epi32): Ditto.
18415 (_mm512_maskz_srli_epi32): Ditto.
18416 (_mm512_srai_epi32): Ditto.
18417 (_mm512_mask_srai_epi32): Ditto.
18418 (_mm512_maskz_srai_epi32): Ditto.
18419 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
18420 (_mm256_maskz_srai_epi16): Ditto.
18421 (_mm_mask_srai_epi16): Ditto.
18422 (_mm_maskz_srai_epi16): Ditto.
18423 (_mm256_mask_slli_epi16): Ditto.
18424 (_mm256_maskz_slli_epi16): Ditto.
18425 (_mm_mask_slli_epi16): Ditto.
18426 (_mm_maskz_slli_epi16): Ditto.
18427 (_mm_maskz_srli_epi16): Ditto.
18428 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
18429 (_mm256_maskz_srli_epi32): Ditto.
18430 (_mm_mask_srli_epi32): Ditto.
18431 (_mm_maskz_srli_epi32): Ditto.
18432 (_mm256_mask_srli_epi64): Ditto.
18433 (_mm256_maskz_srli_epi64): Ditto.
18434 (_mm_mask_srli_epi64): Ditto.
18435 (_mm_maskz_srli_epi64): Ditto.
18436 (_mm256_mask_srai_epi32): Ditto.
18437 (_mm256_maskz_srai_epi32): Ditto.
18438 (_mm_mask_srai_epi32): Ditto.
18439 (_mm_maskz_srai_epi32): Ditto.
18440 (_mm256_srai_epi64): Ditto.
18441 (_mm256_mask_srai_epi64): Ditto.
18442 (_mm256_maskz_srai_epi64): Ditto.
18443 (_mm_srai_epi64): Ditto.
18444 (_mm_mask_srai_epi64): Ditto.
18445 (_mm_maskz_srai_epi64): Ditto.
18446 (_mm_mask_slli_epi32): Ditto.
18447 (_mm_maskz_slli_epi32): Ditto.
18448 (_mm_mask_slli_epi64): Ditto.
18449 (_mm_maskz_slli_epi64): Ditto.
18450 (_mm256_mask_slli_epi32): Ditto.
18451 (_mm256_maskz_slli_epi32): Ditto.
18452 (_mm256_mask_slli_epi64): Ditto.
18453 (_mm256_maskz_slli_epi64): Ditto.
18455 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18457 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
18460 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
18462 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
18463 * data-streamer-out.cc (streamer_write_vrange): Same.
18464 * value-range.h (class vrange): Make streamer_write_vrange a friend.
18466 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
18468 * value-query.cc (range_query::get_tree_range): Set NAN directly
18470 * value-range.cc (frange::set): Assert that bounds are not NAN.
18472 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
18474 * value-range.cc (add_vrange): Handle known NANs.
18476 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
18478 * value-range.h (frange::set_nan): New.
18480 2023-05-25 Alexandre Oliva <oliva@adacore.com>
18483 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
18484 requires stricter alignment than MEM's.
18486 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18488 PR tree-optimization/107822
18489 PR tree-optimization/107986
18490 * Makefile.in (OBJS): Add gimple-range-phi.o.
18491 * gimple-range-cache.h (ranger_cache::m_estimate): New
18492 phi_analyzer pointer member.
18493 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
18494 phi_analyzer if no loop info is available.
18495 * gimple-range-phi.cc: New file.
18496 * gimple-range-phi.h: New file.
18497 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
18499 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18501 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
18503 (fold_range): Add range_query parameter.
18504 (fur_relation::fur_relation): New.
18505 (fur_relation::trio): New.
18506 (fur_relation::register_relation): New.
18507 (fold_relations): New.
18508 * gimple-range-fold.h (fold_range): Adjust prototypes.
18509 (fold_relations): New.
18511 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18513 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
18514 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
18515 (ranger_cache::const_query): New.
18516 * gimple-range.cc (gimple_ranger::const_query): New.
18517 * gimple-range.h (gimple_ranger::const_query): New prototype.
18519 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18521 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
18522 (ssa_cache::dump_range_query): Delete.
18523 (ssa_lazy_cache::dump_range_query): Delete.
18524 (ssa_lazy_cache::get_range): Move from header file.
18525 (ssa_lazy_cache::clear_range): ditto.
18526 (ssa_lazy_cache::clear): Ditto.
18527 * gimple-range-cache.h (class ssa_cache): Virtualize.
18528 (class ssa_lazy_cache): Inherit and virtualize.
18530 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
18532 * value-range.h (vrange::kind): Remove.
18534 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
18536 PR middle-end/109840
18537 * match.pd <popcount optimizations>: Preserve zero-extension when
18538 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
18539 popcount((T)x), so the popcount's argument keeps the same type.
18540 <parity optimizations>: Likewise preserve extensions when
18541 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
18542 parity((T)x), so that the parity's argument type is the same.
18544 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
18546 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
18547 (ipcp_store_vr_results): Same.
18548 * ipa-prop.cc (ipa_vr::ipa_vr): New.
18549 (ipa_vr::get_vrange): New.
18550 (ipa_vr::set_unknown): New.
18551 (ipa_vr::streamer_read): New.
18552 (ipa_vr::streamer_write): New.
18553 (write_ipcp_transformation_info): Use new ipa_vr API.
18554 (read_ipcp_transformation_info): Same.
18555 (ipa_vr::nonzero_p): Delete.
18556 (ipcp_update_vr): Use new ipa_vr API.
18557 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
18558 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
18560 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
18562 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
18563 silence overflow warnings later on.
18565 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
18567 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
18568 Remove handling of V8QImode.
18569 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
18570 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
18571 (v<insn>v4qi3): Ditto.
18572 * config/i386/sse.md (v<insn>v8qi3): Remove.
18574 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18577 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
18578 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
18579 (aarch64_simd_ashr<mode>): Rename to...
18580 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
18581 (aarch64_simd_imm_shl<mode>): Rename to...
18582 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
18583 (aarch64_simd_reg_sshl<mode>): Rename to...
18584 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
18585 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
18586 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
18587 (aarch64_simd_reg_shl<mode>_signed): Rename to...
18588 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
18589 (vec_shr_<mode>): Rename to...
18590 (vec_shr_<mode><vczle><vczbe>): ... This.
18591 (aarch64_<sur>shl<mode>): Rename to...
18592 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
18593 (aarch64_<sur>q<r>shl<mode>): Rename to...
18594 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
18596 2023-05-24 Richard Biener <rguenther@suse.de>
18599 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
18600 Perform final vector composition using
18601 ix86_expand_vector_init_general instead of setting
18602 the highpart and lowpart which causes spilling.
18604 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18606 PR tree-optimization/109695
18607 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
18609 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
18610 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
18611 flag to set_global_range.
18612 (gimple_ranger::prefill_stmt_dependencies): Ditto.
18614 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18616 PR tree-optimization/109695
18617 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
18619 (temporal_cache::current_p): Check always_current method.
18620 (temporal_cache::set_always_current): Add param and set value
18622 (temporal_cache::always_current_p): New.
18623 (ranger_cache::get_global_range): Adjust.
18624 (ranger_cache::set_global_range): set always current first.
18626 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
18628 PR tree-optimization/109695
18629 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
18630 fold_range with global query to choose an initial value.
18632 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18634 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
18637 2023-05-24 Richard Biener <rguenther@suse.de>
18639 PR tree-optimization/109849
18640 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
18641 expressions but take the first sets.
18643 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
18646 * doc/gm2.texi (High procedure function): New node.
18647 (Using): New menu entry for High procedure function.
18649 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
18651 PR rtl-optimization/109940
18652 * early-remat.cc (postorder_index): Rename to...
18653 (rpo_index): ...this.
18654 (compare_candidates): Sort by decreasing rpo_index rather than
18655 increasing postorder_index.
18656 (early_remat::sort_candidates): Calculate the forward RPO from
18658 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
18659 rather than DF_BACKWARD in reverse.
18661 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18664 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
18665 qualifier_none for the return operand.
18667 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18669 * config/riscv/autovec.md (<optab><mode>3): New pattern.
18670 (one_cmpl<mode>2): Ditto.
18671 (*<optab>not<mode>): Ditto.
18672 (*n<optab><mode>): Ditto.
18673 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
18676 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
18678 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
18679 calculation on n_perms by considering nvectors_per_build.
18681 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18682 Richard Sandiford <richard.sandiford@arm.com>
18684 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
18685 (vec_cmp<mode><vm>): New pattern.
18686 (vec_cmpu<mode><vm>): New pattern.
18687 (vcond<V:mode><VI:mode>): New pattern.
18688 (vcondu<V:mode><VI:mode>): New pattern.
18689 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
18690 (emit_vlmax_merge_insn): New function.
18691 (emit_vlmax_cmp_insn): Ditto.
18692 (emit_vlmax_cmp_mu_insn): Ditto.
18693 (expand_vec_cmp): Ditto.
18694 (expand_vec_cmp_float): Ditto.
18695 (expand_vcond): Ditto.
18696 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
18697 (emit_vlmax_cmp_insn): Ditto.
18698 (emit_vlmax_cmp_mu_insn): Ditto.
18699 (get_cmp_insn_code): Ditto.
18700 (expand_vec_cmp): Ditto.
18701 (expand_vec_cmp_float): Ditto.
18702 (expand_vcond): Ditto.
18704 2023-05-24 Pan Li <pan2.li@intel.com>
18706 * config/riscv/genrvv-type-indexer.cc (main): Add
18707 unsigned_eew*_lmul1_interpret for indexer.
18708 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
18709 Register vuint*m1_t interpret function.
18710 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
18711 New macro for vuint8m1_t.
18712 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18713 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18714 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18715 (vbool1_t): Add to unsigned_eew*_interpret_ops.
18716 (vbool2_t): Likewise.
18717 (vbool4_t): Likewise.
18718 (vbool8_t): Likewise.
18719 (vbool16_t): Likewise.
18720 (vbool32_t): Likewise.
18721 (vbool64_t): Likewise.
18722 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
18723 New macro for vuint*m1_t.
18724 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18725 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18726 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18727 (required_extensions_p): Add vuint*m1_t interpret case.
18728 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
18729 Add vuint*m1_t interpret to base type.
18730 (unsigned_eew16_lmul1_interpret): Likewise.
18731 (unsigned_eew32_lmul1_interpret): Likewise.
18732 (unsigned_eew64_lmul1_interpret): Likewise.
18734 2023-05-24 Pan Li <pan2.li@intel.com>
18736 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
18737 for the eew size list.
18738 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
18739 (main): Add signed_eew*_lmul1_interpret for indexer.
18740 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
18741 Register vint*m1_t interpret function.
18742 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
18743 New macro for vint8m1_t.
18744 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18745 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18746 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18747 (vbool1_t): Add to signed_eew*_interpret_ops.
18748 (vbool2_t): Likewise.
18749 (vbool4_t): Likewise.
18750 (vbool8_t): Likewise.
18751 (vbool16_t): Likewise.
18752 (vbool32_t): Likewise.
18753 (vbool64_t): Likewise.
18754 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
18755 New macro for vint*m1_t.
18756 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18757 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18758 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18759 (required_extensions_p): Add vint8m1_t interpret case.
18760 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
18761 Add vint*m1_t interpret to base type.
18762 (signed_eew16_lmul1_interpret): Likewise.
18763 (signed_eew32_lmul1_interpret): Likewise.
18764 (signed_eew64_lmul1_interpret): Likewise.
18766 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18768 * config/riscv/autovec.md: Adjust for new interface.
18769 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
18770 (emit_nonvlmax_insn): Add AVL operand.
18771 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
18772 (emit_nonvlmax_insn): Add AVL operand.
18773 (sew64_scalar_helper): Adjust for new interface.
18774 (expand_tuple_move): Ditto.
18775 * config/riscv/vector.md: Ditto.
18777 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18779 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
18780 (expand_const_vector): Ditto.
18781 (legitimize_move): Ditto.
18782 (sew64_scalar_helper): Ditto.
18783 (expand_tuple_move): Ditto.
18784 (expand_vector_init_insert_elems): Ditto.
18785 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
18787 2023-05-24 liuhongt <hongtao.liu@intel.com>
18790 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
18791 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
18792 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
18793 (ix86_masked_all_ones): Handle 64-bit mask.
18794 * config/i386/i386-builtin.def: Replace icode of related
18795 non-mask simd abs builtins with CODE_FOR_nothing.
18797 2023-05-23 Martin Uecker <uecker@tugraz.at>
18800 * function.cc (gimplify_parm_type): Remove function.
18801 (gimplify_parameters): Call gimplify_type_sizes.
18803 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18805 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
18806 and change to also accept '*subx' pattern.
18809 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18811 * config/xtensa/predicates.md (addsub_operator): New.
18812 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
18813 *extzvsi-1bit_addsubx): New insn_and_split patterns.
18814 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
18815 Add a special case about ifcvt 'noce_try_cmove()' to handle
18816 constant loads that do not fit into signed 12 bits in the
18817 patterns added above.
18819 2023-05-23 Richard Biener <rguenther@suse.de>
18821 PR tree-optimization/109747
18822 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
18823 the SLP node only once to the cost hook.
18825 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
18827 * config/avr/avr.cc (avr_insn_cost): New static function.
18828 (TARGET_INSN_COST): Define to that function.
18830 2023-05-23 Richard Biener <rguenther@suse.de>
18833 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
18834 For vector construction or splats apply GPR->XMM move
18835 costing. QImode memory can be handled directly only
18836 with SSE4.1 pinsrb.
18838 2023-05-23 Richard Biener <rguenther@suse.de>
18840 PR tree-optimization/108752
18841 * tree-vect-stmts.cc (vectorizable_operation): For bit
18842 operations with generic word_mode vectors do not cost
18843 an extra stmt. For plus, minus and negate also cost the
18844 constant materialization.
18846 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
18848 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
18849 Call ix86_expand_vec_shift_qihi_constant for shifts
18850 with constant count operand.
18851 * config/i386/i386.cc (ix86_shift_rotate_cost):
18852 Handle V4QImode and V8QImode.
18853 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
18854 (<insn>v4qi3): Ditto.
18856 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18858 * config/riscv/vector.md: Add mode.
18860 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
18862 PR tree-optimization/109934
18863 * value-range.cc (irange::invert): Remove buggy special case.
18865 2023-05-23 Richard Biener <rguenther@suse.de>
18867 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
18870 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
18873 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
18874 subregs between any scalars that are 64 bits or smaller.
18875 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
18876 (bits_etype): New int attribute.
18877 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
18878 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
18879 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
18881 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
18883 * doc/md.texi: Document that <FOO> can be used to refer to the
18884 numerical value of an int iterator FOO. Tweak other parts of
18885 the int iterator documentation.
18886 * read-rtl.cc (iterator_group::has_self_attr): New field.
18887 (map_attr_string): When has_self_attr is true, make <FOO>
18888 expand to the current value of iterator FOO.
18889 (initialize_iterators): Set has_self_attr for int iterators.
18891 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18893 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
18894 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
18895 (RVV_UNOP_NUM): New macro.
18896 (RVV_BINOP_NUM): Ditto.
18897 (legitimize_move): Refactor the framework of RVV auto-vectorization.
18898 (emit_vlmax_op): Ditto.
18899 (emit_vlmax_reg_op): Ditto.
18900 (emit_len_op): Ditto.
18901 (emit_len_binop): Ditto.
18902 (emit_vlmax_tany_many): Ditto.
18903 (emit_nonvlmax_tany_many): Ditto.
18904 (sew64_scalar_helper): Ditto.
18905 (expand_tuple_move): Ditto.
18906 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
18907 (emit_pred_binop): Ditto.
18908 (emit_vlmax_op): Ditto.
18909 (emit_vlmax_tany_many): New function.
18910 (emit_len_op): Remove.
18911 (emit_nonvlmax_tany_many): New function.
18912 (emit_vlmax_reg_op): Remove.
18913 (emit_len_binop): Ditto.
18914 (emit_index_op): Ditto.
18915 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
18916 (expand_const_vector): Ditto.
18917 (legitimize_move): Ditto.
18918 (sew64_scalar_helper): Ditto.
18919 (expand_tuple_move): Ditto.
18920 (expand_vector_init_insert_elems): Ditto.
18921 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
18922 * config/riscv/vector.md: Ditto.
18924 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18927 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
18928 and constraint for operand 0.
18929 (add_vec_concat_subst_be): Likewise.
18931 2023-05-23 Richard Biener <rguenther@suse.de>
18933 PR tree-optimization/109849
18934 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
18935 and use that to determine what to hoist.
18937 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
18939 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
18940 specific treatment for bit-fields only if they have an integral type
18941 and filter out non-integral bit-fields that do not start and end on
18944 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
18946 PR tree-optimization/109920
18947 * value-range.h (RESIZABLE>::~int_range): Use delete[].
18949 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
18951 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
18952 calcuation of integer vector mode costs to reflect generated
18953 instruction sequences of different integer vector modes and
18954 different target ABIs. Remove "speed" function argument.
18955 (ix86_rtx_costs): Update call for removed function argument.
18956 (ix86_vector_costs::add_stmt_cost): Ditto.
18958 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
18960 * value-range.h (class Value_Range): Implement set_zero,
18961 set_nonzero, and nonzero_p.
18963 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
18965 * config/i386/i386.cc (ix86_multiplication_cost): Add
18966 the cost of a memory read to the cost of V?QImode sequences.
18968 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18970 * config/riscv/riscv-v.cc: Add "m_" prefix.
18972 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18974 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
18975 multiple-rgroup of length.
18976 * tree-vect-stmts.cc (vectorizable_store): Ditto.
18977 (vectorizable_load): Ditto.
18978 * tree-vectorizer.h (vect_get_loop_len): Ditto.
18980 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18982 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
18985 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
18987 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
18988 handling for the case index == count.
18990 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
18993 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
18994 Don't fold to XOR / AND / XOR if just one bit is copied to the
18997 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
18999 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
19000 builtin for bit reversal using brev instruction.
19001 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
19002 NVPTX_BUILTIN_BREVLL.
19003 (nvptx_init_builtins): Define "brev" and "brevll".
19004 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
19005 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
19006 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
19007 section, document __builtin_nvptx_brev{,ll}.
19009 2023-05-21 Jakub Jelinek <jakub@redhat.com>
19011 PR tree-optimization/109505
19012 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
19013 Combine successive equal operations with constants,
19014 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
19015 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
19018 2023-05-21 Andrew Pinski <apinski@marvell.com>
19020 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
19022 2023-05-21 Pan Li <pan2.li@intel.com>
19024 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
19025 rest bool size, aka 2, 4, 8, 16, 32, 64.
19026 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
19027 Register vbool[2|4|8|16|32|64] interpret function.
19028 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
19029 New macro for vbool2_t.
19030 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
19031 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
19032 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
19033 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
19034 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
19035 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
19036 (vint16m1_t): Likewise.
19037 (vint32m1_t): Likewise.
19038 (vint64m1_t): Likewise.
19039 (vuint8m1_t): Likewise.
19040 (vuint16m1_t): Likewise.
19041 (vuint32m1_t): Likewise.
19042 (vuint64m1_t): Likewise.
19043 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
19044 New macro for vbool2_t.
19045 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
19046 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
19047 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
19048 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
19049 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
19050 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
19051 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
19052 vbool2_t interprect to base type.
19053 (bool4_interpret): Likewise.
19054 (bool8_interpret): Likewise.
19055 (bool16_interpret): Likewise.
19056 (bool32_interpret): Likewise.
19057 (bool64_interpret): Likewise.
19059 2023-05-21 Andrew Pinski <apinski@marvell.com>
19061 PR middle-end/109919
19062 * expr.cc (expand_single_bit_test): Don't use the
19063 target for expand_expr.
19065 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
19067 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
19070 2023-05-20 Pan Li <pan2.li@intel.com>
19072 * mode-switching.cc (entity_map): Initialize the array to zero.
19075 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
19078 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
19079 Remove superfluous "parallel" in insn pattern.
19080 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
19081 printing error text to assembly.
19083 2023-05-20 Andrew Pinski <apinski@marvell.com>
19085 * expr.cc (fold_single_bit_test): Rename to ...
19086 (expand_single_bit_test): This and expand directly.
19087 (do_store_flag): Update for the rename function.
19089 2023-05-20 Andrew Pinski <apinski@marvell.com>
19091 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
19092 instead of shift/and.
19094 2023-05-20 Andrew Pinski <apinski@marvell.com>
19096 * expr.cc (fold_single_bit_test): Add an assert
19097 and simplify based on code being NE_EXPR or EQ_EXPR.
19099 2023-05-20 Andrew Pinski <apinski@marvell.com>
19101 * expr.cc (fold_single_bit_test): Take inner and bitnum
19102 instead of arg0 and arg1. Update the code.
19103 (do_store_flag): Don't create a tree when calling
19104 fold_single_bit_test instead just call it with the bitnum
19105 and the inner tree.
19107 2023-05-20 Andrew Pinski <apinski@marvell.com>
19109 * expr.cc (fold_single_bit_test): Use get_def_for_expr
19110 instead of checking the inner's code.
19112 2023-05-20 Andrew Pinski <apinski@marvell.com>
19114 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
19115 (fold_single_bit_test): This and simplify.
19117 2023-05-20 Andrew Pinski <apinski@marvell.com>
19119 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
19121 (fold_single_bit_test): Likewise.
19122 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
19123 (fold_single_bit_test): Likewise and make static.
19124 * fold-const.h (fold_single_bit_test): Remove declaration.
19126 2023-05-20 Die Li <lidie@eswincomputing.com>
19128 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
19131 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
19133 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
19135 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
19138 * config/riscv/bitmanip.md
19139 (<bitmanip_optab>disi2): Match with any_extend.
19140 (<bitmanip_optab>disi2_sext): New pattern to match
19141 with sign extend using an ANDI instruction.
19143 2023-05-19 Nathan Sidwell <nathan@acm.org>
19146 * opts.h (handle_deferred_dump_options): Declare.
19147 * opts-global.cc (handle_common_deferred_options): Do not handle
19149 (handle_deferred_dump_options): New.
19150 * toplev.cc (toplev::main): Call it after plugin init.
19152 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
19154 * config/riscv/constraints.md (DsS, DsD): Restore agreement
19155 with shiftm1 mode attribute.
19157 2023-05-19 Andrew Pinski <apinski@marvell.com>
19160 * gcc.cc (default_compilers["@c-header"]): Add %w
19161 after the --output-pch.
19163 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
19165 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
19166 to hival, ASHIFT the corresponding regs.
19168 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
19170 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
19172 2023-05-19 Jakub Jelinek <jakub@redhat.com>
19174 PR tree-optimization/105776
19175 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
19176 non-NULL, allow division statement to have a cast as single imm use
19177 rather than comparison/condition.
19178 (match_arith_overflow): In that case remove the cast stmt in addition
19179 to the division statement.
19181 2023-05-19 Jakub Jelinek <jakub@redhat.com>
19183 PR tree-optimization/101856
19184 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
19185 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
19186 support it but umul_highpart_optab does.
19188 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
19190 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
19191 of tree_to_shwi on array indices. Minor tweaks.
19193 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
19195 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
19196 * attribs.cc (diag_attr_exclusions): Ditto.
19197 (decl_attributes): Ditto.
19198 (build_type_attribute_qual_variant): Ditto.
19199 * builtins.cc (fold_builtin_carg): Ditto.
19200 (fold_builtin_next_arg): Ditto.
19201 (do_mpc_arg2): Ditto.
19202 * cfgexpand.cc (expand_return): Ditto.
19203 * cgraph.h (decl_in_symtab_p): Ditto.
19204 (symtab_node::get_create): Ditto.
19205 * dwarf2out.cc (base_type_die): Ditto.
19206 (implicit_ptr_descriptor): Ditto.
19207 (gen_array_type_die): Ditto.
19208 (gen_type_die_with_usage): Ditto.
19209 (optimize_location_into_implicit_ptr): Ditto.
19210 * expr.cc (do_store_flag): Ditto.
19211 * fold-const.cc (negate_expr_p): Ditto.
19212 (fold_negate_expr_1): Ditto.
19213 (fold_convert_const): Ditto.
19214 (fold_convert_loc): Ditto.
19215 (constant_boolean_node): Ditto.
19216 (fold_binary_op_with_conditional_arg): Ditto.
19217 (build_fold_addr_expr_with_type_loc): Ditto.
19218 (fold_comparison): Ditto.
19219 (fold_checksum_tree): Ditto.
19220 (tree_unary_nonnegative_warnv_p): Ditto.
19221 (integer_valued_real_unary_p): Ditto.
19222 (fold_read_from_constant_string): Ditto.
19223 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
19224 * gimple-expr.cc (useless_type_conversion_p): Ditto.
19225 (is_gimple_reg): Ditto.
19226 (is_gimple_asm_val): Ditto.
19227 (mark_addressable): Ditto.
19228 * gimple-expr.h (is_gimple_variable): Ditto.
19229 (virtual_operand_p): Ditto.
19230 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
19231 * gimplify.cc (gimplify_bind_expr): Ditto.
19232 (gimplify_return_expr): Ditto.
19233 (gimple_add_padding_init_for_auto_var): Ditto.
19234 (gimplify_addr_expr): Ditto.
19235 (omp_add_variable): Ditto.
19236 (omp_notice_variable): Ditto.
19237 (omp_get_base_pointer): Ditto.
19238 (omp_strip_components_and_deref): Ditto.
19239 (omp_strip_indirections): Ditto.
19240 (omp_accumulate_sibling_list): Ditto.
19241 (omp_build_struct_sibling_lists): Ditto.
19242 (gimplify_adjust_omp_clauses_1): Ditto.
19243 (gimplify_adjust_omp_clauses): Ditto.
19244 (gimplify_omp_for): Ditto.
19245 (goa_lhs_expr_p): Ditto.
19246 (gimplify_one_sizepos): Ditto.
19247 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
19248 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
19249 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
19250 (propagate_controlled_uses): Ditto.
19251 * ipa-sra.cc (type_prevails_p): Ditto.
19252 (scan_expr_access): Ditto.
19253 * optabs-tree.cc (optab_for_tree_code): Ditto.
19254 * toplev.cc (wrapup_global_declaration_1): Ditto.
19255 * trans-mem.cc (transaction_invariant_address_p): Ditto.
19256 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
19257 (verify_gimple_comparison): Ditto.
19258 (verify_gimple_assign_binary): Ditto.
19259 (verify_gimple_assign_single): Ditto.
19260 * tree-complex.cc (get_component_ssa_name): Ditto.
19261 * tree-emutls.cc (lower_emutls_2): Ditto.
19262 * tree-inline.cc (copy_tree_body_r): Ditto.
19263 (estimate_move_cost): Ditto.
19264 (copy_decl_for_dup_finish): Ditto.
19265 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
19266 (note_nonlocal_vla_type): Ditto.
19267 (convert_local_omp_clauses): Ditto.
19268 (remap_vla_decls): Ditto.
19269 (fixup_vla_decls): Ditto.
19270 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
19271 * tree-pretty-print.cc (print_declaration): Ditto.
19272 (print_call_name): Ditto.
19273 * tree-sra.cc (compare_access_positions): Ditto.
19274 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
19275 * tree-ssa-ccp.cc (get_default_value): Ditto.
19276 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
19277 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
19278 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
19279 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
19280 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
19281 * tree-ssa-sink.cc (statement_sink_location): Ditto.
19282 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
19283 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
19284 * tree-ssa-uninit.cc (warn_uninit): Ditto.
19285 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
19286 (non_rewritable_mem_ref_base): Ditto.
19287 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
19288 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
19289 * tree-vect-generic.cc (do_binop): Ditto.
19291 * tree-vect-stmts.cc (vect_init_vector): Ditto.
19292 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
19293 * tree.cc (sign_mask_for): Ditto.
19294 (verify_type_variant): Ditto.
19295 (gimple_canonical_types_compatible_p): Ditto.
19296 (verify_type): Ditto.
19297 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
19298 * var-tracking.cc (prepare_call_arguments): Ditto.
19299 (vt_add_function_parameters): Ditto.
19300 * varasm.cc (decode_addr_const): Ditto.
19302 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
19304 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
19305 (lower_reduction_clauses): Ditto.
19306 (lower_send_clauses): Ditto.
19307 (lower_omp_task_reductions): Ditto.
19308 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
19309 (worker_single_copy): Ditto.
19310 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
19311 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
19313 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
19315 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
19317 (lto_read_body_or_constructor): Ditto.
19318 * lto-streamer-out.cc (tree_is_indexable): Ditto.
19319 (lto_output_var_decl_ref): Ditto.
19320 (DFS::DFS_write_tree_body): Ditto.
19321 (wrap_refs): Ditto.
19322 (write_symbol_extension_info): Ditto.
19324 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
19326 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
19327 defines from tree.h.
19328 (aarch64_mangle_type): Ditto.
19329 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
19330 (alpha_gimplify_va_arg_1): Ditto.
19331 * config/arc/arc.cc (arc_encode_section_info): Ditto.
19332 (arc_is_aux_reg_p): Ditto.
19333 (arc_is_uncached_mem_p): Ditto.
19334 (arc_handle_aux_attribute): Ditto.
19335 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
19336 (arm_handle_cmse_nonsecure_call): Ditto.
19337 (arm_set_default_type_attributes): Ditto.
19338 (arm_is_segment_info_known): Ditto.
19339 (arm_mangle_type): Ditto.
19340 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
19341 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
19342 (avr_decl_absdata_p): Ditto.
19343 (avr_insert_attributes): Ditto.
19344 (avr_section_type_flags): Ditto.
19345 (avr_encode_section_info): Ditto.
19346 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
19347 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
19348 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
19349 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
19350 (csky_mangle_type): Ditto.
19351 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
19352 * config/darwin.cc (is_objc_metadata): Ditto.
19353 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
19354 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
19355 * config/frv/frv.cc (frv_emit_movsi): Ditto.
19356 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
19357 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
19358 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
19359 * config/i386/i386-expand.cc: Ditto.
19360 * config/i386/i386.cc (type_natural_mode): Ditto.
19361 (ix86_function_arg): Ditto.
19362 (ix86_data_alignment): Ditto.
19363 (ix86_local_alignment): Ditto.
19364 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
19365 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
19366 (i386_pe_type_dllexport_p): Ditto.
19367 (i386_pe_adjust_class_at_definition): Ditto.
19368 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
19369 (i386_pe_binds_local_p): Ditto.
19370 (i386_pe_section_type_flags): Ditto.
19371 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
19372 (ia64_gimplify_va_arg): Ditto.
19373 (ia64_in_small_data_p): Ditto.
19374 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
19375 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
19376 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
19377 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
19378 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
19379 (mcore_encode_section_info): Ditto.
19380 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
19381 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
19382 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
19383 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
19384 (pass_in_memory): Ditto.
19385 (nvptx_generate_vector_shuffle): Ditto.
19386 (nvptx_lockless_update): Ditto.
19387 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
19388 (pa_function_value): Ditto.
19389 (pa_function_arg): Ditto.
19390 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
19391 (TEXT_SPACE_P): Ditto.
19392 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
19393 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
19394 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
19395 (riscv_mangle_type): Ditto.
19396 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
19397 (rl78_addsi3_internal): Ditto.
19398 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
19399 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
19400 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
19401 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
19402 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
19403 (rs6000_function_arg_advance_1): Ditto.
19404 (rs6000_function_arg): Ditto.
19405 (rs6000_pass_by_reference): Ditto.
19406 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
19407 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
19408 (rs6000_set_default_type_attributes): Ditto.
19409 (rs6000_elf_in_small_data_p): Ditto.
19410 (IN_NAMED_SECTION): Ditto.
19411 (rs6000_xcoff_encode_section_info): Ditto.
19412 (rs6000_function_value): Ditto.
19413 (invalid_arg_for_unprototyped_fn): Ditto.
19414 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
19415 (s390_vec_n_elem): Ditto.
19416 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
19417 (s390_function_arg_integer): Ditto.
19418 (s390_return_in_memory): Ditto.
19419 (s390_encode_section_info): Ditto.
19420 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
19421 (sh_function_value): Ditto.
19422 * config/sol2.cc (solaris_insert_attributes): Ditto.
19423 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
19424 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
19425 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
19426 (xstormy16_handle_below100_attribute): Ditto.
19427 * config/v850/v850.cc (v850_encode_section_info): Ditto.
19428 (v850_insert_attributes): Ditto.
19429 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
19430 (visium_return_in_memory): Ditto.
19431 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
19433 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
19435 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
19436 (ix86_expand_vecop_qihi): Add op2vec bool variable.
19437 Do not set REG_EQUAL note.
19438 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
19440 * config/i386/i386.cc (ix86_multiplication_cost): Handle
19441 V4QImode and V8QImode.
19442 * config/i386/mmx.md (mulv8qi3): New expander.
19444 * config/i386/sse.md (mulv8qi3): Remove.
19446 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
19448 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
19450 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
19452 PR bootstrap/105831
19453 * config.gcc: Use = operator instead of ==.
19455 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
19457 PR bootstrap/105831
19458 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
19459 * configure.ac: Likewise.
19460 * configure: Regenerate.
19462 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19464 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
19465 (__ARM_mve_coerce1): Remove.
19466 (__ARM_mve_coerce2): Remove.
19467 (__ARM_mve_coerce3): Remove.
19468 (__ARM_mve_coerce_i_scalar): New.
19469 (__ARM_mve_coerce_s8_ptr): New.
19470 (__ARM_mve_coerce_u8_ptr): New.
19471 (__ARM_mve_coerce_s16_ptr): New.
19472 (__ARM_mve_coerce_u16_ptr): New.
19473 (__ARM_mve_coerce_s32_ptr): New.
19474 (__ARM_mve_coerce_u32_ptr): New.
19475 (__ARM_mve_coerce_s64_ptr): New.
19476 (__ARM_mve_coerce_u64_ptr): New.
19477 (__ARM_mve_coerce_f_scalar): New.
19478 (__ARM_mve_coerce_f16_ptr): New.
19479 (__ARM_mve_coerce_f32_ptr): New.
19480 (__arm_vst4q): Change _coerce_ overloads.
19481 (__arm_vbicq): Change _coerce_ overloads.
19482 (__arm_vld1q): Change _coerce_ overloads.
19483 (__arm_vld1q_z): Change _coerce_ overloads.
19484 (__arm_vld2q): Change _coerce_ overloads.
19485 (__arm_vld4q): Change _coerce_ overloads.
19486 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
19487 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
19488 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
19489 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
19490 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
19491 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
19492 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
19493 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
19494 (__arm_vst1q_p): Change _coerce_ overloads.
19495 (__arm_vst2q): Change _coerce_ overloads.
19496 (__arm_vst1q): Change _coerce_ overloads.
19497 (__arm_vstrhq): Change _coerce_ overloads.
19498 (__arm_vstrhq_p): Change _coerce_ overloads.
19499 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
19500 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
19501 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
19502 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
19503 (__arm_vstrwq_p): Change _coerce_ overloads.
19504 (__arm_vstrwq): Change _coerce_ overloads.
19505 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
19506 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
19507 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
19508 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
19509 (__arm_vsetq_lane): Change _coerce_ overloads.
19510 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
19511 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
19512 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
19513 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
19514 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
19515 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
19516 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
19517 (__arm_vidupq_x_u8): Change _coerce_ overloads.
19518 (__arm_vddupq_x_u8): Change _coerce_ overloads.
19519 (__arm_vidupq_x_u16): Change _coerce_ overloads.
19520 (__arm_vddupq_x_u16): Change _coerce_ overloads.
19521 (__arm_vidupq_x_u32): Change _coerce_ overloads.
19522 (__arm_vddupq_x_u32): Change _coerce_ overloads.
19523 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
19524 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
19525 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
19526 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
19527 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
19528 (__arm_vidupq_u16): Change _coerce_ overloads.
19529 (__arm_vidupq_u32): Change _coerce_ overloads.
19530 (__arm_vidupq_u8): Change _coerce_ overloads.
19531 (__arm_vddupq_u16): Change _coerce_ overloads.
19532 (__arm_vddupq_u32): Change _coerce_ overloads.
19533 (__arm_vddupq_u8): Change _coerce_ overloads.
19534 (__arm_viwdupq_m): Change _coerce_ overloads.
19535 (__arm_viwdupq_u16): Change _coerce_ overloads.
19536 (__arm_viwdupq_u32): Change _coerce_ overloads.
19537 (__arm_viwdupq_u8): Change _coerce_ overloads.
19538 (__arm_vdwdupq_m): Change _coerce_ overloads.
19539 (__arm_vdwdupq_u16): Change _coerce_ overloads.
19540 (__arm_vdwdupq_u32): Change _coerce_ overloads.
19541 (__arm_vdwdupq_u8): Change _coerce_ overloads.
19542 (__arm_vstrbq): Change _coerce_ overloads.
19543 (__arm_vstrbq_p): Change _coerce_ overloads.
19544 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
19545 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
19546 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
19547 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
19548 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
19550 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19552 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
19555 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19557 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
19558 (__arm_vadcq_u32): Likewise.
19559 (__arm_vadcq_m_s32): Likewise.
19560 (__arm_vadcq_m_u32): Likewise.
19561 (__arm_vsbcq_s32): Likewise.
19562 (__arm_vsbcq_u32): Likewise.
19563 (__arm_vsbcq_m_s32): Likewise.
19564 (__arm_vsbcq_m_u32): Likewise.
19565 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
19567 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
19569 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
19570 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
19571 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
19572 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
19573 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
19574 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
19575 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
19576 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
19577 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
19578 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
19579 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
19580 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
19581 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
19582 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
19583 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
19584 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
19585 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
19586 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
19587 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
19588 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
19589 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
19590 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
19591 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
19592 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
19593 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
19594 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
19595 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
19596 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
19597 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
19598 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
19599 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
19600 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
19601 (mve_vorrq_m_f<mode>)
19602 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
19603 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
19604 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
19605 capitalization in the emitted asm.
19607 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
19609 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
19611 (Ri): Move constraint definition from predicates.md.
19612 (Rl): Define new constraint.
19613 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
19614 missing constraint.
19615 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
19616 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
19617 op 2. Fix asm output spacing.
19618 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
19619 * config/arm/predicates.md (Ri) Move constraint to constraints.md
19620 (mve_vldrd_immediate): Move it from
19622 (mve_vstrw_immediate): New predicate.
19624 2023-05-18 Pan Li <pan2.li@intel.com>
19625 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19626 Kito Cheng <kito.cheng@sifive.com>
19627 Richard Biener <rguenther@suse.de>
19628 Richard Sandiford <richard.sandiford@arm.com>
19630 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
19631 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
19632 (struct table_elt): Extend machine_mode to 16 bits.
19633 (struct set): Ditto.
19634 * genmodes.cc (emit_mode_wider): Extend type from char to short.
19635 (emit_mode_complex): Ditto.
19636 (emit_mode_inner): Ditto.
19637 (emit_class_narrowest_mode): Ditto.
19638 * genopinit.cc (main): Extend the machine_mode limit.
19639 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
19640 re-ordered the struct fields for padding.
19641 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
19642 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
19643 (get_mode_alignment): Extend type from char to short.
19644 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
19645 removed the ATTRIBUTE_PACKED.
19646 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
19647 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
19648 m_kind to 2 bits and remove m_spare.
19649 * rtl.h (RTX_CODE_BITSIZE): New macro.
19650 (struct rtx_def): Swap both the bit size and location between the
19651 rtx_code and the machine_mode.
19652 (subreg_shape::unique_id): Extend the machine_mode limit.
19653 * rtlanal.h: Extend machine_mode to 16 bits.
19654 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
19655 bits and re-ordered the struct fields for padding.
19656 (struct tree_decl_common): Extend machine_mode to 16 bits.
19658 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
19660 * genrecog.cc (print_nonbool_test): Fix type error of
19661 switch (SUBREG_BYTE (op))'.
19663 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
19665 * common/config/riscv/riscv-common.cc: Remove
19666 trailing spaces on lines.
19667 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
19668 * config/riscv/riscv.h (enum reg_class): Likewise.
19669 * config/riscv/riscv.md: Likewise.
19671 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
19673 * config/pa/pa.md (clear_cache): New.
19675 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
19677 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
19678 parenthesis. Fix misnamed index entry.
19679 <concept>: Fix misnamed index entry.
19681 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
19683 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
19685 (*<optab>si3_mask, *<optab>di3_mask): Here.
19686 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
19687 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
19689 (*<bitmanip_optab>si3_sext_mask): Likewise.
19690 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
19691 and const_di_mask_operand.
19692 (bitmanip_rotate): New iterator.
19693 (bitmanip_optab): Add rotates.
19694 * config/riscv/predicates.md (const_si_mask_operand): Renamed
19695 from const31_operand. Generalize to handle more mask constants.
19696 (const_di_mask_operand): Similarly.
19698 2023-05-17 Jakub Jelinek <jakub@redhat.com>
19701 * config/i386/i386-builtin-types.def (FLOAT128): Use
19702 float128t_type_node rather than float128_type_node.
19704 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
19706 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
19707 FP_CONTRACT_FAST (no functional change).
19709 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
19711 * config/i386/i386.cc (ix86_multiplication_cost): Correct
19712 calcuation of integer vector mode costs to reflect generated
19713 instruction sequences of different integer vector modes and
19714 different target ABIs.
19716 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19718 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
19719 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
19720 (riscv_mode_needed): Ditto.
19721 (riscv_mode_after): Ditto.
19722 (riscv_mode_entry): Ditto.
19723 (riscv_mode_exit): Ditto.
19724 (riscv_mode_priority): Ditto.
19725 (TARGET_MODE_EMIT): New target hook.
19726 (TARGET_MODE_NEEDED): Ditto.
19727 (TARGET_MODE_AFTER): Ditto.
19728 (TARGET_MODE_ENTRY): Ditto.
19729 (TARGET_MODE_EXIT): Ditto.
19730 (TARGET_MODE_PRIORITY): Ditto.
19731 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
19732 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
19733 * config/riscv/riscv.md: Add csrwvxrm.
19734 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
19735 (vxrmsi): New pattern.
19737 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19739 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
19740 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
19741 (struct narrow_alu_def): Ditto.
19742 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
19743 (function_expander::use_exact_insn): Ditto.
19744 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
19745 (function_base::has_rounding_mode_operand_p): New function.
19747 2023-05-17 Andrew Pinski <apinski@marvell.com>
19749 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
19750 against 0 instead of calling integer_zerop.
19752 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19754 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
19755 (DEF_RVV_VXRM_ENUM): New macro.
19756 (handle_pragma_vector): Add vxrm enum register.
19757 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
19763 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
19765 * value-range.h (Value_Range::operator=): New.
19767 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
19769 * value-range.cc (vrange::operator=): Add a stub to copy
19770 unsupported ranges.
19771 * value-range.h (is_a <unsupported_range>): New.
19772 (Value_Range::operator=): Support copying unsupported ranges.
19774 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
19776 * data-streamer-in.cc (streamer_read_real_value): New.
19777 (streamer_read_value_range): New.
19778 * data-streamer-out.cc (streamer_write_real_value): New.
19779 (streamer_write_vrange): New.
19780 * data-streamer.h (streamer_write_vrange): New.
19781 (streamer_read_value_range): New.
19783 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
19786 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
19787 is ignored for a fixed underlying type.
19788 (C++ Dialect Options): Likewise for -fstrict-enums.
19790 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
19792 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
19795 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19797 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
19799 (s390_atomic_align_for_mode): New.
19801 2023-05-17 Jakub Jelinek <jakub@redhat.com>
19803 * wide-int.cc (wi::from_array): Add missing closing paren in function
19806 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
19808 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
19809 suggested unroll factor once the previous analysis fails.
19811 2023-05-17 Pan Li <pan2.li@intel.com>
19813 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
19815 (main): Add bool1 to the type indexer.
19816 * config/riscv/riscv-vector-builtins-functions.def
19817 (vreinterpret): Register vbool1 interpret function.
19818 * config/riscv/riscv-vector-builtins-types.def
19819 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
19820 (vint8m1_t): Add the type to bool1_interpret_ops.
19821 (vint16m1_t): Ditto.
19822 (vint32m1_t): Ditto.
19823 (vint64m1_t): Ditto.
19824 (vuint8m1_t): Ditto.
19825 (vuint16m1_t): Ditto.
19826 (vuint32m1_t): Ditto.
19827 (vuint64m1_t): Ditto.
19828 * config/riscv/riscv-vector-builtins.cc
19829 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
19830 (required_extensions_p): Add bool1 interpret case.
19831 * config/riscv/riscv-vector-builtins.def
19832 (bool1_interpret): Add bool1 interpret to base type.
19833 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
19834 with VB dest for vreinterpret.
19836 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
19839 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
19840 constants through "lis; xoris".
19842 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
19844 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
19845 default rs6000 target pass for O2 and above.
19846 * doc/invoke.texi: Document -free
19848 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
19850 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
19851 Fix wrong select_kind...
19853 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19855 * config/s390/s390-protos.h (s390_expand_setmem): Change
19856 function signature.
19857 * config/s390/s390.cc (s390_expand_setmem): For memset's less
19858 than or equal to 256 byte do not perform a libc call.
19859 * config/s390/s390.md: Change expander into a version which
19862 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19864 * config/s390/s390-protos.h (s390_expand_movmem): New.
19865 * config/s390/s390.cc (s390_expand_movmem): New.
19866 * config/s390/s390.md (movmem<mode>): New.
19870 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19872 * config/s390/s390-protos.h (s390_expand_cpymem): Change
19873 function signature.
19874 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
19875 than or equal to 256 byte do not perform a libc call.
19876 (s390_expand_insv): Adapt new function signature of
19877 s390_expand_cpymem.
19878 * config/s390/s390.md: Change expander into a version which
19881 2023-05-16 Andrew Pinski <apinski@marvell.com>
19883 PR tree-optimization/109424
19884 * match.pd: Add patterns for min/max of zero_one_valued
19887 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19889 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
19890 * config/riscv/riscv-vector-builtins.cc
19891 (function_expander::use_ternop_insn): Add default rounding mode.
19892 (function_expander::use_widen_ternop_insn): Ditto.
19893 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
19894 (riscv_hard_regno_mode_ok): Ditto.
19895 (riscv_conditional_register_usage): Ditto.
19896 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
19897 (FRM_REG_P): Ditto.
19898 (RISCV_DWARF_FRM): Ditto.
19899 * config/riscv/riscv.md: Ditto.
19900 * config/riscv/vector-iterators.md: split no frm and has frm operations.
19901 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
19902 (@pred_<optab><mode>): Ditto.
19904 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
19906 PR tree-optimization/109695
19907 * value-range.cc (irange::operator=): Resize range.
19908 (irange::union_): Same.
19909 (irange::intersect): Same.
19910 (irange::invert): Same.
19911 (int_range_max): Default to 3 sub-ranges and resize as needed.
19912 * value-range.h (irange::maybe_resize): New.
19914 (int_range::int_range): Adjust for resizing.
19915 (int_range::operator=): Same.
19917 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
19919 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
19921 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
19922 when range changed.
19924 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19926 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
19927 * config/riscv/riscv-vector-builtins.cc
19928 (function_expander::use_exact_insn): Add default rounding mode operand.
19929 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
19930 (riscv_hard_regno_mode_ok): Ditto.
19931 (riscv_conditional_register_usage): Ditto.
19932 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
19933 (VXRM_REG_P): Ditto.
19934 (RISCV_DWARF_VXRM): Ditto.
19935 * config/riscv/riscv.md: Ditto.
19936 * config/riscv/vector.md: Ditto
19938 2023-05-15 Pan Li <pan2.li@intel.com>
19940 * optabs.cc (maybe_gen_insn): Add case to generate instruction
19941 that has 11 operands.
19943 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19945 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
19946 logic for vector modes.
19948 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19951 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
19952 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
19953 (aarch64_cmtst<mode>): Rename to...
19954 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
19955 (*aarch64_cmtst_same_<mode>): Rename to...
19956 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
19957 (*aarch64_cmtstdi): Rename to...
19958 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
19959 (aarch64_fac<optab><mode>): Rename to...
19960 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
19962 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19965 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
19966 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
19968 2023-05-15 Pan Li <pan2.li@intel.com>
19969 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19970 kito-cheng <kito.cheng@sifive.com>
19972 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
19973 deciding the mode is constant or not.
19974 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
19976 2023-05-15 Richard Biener <rguenther@suse.de>
19978 PR tree-optimization/109848
19979 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
19980 TARGET_MEM_REF address preparation before the store, not
19983 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19985 * config/riscv/riscv.cc
19986 (riscv_vectorize_preferred_vector_alignment): New function.
19987 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
19989 2023-05-14 Andrew Pinski <apinski@marvell.com>
19991 PR tree-optimization/109829
19992 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
19994 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
19997 * config/i386/i386.cc: Revert the 2023-05-11 change.
19998 (ix86_widen_mult_cost): Return high value instead of
19999 ICEing for unsupported modes.
20001 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
20003 * config/i386/i386.cc (x86_function_profiler): Take
20004 ix86_direct_extern_access into account when generating calls
20007 2023-05-14 Pan Li <pan2.li@intel.com>
20009 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
20010 Refactor the or pattern to switch cases.
20012 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
20014 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
20015 aarch64_expand_vector_init to this, and remove interleaving case.
20016 Recursively call aarch64_expand_vector_init_fallback, instead of
20017 aarch64_expand_vector_init.
20018 (aarch64_unzip_vector_init): New function.
20019 (aarch64_expand_vector_init): Likewise.
20021 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
20023 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
20024 Pull out function call from the gcc_assert.
20026 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
20028 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
20029 (policy_to_str): New.
20030 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
20032 2023-05-13 Andrew Pinski <apinski@marvell.com>
20034 PR tree-optimization/109834
20035 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
20036 (popcount(rotate(x,y))->popcount(x)): Likewise.
20038 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
20040 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
20041 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
20042 gen_extend_insn to generate zero/sign extension instructions.
20044 (ix86_expand_vecop_qihi): Initialize interleave functions
20045 for MULT code only. Fix comments.
20047 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
20050 * config/i386/mmx.md (mulv2si3): Remove expander.
20051 (mulv2si3): Rename insn pattern from *mulv2si.
20053 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
20055 PR libstdc++/109816
20056 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
20057 '!lto_stream_offload_p'.
20059 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
20060 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20063 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
20064 (local_avl_compatible_p): New.
20065 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
20066 for LCM, rewrite as a backward algorithm.
20067 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
20068 interface, handle a BB at once.
20070 2023-05-12 Richard Biener <rguenther@suse.de>
20072 PR tree-optimization/64731
20073 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
20074 handle TARGET_MEM_REF destinations of stores from vector
20077 2023-05-12 Richard Biener <rguenther@suse.de>
20079 PR tree-optimization/109791
20080 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
20082 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
20085 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20087 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
20088 * config/arm/arm-mve-builtins-base.def (vsriq): New.
20089 * config/arm/arm-mve-builtins-base.h (vsriq): New.
20090 * config/arm/arm-mve-builtins.cc
20091 (function_instance::has_inactive_argument): Handle vsriq.
20092 * config/arm/arm_mve.h (vsriq): Remove.
20094 (vsriq_n_u8): Remove.
20095 (vsriq_n_s8): Remove.
20096 (vsriq_n_u16): Remove.
20097 (vsriq_n_s16): Remove.
20098 (vsriq_n_u32): Remove.
20099 (vsriq_n_s32): Remove.
20100 (vsriq_m_n_s8): Remove.
20101 (vsriq_m_n_u8): Remove.
20102 (vsriq_m_n_s16): Remove.
20103 (vsriq_m_n_u16): Remove.
20104 (vsriq_m_n_s32): Remove.
20105 (vsriq_m_n_u32): Remove.
20106 (__arm_vsriq_n_u8): Remove.
20107 (__arm_vsriq_n_s8): Remove.
20108 (__arm_vsriq_n_u16): Remove.
20109 (__arm_vsriq_n_s16): Remove.
20110 (__arm_vsriq_n_u32): Remove.
20111 (__arm_vsriq_n_s32): Remove.
20112 (__arm_vsriq_m_n_s8): Remove.
20113 (__arm_vsriq_m_n_u8): Remove.
20114 (__arm_vsriq_m_n_s16): Remove.
20115 (__arm_vsriq_m_n_u16): Remove.
20116 (__arm_vsriq_m_n_s32): Remove.
20117 (__arm_vsriq_m_n_u32): Remove.
20118 (__arm_vsriq): Remove.
20119 (__arm_vsriq_m): Remove.
20121 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20123 * config/arm/iterators.md (mve_insn): Add vsri.
20124 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
20125 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
20126 (mve_vsriq_m_n_<supf><mode>): Rename into ...
20127 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20129 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20131 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
20132 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
20134 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20136 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
20137 * config/arm/arm-mve-builtins-base.def (vsliq): New.
20138 * config/arm/arm-mve-builtins-base.h (vsliq): New.
20139 * config/arm/arm-mve-builtins.cc
20140 (function_instance::has_inactive_argument): Handle vsliq.
20141 * config/arm/arm_mve.h (vsliq): Remove.
20143 (vsliq_n_u8): Remove.
20144 (vsliq_n_s8): Remove.
20145 (vsliq_n_u16): Remove.
20146 (vsliq_n_s16): Remove.
20147 (vsliq_n_u32): Remove.
20148 (vsliq_n_s32): Remove.
20149 (vsliq_m_n_s8): Remove.
20150 (vsliq_m_n_s32): Remove.
20151 (vsliq_m_n_s16): Remove.
20152 (vsliq_m_n_u8): Remove.
20153 (vsliq_m_n_u32): Remove.
20154 (vsliq_m_n_u16): Remove.
20155 (__arm_vsliq_n_u8): Remove.
20156 (__arm_vsliq_n_s8): Remove.
20157 (__arm_vsliq_n_u16): Remove.
20158 (__arm_vsliq_n_s16): Remove.
20159 (__arm_vsliq_n_u32): Remove.
20160 (__arm_vsliq_n_s32): Remove.
20161 (__arm_vsliq_m_n_s8): Remove.
20162 (__arm_vsliq_m_n_s32): Remove.
20163 (__arm_vsliq_m_n_s16): Remove.
20164 (__arm_vsliq_m_n_u8): Remove.
20165 (__arm_vsliq_m_n_u32): Remove.
20166 (__arm_vsliq_m_n_u16): Remove.
20167 (__arm_vsliq): Remove.
20168 (__arm_vsliq_m): Remove.
20170 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20172 * config/arm/iterators.md (mve_insn>): Add vsli.
20173 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
20174 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20175 (mve_vsliq_m_n_<supf><mode>): Rename into ...
20176 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20178 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20180 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
20181 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
20183 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20185 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
20186 * config/arm/arm-mve-builtins-base.def (vpselq): New.
20187 * config/arm/arm-mve-builtins-base.h (vpselq): New.
20188 * config/arm/arm_mve.h (vpselq): Remove.
20189 (vpselq_u8): Remove.
20190 (vpselq_s8): Remove.
20191 (vpselq_u16): Remove.
20192 (vpselq_s16): Remove.
20193 (vpselq_u32): Remove.
20194 (vpselq_s32): Remove.
20195 (vpselq_u64): Remove.
20196 (vpselq_s64): Remove.
20197 (vpselq_f16): Remove.
20198 (vpselq_f32): Remove.
20199 (__arm_vpselq_u8): Remove.
20200 (__arm_vpselq_s8): Remove.
20201 (__arm_vpselq_u16): Remove.
20202 (__arm_vpselq_s16): Remove.
20203 (__arm_vpselq_u32): Remove.
20204 (__arm_vpselq_s32): Remove.
20205 (__arm_vpselq_u64): Remove.
20206 (__arm_vpselq_s64): Remove.
20207 (__arm_vpselq_f16): Remove.
20208 (__arm_vpselq_f32): Remove.
20209 (__arm_vpselq): Remove.
20211 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20213 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
20214 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
20216 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20218 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
20220 * config/arm/iterators.md (MVE_VPSELQ_F): New.
20221 (mve_insn): Add vpsel.
20222 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
20223 (@mve_<mve_insn>q_<supf><mode>): ... this.
20224 (@mve_vpselq_f<mode>): Rename into ...
20225 (@mve_<mve_insn>q_f<mode>): ... this.
20227 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20229 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
20230 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
20231 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
20232 * config/arm/arm-mve-builtins.cc
20233 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
20235 * config/arm/arm_mve.h (vfmaq): Remove.
20239 (vfmasq_m): Remove.
20241 (vfmaq_f16): Remove.
20242 (vfmaq_n_f16): Remove.
20243 (vfmasq_n_f16): Remove.
20244 (vfmsq_f16): Remove.
20245 (vfmaq_f32): Remove.
20246 (vfmaq_n_f32): Remove.
20247 (vfmasq_n_f32): Remove.
20248 (vfmsq_f32): Remove.
20249 (vfmaq_m_f32): Remove.
20250 (vfmaq_m_f16): Remove.
20251 (vfmaq_m_n_f32): Remove.
20252 (vfmaq_m_n_f16): Remove.
20253 (vfmasq_m_n_f32): Remove.
20254 (vfmasq_m_n_f16): Remove.
20255 (vfmsq_m_f32): Remove.
20256 (vfmsq_m_f16): Remove.
20257 (__arm_vfmaq_f16): Remove.
20258 (__arm_vfmaq_n_f16): Remove.
20259 (__arm_vfmasq_n_f16): Remove.
20260 (__arm_vfmsq_f16): Remove.
20261 (__arm_vfmaq_f32): Remove.
20262 (__arm_vfmaq_n_f32): Remove.
20263 (__arm_vfmasq_n_f32): Remove.
20264 (__arm_vfmsq_f32): Remove.
20265 (__arm_vfmaq_m_f32): Remove.
20266 (__arm_vfmaq_m_f16): Remove.
20267 (__arm_vfmaq_m_n_f32): Remove.
20268 (__arm_vfmaq_m_n_f16): Remove.
20269 (__arm_vfmasq_m_n_f32): Remove.
20270 (__arm_vfmasq_m_n_f16): Remove.
20271 (__arm_vfmsq_m_f32): Remove.
20272 (__arm_vfmsq_m_f16): Remove.
20273 (__arm_vfmaq): Remove.
20274 (__arm_vfmasq): Remove.
20275 (__arm_vfmsq): Remove.
20276 (__arm_vfmaq_m): Remove.
20277 (__arm_vfmasq_m): Remove.
20278 (__arm_vfmsq_m): Remove.
20280 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20282 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
20284 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
20285 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
20286 (mve_insn): Add vfma, vfmas, vfms.
20287 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
20289 (@mve_<mve_insn>q_f<mode>): ... this.
20290 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
20291 (@mve_<mve_insn>q_n_f<mode>): ... this.
20292 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
20293 @mve_<mve_insn>q_m_f<mode>.
20294 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
20295 @mve_<mve_insn>q_m_n_f<mode>.
20297 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20299 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
20300 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
20302 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20304 * config/arm/arm-mve-builtins-base.cc
20305 (FUNCTION_WITH_RTX_M_N_NO_F): New.
20307 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
20308 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
20309 * config/arm/arm_mve.h (vmvnq): Remove.
20312 (vmvnq_s8): Remove.
20313 (vmvnq_s16): Remove.
20314 (vmvnq_s32): Remove.
20315 (vmvnq_n_s16): Remove.
20316 (vmvnq_n_s32): Remove.
20317 (vmvnq_u8): Remove.
20318 (vmvnq_u16): Remove.
20319 (vmvnq_u32): Remove.
20320 (vmvnq_n_u16): Remove.
20321 (vmvnq_n_u32): Remove.
20322 (vmvnq_m_u8): Remove.
20323 (vmvnq_m_s8): Remove.
20324 (vmvnq_m_u16): Remove.
20325 (vmvnq_m_s16): Remove.
20326 (vmvnq_m_u32): Remove.
20327 (vmvnq_m_s32): Remove.
20328 (vmvnq_m_n_s16): Remove.
20329 (vmvnq_m_n_u16): Remove.
20330 (vmvnq_m_n_s32): Remove.
20331 (vmvnq_m_n_u32): Remove.
20332 (vmvnq_x_s8): Remove.
20333 (vmvnq_x_s16): Remove.
20334 (vmvnq_x_s32): Remove.
20335 (vmvnq_x_u8): Remove.
20336 (vmvnq_x_u16): Remove.
20337 (vmvnq_x_u32): Remove.
20338 (vmvnq_x_n_s16): Remove.
20339 (vmvnq_x_n_s32): Remove.
20340 (vmvnq_x_n_u16): Remove.
20341 (vmvnq_x_n_u32): Remove.
20342 (__arm_vmvnq_s8): Remove.
20343 (__arm_vmvnq_s16): Remove.
20344 (__arm_vmvnq_s32): Remove.
20345 (__arm_vmvnq_n_s16): Remove.
20346 (__arm_vmvnq_n_s32): Remove.
20347 (__arm_vmvnq_u8): Remove.
20348 (__arm_vmvnq_u16): Remove.
20349 (__arm_vmvnq_u32): Remove.
20350 (__arm_vmvnq_n_u16): Remove.
20351 (__arm_vmvnq_n_u32): Remove.
20352 (__arm_vmvnq_m_u8): Remove.
20353 (__arm_vmvnq_m_s8): Remove.
20354 (__arm_vmvnq_m_u16): Remove.
20355 (__arm_vmvnq_m_s16): Remove.
20356 (__arm_vmvnq_m_u32): Remove.
20357 (__arm_vmvnq_m_s32): Remove.
20358 (__arm_vmvnq_m_n_s16): Remove.
20359 (__arm_vmvnq_m_n_u16): Remove.
20360 (__arm_vmvnq_m_n_s32): Remove.
20361 (__arm_vmvnq_m_n_u32): Remove.
20362 (__arm_vmvnq_x_s8): Remove.
20363 (__arm_vmvnq_x_s16): Remove.
20364 (__arm_vmvnq_x_s32): Remove.
20365 (__arm_vmvnq_x_u8): Remove.
20366 (__arm_vmvnq_x_u16): Remove.
20367 (__arm_vmvnq_x_u32): Remove.
20368 (__arm_vmvnq_x_n_s16): Remove.
20369 (__arm_vmvnq_x_n_s32): Remove.
20370 (__arm_vmvnq_x_n_u16): Remove.
20371 (__arm_vmvnq_x_n_u32): Remove.
20372 (__arm_vmvnq): Remove.
20373 (__arm_vmvnq_m): Remove.
20374 (__arm_vmvnq_x): Remove.
20376 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20378 * config/arm/iterators.md (mve_insn): Add vmvn.
20379 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
20380 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20381 (mve_vmvnq_m_<supf><mode>): Rename into ...
20382 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20383 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
20384 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20386 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20388 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
20389 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
20391 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20393 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
20394 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
20395 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
20396 * config/arm/arm_mve.h (vbrsrq): Remove.
20397 (vbrsrq_m): Remove.
20398 (vbrsrq_x): Remove.
20399 (vbrsrq_n_f16): Remove.
20400 (vbrsrq_n_f32): Remove.
20401 (vbrsrq_n_u8): Remove.
20402 (vbrsrq_n_s8): Remove.
20403 (vbrsrq_n_u16): Remove.
20404 (vbrsrq_n_s16): Remove.
20405 (vbrsrq_n_u32): Remove.
20406 (vbrsrq_n_s32): Remove.
20407 (vbrsrq_m_n_s8): Remove.
20408 (vbrsrq_m_n_s32): Remove.
20409 (vbrsrq_m_n_s16): Remove.
20410 (vbrsrq_m_n_u8): Remove.
20411 (vbrsrq_m_n_u32): Remove.
20412 (vbrsrq_m_n_u16): Remove.
20413 (vbrsrq_m_n_f32): Remove.
20414 (vbrsrq_m_n_f16): Remove.
20415 (vbrsrq_x_n_s8): Remove.
20416 (vbrsrq_x_n_s16): Remove.
20417 (vbrsrq_x_n_s32): Remove.
20418 (vbrsrq_x_n_u8): Remove.
20419 (vbrsrq_x_n_u16): Remove.
20420 (vbrsrq_x_n_u32): Remove.
20421 (vbrsrq_x_n_f16): Remove.
20422 (vbrsrq_x_n_f32): Remove.
20423 (__arm_vbrsrq_n_u8): Remove.
20424 (__arm_vbrsrq_n_s8): Remove.
20425 (__arm_vbrsrq_n_u16): Remove.
20426 (__arm_vbrsrq_n_s16): Remove.
20427 (__arm_vbrsrq_n_u32): Remove.
20428 (__arm_vbrsrq_n_s32): Remove.
20429 (__arm_vbrsrq_m_n_s8): Remove.
20430 (__arm_vbrsrq_m_n_s32): Remove.
20431 (__arm_vbrsrq_m_n_s16): Remove.
20432 (__arm_vbrsrq_m_n_u8): Remove.
20433 (__arm_vbrsrq_m_n_u32): Remove.
20434 (__arm_vbrsrq_m_n_u16): Remove.
20435 (__arm_vbrsrq_x_n_s8): Remove.
20436 (__arm_vbrsrq_x_n_s16): Remove.
20437 (__arm_vbrsrq_x_n_s32): Remove.
20438 (__arm_vbrsrq_x_n_u8): Remove.
20439 (__arm_vbrsrq_x_n_u16): Remove.
20440 (__arm_vbrsrq_x_n_u32): Remove.
20441 (__arm_vbrsrq_n_f16): Remove.
20442 (__arm_vbrsrq_n_f32): Remove.
20443 (__arm_vbrsrq_m_n_f32): Remove.
20444 (__arm_vbrsrq_m_n_f16): Remove.
20445 (__arm_vbrsrq_x_n_f16): Remove.
20446 (__arm_vbrsrq_x_n_f32): Remove.
20447 (__arm_vbrsrq): Remove.
20448 (__arm_vbrsrq_m): Remove.
20449 (__arm_vbrsrq_x): Remove.
20451 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20453 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
20454 (mve_insn): Add vbrsr.
20455 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
20456 (@mve_<mve_insn>q_n_f<mode>): ... this.
20457 (mve_vbrsrq_n_<supf><mode>): Rename into ...
20458 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20459 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
20460 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20461 (mve_vbrsrq_m_n_f<mode>): Rename into ...
20462 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
20464 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20466 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
20467 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
20469 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20471 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
20472 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
20473 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
20474 * config/arm/arm_mve.h (vqshluq): Remove.
20475 (vqshluq_m): Remove.
20476 (vqshluq_n_s8): Remove.
20477 (vqshluq_n_s16): Remove.
20478 (vqshluq_n_s32): Remove.
20479 (vqshluq_m_n_s8): Remove.
20480 (vqshluq_m_n_s16): Remove.
20481 (vqshluq_m_n_s32): Remove.
20482 (__arm_vqshluq_n_s8): Remove.
20483 (__arm_vqshluq_n_s16): Remove.
20484 (__arm_vqshluq_n_s32): Remove.
20485 (__arm_vqshluq_m_n_s8): Remove.
20486 (__arm_vqshluq_m_n_s16): Remove.
20487 (__arm_vqshluq_m_n_s32): Remove.
20488 (__arm_vqshluq): Remove.
20489 (__arm_vqshluq_m): Remove.
20491 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20493 * config/arm/iterators.md (mve_insn): Add vqshlu.
20494 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
20495 (VQSHLUQ_M_N, VQSHLUQ_N): New.
20496 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
20497 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20498 (mve_vqshluq_m_n_s<mode>): Change name into ...
20499 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20501 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20503 * config/arm/arm-mve-builtins-shapes.cc
20504 (binary_lshift_unsigned): New.
20505 * config/arm/arm-mve-builtins-shapes.h
20506 (binary_lshift_unsigned): New.
20508 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20510 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
20511 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
20512 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
20513 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
20514 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
20515 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
20516 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
20517 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
20518 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
20519 (vrmlaldavhaxq): Remove.
20520 (vrmlsldavhaq): Remove.
20521 (vrmlsldavhaxq): Remove.
20522 (vrmlaldavhaq_p): Remove.
20523 (vrmlaldavhaxq_p): Remove.
20524 (vrmlsldavhaq_p): Remove.
20525 (vrmlsldavhaxq_p): Remove.
20526 (vrmlaldavhaq_s32): Remove.
20527 (vrmlaldavhaq_u32): Remove.
20528 (vrmlaldavhaxq_s32): Remove.
20529 (vrmlsldavhaq_s32): Remove.
20530 (vrmlsldavhaxq_s32): Remove.
20531 (vrmlaldavhaq_p_s32): Remove.
20532 (vrmlaldavhaq_p_u32): Remove.
20533 (vrmlaldavhaxq_p_s32): Remove.
20534 (vrmlsldavhaq_p_s32): Remove.
20535 (vrmlsldavhaxq_p_s32): Remove.
20536 (__arm_vrmlaldavhaq_s32): Remove.
20537 (__arm_vrmlaldavhaq_u32): Remove.
20538 (__arm_vrmlaldavhaxq_s32): Remove.
20539 (__arm_vrmlsldavhaq_s32): Remove.
20540 (__arm_vrmlsldavhaxq_s32): Remove.
20541 (__arm_vrmlaldavhaq_p_s32): Remove.
20542 (__arm_vrmlaldavhaq_p_u32): Remove.
20543 (__arm_vrmlaldavhaxq_p_s32): Remove.
20544 (__arm_vrmlsldavhaq_p_s32): Remove.
20545 (__arm_vrmlsldavhaxq_p_s32): Remove.
20546 (__arm_vrmlaldavhaq): Remove.
20547 (__arm_vrmlaldavhaxq): Remove.
20548 (__arm_vrmlsldavhaq): Remove.
20549 (__arm_vrmlsldavhaxq): Remove.
20550 (__arm_vrmlaldavhaq_p): Remove.
20551 (__arm_vrmlaldavhaxq_p): Remove.
20552 (__arm_vrmlsldavhaq_p): Remove.
20553 (__arm_vrmlsldavhaxq_p): Remove.
20555 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20557 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
20558 (MVE_VRMLxLDAVHAxQ_P): New.
20559 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
20561 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
20562 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
20564 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
20565 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
20566 (mve_vrmlsldavhaq_sv4si): Merge into ...
20567 (@mve_<mve_insn>q_<supf>v4si): ... this.
20568 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
20569 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
20570 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
20571 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
20573 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20575 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
20576 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
20578 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
20579 * config/arm/arm_mve.h (vqdmulltq): Remove.
20580 (vqdmullbq): Remove.
20581 (vqdmullbq_m): Remove.
20582 (vqdmulltq_m): Remove.
20583 (vqdmulltq_s16): Remove.
20584 (vqdmulltq_n_s16): Remove.
20585 (vqdmullbq_s16): Remove.
20586 (vqdmullbq_n_s16): Remove.
20587 (vqdmulltq_s32): Remove.
20588 (vqdmulltq_n_s32): Remove.
20589 (vqdmullbq_s32): Remove.
20590 (vqdmullbq_n_s32): Remove.
20591 (vqdmullbq_m_n_s32): Remove.
20592 (vqdmullbq_m_n_s16): Remove.
20593 (vqdmullbq_m_s32): Remove.
20594 (vqdmullbq_m_s16): Remove.
20595 (vqdmulltq_m_n_s32): Remove.
20596 (vqdmulltq_m_n_s16): Remove.
20597 (vqdmulltq_m_s32): Remove.
20598 (vqdmulltq_m_s16): Remove.
20599 (__arm_vqdmulltq_s16): Remove.
20600 (__arm_vqdmulltq_n_s16): Remove.
20601 (__arm_vqdmullbq_s16): Remove.
20602 (__arm_vqdmullbq_n_s16): Remove.
20603 (__arm_vqdmulltq_s32): Remove.
20604 (__arm_vqdmulltq_n_s32): Remove.
20605 (__arm_vqdmullbq_s32): Remove.
20606 (__arm_vqdmullbq_n_s32): Remove.
20607 (__arm_vqdmullbq_m_n_s32): Remove.
20608 (__arm_vqdmullbq_m_n_s16): Remove.
20609 (__arm_vqdmullbq_m_s32): Remove.
20610 (__arm_vqdmullbq_m_s16): Remove.
20611 (__arm_vqdmulltq_m_n_s32): Remove.
20612 (__arm_vqdmulltq_m_n_s16): Remove.
20613 (__arm_vqdmulltq_m_s32): Remove.
20614 (__arm_vqdmulltq_m_s16): Remove.
20615 (__arm_vqdmulltq): Remove.
20616 (__arm_vqdmullbq): Remove.
20617 (__arm_vqdmullbq_m): Remove.
20618 (__arm_vqdmulltq_m): Remove.
20620 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20622 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
20623 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
20624 (mve_insn): Add vqdmullb, vqdmullt.
20625 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
20626 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
20628 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
20629 (mve_vqdmulltq_n_s<mode>): Merge into ...
20630 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20631 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
20632 (@mve_<mve_insn>q_<supf><mode>): ... this.
20633 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
20635 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20636 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
20637 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20639 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
20641 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
20642 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
20644 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
20646 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
20647 Drop unused parameter.
20648 (riscv_select_multilib): Ditto.
20649 (riscv_compute_multilib): Update call site of
20650 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
20652 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
20654 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
20655 * config/riscv/riscv-protos.h (expand_vec_init): New function.
20656 * config/riscv/riscv-v.cc (class rvv_builder): New class.
20657 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
20658 (rvv_builder::get_merged_repeating_sequence): Ditto.
20659 (expand_vector_init_insert_elems): Ditto.
20660 (expand_vec_init): Ditto.
20661 * config/riscv/vector-iterators.md: New attribute.
20663 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
20665 * config/rs6000/rs6000-builtins.def
20666 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
20668 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
20669 xsiexpdpf to xsiexpdpf_di.
20670 * config/rs6000/vsx.md (xsiexpdp): Rename to...
20671 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
20672 replace TARGET_64BIT with TARGET_POWERPC64.
20673 (xsiexpdpf): Rename to...
20674 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
20675 replace TARGET_64BIT with TARGET_POWERPC64.
20677 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
20679 * config/rs6000/rs6000-builtins.def
20680 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
20682 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
20685 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
20687 * config/rs6000/rs6000-builtins.def
20688 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
20689 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
20691 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
20692 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
20693 TARGET_64BIT check.
20694 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
20695 requirement when it has a 64-bit argument.
20697 2023-05-12 Pan Li <pan2.li@intel.com>
20698 Richard Sandiford <richard.sandiford@arm.com>
20699 Richard Biener <rguenther@suse.de>
20700 Jakub Jelinek <jakub@redhat.com>
20702 * mux-utils.h: Add overload operator == and != for pointer_mux.
20703 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
20704 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
20705 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
20706 (dv_as_decl): Ditto.
20707 (dv_as_opaque): Removed due to unnecessary.
20708 (struct variable_hasher): Take decl_or_value as compare_type.
20709 (variable_hasher::equal): Diito.
20710 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
20711 (dv_from_value): Ditto.
20712 (attrs_list_member): Ditto.
20713 (vars_copy): Ditto.
20714 (var_reg_decl_set): Ditto.
20715 (var_reg_delete_and_set): Ditto.
20716 (find_loc_in_1pdv): Ditto.
20717 (canonicalize_values_star): Ditto.
20718 (variable_post_merge_new_vals): Ditto.
20719 (dump_onepart_variable_differences): Ditto.
20720 (variable_different_p): Ditto.
20721 (set_slot_part): Ditto.
20722 (clobber_slot_part): Ditto.
20723 (clobber_variable_part): Ditto.
20725 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
20727 * match.pd: simplify vector shift + bit_and + multiply.
20729 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20731 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
20732 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
20733 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
20734 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
20735 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
20736 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
20737 * config/arm/arm-mve-builtins.cc
20738 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
20739 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
20740 * config/arm/arm_mve.h (vqrdmlashq): Remove.
20741 (vqrdmlahq): Remove.
20742 (vqdmlashq): Remove.
20743 (vqdmlahq): Remove.
20747 (vmlasq_m): Remove.
20748 (vqdmlashq_m): Remove.
20749 (vqdmlahq_m): Remove.
20750 (vqrdmlahq_m): Remove.
20751 (vqrdmlashq_m): Remove.
20752 (vmlasq_n_u8): Remove.
20753 (vmlaq_n_u8): Remove.
20754 (vqrdmlashq_n_s8): Remove.
20755 (vqrdmlahq_n_s8): Remove.
20756 (vqdmlahq_n_s8): Remove.
20757 (vqdmlashq_n_s8): Remove.
20758 (vmlasq_n_s8): Remove.
20759 (vmlaq_n_s8): Remove.
20760 (vmlasq_n_u16): Remove.
20761 (vmlaq_n_u16): Remove.
20762 (vqrdmlashq_n_s16): Remove.
20763 (vqrdmlahq_n_s16): Remove.
20764 (vqdmlashq_n_s16): Remove.
20765 (vqdmlahq_n_s16): Remove.
20766 (vmlasq_n_s16): Remove.
20767 (vmlaq_n_s16): Remove.
20768 (vmlasq_n_u32): Remove.
20769 (vmlaq_n_u32): Remove.
20770 (vqrdmlashq_n_s32): Remove.
20771 (vqrdmlahq_n_s32): Remove.
20772 (vqdmlashq_n_s32): Remove.
20773 (vqdmlahq_n_s32): Remove.
20774 (vmlasq_n_s32): Remove.
20775 (vmlaq_n_s32): Remove.
20776 (vmlaq_m_n_s8): Remove.
20777 (vmlaq_m_n_s32): Remove.
20778 (vmlaq_m_n_s16): Remove.
20779 (vmlaq_m_n_u8): Remove.
20780 (vmlaq_m_n_u32): Remove.
20781 (vmlaq_m_n_u16): Remove.
20782 (vmlasq_m_n_s8): Remove.
20783 (vmlasq_m_n_s32): Remove.
20784 (vmlasq_m_n_s16): Remove.
20785 (vmlasq_m_n_u8): Remove.
20786 (vmlasq_m_n_u32): Remove.
20787 (vmlasq_m_n_u16): Remove.
20788 (vqdmlashq_m_n_s8): Remove.
20789 (vqdmlashq_m_n_s32): Remove.
20790 (vqdmlashq_m_n_s16): Remove.
20791 (vqdmlahq_m_n_s8): Remove.
20792 (vqdmlahq_m_n_s32): Remove.
20793 (vqdmlahq_m_n_s16): Remove.
20794 (vqrdmlahq_m_n_s8): Remove.
20795 (vqrdmlahq_m_n_s32): Remove.
20796 (vqrdmlahq_m_n_s16): Remove.
20797 (vqrdmlashq_m_n_s8): Remove.
20798 (vqrdmlashq_m_n_s32): Remove.
20799 (vqrdmlashq_m_n_s16): Remove.
20800 (__arm_vmlasq_n_u8): Remove.
20801 (__arm_vmlaq_n_u8): Remove.
20802 (__arm_vqrdmlashq_n_s8): Remove.
20803 (__arm_vqdmlashq_n_s8): Remove.
20804 (__arm_vqrdmlahq_n_s8): Remove.
20805 (__arm_vqdmlahq_n_s8): Remove.
20806 (__arm_vmlasq_n_s8): Remove.
20807 (__arm_vmlaq_n_s8): Remove.
20808 (__arm_vmlasq_n_u16): Remove.
20809 (__arm_vmlaq_n_u16): Remove.
20810 (__arm_vqrdmlashq_n_s16): Remove.
20811 (__arm_vqdmlashq_n_s16): Remove.
20812 (__arm_vqrdmlahq_n_s16): Remove.
20813 (__arm_vqdmlahq_n_s16): Remove.
20814 (__arm_vmlasq_n_s16): Remove.
20815 (__arm_vmlaq_n_s16): Remove.
20816 (__arm_vmlasq_n_u32): Remove.
20817 (__arm_vmlaq_n_u32): Remove.
20818 (__arm_vqrdmlashq_n_s32): Remove.
20819 (__arm_vqdmlashq_n_s32): Remove.
20820 (__arm_vqrdmlahq_n_s32): Remove.
20821 (__arm_vqdmlahq_n_s32): Remove.
20822 (__arm_vmlasq_n_s32): Remove.
20823 (__arm_vmlaq_n_s32): Remove.
20824 (__arm_vmlaq_m_n_s8): Remove.
20825 (__arm_vmlaq_m_n_s32): Remove.
20826 (__arm_vmlaq_m_n_s16): Remove.
20827 (__arm_vmlaq_m_n_u8): Remove.
20828 (__arm_vmlaq_m_n_u32): Remove.
20829 (__arm_vmlaq_m_n_u16): Remove.
20830 (__arm_vmlasq_m_n_s8): Remove.
20831 (__arm_vmlasq_m_n_s32): Remove.
20832 (__arm_vmlasq_m_n_s16): Remove.
20833 (__arm_vmlasq_m_n_u8): Remove.
20834 (__arm_vmlasq_m_n_u32): Remove.
20835 (__arm_vmlasq_m_n_u16): Remove.
20836 (__arm_vqdmlahq_m_n_s8): Remove.
20837 (__arm_vqdmlahq_m_n_s32): Remove.
20838 (__arm_vqdmlahq_m_n_s16): Remove.
20839 (__arm_vqrdmlahq_m_n_s8): Remove.
20840 (__arm_vqrdmlahq_m_n_s32): Remove.
20841 (__arm_vqrdmlahq_m_n_s16): Remove.
20842 (__arm_vqrdmlashq_m_n_s8): Remove.
20843 (__arm_vqrdmlashq_m_n_s32): Remove.
20844 (__arm_vqrdmlashq_m_n_s16): Remove.
20845 (__arm_vqdmlashq_m_n_s8): Remove.
20846 (__arm_vqdmlashq_m_n_s16): Remove.
20847 (__arm_vqdmlashq_m_n_s32): Remove.
20848 (__arm_vmlasq): Remove.
20849 (__arm_vmlaq): Remove.
20850 (__arm_vqrdmlashq): Remove.
20851 (__arm_vqdmlashq): Remove.
20852 (__arm_vqrdmlahq): Remove.
20853 (__arm_vqdmlahq): Remove.
20854 (__arm_vmlaq_m): Remove.
20855 (__arm_vmlasq_m): Remove.
20856 (__arm_vqdmlahq_m): Remove.
20857 (__arm_vqrdmlahq_m): Remove.
20858 (__arm_vqrdmlashq_m): Remove.
20859 (__arm_vqdmlashq_m): Remove.
20861 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20863 * config/arm/iterators.md (MVE_VMLxQ_N): New.
20864 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
20866 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
20868 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
20869 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
20870 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
20871 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
20872 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20874 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20876 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
20877 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
20879 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20881 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
20882 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
20883 (vqrdmlsdhxq): New.
20884 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
20885 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
20886 (vqrdmlsdhxq): New.
20887 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
20888 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
20889 (vqrdmlsdhxq): New.
20890 * config/arm/arm-mve-builtins.cc
20891 (function_instance::has_inactive_argument): Handle vqrdmladhq,
20892 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
20893 vqdmlsdhq, vqdmlsdhxq.
20894 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
20895 (vqrdmlsdhq): Remove.
20896 (vqrdmladhxq): Remove.
20897 (vqrdmladhq): Remove.
20898 (vqdmlsdhxq): Remove.
20899 (vqdmlsdhq): Remove.
20900 (vqdmladhxq): Remove.
20901 (vqdmladhq): Remove.
20902 (vqdmladhq_m): Remove.
20903 (vqdmladhxq_m): Remove.
20904 (vqdmlsdhq_m): Remove.
20905 (vqdmlsdhxq_m): Remove.
20906 (vqrdmladhq_m): Remove.
20907 (vqrdmladhxq_m): Remove.
20908 (vqrdmlsdhq_m): Remove.
20909 (vqrdmlsdhxq_m): Remove.
20910 (vqrdmlsdhxq_s8): Remove.
20911 (vqrdmlsdhq_s8): Remove.
20912 (vqrdmladhxq_s8): Remove.
20913 (vqrdmladhq_s8): Remove.
20914 (vqdmlsdhxq_s8): Remove.
20915 (vqdmlsdhq_s8): Remove.
20916 (vqdmladhxq_s8): Remove.
20917 (vqdmladhq_s8): Remove.
20918 (vqrdmlsdhxq_s16): Remove.
20919 (vqrdmlsdhq_s16): Remove.
20920 (vqrdmladhxq_s16): Remove.
20921 (vqrdmladhq_s16): Remove.
20922 (vqdmlsdhxq_s16): Remove.
20923 (vqdmlsdhq_s16): Remove.
20924 (vqdmladhxq_s16): Remove.
20925 (vqdmladhq_s16): Remove.
20926 (vqrdmlsdhxq_s32): Remove.
20927 (vqrdmlsdhq_s32): Remove.
20928 (vqrdmladhxq_s32): Remove.
20929 (vqrdmladhq_s32): Remove.
20930 (vqdmlsdhxq_s32): Remove.
20931 (vqdmlsdhq_s32): Remove.
20932 (vqdmladhxq_s32): Remove.
20933 (vqdmladhq_s32): Remove.
20934 (vqdmladhq_m_s8): Remove.
20935 (vqdmladhq_m_s32): Remove.
20936 (vqdmladhq_m_s16): Remove.
20937 (vqdmladhxq_m_s8): Remove.
20938 (vqdmladhxq_m_s32): Remove.
20939 (vqdmladhxq_m_s16): Remove.
20940 (vqdmlsdhq_m_s8): Remove.
20941 (vqdmlsdhq_m_s32): Remove.
20942 (vqdmlsdhq_m_s16): Remove.
20943 (vqdmlsdhxq_m_s8): Remove.
20944 (vqdmlsdhxq_m_s32): Remove.
20945 (vqdmlsdhxq_m_s16): Remove.
20946 (vqrdmladhq_m_s8): Remove.
20947 (vqrdmladhq_m_s32): Remove.
20948 (vqrdmladhq_m_s16): Remove.
20949 (vqrdmladhxq_m_s8): Remove.
20950 (vqrdmladhxq_m_s32): Remove.
20951 (vqrdmladhxq_m_s16): Remove.
20952 (vqrdmlsdhq_m_s8): Remove.
20953 (vqrdmlsdhq_m_s32): Remove.
20954 (vqrdmlsdhq_m_s16): Remove.
20955 (vqrdmlsdhxq_m_s8): Remove.
20956 (vqrdmlsdhxq_m_s32): Remove.
20957 (vqrdmlsdhxq_m_s16): Remove.
20958 (__arm_vqrdmlsdhxq_s8): Remove.
20959 (__arm_vqrdmlsdhq_s8): Remove.
20960 (__arm_vqrdmladhxq_s8): Remove.
20961 (__arm_vqrdmladhq_s8): Remove.
20962 (__arm_vqdmlsdhxq_s8): Remove.
20963 (__arm_vqdmlsdhq_s8): Remove.
20964 (__arm_vqdmladhxq_s8): Remove.
20965 (__arm_vqdmladhq_s8): Remove.
20966 (__arm_vqrdmlsdhxq_s16): Remove.
20967 (__arm_vqrdmlsdhq_s16): Remove.
20968 (__arm_vqrdmladhxq_s16): Remove.
20969 (__arm_vqrdmladhq_s16): Remove.
20970 (__arm_vqdmlsdhxq_s16): Remove.
20971 (__arm_vqdmlsdhq_s16): Remove.
20972 (__arm_vqdmladhxq_s16): Remove.
20973 (__arm_vqdmladhq_s16): Remove.
20974 (__arm_vqrdmlsdhxq_s32): Remove.
20975 (__arm_vqrdmlsdhq_s32): Remove.
20976 (__arm_vqrdmladhxq_s32): Remove.
20977 (__arm_vqrdmladhq_s32): Remove.
20978 (__arm_vqdmlsdhxq_s32): Remove.
20979 (__arm_vqdmlsdhq_s32): Remove.
20980 (__arm_vqdmladhxq_s32): Remove.
20981 (__arm_vqdmladhq_s32): Remove.
20982 (__arm_vqdmladhq_m_s8): Remove.
20983 (__arm_vqdmladhq_m_s32): Remove.
20984 (__arm_vqdmladhq_m_s16): Remove.
20985 (__arm_vqdmladhxq_m_s8): Remove.
20986 (__arm_vqdmladhxq_m_s32): Remove.
20987 (__arm_vqdmladhxq_m_s16): Remove.
20988 (__arm_vqdmlsdhq_m_s8): Remove.
20989 (__arm_vqdmlsdhq_m_s32): Remove.
20990 (__arm_vqdmlsdhq_m_s16): Remove.
20991 (__arm_vqdmlsdhxq_m_s8): Remove.
20992 (__arm_vqdmlsdhxq_m_s32): Remove.
20993 (__arm_vqdmlsdhxq_m_s16): Remove.
20994 (__arm_vqrdmladhq_m_s8): Remove.
20995 (__arm_vqrdmladhq_m_s32): Remove.
20996 (__arm_vqrdmladhq_m_s16): Remove.
20997 (__arm_vqrdmladhxq_m_s8): Remove.
20998 (__arm_vqrdmladhxq_m_s32): Remove.
20999 (__arm_vqrdmladhxq_m_s16): Remove.
21000 (__arm_vqrdmlsdhq_m_s8): Remove.
21001 (__arm_vqrdmlsdhq_m_s32): Remove.
21002 (__arm_vqrdmlsdhq_m_s16): Remove.
21003 (__arm_vqrdmlsdhxq_m_s8): Remove.
21004 (__arm_vqrdmlsdhxq_m_s32): Remove.
21005 (__arm_vqrdmlsdhxq_m_s16): Remove.
21006 (__arm_vqrdmlsdhxq): Remove.
21007 (__arm_vqrdmlsdhq): Remove.
21008 (__arm_vqrdmladhxq): Remove.
21009 (__arm_vqrdmladhq): Remove.
21010 (__arm_vqdmlsdhxq): Remove.
21011 (__arm_vqdmlsdhq): Remove.
21012 (__arm_vqdmladhxq): Remove.
21013 (__arm_vqdmladhq): Remove.
21014 (__arm_vqdmladhq_m): Remove.
21015 (__arm_vqdmladhxq_m): Remove.
21016 (__arm_vqdmlsdhq_m): Remove.
21017 (__arm_vqdmlsdhxq_m): Remove.
21018 (__arm_vqrdmladhq_m): Remove.
21019 (__arm_vqrdmladhxq_m): Remove.
21020 (__arm_vqrdmlsdhq_m): Remove.
21021 (__arm_vqrdmlsdhxq_m): Remove.
21023 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21025 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
21026 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
21027 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
21028 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
21029 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
21030 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
21031 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
21032 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
21033 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
21034 (mve_vqdmladhq_s<mode>): Merge into ...
21035 (@mve_<mve_insn>q_<supf><mode>): ... this.
21037 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21039 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
21040 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
21042 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21044 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
21045 (vmlsldavaq, vmlsldavaxq): New.
21046 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
21047 (vmlsldavaq, vmlsldavaxq): New.
21048 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
21049 (vmlsldavaq, vmlsldavaxq): New.
21050 * config/arm/arm_mve.h (vmlaldavaq): Remove.
21051 (vmlaldavaxq): Remove.
21052 (vmlsldavaq): Remove.
21053 (vmlsldavaxq): Remove.
21054 (vmlaldavaq_p): Remove.
21055 (vmlaldavaxq_p): Remove.
21056 (vmlsldavaq_p): Remove.
21057 (vmlsldavaxq_p): Remove.
21058 (vmlaldavaq_s16): Remove.
21059 (vmlaldavaxq_s16): Remove.
21060 (vmlsldavaq_s16): Remove.
21061 (vmlsldavaxq_s16): Remove.
21062 (vmlaldavaq_u16): Remove.
21063 (vmlaldavaq_s32): Remove.
21064 (vmlaldavaxq_s32): Remove.
21065 (vmlsldavaq_s32): Remove.
21066 (vmlsldavaxq_s32): Remove.
21067 (vmlaldavaq_u32): Remove.
21068 (vmlaldavaq_p_s32): Remove.
21069 (vmlaldavaq_p_s16): Remove.
21070 (vmlaldavaq_p_u32): Remove.
21071 (vmlaldavaq_p_u16): Remove.
21072 (vmlaldavaxq_p_s32): Remove.
21073 (vmlaldavaxq_p_s16): Remove.
21074 (vmlsldavaq_p_s32): Remove.
21075 (vmlsldavaq_p_s16): Remove.
21076 (vmlsldavaxq_p_s32): Remove.
21077 (vmlsldavaxq_p_s16): Remove.
21078 (__arm_vmlaldavaq_s16): Remove.
21079 (__arm_vmlaldavaxq_s16): Remove.
21080 (__arm_vmlsldavaq_s16): Remove.
21081 (__arm_vmlsldavaxq_s16): Remove.
21082 (__arm_vmlaldavaq_u16): Remove.
21083 (__arm_vmlaldavaq_s32): Remove.
21084 (__arm_vmlaldavaxq_s32): Remove.
21085 (__arm_vmlsldavaq_s32): Remove.
21086 (__arm_vmlsldavaxq_s32): Remove.
21087 (__arm_vmlaldavaq_u32): Remove.
21088 (__arm_vmlaldavaq_p_s32): Remove.
21089 (__arm_vmlaldavaq_p_s16): Remove.
21090 (__arm_vmlaldavaq_p_u32): Remove.
21091 (__arm_vmlaldavaq_p_u16): Remove.
21092 (__arm_vmlaldavaxq_p_s32): Remove.
21093 (__arm_vmlaldavaxq_p_s16): Remove.
21094 (__arm_vmlsldavaq_p_s32): Remove.
21095 (__arm_vmlsldavaq_p_s16): Remove.
21096 (__arm_vmlsldavaxq_p_s32): Remove.
21097 (__arm_vmlsldavaxq_p_s16): Remove.
21098 (__arm_vmlaldavaq): Remove.
21099 (__arm_vmlaldavaxq): Remove.
21100 (__arm_vmlsldavaq): Remove.
21101 (__arm_vmlsldavaxq): Remove.
21102 (__arm_vmlaldavaq_p): Remove.
21103 (__arm_vmlaldavaxq_p): Remove.
21104 (__arm_vmlsldavaq_p): Remove.
21105 (__arm_vmlsldavaxq_p): Remove.
21107 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21109 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
21111 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
21112 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
21113 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
21114 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
21115 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
21116 (mve_vmlaldavaxq_s<mode>): Merge into ...
21117 (@mve_<mve_insn>q_<supf><mode>): ... this.
21118 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
21119 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
21121 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21123 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21125 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
21126 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
21128 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21130 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
21131 (vrmlsldavhq, vrmlsldavhxq): New.
21132 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
21133 (vrmlsldavhq, vrmlsldavhxq): New.
21134 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
21135 (vrmlsldavhq, vrmlsldavhxq): New.
21136 * config/arm/arm-mve-builtins-functions.h
21137 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
21138 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
21139 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
21140 (vrmlsldavhxq): Remove.
21141 (vrmlsldavhq): Remove.
21142 (vrmlaldavhxq): Remove.
21143 (vrmlaldavhq_p): Remove.
21144 (vrmlaldavhxq_p): Remove.
21145 (vrmlsldavhq_p): Remove.
21146 (vrmlsldavhxq_p): Remove.
21147 (vrmlaldavhq_u32): Remove.
21148 (vrmlsldavhxq_s32): Remove.
21149 (vrmlsldavhq_s32): Remove.
21150 (vrmlaldavhxq_s32): Remove.
21151 (vrmlaldavhq_s32): Remove.
21152 (vrmlaldavhq_p_s32): Remove.
21153 (vrmlaldavhxq_p_s32): Remove.
21154 (vrmlsldavhq_p_s32): Remove.
21155 (vrmlsldavhxq_p_s32): Remove.
21156 (vrmlaldavhq_p_u32): Remove.
21157 (__arm_vrmlaldavhq_u32): Remove.
21158 (__arm_vrmlsldavhxq_s32): Remove.
21159 (__arm_vrmlsldavhq_s32): Remove.
21160 (__arm_vrmlaldavhxq_s32): Remove.
21161 (__arm_vrmlaldavhq_s32): Remove.
21162 (__arm_vrmlaldavhq_p_s32): Remove.
21163 (__arm_vrmlaldavhxq_p_s32): Remove.
21164 (__arm_vrmlsldavhq_p_s32): Remove.
21165 (__arm_vrmlsldavhxq_p_s32): Remove.
21166 (__arm_vrmlaldavhq_p_u32): Remove.
21167 (__arm_vrmlaldavhq): Remove.
21168 (__arm_vrmlsldavhxq): Remove.
21169 (__arm_vrmlsldavhq): Remove.
21170 (__arm_vrmlaldavhxq): Remove.
21171 (__arm_vrmlaldavhq_p): Remove.
21172 (__arm_vrmlaldavhxq_p): Remove.
21173 (__arm_vrmlsldavhq_p): Remove.
21174 (__arm_vrmlsldavhxq_p): Remove.
21176 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21178 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
21180 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
21181 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
21182 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
21183 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
21184 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
21185 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
21186 (@mve_<mve_insn>q_<supf>v4si): ... this.
21187 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
21188 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
21190 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
21192 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21194 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
21195 (vmlsldavq, vmlsldavxq): New.
21196 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
21197 (vmlsldavq, vmlsldavxq): New.
21198 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
21199 (vmlsldavq, vmlsldavxq): New.
21200 * config/arm/arm_mve.h (vmlaldavq): Remove.
21201 (vmlsldavxq): Remove.
21202 (vmlsldavq): Remove.
21203 (vmlaldavxq): Remove.
21204 (vmlaldavq_p): Remove.
21205 (vmlaldavxq_p): Remove.
21206 (vmlsldavq_p): Remove.
21207 (vmlsldavxq_p): Remove.
21208 (vmlaldavq_u16): Remove.
21209 (vmlsldavxq_s16): Remove.
21210 (vmlsldavq_s16): Remove.
21211 (vmlaldavxq_s16): Remove.
21212 (vmlaldavq_s16): Remove.
21213 (vmlaldavq_u32): Remove.
21214 (vmlsldavxq_s32): Remove.
21215 (vmlsldavq_s32): Remove.
21216 (vmlaldavxq_s32): Remove.
21217 (vmlaldavq_s32): Remove.
21218 (vmlaldavq_p_s16): Remove.
21219 (vmlaldavxq_p_s16): Remove.
21220 (vmlsldavq_p_s16): Remove.
21221 (vmlsldavxq_p_s16): Remove.
21222 (vmlaldavq_p_u16): Remove.
21223 (vmlaldavq_p_s32): Remove.
21224 (vmlaldavxq_p_s32): Remove.
21225 (vmlsldavq_p_s32): Remove.
21226 (vmlsldavxq_p_s32): Remove.
21227 (vmlaldavq_p_u32): Remove.
21228 (__arm_vmlaldavq_u16): Remove.
21229 (__arm_vmlsldavxq_s16): Remove.
21230 (__arm_vmlsldavq_s16): Remove.
21231 (__arm_vmlaldavxq_s16): Remove.
21232 (__arm_vmlaldavq_s16): Remove.
21233 (__arm_vmlaldavq_u32): Remove.
21234 (__arm_vmlsldavxq_s32): Remove.
21235 (__arm_vmlsldavq_s32): Remove.
21236 (__arm_vmlaldavxq_s32): Remove.
21237 (__arm_vmlaldavq_s32): Remove.
21238 (__arm_vmlaldavq_p_s16): Remove.
21239 (__arm_vmlaldavxq_p_s16): Remove.
21240 (__arm_vmlsldavq_p_s16): Remove.
21241 (__arm_vmlsldavxq_p_s16): Remove.
21242 (__arm_vmlaldavq_p_u16): Remove.
21243 (__arm_vmlaldavq_p_s32): Remove.
21244 (__arm_vmlaldavxq_p_s32): Remove.
21245 (__arm_vmlsldavq_p_s32): Remove.
21246 (__arm_vmlsldavxq_p_s32): Remove.
21247 (__arm_vmlaldavq_p_u32): Remove.
21248 (__arm_vmlaldavq): Remove.
21249 (__arm_vmlsldavxq): Remove.
21250 (__arm_vmlsldavq): Remove.
21251 (__arm_vmlaldavxq): Remove.
21252 (__arm_vmlaldavq_p): Remove.
21253 (__arm_vmlaldavxq_p): Remove.
21254 (__arm_vmlsldavq_p): Remove.
21255 (__arm_vmlsldavxq_p): Remove.
21257 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21259 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
21260 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
21261 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
21262 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
21263 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
21264 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
21265 (mve_vmlsldavxq_s<mode>): Merge into ...
21266 (@mve_<mve_insn>q_<supf><mode>): ... this.
21267 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
21268 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
21270 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21272 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21274 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
21275 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
21277 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21279 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
21280 * config/arm/arm-mve-builtins-base.def (vabavq): New.
21281 * config/arm/arm-mve-builtins-base.h (vabavq): New.
21282 * config/arm/arm_mve.h (vabavq): Remove.
21283 (vabavq_p): Remove.
21284 (vabavq_s8): Remove.
21285 (vabavq_s16): Remove.
21286 (vabavq_s32): Remove.
21287 (vabavq_u8): Remove.
21288 (vabavq_u16): Remove.
21289 (vabavq_u32): Remove.
21290 (vabavq_p_s8): Remove.
21291 (vabavq_p_u8): Remove.
21292 (vabavq_p_s16): Remove.
21293 (vabavq_p_u16): Remove.
21294 (vabavq_p_s32): Remove.
21295 (vabavq_p_u32): Remove.
21296 (__arm_vabavq_s8): Remove.
21297 (__arm_vabavq_s16): Remove.
21298 (__arm_vabavq_s32): Remove.
21299 (__arm_vabavq_u8): Remove.
21300 (__arm_vabavq_u16): Remove.
21301 (__arm_vabavq_u32): Remove.
21302 (__arm_vabavq_p_s8): Remove.
21303 (__arm_vabavq_p_u8): Remove.
21304 (__arm_vabavq_p_s16): Remove.
21305 (__arm_vabavq_p_u16): Remove.
21306 (__arm_vabavq_p_s32): Remove.
21307 (__arm_vabavq_p_u32): Remove.
21308 (__arm_vabavq): Remove.
21309 (__arm_vabavq_p): Remove.
21311 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21313 * config/arm/iterators.md (mve_insn): Add vabav.
21314 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
21315 (@mve_<mve_insn>q_<supf><mode>): ... this,.
21316 (mve_vabavq_p_<supf><mode>): Rename into ...
21317 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
21319 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21321 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
21322 (vmlsdavaq, vmlsdavaxq): New.
21323 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
21324 (vmlsdavaq, vmlsdavaxq): New.
21325 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
21326 (vmlsdavaq, vmlsdavaxq): New.
21327 * config/arm/arm_mve.h (vmladavaq): Remove.
21328 (vmlsdavaxq): Remove.
21329 (vmlsdavaq): Remove.
21330 (vmladavaxq): Remove.
21331 (vmladavaq_p): Remove.
21332 (vmladavaxq_p): Remove.
21333 (vmlsdavaq_p): Remove.
21334 (vmlsdavaxq_p): Remove.
21335 (vmladavaq_u8): Remove.
21336 (vmlsdavaxq_s8): Remove.
21337 (vmlsdavaq_s8): Remove.
21338 (vmladavaxq_s8): Remove.
21339 (vmladavaq_s8): Remove.
21340 (vmladavaq_u16): Remove.
21341 (vmlsdavaxq_s16): Remove.
21342 (vmlsdavaq_s16): Remove.
21343 (vmladavaxq_s16): Remove.
21344 (vmladavaq_s16): Remove.
21345 (vmladavaq_u32): Remove.
21346 (vmlsdavaxq_s32): Remove.
21347 (vmlsdavaq_s32): Remove.
21348 (vmladavaxq_s32): Remove.
21349 (vmladavaq_s32): Remove.
21350 (vmladavaq_p_s8): Remove.
21351 (vmladavaq_p_s32): Remove.
21352 (vmladavaq_p_s16): Remove.
21353 (vmladavaq_p_u8): Remove.
21354 (vmladavaq_p_u32): Remove.
21355 (vmladavaq_p_u16): Remove.
21356 (vmladavaxq_p_s8): Remove.
21357 (vmladavaxq_p_s32): Remove.
21358 (vmladavaxq_p_s16): Remove.
21359 (vmlsdavaq_p_s8): Remove.
21360 (vmlsdavaq_p_s32): Remove.
21361 (vmlsdavaq_p_s16): Remove.
21362 (vmlsdavaxq_p_s8): Remove.
21363 (vmlsdavaxq_p_s32): Remove.
21364 (vmlsdavaxq_p_s16): Remove.
21365 (__arm_vmladavaq_u8): Remove.
21366 (__arm_vmlsdavaxq_s8): Remove.
21367 (__arm_vmlsdavaq_s8): Remove.
21368 (__arm_vmladavaxq_s8): Remove.
21369 (__arm_vmladavaq_s8): Remove.
21370 (__arm_vmladavaq_u16): Remove.
21371 (__arm_vmlsdavaxq_s16): Remove.
21372 (__arm_vmlsdavaq_s16): Remove.
21373 (__arm_vmladavaxq_s16): Remove.
21374 (__arm_vmladavaq_s16): Remove.
21375 (__arm_vmladavaq_u32): Remove.
21376 (__arm_vmlsdavaxq_s32): Remove.
21377 (__arm_vmlsdavaq_s32): Remove.
21378 (__arm_vmladavaxq_s32): Remove.
21379 (__arm_vmladavaq_s32): Remove.
21380 (__arm_vmladavaq_p_s8): Remove.
21381 (__arm_vmladavaq_p_s32): Remove.
21382 (__arm_vmladavaq_p_s16): Remove.
21383 (__arm_vmladavaq_p_u8): Remove.
21384 (__arm_vmladavaq_p_u32): Remove.
21385 (__arm_vmladavaq_p_u16): Remove.
21386 (__arm_vmladavaxq_p_s8): Remove.
21387 (__arm_vmladavaxq_p_s32): Remove.
21388 (__arm_vmladavaxq_p_s16): Remove.
21389 (__arm_vmlsdavaq_p_s8): Remove.
21390 (__arm_vmlsdavaq_p_s32): Remove.
21391 (__arm_vmlsdavaq_p_s16): Remove.
21392 (__arm_vmlsdavaxq_p_s8): Remove.
21393 (__arm_vmlsdavaxq_p_s32): Remove.
21394 (__arm_vmlsdavaxq_p_s16): Remove.
21395 (__arm_vmladavaq): Remove.
21396 (__arm_vmlsdavaxq): Remove.
21397 (__arm_vmlsdavaq): Remove.
21398 (__arm_vmladavaxq): Remove.
21399 (__arm_vmladavaq_p): Remove.
21400 (__arm_vmladavaxq_p): Remove.
21401 (__arm_vmlsdavaq_p): Remove.
21402 (__arm_vmlsdavaxq_p): Remove.
21404 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21406 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
21407 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
21409 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21411 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
21412 (vmlsdavq, vmlsdavxq): New.
21413 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
21414 (vmlsdavq, vmlsdavxq): New.
21415 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
21416 (vmlsdavq, vmlsdavxq): New.
21417 * config/arm/arm_mve.h (vmladavq): Remove.
21418 (vmlsdavxq): Remove.
21419 (vmlsdavq): Remove.
21420 (vmladavxq): Remove.
21421 (vmladavq_p): Remove.
21422 (vmlsdavxq_p): Remove.
21423 (vmlsdavq_p): Remove.
21424 (vmladavxq_p): Remove.
21425 (vmladavq_u8): Remove.
21426 (vmlsdavxq_s8): Remove.
21427 (vmlsdavq_s8): Remove.
21428 (vmladavxq_s8): Remove.
21429 (vmladavq_s8): Remove.
21430 (vmladavq_u16): Remove.
21431 (vmlsdavxq_s16): Remove.
21432 (vmlsdavq_s16): Remove.
21433 (vmladavxq_s16): Remove.
21434 (vmladavq_s16): Remove.
21435 (vmladavq_u32): Remove.
21436 (vmlsdavxq_s32): Remove.
21437 (vmlsdavq_s32): Remove.
21438 (vmladavxq_s32): Remove.
21439 (vmladavq_s32): Remove.
21440 (vmladavq_p_u8): Remove.
21441 (vmlsdavxq_p_s8): Remove.
21442 (vmlsdavq_p_s8): Remove.
21443 (vmladavxq_p_s8): Remove.
21444 (vmladavq_p_s8): Remove.
21445 (vmladavq_p_u16): Remove.
21446 (vmlsdavxq_p_s16): Remove.
21447 (vmlsdavq_p_s16): Remove.
21448 (vmladavxq_p_s16): Remove.
21449 (vmladavq_p_s16): Remove.
21450 (vmladavq_p_u32): Remove.
21451 (vmlsdavxq_p_s32): Remove.
21452 (vmlsdavq_p_s32): Remove.
21453 (vmladavxq_p_s32): Remove.
21454 (vmladavq_p_s32): Remove.
21455 (__arm_vmladavq_u8): Remove.
21456 (__arm_vmlsdavxq_s8): Remove.
21457 (__arm_vmlsdavq_s8): Remove.
21458 (__arm_vmladavxq_s8): Remove.
21459 (__arm_vmladavq_s8): Remove.
21460 (__arm_vmladavq_u16): Remove.
21461 (__arm_vmlsdavxq_s16): Remove.
21462 (__arm_vmlsdavq_s16): Remove.
21463 (__arm_vmladavxq_s16): Remove.
21464 (__arm_vmladavq_s16): Remove.
21465 (__arm_vmladavq_u32): Remove.
21466 (__arm_vmlsdavxq_s32): Remove.
21467 (__arm_vmlsdavq_s32): Remove.
21468 (__arm_vmladavxq_s32): Remove.
21469 (__arm_vmladavq_s32): Remove.
21470 (__arm_vmladavq_p_u8): Remove.
21471 (__arm_vmlsdavxq_p_s8): Remove.
21472 (__arm_vmlsdavq_p_s8): Remove.
21473 (__arm_vmladavxq_p_s8): Remove.
21474 (__arm_vmladavq_p_s8): Remove.
21475 (__arm_vmladavq_p_u16): Remove.
21476 (__arm_vmlsdavxq_p_s16): Remove.
21477 (__arm_vmlsdavq_p_s16): Remove.
21478 (__arm_vmladavxq_p_s16): Remove.
21479 (__arm_vmladavq_p_s16): Remove.
21480 (__arm_vmladavq_p_u32): Remove.
21481 (__arm_vmlsdavxq_p_s32): Remove.
21482 (__arm_vmlsdavq_p_s32): Remove.
21483 (__arm_vmladavxq_p_s32): Remove.
21484 (__arm_vmladavq_p_s32): Remove.
21485 (__arm_vmladavq): Remove.
21486 (__arm_vmlsdavxq): Remove.
21487 (__arm_vmlsdavq): Remove.
21488 (__arm_vmladavxq): Remove.
21489 (__arm_vmladavq_p): Remove.
21490 (__arm_vmlsdavxq_p): Remove.
21491 (__arm_vmlsdavq_p): Remove.
21492 (__arm_vmladavxq_p): Remove.
21494 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21496 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
21497 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
21498 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
21499 vmlsdavax, vmlsdav, vmlsdavx.
21500 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
21501 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
21502 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
21504 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
21505 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
21506 (mve_vmlsdavxq_s<mode>): Merge into ...
21507 (@mve_<mve_insn>q_<supf><mode>): ... this.
21508 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
21509 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
21511 (@mve_<mve_insn>q_<supf><mode>): ... this.
21512 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
21513 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
21514 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21515 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
21516 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
21518 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21520 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21522 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
21523 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
21525 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21527 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
21528 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
21529 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
21530 * config/arm/arm_mve.h (vaddlvaq): Remove.
21531 (vaddlvaq_p): Remove.
21532 (vaddlvaq_u32): Remove.
21533 (vaddlvaq_s32): Remove.
21534 (vaddlvaq_p_s32): Remove.
21535 (vaddlvaq_p_u32): Remove.
21536 (__arm_vaddlvaq_u32): Remove.
21537 (__arm_vaddlvaq_s32): Remove.
21538 (__arm_vaddlvaq_p_s32): Remove.
21539 (__arm_vaddlvaq_p_u32): Remove.
21540 (__arm_vaddlvaq): Remove.
21541 (__arm_vaddlvaq_p): Remove.
21543 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21545 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
21546 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
21548 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21550 * config/arm/iterators.md (mve_insn): Add vaddlva.
21551 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
21552 (@mve_<mve_insn>q_<supf>v4si): ... this.
21553 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
21554 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
21556 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
21559 * config/i386/i386.cc (ix86_widen_mult_cost):
21560 Handle V4HImode and V2SImode.
21562 2023-05-11 Andrew Pinski <apinski@marvell.com>
21564 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
21565 defined by a phi node with more than one uses, allow for the
21566 only uses are in that same defining statement.
21568 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
21570 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
21573 2023-05-11 Pan Li <pan2.li@intel.com>
21575 * config/riscv/vector.md: Add comments for simplifying to vmset.
21577 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
21579 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
21581 (v<optab><mode>3): Add vector shift pattern.
21582 * config/riscv/vector-iterators.md: New iterator.
21584 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
21586 * config/riscv/autovec.md: Use renamed functions.
21587 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
21588 (emit_vlmax_reg_op): To this.
21589 (emit_nonvlmax_op): Rename.
21590 (emit_len_op): To this.
21591 (emit_nonvlmax_binop): Rename.
21592 (emit_len_binop): To this.
21593 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
21594 (emit_pred_binop): Remove vlmax_p.
21595 (emit_vlmax_op): Rename.
21596 (emit_vlmax_reg_op): To this.
21597 (emit_nonvlmax_op): Rename.
21598 (emit_len_op): To this.
21599 (emit_nonvlmax_binop): Rename.
21600 (emit_len_binop): To this.
21601 (sew64_scalar_helper): Use renamed functions.
21602 (expand_tuple_move): Use renamed functions.
21603 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
21605 * config/riscv/vector.md: Use renamed functions.
21607 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
21608 Michael Collison <collison@rivosinc.com>
21610 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
21611 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
21612 * config/riscv/riscv-v.cc (emit_pred_op): New function.
21613 (set_expander_dest_and_mask): New function.
21614 (emit_pred_binop): New function.
21615 (emit_nonvlmax_binop): New function.
21617 2023-05-11 Pan Li <pan2.li@intel.com>
21619 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
21620 * gimple-loop-interchange.cc
21621 (tree_loop_interchange::map_inductions_to_loop): Ditto.
21622 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
21623 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
21624 * tree-ssa-loop-manip.cc (create_iv): Ditto.
21625 (tree_transform_and_unroll_loop): Ditto.
21626 (canonicalize_loop_ivs): Ditto.
21627 * tree-ssa-loop-manip.h (create_iv): Ditto.
21628 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
21629 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
21631 (vect_set_loop_condition_normal): Ditto.
21632 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
21633 * tree-vect-stmts.cc (vectorizable_store): Ditto.
21634 (vectorizable_load): Ditto.
21636 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21638 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
21639 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
21640 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
21641 * config/arm/arm_mve.h (vmovlbq): Remove.
21643 (vmovlbq_m): Remove.
21644 (vmovltq_m): Remove.
21645 (vmovlbq_x): Remove.
21646 (vmovltq_x): Remove.
21647 (vmovlbq_s8): Remove.
21648 (vmovlbq_s16): Remove.
21649 (vmovltq_s8): Remove.
21650 (vmovltq_s16): Remove.
21651 (vmovltq_u8): Remove.
21652 (vmovltq_u16): Remove.
21653 (vmovlbq_u8): Remove.
21654 (vmovlbq_u16): Remove.
21655 (vmovlbq_m_s8): Remove.
21656 (vmovltq_m_s8): Remove.
21657 (vmovlbq_m_u8): Remove.
21658 (vmovltq_m_u8): Remove.
21659 (vmovlbq_m_s16): Remove.
21660 (vmovltq_m_s16): Remove.
21661 (vmovlbq_m_u16): Remove.
21662 (vmovltq_m_u16): Remove.
21663 (vmovlbq_x_s8): Remove.
21664 (vmovlbq_x_s16): Remove.
21665 (vmovlbq_x_u8): Remove.
21666 (vmovlbq_x_u16): Remove.
21667 (vmovltq_x_s8): Remove.
21668 (vmovltq_x_s16): Remove.
21669 (vmovltq_x_u8): Remove.
21670 (vmovltq_x_u16): Remove.
21671 (__arm_vmovlbq_s8): Remove.
21672 (__arm_vmovlbq_s16): Remove.
21673 (__arm_vmovltq_s8): Remove.
21674 (__arm_vmovltq_s16): Remove.
21675 (__arm_vmovltq_u8): Remove.
21676 (__arm_vmovltq_u16): Remove.
21677 (__arm_vmovlbq_u8): Remove.
21678 (__arm_vmovlbq_u16): Remove.
21679 (__arm_vmovlbq_m_s8): Remove.
21680 (__arm_vmovltq_m_s8): Remove.
21681 (__arm_vmovlbq_m_u8): Remove.
21682 (__arm_vmovltq_m_u8): Remove.
21683 (__arm_vmovlbq_m_s16): Remove.
21684 (__arm_vmovltq_m_s16): Remove.
21685 (__arm_vmovlbq_m_u16): Remove.
21686 (__arm_vmovltq_m_u16): Remove.
21687 (__arm_vmovlbq_x_s8): Remove.
21688 (__arm_vmovlbq_x_s16): Remove.
21689 (__arm_vmovlbq_x_u8): Remove.
21690 (__arm_vmovlbq_x_u16): Remove.
21691 (__arm_vmovltq_x_s8): Remove.
21692 (__arm_vmovltq_x_s16): Remove.
21693 (__arm_vmovltq_x_u8): Remove.
21694 (__arm_vmovltq_x_u16): Remove.
21695 (__arm_vmovlbq): Remove.
21696 (__arm_vmovltq): Remove.
21697 (__arm_vmovlbq_m): Remove.
21698 (__arm_vmovltq_m): Remove.
21699 (__arm_vmovlbq_x): Remove.
21700 (__arm_vmovltq_x): Remove.
21702 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21704 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
21705 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
21707 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21709 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
21710 (VMOVLBQ, VMOVLTQ): Merge into ...
21711 (VMOVLxQ): ... this.
21712 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
21713 (VMOVLxQ_M): ... this.
21714 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
21715 (mve_vmovlbq_<supf><mode>): Merge into ...
21716 (@mve_<mve_insn>q_<supf><mode>): ... this.
21717 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
21719 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
21721 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21723 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
21724 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
21725 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
21726 * config/arm/arm-mve-builtins-functions.h
21727 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
21728 * config/arm/arm_mve.h (vaddlvq): Remove.
21729 (vaddlvq_p): Remove.
21730 (vaddlvq_s32): Remove.
21731 (vaddlvq_u32): Remove.
21732 (vaddlvq_p_s32): Remove.
21733 (vaddlvq_p_u32): Remove.
21734 (__arm_vaddlvq_s32): Remove.
21735 (__arm_vaddlvq_u32): Remove.
21736 (__arm_vaddlvq_p_s32): Remove.
21737 (__arm_vaddlvq_p_u32): Remove.
21738 (__arm_vaddlvq): Remove.
21739 (__arm_vaddlvq_p): Remove.
21741 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21743 * config/arm/iterators.md (mve_insn): Add vaddlv.
21744 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
21745 (@mve_<mve_insn>q_<supf>v4si): ... this.
21746 (mve_vaddlvq_p_<supf>v4si): Rename into ...
21747 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
21749 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21751 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
21752 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
21754 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21756 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
21757 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
21758 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
21759 * config/arm/arm_mve.h (vaddvaq): Remove.
21760 (vaddvaq_p): Remove.
21761 (vaddvaq_u8): Remove.
21762 (vaddvaq_s8): Remove.
21763 (vaddvaq_u16): Remove.
21764 (vaddvaq_s16): Remove.
21765 (vaddvaq_u32): Remove.
21766 (vaddvaq_s32): Remove.
21767 (vaddvaq_p_u8): Remove.
21768 (vaddvaq_p_s8): Remove.
21769 (vaddvaq_p_u16): Remove.
21770 (vaddvaq_p_s16): Remove.
21771 (vaddvaq_p_u32): Remove.
21772 (vaddvaq_p_s32): Remove.
21773 (__arm_vaddvaq_u8): Remove.
21774 (__arm_vaddvaq_s8): Remove.
21775 (__arm_vaddvaq_u16): Remove.
21776 (__arm_vaddvaq_s16): Remove.
21777 (__arm_vaddvaq_u32): Remove.
21778 (__arm_vaddvaq_s32): Remove.
21779 (__arm_vaddvaq_p_u8): Remove.
21780 (__arm_vaddvaq_p_s8): Remove.
21781 (__arm_vaddvaq_p_u16): Remove.
21782 (__arm_vaddvaq_p_s16): Remove.
21783 (__arm_vaddvaq_p_u32): Remove.
21784 (__arm_vaddvaq_p_s32): Remove.
21785 (__arm_vaddvaq): Remove.
21786 (__arm_vaddvaq_p): Remove.
21788 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21790 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
21791 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
21793 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21795 * config/arm/iterators.md (mve_insn): Add vaddva.
21796 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
21797 (@mve_<mve_insn>q_<supf><mode>): ... this.
21798 (mve_vaddvaq_p_<supf><mode>): Rename into ...
21799 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21801 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21803 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
21804 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
21805 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
21806 * config/arm/arm_mve.h (vaddvq): Remove.
21807 (vaddvq_p): Remove.
21808 (vaddvq_s8): Remove.
21809 (vaddvq_s16): Remove.
21810 (vaddvq_s32): Remove.
21811 (vaddvq_u8): Remove.
21812 (vaddvq_u16): Remove.
21813 (vaddvq_u32): Remove.
21814 (vaddvq_p_u8): Remove.
21815 (vaddvq_p_s8): Remove.
21816 (vaddvq_p_u16): Remove.
21817 (vaddvq_p_s16): Remove.
21818 (vaddvq_p_u32): Remove.
21819 (vaddvq_p_s32): Remove.
21820 (__arm_vaddvq_s8): Remove.
21821 (__arm_vaddvq_s16): Remove.
21822 (__arm_vaddvq_s32): Remove.
21823 (__arm_vaddvq_u8): Remove.
21824 (__arm_vaddvq_u16): Remove.
21825 (__arm_vaddvq_u32): Remove.
21826 (__arm_vaddvq_p_u8): Remove.
21827 (__arm_vaddvq_p_s8): Remove.
21828 (__arm_vaddvq_p_u16): Remove.
21829 (__arm_vaddvq_p_s16): Remove.
21830 (__arm_vaddvq_p_u32): Remove.
21831 (__arm_vaddvq_p_s32): Remove.
21832 (__arm_vaddvq): Remove.
21833 (__arm_vaddvq_p): Remove.
21835 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21837 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
21838 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
21840 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21842 * config/arm/iterators.md (mve_insn): Add vaddv.
21843 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
21844 (@mve_<mve_insn>q_<supf><mode>): ... this.
21845 (mve_vaddvq_p_<supf><mode>): Rename into ...
21846 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21847 * config/arm/vec-common.md: Use gen_mve_q instead of
21850 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21852 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
21854 * config/arm/arm-mve-builtins-base.def (vdupq): New.
21855 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
21856 * config/arm/arm_mve.h (vdupq_n): Remove.
21858 (vdupq_n_f16): Remove.
21859 (vdupq_n_f32): Remove.
21860 (vdupq_n_s8): Remove.
21861 (vdupq_n_s16): Remove.
21862 (vdupq_n_s32): Remove.
21863 (vdupq_n_u8): Remove.
21864 (vdupq_n_u16): Remove.
21865 (vdupq_n_u32): Remove.
21866 (vdupq_m_n_u8): Remove.
21867 (vdupq_m_n_s8): Remove.
21868 (vdupq_m_n_u16): Remove.
21869 (vdupq_m_n_s16): Remove.
21870 (vdupq_m_n_u32): Remove.
21871 (vdupq_m_n_s32): Remove.
21872 (vdupq_m_n_f16): Remove.
21873 (vdupq_m_n_f32): Remove.
21874 (vdupq_x_n_s8): Remove.
21875 (vdupq_x_n_s16): Remove.
21876 (vdupq_x_n_s32): Remove.
21877 (vdupq_x_n_u8): Remove.
21878 (vdupq_x_n_u16): Remove.
21879 (vdupq_x_n_u32): Remove.
21880 (vdupq_x_n_f16): Remove.
21881 (vdupq_x_n_f32): Remove.
21882 (__arm_vdupq_n_s8): Remove.
21883 (__arm_vdupq_n_s16): Remove.
21884 (__arm_vdupq_n_s32): Remove.
21885 (__arm_vdupq_n_u8): Remove.
21886 (__arm_vdupq_n_u16): Remove.
21887 (__arm_vdupq_n_u32): Remove.
21888 (__arm_vdupq_m_n_u8): Remove.
21889 (__arm_vdupq_m_n_s8): Remove.
21890 (__arm_vdupq_m_n_u16): Remove.
21891 (__arm_vdupq_m_n_s16): Remove.
21892 (__arm_vdupq_m_n_u32): Remove.
21893 (__arm_vdupq_m_n_s32): Remove.
21894 (__arm_vdupq_x_n_s8): Remove.
21895 (__arm_vdupq_x_n_s16): Remove.
21896 (__arm_vdupq_x_n_s32): Remove.
21897 (__arm_vdupq_x_n_u8): Remove.
21898 (__arm_vdupq_x_n_u16): Remove.
21899 (__arm_vdupq_x_n_u32): Remove.
21900 (__arm_vdupq_n_f16): Remove.
21901 (__arm_vdupq_n_f32): Remove.
21902 (__arm_vdupq_m_n_f16): Remove.
21903 (__arm_vdupq_m_n_f32): Remove.
21904 (__arm_vdupq_x_n_f16): Remove.
21905 (__arm_vdupq_x_n_f32): Remove.
21906 (__arm_vdupq_n): Remove.
21907 (__arm_vdupq_m): Remove.
21909 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21911 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
21912 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
21914 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21916 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
21917 (MVE_FP_N_VDUPQ_ONLY): New.
21918 (mve_insn): Add vdupq.
21919 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
21920 (@mve_<mve_insn>q_n_f<mode>): ... this.
21921 (mve_vdupq_n_<supf><mode>): Rename into ...
21922 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21923 (mve_vdupq_m_n_<supf><mode>): Rename into ...
21924 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21925 (mve_vdupq_m_n_f<mode>): Rename into ...
21926 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
21928 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21930 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
21932 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
21934 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
21936 * config/arm/arm_mve.h (vrev16q): Remove.
21939 (vrev64q_m): Remove.
21940 (vrev16q_m): Remove.
21941 (vrev32q_m): Remove.
21942 (vrev16q_x): Remove.
21943 (vrev32q_x): Remove.
21944 (vrev64q_x): Remove.
21945 (vrev64q_f16): Remove.
21946 (vrev64q_f32): Remove.
21947 (vrev32q_f16): Remove.
21948 (vrev16q_s8): Remove.
21949 (vrev32q_s8): Remove.
21950 (vrev32q_s16): Remove.
21951 (vrev64q_s8): Remove.
21952 (vrev64q_s16): Remove.
21953 (vrev64q_s32): Remove.
21954 (vrev64q_u8): Remove.
21955 (vrev64q_u16): Remove.
21956 (vrev64q_u32): Remove.
21957 (vrev32q_u8): Remove.
21958 (vrev32q_u16): Remove.
21959 (vrev16q_u8): Remove.
21960 (vrev64q_m_u8): Remove.
21961 (vrev64q_m_s8): Remove.
21962 (vrev64q_m_u16): Remove.
21963 (vrev64q_m_s16): Remove.
21964 (vrev64q_m_u32): Remove.
21965 (vrev64q_m_s32): Remove.
21966 (vrev16q_m_s8): Remove.
21967 (vrev32q_m_f16): Remove.
21968 (vrev16q_m_u8): Remove.
21969 (vrev32q_m_s8): Remove.
21970 (vrev64q_m_f16): Remove.
21971 (vrev32q_m_u8): Remove.
21972 (vrev32q_m_s16): Remove.
21973 (vrev64q_m_f32): Remove.
21974 (vrev32q_m_u16): Remove.
21975 (vrev16q_x_s8): Remove.
21976 (vrev16q_x_u8): Remove.
21977 (vrev32q_x_s8): Remove.
21978 (vrev32q_x_s16): Remove.
21979 (vrev32q_x_u8): Remove.
21980 (vrev32q_x_u16): Remove.
21981 (vrev64q_x_s8): Remove.
21982 (vrev64q_x_s16): Remove.
21983 (vrev64q_x_s32): Remove.
21984 (vrev64q_x_u8): Remove.
21985 (vrev64q_x_u16): Remove.
21986 (vrev64q_x_u32): Remove.
21987 (vrev32q_x_f16): Remove.
21988 (vrev64q_x_f16): Remove.
21989 (vrev64q_x_f32): Remove.
21990 (__arm_vrev16q_s8): Remove.
21991 (__arm_vrev32q_s8): Remove.
21992 (__arm_vrev32q_s16): Remove.
21993 (__arm_vrev64q_s8): Remove.
21994 (__arm_vrev64q_s16): Remove.
21995 (__arm_vrev64q_s32): Remove.
21996 (__arm_vrev64q_u8): Remove.
21997 (__arm_vrev64q_u16): Remove.
21998 (__arm_vrev64q_u32): Remove.
21999 (__arm_vrev32q_u8): Remove.
22000 (__arm_vrev32q_u16): Remove.
22001 (__arm_vrev16q_u8): Remove.
22002 (__arm_vrev64q_m_u8): Remove.
22003 (__arm_vrev64q_m_s8): Remove.
22004 (__arm_vrev64q_m_u16): Remove.
22005 (__arm_vrev64q_m_s16): Remove.
22006 (__arm_vrev64q_m_u32): Remove.
22007 (__arm_vrev64q_m_s32): Remove.
22008 (__arm_vrev16q_m_s8): Remove.
22009 (__arm_vrev16q_m_u8): Remove.
22010 (__arm_vrev32q_m_s8): Remove.
22011 (__arm_vrev32q_m_u8): Remove.
22012 (__arm_vrev32q_m_s16): Remove.
22013 (__arm_vrev32q_m_u16): Remove.
22014 (__arm_vrev16q_x_s8): Remove.
22015 (__arm_vrev16q_x_u8): Remove.
22016 (__arm_vrev32q_x_s8): Remove.
22017 (__arm_vrev32q_x_s16): Remove.
22018 (__arm_vrev32q_x_u8): Remove.
22019 (__arm_vrev32q_x_u16): Remove.
22020 (__arm_vrev64q_x_s8): Remove.
22021 (__arm_vrev64q_x_s16): Remove.
22022 (__arm_vrev64q_x_s32): Remove.
22023 (__arm_vrev64q_x_u8): Remove.
22024 (__arm_vrev64q_x_u16): Remove.
22025 (__arm_vrev64q_x_u32): Remove.
22026 (__arm_vrev64q_f16): Remove.
22027 (__arm_vrev64q_f32): Remove.
22028 (__arm_vrev32q_f16): Remove.
22029 (__arm_vrev32q_m_f16): Remove.
22030 (__arm_vrev64q_m_f16): Remove.
22031 (__arm_vrev64q_m_f32): Remove.
22032 (__arm_vrev32q_x_f16): Remove.
22033 (__arm_vrev64q_x_f16): Remove.
22034 (__arm_vrev64q_x_f32): Remove.
22035 (__arm_vrev16q): Remove.
22036 (__arm_vrev32q): Remove.
22037 (__arm_vrev64q): Remove.
22038 (__arm_vrev64q_m): Remove.
22039 (__arm_vrev16q_m): Remove.
22040 (__arm_vrev32q_m): Remove.
22041 (__arm_vrev16q_x): Remove.
22042 (__arm_vrev32q_x): Remove.
22043 (__arm_vrev64q_x): Remove.
22045 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22047 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
22048 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
22049 (MVE_FP_M_VREV32Q_ONLY): New iterators.
22050 (mve_insn): Add vrev16q, vrev32q, vrev64q.
22051 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
22052 (@mve_<mve_insn>q_f<mode>): ... this
22053 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
22054 (mve_vrev64q_<supf><mode>): Rename into ...
22055 (@mve_<mve_insn>q_<supf><mode>): ... this.
22056 (mve_vrev32q_<supf><mode>): Rename into
22057 @mve_<mve_insn>q_<supf><mode>.
22058 (mve_vrev16q_<supf>v16qi): Rename into
22059 @mve_<mve_insn>q_<supf><mode>.
22060 (mve_vrev64q_m_<supf><mode>): Rename into
22061 @mve_<mve_insn>q_m_<supf><mode>.
22062 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
22063 (mve_vrev32q_m_<supf><mode>): Rename into
22064 @mve_<mve_insn>q_m_<supf><mode>.
22065 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
22066 (mve_vrev16q_m_<supf>v16qi): Rename into
22067 @mve_<mve_insn>q_m_<supf><mode>.
22069 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22071 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
22072 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
22073 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
22074 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
22075 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
22076 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
22077 * config/arm/arm-mve-builtins-functions.h (class
22078 unspec_based_mve_function_exact_insn_vcmp): New.
22079 * config/arm/arm-mve-builtins.cc
22080 (function_instance::has_inactive_argument): Handle vcmp.
22081 * config/arm/arm_mve.h (vcmpneq): Remove.
22089 (vcmpneq_m): Remove.
22090 (vcmphiq_m): Remove.
22091 (vcmpeqq_m): Remove.
22092 (vcmpcsq_m): Remove.
22093 (vcmpcsq_m_n): Remove.
22094 (vcmpltq_m): Remove.
22095 (vcmpleq_m): Remove.
22096 (vcmpgtq_m): Remove.
22097 (vcmpgeq_m): Remove.
22098 (vcmpneq_s8): Remove.
22099 (vcmpneq_s16): Remove.
22100 (vcmpneq_s32): Remove.
22101 (vcmpneq_u8): Remove.
22102 (vcmpneq_u16): Remove.
22103 (vcmpneq_u32): Remove.
22104 (vcmpneq_n_u8): Remove.
22105 (vcmphiq_u8): Remove.
22106 (vcmphiq_n_u8): Remove.
22107 (vcmpeqq_u8): Remove.
22108 (vcmpeqq_n_u8): Remove.
22109 (vcmpcsq_u8): Remove.
22110 (vcmpcsq_n_u8): Remove.
22111 (vcmpneq_n_s8): Remove.
22112 (vcmpltq_s8): Remove.
22113 (vcmpltq_n_s8): Remove.
22114 (vcmpleq_s8): Remove.
22115 (vcmpleq_n_s8): Remove.
22116 (vcmpgtq_s8): Remove.
22117 (vcmpgtq_n_s8): Remove.
22118 (vcmpgeq_s8): Remove.
22119 (vcmpgeq_n_s8): Remove.
22120 (vcmpeqq_s8): Remove.
22121 (vcmpeqq_n_s8): Remove.
22122 (vcmpneq_n_u16): Remove.
22123 (vcmphiq_u16): Remove.
22124 (vcmphiq_n_u16): Remove.
22125 (vcmpeqq_u16): Remove.
22126 (vcmpeqq_n_u16): Remove.
22127 (vcmpcsq_u16): Remove.
22128 (vcmpcsq_n_u16): Remove.
22129 (vcmpneq_n_s16): Remove.
22130 (vcmpltq_s16): Remove.
22131 (vcmpltq_n_s16): Remove.
22132 (vcmpleq_s16): Remove.
22133 (vcmpleq_n_s16): Remove.
22134 (vcmpgtq_s16): Remove.
22135 (vcmpgtq_n_s16): Remove.
22136 (vcmpgeq_s16): Remove.
22137 (vcmpgeq_n_s16): Remove.
22138 (vcmpeqq_s16): Remove.
22139 (vcmpeqq_n_s16): Remove.
22140 (vcmpneq_n_u32): Remove.
22141 (vcmphiq_u32): Remove.
22142 (vcmphiq_n_u32): Remove.
22143 (vcmpeqq_u32): Remove.
22144 (vcmpeqq_n_u32): Remove.
22145 (vcmpcsq_u32): Remove.
22146 (vcmpcsq_n_u32): Remove.
22147 (vcmpneq_n_s32): Remove.
22148 (vcmpltq_s32): Remove.
22149 (vcmpltq_n_s32): Remove.
22150 (vcmpleq_s32): Remove.
22151 (vcmpleq_n_s32): Remove.
22152 (vcmpgtq_s32): Remove.
22153 (vcmpgtq_n_s32): Remove.
22154 (vcmpgeq_s32): Remove.
22155 (vcmpgeq_n_s32): Remove.
22156 (vcmpeqq_s32): Remove.
22157 (vcmpeqq_n_s32): Remove.
22158 (vcmpneq_n_f16): Remove.
22159 (vcmpneq_f16): Remove.
22160 (vcmpltq_n_f16): Remove.
22161 (vcmpltq_f16): Remove.
22162 (vcmpleq_n_f16): Remove.
22163 (vcmpleq_f16): Remove.
22164 (vcmpgtq_n_f16): Remove.
22165 (vcmpgtq_f16): Remove.
22166 (vcmpgeq_n_f16): Remove.
22167 (vcmpgeq_f16): Remove.
22168 (vcmpeqq_n_f16): Remove.
22169 (vcmpeqq_f16): Remove.
22170 (vcmpneq_n_f32): Remove.
22171 (vcmpneq_f32): Remove.
22172 (vcmpltq_n_f32): Remove.
22173 (vcmpltq_f32): Remove.
22174 (vcmpleq_n_f32): Remove.
22175 (vcmpleq_f32): Remove.
22176 (vcmpgtq_n_f32): Remove.
22177 (vcmpgtq_f32): Remove.
22178 (vcmpgeq_n_f32): Remove.
22179 (vcmpgeq_f32): Remove.
22180 (vcmpeqq_n_f32): Remove.
22181 (vcmpeqq_f32): Remove.
22182 (vcmpeqq_m_f16): Remove.
22183 (vcmpeqq_m_f32): Remove.
22184 (vcmpneq_m_u8): Remove.
22185 (vcmpneq_m_n_u8): Remove.
22186 (vcmphiq_m_u8): Remove.
22187 (vcmphiq_m_n_u8): Remove.
22188 (vcmpeqq_m_u8): Remove.
22189 (vcmpeqq_m_n_u8): Remove.
22190 (vcmpcsq_m_u8): Remove.
22191 (vcmpcsq_m_n_u8): Remove.
22192 (vcmpneq_m_s8): Remove.
22193 (vcmpneq_m_n_s8): Remove.
22194 (vcmpltq_m_s8): Remove.
22195 (vcmpltq_m_n_s8): Remove.
22196 (vcmpleq_m_s8): Remove.
22197 (vcmpleq_m_n_s8): Remove.
22198 (vcmpgtq_m_s8): Remove.
22199 (vcmpgtq_m_n_s8): Remove.
22200 (vcmpgeq_m_s8): Remove.
22201 (vcmpgeq_m_n_s8): Remove.
22202 (vcmpeqq_m_s8): Remove.
22203 (vcmpeqq_m_n_s8): Remove.
22204 (vcmpneq_m_u16): Remove.
22205 (vcmpneq_m_n_u16): Remove.
22206 (vcmphiq_m_u16): Remove.
22207 (vcmphiq_m_n_u16): Remove.
22208 (vcmpeqq_m_u16): Remove.
22209 (vcmpeqq_m_n_u16): Remove.
22210 (vcmpcsq_m_u16): Remove.
22211 (vcmpcsq_m_n_u16): Remove.
22212 (vcmpneq_m_s16): Remove.
22213 (vcmpneq_m_n_s16): Remove.
22214 (vcmpltq_m_s16): Remove.
22215 (vcmpltq_m_n_s16): Remove.
22216 (vcmpleq_m_s16): Remove.
22217 (vcmpleq_m_n_s16): Remove.
22218 (vcmpgtq_m_s16): Remove.
22219 (vcmpgtq_m_n_s16): Remove.
22220 (vcmpgeq_m_s16): Remove.
22221 (vcmpgeq_m_n_s16): Remove.
22222 (vcmpeqq_m_s16): Remove.
22223 (vcmpeqq_m_n_s16): Remove.
22224 (vcmpneq_m_u32): Remove.
22225 (vcmpneq_m_n_u32): Remove.
22226 (vcmphiq_m_u32): Remove.
22227 (vcmphiq_m_n_u32): Remove.
22228 (vcmpeqq_m_u32): Remove.
22229 (vcmpeqq_m_n_u32): Remove.
22230 (vcmpcsq_m_u32): Remove.
22231 (vcmpcsq_m_n_u32): Remove.
22232 (vcmpneq_m_s32): Remove.
22233 (vcmpneq_m_n_s32): Remove.
22234 (vcmpltq_m_s32): Remove.
22235 (vcmpltq_m_n_s32): Remove.
22236 (vcmpleq_m_s32): Remove.
22237 (vcmpleq_m_n_s32): Remove.
22238 (vcmpgtq_m_s32): Remove.
22239 (vcmpgtq_m_n_s32): Remove.
22240 (vcmpgeq_m_s32): Remove.
22241 (vcmpgeq_m_n_s32): Remove.
22242 (vcmpeqq_m_s32): Remove.
22243 (vcmpeqq_m_n_s32): Remove.
22244 (vcmpeqq_m_n_f16): Remove.
22245 (vcmpgeq_m_f16): Remove.
22246 (vcmpgeq_m_n_f16): Remove.
22247 (vcmpgtq_m_f16): Remove.
22248 (vcmpgtq_m_n_f16): Remove.
22249 (vcmpleq_m_f16): Remove.
22250 (vcmpleq_m_n_f16): Remove.
22251 (vcmpltq_m_f16): Remove.
22252 (vcmpltq_m_n_f16): Remove.
22253 (vcmpneq_m_f16): Remove.
22254 (vcmpneq_m_n_f16): Remove.
22255 (vcmpeqq_m_n_f32): Remove.
22256 (vcmpgeq_m_f32): Remove.
22257 (vcmpgeq_m_n_f32): Remove.
22258 (vcmpgtq_m_f32): Remove.
22259 (vcmpgtq_m_n_f32): Remove.
22260 (vcmpleq_m_f32): Remove.
22261 (vcmpleq_m_n_f32): Remove.
22262 (vcmpltq_m_f32): Remove.
22263 (vcmpltq_m_n_f32): Remove.
22264 (vcmpneq_m_f32): Remove.
22265 (vcmpneq_m_n_f32): Remove.
22266 (__arm_vcmpneq_s8): Remove.
22267 (__arm_vcmpneq_s16): Remove.
22268 (__arm_vcmpneq_s32): Remove.
22269 (__arm_vcmpneq_u8): Remove.
22270 (__arm_vcmpneq_u16): Remove.
22271 (__arm_vcmpneq_u32): Remove.
22272 (__arm_vcmpneq_n_u8): Remove.
22273 (__arm_vcmphiq_u8): Remove.
22274 (__arm_vcmphiq_n_u8): Remove.
22275 (__arm_vcmpeqq_u8): Remove.
22276 (__arm_vcmpeqq_n_u8): Remove.
22277 (__arm_vcmpcsq_u8): Remove.
22278 (__arm_vcmpcsq_n_u8): Remove.
22279 (__arm_vcmpneq_n_s8): Remove.
22280 (__arm_vcmpltq_s8): Remove.
22281 (__arm_vcmpltq_n_s8): Remove.
22282 (__arm_vcmpleq_s8): Remove.
22283 (__arm_vcmpleq_n_s8): Remove.
22284 (__arm_vcmpgtq_s8): Remove.
22285 (__arm_vcmpgtq_n_s8): Remove.
22286 (__arm_vcmpgeq_s8): Remove.
22287 (__arm_vcmpgeq_n_s8): Remove.
22288 (__arm_vcmpeqq_s8): Remove.
22289 (__arm_vcmpeqq_n_s8): Remove.
22290 (__arm_vcmpneq_n_u16): Remove.
22291 (__arm_vcmphiq_u16): Remove.
22292 (__arm_vcmphiq_n_u16): Remove.
22293 (__arm_vcmpeqq_u16): Remove.
22294 (__arm_vcmpeqq_n_u16): Remove.
22295 (__arm_vcmpcsq_u16): Remove.
22296 (__arm_vcmpcsq_n_u16): Remove.
22297 (__arm_vcmpneq_n_s16): Remove.
22298 (__arm_vcmpltq_s16): Remove.
22299 (__arm_vcmpltq_n_s16): Remove.
22300 (__arm_vcmpleq_s16): Remove.
22301 (__arm_vcmpleq_n_s16): Remove.
22302 (__arm_vcmpgtq_s16): Remove.
22303 (__arm_vcmpgtq_n_s16): Remove.
22304 (__arm_vcmpgeq_s16): Remove.
22305 (__arm_vcmpgeq_n_s16): Remove.
22306 (__arm_vcmpeqq_s16): Remove.
22307 (__arm_vcmpeqq_n_s16): Remove.
22308 (__arm_vcmpneq_n_u32): Remove.
22309 (__arm_vcmphiq_u32): Remove.
22310 (__arm_vcmphiq_n_u32): Remove.
22311 (__arm_vcmpeqq_u32): Remove.
22312 (__arm_vcmpeqq_n_u32): Remove.
22313 (__arm_vcmpcsq_u32): Remove.
22314 (__arm_vcmpcsq_n_u32): Remove.
22315 (__arm_vcmpneq_n_s32): Remove.
22316 (__arm_vcmpltq_s32): Remove.
22317 (__arm_vcmpltq_n_s32): Remove.
22318 (__arm_vcmpleq_s32): Remove.
22319 (__arm_vcmpleq_n_s32): Remove.
22320 (__arm_vcmpgtq_s32): Remove.
22321 (__arm_vcmpgtq_n_s32): Remove.
22322 (__arm_vcmpgeq_s32): Remove.
22323 (__arm_vcmpgeq_n_s32): Remove.
22324 (__arm_vcmpeqq_s32): Remove.
22325 (__arm_vcmpeqq_n_s32): Remove.
22326 (__arm_vcmpneq_m_u8): Remove.
22327 (__arm_vcmpneq_m_n_u8): Remove.
22328 (__arm_vcmphiq_m_u8): Remove.
22329 (__arm_vcmphiq_m_n_u8): Remove.
22330 (__arm_vcmpeqq_m_u8): Remove.
22331 (__arm_vcmpeqq_m_n_u8): Remove.
22332 (__arm_vcmpcsq_m_u8): Remove.
22333 (__arm_vcmpcsq_m_n_u8): Remove.
22334 (__arm_vcmpneq_m_s8): Remove.
22335 (__arm_vcmpneq_m_n_s8): Remove.
22336 (__arm_vcmpltq_m_s8): Remove.
22337 (__arm_vcmpltq_m_n_s8): Remove.
22338 (__arm_vcmpleq_m_s8): Remove.
22339 (__arm_vcmpleq_m_n_s8): Remove.
22340 (__arm_vcmpgtq_m_s8): Remove.
22341 (__arm_vcmpgtq_m_n_s8): Remove.
22342 (__arm_vcmpgeq_m_s8): Remove.
22343 (__arm_vcmpgeq_m_n_s8): Remove.
22344 (__arm_vcmpeqq_m_s8): Remove.
22345 (__arm_vcmpeqq_m_n_s8): Remove.
22346 (__arm_vcmpneq_m_u16): Remove.
22347 (__arm_vcmpneq_m_n_u16): Remove.
22348 (__arm_vcmphiq_m_u16): Remove.
22349 (__arm_vcmphiq_m_n_u16): Remove.
22350 (__arm_vcmpeqq_m_u16): Remove.
22351 (__arm_vcmpeqq_m_n_u16): Remove.
22352 (__arm_vcmpcsq_m_u16): Remove.
22353 (__arm_vcmpcsq_m_n_u16): Remove.
22354 (__arm_vcmpneq_m_s16): Remove.
22355 (__arm_vcmpneq_m_n_s16): Remove.
22356 (__arm_vcmpltq_m_s16): Remove.
22357 (__arm_vcmpltq_m_n_s16): Remove.
22358 (__arm_vcmpleq_m_s16): Remove.
22359 (__arm_vcmpleq_m_n_s16): Remove.
22360 (__arm_vcmpgtq_m_s16): Remove.
22361 (__arm_vcmpgtq_m_n_s16): Remove.
22362 (__arm_vcmpgeq_m_s16): Remove.
22363 (__arm_vcmpgeq_m_n_s16): Remove.
22364 (__arm_vcmpeqq_m_s16): Remove.
22365 (__arm_vcmpeqq_m_n_s16): Remove.
22366 (__arm_vcmpneq_m_u32): Remove.
22367 (__arm_vcmpneq_m_n_u32): Remove.
22368 (__arm_vcmphiq_m_u32): Remove.
22369 (__arm_vcmphiq_m_n_u32): Remove.
22370 (__arm_vcmpeqq_m_u32): Remove.
22371 (__arm_vcmpeqq_m_n_u32): Remove.
22372 (__arm_vcmpcsq_m_u32): Remove.
22373 (__arm_vcmpcsq_m_n_u32): Remove.
22374 (__arm_vcmpneq_m_s32): Remove.
22375 (__arm_vcmpneq_m_n_s32): Remove.
22376 (__arm_vcmpltq_m_s32): Remove.
22377 (__arm_vcmpltq_m_n_s32): Remove.
22378 (__arm_vcmpleq_m_s32): Remove.
22379 (__arm_vcmpleq_m_n_s32): Remove.
22380 (__arm_vcmpgtq_m_s32): Remove.
22381 (__arm_vcmpgtq_m_n_s32): Remove.
22382 (__arm_vcmpgeq_m_s32): Remove.
22383 (__arm_vcmpgeq_m_n_s32): Remove.
22384 (__arm_vcmpeqq_m_s32): Remove.
22385 (__arm_vcmpeqq_m_n_s32): Remove.
22386 (__arm_vcmpneq_n_f16): Remove.
22387 (__arm_vcmpneq_f16): Remove.
22388 (__arm_vcmpltq_n_f16): Remove.
22389 (__arm_vcmpltq_f16): Remove.
22390 (__arm_vcmpleq_n_f16): Remove.
22391 (__arm_vcmpleq_f16): Remove.
22392 (__arm_vcmpgtq_n_f16): Remove.
22393 (__arm_vcmpgtq_f16): Remove.
22394 (__arm_vcmpgeq_n_f16): Remove.
22395 (__arm_vcmpgeq_f16): Remove.
22396 (__arm_vcmpeqq_n_f16): Remove.
22397 (__arm_vcmpeqq_f16): Remove.
22398 (__arm_vcmpneq_n_f32): Remove.
22399 (__arm_vcmpneq_f32): Remove.
22400 (__arm_vcmpltq_n_f32): Remove.
22401 (__arm_vcmpltq_f32): Remove.
22402 (__arm_vcmpleq_n_f32): Remove.
22403 (__arm_vcmpleq_f32): Remove.
22404 (__arm_vcmpgtq_n_f32): Remove.
22405 (__arm_vcmpgtq_f32): Remove.
22406 (__arm_vcmpgeq_n_f32): Remove.
22407 (__arm_vcmpgeq_f32): Remove.
22408 (__arm_vcmpeqq_n_f32): Remove.
22409 (__arm_vcmpeqq_f32): Remove.
22410 (__arm_vcmpeqq_m_f16): Remove.
22411 (__arm_vcmpeqq_m_f32): Remove.
22412 (__arm_vcmpeqq_m_n_f16): Remove.
22413 (__arm_vcmpgeq_m_f16): Remove.
22414 (__arm_vcmpgeq_m_n_f16): Remove.
22415 (__arm_vcmpgtq_m_f16): Remove.
22416 (__arm_vcmpgtq_m_n_f16): Remove.
22417 (__arm_vcmpleq_m_f16): Remove.
22418 (__arm_vcmpleq_m_n_f16): Remove.
22419 (__arm_vcmpltq_m_f16): Remove.
22420 (__arm_vcmpltq_m_n_f16): Remove.
22421 (__arm_vcmpneq_m_f16): Remove.
22422 (__arm_vcmpneq_m_n_f16): Remove.
22423 (__arm_vcmpeqq_m_n_f32): Remove.
22424 (__arm_vcmpgeq_m_f32): Remove.
22425 (__arm_vcmpgeq_m_n_f32): Remove.
22426 (__arm_vcmpgtq_m_f32): Remove.
22427 (__arm_vcmpgtq_m_n_f32): Remove.
22428 (__arm_vcmpleq_m_f32): Remove.
22429 (__arm_vcmpleq_m_n_f32): Remove.
22430 (__arm_vcmpltq_m_f32): Remove.
22431 (__arm_vcmpltq_m_n_f32): Remove.
22432 (__arm_vcmpneq_m_f32): Remove.
22433 (__arm_vcmpneq_m_n_f32): Remove.
22434 (__arm_vcmpneq): Remove.
22435 (__arm_vcmphiq): Remove.
22436 (__arm_vcmpeqq): Remove.
22437 (__arm_vcmpcsq): Remove.
22438 (__arm_vcmpltq): Remove.
22439 (__arm_vcmpleq): Remove.
22440 (__arm_vcmpgtq): Remove.
22441 (__arm_vcmpgeq): Remove.
22442 (__arm_vcmpneq_m): Remove.
22443 (__arm_vcmphiq_m): Remove.
22444 (__arm_vcmpeqq_m): Remove.
22445 (__arm_vcmpcsq_m): Remove.
22446 (__arm_vcmpltq_m): Remove.
22447 (__arm_vcmpleq_m): Remove.
22448 (__arm_vcmpgtq_m): Remove.
22449 (__arm_vcmpgeq_m): Remove.
22451 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22453 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
22454 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
22456 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
22458 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
22459 (MVE_CMP_M_N_F, mve_cmp_op1): New.
22462 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
22463 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
22464 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
22465 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
22466 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
22467 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
22468 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
22469 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
22470 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
22471 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
22473 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
22474 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
22475 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
22476 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
22477 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
22479 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
22480 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
22481 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
22482 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
22483 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
22485 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
22487 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
22488 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
22489 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
22492 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
22494 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
22495 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
22496 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
22497 Simplify parity(rotate(x,y)) as parity(x).
22499 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22501 * config/riscv/autovec.md (@vec_series<mode>): New pattern
22502 * config/riscv/riscv-protos.h (expand_vec_series): New function.
22503 * config/riscv/riscv-v.cc (emit_binop): Ditto.
22504 (emit_index_op): Ditto.
22505 (expand_vec_series): Ditto.
22506 (expand_const_vector): Add series vector handling.
22507 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
22509 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
22511 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
22512 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
22513 (*concat<mode><dwi>3_2): Likewise.
22514 (*concat<mode><dwi>3_3): Likewise.
22515 (*concat<mode><dwi>3_4): Likewise.
22516 (*concat<mode><dwi>3_5): Likewise.
22517 (*concat<mode><dwi>3_6): Likewise.
22518 (*concat<mode><dwi>3_7): Likewise.
22520 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
22523 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
22524 (<insn>v4qiv4hi2): New expander.
22525 (<insn>v2hiv2si2): Ditto.
22526 (<insn>v2qiv2si2): Ditto.
22527 (<insn>v2qiv2hi2): Ditto.
22529 2023-05-10 Jeff Law <jlaw@ventanamicro>
22531 * config/h8300/constraints.md (Q): Make this a special memory
22535 2023-05-10 Jakub Jelinek <jakub@redhat.com>
22538 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
22539 if t is void_list_node.
22541 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22543 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
22544 (aarch64_sqmovun<mode>_insn_be): Delete.
22545 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
22546 (aarch64_sqmovun<mode>): Delete expander.
22548 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22551 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
22553 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
22554 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
22555 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
22557 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22560 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
22562 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
22563 (aarch64_<sur>qadd<mode>): Rename to...
22564 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
22566 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22568 * config/aarch64/aarch64-simd.md
22569 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
22570 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
22571 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
22572 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
22574 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22577 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
22578 (aarch64_xtn<mode>_insn_be): Likewise.
22579 (trunc<mode><Vnarrowq>2): Rename to...
22580 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
22581 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
22582 (aarch64_<su>qmovn<mode>): Likewise.
22583 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
22584 (aarch64_<su>qmovn<mode>_insn_le): Delete.
22585 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
22587 2023-05-10 Li Xu <xuli1@eswincomputing.com>
22589 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
22590 intruction replace null avl with (const_int 0).
22592 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22594 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
22597 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22600 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
22601 (source_equal_p): Fix dead loop in vsetvl avl checking.
22603 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
22605 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
22606 of modeadjusted_dccr.
22608 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22610 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
22611 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
22612 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
22613 * config/arm/arm-mve-builtins.cc
22614 (function_instance::has_inactive_argument): Handle vmaxaq and
22616 * config/arm/arm_mve.h (vminaq): Remove.
22618 (vminaq_m): Remove.
22619 (vmaxaq_m): Remove.
22620 (vminaq_s8): Remove.
22621 (vmaxaq_s8): Remove.
22622 (vminaq_s16): Remove.
22623 (vmaxaq_s16): Remove.
22624 (vminaq_s32): Remove.
22625 (vmaxaq_s32): Remove.
22626 (vminaq_m_s8): Remove.
22627 (vmaxaq_m_s8): Remove.
22628 (vminaq_m_s16): Remove.
22629 (vmaxaq_m_s16): Remove.
22630 (vminaq_m_s32): Remove.
22631 (vmaxaq_m_s32): Remove.
22632 (__arm_vminaq_s8): Remove.
22633 (__arm_vmaxaq_s8): Remove.
22634 (__arm_vminaq_s16): Remove.
22635 (__arm_vmaxaq_s16): Remove.
22636 (__arm_vminaq_s32): Remove.
22637 (__arm_vmaxaq_s32): Remove.
22638 (__arm_vminaq_m_s8): Remove.
22639 (__arm_vmaxaq_m_s8): Remove.
22640 (__arm_vminaq_m_s16): Remove.
22641 (__arm_vmaxaq_m_s16): Remove.
22642 (__arm_vminaq_m_s32): Remove.
22643 (__arm_vmaxaq_m_s32): Remove.
22644 (__arm_vminaq): Remove.
22645 (__arm_vmaxaq): Remove.
22646 (__arm_vminaq_m): Remove.
22647 (__arm_vmaxaq_m): Remove.
22649 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22651 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
22653 (mve_insn): Add vmaxa, vmina.
22654 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
22655 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
22657 (@mve_<mve_insn>q_<supf><mode>): ... this.
22658 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
22659 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22661 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22663 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
22664 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
22666 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22668 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
22669 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
22670 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
22671 * config/arm/arm-mve-builtins.cc
22672 (function_instance::has_inactive_argument): Handle vmaxnmaq and
22674 * config/arm/arm_mve.h (vminnmaq): Remove.
22675 (vmaxnmaq): Remove.
22676 (vmaxnmaq_m): Remove.
22677 (vminnmaq_m): Remove.
22678 (vminnmaq_f16): Remove.
22679 (vmaxnmaq_f16): Remove.
22680 (vminnmaq_f32): Remove.
22681 (vmaxnmaq_f32): Remove.
22682 (vmaxnmaq_m_f16): Remove.
22683 (vminnmaq_m_f16): Remove.
22684 (vmaxnmaq_m_f32): Remove.
22685 (vminnmaq_m_f32): Remove.
22686 (__arm_vminnmaq_f16): Remove.
22687 (__arm_vmaxnmaq_f16): Remove.
22688 (__arm_vminnmaq_f32): Remove.
22689 (__arm_vmaxnmaq_f32): Remove.
22690 (__arm_vmaxnmaq_m_f16): Remove.
22691 (__arm_vminnmaq_m_f16): Remove.
22692 (__arm_vmaxnmaq_m_f32): Remove.
22693 (__arm_vminnmaq_m_f32): Remove.
22694 (__arm_vminnmaq): Remove.
22695 (__arm_vmaxnmaq): Remove.
22696 (__arm_vmaxnmaq_m): Remove.
22697 (__arm_vminnmaq_m): Remove.
22699 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22701 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
22702 (MVE_VMAXNMA_VMINNMAQ_M): New.
22703 (mve_insn): Add vmaxnma, vminnma.
22704 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
22706 (@mve_<mve_insn>q_f<mode>): ... this.
22707 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
22708 (@mve_<mve_insn>q_m_f<mode>): ... this.
22710 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22712 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
22713 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
22714 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
22715 (vminnmavq, vminnmvq): New.
22716 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
22717 (vminnmavq, vminnmvq): New.
22718 * config/arm/arm_mve.h (vminnmvq): Remove.
22719 (vminnmavq): Remove.
22720 (vmaxnmvq): Remove.
22721 (vmaxnmavq): Remove.
22722 (vmaxnmavq_p): Remove.
22723 (vmaxnmvq_p): Remove.
22724 (vminnmavq_p): Remove.
22725 (vminnmvq_p): Remove.
22726 (vminnmvq_f16): Remove.
22727 (vminnmavq_f16): Remove.
22728 (vmaxnmvq_f16): Remove.
22729 (vmaxnmavq_f16): Remove.
22730 (vminnmvq_f32): Remove.
22731 (vminnmavq_f32): Remove.
22732 (vmaxnmvq_f32): Remove.
22733 (vmaxnmavq_f32): Remove.
22734 (vmaxnmavq_p_f16): Remove.
22735 (vmaxnmvq_p_f16): Remove.
22736 (vminnmavq_p_f16): Remove.
22737 (vminnmvq_p_f16): Remove.
22738 (vmaxnmavq_p_f32): Remove.
22739 (vmaxnmvq_p_f32): Remove.
22740 (vminnmavq_p_f32): Remove.
22741 (vminnmvq_p_f32): Remove.
22742 (__arm_vminnmvq_f16): Remove.
22743 (__arm_vminnmavq_f16): Remove.
22744 (__arm_vmaxnmvq_f16): Remove.
22745 (__arm_vmaxnmavq_f16): Remove.
22746 (__arm_vminnmvq_f32): Remove.
22747 (__arm_vminnmavq_f32): Remove.
22748 (__arm_vmaxnmvq_f32): Remove.
22749 (__arm_vmaxnmavq_f32): Remove.
22750 (__arm_vmaxnmavq_p_f16): Remove.
22751 (__arm_vmaxnmvq_p_f16): Remove.
22752 (__arm_vminnmavq_p_f16): Remove.
22753 (__arm_vminnmvq_p_f16): Remove.
22754 (__arm_vmaxnmavq_p_f32): Remove.
22755 (__arm_vmaxnmvq_p_f32): Remove.
22756 (__arm_vminnmavq_p_f32): Remove.
22757 (__arm_vminnmvq_p_f32): Remove.
22758 (__arm_vminnmvq): Remove.
22759 (__arm_vminnmavq): Remove.
22760 (__arm_vmaxnmvq): Remove.
22761 (__arm_vmaxnmavq): Remove.
22762 (__arm_vmaxnmavq_p): Remove.
22763 (__arm_vmaxnmvq_p): Remove.
22764 (__arm_vminnmavq_p): Remove.
22765 (__arm_vminnmvq_p): Remove.
22766 (__arm_vmaxnmavq_m): Remove.
22767 (__arm_vmaxnmvq_m): Remove.
22769 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22771 * config/arm/arm-mve-builtins-functions.h
22772 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
22774 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22776 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
22777 (MVE_VMAXNMxV_MINNMxVQ_P): New.
22778 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
22779 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
22780 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
22781 (@mve_<mve_insn>q_f<mode>): ... this.
22782 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
22783 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
22784 (@mve_<mve_insn>q_p_f<mode>): ... this.
22786 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22788 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
22789 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
22790 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
22791 * config/arm/arm_mve.h (vminnmq): Remove.
22793 (vmaxnmq_m): Remove.
22794 (vminnmq_m): Remove.
22795 (vminnmq_x): Remove.
22796 (vmaxnmq_x): Remove.
22797 (vminnmq_f16): Remove.
22798 (vmaxnmq_f16): Remove.
22799 (vminnmq_f32): Remove.
22800 (vmaxnmq_f32): Remove.
22801 (vmaxnmq_m_f32): Remove.
22802 (vmaxnmq_m_f16): Remove.
22803 (vminnmq_m_f32): Remove.
22804 (vminnmq_m_f16): Remove.
22805 (vminnmq_x_f16): Remove.
22806 (vminnmq_x_f32): Remove.
22807 (vmaxnmq_x_f16): Remove.
22808 (vmaxnmq_x_f32): Remove.
22809 (__arm_vminnmq_f16): Remove.
22810 (__arm_vmaxnmq_f16): Remove.
22811 (__arm_vminnmq_f32): Remove.
22812 (__arm_vmaxnmq_f32): Remove.
22813 (__arm_vmaxnmq_m_f32): Remove.
22814 (__arm_vmaxnmq_m_f16): Remove.
22815 (__arm_vminnmq_m_f32): Remove.
22816 (__arm_vminnmq_m_f16): Remove.
22817 (__arm_vminnmq_x_f16): Remove.
22818 (__arm_vminnmq_x_f32): Remove.
22819 (__arm_vmaxnmq_x_f16): Remove.
22820 (__arm_vmaxnmq_x_f32): Remove.
22821 (__arm_vminnmq): Remove.
22822 (__arm_vmaxnmq): Remove.
22823 (__arm_vmaxnmq_m): Remove.
22824 (__arm_vminnmq_m): Remove.
22825 (__arm_vminnmq_x): Remove.
22826 (__arm_vmaxnmq_x): Remove.
22828 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22830 * config/arm/iterators.md (MAX_MIN_F): New.
22831 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
22832 (mve_insn): Add vmaxnm, vminnm.
22833 (max_min_f_str): New.
22834 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
22836 (@mve_<max_min_f_str>q_f<mode>): ... this.
22837 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
22838 (@mve_<mve_insn>q_m_f<mode>): ... this.
22840 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22842 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
22843 (smax<mode>3): Likewise.
22845 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22847 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
22848 (FUNCTION_PRED_P_S): New.
22849 (vmaxavq, vminavq, vmaxvq, vminvq): New.
22850 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
22852 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
22854 * config/arm/arm_mve.h (vminvq): Remove.
22856 (vminvq_p): Remove.
22857 (vmaxvq_p): Remove.
22858 (vminvq_u8): Remove.
22859 (vmaxvq_u8): Remove.
22860 (vminvq_s8): Remove.
22861 (vmaxvq_s8): Remove.
22862 (vminvq_u16): Remove.
22863 (vmaxvq_u16): Remove.
22864 (vminvq_s16): Remove.
22865 (vmaxvq_s16): Remove.
22866 (vminvq_u32): Remove.
22867 (vmaxvq_u32): Remove.
22868 (vminvq_s32): Remove.
22869 (vmaxvq_s32): Remove.
22870 (vminvq_p_u8): Remove.
22871 (vmaxvq_p_u8): Remove.
22872 (vminvq_p_s8): Remove.
22873 (vmaxvq_p_s8): Remove.
22874 (vminvq_p_u16): Remove.
22875 (vmaxvq_p_u16): Remove.
22876 (vminvq_p_s16): Remove.
22877 (vmaxvq_p_s16): Remove.
22878 (vminvq_p_u32): Remove.
22879 (vmaxvq_p_u32): Remove.
22880 (vminvq_p_s32): Remove.
22881 (vmaxvq_p_s32): Remove.
22882 (__arm_vminvq_u8): Remove.
22883 (__arm_vmaxvq_u8): Remove.
22884 (__arm_vminvq_s8): Remove.
22885 (__arm_vmaxvq_s8): Remove.
22886 (__arm_vminvq_u16): Remove.
22887 (__arm_vmaxvq_u16): Remove.
22888 (__arm_vminvq_s16): Remove.
22889 (__arm_vmaxvq_s16): Remove.
22890 (__arm_vminvq_u32): Remove.
22891 (__arm_vmaxvq_u32): Remove.
22892 (__arm_vminvq_s32): Remove.
22893 (__arm_vmaxvq_s32): Remove.
22894 (__arm_vminvq_p_u8): Remove.
22895 (__arm_vmaxvq_p_u8): Remove.
22896 (__arm_vminvq_p_s8): Remove.
22897 (__arm_vmaxvq_p_s8): Remove.
22898 (__arm_vminvq_p_u16): Remove.
22899 (__arm_vmaxvq_p_u16): Remove.
22900 (__arm_vminvq_p_s16): Remove.
22901 (__arm_vmaxvq_p_s16): Remove.
22902 (__arm_vminvq_p_u32): Remove.
22903 (__arm_vmaxvq_p_u32): Remove.
22904 (__arm_vminvq_p_s32): Remove.
22905 (__arm_vmaxvq_p_s32): Remove.
22906 (__arm_vminvq): Remove.
22907 (__arm_vmaxvq): Remove.
22908 (__arm_vminvq_p): Remove.
22909 (__arm_vmaxvq_p): Remove.
22912 (vminavq_p): Remove.
22913 (vmaxavq_p): Remove.
22914 (vminavq_s8): Remove.
22915 (vmaxavq_s8): Remove.
22916 (vminavq_s16): Remove.
22917 (vmaxavq_s16): Remove.
22918 (vminavq_s32): Remove.
22919 (vmaxavq_s32): Remove.
22920 (vminavq_p_s8): Remove.
22921 (vmaxavq_p_s8): Remove.
22922 (vminavq_p_s16): Remove.
22923 (vmaxavq_p_s16): Remove.
22924 (vminavq_p_s32): Remove.
22925 (vmaxavq_p_s32): Remove.
22926 (__arm_vminavq_s8): Remove.
22927 (__arm_vmaxavq_s8): Remove.
22928 (__arm_vminavq_s16): Remove.
22929 (__arm_vmaxavq_s16): Remove.
22930 (__arm_vminavq_s32): Remove.
22931 (__arm_vmaxavq_s32): Remove.
22932 (__arm_vminavq_p_s8): Remove.
22933 (__arm_vmaxavq_p_s8): Remove.
22934 (__arm_vminavq_p_s16): Remove.
22935 (__arm_vmaxavq_p_s16): Remove.
22936 (__arm_vminavq_p_s32): Remove.
22937 (__arm_vmaxavq_p_s32): Remove.
22938 (__arm_vminavq): Remove.
22939 (__arm_vmaxavq): Remove.
22940 (__arm_vminavq_p): Remove.
22941 (__arm_vmaxavq_p): Remove.
22943 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22945 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
22946 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
22947 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
22948 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
22949 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
22950 (@mve_<mve_insn>q_<supf><mode>): ... this.
22951 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
22952 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
22953 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
22955 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22957 * config/arm/arm-mve-builtins-functions.h (class
22958 unspec_mve_function_exact_insn_pred_p): New.
22960 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22962 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
22963 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
22965 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22967 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
22968 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
22970 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
22972 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
22974 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
22975 (ADJUST_REG_ALLOC_ORDER): Likewise.
22976 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
22978 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
22979 Upa rather than Upl for unpredicated movprfx alternatives.
22981 2023-05-09 Jeff Law <jlaw@ventanamicro>
22983 * config/h8300/testcompare.md: Add peephole2 which uses a memory
22984 load to set flags, thus eliminating a compare against zero.
22986 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22988 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
22989 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
22990 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
22991 * config/arm/arm_mve.h (vshlltq): Remove.
22993 (vshllbq_m): Remove.
22994 (vshlltq_m): Remove.
22995 (vshllbq_x): Remove.
22996 (vshlltq_x): Remove.
22997 (vshlltq_n_u8): Remove.
22998 (vshllbq_n_u8): Remove.
22999 (vshlltq_n_s8): Remove.
23000 (vshllbq_n_s8): Remove.
23001 (vshlltq_n_u16): Remove.
23002 (vshllbq_n_u16): Remove.
23003 (vshlltq_n_s16): Remove.
23004 (vshllbq_n_s16): Remove.
23005 (vshllbq_m_n_s8): Remove.
23006 (vshllbq_m_n_s16): Remove.
23007 (vshllbq_m_n_u8): Remove.
23008 (vshllbq_m_n_u16): Remove.
23009 (vshlltq_m_n_s8): Remove.
23010 (vshlltq_m_n_s16): Remove.
23011 (vshlltq_m_n_u8): Remove.
23012 (vshlltq_m_n_u16): Remove.
23013 (vshllbq_x_n_s8): Remove.
23014 (vshllbq_x_n_s16): Remove.
23015 (vshllbq_x_n_u8): Remove.
23016 (vshllbq_x_n_u16): Remove.
23017 (vshlltq_x_n_s8): Remove.
23018 (vshlltq_x_n_s16): Remove.
23019 (vshlltq_x_n_u8): Remove.
23020 (vshlltq_x_n_u16): Remove.
23021 (__arm_vshlltq_n_u8): Remove.
23022 (__arm_vshllbq_n_u8): Remove.
23023 (__arm_vshlltq_n_s8): Remove.
23024 (__arm_vshllbq_n_s8): Remove.
23025 (__arm_vshlltq_n_u16): Remove.
23026 (__arm_vshllbq_n_u16): Remove.
23027 (__arm_vshlltq_n_s16): Remove.
23028 (__arm_vshllbq_n_s16): Remove.
23029 (__arm_vshllbq_m_n_s8): Remove.
23030 (__arm_vshllbq_m_n_s16): Remove.
23031 (__arm_vshllbq_m_n_u8): Remove.
23032 (__arm_vshllbq_m_n_u16): Remove.
23033 (__arm_vshlltq_m_n_s8): Remove.
23034 (__arm_vshlltq_m_n_s16): Remove.
23035 (__arm_vshlltq_m_n_u8): Remove.
23036 (__arm_vshlltq_m_n_u16): Remove.
23037 (__arm_vshllbq_x_n_s8): Remove.
23038 (__arm_vshllbq_x_n_s16): Remove.
23039 (__arm_vshllbq_x_n_u8): Remove.
23040 (__arm_vshllbq_x_n_u16): Remove.
23041 (__arm_vshlltq_x_n_s8): Remove.
23042 (__arm_vshlltq_x_n_s16): Remove.
23043 (__arm_vshlltq_x_n_u8): Remove.
23044 (__arm_vshlltq_x_n_u16): Remove.
23045 (__arm_vshlltq): Remove.
23046 (__arm_vshllbq): Remove.
23047 (__arm_vshllbq_m): Remove.
23048 (__arm_vshlltq_m): Remove.
23049 (__arm_vshllbq_x): Remove.
23050 (__arm_vshlltq_x): Remove.
23052 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23054 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
23055 (VSHLLBQ_N, VSHLLTQ_N): Remove.
23057 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
23058 (VSHLLxQ_M_N): New.
23059 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
23060 (mve_vshlltq_n_<supf><mode>): Merge into ...
23061 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23062 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
23064 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23066 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23068 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
23069 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
23071 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23073 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
23074 (vqmovntq, vqmovunbq, vqmovuntq): New.
23075 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
23076 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
23077 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
23078 (vqmovntq, vqmovunbq, vqmovuntq): New.
23079 * config/arm/arm-mve-builtins.cc
23080 (function_instance::has_inactive_argument): Handle vmovnbq,
23081 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
23082 * config/arm/arm_mve.h (vqmovntq): Remove.
23083 (vqmovnbq): Remove.
23084 (vqmovnbq_m): Remove.
23085 (vqmovntq_m): Remove.
23086 (vqmovntq_u16): Remove.
23087 (vqmovnbq_u16): Remove.
23088 (vqmovntq_s16): Remove.
23089 (vqmovnbq_s16): Remove.
23090 (vqmovntq_u32): Remove.
23091 (vqmovnbq_u32): Remove.
23092 (vqmovntq_s32): Remove.
23093 (vqmovnbq_s32): Remove.
23094 (vqmovnbq_m_s16): Remove.
23095 (vqmovntq_m_s16): Remove.
23096 (vqmovnbq_m_u16): Remove.
23097 (vqmovntq_m_u16): Remove.
23098 (vqmovnbq_m_s32): Remove.
23099 (vqmovntq_m_s32): Remove.
23100 (vqmovnbq_m_u32): Remove.
23101 (vqmovntq_m_u32): Remove.
23102 (__arm_vqmovntq_u16): Remove.
23103 (__arm_vqmovnbq_u16): Remove.
23104 (__arm_vqmovntq_s16): Remove.
23105 (__arm_vqmovnbq_s16): Remove.
23106 (__arm_vqmovntq_u32): Remove.
23107 (__arm_vqmovnbq_u32): Remove.
23108 (__arm_vqmovntq_s32): Remove.
23109 (__arm_vqmovnbq_s32): Remove.
23110 (__arm_vqmovnbq_m_s16): Remove.
23111 (__arm_vqmovntq_m_s16): Remove.
23112 (__arm_vqmovnbq_m_u16): Remove.
23113 (__arm_vqmovntq_m_u16): Remove.
23114 (__arm_vqmovnbq_m_s32): Remove.
23115 (__arm_vqmovntq_m_s32): Remove.
23116 (__arm_vqmovnbq_m_u32): Remove.
23117 (__arm_vqmovntq_m_u32): Remove.
23118 (__arm_vqmovntq): Remove.
23119 (__arm_vqmovnbq): Remove.
23120 (__arm_vqmovnbq_m): Remove.
23121 (__arm_vqmovntq_m): Remove.
23124 (vmovnbq_m): Remove.
23125 (vmovntq_m): Remove.
23126 (vmovntq_u16): Remove.
23127 (vmovnbq_u16): Remove.
23128 (vmovntq_s16): Remove.
23129 (vmovnbq_s16): Remove.
23130 (vmovntq_u32): Remove.
23131 (vmovnbq_u32): Remove.
23132 (vmovntq_s32): Remove.
23133 (vmovnbq_s32): Remove.
23134 (vmovnbq_m_s16): Remove.
23135 (vmovntq_m_s16): Remove.
23136 (vmovnbq_m_u16): Remove.
23137 (vmovntq_m_u16): Remove.
23138 (vmovnbq_m_s32): Remove.
23139 (vmovntq_m_s32): Remove.
23140 (vmovnbq_m_u32): Remove.
23141 (vmovntq_m_u32): Remove.
23142 (__arm_vmovntq_u16): Remove.
23143 (__arm_vmovnbq_u16): Remove.
23144 (__arm_vmovntq_s16): Remove.
23145 (__arm_vmovnbq_s16): Remove.
23146 (__arm_vmovntq_u32): Remove.
23147 (__arm_vmovnbq_u32): Remove.
23148 (__arm_vmovntq_s32): Remove.
23149 (__arm_vmovnbq_s32): Remove.
23150 (__arm_vmovnbq_m_s16): Remove.
23151 (__arm_vmovntq_m_s16): Remove.
23152 (__arm_vmovnbq_m_u16): Remove.
23153 (__arm_vmovntq_m_u16): Remove.
23154 (__arm_vmovnbq_m_s32): Remove.
23155 (__arm_vmovntq_m_s32): Remove.
23156 (__arm_vmovnbq_m_u32): Remove.
23157 (__arm_vmovntq_m_u32): Remove.
23158 (__arm_vmovntq): Remove.
23159 (__arm_vmovnbq): Remove.
23160 (__arm_vmovnbq_m): Remove.
23161 (__arm_vmovntq_m): Remove.
23162 (vqmovuntq): Remove.
23163 (vqmovunbq): Remove.
23164 (vqmovunbq_m): Remove.
23165 (vqmovuntq_m): Remove.
23166 (vqmovuntq_s16): Remove.
23167 (vqmovunbq_s16): Remove.
23168 (vqmovuntq_s32): Remove.
23169 (vqmovunbq_s32): Remove.
23170 (vqmovunbq_m_s16): Remove.
23171 (vqmovuntq_m_s16): Remove.
23172 (vqmovunbq_m_s32): Remove.
23173 (vqmovuntq_m_s32): Remove.
23174 (__arm_vqmovuntq_s16): Remove.
23175 (__arm_vqmovunbq_s16): Remove.
23176 (__arm_vqmovuntq_s32): Remove.
23177 (__arm_vqmovunbq_s32): Remove.
23178 (__arm_vqmovunbq_m_s16): Remove.
23179 (__arm_vqmovuntq_m_s16): Remove.
23180 (__arm_vqmovunbq_m_s32): Remove.
23181 (__arm_vqmovuntq_m_s32): Remove.
23182 (__arm_vqmovuntq): Remove.
23183 (__arm_vqmovunbq): Remove.
23184 (__arm_vqmovunbq_m): Remove.
23185 (__arm_vqmovuntq_m): Remove.
23187 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23189 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
23190 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
23193 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
23195 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
23196 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
23197 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
23198 (mve_vqmovuntq_s<mode>): Merge into ...
23199 (@mve_<mve_insn>q_<supf><mode>): ... this.
23200 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
23201 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
23202 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
23203 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23205 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23207 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
23208 (binary_move_narrow_unsigned): New.
23209 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
23210 (binary_move_narrow_unsigned): New.
23212 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23214 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
23215 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
23216 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
23217 (vrndpq, vrndq, vrndxq): New.
23218 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
23219 (vrndpq, vrndq, vrndxq): New.
23220 * config/arm/arm_mve.h (vrndxq): Remove.
23226 (vrndaq_m): Remove.
23227 (vrndmq_m): Remove.
23228 (vrndnq_m): Remove.
23229 (vrndpq_m): Remove.
23231 (vrndxq_m): Remove.
23233 (vrndnq_x): Remove.
23234 (vrndmq_x): Remove.
23235 (vrndpq_x): Remove.
23236 (vrndaq_x): Remove.
23237 (vrndxq_x): Remove.
23238 (vrndxq_f16): Remove.
23239 (vrndxq_f32): Remove.
23240 (vrndq_f16): Remove.
23241 (vrndq_f32): Remove.
23242 (vrndpq_f16): Remove.
23243 (vrndpq_f32): Remove.
23244 (vrndnq_f16): Remove.
23245 (vrndnq_f32): Remove.
23246 (vrndmq_f16): Remove.
23247 (vrndmq_f32): Remove.
23248 (vrndaq_f16): Remove.
23249 (vrndaq_f32): Remove.
23250 (vrndaq_m_f16): Remove.
23251 (vrndmq_m_f16): Remove.
23252 (vrndnq_m_f16): Remove.
23253 (vrndpq_m_f16): Remove.
23254 (vrndq_m_f16): Remove.
23255 (vrndxq_m_f16): Remove.
23256 (vrndaq_m_f32): Remove.
23257 (vrndmq_m_f32): Remove.
23258 (vrndnq_m_f32): Remove.
23259 (vrndpq_m_f32): Remove.
23260 (vrndq_m_f32): Remove.
23261 (vrndxq_m_f32): Remove.
23262 (vrndq_x_f16): Remove.
23263 (vrndq_x_f32): Remove.
23264 (vrndnq_x_f16): Remove.
23265 (vrndnq_x_f32): Remove.
23266 (vrndmq_x_f16): Remove.
23267 (vrndmq_x_f32): Remove.
23268 (vrndpq_x_f16): Remove.
23269 (vrndpq_x_f32): Remove.
23270 (vrndaq_x_f16): Remove.
23271 (vrndaq_x_f32): Remove.
23272 (vrndxq_x_f16): Remove.
23273 (vrndxq_x_f32): Remove.
23274 (__arm_vrndxq_f16): Remove.
23275 (__arm_vrndxq_f32): Remove.
23276 (__arm_vrndq_f16): Remove.
23277 (__arm_vrndq_f32): Remove.
23278 (__arm_vrndpq_f16): Remove.
23279 (__arm_vrndpq_f32): Remove.
23280 (__arm_vrndnq_f16): Remove.
23281 (__arm_vrndnq_f32): Remove.
23282 (__arm_vrndmq_f16): Remove.
23283 (__arm_vrndmq_f32): Remove.
23284 (__arm_vrndaq_f16): Remove.
23285 (__arm_vrndaq_f32): Remove.
23286 (__arm_vrndaq_m_f16): Remove.
23287 (__arm_vrndmq_m_f16): Remove.
23288 (__arm_vrndnq_m_f16): Remove.
23289 (__arm_vrndpq_m_f16): Remove.
23290 (__arm_vrndq_m_f16): Remove.
23291 (__arm_vrndxq_m_f16): Remove.
23292 (__arm_vrndaq_m_f32): Remove.
23293 (__arm_vrndmq_m_f32): Remove.
23294 (__arm_vrndnq_m_f32): Remove.
23295 (__arm_vrndpq_m_f32): Remove.
23296 (__arm_vrndq_m_f32): Remove.
23297 (__arm_vrndxq_m_f32): Remove.
23298 (__arm_vrndq_x_f16): Remove.
23299 (__arm_vrndq_x_f32): Remove.
23300 (__arm_vrndnq_x_f16): Remove.
23301 (__arm_vrndnq_x_f32): Remove.
23302 (__arm_vrndmq_x_f16): Remove.
23303 (__arm_vrndmq_x_f32): Remove.
23304 (__arm_vrndpq_x_f16): Remove.
23305 (__arm_vrndpq_x_f32): Remove.
23306 (__arm_vrndaq_x_f16): Remove.
23307 (__arm_vrndaq_x_f32): Remove.
23308 (__arm_vrndxq_x_f16): Remove.
23309 (__arm_vrndxq_x_f32): Remove.
23310 (__arm_vrndxq): Remove.
23311 (__arm_vrndq): Remove.
23312 (__arm_vrndpq): Remove.
23313 (__arm_vrndnq): Remove.
23314 (__arm_vrndmq): Remove.
23315 (__arm_vrndaq): Remove.
23316 (__arm_vrndaq_m): Remove.
23317 (__arm_vrndmq_m): Remove.
23318 (__arm_vrndnq_m): Remove.
23319 (__arm_vrndpq_m): Remove.
23320 (__arm_vrndq_m): Remove.
23321 (__arm_vrndxq_m): Remove.
23322 (__arm_vrndq_x): Remove.
23323 (__arm_vrndnq_x): Remove.
23324 (__arm_vrndmq_x): Remove.
23325 (__arm_vrndpq_x): Remove.
23326 (__arm_vrndaq_x): Remove.
23327 (__arm_vrndxq_x): Remove.
23329 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23331 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
23332 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
23333 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
23334 (vclzq, vqabsq, vqnegq): New.
23335 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
23336 (vqabsq, vqnegq): New.
23337 * config/arm/arm_mve.h (vabsq): Remove.
23340 (vabsq_f16): Remove.
23341 (vabsq_f32): Remove.
23342 (vabsq_s8): Remove.
23343 (vabsq_s16): Remove.
23344 (vabsq_s32): Remove.
23345 (vabsq_m_s8): Remove.
23346 (vabsq_m_s16): Remove.
23347 (vabsq_m_s32): Remove.
23348 (vabsq_m_f16): Remove.
23349 (vabsq_m_f32): Remove.
23350 (vabsq_x_s8): Remove.
23351 (vabsq_x_s16): Remove.
23352 (vabsq_x_s32): Remove.
23353 (vabsq_x_f16): Remove.
23354 (vabsq_x_f32): Remove.
23355 (__arm_vabsq_s8): Remove.
23356 (__arm_vabsq_s16): Remove.
23357 (__arm_vabsq_s32): Remove.
23358 (__arm_vabsq_m_s8): Remove.
23359 (__arm_vabsq_m_s16): Remove.
23360 (__arm_vabsq_m_s32): Remove.
23361 (__arm_vabsq_x_s8): Remove.
23362 (__arm_vabsq_x_s16): Remove.
23363 (__arm_vabsq_x_s32): Remove.
23364 (__arm_vabsq_f16): Remove.
23365 (__arm_vabsq_f32): Remove.
23366 (__arm_vabsq_m_f16): Remove.
23367 (__arm_vabsq_m_f32): Remove.
23368 (__arm_vabsq_x_f16): Remove.
23369 (__arm_vabsq_x_f32): Remove.
23370 (__arm_vabsq): Remove.
23371 (__arm_vabsq_m): Remove.
23372 (__arm_vabsq_x): Remove.
23376 (vnegq_f16): Remove.
23377 (vnegq_f32): Remove.
23378 (vnegq_s8): Remove.
23379 (vnegq_s16): Remove.
23380 (vnegq_s32): Remove.
23381 (vnegq_m_s8): Remove.
23382 (vnegq_m_s16): Remove.
23383 (vnegq_m_s32): Remove.
23384 (vnegq_m_f16): Remove.
23385 (vnegq_m_f32): Remove.
23386 (vnegq_x_s8): Remove.
23387 (vnegq_x_s16): Remove.
23388 (vnegq_x_s32): Remove.
23389 (vnegq_x_f16): Remove.
23390 (vnegq_x_f32): Remove.
23391 (__arm_vnegq_s8): Remove.
23392 (__arm_vnegq_s16): Remove.
23393 (__arm_vnegq_s32): Remove.
23394 (__arm_vnegq_m_s8): Remove.
23395 (__arm_vnegq_m_s16): Remove.
23396 (__arm_vnegq_m_s32): Remove.
23397 (__arm_vnegq_x_s8): Remove.
23398 (__arm_vnegq_x_s16): Remove.
23399 (__arm_vnegq_x_s32): Remove.
23400 (__arm_vnegq_f16): Remove.
23401 (__arm_vnegq_f32): Remove.
23402 (__arm_vnegq_m_f16): Remove.
23403 (__arm_vnegq_m_f32): Remove.
23404 (__arm_vnegq_x_f16): Remove.
23405 (__arm_vnegq_x_f32): Remove.
23406 (__arm_vnegq): Remove.
23407 (__arm_vnegq_m): Remove.
23408 (__arm_vnegq_x): Remove.
23412 (vclsq_s8): Remove.
23413 (vclsq_s16): Remove.
23414 (vclsq_s32): Remove.
23415 (vclsq_m_s8): Remove.
23416 (vclsq_m_s16): Remove.
23417 (vclsq_m_s32): Remove.
23418 (vclsq_x_s8): Remove.
23419 (vclsq_x_s16): Remove.
23420 (vclsq_x_s32): Remove.
23421 (__arm_vclsq_s8): Remove.
23422 (__arm_vclsq_s16): Remove.
23423 (__arm_vclsq_s32): Remove.
23424 (__arm_vclsq_m_s8): Remove.
23425 (__arm_vclsq_m_s16): Remove.
23426 (__arm_vclsq_m_s32): Remove.
23427 (__arm_vclsq_x_s8): Remove.
23428 (__arm_vclsq_x_s16): Remove.
23429 (__arm_vclsq_x_s32): Remove.
23430 (__arm_vclsq): Remove.
23431 (__arm_vclsq_m): Remove.
23432 (__arm_vclsq_x): Remove.
23436 (vclzq_s8): Remove.
23437 (vclzq_s16): Remove.
23438 (vclzq_s32): Remove.
23439 (vclzq_u8): Remove.
23440 (vclzq_u16): Remove.
23441 (vclzq_u32): Remove.
23442 (vclzq_m_u8): Remove.
23443 (vclzq_m_s8): Remove.
23444 (vclzq_m_u16): Remove.
23445 (vclzq_m_s16): Remove.
23446 (vclzq_m_u32): Remove.
23447 (vclzq_m_s32): Remove.
23448 (vclzq_x_s8): Remove.
23449 (vclzq_x_s16): Remove.
23450 (vclzq_x_s32): Remove.
23451 (vclzq_x_u8): Remove.
23452 (vclzq_x_u16): Remove.
23453 (vclzq_x_u32): Remove.
23454 (__arm_vclzq_s8): Remove.
23455 (__arm_vclzq_s16): Remove.
23456 (__arm_vclzq_s32): Remove.
23457 (__arm_vclzq_u8): Remove.
23458 (__arm_vclzq_u16): Remove.
23459 (__arm_vclzq_u32): Remove.
23460 (__arm_vclzq_m_u8): Remove.
23461 (__arm_vclzq_m_s8): Remove.
23462 (__arm_vclzq_m_u16): Remove.
23463 (__arm_vclzq_m_s16): Remove.
23464 (__arm_vclzq_m_u32): Remove.
23465 (__arm_vclzq_m_s32): Remove.
23466 (__arm_vclzq_x_s8): Remove.
23467 (__arm_vclzq_x_s16): Remove.
23468 (__arm_vclzq_x_s32): Remove.
23469 (__arm_vclzq_x_u8): Remove.
23470 (__arm_vclzq_x_u16): Remove.
23471 (__arm_vclzq_x_u32): Remove.
23472 (__arm_vclzq): Remove.
23473 (__arm_vclzq_m): Remove.
23474 (__arm_vclzq_x): Remove.
23477 (vqnegq_m): Remove.
23478 (vqabsq_m): Remove.
23479 (vqabsq_s8): Remove.
23480 (vqabsq_s16): Remove.
23481 (vqabsq_s32): Remove.
23482 (vqnegq_s8): Remove.
23483 (vqnegq_s16): Remove.
23484 (vqnegq_s32): Remove.
23485 (vqnegq_m_s8): Remove.
23486 (vqabsq_m_s8): Remove.
23487 (vqnegq_m_s16): Remove.
23488 (vqabsq_m_s16): Remove.
23489 (vqnegq_m_s32): Remove.
23490 (vqabsq_m_s32): Remove.
23491 (__arm_vqabsq_s8): Remove.
23492 (__arm_vqabsq_s16): Remove.
23493 (__arm_vqabsq_s32): Remove.
23494 (__arm_vqnegq_s8): Remove.
23495 (__arm_vqnegq_s16): Remove.
23496 (__arm_vqnegq_s32): Remove.
23497 (__arm_vqnegq_m_s8): Remove.
23498 (__arm_vqabsq_m_s8): Remove.
23499 (__arm_vqnegq_m_s16): Remove.
23500 (__arm_vqabsq_m_s16): Remove.
23501 (__arm_vqnegq_m_s32): Remove.
23502 (__arm_vqabsq_m_s32): Remove.
23503 (__arm_vqabsq): Remove.
23504 (__arm_vqnegq): Remove.
23505 (__arm_vqnegq_m): Remove.
23506 (__arm_vqabsq_m): Remove.
23508 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23510 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
23511 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
23512 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
23513 vrndm, vrndn, vrndp, vrnd, vrndx.
23514 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
23515 VQABSQ_M_S, VQNEGQ_M_S.
23517 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
23518 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
23519 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
23520 (@mve_<mve_insn>q_f<mode>): ... this.
23521 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
23522 (mve_v<absneg_str>q_f<mode>): ... this.
23523 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
23524 (mve_v<absneg_str>q_s<mode>): ... this.
23525 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
23526 (@mve_<mve_insn>q_<supf><mode>): ... this.
23527 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
23528 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
23529 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
23530 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23531 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
23532 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
23533 (mve_vrndxq_m_f<mode>): Merge into ...
23534 (@mve_<mve_insn>q_m_f<mode>): ... this.
23536 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
23538 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
23539 * config/arm/arm-mve-builtins-shapes.h (unary): New.
23541 2023-05-09 Jakub Jelinek <jakub@redhat.com>
23543 * mux-utils.h: Fix comment typo, avoides -> avoids.
23545 2023-05-09 Jakub Jelinek <jakub@redhat.com>
23547 PR tree-optimization/109778
23548 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
23549 wi::zext (x, width) rather than x if width != precision, rather
23550 than using wi::zext (right, width) after the shift.
23551 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
23552 of wi::lrotate or wi::rrotate.
23554 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
23556 * genmatch.cc (get_out_file): Make static and rename to ...
23557 (choose_output): ... this. Reimplement. Update all uses ...
23558 (decision_tree::gen): ... here and ...
23561 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
23563 * genmatch.cc (showUsage): Reimplement as ...
23564 (usage): ...this. Adjust all uses.
23565 (main): Print usage when no arguments. Add missing 'return 1'.
23567 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
23569 * genmatch.cc (header_file): Make static.
23570 (emit_func): Rename to...
23571 (fp_decl): ... this. Adjust all uses.
23572 (fp_decl_done): New function. Use it...
23573 (decision_tree::gen): ... here and...
23574 (write_predicate): ... here.
23577 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
23579 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
23582 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
23583 Uros Bizjak <ubizjak@gmail.com>
23585 * config/i386/i386.md (any_or_plus): Move definition earlier.
23586 (*insvti_highpart_1): New define_insn_and_split to overwrite
23587 (insv) the highpart of a TImode register/memory.
23589 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
23591 * auto-profile.cc (auto_profile): Check todo from early_inline
23592 to see if cleanup_tree_vfg needs to be called.
23593 (early_inline): Return todo from early_inliner.
23595 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
23597 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
23599 (pass_vsetvl::get_block_info): New.
23600 (pass_vsetvl::update_vector_info): New.
23601 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
23602 (pass_vsetvl::compute_local_backward_infos): Ditto.
23603 (pass_vsetvl::transfer_before): Ditto.
23604 (pass_vsetvl::transfer_after): Ditto.
23605 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
23606 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
23607 (pass_vsetvl::cleanup_insns): Ditto.
23608 (pass_vsetvl::compute_local_backward_infos): Use
23609 update_vector_info.
23611 2023-05-08 Jeff Law <jlaw@ventanamicro>
23613 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
23615 2023-05-08 Richard Biener <rguenther@suse.de>
23616 Michael Meissner <meissner@linux.ibm.com>
23618 PR middle-end/108623
23619 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
23620 Align bit fields > 1 bit to at least an 8-bit boundary.
23622 2023-05-08 Andrew Pinski <apinski@marvell.com>
23624 PR tree-optimization/109424
23625 PR tree-optimization/59424
23626 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
23627 (factor_out_conditional_operation): This and add support for all unary
23629 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
23630 to call factor_out_conditional_operation instead.
23632 2023-05-08 Andrew Pinski <apinski@marvell.com>
23634 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
23635 over factor_out_conditional_conversion.
23637 2023-05-08 Andrew Pinski <apinski@marvell.com>
23639 PR tree-optimization/49959
23640 PR tree-optimization/103771
23641 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
23642 Diamond shapped bb form for factor_out_conditional_conversion.
23644 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23646 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
23647 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
23648 (riscv_vector_get_mask_mode): Ditto.
23649 (get_mask_policy_no_pred): Ditto.
23650 (get_tail_policy_no_pred): Ditto.
23651 (get_mask_mode): New function.
23652 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
23653 (get_tail_policy_no_pred): Ditto.
23654 (riscv_vector_mask_mode_p): Ditto.
23655 (riscv_vector_get_mask_mode): Ditto.
23656 (get_mask_mode): New function.
23657 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
23659 (get_tail_policy_for_pred): Ditto.
23660 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
23661 (get_mask_policy_for_pred): Ditto
23662 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
23664 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
23666 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
23667 (riscv_select_multilib): New.
23668 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
23669 also handle select_by_abi.
23670 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
23671 to select_by_abi_arch_cmodel from 1.
23672 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
23673 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
23675 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
23677 * Makefile.in: (gimple-match-head.o-warn): Remove.
23678 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
23679 gimple-match-exports.cc.
23680 (gimple-match-auto.h): Only depend on s-gimple-match.
23681 (generic-match-auto.h): Likewise.
23683 2023-05-08 Andrew Pinski <apinski@marvell.com>
23685 PR tree-optimization/109691
23686 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
23688 If the removed statement can throw, have need_eh_cleanup
23689 include the bb of that statement.
23690 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
23691 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
23693 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
23694 Initialize dceworklist instead of stmts_to_remove.
23695 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
23696 Destore dceworklist instead of stmts_to_remove.
23697 (substitute_and_fold_dom_walker::before_dom_children):
23698 Set dceworklist instead of adding to stmts_to_remove.
23699 (substitute_and_fold_engine::substitute_and_fold):
23700 Call simple_dce_from_worklist instead of poping
23702 Don't update the stat on removal statements.
23704 2023-05-07 Andrew Pinski <apinski@marvell.com>
23707 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
23708 Change argument type to aarch64_feature_flags.
23709 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
23710 constructor argument type to aarch64_feature_flags.
23711 Change m_old_asm_isa_flags to be aarch64_feature_flags.
23713 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
23715 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
23716 more parallel code if can_create_pseudo_p.
23718 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
23721 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
23722 immediately before moving a multi-word register by parts.
23724 2023-05-06 Jeff Law <jlaw@ventanamicro>
23726 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
23728 2023-05-06 Michael Collison <collison@rivosinc.com>
23730 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
23731 Check that GET_MODE_NUNITS is a multiple of 2.
23733 2023-05-06 Michael Collison <collison@rivosinc.com>
23735 * config/riscv/riscv.cc
23736 (riscv_estimated_poly_value): Implement
23737 TARGET_ESTIMATED_POLY_VALUE.
23738 (riscv_preferred_simd_mode): Implement
23739 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
23740 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
23741 (riscv_empty_mask_is_expensive): Implement
23742 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
23743 (riscv_vectorize_create_costs): Implement
23744 TARGET_VECTORIZE_CREATE_COSTS.
23745 (riscv_support_vector_misalignment): Implement
23746 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
23747 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
23748 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
23749 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
23750 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
23752 2023-05-06 Jeff Law <jlaw@ventanamicro>
23754 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
23755 duplicate definition.
23757 2023-05-06 Michael Collison <collison@rivosinc.com>
23759 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
23760 (riscv_vector_preferred_simd_mode): Ditto.
23761 (get_mask_policy_no_pred): Ditto.
23762 (get_tail_policy_no_pred): Ditto.
23763 (riscv_vector_mask_mode_p): Ditto.
23764 (riscv_vector_get_mask_mode): Ditto.
23766 2023-05-06 Michael Collison <collison@rivosinc.com>
23768 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
23769 Remove static declaration to to make externally visible.
23770 (get_mask_policy_for_pred): Ditto.
23771 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
23772 New external declaration.
23773 (get_mask_policy_for_pred): Ditto.
23775 2023-05-06 Michael Collison <collison@rivosinc.com>
23777 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
23778 (riscv_vector_get_mask_mode): Ditto.
23779 (get_mask_policy_no_pred): Ditto.
23780 (get_tail_policy_no_pred): Ditto.
23782 2023-05-06 Xi Ruoyao <xry111@xry111.site>
23784 * config/loongarch/loongarch.h (struct machine_function): Add
23785 reg_is_wrapped_separately array for register wrapping
23787 * config/loongarch/loongarch.cc
23788 (loongarch_get_separate_components): New function.
23789 (loongarch_components_for_bb): Likewise.
23790 (loongarch_disqualify_components): Likewise.
23791 (loongarch_process_components): Likewise.
23792 (loongarch_emit_prologue_components): Likewise.
23793 (loongarch_emit_epilogue_components): Likewise.
23794 (loongarch_set_handled_components): Likewise.
23795 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
23796 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
23797 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
23798 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
23799 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
23800 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
23801 (loongarch_for_each_saved_reg): Skip registers that are wrapped
23804 2023-05-06 Xi Ruoyao <xry111@xry111.site>
23807 * Makefile.in (s-macro_list): Pass -nostdinc to
23810 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23812 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
23813 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
23814 (preferred_simd_mode): Ditto.
23815 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
23816 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
23817 (riscv_preferred_simd_mode): New function.
23818 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
23819 * config/riscv/vector.md: Add autovec.md.
23820 * config/riscv/autovec.md: New file.
23822 2023-05-06 Jakub Jelinek <jakub@redhat.com>
23824 * real.h (dconst_pi): Define.
23825 (dconst_e_ptr): Formatting fix.
23826 (dconst_pi_ptr): Declare.
23827 * real.cc (dconst_pi_ptr): New function.
23828 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
23829 boundaries range with range computed from sin/cos of the particular
23830 bounds if the argument range is shorter than 2*pi.
23831 (cfn_sincos::op1_range): Take bulps into account when determining
23832 which result ranges are always invalid or behave like known NAN.
23834 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
23836 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
23837 pass type to vrange_storage::equal_p.
23838 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
23839 (irange_storage::equal_p): Same.
23840 (frange_storage::equal_p): Same.
23841 * value-range-storage.h (class frange_storage): Same.
23843 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23846 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
23847 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
23849 2023-05-06 liuhongt <hongtao.liu@intel.com>
23851 * combine.cc (maybe_swap_commutative_operands): Canonicalize
23852 vec_merge when mask is constant.
23853 * doc/md.texi: Document vec_merge canonicalization.
23855 2023-05-06 Jakub Jelinek <jakub@redhat.com>
23857 * value-range.h (frange_arithmetic): Declare.
23858 * range-op-float.cc (frange_arithmetic): No longer static.
23859 * gimple-range-op.cc (frange_mpfr_arg1): New function.
23860 (cfn_sqrt::fold_range): Intersect the generic boundaries range
23861 with range computed from sqrt of the particular bounds.
23862 (cfn_sqrt::op1_range): Intersect the generic boundaries range
23863 with range computed from squared particular bounds.
23865 2023-05-06 Jakub Jelinek <jakub@redhat.com>
23867 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
23868 earlier with helper variables also renamed.
23869 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
23870 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
23871 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
23873 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
23875 * config/cris/cris.md (splitop): Add PLUS.
23876 * config/cris/cris.cc (cris_split_constant): Also handle
23877 PLUS when a split into two insns may be useful.
23879 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
23881 * config/cris/cris.md (movandsplit1): New define_peephole2.
23883 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
23885 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
23887 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
23889 * doc/md.texi (define_peephole2): Document order of scanning.
23891 2023-05-05 Pan Li <pan2.li@intel.com>
23892 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23894 * config/riscv/vector.md: Allow const as the operand of RVV
23895 indexed load/store.
23897 2023-05-05 Pan Li <pan2.li@intel.com>
23899 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
23900 consumed by simplify_rtx.
23902 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23904 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
23905 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
23906 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
23907 * config/arm/arm_mve.h (vshrq): Remove.
23909 (vrshrq_m): Remove.
23911 (vrshrq_x): Remove.
23913 (vshrq_n_s8): Remove.
23914 (vshrq_n_s16): Remove.
23915 (vshrq_n_s32): Remove.
23916 (vshrq_n_u8): Remove.
23917 (vshrq_n_u16): Remove.
23918 (vshrq_n_u32): Remove.
23919 (vrshrq_n_u8): Remove.
23920 (vrshrq_n_s8): Remove.
23921 (vrshrq_n_u16): Remove.
23922 (vrshrq_n_s16): Remove.
23923 (vrshrq_n_u32): Remove.
23924 (vrshrq_n_s32): Remove.
23925 (vrshrq_m_n_s8): Remove.
23926 (vrshrq_m_n_s32): Remove.
23927 (vrshrq_m_n_s16): Remove.
23928 (vrshrq_m_n_u8): Remove.
23929 (vrshrq_m_n_u32): Remove.
23930 (vrshrq_m_n_u16): Remove.
23931 (vshrq_m_n_s8): Remove.
23932 (vshrq_m_n_s32): Remove.
23933 (vshrq_m_n_s16): Remove.
23934 (vshrq_m_n_u8): Remove.
23935 (vshrq_m_n_u32): Remove.
23936 (vshrq_m_n_u16): Remove.
23937 (vrshrq_x_n_s8): Remove.
23938 (vrshrq_x_n_s16): Remove.
23939 (vrshrq_x_n_s32): Remove.
23940 (vrshrq_x_n_u8): Remove.
23941 (vrshrq_x_n_u16): Remove.
23942 (vrshrq_x_n_u32): Remove.
23943 (vshrq_x_n_s8): Remove.
23944 (vshrq_x_n_s16): Remove.
23945 (vshrq_x_n_s32): Remove.
23946 (vshrq_x_n_u8): Remove.
23947 (vshrq_x_n_u16): Remove.
23948 (vshrq_x_n_u32): Remove.
23949 (__arm_vshrq_n_s8): Remove.
23950 (__arm_vshrq_n_s16): Remove.
23951 (__arm_vshrq_n_s32): Remove.
23952 (__arm_vshrq_n_u8): Remove.
23953 (__arm_vshrq_n_u16): Remove.
23954 (__arm_vshrq_n_u32): Remove.
23955 (__arm_vrshrq_n_u8): Remove.
23956 (__arm_vrshrq_n_s8): Remove.
23957 (__arm_vrshrq_n_u16): Remove.
23958 (__arm_vrshrq_n_s16): Remove.
23959 (__arm_vrshrq_n_u32): Remove.
23960 (__arm_vrshrq_n_s32): Remove.
23961 (__arm_vrshrq_m_n_s8): Remove.
23962 (__arm_vrshrq_m_n_s32): Remove.
23963 (__arm_vrshrq_m_n_s16): Remove.
23964 (__arm_vrshrq_m_n_u8): Remove.
23965 (__arm_vrshrq_m_n_u32): Remove.
23966 (__arm_vrshrq_m_n_u16): Remove.
23967 (__arm_vshrq_m_n_s8): Remove.
23968 (__arm_vshrq_m_n_s32): Remove.
23969 (__arm_vshrq_m_n_s16): Remove.
23970 (__arm_vshrq_m_n_u8): Remove.
23971 (__arm_vshrq_m_n_u32): Remove.
23972 (__arm_vshrq_m_n_u16): Remove.
23973 (__arm_vrshrq_x_n_s8): Remove.
23974 (__arm_vrshrq_x_n_s16): Remove.
23975 (__arm_vrshrq_x_n_s32): Remove.
23976 (__arm_vrshrq_x_n_u8): Remove.
23977 (__arm_vrshrq_x_n_u16): Remove.
23978 (__arm_vrshrq_x_n_u32): Remove.
23979 (__arm_vshrq_x_n_s8): Remove.
23980 (__arm_vshrq_x_n_s16): Remove.
23981 (__arm_vshrq_x_n_s32): Remove.
23982 (__arm_vshrq_x_n_u8): Remove.
23983 (__arm_vshrq_x_n_u16): Remove.
23984 (__arm_vshrq_x_n_u32): Remove.
23985 (__arm_vshrq): Remove.
23986 (__arm_vrshrq): Remove.
23987 (__arm_vrshrq_m): Remove.
23988 (__arm_vshrq_m): Remove.
23989 (__arm_vrshrq_x): Remove.
23990 (__arm_vshrq_x): Remove.
23992 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23994 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
23995 (mve_insn): Add vrshr, vshr.
23996 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
23997 (mve_vrshrq_n_<supf><mode>): Merge into ...
23998 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23999 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
24001 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24003 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24005 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
24006 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
24008 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24010 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
24011 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
24012 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
24013 (vqrshrunbq, vqrshruntq): New.
24014 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
24015 (vqrshrunbq, vqrshruntq): New.
24016 * config/arm/arm-mve-builtins.cc
24017 (function_instance::has_inactive_argument): Handle vqshrunbq,
24018 vqshruntq, vqrshrunbq, vqrshruntq.
24019 * config/arm/arm_mve.h (vqrshrunbq): Remove.
24020 (vqrshruntq): Remove.
24021 (vqrshrunbq_m): Remove.
24022 (vqrshruntq_m): Remove.
24023 (vqrshrunbq_n_s16): Remove.
24024 (vqrshrunbq_n_s32): Remove.
24025 (vqrshruntq_n_s16): Remove.
24026 (vqrshruntq_n_s32): Remove.
24027 (vqrshrunbq_m_n_s32): Remove.
24028 (vqrshrunbq_m_n_s16): Remove.
24029 (vqrshruntq_m_n_s32): Remove.
24030 (vqrshruntq_m_n_s16): Remove.
24031 (__arm_vqrshrunbq_n_s16): Remove.
24032 (__arm_vqrshrunbq_n_s32): Remove.
24033 (__arm_vqrshruntq_n_s16): Remove.
24034 (__arm_vqrshruntq_n_s32): Remove.
24035 (__arm_vqrshrunbq_m_n_s32): Remove.
24036 (__arm_vqrshrunbq_m_n_s16): Remove.
24037 (__arm_vqrshruntq_m_n_s32): Remove.
24038 (__arm_vqrshruntq_m_n_s16): Remove.
24039 (__arm_vqrshrunbq): Remove.
24040 (__arm_vqrshruntq): Remove.
24041 (__arm_vqrshrunbq_m): Remove.
24042 (__arm_vqrshruntq_m): Remove.
24043 (vqshrunbq): Remove.
24044 (vqshruntq): Remove.
24045 (vqshrunbq_m): Remove.
24046 (vqshruntq_m): Remove.
24047 (vqshrunbq_n_s16): Remove.
24048 (vqshruntq_n_s16): Remove.
24049 (vqshrunbq_n_s32): Remove.
24050 (vqshruntq_n_s32): Remove.
24051 (vqshrunbq_m_n_s32): Remove.
24052 (vqshrunbq_m_n_s16): Remove.
24053 (vqshruntq_m_n_s32): Remove.
24054 (vqshruntq_m_n_s16): Remove.
24055 (__arm_vqshrunbq_n_s16): Remove.
24056 (__arm_vqshruntq_n_s16): Remove.
24057 (__arm_vqshrunbq_n_s32): Remove.
24058 (__arm_vqshruntq_n_s32): Remove.
24059 (__arm_vqshrunbq_m_n_s32): Remove.
24060 (__arm_vqshrunbq_m_n_s16): Remove.
24061 (__arm_vqshruntq_m_n_s32): Remove.
24062 (__arm_vqshruntq_m_n_s16): Remove.
24063 (__arm_vqshrunbq): Remove.
24064 (__arm_vqshruntq): Remove.
24065 (__arm_vqshrunbq_m): Remove.
24066 (__arm_vqshruntq_m): Remove.
24068 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24070 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
24071 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
24072 (MVE_SHRN_M_N): Likewise.
24073 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
24074 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
24076 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
24077 (mve_vqrshruntq_n_s<mode>): Remove.
24078 (mve_vqshrunbq_n_s<mode>): Remove.
24079 (mve_vqshruntq_n_s<mode>): Remove.
24080 (mve_vqrshrunbq_m_n_s<mode>): Remove.
24081 (mve_vqrshruntq_m_n_s<mode>): Remove.
24082 (mve_vqshrunbq_m_n_s<mode>): Remove.
24083 (mve_vqshruntq_m_n_s<mode>): Remove.
24085 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24087 * config/arm/arm-mve-builtins-shapes.cc
24088 (binary_rshift_narrow_unsigned): New.
24089 * config/arm/arm-mve-builtins-shapes.h
24090 (binary_rshift_narrow_unsigned): New.
24092 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24094 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
24095 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
24096 (vqrshrnbq, vqrshrntq): New.
24097 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
24098 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
24100 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
24101 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
24102 * config/arm/arm-mve-builtins.cc
24103 (function_instance::has_inactive_argument): Handle vshrnbq,
24104 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
24106 * config/arm/arm_mve.h (vshrnbq): Remove.
24108 (vshrnbq_m): Remove.
24109 (vshrntq_m): Remove.
24110 (vshrnbq_n_s16): Remove.
24111 (vshrntq_n_s16): Remove.
24112 (vshrnbq_n_u16): Remove.
24113 (vshrntq_n_u16): Remove.
24114 (vshrnbq_n_s32): Remove.
24115 (vshrntq_n_s32): Remove.
24116 (vshrnbq_n_u32): Remove.
24117 (vshrntq_n_u32): Remove.
24118 (vshrnbq_m_n_s32): Remove.
24119 (vshrnbq_m_n_s16): Remove.
24120 (vshrnbq_m_n_u32): Remove.
24121 (vshrnbq_m_n_u16): Remove.
24122 (vshrntq_m_n_s32): Remove.
24123 (vshrntq_m_n_s16): Remove.
24124 (vshrntq_m_n_u32): Remove.
24125 (vshrntq_m_n_u16): Remove.
24126 (__arm_vshrnbq_n_s16): Remove.
24127 (__arm_vshrntq_n_s16): Remove.
24128 (__arm_vshrnbq_n_u16): Remove.
24129 (__arm_vshrntq_n_u16): Remove.
24130 (__arm_vshrnbq_n_s32): Remove.
24131 (__arm_vshrntq_n_s32): Remove.
24132 (__arm_vshrnbq_n_u32): Remove.
24133 (__arm_vshrntq_n_u32): Remove.
24134 (__arm_vshrnbq_m_n_s32): Remove.
24135 (__arm_vshrnbq_m_n_s16): Remove.
24136 (__arm_vshrnbq_m_n_u32): Remove.
24137 (__arm_vshrnbq_m_n_u16): Remove.
24138 (__arm_vshrntq_m_n_s32): Remove.
24139 (__arm_vshrntq_m_n_s16): Remove.
24140 (__arm_vshrntq_m_n_u32): Remove.
24141 (__arm_vshrntq_m_n_u16): Remove.
24142 (__arm_vshrnbq): Remove.
24143 (__arm_vshrntq): Remove.
24144 (__arm_vshrnbq_m): Remove.
24145 (__arm_vshrntq_m): Remove.
24146 (vrshrnbq): Remove.
24147 (vrshrntq): Remove.
24148 (vrshrnbq_m): Remove.
24149 (vrshrntq_m): Remove.
24150 (vrshrnbq_n_s16): Remove.
24151 (vrshrntq_n_s16): Remove.
24152 (vrshrnbq_n_u16): Remove.
24153 (vrshrntq_n_u16): Remove.
24154 (vrshrnbq_n_s32): Remove.
24155 (vrshrntq_n_s32): Remove.
24156 (vrshrnbq_n_u32): Remove.
24157 (vrshrntq_n_u32): Remove.
24158 (vrshrnbq_m_n_s32): Remove.
24159 (vrshrnbq_m_n_s16): Remove.
24160 (vrshrnbq_m_n_u32): Remove.
24161 (vrshrnbq_m_n_u16): Remove.
24162 (vrshrntq_m_n_s32): Remove.
24163 (vrshrntq_m_n_s16): Remove.
24164 (vrshrntq_m_n_u32): Remove.
24165 (vrshrntq_m_n_u16): Remove.
24166 (__arm_vrshrnbq_n_s16): Remove.
24167 (__arm_vrshrntq_n_s16): Remove.
24168 (__arm_vrshrnbq_n_u16): Remove.
24169 (__arm_vrshrntq_n_u16): Remove.
24170 (__arm_vrshrnbq_n_s32): Remove.
24171 (__arm_vrshrntq_n_s32): Remove.
24172 (__arm_vrshrnbq_n_u32): Remove.
24173 (__arm_vrshrntq_n_u32): Remove.
24174 (__arm_vrshrnbq_m_n_s32): Remove.
24175 (__arm_vrshrnbq_m_n_s16): Remove.
24176 (__arm_vrshrnbq_m_n_u32): Remove.
24177 (__arm_vrshrnbq_m_n_u16): Remove.
24178 (__arm_vrshrntq_m_n_s32): Remove.
24179 (__arm_vrshrntq_m_n_s16): Remove.
24180 (__arm_vrshrntq_m_n_u32): Remove.
24181 (__arm_vrshrntq_m_n_u16): Remove.
24182 (__arm_vrshrnbq): Remove.
24183 (__arm_vrshrntq): Remove.
24184 (__arm_vrshrnbq_m): Remove.
24185 (__arm_vrshrntq_m): Remove.
24186 (vqshrnbq): Remove.
24187 (vqshrntq): Remove.
24188 (vqshrnbq_m): Remove.
24189 (vqshrntq_m): Remove.
24190 (vqshrnbq_n_s16): Remove.
24191 (vqshrntq_n_s16): Remove.
24192 (vqshrnbq_n_u16): Remove.
24193 (vqshrntq_n_u16): Remove.
24194 (vqshrnbq_n_s32): Remove.
24195 (vqshrntq_n_s32): Remove.
24196 (vqshrnbq_n_u32): Remove.
24197 (vqshrntq_n_u32): Remove.
24198 (vqshrnbq_m_n_s32): Remove.
24199 (vqshrnbq_m_n_s16): Remove.
24200 (vqshrnbq_m_n_u32): Remove.
24201 (vqshrnbq_m_n_u16): Remove.
24202 (vqshrntq_m_n_s32): Remove.
24203 (vqshrntq_m_n_s16): Remove.
24204 (vqshrntq_m_n_u32): Remove.
24205 (vqshrntq_m_n_u16): Remove.
24206 (__arm_vqshrnbq_n_s16): Remove.
24207 (__arm_vqshrntq_n_s16): Remove.
24208 (__arm_vqshrnbq_n_u16): Remove.
24209 (__arm_vqshrntq_n_u16): Remove.
24210 (__arm_vqshrnbq_n_s32): Remove.
24211 (__arm_vqshrntq_n_s32): Remove.
24212 (__arm_vqshrnbq_n_u32): Remove.
24213 (__arm_vqshrntq_n_u32): Remove.
24214 (__arm_vqshrnbq_m_n_s32): Remove.
24215 (__arm_vqshrnbq_m_n_s16): Remove.
24216 (__arm_vqshrnbq_m_n_u32): Remove.
24217 (__arm_vqshrnbq_m_n_u16): Remove.
24218 (__arm_vqshrntq_m_n_s32): Remove.
24219 (__arm_vqshrntq_m_n_s16): Remove.
24220 (__arm_vqshrntq_m_n_u32): Remove.
24221 (__arm_vqshrntq_m_n_u16): Remove.
24222 (__arm_vqshrnbq): Remove.
24223 (__arm_vqshrntq): Remove.
24224 (__arm_vqshrnbq_m): Remove.
24225 (__arm_vqshrntq_m): Remove.
24226 (vqrshrnbq): Remove.
24227 (vqrshrntq): Remove.
24228 (vqrshrnbq_m): Remove.
24229 (vqrshrntq_m): Remove.
24230 (vqrshrnbq_n_s16): Remove.
24231 (vqrshrnbq_n_u16): Remove.
24232 (vqrshrnbq_n_s32): Remove.
24233 (vqrshrnbq_n_u32): Remove.
24234 (vqrshrntq_n_s16): Remove.
24235 (vqrshrntq_n_u16): Remove.
24236 (vqrshrntq_n_s32): Remove.
24237 (vqrshrntq_n_u32): Remove.
24238 (vqrshrnbq_m_n_s32): Remove.
24239 (vqrshrnbq_m_n_s16): Remove.
24240 (vqrshrnbq_m_n_u32): Remove.
24241 (vqrshrnbq_m_n_u16): Remove.
24242 (vqrshrntq_m_n_s32): Remove.
24243 (vqrshrntq_m_n_s16): Remove.
24244 (vqrshrntq_m_n_u32): Remove.
24245 (vqrshrntq_m_n_u16): Remove.
24246 (__arm_vqrshrnbq_n_s16): Remove.
24247 (__arm_vqrshrnbq_n_u16): Remove.
24248 (__arm_vqrshrnbq_n_s32): Remove.
24249 (__arm_vqrshrnbq_n_u32): Remove.
24250 (__arm_vqrshrntq_n_s16): Remove.
24251 (__arm_vqrshrntq_n_u16): Remove.
24252 (__arm_vqrshrntq_n_s32): Remove.
24253 (__arm_vqrshrntq_n_u32): Remove.
24254 (__arm_vqrshrnbq_m_n_s32): Remove.
24255 (__arm_vqrshrnbq_m_n_s16): Remove.
24256 (__arm_vqrshrnbq_m_n_u32): Remove.
24257 (__arm_vqrshrnbq_m_n_u16): Remove.
24258 (__arm_vqrshrntq_m_n_s32): Remove.
24259 (__arm_vqrshrntq_m_n_s16): Remove.
24260 (__arm_vqrshrntq_m_n_u32): Remove.
24261 (__arm_vqrshrntq_m_n_u16): Remove.
24262 (__arm_vqrshrnbq): Remove.
24263 (__arm_vqrshrntq): Remove.
24264 (__arm_vqrshrnbq_m): Remove.
24265 (__arm_vqrshrntq_m): Remove.
24267 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24269 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
24270 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
24271 vrshrnt, vshrnb, vshrnt.
24273 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
24274 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
24275 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
24276 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
24277 (mve_vshrntq_n_<supf><mode>): Merge into ...
24278 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24279 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
24280 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
24281 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
24282 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
24284 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24286 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24288 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
24290 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
24292 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24294 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
24295 (vmaxq, vminq): New.
24296 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
24297 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
24298 * config/arm/arm_mve.h (vminq): Remove.
24304 (vminq_u8): Remove.
24305 (vmaxq_u8): Remove.
24306 (vminq_s8): Remove.
24307 (vmaxq_s8): Remove.
24308 (vminq_u16): Remove.
24309 (vmaxq_u16): Remove.
24310 (vminq_s16): Remove.
24311 (vmaxq_s16): Remove.
24312 (vminq_u32): Remove.
24313 (vmaxq_u32): Remove.
24314 (vminq_s32): Remove.
24315 (vmaxq_s32): Remove.
24316 (vmaxq_m_s8): Remove.
24317 (vmaxq_m_s32): Remove.
24318 (vmaxq_m_s16): Remove.
24319 (vmaxq_m_u8): Remove.
24320 (vmaxq_m_u32): Remove.
24321 (vmaxq_m_u16): Remove.
24322 (vminq_m_s8): Remove.
24323 (vminq_m_s32): Remove.
24324 (vminq_m_s16): Remove.
24325 (vminq_m_u8): Remove.
24326 (vminq_m_u32): Remove.
24327 (vminq_m_u16): Remove.
24328 (vminq_x_s8): Remove.
24329 (vminq_x_s16): Remove.
24330 (vminq_x_s32): Remove.
24331 (vminq_x_u8): Remove.
24332 (vminq_x_u16): Remove.
24333 (vminq_x_u32): Remove.
24334 (vmaxq_x_s8): Remove.
24335 (vmaxq_x_s16): Remove.
24336 (vmaxq_x_s32): Remove.
24337 (vmaxq_x_u8): Remove.
24338 (vmaxq_x_u16): Remove.
24339 (vmaxq_x_u32): Remove.
24340 (__arm_vminq_u8): Remove.
24341 (__arm_vmaxq_u8): Remove.
24342 (__arm_vminq_s8): Remove.
24343 (__arm_vmaxq_s8): Remove.
24344 (__arm_vminq_u16): Remove.
24345 (__arm_vmaxq_u16): Remove.
24346 (__arm_vminq_s16): Remove.
24347 (__arm_vmaxq_s16): Remove.
24348 (__arm_vminq_u32): Remove.
24349 (__arm_vmaxq_u32): Remove.
24350 (__arm_vminq_s32): Remove.
24351 (__arm_vmaxq_s32): Remove.
24352 (__arm_vmaxq_m_s8): Remove.
24353 (__arm_vmaxq_m_s32): Remove.
24354 (__arm_vmaxq_m_s16): Remove.
24355 (__arm_vmaxq_m_u8): Remove.
24356 (__arm_vmaxq_m_u32): Remove.
24357 (__arm_vmaxq_m_u16): Remove.
24358 (__arm_vminq_m_s8): Remove.
24359 (__arm_vminq_m_s32): Remove.
24360 (__arm_vminq_m_s16): Remove.
24361 (__arm_vminq_m_u8): Remove.
24362 (__arm_vminq_m_u32): Remove.
24363 (__arm_vminq_m_u16): Remove.
24364 (__arm_vminq_x_s8): Remove.
24365 (__arm_vminq_x_s16): Remove.
24366 (__arm_vminq_x_s32): Remove.
24367 (__arm_vminq_x_u8): Remove.
24368 (__arm_vminq_x_u16): Remove.
24369 (__arm_vminq_x_u32): Remove.
24370 (__arm_vmaxq_x_s8): Remove.
24371 (__arm_vmaxq_x_s16): Remove.
24372 (__arm_vmaxq_x_s32): Remove.
24373 (__arm_vmaxq_x_u8): Remove.
24374 (__arm_vmaxq_x_u16): Remove.
24375 (__arm_vmaxq_x_u32): Remove.
24376 (__arm_vminq): Remove.
24377 (__arm_vmaxq): Remove.
24378 (__arm_vmaxq_m): Remove.
24379 (__arm_vminq_m): Remove.
24380 (__arm_vminq_x): Remove.
24381 (__arm_vmaxq_x): Remove.
24383 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24385 * config/arm/iterators.md (MAX_MIN_SU): New.
24386 (max_min_su_str): New.
24387 (max_min_supf): New.
24388 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
24389 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
24390 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
24392 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24394 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
24395 (vqshlq, vshlq): New.
24396 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
24397 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
24398 * config/arm/arm_mve.h (vshlq): Remove.
24401 (vshlq_m_r): Remove.
24403 (vshlq_m_n): Remove.
24405 (vshlq_x_n): Remove.
24406 (vshlq_s8): Remove.
24407 (vshlq_s16): Remove.
24408 (vshlq_s32): Remove.
24409 (vshlq_u8): Remove.
24410 (vshlq_u16): Remove.
24411 (vshlq_u32): Remove.
24412 (vshlq_r_u8): Remove.
24413 (vshlq_n_u8): Remove.
24414 (vshlq_r_s8): Remove.
24415 (vshlq_n_s8): Remove.
24416 (vshlq_r_u16): Remove.
24417 (vshlq_n_u16): Remove.
24418 (vshlq_r_s16): Remove.
24419 (vshlq_n_s16): Remove.
24420 (vshlq_r_u32): Remove.
24421 (vshlq_n_u32): Remove.
24422 (vshlq_r_s32): Remove.
24423 (vshlq_n_s32): Remove.
24424 (vshlq_m_r_u8): Remove.
24425 (vshlq_m_r_s8): Remove.
24426 (vshlq_m_r_u16): Remove.
24427 (vshlq_m_r_s16): Remove.
24428 (vshlq_m_r_u32): Remove.
24429 (vshlq_m_r_s32): Remove.
24430 (vshlq_m_u8): Remove.
24431 (vshlq_m_s8): Remove.
24432 (vshlq_m_u16): Remove.
24433 (vshlq_m_s16): Remove.
24434 (vshlq_m_u32): Remove.
24435 (vshlq_m_s32): Remove.
24436 (vshlq_m_n_s8): Remove.
24437 (vshlq_m_n_s32): Remove.
24438 (vshlq_m_n_s16): Remove.
24439 (vshlq_m_n_u8): Remove.
24440 (vshlq_m_n_u32): Remove.
24441 (vshlq_m_n_u16): Remove.
24442 (vshlq_x_s8): Remove.
24443 (vshlq_x_s16): Remove.
24444 (vshlq_x_s32): Remove.
24445 (vshlq_x_u8): Remove.
24446 (vshlq_x_u16): Remove.
24447 (vshlq_x_u32): Remove.
24448 (vshlq_x_n_s8): Remove.
24449 (vshlq_x_n_s16): Remove.
24450 (vshlq_x_n_s32): Remove.
24451 (vshlq_x_n_u8): Remove.
24452 (vshlq_x_n_u16): Remove.
24453 (vshlq_x_n_u32): Remove.
24454 (__arm_vshlq_s8): Remove.
24455 (__arm_vshlq_s16): Remove.
24456 (__arm_vshlq_s32): Remove.
24457 (__arm_vshlq_u8): Remove.
24458 (__arm_vshlq_u16): Remove.
24459 (__arm_vshlq_u32): Remove.
24460 (__arm_vshlq_r_u8): Remove.
24461 (__arm_vshlq_n_u8): Remove.
24462 (__arm_vshlq_r_s8): Remove.
24463 (__arm_vshlq_n_s8): Remove.
24464 (__arm_vshlq_r_u16): Remove.
24465 (__arm_vshlq_n_u16): Remove.
24466 (__arm_vshlq_r_s16): Remove.
24467 (__arm_vshlq_n_s16): Remove.
24468 (__arm_vshlq_r_u32): Remove.
24469 (__arm_vshlq_n_u32): Remove.
24470 (__arm_vshlq_r_s32): Remove.
24471 (__arm_vshlq_n_s32): Remove.
24472 (__arm_vshlq_m_r_u8): Remove.
24473 (__arm_vshlq_m_r_s8): Remove.
24474 (__arm_vshlq_m_r_u16): Remove.
24475 (__arm_vshlq_m_r_s16): Remove.
24476 (__arm_vshlq_m_r_u32): Remove.
24477 (__arm_vshlq_m_r_s32): Remove.
24478 (__arm_vshlq_m_u8): Remove.
24479 (__arm_vshlq_m_s8): Remove.
24480 (__arm_vshlq_m_u16): Remove.
24481 (__arm_vshlq_m_s16): Remove.
24482 (__arm_vshlq_m_u32): Remove.
24483 (__arm_vshlq_m_s32): Remove.
24484 (__arm_vshlq_m_n_s8): Remove.
24485 (__arm_vshlq_m_n_s32): Remove.
24486 (__arm_vshlq_m_n_s16): Remove.
24487 (__arm_vshlq_m_n_u8): Remove.
24488 (__arm_vshlq_m_n_u32): Remove.
24489 (__arm_vshlq_m_n_u16): Remove.
24490 (__arm_vshlq_x_s8): Remove.
24491 (__arm_vshlq_x_s16): Remove.
24492 (__arm_vshlq_x_s32): Remove.
24493 (__arm_vshlq_x_u8): Remove.
24494 (__arm_vshlq_x_u16): Remove.
24495 (__arm_vshlq_x_u32): Remove.
24496 (__arm_vshlq_x_n_s8): Remove.
24497 (__arm_vshlq_x_n_s16): Remove.
24498 (__arm_vshlq_x_n_s32): Remove.
24499 (__arm_vshlq_x_n_u8): Remove.
24500 (__arm_vshlq_x_n_u16): Remove.
24501 (__arm_vshlq_x_n_u32): Remove.
24502 (__arm_vshlq): Remove.
24503 (__arm_vshlq_r): Remove.
24504 (__arm_vshlq_n): Remove.
24505 (__arm_vshlq_m_r): Remove.
24506 (__arm_vshlq_m): Remove.
24507 (__arm_vshlq_m_n): Remove.
24508 (__arm_vshlq_x): Remove.
24509 (__arm_vshlq_x_n): Remove.
24511 (vqshlq_r): Remove.
24512 (vqshlq_n): Remove.
24513 (vqshlq_m_r): Remove.
24514 (vqshlq_m_n): Remove.
24515 (vqshlq_m): Remove.
24516 (vqshlq_u8): Remove.
24517 (vqshlq_r_u8): Remove.
24518 (vqshlq_n_u8): Remove.
24519 (vqshlq_s8): Remove.
24520 (vqshlq_r_s8): Remove.
24521 (vqshlq_n_s8): Remove.
24522 (vqshlq_u16): Remove.
24523 (vqshlq_r_u16): Remove.
24524 (vqshlq_n_u16): Remove.
24525 (vqshlq_s16): Remove.
24526 (vqshlq_r_s16): Remove.
24527 (vqshlq_n_s16): Remove.
24528 (vqshlq_u32): Remove.
24529 (vqshlq_r_u32): Remove.
24530 (vqshlq_n_u32): Remove.
24531 (vqshlq_s32): Remove.
24532 (vqshlq_r_s32): Remove.
24533 (vqshlq_n_s32): Remove.
24534 (vqshlq_m_r_u8): Remove.
24535 (vqshlq_m_r_s8): Remove.
24536 (vqshlq_m_r_u16): Remove.
24537 (vqshlq_m_r_s16): Remove.
24538 (vqshlq_m_r_u32): Remove.
24539 (vqshlq_m_r_s32): Remove.
24540 (vqshlq_m_n_s8): Remove.
24541 (vqshlq_m_n_s32): Remove.
24542 (vqshlq_m_n_s16): Remove.
24543 (vqshlq_m_n_u8): Remove.
24544 (vqshlq_m_n_u32): Remove.
24545 (vqshlq_m_n_u16): Remove.
24546 (vqshlq_m_s8): Remove.
24547 (vqshlq_m_s32): Remove.
24548 (vqshlq_m_s16): Remove.
24549 (vqshlq_m_u8): Remove.
24550 (vqshlq_m_u32): Remove.
24551 (vqshlq_m_u16): Remove.
24552 (__arm_vqshlq_u8): Remove.
24553 (__arm_vqshlq_r_u8): Remove.
24554 (__arm_vqshlq_n_u8): Remove.
24555 (__arm_vqshlq_s8): Remove.
24556 (__arm_vqshlq_r_s8): Remove.
24557 (__arm_vqshlq_n_s8): Remove.
24558 (__arm_vqshlq_u16): Remove.
24559 (__arm_vqshlq_r_u16): Remove.
24560 (__arm_vqshlq_n_u16): Remove.
24561 (__arm_vqshlq_s16): Remove.
24562 (__arm_vqshlq_r_s16): Remove.
24563 (__arm_vqshlq_n_s16): Remove.
24564 (__arm_vqshlq_u32): Remove.
24565 (__arm_vqshlq_r_u32): Remove.
24566 (__arm_vqshlq_n_u32): Remove.
24567 (__arm_vqshlq_s32): Remove.
24568 (__arm_vqshlq_r_s32): Remove.
24569 (__arm_vqshlq_n_s32): Remove.
24570 (__arm_vqshlq_m_r_u8): Remove.
24571 (__arm_vqshlq_m_r_s8): Remove.
24572 (__arm_vqshlq_m_r_u16): Remove.
24573 (__arm_vqshlq_m_r_s16): Remove.
24574 (__arm_vqshlq_m_r_u32): Remove.
24575 (__arm_vqshlq_m_r_s32): Remove.
24576 (__arm_vqshlq_m_n_s8): Remove.
24577 (__arm_vqshlq_m_n_s32): Remove.
24578 (__arm_vqshlq_m_n_s16): Remove.
24579 (__arm_vqshlq_m_n_u8): Remove.
24580 (__arm_vqshlq_m_n_u32): Remove.
24581 (__arm_vqshlq_m_n_u16): Remove.
24582 (__arm_vqshlq_m_s8): Remove.
24583 (__arm_vqshlq_m_s32): Remove.
24584 (__arm_vqshlq_m_s16): Remove.
24585 (__arm_vqshlq_m_u8): Remove.
24586 (__arm_vqshlq_m_u32): Remove.
24587 (__arm_vqshlq_m_u16): Remove.
24588 (__arm_vqshlq): Remove.
24589 (__arm_vqshlq_r): Remove.
24590 (__arm_vqshlq_n): Remove.
24591 (__arm_vqshlq_m_r): Remove.
24592 (__arm_vqshlq_m_n): Remove.
24593 (__arm_vqshlq_m): Remove.
24595 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24597 * config/arm/arm-mve-builtins-functions.h (class
24598 unspec_mve_function_exact_insn_vshl): New.
24600 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24602 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
24603 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
24605 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24607 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
24608 (finish_opt_n_resolution): Handle MODE_r.
24609 * config/arm/arm-mve-builtins.def (r): New mode.
24611 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24613 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
24614 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
24616 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24618 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
24620 * config/arm/arm-mve-builtins-base.def (vabdq): New.
24621 * config/arm/arm-mve-builtins-base.h (vabdq): New.
24622 * config/arm/arm_mve.h (vabdq): Remove.
24625 (vabdq_u8): Remove.
24626 (vabdq_s8): Remove.
24627 (vabdq_u16): Remove.
24628 (vabdq_s16): Remove.
24629 (vabdq_u32): Remove.
24630 (vabdq_s32): Remove.
24631 (vabdq_f16): Remove.
24632 (vabdq_f32): Remove.
24633 (vabdq_m_s8): Remove.
24634 (vabdq_m_s32): Remove.
24635 (vabdq_m_s16): Remove.
24636 (vabdq_m_u8): Remove.
24637 (vabdq_m_u32): Remove.
24638 (vabdq_m_u16): Remove.
24639 (vabdq_m_f32): Remove.
24640 (vabdq_m_f16): Remove.
24641 (vabdq_x_s8): Remove.
24642 (vabdq_x_s16): Remove.
24643 (vabdq_x_s32): Remove.
24644 (vabdq_x_u8): Remove.
24645 (vabdq_x_u16): Remove.
24646 (vabdq_x_u32): Remove.
24647 (vabdq_x_f16): Remove.
24648 (vabdq_x_f32): Remove.
24649 (__arm_vabdq_u8): Remove.
24650 (__arm_vabdq_s8): Remove.
24651 (__arm_vabdq_u16): Remove.
24652 (__arm_vabdq_s16): Remove.
24653 (__arm_vabdq_u32): Remove.
24654 (__arm_vabdq_s32): Remove.
24655 (__arm_vabdq_m_s8): Remove.
24656 (__arm_vabdq_m_s32): Remove.
24657 (__arm_vabdq_m_s16): Remove.
24658 (__arm_vabdq_m_u8): Remove.
24659 (__arm_vabdq_m_u32): Remove.
24660 (__arm_vabdq_m_u16): Remove.
24661 (__arm_vabdq_x_s8): Remove.
24662 (__arm_vabdq_x_s16): Remove.
24663 (__arm_vabdq_x_s32): Remove.
24664 (__arm_vabdq_x_u8): Remove.
24665 (__arm_vabdq_x_u16): Remove.
24666 (__arm_vabdq_x_u32): Remove.
24667 (__arm_vabdq_f16): Remove.
24668 (__arm_vabdq_f32): Remove.
24669 (__arm_vabdq_m_f32): Remove.
24670 (__arm_vabdq_m_f16): Remove.
24671 (__arm_vabdq_x_f16): Remove.
24672 (__arm_vabdq_x_f32): Remove.
24673 (__arm_vabdq): Remove.
24674 (__arm_vabdq_m): Remove.
24675 (__arm_vabdq_x): Remove.
24677 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24679 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
24680 (MVE_FP_VABDQ_ONLY): New.
24681 (mve_insn): Add vabd.
24682 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
24683 (@mve_<mve_insn>q_f<mode>): ... this.
24684 (mve_vabdq_m_f<mode>): Remove.
24686 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24688 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
24689 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
24690 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
24691 * config/arm/arm_mve.h (vqrdmulhq): Remove.
24692 (vqrdmulhq_m): Remove.
24693 (vqrdmulhq_s8): Remove.
24694 (vqrdmulhq_n_s8): Remove.
24695 (vqrdmulhq_s16): Remove.
24696 (vqrdmulhq_n_s16): Remove.
24697 (vqrdmulhq_s32): Remove.
24698 (vqrdmulhq_n_s32): Remove.
24699 (vqrdmulhq_m_n_s8): Remove.
24700 (vqrdmulhq_m_n_s32): Remove.
24701 (vqrdmulhq_m_n_s16): Remove.
24702 (vqrdmulhq_m_s8): Remove.
24703 (vqrdmulhq_m_s32): Remove.
24704 (vqrdmulhq_m_s16): Remove.
24705 (__arm_vqrdmulhq_s8): Remove.
24706 (__arm_vqrdmulhq_n_s8): Remove.
24707 (__arm_vqrdmulhq_s16): Remove.
24708 (__arm_vqrdmulhq_n_s16): Remove.
24709 (__arm_vqrdmulhq_s32): Remove.
24710 (__arm_vqrdmulhq_n_s32): Remove.
24711 (__arm_vqrdmulhq_m_n_s8): Remove.
24712 (__arm_vqrdmulhq_m_n_s32): Remove.
24713 (__arm_vqrdmulhq_m_n_s16): Remove.
24714 (__arm_vqrdmulhq_m_s8): Remove.
24715 (__arm_vqrdmulhq_m_s32): Remove.
24716 (__arm_vqrdmulhq_m_s16): Remove.
24717 (__arm_vqrdmulhq): Remove.
24718 (__arm_vqrdmulhq_m): Remove.
24720 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24722 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
24723 (MVE_SHIFT_N, MVE_SHIFT_R): New.
24724 (mve_insn): Add vqshl, vshl.
24725 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
24726 (mve_vshlq_n_<supf><mode>): Merge into ...
24727 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24728 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
24730 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
24731 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
24733 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
24734 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
24736 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24737 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
24739 (@mve_<mve_insn>q_<supf><mode>): ... this.
24741 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24743 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
24744 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
24745 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
24746 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
24748 * config/arm/arm_mve.h (vrshlq): Remove.
24749 (vrshlq_m_n): Remove.
24750 (vrshlq_m): Remove.
24751 (vrshlq_x): Remove.
24752 (vrshlq_u8): Remove.
24753 (vrshlq_n_u8): Remove.
24754 (vrshlq_s8): Remove.
24755 (vrshlq_n_s8): Remove.
24756 (vrshlq_u16): Remove.
24757 (vrshlq_n_u16): Remove.
24758 (vrshlq_s16): Remove.
24759 (vrshlq_n_s16): Remove.
24760 (vrshlq_u32): Remove.
24761 (vrshlq_n_u32): Remove.
24762 (vrshlq_s32): Remove.
24763 (vrshlq_n_s32): Remove.
24764 (vrshlq_m_n_u8): Remove.
24765 (vrshlq_m_n_s8): Remove.
24766 (vrshlq_m_n_u16): Remove.
24767 (vrshlq_m_n_s16): Remove.
24768 (vrshlq_m_n_u32): Remove.
24769 (vrshlq_m_n_s32): Remove.
24770 (vrshlq_m_s8): Remove.
24771 (vrshlq_m_s32): Remove.
24772 (vrshlq_m_s16): Remove.
24773 (vrshlq_m_u8): Remove.
24774 (vrshlq_m_u32): Remove.
24775 (vrshlq_m_u16): Remove.
24776 (vrshlq_x_s8): Remove.
24777 (vrshlq_x_s16): Remove.
24778 (vrshlq_x_s32): Remove.
24779 (vrshlq_x_u8): Remove.
24780 (vrshlq_x_u16): Remove.
24781 (vrshlq_x_u32): Remove.
24782 (__arm_vrshlq_u8): Remove.
24783 (__arm_vrshlq_n_u8): Remove.
24784 (__arm_vrshlq_s8): Remove.
24785 (__arm_vrshlq_n_s8): Remove.
24786 (__arm_vrshlq_u16): Remove.
24787 (__arm_vrshlq_n_u16): Remove.
24788 (__arm_vrshlq_s16): Remove.
24789 (__arm_vrshlq_n_s16): Remove.
24790 (__arm_vrshlq_u32): Remove.
24791 (__arm_vrshlq_n_u32): Remove.
24792 (__arm_vrshlq_s32): Remove.
24793 (__arm_vrshlq_n_s32): Remove.
24794 (__arm_vrshlq_m_n_u8): Remove.
24795 (__arm_vrshlq_m_n_s8): Remove.
24796 (__arm_vrshlq_m_n_u16): Remove.
24797 (__arm_vrshlq_m_n_s16): Remove.
24798 (__arm_vrshlq_m_n_u32): Remove.
24799 (__arm_vrshlq_m_n_s32): Remove.
24800 (__arm_vrshlq_m_s8): Remove.
24801 (__arm_vrshlq_m_s32): Remove.
24802 (__arm_vrshlq_m_s16): Remove.
24803 (__arm_vrshlq_m_u8): Remove.
24804 (__arm_vrshlq_m_u32): Remove.
24805 (__arm_vrshlq_m_u16): Remove.
24806 (__arm_vrshlq_x_s8): Remove.
24807 (__arm_vrshlq_x_s16): Remove.
24808 (__arm_vrshlq_x_s32): Remove.
24809 (__arm_vrshlq_x_u8): Remove.
24810 (__arm_vrshlq_x_u16): Remove.
24811 (__arm_vrshlq_x_u32): Remove.
24812 (__arm_vrshlq): Remove.
24813 (__arm_vrshlq_m_n): Remove.
24814 (__arm_vrshlq_m): Remove.
24815 (__arm_vrshlq_x): Remove.
24817 (vqrshlq_m_n): Remove.
24818 (vqrshlq_m): Remove.
24819 (vqrshlq_u8): Remove.
24820 (vqrshlq_n_u8): Remove.
24821 (vqrshlq_s8): Remove.
24822 (vqrshlq_n_s8): Remove.
24823 (vqrshlq_u16): Remove.
24824 (vqrshlq_n_u16): Remove.
24825 (vqrshlq_s16): Remove.
24826 (vqrshlq_n_s16): Remove.
24827 (vqrshlq_u32): Remove.
24828 (vqrshlq_n_u32): Remove.
24829 (vqrshlq_s32): Remove.
24830 (vqrshlq_n_s32): Remove.
24831 (vqrshlq_m_n_u8): Remove.
24832 (vqrshlq_m_n_s8): Remove.
24833 (vqrshlq_m_n_u16): Remove.
24834 (vqrshlq_m_n_s16): Remove.
24835 (vqrshlq_m_n_u32): Remove.
24836 (vqrshlq_m_n_s32): Remove.
24837 (vqrshlq_m_s8): Remove.
24838 (vqrshlq_m_s32): Remove.
24839 (vqrshlq_m_s16): Remove.
24840 (vqrshlq_m_u8): Remove.
24841 (vqrshlq_m_u32): Remove.
24842 (vqrshlq_m_u16): Remove.
24843 (__arm_vqrshlq_u8): Remove.
24844 (__arm_vqrshlq_n_u8): Remove.
24845 (__arm_vqrshlq_s8): Remove.
24846 (__arm_vqrshlq_n_s8): Remove.
24847 (__arm_vqrshlq_u16): Remove.
24848 (__arm_vqrshlq_n_u16): Remove.
24849 (__arm_vqrshlq_s16): Remove.
24850 (__arm_vqrshlq_n_s16): Remove.
24851 (__arm_vqrshlq_u32): Remove.
24852 (__arm_vqrshlq_n_u32): Remove.
24853 (__arm_vqrshlq_s32): Remove.
24854 (__arm_vqrshlq_n_s32): Remove.
24855 (__arm_vqrshlq_m_n_u8): Remove.
24856 (__arm_vqrshlq_m_n_s8): Remove.
24857 (__arm_vqrshlq_m_n_u16): Remove.
24858 (__arm_vqrshlq_m_n_s16): Remove.
24859 (__arm_vqrshlq_m_n_u32): Remove.
24860 (__arm_vqrshlq_m_n_s32): Remove.
24861 (__arm_vqrshlq_m_s8): Remove.
24862 (__arm_vqrshlq_m_s32): Remove.
24863 (__arm_vqrshlq_m_s16): Remove.
24864 (__arm_vqrshlq_m_u8): Remove.
24865 (__arm_vqrshlq_m_u32): Remove.
24866 (__arm_vqrshlq_m_u16): Remove.
24867 (__arm_vqrshlq): Remove.
24868 (__arm_vqrshlq_m_n): Remove.
24869 (__arm_vqrshlq_m): Remove.
24871 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24873 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
24874 (mve_insn): Add vqrshl, vrshl.
24875 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
24876 (mve_vrshlq_n_<supf><mode>): Merge into ...
24877 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24878 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
24880 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24882 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24884 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
24885 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
24887 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24890 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
24891 denegrate PHI optmization.
24893 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
24895 * config/i386/predicates.md (register_no_SP_operand):
24896 Rename from index_register_operand.
24897 (call_register_operand): Update for rename.
24898 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
24900 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24903 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
24904 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
24905 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
24906 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
24907 (s-match): Split into s-generic-match and s-gimple-match.
24908 * configure.ac (with-matchpd-partitions,
24909 DEFAULT_MATCHPD_PARTITIONS): New.
24910 * configure: Regenerate.
24912 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24915 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
24916 (decision_tree::gen): Accept list of files instead of single and update
24917 to write function definition to header and main file.
24918 (write_predicate): Likewise.
24919 (write_header): Emit pragmas and new includes.
24920 (main): Create file buffers and cleanup.
24921 (showUsage, write_header_includes): New.
24923 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24926 * Makefile.in (OBJS): Add gimple-match-exports.o.
24927 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
24928 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
24929 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
24930 gimple_resimplify5, constant_for_folding, convert_conditional_op,
24931 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
24932 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
24933 do_valueize, try_conditional_simplification, gimple_extract,
24934 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
24935 commutative_ternary_op_p, first_commutative_argument,
24936 associative_binary_op_p, directly_supported_p,
24937 get_conditional_internal_fn): Moved to gimple-match-exports.cc
24938 * gimple-match-exports.cc: New file.
24940 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24943 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
24945 (dt_simplify::gen_1): Use it.
24947 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24950 * genmatch.cc (output_line_directive): Only emit commented directive
24953 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24956 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
24958 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
24960 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
24961 unused in_mode/in_n variables.
24963 2023-05-05 Richard Biener <rguenther@suse.de>
24965 PR tree-optimization/109735
24966 * tree-vect-stmts.cc (vectorizable_operation): Perform
24967 conversion for POINTER_DIFF_EXPR unconditionally.
24969 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
24971 * config/i386/mmx.md (mulv2si3): New expander.
24972 (*mulv2si3): New insn pattern.
24974 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
24975 Thomas Schwinge <thomas@codesourcery.com>
24978 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
24979 alongside reverse-offload function table to prevent NULL values
24980 of the function addresses.
24982 2023-05-05 Jakub Jelinek <jakub@redhat.com>
24984 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
24986 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
24988 2023-05-05 Andrew Pinski <apinski@marvell.com>
24990 PR tree-optimization/109732
24991 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
24992 of the argtrue/argfalse.
24994 2023-05-05 Andrew Pinski <apinski@marvell.com>
24996 PR tree-optimization/109722
24997 * match.pd: Extend the `ABS<a> == 0` pattern
24998 to cover `ABSU<a> == 0` too.
25000 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
25003 * config/i386/predicates.md (index_reg_operand): New predicate.
25004 * config/i386/i386.md (ashift to lea spliter): Use
25005 general_reg_operand and index_reg_operand predicates.
25007 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25009 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
25010 Rename and reimplement with RTL codes to...
25011 (aarch64_<optab>hn2<mode>_insn_le): .. This.
25012 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
25013 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
25015 (aarch64_<optab>hn2<mode>_insn_be): ... This.
25016 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
25017 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
25018 (aarch64_<optab>hn2<mode>): ... This.
25019 (aarch64_r<optab>hn2<mode>): New expander.
25020 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
25021 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
25022 (ADDSUBHN): Delete.
25023 (sur): Remove handling of the above.
25024 (addsub): Likewise.
25026 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25028 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
25030 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
25031 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
25032 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
25033 (aarch64_<sur><addsub>hn<mode>): Delete.
25034 (aarch64_<optab>hn<mode>): New define_expand.
25035 (aarch64_r<optab>hn<mode>): Likewise.
25036 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
25039 2023-05-04 Andrew Pinski <apinski@marvell.com>
25041 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
25042 diamond form bb with forwarder only empty blocks better.
25044 2023-05-04 Andrew Pinski <apinski@marvell.com>
25046 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
25047 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
25048 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
25049 of an inline version of it.
25050 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
25051 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
25053 2023-05-04 Andrew Pinski <apinski@marvell.com>
25055 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
25056 the default argument value for dce_ssa_names to nullptr.
25057 Check to make sure dce_ssa_names is a non-nullptr before
25058 calling simple_dce_from_worklist.
25060 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
25062 * config/i386/predicates.md (index_register_operand): Reject
25063 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
25064 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
25065 (call_register_no_elim_operand): Rewrite as ...
25066 (call_register_operand): ... this.
25067 (call_insn_operand): Use call_register_operand predicate.
25069 2023-05-04 Richard Biener <rguenther@suse.de>
25071 PR tree-optimization/109721
25072 * tree-vect-stmts.cc (vectorizable_operation): Make sure
25073 to test word_mode for all !target_support_p operations.
25075 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25078 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
25079 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
25080 (aarch64_mla<mode>): Rename to...
25081 (aarch64_mla<mode><vczle><vczbe>): ... This.
25082 (*aarch64_mla_elt<mode>): Rename to...
25083 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
25084 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
25085 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
25086 (aarch64_mla_n<mode>): Rename to...
25087 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
25088 (aarch64_mls<mode>): Rename to...
25089 (aarch64_mls<mode><vczle><vczbe>): ... This.
25090 (*aarch64_mls_elt<mode>): Rename to...
25091 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
25092 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
25093 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
25094 (aarch64_mls_n<mode>): Rename to...
25095 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
25096 (fma<mode>4): Rename to...
25097 (fma<mode>4<vczle><vczbe>): ... This.
25098 (*aarch64_fma4_elt<mode>): Rename to...
25099 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
25100 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
25101 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
25102 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
25103 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
25104 (fnma<mode>4): Rename to...
25105 (fnma<mode>4<vczle><vczbe>): ... This.
25106 (*aarch64_fnma4_elt<mode>): Rename to...
25107 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
25108 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
25109 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
25110 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
25111 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
25112 (aarch64_simd_bsl<mode>_internal): Rename to...
25113 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
25114 (*aarch64_simd_bsl<mode>_alt): Rename to...
25115 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
25117 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25120 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
25121 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
25122 (fabd<mode>3): Rename to...
25123 (fabd<mode>3<vczle><vczbe>): ... This.
25124 (aarch64_<optab>p<mode>): Rename to...
25125 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
25126 (aarch64_faddp<mode>): Rename to...
25127 (aarch64_faddp<mode><vczle><vczbe>): ... This.
25129 2023-05-04 Martin Liska <mliska@suse.cz>
25131 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
25132 (print_version): Use it.
25133 (generate_results): Likewise.
25135 2023-05-04 Richard Biener <rguenther@suse.de>
25137 * tree-cfg.h (last_stmt): Rename to ...
25138 (last_nondebug_stmt): ... this.
25139 * tree-cfg.cc (last_stmt): Rename to ...
25140 (last_nondebug_stmt): ... this.
25141 (assign_discriminators): Adjust.
25142 (group_case_labels_stmt): Likewise.
25143 (gimple_can_duplicate_bb_p): Likewise.
25144 (execute_fixup_cfg): Likewise.
25145 * auto-profile.cc (afdo_propagate_circuit): Likewise.
25146 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
25147 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
25148 (determine_parallel_type): Likewise.
25149 (adjust_context_and_scope): Likewise.
25150 (expand_task_call): Likewise.
25151 (remove_exit_barrier): Likewise.
25152 (expand_omp_taskreg): Likewise.
25153 (expand_omp_for_init_counts): Likewise.
25154 (expand_omp_for_init_vars): Likewise.
25155 (expand_omp_for_static_chunk): Likewise.
25156 (expand_omp_simd): Likewise.
25157 (expand_oacc_for): Likewise.
25158 (expand_omp_for): Likewise.
25159 (expand_omp_sections): Likewise.
25160 (expand_omp_atomic_fetch_op): Likewise.
25161 (expand_omp_atomic_cas): Likewise.
25162 (expand_omp_atomic): Likewise.
25163 (expand_omp_target): Likewise.
25164 (expand_omp): Likewise.
25165 (omp_make_gimple_edges): Likewise.
25166 * trans-mem.cc (tm_region_init): Likewise.
25167 * tree-inline.cc (redirect_all_calls): Likewise.
25168 * tree-parloops.cc (gen_parallel_loop): Likewise.
25169 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
25170 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
25172 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
25173 (may_eliminate_iv): Likewise.
25174 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
25175 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
25177 (estimate_numbers_of_iterations): Likewise.
25178 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
25179 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
25180 (set_predicates_for_bb): Likewise.
25181 (init_loop_unswitch_info): Likewise.
25182 (hoist_guard): Likewise.
25183 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
25184 (minmax_replacement): Likewise.
25185 * tree-ssa-reassoc.cc (update_range_test): Likewise.
25186 (optimize_range_tests_to_bit_test): Likewise.
25187 (optimize_range_tests_var_bound): Likewise.
25188 (optimize_range_tests): Likewise.
25189 (no_side_effect_bb): Likewise.
25190 (suitable_cond_bb): Likewise.
25191 (maybe_optimize_range_tests): Likewise.
25192 (reassociate_bb): Likewise.
25193 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
25195 2023-05-04 Jakub Jelinek <jakub@redhat.com>
25198 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
25199 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
25200 for it only if it still has TImode. Don't decide whether to call
25201 fix_debug_reg_uses based on whether SRC is ever set or not.
25203 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
25205 * config/cris/cris.cc (cris_split_constant): New function.
25206 * config/cris/cris.md (splitop): New iterator.
25207 (opsplit1): New define_peephole2.
25208 * config/cris/cris-protos.h (cris_split_constant): Declare.
25209 (cris_splittable_constant_p): New macro.
25211 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
25213 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
25216 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
25218 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
25219 lra_in_progress, not reload_in_progress.
25220 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
25221 * config/cris/constraints.md ("Q"): Ditto.
25223 2023-05-03 Andrew Pinski <apinski@marvell.com>
25225 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
25226 stats on removed number of statements and phis.
25228 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
25230 PR tree-optimization/109711
25231 * value-range.cc (irange::verify_range): Allow types of
25234 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
25237 * calls.cc (can_implement_as_sibling_call_p): Reject calls
25238 to __sanitizer_cov_trace_pc.
25240 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
25243 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
25244 a new ABI break parameter for GCC 14. Set it to the alignment
25245 of enums that have an underlying type. Take the true alignment
25246 of such enums from the TYPE_ALIGN of the underlying type's
25248 (aarch64_function_arg_boundary): Update accordingly.
25249 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
25250 Warn about ABI differences.
25252 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
25255 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
25256 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
25257 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
25258 (aarch64_gimplify_va_arg_expr): Likewise.
25260 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25262 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
25263 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
25264 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
25266 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
25267 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
25268 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
25269 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
25270 * config/arm/arm_mve.h (vhsubq): Remove.
25272 (vhaddq_m): Remove.
25273 (vhsubq_m): Remove.
25274 (vhaddq_x): Remove.
25275 (vhsubq_x): Remove.
25276 (vhsubq_u8): Remove.
25277 (vhsubq_n_u8): Remove.
25278 (vhaddq_u8): Remove.
25279 (vhaddq_n_u8): Remove.
25280 (vhsubq_s8): Remove.
25281 (vhsubq_n_s8): Remove.
25282 (vhaddq_s8): Remove.
25283 (vhaddq_n_s8): Remove.
25284 (vhsubq_u16): Remove.
25285 (vhsubq_n_u16): Remove.
25286 (vhaddq_u16): Remove.
25287 (vhaddq_n_u16): Remove.
25288 (vhsubq_s16): Remove.
25289 (vhsubq_n_s16): Remove.
25290 (vhaddq_s16): Remove.
25291 (vhaddq_n_s16): Remove.
25292 (vhsubq_u32): Remove.
25293 (vhsubq_n_u32): Remove.
25294 (vhaddq_u32): Remove.
25295 (vhaddq_n_u32): Remove.
25296 (vhsubq_s32): Remove.
25297 (vhsubq_n_s32): Remove.
25298 (vhaddq_s32): Remove.
25299 (vhaddq_n_s32): Remove.
25300 (vhaddq_m_n_s8): Remove.
25301 (vhaddq_m_n_s32): Remove.
25302 (vhaddq_m_n_s16): Remove.
25303 (vhaddq_m_n_u8): Remove.
25304 (vhaddq_m_n_u32): Remove.
25305 (vhaddq_m_n_u16): Remove.
25306 (vhaddq_m_s8): Remove.
25307 (vhaddq_m_s32): Remove.
25308 (vhaddq_m_s16): Remove.
25309 (vhaddq_m_u8): Remove.
25310 (vhaddq_m_u32): Remove.
25311 (vhaddq_m_u16): Remove.
25312 (vhsubq_m_n_s8): Remove.
25313 (vhsubq_m_n_s32): Remove.
25314 (vhsubq_m_n_s16): Remove.
25315 (vhsubq_m_n_u8): Remove.
25316 (vhsubq_m_n_u32): Remove.
25317 (vhsubq_m_n_u16): Remove.
25318 (vhsubq_m_s8): Remove.
25319 (vhsubq_m_s32): Remove.
25320 (vhsubq_m_s16): Remove.
25321 (vhsubq_m_u8): Remove.
25322 (vhsubq_m_u32): Remove.
25323 (vhsubq_m_u16): Remove.
25324 (vhaddq_x_n_s8): Remove.
25325 (vhaddq_x_n_s16): Remove.
25326 (vhaddq_x_n_s32): Remove.
25327 (vhaddq_x_n_u8): Remove.
25328 (vhaddq_x_n_u16): Remove.
25329 (vhaddq_x_n_u32): Remove.
25330 (vhaddq_x_s8): Remove.
25331 (vhaddq_x_s16): Remove.
25332 (vhaddq_x_s32): Remove.
25333 (vhaddq_x_u8): Remove.
25334 (vhaddq_x_u16): Remove.
25335 (vhaddq_x_u32): Remove.
25336 (vhsubq_x_n_s8): Remove.
25337 (vhsubq_x_n_s16): Remove.
25338 (vhsubq_x_n_s32): Remove.
25339 (vhsubq_x_n_u8): Remove.
25340 (vhsubq_x_n_u16): Remove.
25341 (vhsubq_x_n_u32): Remove.
25342 (vhsubq_x_s8): Remove.
25343 (vhsubq_x_s16): Remove.
25344 (vhsubq_x_s32): Remove.
25345 (vhsubq_x_u8): Remove.
25346 (vhsubq_x_u16): Remove.
25347 (vhsubq_x_u32): Remove.
25348 (__arm_vhsubq_u8): Remove.
25349 (__arm_vhsubq_n_u8): Remove.
25350 (__arm_vhaddq_u8): Remove.
25351 (__arm_vhaddq_n_u8): Remove.
25352 (__arm_vhsubq_s8): Remove.
25353 (__arm_vhsubq_n_s8): Remove.
25354 (__arm_vhaddq_s8): Remove.
25355 (__arm_vhaddq_n_s8): Remove.
25356 (__arm_vhsubq_u16): Remove.
25357 (__arm_vhsubq_n_u16): Remove.
25358 (__arm_vhaddq_u16): Remove.
25359 (__arm_vhaddq_n_u16): Remove.
25360 (__arm_vhsubq_s16): Remove.
25361 (__arm_vhsubq_n_s16): Remove.
25362 (__arm_vhaddq_s16): Remove.
25363 (__arm_vhaddq_n_s16): Remove.
25364 (__arm_vhsubq_u32): Remove.
25365 (__arm_vhsubq_n_u32): Remove.
25366 (__arm_vhaddq_u32): Remove.
25367 (__arm_vhaddq_n_u32): Remove.
25368 (__arm_vhsubq_s32): Remove.
25369 (__arm_vhsubq_n_s32): Remove.
25370 (__arm_vhaddq_s32): Remove.
25371 (__arm_vhaddq_n_s32): Remove.
25372 (__arm_vhaddq_m_n_s8): Remove.
25373 (__arm_vhaddq_m_n_s32): Remove.
25374 (__arm_vhaddq_m_n_s16): Remove.
25375 (__arm_vhaddq_m_n_u8): Remove.
25376 (__arm_vhaddq_m_n_u32): Remove.
25377 (__arm_vhaddq_m_n_u16): Remove.
25378 (__arm_vhaddq_m_s8): Remove.
25379 (__arm_vhaddq_m_s32): Remove.
25380 (__arm_vhaddq_m_s16): Remove.
25381 (__arm_vhaddq_m_u8): Remove.
25382 (__arm_vhaddq_m_u32): Remove.
25383 (__arm_vhaddq_m_u16): Remove.
25384 (__arm_vhsubq_m_n_s8): Remove.
25385 (__arm_vhsubq_m_n_s32): Remove.
25386 (__arm_vhsubq_m_n_s16): Remove.
25387 (__arm_vhsubq_m_n_u8): Remove.
25388 (__arm_vhsubq_m_n_u32): Remove.
25389 (__arm_vhsubq_m_n_u16): Remove.
25390 (__arm_vhsubq_m_s8): Remove.
25391 (__arm_vhsubq_m_s32): Remove.
25392 (__arm_vhsubq_m_s16): Remove.
25393 (__arm_vhsubq_m_u8): Remove.
25394 (__arm_vhsubq_m_u32): Remove.
25395 (__arm_vhsubq_m_u16): Remove.
25396 (__arm_vhaddq_x_n_s8): Remove.
25397 (__arm_vhaddq_x_n_s16): Remove.
25398 (__arm_vhaddq_x_n_s32): Remove.
25399 (__arm_vhaddq_x_n_u8): Remove.
25400 (__arm_vhaddq_x_n_u16): Remove.
25401 (__arm_vhaddq_x_n_u32): Remove.
25402 (__arm_vhaddq_x_s8): Remove.
25403 (__arm_vhaddq_x_s16): Remove.
25404 (__arm_vhaddq_x_s32): Remove.
25405 (__arm_vhaddq_x_u8): Remove.
25406 (__arm_vhaddq_x_u16): Remove.
25407 (__arm_vhaddq_x_u32): Remove.
25408 (__arm_vhsubq_x_n_s8): Remove.
25409 (__arm_vhsubq_x_n_s16): Remove.
25410 (__arm_vhsubq_x_n_s32): Remove.
25411 (__arm_vhsubq_x_n_u8): Remove.
25412 (__arm_vhsubq_x_n_u16): Remove.
25413 (__arm_vhsubq_x_n_u32): Remove.
25414 (__arm_vhsubq_x_s8): Remove.
25415 (__arm_vhsubq_x_s16): Remove.
25416 (__arm_vhsubq_x_s32): Remove.
25417 (__arm_vhsubq_x_u8): Remove.
25418 (__arm_vhsubq_x_u16): Remove.
25419 (__arm_vhsubq_x_u32): Remove.
25420 (__arm_vhsubq): Remove.
25421 (__arm_vhaddq): Remove.
25422 (__arm_vhaddq_m): Remove.
25423 (__arm_vhsubq_m): Remove.
25424 (__arm_vhaddq_x): Remove.
25425 (__arm_vhsubq_x): Remove.
25427 (vmulhq_m): Remove.
25428 (vmulhq_x): Remove.
25429 (vmulhq_u8): Remove.
25430 (vmulhq_s8): Remove.
25431 (vmulhq_u16): Remove.
25432 (vmulhq_s16): Remove.
25433 (vmulhq_u32): Remove.
25434 (vmulhq_s32): Remove.
25435 (vmulhq_m_s8): Remove.
25436 (vmulhq_m_s32): Remove.
25437 (vmulhq_m_s16): Remove.
25438 (vmulhq_m_u8): Remove.
25439 (vmulhq_m_u32): Remove.
25440 (vmulhq_m_u16): Remove.
25441 (vmulhq_x_s8): Remove.
25442 (vmulhq_x_s16): Remove.
25443 (vmulhq_x_s32): Remove.
25444 (vmulhq_x_u8): Remove.
25445 (vmulhq_x_u16): Remove.
25446 (vmulhq_x_u32): Remove.
25447 (__arm_vmulhq_u8): Remove.
25448 (__arm_vmulhq_s8): Remove.
25449 (__arm_vmulhq_u16): Remove.
25450 (__arm_vmulhq_s16): Remove.
25451 (__arm_vmulhq_u32): Remove.
25452 (__arm_vmulhq_s32): Remove.
25453 (__arm_vmulhq_m_s8): Remove.
25454 (__arm_vmulhq_m_s32): Remove.
25455 (__arm_vmulhq_m_s16): Remove.
25456 (__arm_vmulhq_m_u8): Remove.
25457 (__arm_vmulhq_m_u32): Remove.
25458 (__arm_vmulhq_m_u16): Remove.
25459 (__arm_vmulhq_x_s8): Remove.
25460 (__arm_vmulhq_x_s16): Remove.
25461 (__arm_vmulhq_x_s32): Remove.
25462 (__arm_vmulhq_x_u8): Remove.
25463 (__arm_vmulhq_x_u16): Remove.
25464 (__arm_vmulhq_x_u32): Remove.
25465 (__arm_vmulhq): Remove.
25466 (__arm_vmulhq_m): Remove.
25467 (__arm_vmulhq_x): Remove.
25470 (vqaddq_m): Remove.
25471 (vqsubq_m): Remove.
25472 (vqsubq_u8): Remove.
25473 (vqsubq_n_u8): Remove.
25474 (vqaddq_u8): Remove.
25475 (vqaddq_n_u8): Remove.
25476 (vqsubq_s8): Remove.
25477 (vqsubq_n_s8): Remove.
25478 (vqaddq_s8): Remove.
25479 (vqaddq_n_s8): Remove.
25480 (vqsubq_u16): Remove.
25481 (vqsubq_n_u16): Remove.
25482 (vqaddq_u16): Remove.
25483 (vqaddq_n_u16): Remove.
25484 (vqsubq_s16): Remove.
25485 (vqsubq_n_s16): Remove.
25486 (vqaddq_s16): Remove.
25487 (vqaddq_n_s16): Remove.
25488 (vqsubq_u32): Remove.
25489 (vqsubq_n_u32): Remove.
25490 (vqaddq_u32): Remove.
25491 (vqaddq_n_u32): Remove.
25492 (vqsubq_s32): Remove.
25493 (vqsubq_n_s32): Remove.
25494 (vqaddq_s32): Remove.
25495 (vqaddq_n_s32): Remove.
25496 (vqaddq_m_n_s8): Remove.
25497 (vqaddq_m_n_s32): Remove.
25498 (vqaddq_m_n_s16): Remove.
25499 (vqaddq_m_n_u8): Remove.
25500 (vqaddq_m_n_u32): Remove.
25501 (vqaddq_m_n_u16): Remove.
25502 (vqaddq_m_s8): Remove.
25503 (vqaddq_m_s32): Remove.
25504 (vqaddq_m_s16): Remove.
25505 (vqaddq_m_u8): Remove.
25506 (vqaddq_m_u32): Remove.
25507 (vqaddq_m_u16): Remove.
25508 (vqsubq_m_n_s8): Remove.
25509 (vqsubq_m_n_s32): Remove.
25510 (vqsubq_m_n_s16): Remove.
25511 (vqsubq_m_n_u8): Remove.
25512 (vqsubq_m_n_u32): Remove.
25513 (vqsubq_m_n_u16): Remove.
25514 (vqsubq_m_s8): Remove.
25515 (vqsubq_m_s32): Remove.
25516 (vqsubq_m_s16): Remove.
25517 (vqsubq_m_u8): Remove.
25518 (vqsubq_m_u32): Remove.
25519 (vqsubq_m_u16): Remove.
25520 (__arm_vqsubq_u8): Remove.
25521 (__arm_vqsubq_n_u8): Remove.
25522 (__arm_vqaddq_u8): Remove.
25523 (__arm_vqaddq_n_u8): Remove.
25524 (__arm_vqsubq_s8): Remove.
25525 (__arm_vqsubq_n_s8): Remove.
25526 (__arm_vqaddq_s8): Remove.
25527 (__arm_vqaddq_n_s8): Remove.
25528 (__arm_vqsubq_u16): Remove.
25529 (__arm_vqsubq_n_u16): Remove.
25530 (__arm_vqaddq_u16): Remove.
25531 (__arm_vqaddq_n_u16): Remove.
25532 (__arm_vqsubq_s16): Remove.
25533 (__arm_vqsubq_n_s16): Remove.
25534 (__arm_vqaddq_s16): Remove.
25535 (__arm_vqaddq_n_s16): Remove.
25536 (__arm_vqsubq_u32): Remove.
25537 (__arm_vqsubq_n_u32): Remove.
25538 (__arm_vqaddq_u32): Remove.
25539 (__arm_vqaddq_n_u32): Remove.
25540 (__arm_vqsubq_s32): Remove.
25541 (__arm_vqsubq_n_s32): Remove.
25542 (__arm_vqaddq_s32): Remove.
25543 (__arm_vqaddq_n_s32): Remove.
25544 (__arm_vqaddq_m_n_s8): Remove.
25545 (__arm_vqaddq_m_n_s32): Remove.
25546 (__arm_vqaddq_m_n_s16): Remove.
25547 (__arm_vqaddq_m_n_u8): Remove.
25548 (__arm_vqaddq_m_n_u32): Remove.
25549 (__arm_vqaddq_m_n_u16): Remove.
25550 (__arm_vqaddq_m_s8): Remove.
25551 (__arm_vqaddq_m_s32): Remove.
25552 (__arm_vqaddq_m_s16): Remove.
25553 (__arm_vqaddq_m_u8): Remove.
25554 (__arm_vqaddq_m_u32): Remove.
25555 (__arm_vqaddq_m_u16): Remove.
25556 (__arm_vqsubq_m_n_s8): Remove.
25557 (__arm_vqsubq_m_n_s32): Remove.
25558 (__arm_vqsubq_m_n_s16): Remove.
25559 (__arm_vqsubq_m_n_u8): Remove.
25560 (__arm_vqsubq_m_n_u32): Remove.
25561 (__arm_vqsubq_m_n_u16): Remove.
25562 (__arm_vqsubq_m_s8): Remove.
25563 (__arm_vqsubq_m_s32): Remove.
25564 (__arm_vqsubq_m_s16): Remove.
25565 (__arm_vqsubq_m_u8): Remove.
25566 (__arm_vqsubq_m_u32): Remove.
25567 (__arm_vqsubq_m_u16): Remove.
25568 (__arm_vqsubq): Remove.
25569 (__arm_vqaddq): Remove.
25570 (__arm_vqaddq_m): Remove.
25571 (__arm_vqsubq_m): Remove.
25572 (vqdmulhq): Remove.
25573 (vqdmulhq_m): Remove.
25574 (vqdmulhq_s8): Remove.
25575 (vqdmulhq_n_s8): Remove.
25576 (vqdmulhq_s16): Remove.
25577 (vqdmulhq_n_s16): Remove.
25578 (vqdmulhq_s32): Remove.
25579 (vqdmulhq_n_s32): Remove.
25580 (vqdmulhq_m_n_s8): Remove.
25581 (vqdmulhq_m_n_s32): Remove.
25582 (vqdmulhq_m_n_s16): Remove.
25583 (vqdmulhq_m_s8): Remove.
25584 (vqdmulhq_m_s32): Remove.
25585 (vqdmulhq_m_s16): Remove.
25586 (__arm_vqdmulhq_s8): Remove.
25587 (__arm_vqdmulhq_n_s8): Remove.
25588 (__arm_vqdmulhq_s16): Remove.
25589 (__arm_vqdmulhq_n_s16): Remove.
25590 (__arm_vqdmulhq_s32): Remove.
25591 (__arm_vqdmulhq_n_s32): Remove.
25592 (__arm_vqdmulhq_m_n_s8): Remove.
25593 (__arm_vqdmulhq_m_n_s32): Remove.
25594 (__arm_vqdmulhq_m_n_s16): Remove.
25595 (__arm_vqdmulhq_m_s8): Remove.
25596 (__arm_vqdmulhq_m_s32): Remove.
25597 (__arm_vqdmulhq_m_s16): Remove.
25598 (__arm_vqdmulhq): Remove.
25599 (__arm_vqdmulhq_m): Remove.
25601 (vrhaddq_m): Remove.
25602 (vrhaddq_x): Remove.
25603 (vrhaddq_u8): Remove.
25604 (vrhaddq_s8): Remove.
25605 (vrhaddq_u16): Remove.
25606 (vrhaddq_s16): Remove.
25607 (vrhaddq_u32): Remove.
25608 (vrhaddq_s32): Remove.
25609 (vrhaddq_m_s8): Remove.
25610 (vrhaddq_m_s32): Remove.
25611 (vrhaddq_m_s16): Remove.
25612 (vrhaddq_m_u8): Remove.
25613 (vrhaddq_m_u32): Remove.
25614 (vrhaddq_m_u16): Remove.
25615 (vrhaddq_x_s8): Remove.
25616 (vrhaddq_x_s16): Remove.
25617 (vrhaddq_x_s32): Remove.
25618 (vrhaddq_x_u8): Remove.
25619 (vrhaddq_x_u16): Remove.
25620 (vrhaddq_x_u32): Remove.
25621 (__arm_vrhaddq_u8): Remove.
25622 (__arm_vrhaddq_s8): Remove.
25623 (__arm_vrhaddq_u16): Remove.
25624 (__arm_vrhaddq_s16): Remove.
25625 (__arm_vrhaddq_u32): Remove.
25626 (__arm_vrhaddq_s32): Remove.
25627 (__arm_vrhaddq_m_s8): Remove.
25628 (__arm_vrhaddq_m_s32): Remove.
25629 (__arm_vrhaddq_m_s16): Remove.
25630 (__arm_vrhaddq_m_u8): Remove.
25631 (__arm_vrhaddq_m_u32): Remove.
25632 (__arm_vrhaddq_m_u16): Remove.
25633 (__arm_vrhaddq_x_s8): Remove.
25634 (__arm_vrhaddq_x_s16): Remove.
25635 (__arm_vrhaddq_x_s32): Remove.
25636 (__arm_vrhaddq_x_u8): Remove.
25637 (__arm_vrhaddq_x_u16): Remove.
25638 (__arm_vrhaddq_x_u32): Remove.
25639 (__arm_vrhaddq): Remove.
25640 (__arm_vrhaddq_m): Remove.
25641 (__arm_vrhaddq_x): Remove.
25643 (vrmulhq_m): Remove.
25644 (vrmulhq_x): Remove.
25645 (vrmulhq_u8): Remove.
25646 (vrmulhq_s8): Remove.
25647 (vrmulhq_u16): Remove.
25648 (vrmulhq_s16): Remove.
25649 (vrmulhq_u32): Remove.
25650 (vrmulhq_s32): Remove.
25651 (vrmulhq_m_s8): Remove.
25652 (vrmulhq_m_s32): Remove.
25653 (vrmulhq_m_s16): Remove.
25654 (vrmulhq_m_u8): Remove.
25655 (vrmulhq_m_u32): Remove.
25656 (vrmulhq_m_u16): Remove.
25657 (vrmulhq_x_s8): Remove.
25658 (vrmulhq_x_s16): Remove.
25659 (vrmulhq_x_s32): Remove.
25660 (vrmulhq_x_u8): Remove.
25661 (vrmulhq_x_u16): Remove.
25662 (vrmulhq_x_u32): Remove.
25663 (__arm_vrmulhq_u8): Remove.
25664 (__arm_vrmulhq_s8): Remove.
25665 (__arm_vrmulhq_u16): Remove.
25666 (__arm_vrmulhq_s16): Remove.
25667 (__arm_vrmulhq_u32): Remove.
25668 (__arm_vrmulhq_s32): Remove.
25669 (__arm_vrmulhq_m_s8): Remove.
25670 (__arm_vrmulhq_m_s32): Remove.
25671 (__arm_vrmulhq_m_s16): Remove.
25672 (__arm_vrmulhq_m_u8): Remove.
25673 (__arm_vrmulhq_m_u32): Remove.
25674 (__arm_vrmulhq_m_u16): Remove.
25675 (__arm_vrmulhq_x_s8): Remove.
25676 (__arm_vrmulhq_x_s16): Remove.
25677 (__arm_vrmulhq_x_s32): Remove.
25678 (__arm_vrmulhq_x_u8): Remove.
25679 (__arm_vrmulhq_x_u16): Remove.
25680 (__arm_vrmulhq_x_u32): Remove.
25681 (__arm_vrmulhq): Remove.
25682 (__arm_vrmulhq_m): Remove.
25683 (__arm_vrmulhq_x): Remove.
25685 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25687 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
25688 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
25689 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
25690 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
25691 * config/arm/mve.md (mve_vabdq_<supf><mode>)
25692 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
25693 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
25694 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
25695 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
25696 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
25697 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
25699 (@mve_<mve_insn>q_<supf><mode>): ... this.
25700 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
25701 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
25702 gen_mve_vhaddq / gen_mve_vrhaddq.
25704 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25706 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
25707 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
25708 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
25709 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
25710 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
25711 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
25712 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
25713 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
25714 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
25715 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
25716 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
25717 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
25718 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25720 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25722 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
25723 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
25725 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
25726 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
25727 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
25728 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
25729 (mve_vqsubq_n_<supf><mode>): Merge into ...
25730 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25732 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25734 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
25735 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
25736 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
25737 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
25738 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
25739 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
25740 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
25741 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
25742 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
25743 (mve_vshlq_m_<supf><mode>): Merged into
25744 @mve_<mve_insn>q_m_<supf><mode>.
25745 (mve_vabdq_m_<supf><mode>): Likewise.
25746 (mve_vhaddq_m_<supf><mode>): Likewise.
25747 (mve_vhsubq_m_<supf><mode>): Likewise.
25748 (mve_vmaxq_m_<supf><mode>): Likewise.
25749 (mve_vminq_m_<supf><mode>): Likewise.
25750 (mve_vmulhq_m_<supf><mode>): Likewise.
25751 (mve_vqaddq_m_<supf><mode>): Likewise.
25752 (mve_vqrshlq_m_<supf><mode>): Likewise.
25753 (mve_vqshlq_m_<supf><mode>): Likewise.
25754 (mve_vqsubq_m_<supf><mode>): Likewise.
25755 (mve_vrhaddq_m_<supf><mode>): Likewise.
25756 (mve_vrmulhq_m_<supf><mode>): Likewise.
25757 (mve_vrshlq_m_<supf><mode>): Likewise.
25758 (mve_vqdmladhq_m_s<mode>): Likewise.
25759 (mve_vqdmladhxq_m_s<mode>): Likewise.
25760 (mve_vqdmlsdhq_m_s<mode>): Likewise.
25761 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
25762 (mve_vqdmulhq_m_s<mode>): Likewise.
25763 (mve_vqrdmladhq_m_s<mode>): Likewise.
25764 (mve_vqrdmladhxq_m_s<mode>): Likewise.
25765 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
25766 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
25767 (mve_vqrdmulhq_m_s<mode>): Likewise.
25769 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25771 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
25772 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
25773 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
25774 * config/arm/arm_mve.h (vcreateq_f16): Remove.
25775 (vcreateq_f32): Remove.
25776 (vcreateq_u8): Remove.
25777 (vcreateq_u16): Remove.
25778 (vcreateq_u32): Remove.
25779 (vcreateq_u64): Remove.
25780 (vcreateq_s8): Remove.
25781 (vcreateq_s16): Remove.
25782 (vcreateq_s32): Remove.
25783 (vcreateq_s64): Remove.
25784 (__arm_vcreateq_u8): Remove.
25785 (__arm_vcreateq_u16): Remove.
25786 (__arm_vcreateq_u32): Remove.
25787 (__arm_vcreateq_u64): Remove.
25788 (__arm_vcreateq_s8): Remove.
25789 (__arm_vcreateq_s16): Remove.
25790 (__arm_vcreateq_s32): Remove.
25791 (__arm_vcreateq_s64): Remove.
25792 (__arm_vcreateq_f16): Remove.
25793 (__arm_vcreateq_f32): Remove.
25795 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25797 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
25798 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
25799 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
25800 (@mve_<mve_insn>q_f<mode>): ... this.
25801 (mve_vcreateq_<supf><mode>): Rename into ...
25802 (@mve_<mve_insn>q_<supf><mode>): ... this.
25804 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25806 * config/arm/arm-mve-builtins-shapes.cc (create): New.
25807 * config/arm/arm-mve-builtins-shapes.h: (create): New.
25809 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25811 * config/arm/arm-mve-builtins-functions.h (class
25812 unspec_mve_function_exact_insn): New.
25814 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25816 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
25818 * config/arm/arm-mve-builtins-base.def (vorrq): New.
25819 * config/arm/arm-mve-builtins-base.h (vorrq): New.
25820 * config/arm/arm-mve-builtins.cc
25821 (function_instance::has_inactive_argument): Handle vorrq.
25822 * config/arm/arm_mve.h (vorrq): Remove.
25823 (vorrq_m_n): Remove.
25826 (vorrq_u8): Remove.
25827 (vorrq_s8): Remove.
25828 (vorrq_u16): Remove.
25829 (vorrq_s16): Remove.
25830 (vorrq_u32): Remove.
25831 (vorrq_s32): Remove.
25832 (vorrq_n_u16): Remove.
25833 (vorrq_f16): Remove.
25834 (vorrq_n_s16): Remove.
25835 (vorrq_n_u32): Remove.
25836 (vorrq_f32): Remove.
25837 (vorrq_n_s32): Remove.
25838 (vorrq_m_n_s16): Remove.
25839 (vorrq_m_n_u16): Remove.
25840 (vorrq_m_n_s32): Remove.
25841 (vorrq_m_n_u32): Remove.
25842 (vorrq_m_s8): Remove.
25843 (vorrq_m_s32): Remove.
25844 (vorrq_m_s16): Remove.
25845 (vorrq_m_u8): Remove.
25846 (vorrq_m_u32): Remove.
25847 (vorrq_m_u16): Remove.
25848 (vorrq_m_f32): Remove.
25849 (vorrq_m_f16): Remove.
25850 (vorrq_x_s8): Remove.
25851 (vorrq_x_s16): Remove.
25852 (vorrq_x_s32): Remove.
25853 (vorrq_x_u8): Remove.
25854 (vorrq_x_u16): Remove.
25855 (vorrq_x_u32): Remove.
25856 (vorrq_x_f16): Remove.
25857 (vorrq_x_f32): Remove.
25858 (__arm_vorrq_u8): Remove.
25859 (__arm_vorrq_s8): Remove.
25860 (__arm_vorrq_u16): Remove.
25861 (__arm_vorrq_s16): Remove.
25862 (__arm_vorrq_u32): Remove.
25863 (__arm_vorrq_s32): Remove.
25864 (__arm_vorrq_n_u16): Remove.
25865 (__arm_vorrq_n_s16): Remove.
25866 (__arm_vorrq_n_u32): Remove.
25867 (__arm_vorrq_n_s32): Remove.
25868 (__arm_vorrq_m_n_s16): Remove.
25869 (__arm_vorrq_m_n_u16): Remove.
25870 (__arm_vorrq_m_n_s32): Remove.
25871 (__arm_vorrq_m_n_u32): Remove.
25872 (__arm_vorrq_m_s8): Remove.
25873 (__arm_vorrq_m_s32): Remove.
25874 (__arm_vorrq_m_s16): Remove.
25875 (__arm_vorrq_m_u8): Remove.
25876 (__arm_vorrq_m_u32): Remove.
25877 (__arm_vorrq_m_u16): Remove.
25878 (__arm_vorrq_x_s8): Remove.
25879 (__arm_vorrq_x_s16): Remove.
25880 (__arm_vorrq_x_s32): Remove.
25881 (__arm_vorrq_x_u8): Remove.
25882 (__arm_vorrq_x_u16): Remove.
25883 (__arm_vorrq_x_u32): Remove.
25884 (__arm_vorrq_f16): Remove.
25885 (__arm_vorrq_f32): Remove.
25886 (__arm_vorrq_m_f32): Remove.
25887 (__arm_vorrq_m_f16): Remove.
25888 (__arm_vorrq_x_f16): Remove.
25889 (__arm_vorrq_x_f32): Remove.
25890 (__arm_vorrq): Remove.
25891 (__arm_vorrq_m_n): Remove.
25892 (__arm_vorrq_m): Remove.
25893 (__arm_vorrq_x): Remove.
25895 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25897 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
25898 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
25899 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
25900 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
25902 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25904 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
25905 (vandq,veorq): New.
25906 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
25907 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
25908 * config/arm/arm_mve.h (vandq): Remove.
25911 (vandq_u8): Remove.
25912 (vandq_s8): Remove.
25913 (vandq_u16): Remove.
25914 (vandq_s16): Remove.
25915 (vandq_u32): Remove.
25916 (vandq_s32): Remove.
25917 (vandq_f16): Remove.
25918 (vandq_f32): Remove.
25919 (vandq_m_s8): Remove.
25920 (vandq_m_s32): Remove.
25921 (vandq_m_s16): Remove.
25922 (vandq_m_u8): Remove.
25923 (vandq_m_u32): Remove.
25924 (vandq_m_u16): Remove.
25925 (vandq_m_f32): Remove.
25926 (vandq_m_f16): Remove.
25927 (vandq_x_s8): Remove.
25928 (vandq_x_s16): Remove.
25929 (vandq_x_s32): Remove.
25930 (vandq_x_u8): Remove.
25931 (vandq_x_u16): Remove.
25932 (vandq_x_u32): Remove.
25933 (vandq_x_f16): Remove.
25934 (vandq_x_f32): Remove.
25935 (__arm_vandq_u8): Remove.
25936 (__arm_vandq_s8): Remove.
25937 (__arm_vandq_u16): Remove.
25938 (__arm_vandq_s16): Remove.
25939 (__arm_vandq_u32): Remove.
25940 (__arm_vandq_s32): Remove.
25941 (__arm_vandq_m_s8): Remove.
25942 (__arm_vandq_m_s32): Remove.
25943 (__arm_vandq_m_s16): Remove.
25944 (__arm_vandq_m_u8): Remove.
25945 (__arm_vandq_m_u32): Remove.
25946 (__arm_vandq_m_u16): Remove.
25947 (__arm_vandq_x_s8): Remove.
25948 (__arm_vandq_x_s16): Remove.
25949 (__arm_vandq_x_s32): Remove.
25950 (__arm_vandq_x_u8): Remove.
25951 (__arm_vandq_x_u16): Remove.
25952 (__arm_vandq_x_u32): Remove.
25953 (__arm_vandq_f16): Remove.
25954 (__arm_vandq_f32): Remove.
25955 (__arm_vandq_m_f32): Remove.
25956 (__arm_vandq_m_f16): Remove.
25957 (__arm_vandq_x_f16): Remove.
25958 (__arm_vandq_x_f32): Remove.
25959 (__arm_vandq): Remove.
25960 (__arm_vandq_m): Remove.
25961 (__arm_vandq_x): Remove.
25964 (veorq_u8): Remove.
25965 (veorq_s8): Remove.
25966 (veorq_u16): Remove.
25967 (veorq_s16): Remove.
25968 (veorq_u32): Remove.
25969 (veorq_s32): Remove.
25970 (veorq_f16): Remove.
25971 (veorq_f32): Remove.
25972 (veorq_m_s8): Remove.
25973 (veorq_m_s32): Remove.
25974 (veorq_m_s16): Remove.
25975 (veorq_m_u8): Remove.
25976 (veorq_m_u32): Remove.
25977 (veorq_m_u16): Remove.
25978 (veorq_m_f32): Remove.
25979 (veorq_m_f16): Remove.
25980 (veorq_x_s8): Remove.
25981 (veorq_x_s16): Remove.
25982 (veorq_x_s32): Remove.
25983 (veorq_x_u8): Remove.
25984 (veorq_x_u16): Remove.
25985 (veorq_x_u32): Remove.
25986 (veorq_x_f16): Remove.
25987 (veorq_x_f32): Remove.
25988 (__arm_veorq_u8): Remove.
25989 (__arm_veorq_s8): Remove.
25990 (__arm_veorq_u16): Remove.
25991 (__arm_veorq_s16): Remove.
25992 (__arm_veorq_u32): Remove.
25993 (__arm_veorq_s32): Remove.
25994 (__arm_veorq_m_s8): Remove.
25995 (__arm_veorq_m_s32): Remove.
25996 (__arm_veorq_m_s16): Remove.
25997 (__arm_veorq_m_u8): Remove.
25998 (__arm_veorq_m_u32): Remove.
25999 (__arm_veorq_m_u16): Remove.
26000 (__arm_veorq_x_s8): Remove.
26001 (__arm_veorq_x_s16): Remove.
26002 (__arm_veorq_x_s32): Remove.
26003 (__arm_veorq_x_u8): Remove.
26004 (__arm_veorq_x_u16): Remove.
26005 (__arm_veorq_x_u32): Remove.
26006 (__arm_veorq_f16): Remove.
26007 (__arm_veorq_f32): Remove.
26008 (__arm_veorq_m_f32): Remove.
26009 (__arm_veorq_m_f16): Remove.
26010 (__arm_veorq_x_f16): Remove.
26011 (__arm_veorq_x_f32): Remove.
26012 (__arm_veorq): Remove.
26013 (__arm_veorq_m): Remove.
26014 (__arm_veorq_x): Remove.
26016 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26018 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
26019 (MVE_FP_M_BINARY_LOGIC): New.
26020 (MVE_INT_M_N_BINARY_LOGIC): New.
26021 (MVE_INT_N_BINARY_LOGIC): New.
26022 (mve_insn): Add vand, veor, vorr, vbic.
26023 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
26024 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
26025 (mve_vbicq_m_<supf><mode>): Merge into ...
26026 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
26027 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
26028 (mve_vbicq_m_f<mode>): Merge into ...
26029 (@mve_<mve_insn>q_m_f<mode>): ... this.
26030 (mve_vorrq_n_<supf><mode>)
26031 (mve_vbicq_n_<supf><mode>): Merge into ...
26032 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26033 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
26035 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26037 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26039 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
26040 * config/arm/arm-mve-builtins-shapes.h (binary): New.
26042 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26044 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
26046 (vaddq, vmulq, vsubq): New.
26047 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
26048 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
26049 * config/arm/arm_mve.h (vaddq): Remove.
26052 (vaddq_n_u8): Remove.
26053 (vaddq_n_s8): Remove.
26054 (vaddq_n_u16): Remove.
26055 (vaddq_n_s16): Remove.
26056 (vaddq_n_u32): Remove.
26057 (vaddq_n_s32): Remove.
26058 (vaddq_n_f16): Remove.
26059 (vaddq_n_f32): Remove.
26060 (vaddq_m_n_s8): Remove.
26061 (vaddq_m_n_s32): Remove.
26062 (vaddq_m_n_s16): Remove.
26063 (vaddq_m_n_u8): Remove.
26064 (vaddq_m_n_u32): Remove.
26065 (vaddq_m_n_u16): Remove.
26066 (vaddq_m_s8): Remove.
26067 (vaddq_m_s32): Remove.
26068 (vaddq_m_s16): Remove.
26069 (vaddq_m_u8): Remove.
26070 (vaddq_m_u32): Remove.
26071 (vaddq_m_u16): Remove.
26072 (vaddq_m_f32): Remove.
26073 (vaddq_m_f16): Remove.
26074 (vaddq_m_n_f32): Remove.
26075 (vaddq_m_n_f16): Remove.
26076 (vaddq_s8): Remove.
26077 (vaddq_s16): Remove.
26078 (vaddq_s32): Remove.
26079 (vaddq_u8): Remove.
26080 (vaddq_u16): Remove.
26081 (vaddq_u32): Remove.
26082 (vaddq_f16): Remove.
26083 (vaddq_f32): Remove.
26084 (vaddq_x_s8): Remove.
26085 (vaddq_x_s16): Remove.
26086 (vaddq_x_s32): Remove.
26087 (vaddq_x_n_s8): Remove.
26088 (vaddq_x_n_s16): Remove.
26089 (vaddq_x_n_s32): Remove.
26090 (vaddq_x_u8): Remove.
26091 (vaddq_x_u16): Remove.
26092 (vaddq_x_u32): Remove.
26093 (vaddq_x_n_u8): Remove.
26094 (vaddq_x_n_u16): Remove.
26095 (vaddq_x_n_u32): Remove.
26096 (vaddq_x_f16): Remove.
26097 (vaddq_x_f32): Remove.
26098 (vaddq_x_n_f16): Remove.
26099 (vaddq_x_n_f32): Remove.
26100 (__arm_vaddq_n_u8): Remove.
26101 (__arm_vaddq_n_s8): Remove.
26102 (__arm_vaddq_n_u16): Remove.
26103 (__arm_vaddq_n_s16): Remove.
26104 (__arm_vaddq_n_u32): Remove.
26105 (__arm_vaddq_n_s32): Remove.
26106 (__arm_vaddq_m_n_s8): Remove.
26107 (__arm_vaddq_m_n_s32): Remove.
26108 (__arm_vaddq_m_n_s16): Remove.
26109 (__arm_vaddq_m_n_u8): Remove.
26110 (__arm_vaddq_m_n_u32): Remove.
26111 (__arm_vaddq_m_n_u16): Remove.
26112 (__arm_vaddq_m_s8): Remove.
26113 (__arm_vaddq_m_s32): Remove.
26114 (__arm_vaddq_m_s16): Remove.
26115 (__arm_vaddq_m_u8): Remove.
26116 (__arm_vaddq_m_u32): Remove.
26117 (__arm_vaddq_m_u16): Remove.
26118 (__arm_vaddq_s8): Remove.
26119 (__arm_vaddq_s16): Remove.
26120 (__arm_vaddq_s32): Remove.
26121 (__arm_vaddq_u8): Remove.
26122 (__arm_vaddq_u16): Remove.
26123 (__arm_vaddq_u32): Remove.
26124 (__arm_vaddq_x_s8): Remove.
26125 (__arm_vaddq_x_s16): Remove.
26126 (__arm_vaddq_x_s32): Remove.
26127 (__arm_vaddq_x_n_s8): Remove.
26128 (__arm_vaddq_x_n_s16): Remove.
26129 (__arm_vaddq_x_n_s32): Remove.
26130 (__arm_vaddq_x_u8): Remove.
26131 (__arm_vaddq_x_u16): Remove.
26132 (__arm_vaddq_x_u32): Remove.
26133 (__arm_vaddq_x_n_u8): Remove.
26134 (__arm_vaddq_x_n_u16): Remove.
26135 (__arm_vaddq_x_n_u32): Remove.
26136 (__arm_vaddq_n_f16): Remove.
26137 (__arm_vaddq_n_f32): Remove.
26138 (__arm_vaddq_m_f32): Remove.
26139 (__arm_vaddq_m_f16): Remove.
26140 (__arm_vaddq_m_n_f32): Remove.
26141 (__arm_vaddq_m_n_f16): Remove.
26142 (__arm_vaddq_f16): Remove.
26143 (__arm_vaddq_f32): Remove.
26144 (__arm_vaddq_x_f16): Remove.
26145 (__arm_vaddq_x_f32): Remove.
26146 (__arm_vaddq_x_n_f16): Remove.
26147 (__arm_vaddq_x_n_f32): Remove.
26148 (__arm_vaddq): Remove.
26149 (__arm_vaddq_m): Remove.
26150 (__arm_vaddq_x): Remove.
26154 (vmulq_u8): Remove.
26155 (vmulq_n_u8): Remove.
26156 (vmulq_s8): Remove.
26157 (vmulq_n_s8): Remove.
26158 (vmulq_u16): Remove.
26159 (vmulq_n_u16): Remove.
26160 (vmulq_s16): Remove.
26161 (vmulq_n_s16): Remove.
26162 (vmulq_u32): Remove.
26163 (vmulq_n_u32): Remove.
26164 (vmulq_s32): Remove.
26165 (vmulq_n_s32): Remove.
26166 (vmulq_n_f16): Remove.
26167 (vmulq_f16): Remove.
26168 (vmulq_n_f32): Remove.
26169 (vmulq_f32): Remove.
26170 (vmulq_m_n_s8): Remove.
26171 (vmulq_m_n_s32): Remove.
26172 (vmulq_m_n_s16): Remove.
26173 (vmulq_m_n_u8): Remove.
26174 (vmulq_m_n_u32): Remove.
26175 (vmulq_m_n_u16): Remove.
26176 (vmulq_m_s8): Remove.
26177 (vmulq_m_s32): Remove.
26178 (vmulq_m_s16): Remove.
26179 (vmulq_m_u8): Remove.
26180 (vmulq_m_u32): Remove.
26181 (vmulq_m_u16): Remove.
26182 (vmulq_m_f32): Remove.
26183 (vmulq_m_f16): Remove.
26184 (vmulq_m_n_f32): Remove.
26185 (vmulq_m_n_f16): Remove.
26186 (vmulq_x_s8): Remove.
26187 (vmulq_x_s16): Remove.
26188 (vmulq_x_s32): Remove.
26189 (vmulq_x_n_s8): Remove.
26190 (vmulq_x_n_s16): Remove.
26191 (vmulq_x_n_s32): Remove.
26192 (vmulq_x_u8): Remove.
26193 (vmulq_x_u16): Remove.
26194 (vmulq_x_u32): Remove.
26195 (vmulq_x_n_u8): Remove.
26196 (vmulq_x_n_u16): Remove.
26197 (vmulq_x_n_u32): Remove.
26198 (vmulq_x_f16): Remove.
26199 (vmulq_x_f32): Remove.
26200 (vmulq_x_n_f16): Remove.
26201 (vmulq_x_n_f32): Remove.
26202 (__arm_vmulq_u8): Remove.
26203 (__arm_vmulq_n_u8): Remove.
26204 (__arm_vmulq_s8): Remove.
26205 (__arm_vmulq_n_s8): Remove.
26206 (__arm_vmulq_u16): Remove.
26207 (__arm_vmulq_n_u16): Remove.
26208 (__arm_vmulq_s16): Remove.
26209 (__arm_vmulq_n_s16): Remove.
26210 (__arm_vmulq_u32): Remove.
26211 (__arm_vmulq_n_u32): Remove.
26212 (__arm_vmulq_s32): Remove.
26213 (__arm_vmulq_n_s32): Remove.
26214 (__arm_vmulq_m_n_s8): Remove.
26215 (__arm_vmulq_m_n_s32): Remove.
26216 (__arm_vmulq_m_n_s16): Remove.
26217 (__arm_vmulq_m_n_u8): Remove.
26218 (__arm_vmulq_m_n_u32): Remove.
26219 (__arm_vmulq_m_n_u16): Remove.
26220 (__arm_vmulq_m_s8): Remove.
26221 (__arm_vmulq_m_s32): Remove.
26222 (__arm_vmulq_m_s16): Remove.
26223 (__arm_vmulq_m_u8): Remove.
26224 (__arm_vmulq_m_u32): Remove.
26225 (__arm_vmulq_m_u16): Remove.
26226 (__arm_vmulq_x_s8): Remove.
26227 (__arm_vmulq_x_s16): Remove.
26228 (__arm_vmulq_x_s32): Remove.
26229 (__arm_vmulq_x_n_s8): Remove.
26230 (__arm_vmulq_x_n_s16): Remove.
26231 (__arm_vmulq_x_n_s32): Remove.
26232 (__arm_vmulq_x_u8): Remove.
26233 (__arm_vmulq_x_u16): Remove.
26234 (__arm_vmulq_x_u32): Remove.
26235 (__arm_vmulq_x_n_u8): Remove.
26236 (__arm_vmulq_x_n_u16): Remove.
26237 (__arm_vmulq_x_n_u32): Remove.
26238 (__arm_vmulq_n_f16): Remove.
26239 (__arm_vmulq_f16): Remove.
26240 (__arm_vmulq_n_f32): Remove.
26241 (__arm_vmulq_f32): Remove.
26242 (__arm_vmulq_m_f32): Remove.
26243 (__arm_vmulq_m_f16): Remove.
26244 (__arm_vmulq_m_n_f32): Remove.
26245 (__arm_vmulq_m_n_f16): Remove.
26246 (__arm_vmulq_x_f16): Remove.
26247 (__arm_vmulq_x_f32): Remove.
26248 (__arm_vmulq_x_n_f16): Remove.
26249 (__arm_vmulq_x_n_f32): Remove.
26250 (__arm_vmulq): Remove.
26251 (__arm_vmulq_m): Remove.
26252 (__arm_vmulq_x): Remove.
26256 (vsubq_n_f16): Remove.
26257 (vsubq_n_f32): Remove.
26258 (vsubq_u8): Remove.
26259 (vsubq_n_u8): Remove.
26260 (vsubq_s8): Remove.
26261 (vsubq_n_s8): Remove.
26262 (vsubq_u16): Remove.
26263 (vsubq_n_u16): Remove.
26264 (vsubq_s16): Remove.
26265 (vsubq_n_s16): Remove.
26266 (vsubq_u32): Remove.
26267 (vsubq_n_u32): Remove.
26268 (vsubq_s32): Remove.
26269 (vsubq_n_s32): Remove.
26270 (vsubq_f16): Remove.
26271 (vsubq_f32): Remove.
26272 (vsubq_m_s8): Remove.
26273 (vsubq_m_u8): Remove.
26274 (vsubq_m_s16): Remove.
26275 (vsubq_m_u16): Remove.
26276 (vsubq_m_s32): Remove.
26277 (vsubq_m_u32): Remove.
26278 (vsubq_m_n_s8): Remove.
26279 (vsubq_m_n_s32): Remove.
26280 (vsubq_m_n_s16): Remove.
26281 (vsubq_m_n_u8): Remove.
26282 (vsubq_m_n_u32): Remove.
26283 (vsubq_m_n_u16): Remove.
26284 (vsubq_m_f32): Remove.
26285 (vsubq_m_f16): Remove.
26286 (vsubq_m_n_f32): Remove.
26287 (vsubq_m_n_f16): Remove.
26288 (vsubq_x_s8): Remove.
26289 (vsubq_x_s16): Remove.
26290 (vsubq_x_s32): Remove.
26291 (vsubq_x_n_s8): Remove.
26292 (vsubq_x_n_s16): Remove.
26293 (vsubq_x_n_s32): Remove.
26294 (vsubq_x_u8): Remove.
26295 (vsubq_x_u16): Remove.
26296 (vsubq_x_u32): Remove.
26297 (vsubq_x_n_u8): Remove.
26298 (vsubq_x_n_u16): Remove.
26299 (vsubq_x_n_u32): Remove.
26300 (vsubq_x_f16): Remove.
26301 (vsubq_x_f32): Remove.
26302 (vsubq_x_n_f16): Remove.
26303 (vsubq_x_n_f32): Remove.
26304 (__arm_vsubq_u8): Remove.
26305 (__arm_vsubq_n_u8): Remove.
26306 (__arm_vsubq_s8): Remove.
26307 (__arm_vsubq_n_s8): Remove.
26308 (__arm_vsubq_u16): Remove.
26309 (__arm_vsubq_n_u16): Remove.
26310 (__arm_vsubq_s16): Remove.
26311 (__arm_vsubq_n_s16): Remove.
26312 (__arm_vsubq_u32): Remove.
26313 (__arm_vsubq_n_u32): Remove.
26314 (__arm_vsubq_s32): Remove.
26315 (__arm_vsubq_n_s32): Remove.
26316 (__arm_vsubq_m_s8): Remove.
26317 (__arm_vsubq_m_u8): Remove.
26318 (__arm_vsubq_m_s16): Remove.
26319 (__arm_vsubq_m_u16): Remove.
26320 (__arm_vsubq_m_s32): Remove.
26321 (__arm_vsubq_m_u32): Remove.
26322 (__arm_vsubq_m_n_s8): Remove.
26323 (__arm_vsubq_m_n_s32): Remove.
26324 (__arm_vsubq_m_n_s16): Remove.
26325 (__arm_vsubq_m_n_u8): Remove.
26326 (__arm_vsubq_m_n_u32): Remove.
26327 (__arm_vsubq_m_n_u16): Remove.
26328 (__arm_vsubq_x_s8): Remove.
26329 (__arm_vsubq_x_s16): Remove.
26330 (__arm_vsubq_x_s32): Remove.
26331 (__arm_vsubq_x_n_s8): Remove.
26332 (__arm_vsubq_x_n_s16): Remove.
26333 (__arm_vsubq_x_n_s32): Remove.
26334 (__arm_vsubq_x_u8): Remove.
26335 (__arm_vsubq_x_u16): Remove.
26336 (__arm_vsubq_x_u32): Remove.
26337 (__arm_vsubq_x_n_u8): Remove.
26338 (__arm_vsubq_x_n_u16): Remove.
26339 (__arm_vsubq_x_n_u32): Remove.
26340 (__arm_vsubq_n_f16): Remove.
26341 (__arm_vsubq_n_f32): Remove.
26342 (__arm_vsubq_f16): Remove.
26343 (__arm_vsubq_f32): Remove.
26344 (__arm_vsubq_m_f32): Remove.
26345 (__arm_vsubq_m_f16): Remove.
26346 (__arm_vsubq_m_n_f32): Remove.
26347 (__arm_vsubq_m_n_f16): Remove.
26348 (__arm_vsubq_x_f16): Remove.
26349 (__arm_vsubq_x_f32): Remove.
26350 (__arm_vsubq_x_n_f16): Remove.
26351 (__arm_vsubq_x_n_f32): Remove.
26352 (__arm_vsubq): Remove.
26353 (__arm_vsubq_m): Remove.
26354 (__arm_vsubq_x): Remove.
26355 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
26357 (vmulq_u, vmulq_s, vmulq_f): Remove.
26358 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
26359 (mve_vmulq_<supf><mode>): Remove.
26361 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26363 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
26364 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
26365 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
26367 * config/arm/mve.md
26368 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
26370 (@mve_<mve_insn>q_n_f<mode>): ... this.
26371 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
26372 (mve_vsubq_n_<supf><mode>): Factorize into ...
26373 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26374 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
26376 (mve_<mve_addsubmul>q<mode>): ... this.
26377 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
26379 (mve_<mve_addsubmul>q_f<mode>): ... this.
26380 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
26381 (mve_vsubq_m_<supf><mode>): Factorize into ...
26382 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
26383 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
26384 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
26385 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26386 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
26388 (@mve_<mve_insn>q_m_f<mode>): ... this.
26389 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
26390 (mve_vsubq_m_n_f<mode>): Factorize into ...
26391 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
26393 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26395 * config/arm/arm-mve-builtins-functions.h (class
26396 unspec_based_mve_function_base): New.
26397 (class unspec_based_mve_function_exact_insn): New.
26399 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
26401 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
26402 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
26404 2023-05-03 Murray Steele <murray.steele@arm.com>
26405 Christophe Lyon <christophe.lyon@arm.com>
26407 * config/arm/arm-mve-builtins-base.cc (class
26408 vuninitializedq_impl): New.
26409 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
26410 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
26412 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
26413 * config/arm/arm-mve-builtins-shapes.h (inherent): New
26415 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
26416 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
26417 (__arm_vuninitializedq_u8): Remove.
26418 (__arm_vuninitializedq_u16): Remove.
26419 (__arm_vuninitializedq_u32): Remove.
26420 (__arm_vuninitializedq_u64): Remove.
26421 (__arm_vuninitializedq_s8): Remove.
26422 (__arm_vuninitializedq_s16): Remove.
26423 (__arm_vuninitializedq_s32): Remove.
26424 (__arm_vuninitializedq_s64): Remove.
26425 (__arm_vuninitializedq_f16): Remove.
26426 (__arm_vuninitializedq_f32): Remove.
26428 2023-05-03 Murray Steele <murray.steele@arm.com>
26429 Christophe Lyon <christophe.lyon@arm.com>
26431 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
26432 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
26433 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
26434 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
26435 (parse_type): Likewise.
26436 (parse_signature): Likewise.
26437 (build_one): Likewise.
26438 (build_all): Likewise.
26439 (overloaded_base): New struct.
26440 (unary_convert_def): Likewise.
26441 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
26442 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
26444 (TYPES_reinterpret_unsigned1): Likewise.
26445 (TYPES_reinterpret_integer): Likewise.
26446 (TYPES_reinterpret_integer1): Likewise.
26447 (TYPES_reinterpret_float1): Likewise.
26448 (TYPES_reinterpret_float): Likewise.
26449 (reinterpret_integer): New.
26450 (reinterpret_float): New.
26451 (handle_arm_mve_h): Register builtins.
26452 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
26453 (vreinterpretq_s32): Likewise.
26454 (vreinterpretq_s64): Likewise.
26455 (vreinterpretq_s8): Likewise.
26456 (vreinterpretq_u16): Likewise.
26457 (vreinterpretq_u32): Likewise.
26458 (vreinterpretq_u64): Likewise.
26459 (vreinterpretq_u8): Likewise.
26460 (vreinterpretq_f16): Likewise.
26461 (vreinterpretq_f32): Likewise.
26462 (vreinterpretq_s16_s32): Likewise.
26463 (vreinterpretq_s16_s64): Likewise.
26464 (vreinterpretq_s16_s8): Likewise.
26465 (vreinterpretq_s16_u16): Likewise.
26466 (vreinterpretq_s16_u32): Likewise.
26467 (vreinterpretq_s16_u64): Likewise.
26468 (vreinterpretq_s16_u8): Likewise.
26469 (vreinterpretq_s32_s16): Likewise.
26470 (vreinterpretq_s32_s64): Likewise.
26471 (vreinterpretq_s32_s8): Likewise.
26472 (vreinterpretq_s32_u16): Likewise.
26473 (vreinterpretq_s32_u32): Likewise.
26474 (vreinterpretq_s32_u64): Likewise.
26475 (vreinterpretq_s32_u8): Likewise.
26476 (vreinterpretq_s64_s16): Likewise.
26477 (vreinterpretq_s64_s32): Likewise.
26478 (vreinterpretq_s64_s8): Likewise.
26479 (vreinterpretq_s64_u16): Likewise.
26480 (vreinterpretq_s64_u32): Likewise.
26481 (vreinterpretq_s64_u64): Likewise.
26482 (vreinterpretq_s64_u8): Likewise.
26483 (vreinterpretq_s8_s16): Likewise.
26484 (vreinterpretq_s8_s32): Likewise.
26485 (vreinterpretq_s8_s64): Likewise.
26486 (vreinterpretq_s8_u16): Likewise.
26487 (vreinterpretq_s8_u32): Likewise.
26488 (vreinterpretq_s8_u64): Likewise.
26489 (vreinterpretq_s8_u8): Likewise.
26490 (vreinterpretq_u16_s16): Likewise.
26491 (vreinterpretq_u16_s32): Likewise.
26492 (vreinterpretq_u16_s64): Likewise.
26493 (vreinterpretq_u16_s8): Likewise.
26494 (vreinterpretq_u16_u32): Likewise.
26495 (vreinterpretq_u16_u64): Likewise.
26496 (vreinterpretq_u16_u8): Likewise.
26497 (vreinterpretq_u32_s16): Likewise.
26498 (vreinterpretq_u32_s32): Likewise.
26499 (vreinterpretq_u32_s64): Likewise.
26500 (vreinterpretq_u32_s8): Likewise.
26501 (vreinterpretq_u32_u16): Likewise.
26502 (vreinterpretq_u32_u64): Likewise.
26503 (vreinterpretq_u32_u8): Likewise.
26504 (vreinterpretq_u64_s16): Likewise.
26505 (vreinterpretq_u64_s32): Likewise.
26506 (vreinterpretq_u64_s64): Likewise.
26507 (vreinterpretq_u64_s8): Likewise.
26508 (vreinterpretq_u64_u16): Likewise.
26509 (vreinterpretq_u64_u32): Likewise.
26510 (vreinterpretq_u64_u8): Likewise.
26511 (vreinterpretq_u8_s16): Likewise.
26512 (vreinterpretq_u8_s32): Likewise.
26513 (vreinterpretq_u8_s64): Likewise.
26514 (vreinterpretq_u8_s8): Likewise.
26515 (vreinterpretq_u8_u16): Likewise.
26516 (vreinterpretq_u8_u32): Likewise.
26517 (vreinterpretq_u8_u64): Likewise.
26518 (vreinterpretq_s32_f16): Likewise.
26519 (vreinterpretq_s32_f32): Likewise.
26520 (vreinterpretq_u16_f16): Likewise.
26521 (vreinterpretq_u16_f32): Likewise.
26522 (vreinterpretq_u32_f16): Likewise.
26523 (vreinterpretq_u32_f32): Likewise.
26524 (vreinterpretq_u64_f16): Likewise.
26525 (vreinterpretq_u64_f32): Likewise.
26526 (vreinterpretq_u8_f16): Likewise.
26527 (vreinterpretq_u8_f32): Likewise.
26528 (vreinterpretq_f16_f32): Likewise.
26529 (vreinterpretq_f16_s16): Likewise.
26530 (vreinterpretq_f16_s32): Likewise.
26531 (vreinterpretq_f16_s64): Likewise.
26532 (vreinterpretq_f16_s8): Likewise.
26533 (vreinterpretq_f16_u16): Likewise.
26534 (vreinterpretq_f16_u32): Likewise.
26535 (vreinterpretq_f16_u64): Likewise.
26536 (vreinterpretq_f16_u8): Likewise.
26537 (vreinterpretq_f32_f16): Likewise.
26538 (vreinterpretq_f32_s16): Likewise.
26539 (vreinterpretq_f32_s32): Likewise.
26540 (vreinterpretq_f32_s64): Likewise.
26541 (vreinterpretq_f32_s8): Likewise.
26542 (vreinterpretq_f32_u16): Likewise.
26543 (vreinterpretq_f32_u32): Likewise.
26544 (vreinterpretq_f32_u64): Likewise.
26545 (vreinterpretq_f32_u8): Likewise.
26546 (vreinterpretq_s16_f16): Likewise.
26547 (vreinterpretq_s16_f32): Likewise.
26548 (vreinterpretq_s64_f16): Likewise.
26549 (vreinterpretq_s64_f32): Likewise.
26550 (vreinterpretq_s8_f16): Likewise.
26551 (vreinterpretq_s8_f32): Likewise.
26552 (__arm_vreinterpretq_f16): Likewise.
26553 (__arm_vreinterpretq_f32): Likewise.
26554 (__arm_vreinterpretq_s16): Likewise.
26555 (__arm_vreinterpretq_s32): Likewise.
26556 (__arm_vreinterpretq_s64): Likewise.
26557 (__arm_vreinterpretq_s8): Likewise.
26558 (__arm_vreinterpretq_u16): Likewise.
26559 (__arm_vreinterpretq_u32): Likewise.
26560 (__arm_vreinterpretq_u64): Likewise.
26561 (__arm_vreinterpretq_u8): Likewise.
26562 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
26563 (__arm_vreinterpretq_s16_s64): Likewise.
26564 (__arm_vreinterpretq_s16_s8): Likewise.
26565 (__arm_vreinterpretq_s16_u16): Likewise.
26566 (__arm_vreinterpretq_s16_u32): Likewise.
26567 (__arm_vreinterpretq_s16_u64): Likewise.
26568 (__arm_vreinterpretq_s16_u8): Likewise.
26569 (__arm_vreinterpretq_s32_s16): Likewise.
26570 (__arm_vreinterpretq_s32_s64): Likewise.
26571 (__arm_vreinterpretq_s32_s8): Likewise.
26572 (__arm_vreinterpretq_s32_u16): Likewise.
26573 (__arm_vreinterpretq_s32_u32): Likewise.
26574 (__arm_vreinterpretq_s32_u64): Likewise.
26575 (__arm_vreinterpretq_s32_u8): Likewise.
26576 (__arm_vreinterpretq_s64_s16): Likewise.
26577 (__arm_vreinterpretq_s64_s32): Likewise.
26578 (__arm_vreinterpretq_s64_s8): Likewise.
26579 (__arm_vreinterpretq_s64_u16): Likewise.
26580 (__arm_vreinterpretq_s64_u32): Likewise.
26581 (__arm_vreinterpretq_s64_u64): Likewise.
26582 (__arm_vreinterpretq_s64_u8): Likewise.
26583 (__arm_vreinterpretq_s8_s16): Likewise.
26584 (__arm_vreinterpretq_s8_s32): Likewise.
26585 (__arm_vreinterpretq_s8_s64): Likewise.
26586 (__arm_vreinterpretq_s8_u16): Likewise.
26587 (__arm_vreinterpretq_s8_u32): Likewise.
26588 (__arm_vreinterpretq_s8_u64): Likewise.
26589 (__arm_vreinterpretq_s8_u8): Likewise.
26590 (__arm_vreinterpretq_u16_s16): Likewise.
26591 (__arm_vreinterpretq_u16_s32): Likewise.
26592 (__arm_vreinterpretq_u16_s64): Likewise.
26593 (__arm_vreinterpretq_u16_s8): Likewise.
26594 (__arm_vreinterpretq_u16_u32): Likewise.
26595 (__arm_vreinterpretq_u16_u64): Likewise.
26596 (__arm_vreinterpretq_u16_u8): Likewise.
26597 (__arm_vreinterpretq_u32_s16): Likewise.
26598 (__arm_vreinterpretq_u32_s32): Likewise.
26599 (__arm_vreinterpretq_u32_s64): Likewise.
26600 (__arm_vreinterpretq_u32_s8): Likewise.
26601 (__arm_vreinterpretq_u32_u16): Likewise.
26602 (__arm_vreinterpretq_u32_u64): Likewise.
26603 (__arm_vreinterpretq_u32_u8): Likewise.
26604 (__arm_vreinterpretq_u64_s16): Likewise.
26605 (__arm_vreinterpretq_u64_s32): Likewise.
26606 (__arm_vreinterpretq_u64_s64): Likewise.
26607 (__arm_vreinterpretq_u64_s8): Likewise.
26608 (__arm_vreinterpretq_u64_u16): Likewise.
26609 (__arm_vreinterpretq_u64_u32): Likewise.
26610 (__arm_vreinterpretq_u64_u8): Likewise.
26611 (__arm_vreinterpretq_u8_s16): Likewise.
26612 (__arm_vreinterpretq_u8_s32): Likewise.
26613 (__arm_vreinterpretq_u8_s64): Likewise.
26614 (__arm_vreinterpretq_u8_s8): Likewise.
26615 (__arm_vreinterpretq_u8_u16): Likewise.
26616 (__arm_vreinterpretq_u8_u32): Likewise.
26617 (__arm_vreinterpretq_u8_u64): Likewise.
26618 (__arm_vreinterpretq_s32_f16): Likewise.
26619 (__arm_vreinterpretq_s32_f32): Likewise.
26620 (__arm_vreinterpretq_s16_f16): Likewise.
26621 (__arm_vreinterpretq_s16_f32): Likewise.
26622 (__arm_vreinterpretq_s64_f16): Likewise.
26623 (__arm_vreinterpretq_s64_f32): Likewise.
26624 (__arm_vreinterpretq_s8_f16): Likewise.
26625 (__arm_vreinterpretq_s8_f32): Likewise.
26626 (__arm_vreinterpretq_u16_f16): Likewise.
26627 (__arm_vreinterpretq_u16_f32): Likewise.
26628 (__arm_vreinterpretq_u32_f16): Likewise.
26629 (__arm_vreinterpretq_u32_f32): Likewise.
26630 (__arm_vreinterpretq_u64_f16): Likewise.
26631 (__arm_vreinterpretq_u64_f32): Likewise.
26632 (__arm_vreinterpretq_u8_f16): Likewise.
26633 (__arm_vreinterpretq_u8_f32): Likewise.
26634 (__arm_vreinterpretq_f16_f32): Likewise.
26635 (__arm_vreinterpretq_f16_s16): Likewise.
26636 (__arm_vreinterpretq_f16_s32): Likewise.
26637 (__arm_vreinterpretq_f16_s64): Likewise.
26638 (__arm_vreinterpretq_f16_s8): Likewise.
26639 (__arm_vreinterpretq_f16_u16): Likewise.
26640 (__arm_vreinterpretq_f16_u32): Likewise.
26641 (__arm_vreinterpretq_f16_u64): Likewise.
26642 (__arm_vreinterpretq_f16_u8): Likewise.
26643 (__arm_vreinterpretq_f32_f16): Likewise.
26644 (__arm_vreinterpretq_f32_s16): Likewise.
26645 (__arm_vreinterpretq_f32_s32): Likewise.
26646 (__arm_vreinterpretq_f32_s64): Likewise.
26647 (__arm_vreinterpretq_f32_s8): Likewise.
26648 (__arm_vreinterpretq_f32_u16): Likewise.
26649 (__arm_vreinterpretq_f32_u32): Likewise.
26650 (__arm_vreinterpretq_f32_u64): Likewise.
26651 (__arm_vreinterpretq_f32_u8): Likewise.
26652 (__arm_vreinterpretq_s16): Likewise.
26653 (__arm_vreinterpretq_s32): Likewise.
26654 (__arm_vreinterpretq_s64): Likewise.
26655 (__arm_vreinterpretq_s8): Likewise.
26656 (__arm_vreinterpretq_u16): Likewise.
26657 (__arm_vreinterpretq_u32): Likewise.
26658 (__arm_vreinterpretq_u64): Likewise.
26659 (__arm_vreinterpretq_u8): Likewise.
26660 (__arm_vreinterpretq_f16): Likewise.
26661 (__arm_vreinterpretq_f32): Likewise.
26662 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
26663 * config/arm/unspecs.md: (REINTERPRET): New unspec.
26665 2023-05-03 Murray Steele <murray.steele@arm.com>
26666 Christophe Lyon <christophe.lyon@arm.com>
26667 Christophe Lyon <christophe.lyon@arm.com
26669 * config.gcc: Add arm-mve-builtins-base.o and
26670 arm-mve-builtins-shapes.o to extra_objs.
26671 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
26673 (arm_expand_builtin): Likewise
26674 (arm_check_builtin_call): Likewise
26675 (arm_describe_resolver): Likewise.
26676 * config/arm/arm-builtins.h (enum resolver_ident): Add
26678 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
26679 (arm_resolve_overloaded_builtin): Handle MVE builtins.
26680 (arm_register_target_pragmas): Register arm_check_builtin_call.
26681 * config/arm/arm-mve-builtins.cc (class registered_function): New
26683 (struct registered_function_hasher): New struct.
26684 (pred_suffixes): New table.
26685 (mode_suffixes): New table.
26686 (type_suffix_info): New table.
26687 (TYPES_float16): New.
26688 (TYPES_all_float): New.
26689 (TYPES_integer_8): New.
26690 (TYPES_integer_8_16): New.
26691 (TYPES_integer_16_32): New.
26692 (TYPES_integer_32): New.
26693 (TYPES_signed_16_32): New.
26694 (TYPES_signed_32): New.
26695 (TYPES_all_signed): New.
26696 (TYPES_all_unsigned): New.
26697 (TYPES_all_integer): New.
26698 (TYPES_all_integer_with_64): New.
26699 (DEF_VECTOR_TYPE): New.
26700 (DEF_DOUBLE_TYPE): New.
26701 (DEF_MVE_TYPES_ARRAY): New.
26702 (all_integer): New.
26703 (all_integer_with_64): New.
26707 (all_unsigned): New.
26709 (integer_8_16): New.
26710 (integer_16_32): New.
26712 (signed_16_32): New.
26714 (register_vector_type): Use void_type_node for mve.fp-only types when
26715 mve.fp is not enabled.
26716 (register_builtin_tuple_types): Likewise.
26717 (handle_arm_mve_h): New function..
26718 (matches_type_p): Likewise..
26719 (report_out_of_range): Likewise.
26720 (report_not_enum): Likewise.
26721 (report_missing_float): Likewise.
26722 (report_non_ice): Likewise.
26723 (check_requires_float): Likewise.
26724 (function_instance::hash): Likewise
26725 (function_instance::call_properties): Likewise.
26726 (function_instance::reads_global_state_p): Likewise.
26727 (function_instance::modifies_global_state_p): Likewise.
26728 (function_instance::could_trap_p): Likewise.
26729 (function_instance::has_inactive_argument): Likewise.
26730 (registered_function_hasher::hash): Likewise.
26731 (registered_function_hasher::equal): Likewise.
26732 (function_builder::function_builder): Likewise.
26733 (function_builder::~function_builder): Likewise.
26734 (function_builder::append_name): Likewise.
26735 (function_builder::finish_name): Likewise.
26736 (function_builder::get_name): Likewise.
26737 (add_attribute): Likewise.
26738 (function_builder::get_attributes): Likewise.
26739 (function_builder::add_function): Likewise.
26740 (function_builder::add_unique_function): Likewise.
26741 (function_builder::add_overloaded_function): Likewise.
26742 (function_builder::add_overloaded_functions): Likewise.
26743 (function_builder::register_function_group): Likewise.
26744 (function_call_info::function_call_info): Likewise.
26745 (function_resolver::function_resolver): Likewise.
26746 (function_resolver::get_vector_type): Likewise.
26747 (function_resolver::get_scalar_type_name): Likewise.
26748 (function_resolver::get_argument_type): Likewise.
26749 (function_resolver::scalar_argument_p): Likewise.
26750 (function_resolver::report_no_such_form): Likewise.
26751 (function_resolver::lookup_form): Likewise.
26752 (function_resolver::resolve_to): Likewise.
26753 (function_resolver::infer_vector_or_tuple_type): Likewise.
26754 (function_resolver::infer_vector_type): Likewise.
26755 (function_resolver::require_vector_or_scalar_type): Likewise.
26756 (function_resolver::require_vector_type): Likewise.
26757 (function_resolver::require_matching_vector_type): Likewise.
26758 (function_resolver::require_derived_vector_type): Likewise.
26759 (function_resolver::require_derived_scalar_type): Likewise.
26760 (function_resolver::require_integer_immediate): Likewise.
26761 (function_resolver::require_scalar_type): Likewise.
26762 (function_resolver::check_num_arguments): Likewise.
26763 (function_resolver::check_gp_argument): Likewise.
26764 (function_resolver::finish_opt_n_resolution): Likewise.
26765 (function_resolver::resolve_unary): Likewise.
26766 (function_resolver::resolve_unary_n): Likewise.
26767 (function_resolver::resolve_uniform): Likewise.
26768 (function_resolver::resolve_uniform_opt_n): Likewise.
26769 (function_resolver::resolve): Likewise.
26770 (function_checker::function_checker): Likewise.
26771 (function_checker::argument_exists_p): Likewise.
26772 (function_checker::require_immediate): Likewise.
26773 (function_checker::require_immediate_enum): Likewise.
26774 (function_checker::require_immediate_range): Likewise.
26775 (function_checker::check): Likewise.
26776 (gimple_folder::gimple_folder): Likewise.
26777 (gimple_folder::fold): Likewise.
26778 (function_expander::function_expander): Likewise.
26779 (function_expander::direct_optab_handler): Likewise.
26780 (function_expander::get_fallback_value): Likewise.
26781 (function_expander::get_reg_target): Likewise.
26782 (function_expander::add_output_operand): Likewise.
26783 (function_expander::add_input_operand): Likewise.
26784 (function_expander::add_integer_operand): Likewise.
26785 (function_expander::generate_insn): Likewise.
26786 (function_expander::use_exact_insn): Likewise.
26787 (function_expander::use_unpred_insn): Likewise.
26788 (function_expander::use_pred_x_insn): Likewise.
26789 (function_expander::use_cond_insn): Likewise.
26790 (function_expander::map_to_rtx_codes): Likewise.
26791 (function_expander::expand): Likewise.
26792 (resolve_overloaded_builtin): Likewise.
26793 (check_builtin_call): Likewise.
26794 (gimple_fold_builtin): Likewise.
26795 (expand_builtin): Likewise.
26796 (gt_ggc_mx): Likewise.
26797 (gt_pch_nx): Likewise.
26798 (gt_pch_nx): Likewise.
26799 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
26810 (offset): New mode.
26811 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
26812 (CP_READ_FPCR): Likewise.
26813 (CP_RAISE_FP_EXCEPTIONS): Likewise.
26814 (CP_READ_MEMORY): Likewise.
26815 (CP_WRITE_MEMORY): Likewise.
26816 (enum units_index): New enum.
26817 (enum predication_index): New.
26818 (enum type_class_index): New.
26819 (enum mode_suffix_index): New enum.
26820 (enum type_suffix_index): New.
26821 (struct mode_suffix_info): New struct.
26822 (struct type_suffix_info): New.
26823 (struct function_group_info): Likewise.
26824 (class function_instance): Likewise.
26825 (class registered_function): Likewise.
26826 (class function_builder): Likewise.
26827 (class function_call_info): Likewise.
26828 (class function_resolver): Likewise.
26829 (class function_checker): Likewise.
26830 (class gimple_folder): Likewise.
26831 (class function_expander): Likewise.
26832 (get_mve_pred16_t): Likewise.
26833 (find_mode_suffix): New function.
26834 (class function_base): Likewise.
26835 (class function_shape): Likewise.
26836 (function_instance::operator==): New function.
26837 (function_instance::operator!=): Likewise.
26838 (function_instance::vectors_per_tuple): Likewise.
26839 (function_instance::mode_suffix): Likewise.
26840 (function_instance::type_suffix): Likewise.
26841 (function_instance::scalar_type): Likewise.
26842 (function_instance::vector_type): Likewise.
26843 (function_instance::tuple_type): Likewise.
26844 (function_instance::vector_mode): Likewise.
26845 (function_call_info::function_returns_void_p): Likewise.
26846 (function_base::call_properties): Likewise.
26847 * config/arm/arm-protos.h (enum arm_builtin_class): Add
26849 (handle_arm_mve_h): New.
26850 (resolve_overloaded_builtin): New.
26851 (check_builtin_call): New.
26852 (gimple_fold_builtin): New.
26853 (expand_builtin): New.
26854 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
26855 arm_gimple_fold_builtin.
26856 (arm_gimple_fold_builtin): New function.
26857 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
26858 * config/arm/predicates.md (arm_any_register_operand): New predicate.
26859 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
26860 (arm-mve-builtins-shapes.o): New target.
26861 (arm-mve-builtins-base.o): New target.
26862 * config/arm/arm-mve-builtins-base.cc: New file.
26863 * config/arm/arm-mve-builtins-base.def: New file.
26864 * config/arm/arm-mve-builtins-base.h: New file.
26865 * config/arm/arm-mve-builtins-functions.h: New file.
26866 * config/arm/arm-mve-builtins-shapes.cc: New file.
26867 * config/arm/arm-mve-builtins-shapes.h: New file.
26869 2023-05-03 Murray Steele <murray.steele@arm.com>
26870 Christophe Lyon <christophe.lyon@arm.com>
26871 Christophe Lyon <christophe.lyon@arm.com>
26873 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
26875 (arm_init_builtin): Use arm_general_add_builtin_function instead
26876 of arm_add_builtin_function.
26877 (arm_init_acle_builtins): Likewise.
26878 (arm_init_mve_builtins): Likewise.
26879 (arm_init_crypto_builtins): Likewise.
26880 (arm_init_builtins): Likewise.
26881 (arm_general_builtin_decl): New function.
26882 (arm_builtin_decl): Defer to numberspace-specialized functions.
26883 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
26884 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
26885 (arm_general_expand_builtin_1): ... specialize for general builtins.
26886 (arm_expand_acle_builtin): Use arm_general_expand_builtin
26887 instead of arm_expand_builtin.
26888 (arm_expand_mve_builtin): Likewise.
26889 (arm_expand_neon_builtin): Likewise.
26890 (arm_expand_vfp_builtin): Likewise.
26891 (arm_general_expand_builtin): New function.
26892 (arm_expand_builtin): Specialize for general builtins.
26893 (arm_general_check_builtin_call): New function.
26894 (arm_check_builtin_call): Specialize for general builtins.
26895 (arm_describe_resolver): Validate numberspace.
26896 (arm_cde_end_args): Likewise.
26897 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
26898 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
26900 2023-05-03 Martin Liska <mliska@suse.cz>
26903 * config/riscv/sync.md: Add gcc_unreachable to a switch.
26905 2023-05-03 Richard Biener <rguenther@suse.de>
26907 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
26908 (patch_loop_exit): Likewise.
26909 (connect_loops): Likewise.
26910 (split_loop): Likewise.
26911 (control_dep_semi_invariant_p): Likewise.
26912 (do_split_loop_on_cond): Likewise.
26913 (split_loop_on_cond): Likewise.
26914 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
26916 (simplify_loop_version): Likewise.
26917 (evaluate_bbs): Likewise.
26918 (find_loop_guard): Likewise.
26919 (clean_up_after_unswitching): Likewise.
26920 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
26922 (optimize_spaceship): Take a gcond * argument, avoid
26924 (math_opts_dom_walker::after_dom_children): Adjust call to
26925 optimize_spaceship.
26926 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
26927 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
26930 2023-05-03 Andreas Schwab <schwab@suse.de>
26932 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
26934 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26936 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
26938 (class vlseg): New class.
26939 (class vsseg): Ditto.
26940 (class vlsseg): Ditto.
26941 (class vssseg): Ditto.
26942 (class seg_indexed_load): Ditto.
26943 (class seg_indexed_store): Ditto.
26944 (class vlsegff): Ditto.
26946 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
26947 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
26957 * config/riscv/riscv-vector-builtins-shapes.cc (struct
26958 seg_loadstore_def): Ditto.
26959 (struct seg_indexed_loadstore_def): Ditto.
26960 (struct seg_fault_load_def): Ditto.
26962 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
26963 * config/riscv/riscv-vector-builtins.cc
26964 (function_builder::append_nf): New function.
26965 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
26966 Change ptr from double into float.
26967 (vfloat32m1x3_t): Ditto.
26968 (vfloat32m1x4_t): Ditto.
26969 (vfloat32m1x5_t): Ditto.
26970 (vfloat32m1x6_t): Ditto.
26971 (vfloat32m1x7_t): Ditto.
26972 (vfloat32m1x8_t): Ditto.
26973 (vfloat32m2x2_t): Ditto.
26974 (vfloat32m2x3_t): Ditto.
26975 (vfloat32m2x4_t): Ditto.
26976 (vfloat32m4x2_t): Ditto.
26977 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
26978 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
26980 * config/riscv/riscv.md: Add segment instructions.
26981 * config/riscv/vector-iterators.md: Support segment intrinsics.
26982 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
26984 (@pred_unit_strided_store<mode>): Ditto.
26985 (@pred_strided_load<mode>): Ditto.
26986 (@pred_strided_store<mode>): Ditto.
26987 (@pred_fault_load<mode>): Ditto.
26988 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
26989 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
26990 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
26991 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
26992 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
26993 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
26994 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
26995 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
26996 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
26997 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
26998 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
26999 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
27000 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
27001 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
27003 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27005 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
27006 tuple type support.
27008 (floattype): Ditto.
27010 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
27011 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
27013 (vget): Add tuple type vget.
27014 * config/riscv/riscv-vector-builtins-types.def
27015 (DEF_RVV_TUPLE_OPS): New macro.
27016 (vint8mf8x2_t): Ditto.
27017 (vuint8mf8x2_t): Ditto.
27018 (vint8mf8x3_t): Ditto.
27019 (vuint8mf8x3_t): Ditto.
27020 (vint8mf8x4_t): Ditto.
27021 (vuint8mf8x4_t): Ditto.
27022 (vint8mf8x5_t): Ditto.
27023 (vuint8mf8x5_t): Ditto.
27024 (vint8mf8x6_t): Ditto.
27025 (vuint8mf8x6_t): Ditto.
27026 (vint8mf8x7_t): Ditto.
27027 (vuint8mf8x7_t): Ditto.
27028 (vint8mf8x8_t): Ditto.
27029 (vuint8mf8x8_t): Ditto.
27030 (vint8mf4x2_t): Ditto.
27031 (vuint8mf4x2_t): Ditto.
27032 (vint8mf4x3_t): Ditto.
27033 (vuint8mf4x3_t): Ditto.
27034 (vint8mf4x4_t): Ditto.
27035 (vuint8mf4x4_t): Ditto.
27036 (vint8mf4x5_t): Ditto.
27037 (vuint8mf4x5_t): Ditto.
27038 (vint8mf4x6_t): Ditto.
27039 (vuint8mf4x6_t): Ditto.
27040 (vint8mf4x7_t): Ditto.
27041 (vuint8mf4x7_t): Ditto.
27042 (vint8mf4x8_t): Ditto.
27043 (vuint8mf4x8_t): Ditto.
27044 (vint8mf2x2_t): Ditto.
27045 (vuint8mf2x2_t): Ditto.
27046 (vint8mf2x3_t): Ditto.
27047 (vuint8mf2x3_t): Ditto.
27048 (vint8mf2x4_t): Ditto.
27049 (vuint8mf2x4_t): Ditto.
27050 (vint8mf2x5_t): Ditto.
27051 (vuint8mf2x5_t): Ditto.
27052 (vint8mf2x6_t): Ditto.
27053 (vuint8mf2x6_t): Ditto.
27054 (vint8mf2x7_t): Ditto.
27055 (vuint8mf2x7_t): Ditto.
27056 (vint8mf2x8_t): Ditto.
27057 (vuint8mf2x8_t): Ditto.
27058 (vint8m1x2_t): Ditto.
27059 (vuint8m1x2_t): Ditto.
27060 (vint8m1x3_t): Ditto.
27061 (vuint8m1x3_t): Ditto.
27062 (vint8m1x4_t): Ditto.
27063 (vuint8m1x4_t): Ditto.
27064 (vint8m1x5_t): Ditto.
27065 (vuint8m1x5_t): Ditto.
27066 (vint8m1x6_t): Ditto.
27067 (vuint8m1x6_t): Ditto.
27068 (vint8m1x7_t): Ditto.
27069 (vuint8m1x7_t): Ditto.
27070 (vint8m1x8_t): Ditto.
27071 (vuint8m1x8_t): Ditto.
27072 (vint8m2x2_t): Ditto.
27073 (vuint8m2x2_t): Ditto.
27074 (vint8m2x3_t): Ditto.
27075 (vuint8m2x3_t): Ditto.
27076 (vint8m2x4_t): Ditto.
27077 (vuint8m2x4_t): Ditto.
27078 (vint8m4x2_t): Ditto.
27079 (vuint8m4x2_t): Ditto.
27080 (vint16mf4x2_t): Ditto.
27081 (vuint16mf4x2_t): Ditto.
27082 (vint16mf4x3_t): Ditto.
27083 (vuint16mf4x3_t): Ditto.
27084 (vint16mf4x4_t): Ditto.
27085 (vuint16mf4x4_t): Ditto.
27086 (vint16mf4x5_t): Ditto.
27087 (vuint16mf4x5_t): Ditto.
27088 (vint16mf4x6_t): Ditto.
27089 (vuint16mf4x6_t): Ditto.
27090 (vint16mf4x7_t): Ditto.
27091 (vuint16mf4x7_t): Ditto.
27092 (vint16mf4x8_t): Ditto.
27093 (vuint16mf4x8_t): Ditto.
27094 (vint16mf2x2_t): Ditto.
27095 (vuint16mf2x2_t): Ditto.
27096 (vint16mf2x3_t): Ditto.
27097 (vuint16mf2x3_t): Ditto.
27098 (vint16mf2x4_t): Ditto.
27099 (vuint16mf2x4_t): Ditto.
27100 (vint16mf2x5_t): Ditto.
27101 (vuint16mf2x5_t): Ditto.
27102 (vint16mf2x6_t): Ditto.
27103 (vuint16mf2x6_t): Ditto.
27104 (vint16mf2x7_t): Ditto.
27105 (vuint16mf2x7_t): Ditto.
27106 (vint16mf2x8_t): Ditto.
27107 (vuint16mf2x8_t): Ditto.
27108 (vint16m1x2_t): Ditto.
27109 (vuint16m1x2_t): Ditto.
27110 (vint16m1x3_t): Ditto.
27111 (vuint16m1x3_t): Ditto.
27112 (vint16m1x4_t): Ditto.
27113 (vuint16m1x4_t): Ditto.
27114 (vint16m1x5_t): Ditto.
27115 (vuint16m1x5_t): Ditto.
27116 (vint16m1x6_t): Ditto.
27117 (vuint16m1x6_t): Ditto.
27118 (vint16m1x7_t): Ditto.
27119 (vuint16m1x7_t): Ditto.
27120 (vint16m1x8_t): Ditto.
27121 (vuint16m1x8_t): Ditto.
27122 (vint16m2x2_t): Ditto.
27123 (vuint16m2x2_t): Ditto.
27124 (vint16m2x3_t): Ditto.
27125 (vuint16m2x3_t): Ditto.
27126 (vint16m2x4_t): Ditto.
27127 (vuint16m2x4_t): Ditto.
27128 (vint16m4x2_t): Ditto.
27129 (vuint16m4x2_t): Ditto.
27130 (vint32mf2x2_t): Ditto.
27131 (vuint32mf2x2_t): Ditto.
27132 (vint32mf2x3_t): Ditto.
27133 (vuint32mf2x3_t): Ditto.
27134 (vint32mf2x4_t): Ditto.
27135 (vuint32mf2x4_t): Ditto.
27136 (vint32mf2x5_t): Ditto.
27137 (vuint32mf2x5_t): Ditto.
27138 (vint32mf2x6_t): Ditto.
27139 (vuint32mf2x6_t): Ditto.
27140 (vint32mf2x7_t): Ditto.
27141 (vuint32mf2x7_t): Ditto.
27142 (vint32mf2x8_t): Ditto.
27143 (vuint32mf2x8_t): Ditto.
27144 (vint32m1x2_t): Ditto.
27145 (vuint32m1x2_t): Ditto.
27146 (vint32m1x3_t): Ditto.
27147 (vuint32m1x3_t): Ditto.
27148 (vint32m1x4_t): Ditto.
27149 (vuint32m1x4_t): Ditto.
27150 (vint32m1x5_t): Ditto.
27151 (vuint32m1x5_t): Ditto.
27152 (vint32m1x6_t): Ditto.
27153 (vuint32m1x6_t): Ditto.
27154 (vint32m1x7_t): Ditto.
27155 (vuint32m1x7_t): Ditto.
27156 (vint32m1x8_t): Ditto.
27157 (vuint32m1x8_t): Ditto.
27158 (vint32m2x2_t): Ditto.
27159 (vuint32m2x2_t): Ditto.
27160 (vint32m2x3_t): Ditto.
27161 (vuint32m2x3_t): Ditto.
27162 (vint32m2x4_t): Ditto.
27163 (vuint32m2x4_t): Ditto.
27164 (vint32m4x2_t): Ditto.
27165 (vuint32m4x2_t): Ditto.
27166 (vint64m1x2_t): Ditto.
27167 (vuint64m1x2_t): Ditto.
27168 (vint64m1x3_t): Ditto.
27169 (vuint64m1x3_t): Ditto.
27170 (vint64m1x4_t): Ditto.
27171 (vuint64m1x4_t): Ditto.
27172 (vint64m1x5_t): Ditto.
27173 (vuint64m1x5_t): Ditto.
27174 (vint64m1x6_t): Ditto.
27175 (vuint64m1x6_t): Ditto.
27176 (vint64m1x7_t): Ditto.
27177 (vuint64m1x7_t): Ditto.
27178 (vint64m1x8_t): Ditto.
27179 (vuint64m1x8_t): Ditto.
27180 (vint64m2x2_t): Ditto.
27181 (vuint64m2x2_t): Ditto.
27182 (vint64m2x3_t): Ditto.
27183 (vuint64m2x3_t): Ditto.
27184 (vint64m2x4_t): Ditto.
27185 (vuint64m2x4_t): Ditto.
27186 (vint64m4x2_t): Ditto.
27187 (vuint64m4x2_t): Ditto.
27188 (vfloat32mf2x2_t): Ditto.
27189 (vfloat32mf2x3_t): Ditto.
27190 (vfloat32mf2x4_t): Ditto.
27191 (vfloat32mf2x5_t): Ditto.
27192 (vfloat32mf2x6_t): Ditto.
27193 (vfloat32mf2x7_t): Ditto.
27194 (vfloat32mf2x8_t): Ditto.
27195 (vfloat32m1x2_t): Ditto.
27196 (vfloat32m1x3_t): Ditto.
27197 (vfloat32m1x4_t): Ditto.
27198 (vfloat32m1x5_t): Ditto.
27199 (vfloat32m1x6_t): Ditto.
27200 (vfloat32m1x7_t): Ditto.
27201 (vfloat32m1x8_t): Ditto.
27202 (vfloat32m2x2_t): Ditto.
27203 (vfloat32m2x3_t): Ditto.
27204 (vfloat32m2x4_t): Ditto.
27205 (vfloat32m4x2_t): Ditto.
27206 (vfloat64m1x2_t): Ditto.
27207 (vfloat64m1x3_t): Ditto.
27208 (vfloat64m1x4_t): Ditto.
27209 (vfloat64m1x5_t): Ditto.
27210 (vfloat64m1x6_t): Ditto.
27211 (vfloat64m1x7_t): Ditto.
27212 (vfloat64m1x8_t): Ditto.
27213 (vfloat64m2x2_t): Ditto.
27214 (vfloat64m2x3_t): Ditto.
27215 (vfloat64m2x4_t): Ditto.
27216 (vfloat64m4x2_t): Ditto.
27217 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
27219 (DEF_RVV_TYPE_INDEX): Ditto.
27220 (rvv_arg_type_info::get_tuple_subpart_type): New function.
27221 (DEF_RVV_TUPLE_TYPE): New macro.
27222 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
27223 Adapt for tuple vget/vset support.
27224 (vint8mf4_t): Ditto.
27225 (vuint8mf4_t): Ditto.
27226 (vint8mf2_t): Ditto.
27227 (vuint8mf2_t): Ditto.
27228 (vint8m1_t): Ditto.
27229 (vuint8m1_t): Ditto.
27230 (vint8m2_t): Ditto.
27231 (vuint8m2_t): Ditto.
27232 (vint8m4_t): Ditto.
27233 (vuint8m4_t): Ditto.
27234 (vint8m8_t): Ditto.
27235 (vuint8m8_t): Ditto.
27236 (vint16mf4_t): Ditto.
27237 (vuint16mf4_t): Ditto.
27238 (vint16mf2_t): Ditto.
27239 (vuint16mf2_t): Ditto.
27240 (vint16m1_t): Ditto.
27241 (vuint16m1_t): Ditto.
27242 (vint16m2_t): Ditto.
27243 (vuint16m2_t): Ditto.
27244 (vint16m4_t): Ditto.
27245 (vuint16m4_t): Ditto.
27246 (vint16m8_t): Ditto.
27247 (vuint16m8_t): Ditto.
27248 (vint32mf2_t): Ditto.
27249 (vuint32mf2_t): Ditto.
27250 (vint32m1_t): Ditto.
27251 (vuint32m1_t): Ditto.
27252 (vint32m2_t): Ditto.
27253 (vuint32m2_t): Ditto.
27254 (vint32m4_t): Ditto.
27255 (vuint32m4_t): Ditto.
27256 (vint32m8_t): Ditto.
27257 (vuint32m8_t): Ditto.
27258 (vint64m1_t): Ditto.
27259 (vuint64m1_t): Ditto.
27260 (vint64m2_t): Ditto.
27261 (vuint64m2_t): Ditto.
27262 (vint64m4_t): Ditto.
27263 (vuint64m4_t): Ditto.
27264 (vint64m8_t): Ditto.
27265 (vuint64m8_t): Ditto.
27266 (vfloat32mf2_t): Ditto.
27267 (vfloat32m1_t): Ditto.
27268 (vfloat32m2_t): Ditto.
27269 (vfloat32m4_t): Ditto.
27270 (vfloat32m8_t): Ditto.
27271 (vfloat64m1_t): Ditto.
27272 (vfloat64m2_t): Ditto.
27273 (vfloat64m4_t): Ditto.
27274 (vfloat64m8_t): Ditto.
27275 (tuple_subpart): Add tuple subpart base type.
27276 * config/riscv/riscv-vector-builtins.h (struct
27277 rvv_arg_type_info): Ditto.
27278 (tuple_type_field): New function.
27280 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27282 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
27283 (RVV_TUPLE_PARTIAL_MODES): Ditto.
27284 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
27287 (get_subpart_mode): Ditto.
27288 (get_tuple_mode): Ditto.
27289 (expand_tuple_move): Ditto.
27290 * config/riscv/riscv-v.cc (ENTRY): New macro.
27291 (TUPLE_ENTRY): Ditto.
27292 (get_nf): New function.
27293 (get_subpart_mode): Ditto.
27294 (get_tuple_mode): Ditto.
27295 (expand_tuple_move): Ditto.
27296 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
27298 (register_tuple_type): New function
27299 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
27301 (vint8mf8x2_t): New macro.
27302 (vuint8mf8x2_t): Ditto.
27303 (vint8mf8x3_t): Ditto.
27304 (vuint8mf8x3_t): Ditto.
27305 (vint8mf8x4_t): Ditto.
27306 (vuint8mf8x4_t): Ditto.
27307 (vint8mf8x5_t): Ditto.
27308 (vuint8mf8x5_t): Ditto.
27309 (vint8mf8x6_t): Ditto.
27310 (vuint8mf8x6_t): Ditto.
27311 (vint8mf8x7_t): Ditto.
27312 (vuint8mf8x7_t): Ditto.
27313 (vint8mf8x8_t): Ditto.
27314 (vuint8mf8x8_t): Ditto.
27315 (vint8mf4x2_t): Ditto.
27316 (vuint8mf4x2_t): Ditto.
27317 (vint8mf4x3_t): Ditto.
27318 (vuint8mf4x3_t): Ditto.
27319 (vint8mf4x4_t): Ditto.
27320 (vuint8mf4x4_t): Ditto.
27321 (vint8mf4x5_t): Ditto.
27322 (vuint8mf4x5_t): Ditto.
27323 (vint8mf4x6_t): Ditto.
27324 (vuint8mf4x6_t): Ditto.
27325 (vint8mf4x7_t): Ditto.
27326 (vuint8mf4x7_t): Ditto.
27327 (vint8mf4x8_t): Ditto.
27328 (vuint8mf4x8_t): Ditto.
27329 (vint8mf2x2_t): Ditto.
27330 (vuint8mf2x2_t): Ditto.
27331 (vint8mf2x3_t): Ditto.
27332 (vuint8mf2x3_t): Ditto.
27333 (vint8mf2x4_t): Ditto.
27334 (vuint8mf2x4_t): Ditto.
27335 (vint8mf2x5_t): Ditto.
27336 (vuint8mf2x5_t): Ditto.
27337 (vint8mf2x6_t): Ditto.
27338 (vuint8mf2x6_t): Ditto.
27339 (vint8mf2x7_t): Ditto.
27340 (vuint8mf2x7_t): Ditto.
27341 (vint8mf2x8_t): Ditto.
27342 (vuint8mf2x8_t): Ditto.
27343 (vint8m1x2_t): Ditto.
27344 (vuint8m1x2_t): Ditto.
27345 (vint8m1x3_t): Ditto.
27346 (vuint8m1x3_t): Ditto.
27347 (vint8m1x4_t): Ditto.
27348 (vuint8m1x4_t): Ditto.
27349 (vint8m1x5_t): Ditto.
27350 (vuint8m1x5_t): Ditto.
27351 (vint8m1x6_t): Ditto.
27352 (vuint8m1x6_t): Ditto.
27353 (vint8m1x7_t): Ditto.
27354 (vuint8m1x7_t): Ditto.
27355 (vint8m1x8_t): Ditto.
27356 (vuint8m1x8_t): Ditto.
27357 (vint8m2x2_t): Ditto.
27358 (vuint8m2x2_t): Ditto.
27359 (vint8m2x3_t): Ditto.
27360 (vuint8m2x3_t): Ditto.
27361 (vint8m2x4_t): Ditto.
27362 (vuint8m2x4_t): Ditto.
27363 (vint8m4x2_t): Ditto.
27364 (vuint8m4x2_t): Ditto.
27365 (vint16mf4x2_t): Ditto.
27366 (vuint16mf4x2_t): Ditto.
27367 (vint16mf4x3_t): Ditto.
27368 (vuint16mf4x3_t): Ditto.
27369 (vint16mf4x4_t): Ditto.
27370 (vuint16mf4x4_t): Ditto.
27371 (vint16mf4x5_t): Ditto.
27372 (vuint16mf4x5_t): Ditto.
27373 (vint16mf4x6_t): Ditto.
27374 (vuint16mf4x6_t): Ditto.
27375 (vint16mf4x7_t): Ditto.
27376 (vuint16mf4x7_t): Ditto.
27377 (vint16mf4x8_t): Ditto.
27378 (vuint16mf4x8_t): Ditto.
27379 (vint16mf2x2_t): Ditto.
27380 (vuint16mf2x2_t): Ditto.
27381 (vint16mf2x3_t): Ditto.
27382 (vuint16mf2x3_t): Ditto.
27383 (vint16mf2x4_t): Ditto.
27384 (vuint16mf2x4_t): Ditto.
27385 (vint16mf2x5_t): Ditto.
27386 (vuint16mf2x5_t): Ditto.
27387 (vint16mf2x6_t): Ditto.
27388 (vuint16mf2x6_t): Ditto.
27389 (vint16mf2x7_t): Ditto.
27390 (vuint16mf2x7_t): Ditto.
27391 (vint16mf2x8_t): Ditto.
27392 (vuint16mf2x8_t): Ditto.
27393 (vint16m1x2_t): Ditto.
27394 (vuint16m1x2_t): Ditto.
27395 (vint16m1x3_t): Ditto.
27396 (vuint16m1x3_t): Ditto.
27397 (vint16m1x4_t): Ditto.
27398 (vuint16m1x4_t): Ditto.
27399 (vint16m1x5_t): Ditto.
27400 (vuint16m1x5_t): Ditto.
27401 (vint16m1x6_t): Ditto.
27402 (vuint16m1x6_t): Ditto.
27403 (vint16m1x7_t): Ditto.
27404 (vuint16m1x7_t): Ditto.
27405 (vint16m1x8_t): Ditto.
27406 (vuint16m1x8_t): Ditto.
27407 (vint16m2x2_t): Ditto.
27408 (vuint16m2x2_t): Ditto.
27409 (vint16m2x3_t): Ditto.
27410 (vuint16m2x3_t): Ditto.
27411 (vint16m2x4_t): Ditto.
27412 (vuint16m2x4_t): Ditto.
27413 (vint16m4x2_t): Ditto.
27414 (vuint16m4x2_t): Ditto.
27415 (vint32mf2x2_t): Ditto.
27416 (vuint32mf2x2_t): Ditto.
27417 (vint32mf2x3_t): Ditto.
27418 (vuint32mf2x3_t): Ditto.
27419 (vint32mf2x4_t): Ditto.
27420 (vuint32mf2x4_t): Ditto.
27421 (vint32mf2x5_t): Ditto.
27422 (vuint32mf2x5_t): Ditto.
27423 (vint32mf2x6_t): Ditto.
27424 (vuint32mf2x6_t): Ditto.
27425 (vint32mf2x7_t): Ditto.
27426 (vuint32mf2x7_t): Ditto.
27427 (vint32mf2x8_t): Ditto.
27428 (vuint32mf2x8_t): Ditto.
27429 (vint32m1x2_t): Ditto.
27430 (vuint32m1x2_t): Ditto.
27431 (vint32m1x3_t): Ditto.
27432 (vuint32m1x3_t): Ditto.
27433 (vint32m1x4_t): Ditto.
27434 (vuint32m1x4_t): Ditto.
27435 (vint32m1x5_t): Ditto.
27436 (vuint32m1x5_t): Ditto.
27437 (vint32m1x6_t): Ditto.
27438 (vuint32m1x6_t): Ditto.
27439 (vint32m1x7_t): Ditto.
27440 (vuint32m1x7_t): Ditto.
27441 (vint32m1x8_t): Ditto.
27442 (vuint32m1x8_t): Ditto.
27443 (vint32m2x2_t): Ditto.
27444 (vuint32m2x2_t): Ditto.
27445 (vint32m2x3_t): Ditto.
27446 (vuint32m2x3_t): Ditto.
27447 (vint32m2x4_t): Ditto.
27448 (vuint32m2x4_t): Ditto.
27449 (vint32m4x2_t): Ditto.
27450 (vuint32m4x2_t): Ditto.
27451 (vint64m1x2_t): Ditto.
27452 (vuint64m1x2_t): Ditto.
27453 (vint64m1x3_t): Ditto.
27454 (vuint64m1x3_t): Ditto.
27455 (vint64m1x4_t): Ditto.
27456 (vuint64m1x4_t): Ditto.
27457 (vint64m1x5_t): Ditto.
27458 (vuint64m1x5_t): Ditto.
27459 (vint64m1x6_t): Ditto.
27460 (vuint64m1x6_t): Ditto.
27461 (vint64m1x7_t): Ditto.
27462 (vuint64m1x7_t): Ditto.
27463 (vint64m1x8_t): Ditto.
27464 (vuint64m1x8_t): Ditto.
27465 (vint64m2x2_t): Ditto.
27466 (vuint64m2x2_t): Ditto.
27467 (vint64m2x3_t): Ditto.
27468 (vuint64m2x3_t): Ditto.
27469 (vint64m2x4_t): Ditto.
27470 (vuint64m2x4_t): Ditto.
27471 (vint64m4x2_t): Ditto.
27472 (vuint64m4x2_t): Ditto.
27473 (vfloat32mf2x2_t): Ditto.
27474 (vfloat32mf2x3_t): Ditto.
27475 (vfloat32mf2x4_t): Ditto.
27476 (vfloat32mf2x5_t): Ditto.
27477 (vfloat32mf2x6_t): Ditto.
27478 (vfloat32mf2x7_t): Ditto.
27479 (vfloat32mf2x8_t): Ditto.
27480 (vfloat32m1x2_t): Ditto.
27481 (vfloat32m1x3_t): Ditto.
27482 (vfloat32m1x4_t): Ditto.
27483 (vfloat32m1x5_t): Ditto.
27484 (vfloat32m1x6_t): Ditto.
27485 (vfloat32m1x7_t): Ditto.
27486 (vfloat32m1x8_t): Ditto.
27487 (vfloat32m2x2_t): Ditto.
27488 (vfloat32m2x3_t): Ditto.
27489 (vfloat32m2x4_t): Ditto.
27490 (vfloat32m4x2_t): Ditto.
27491 (vfloat64m1x2_t): Ditto.
27492 (vfloat64m1x3_t): Ditto.
27493 (vfloat64m1x4_t): Ditto.
27494 (vfloat64m1x5_t): Ditto.
27495 (vfloat64m1x6_t): Ditto.
27496 (vfloat64m1x7_t): Ditto.
27497 (vfloat64m1x8_t): Ditto.
27498 (vfloat64m2x2_t): Ditto.
27499 (vfloat64m2x3_t): Ditto.
27500 (vfloat64m2x4_t): Ditto.
27501 (vfloat64m4x2_t): Ditto.
27502 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
27504 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
27505 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
27507 (TUPLE_ENTRY): Ditto.
27508 (riscv_v_ext_mode_p): New function.
27509 (riscv_v_adjust_nunits): Add tuple mode adjustment.
27510 (riscv_classify_address): Ditto.
27511 (riscv_binary_cost): Ditto.
27512 (riscv_rtx_costs): Ditto.
27513 (riscv_secondary_memory_needed): Ditto.
27514 (riscv_hard_regno_nregs): Ditto.
27515 (riscv_hard_regno_mode_ok): Ditto.
27516 (riscv_vector_mode_supported_p): Ditto.
27517 (riscv_regmode_natural_size): Ditto.
27518 (riscv_array_mode): New function.
27519 (TARGET_ARRAY_MODE): New target hook.
27520 * config/riscv/riscv.md: Add tuple modes.
27521 * config/riscv/vector-iterators.md: Ditto.
27522 * config/riscv/vector.md (mov<mode>): Add tuple modes data
27524 (*mov<VT:mode>_<P:mode>): Ditto.
27526 2023-05-03 Richard Biener <rguenther@suse.de>
27528 * cse.cc (cse_insn): Track an equivalence to the destination
27529 separately and delay using src_related for it.
27531 2023-05-03 Richard Biener <rguenther@suse.de>
27533 * cse.cc (HASH): Turn into inline function and mix
27534 in another HASH_SHIFT bits.
27535 (SAFE_HASH): Likewise.
27537 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27540 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
27541 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
27543 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27546 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
27547 (add<mode>3<vczle><vczbe>): ... This.
27548 (sub<mode>3): Rename to...
27549 (sub<mode>3<vczle><vczbe>): ... This.
27550 (mul<mode>3): Rename to...
27551 (mul<mode>3<vczle><vczbe>): ... This.
27552 (*div<mode>3): Rename to...
27553 (*div<mode>3<vczle><vczbe>): ... This.
27554 (neg<mode>2): Rename to...
27555 (neg<mode>2<vczle><vczbe>): ... This.
27556 (abs<mode>2): Rename to...
27557 (abs<mode>2<vczle><vczbe>): ... This.
27558 (<frint_pattern><mode>2): Rename to...
27559 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
27560 (<fmaxmin><mode>3): Rename to...
27561 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
27562 (*sqrt<mode>2): Rename to...
27563 (*sqrt<mode>2<vczle><vczbe>): ... This.
27565 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
27567 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
27569 2023-05-03 Martin Liska <mliska@suse.cz>
27571 PR tree-optimization/109693
27572 * value-range-storage.cc (vrange_allocator::vrange_allocator):
27573 Remove unused field.
27574 * value-range-storage.h: Likewise.
27576 2023-05-02 Andrew Pinski <apinski@marvell.com>
27578 * tree-ssa-phiopt.cc (move_stmt): New function.
27579 (match_simplify_replacement): Use move_stmt instead
27580 of the inlined version.
27582 2023-05-02 Andrew Pinski <apinski@marvell.com>
27584 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
27587 2023-05-02 Andrew Pinski <apinski@marvell.com>
27589 PR tree-optimization/109702
27590 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
27591 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
27593 2023-05-02 Andrew Pinski <apinski@marvell.com>
27596 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
27597 insn_and_split pattern.
27599 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27601 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
27604 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27606 * config/riscv/sync.md (mem_thread_fence_1): Change fence
27607 depending on the given memory model.
27609 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27611 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
27612 riscv_union_memmodels function to sync.md.
27613 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
27614 get the union of two memmodels in sync.md.
27615 (riscv_print_operand): Add %I and %J flags that output the
27616 optimal LR/SC flag bits for a given memory model.
27617 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
27618 bits on SC op and replace with optimized %I, %J flags.
27620 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27622 * config/riscv/riscv.cc
27623 (riscv_memmodel_needs_amo_release): Change function name.
27624 (riscv_print_operand): Remove unneeded %F case.
27625 * config/riscv/sync.md: Remove unneeded fences.
27627 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27630 * config/riscv/sync.md (atomic_store<mode>): Use simple store
27631 instruction in combination with fence(s).
27633 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27635 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
27636 of %A to include release bits.
27638 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27640 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
27641 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
27644 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27646 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
27647 sequentially consistent LR.aqrl/SC.rl pairs.
27649 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27651 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
27652 sanitize memmodel input with memmodel_base.
27654 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
27655 Pan Li <pan2.li@intel.com>
27658 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
27660 2023-05-02 Romain Naour <romain.naour@gmail.com>
27662 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
27665 2023-05-02 Martin Liska <mliska@suse.cz>
27667 * doc/invoke.texi: Update documentation based on param.opt file.
27669 2023-05-02 Richard Biener <rguenther@suse.de>
27671 PR tree-optimization/109672
27672 * tree-vect-stmts.cc (vectorizable_operation): For plus,
27673 minus and negate always check the vector mode is word mode.
27675 2023-05-01 Andrew Pinski <apinski@marvell.com>
27677 * tree-ssa-phiopt.cc: Update comment about
27678 how the transformation are implemented.
27680 2023-05-01 Jeff Law <jlaw@ventanamicro>
27682 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
27684 2023-05-01 Jeff Law <jlaw@ventanamicro>
27686 * config/cris/cris.cc (TARGET_LRA_P): Remove.
27687 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
27688 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
27689 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
27690 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
27691 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
27693 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
27695 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
27696 * print-tree.cc (print_decl_identifier): Implement it.
27697 * toplev.cc (output_stack_usage_1): Use it.
27699 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27701 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
27704 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27706 * value-range.h (irange::set_nonzero): Inline.
27708 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27710 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
27712 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
27713 invalid_range, as it is an inverse range.
27714 * tree-vrp.cc (find_case_label_range): Avoid trees.
27715 * value-range.cc (irange::irange_set): Delete.
27716 (irange::irange_set_1bit_anti_range): Delete.
27717 (irange::irange_set_anti_range): Delete.
27718 (irange::set): Cleanup.
27719 * value-range.h (class irange): Remove irange_set,
27720 irange_set_anti_range, irange_set_1bit_anti_range.
27721 (irange::set_undefined): Remove set to m_type.
27723 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27725 * range-op.cc (update_known_bitmask): Adjust for irange containing
27726 wide_ints internally.
27727 * tree-ssanames.cc (set_nonzero_bits): Same.
27728 * tree-ssanames.h (set_nonzero_bits): Same.
27729 * value-range-storage.cc (irange_storage::set_irange): Same.
27730 (irange_storage::get_irange): Same.
27731 * value-range.cc (irange::operator=): Same.
27732 (irange::irange_set): Same.
27733 (irange::irange_set_1bit_anti_range): Same.
27734 (irange::irange_set_anti_range): Same.
27735 (irange::set): Same.
27736 (irange::verify_range): Same.
27737 (irange::contains_p): Same.
27738 (irange::irange_single_pair_union): Same.
27739 (irange::union_): Same.
27740 (irange::irange_contains_p): Same.
27741 (irange::intersect): Same.
27742 (irange::invert): Same.
27743 (irange::set_range_from_nonzero_bits): Same.
27744 (irange::set_nonzero_bits): Same.
27745 (mask_to_wi): Same.
27746 (irange::intersect_nonzero_bits): Same.
27747 (irange::union_nonzero_bits): Same.
27750 (tree_range): Same.
27751 (range_tests_strict_enum): Same.
27752 (range_tests_misc): Same.
27753 (range_tests_nonzero_bits): Same.
27754 * value-range.h (irange::type): Same.
27755 (irange::varying_compatible_p): Same.
27756 (irange::irange): Same.
27757 (int_range::int_range): Same.
27758 (irange::set_undefined): Same.
27759 (irange::set_varying): Same.
27760 (irange::lower_bound): Same.
27761 (irange::upper_bound): Same.
27763 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27765 * gimple-range-fold.cc (tree_lower_bound): Delete.
27766 (tree_upper_bound): Delete.
27767 (vrp_val_max): Delete.
27768 (vrp_val_min): Delete.
27769 (fold_using_range::range_of_ssa_name_with_loop_info): Call
27770 range_of_var_in_loop.
27771 * vr-values.cc (valid_value_p): Delete.
27772 (fix_overflow): Delete.
27773 (get_scev_info): New.
27774 (bounds_of_var_in_loop): Refactor into...
27775 (induction_variable_may_overflow_p): ...this,
27776 (range_from_loop_direction): ...and this,
27777 (range_of_var_in_loop): ...and this.
27778 * vr-values.h (bounds_of_var_in_loop): Delete.
27779 (range_of_var_in_loop): New.
27781 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27783 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
27785 (vrp_val_max): New.
27786 (vrp_val_min): New.
27787 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
27788 * range-op.cc (max_limit): Same.
27790 (plus_minus_ranges): Same.
27791 (operator_rshift::op1_range): Same.
27792 (operator_cast::inside_domain_p): Same.
27793 * value-range.cc (vrp_val_is_max): Delete.
27794 (vrp_val_is_min): Delete.
27795 (range_tests_misc): Use irange_val_*.
27796 * value-range.h (vrp_val_is_min): Delete.
27797 (vrp_val_is_max): Delete.
27798 (vrp_val_max): Delete.
27799 (irange_val_min): New.
27800 (vrp_val_min): Delete.
27801 (irange_val_max): New.
27802 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
27804 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27806 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
27807 * gimple-fold.cc (size_must_be_zero_p): Same.
27808 * gimple-loop-versioning.cc
27809 (loop_versioning::prune_loop_conditions): Same.
27810 * gimple-range-edge.cc (gcond_edge_range): Same.
27811 (gimple_outgoing_range::calc_switch_ranges): Same.
27812 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
27813 (adjust_realpart_expr): Same.
27814 (fold_using_range::range_of_address): Same.
27815 (fold_using_range::relation_fold_and_or): Same.
27816 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
27817 (range_is_either_true_or_false): Same.
27818 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
27819 (cfn_clz::fold_range): Same.
27820 (cfn_ctz::fold_range): Same.
27821 * gimple-range-tests.cc (class test_expr_eval): Same.
27822 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
27823 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
27824 (propagate_vr_across_jump_function): Same.
27825 (decide_whether_version_node): Same.
27826 * ipa-prop.cc (ipa_get_value_range): Same.
27827 * ipa-prop.h (ipa_range_set_and_normalize): Same.
27828 * range-op.cc (get_shift_range): Same.
27829 (value_range_from_overflowed_bounds): Same.
27830 (value_range_with_overflow): Same.
27831 (create_possibly_reversed_range): Same.
27832 (equal_op1_op2_relation): Same.
27833 (not_equal_op1_op2_relation): Same.
27834 (lt_op1_op2_relation): Same.
27835 (le_op1_op2_relation): Same.
27836 (gt_op1_op2_relation): Same.
27837 (ge_op1_op2_relation): Same.
27838 (operator_mult::op1_range): Same.
27839 (operator_exact_divide::op1_range): Same.
27840 (operator_lshift::op1_range): Same.
27841 (operator_rshift::op1_range): Same.
27842 (operator_cast::op1_range): Same.
27843 (operator_logical_and::fold_range): Same.
27844 (set_nonzero_range_from_mask): Same.
27845 (operator_bitwise_or::op1_range): Same.
27846 (operator_bitwise_xor::op1_range): Same.
27847 (operator_addr_expr::fold_range): Same.
27848 (pointer_plus_operator::wi_fold): Same.
27849 (pointer_or_operator::op1_range): Same.
27856 (range_op_cast_tests): Same.
27857 (range_op_lshift_tests): Same.
27858 (range_op_rshift_tests): Same.
27859 (range_op_bitwise_and_tests): Same.
27860 (range_relational_tests): Same.
27861 * range.cc (range_zero): Same.
27862 (range_nonzero): Same.
27863 * range.h (range_true): Same.
27864 (range_false): Same.
27865 (range_true_and_false): Same.
27866 * tree-data-ref.cc (split_constant_offset_1): Same.
27867 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
27868 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
27869 (find_unswitching_predicates_for_bb): Same.
27870 * tree-ssa-phiopt.cc (value_replacement): Same.
27871 * tree-ssa-threadbackward.cc
27872 (back_threader::find_taken_edge_cond): Same.
27873 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
27874 * tree-vrp.cc (find_case_label_range): Same.
27875 * value-query.cc (range_query::get_tree_range): Same.
27876 * value-range.cc (irange::set_nonnegative): Same.
27877 (frange::contains_p): Same.
27878 (frange::singleton_p): Same.
27879 (frange::internal_singleton_p): Same.
27880 (irange::irange_set): Same.
27881 (irange::irange_set_1bit_anti_range): Same.
27882 (irange::irange_set_anti_range): Same.
27883 (irange::set): Same.
27884 (irange::operator==): Same.
27885 (irange::singleton_p): Same.
27886 (irange::contains_p): Same.
27887 (irange::set_range_from_nonzero_bits): Same.
27888 (DEFINE_INT_RANGE_INSTANCE): Same.
27898 (range_uint128): New.
27899 (range_uchar): New.
27901 (build_range3): Convert to irange wide_int API.
27902 (range_tests_irange3): Same.
27903 (range_tests_int_range_max): Same.
27904 (range_tests_strict_enum): Same.
27905 (range_tests_misc): Same.
27906 (range_tests_nonzero_bits): Same.
27907 (range_tests_nan): Same.
27908 (range_tests_signed_zeros): Same.
27909 * value-range.h (Value_Range::Value_Range): Same.
27910 (irange::set): Same.
27911 (irange::nonzero_p): Same.
27912 (irange::contains_p): Same.
27913 (range_includes_zero_p): Same.
27914 (irange::set_nonzero): Same.
27915 (irange::set_zero): Same.
27916 (contains_zero_p): Same.
27917 (frange::contains_p): Same.
27919 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
27920 (bounds_of_var_in_loop): Same.
27921 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
27923 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27925 * value-range.cc (irange::irange_union): Rename to...
27926 (irange::union_): ...this.
27927 (irange::irange_intersect): Rename to...
27928 (irange::intersect): ...this.
27929 * value-range.h (irange::union_): Delete.
27930 (irange::intersect): Delete.
27932 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27934 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
27936 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27938 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
27940 (compare_ranges): Delete.
27941 (compare_range_with_value): Delete.
27942 (bounds_of_var_in_loop): Tidy up by using ranger API.
27943 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
27944 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
27945 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
27946 strict_overflow_p and only_ranges.
27947 (simplify_using_ranges::legacy_fold_cond): Adjust call to
27948 legacy_fold_cond_overflow.
27949 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
27951 (range_fits_type_p): Rename value_range to irange.
27952 * vr-values.h (range_fits_type_p): Adjust prototype.
27954 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27956 * value-range.cc (irange::irange_set_anti_range): Remove uses of
27957 tree_lower_bound and tree_upper_bound.
27958 (irange::verify_range): Same.
27959 (irange::operator==): Same.
27960 (irange::singleton_p): Same.
27961 * value-range.h (irange::tree_lower_bound): Delete.
27962 (irange::tree_upper_bound): Delete.
27963 (irange::lower_bound): Delete.
27964 (irange::upper_bound): Delete.
27965 (irange::zero_p): Remove uses of tree_lower_bound and
27968 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27970 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
27972 (determine_value_range): Same.
27973 (record_nonwrapping_iv): Same.
27974 (infer_loop_bounds_from_signedness): Same.
27975 (scev_var_range_cant_overflow): Same.
27976 * tree-vrp.cc (operand_less_p): Delete.
27977 * tree-vrp.h (operand_less_p): Delete.
27978 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
27979 (irange::value_inside_range): Delete.
27980 * value-range.h (vrange::kind): Delete.
27981 (irange::num_pairs): Remove check of m_kind.
27982 (irange::min): Delete.
27983 (irange::max): Delete.
27985 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27987 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
27988 for vrange_storage.
27989 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
27990 (sbr_vector::grow): Same.
27991 (sbr_vector::set_bb_range): Same.
27992 (sbr_vector::get_bb_range): Same.
27993 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
27994 (sbr_sparse_bitmap::set_bb_range): Same.
27995 (sbr_sparse_bitmap::get_bb_range): Same.
27996 (block_range_cache::block_range_cache): Same.
27997 (ssa_global_cache::ssa_global_cache): Same.
27998 (ssa_global_cache::get_global_range): Same.
27999 (ssa_global_cache::set_global_range): Same.
28000 * gimple-range-cache.h: Same.
28001 * gimple-range-edge.cc
28002 (gimple_outgoing_range::gimple_outgoing_range): Same.
28003 (gimple_outgoing_range::switch_edge_range): Same.
28004 (gimple_outgoing_range::calc_switch_ranges): Same.
28005 * gimple-range-edge.h: Same.
28006 * gimple-range-infer.cc
28007 (infer_range_manager::infer_range_manager): Same.
28008 (infer_range_manager::get_nonzero): Same.
28009 (infer_range_manager::maybe_adjust_range): Same.
28010 (infer_range_manager::add_range): Same.
28011 * gimple-range-infer.h: Rename obstack_vrange_allocator to
28013 * tree-core.h (struct irange_storage_slot): Remove.
28014 (struct tree_ssa_name): Remove irange_info and frange_info. Make
28015 range_info a pointer to vrange_storage.
28016 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
28017 (range_info_alloc): Same.
28018 (range_info_free): Same.
28019 (range_info_get_range): Same.
28020 (range_info_set_range): Same.
28021 (get_nonzero_bits): Same.
28022 * value-query.cc (get_ssa_name_range_info): Same.
28023 * value-range-storage.cc (class vrange_internal_alloc): New.
28024 (class vrange_obstack_alloc): New.
28025 (class vrange_ggc_alloc): New.
28026 (vrange_allocator::vrange_allocator): New.
28027 (vrange_allocator::~vrange_allocator): New.
28028 (vrange_storage::alloc_slot): New.
28029 (vrange_allocator::alloc): New.
28030 (vrange_allocator::free): New.
28031 (vrange_allocator::clone): New.
28032 (vrange_allocator::clone_varying): New.
28033 (vrange_allocator::clone_undefined): New.
28034 (vrange_storage::alloc): New.
28035 (vrange_storage::set_vrange): Remove slot argument.
28036 (vrange_storage::get_vrange): Same.
28037 (vrange_storage::fits_p): Same.
28038 (vrange_storage::equal_p): New.
28039 (irange_storage::write_lengths_address): New.
28040 (irange_storage::lengths_address): New.
28041 (irange_storage_slot::alloc_slot): Remove.
28042 (irange_storage::alloc): New.
28043 (irange_storage_slot::irange_storage_slot): Remove.
28044 (irange_storage::irange_storage): New.
28045 (write_wide_int): New.
28046 (irange_storage_slot::set_irange): Remove.
28047 (irange_storage::set_irange): New.
28048 (read_wide_int): New.
28049 (irange_storage_slot::get_irange): Remove.
28050 (irange_storage::get_irange): New.
28051 (irange_storage_slot::size): Remove.
28052 (irange_storage::equal_p): New.
28053 (irange_storage_slot::num_wide_ints_needed): Remove.
28054 (irange_storage::size): New.
28055 (irange_storage_slot::fits_p): Remove.
28056 (irange_storage::fits_p): New.
28057 (irange_storage_slot::dump): Remove.
28058 (irange_storage::dump): New.
28059 (frange_storage_slot::alloc_slot): Remove.
28060 (frange_storage::alloc): New.
28061 (frange_storage_slot::set_frange): Remove.
28062 (frange_storage::set_frange): New.
28063 (frange_storage_slot::get_frange): Remove.
28064 (frange_storage::get_frange): New.
28065 (frange_storage_slot::fits_p): Remove.
28066 (frange_storage::equal_p): New.
28067 (frange_storage::fits_p): New.
28068 (ggc_vrange_allocator): New.
28069 (ggc_alloc_vrange_storage): New.
28070 * value-range-storage.h (class vrange_storage): Rewrite.
28071 (class irange_storage): Rewrite.
28072 (class frange_storage): Rewrite.
28073 (class obstack_vrange_allocator): Remove.
28074 (class ggc_vrange_allocator): Remove.
28075 (vrange_allocator::alloc_vrange): Remove.
28076 (vrange_allocator::alloc_irange): Remove.
28077 (vrange_allocator::alloc_frange): Remove.
28078 (ggc_alloc_vrange_storage): New.
28079 * value-range.h (class irange): Rename vrange_allocator to
28081 (class frange): Same.
28083 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
28085 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
28086 inc to avoid clobbering the carry flag.
28088 2023-04-30 Andrew Pinski <apinski@marvell.com>
28090 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
28091 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
28093 2023-04-30 Andrew Pinski <apinski@marvell.com>
28095 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
28096 Allow some builtin/internal function calls which
28097 are known not to trap/throw.
28098 (phiopt_worker::match_simplify_replacement):
28099 Use name instead of getting the lhs again.
28101 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
28103 * configure: Regenerate.
28104 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
28106 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
28108 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
28109 emit_insn_if_valid_for_reload.
28110 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
28111 to be recognized, also try emitting a parallel that clobbers
28112 TARGET_FLAGS_REGNUM, as applicable.
28114 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
28116 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
28118 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
28119 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
28121 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
28123 * config/stormy16/stormy16.md (any_lshift): New code iterator.
28124 (any_or_plus): Likewise.
28125 (any_rotate): Likewise.
28126 (*<any_lshift>_and_internal): New define_insn_and_split to
28127 recognize a logical shift followed by an AND, and split it
28128 again after reload.
28129 (*swpn): New define_insn matching xstormy16's swpn.
28130 (*swpn_zext): New define_insn recognizing swpn followed by
28131 zero_extendqihi2, i.e. with the high byte set to zero.
28132 (*swpn_sext): Likewise, for swpn followed by cbw.
28133 (*swpn_sext_2): Likewise, for an alternate RTL form.
28134 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
28135 sequence is split in the correct place to recognize the *swpn_zext
28136 followed by any_or_plus (ior, xor or plus) instruction.
28138 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
28141 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
28142 (lm32-*-uclinux*): Likewise.
28144 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
28146 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
28147 for riscv_use_save_libcall.
28148 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
28149 (riscv_compute_frame_info): restructure to decouple stack allocation
28150 for rv32e w/o save-restore.
28152 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
28154 * doc/install.texi: Fix documentation typo
28156 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
28158 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
28159 (u): Add div/udiv cases.
28160 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
28161 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
28163 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
28164 (thead_c906_tune_info): Likewise.
28165 (optimize_size_tune_info): Likewise.
28166 (riscv_use_divmod_expander): New function.
28167 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
28169 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
28171 * config/riscv/bitmanip.md: Added clmulr instruction.
28172 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
28173 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
28175 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
28176 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
28177 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
28178 functions to riscv-cmo.def.
28179 * config/riscv/generic.md: Add clmul to list of instructions
28180 using the generic_imul reservation.
28182 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
28184 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
28186 2023-04-28 Andrew Pinski <apinski@marvell.com>
28188 PR tree-optimization/100958
28189 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
28190 (pass_phiopt::execute): Don't call two_value_replacement.
28191 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
28192 handle what two_value_replacement did.
28194 2023-04-28 Andrew Pinski <apinski@marvell.com>
28196 * match.pd: Add patterns for
28197 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
28199 2023-04-28 Andrew Pinski <apinski@marvell.com>
28201 * match.pd: Factor out the deciding the min/max from
28202 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
28204 * fold-const.cc (minmax_from_comparison): this new function.
28205 * fold-const.h (minmax_from_comparison): New prototype.
28207 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
28209 PR rtl-optimization/109476
28210 * lower-subreg.cc: Include explow.h for force_reg.
28211 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
28212 If decomposing a suitable LSHIFTRT and we're not splitting
28213 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
28214 instead of setting a high part SUBREG to zero, which helps combine.
28215 (decompose_multiword_subregs): Update call to resolve_shift_zext.
28217 2023-04-28 Richard Biener <rguenther@suse.de>
28219 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
28221 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
28222 gather-scatter info and cost emulated scatters accordingly.
28223 (get_load_store_type): Support emulated scatters.
28224 (vectorizable_store): Likewise. Emulate them by extracting
28225 scalar offsets and data, doing scalar stores.
28227 2023-04-28 Richard Biener <rguenther@suse.de>
28229 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
28230 Tame down element extracts and scalar loads for gather/scatter
28231 similar to elementwise strided accesses.
28233 2023-04-28 Pan Li <pan2.li@intel.com>
28234 kito-cheng <kito.cheng@sifive.com>
28236 * config/riscv/vector.md: Add new define split to perform
28237 the simplification.
28239 2023-04-28 Richard Biener <rguenther@suse.de>
28242 * ipa-param-manipulation.cc
28243 (ipa_param_body_adjustments::modify_expression): Allow
28244 conversion of a register to a non-register type. Elide
28245 conversions inside BIT_FIELD_REFs.
28247 2023-04-28 Richard Biener <rguenther@suse.de>
28249 PR tree-optimization/109644
28250 * tree-cfg.cc (verify_types_in_gimple_reference): Check
28251 register constraints on the outermost VIEW_CONVERT_EXPR
28252 only. Do not allow register or invariant bases on
28253 multi-level or possibly variable index handled components.
28255 2023-04-28 Richard Biener <rguenther@suse.de>
28257 * gimplify.cc (gimplify_compound_lval): When there's a
28258 non-register type produced by one of the handled component
28259 operations make sure we get a non-register base.
28261 2023-04-28 Richard Biener <rguenther@suse.de>
28263 PR tree-optimization/108752
28264 * tree-vect-generic.cc (build_replicated_const): Rename
28265 to build_replicated_int_cst and move to tree.{h,cc}.
28266 (do_plus_minus): Adjust.
28267 (do_negate): Likewise.
28268 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
28269 arithmetic vector operations in lowered form.
28270 * tree.h (build_replicated_int_cst): Declare.
28271 * tree.cc (build_replicated_int_cst): Moved from
28272 tree-vect-generic.cc build_replicated_const.
28274 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28277 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
28278 (aarch64_rbit<mode><vczle><vczbe>): ... This.
28279 (neg<mode>2): Rename to...
28280 (neg<mode>2<vczle><vczbe>): ... This.
28281 (abs<mode>2): Rename to...
28282 (abs<mode>2<vczle><vczbe>): ... This.
28283 (aarch64_abs<mode>): Rename to...
28284 (aarch64_abs<mode><vczle><vczbe>): ... This.
28285 (one_cmpl<mode>2): Rename to...
28286 (one_cmpl<mode>2<vczle><vczbe>): ... This.
28287 (clrsb<mode>2): Rename to...
28288 (clrsb<mode>2<vczle><vczbe>): ... This.
28289 (clz<mode>2): Rename to...
28290 (clz<mode>2<vczle><vczbe>): ... This.
28291 (popcount<mode>2): Rename to...
28292 (popcount<mode>2<vczle><vczbe>): ... This.
28294 2023-04-28 Jakub Jelinek <jakub@redhat.com>
28296 * gimple-range-op.cc (class cfn_sqrt): New type.
28297 (op_cfn_sqrt): New variable.
28298 (gimple_range_op_handler::maybe_builtin_call): Handle
28299 CASE_CFN_SQRT{,_FN}.
28301 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
28302 Jakub Jelinek <jakub@redhat.com>
28304 * value-range.h (frange_nextafter): Declare.
28305 * gimple-range-op.cc (class cfn_sincos): New.
28306 (op_cfn_sin, op_cfn_cos): New variables.
28307 (gimple_range_op_handler::maybe_builtin_call): Handle
28308 CASE_CFN_{SIN,COS}{,_FN}.
28310 2023-04-28 Jakub Jelinek <jakub@redhat.com>
28312 * target.def (libm_function_max_error): New target hook.
28313 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
28314 * doc/tm.texi: Regenerated.
28315 * targhooks.h (default_libm_function_max_error,
28316 glibc_linux_libm_function_max_error): Declare.
28317 * targhooks.cc: Include case-cfn-macros.h.
28318 (default_libm_function_max_error,
28319 glibc_linux_libm_function_max_error): New functions.
28320 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28321 * config/linux-protos.h (linux_libm_function_max_error): Declare.
28322 * config/linux.cc: Include target.h and targhooks.h.
28323 (linux_libm_function_max_error): New function.
28324 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
28325 (arc_libm_function_max_error): New function.
28326 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28327 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
28328 (ix86_libm_function_max_error): New function.
28329 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28330 * config/rs6000/rs6000-protos.h
28331 (rs6000_linux_libm_function_max_error): Declare.
28332 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
28333 and case-cfn-macros.h.
28334 (rs6000_linux_libm_function_max_error): New function.
28335 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28336 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28337 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
28338 (or1k_libm_function_max_error): New function.
28339 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
28341 2023-04-28 Alexandre Oliva <oliva@adacore.com>
28343 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
28344 Move detach value calls...
28345 (pass_harden_conditional_branches::execute): ... here.
28346 (pass_harden_compares::execute): Detach values before
28349 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
28351 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
28352 (cml<addsub_as><mode>4): Likewise.
28353 (vec_addsub<mode>3): Likewise.
28354 (cadd<rot><mode>3): Likewise.
28355 (vec_fmaddsub<mode>4): Likewise.
28356 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
28358 2023-04-27 Andrew Pinski <apinski@marvell.com>
28360 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
28361 up to 2 min/max expressions in the sequence/match code.
28363 2023-04-27 Andrew Pinski <apinski@marvell.com>
28365 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
28367 * tree-eh.cc (operation_could_trap_helper_p): Treate
28368 MIN_EXPR/MAX_EXPR similar as other comparisons.
28370 2023-04-27 Andrew Pinski <apinski@marvell.com>
28372 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
28374 (cond_if_else_store_replacement): Likewise.
28375 (get_non_trapping): Likewise.
28376 (store_elim_worker): Move into ...
28377 (pass_cselim::execute): This.
28379 2023-04-27 Andrew Pinski <apinski@marvell.com>
28381 * tree-ssa-phiopt.cc (two_value_replacement): Remove
28383 (match_simplify_replacement): Likewise.
28384 (factor_out_conditional_conversion): Likewise.
28385 (value_replacement): Likewise.
28386 (minmax_replacement): Likewise.
28387 (spaceship_replacement): Likewise.
28388 (cond_removal_in_builtin_zero_pattern): Likewise.
28389 (hoist_adjacent_loads): Likewise.
28390 (tree_ssa_phiopt_worker): Move into ...
28391 (pass_phiopt::execute): this.
28393 2023-04-27 Andrew Pinski <apinski@marvell.com>
28395 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
28396 do_store_elim argument and split that part out to ...
28397 (store_elim_worker): This new function.
28398 (pass_cselim::execute): Call store_elim_worker.
28399 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
28401 2023-04-27 Jan Hubicka <jh@suse.cz>
28403 * cfgloopmanip.h (unloop_loops): Export.
28404 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
28405 that no longer loop.
28406 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
28407 vectors of loops to unloop.
28408 (canonicalize_induction_variables): Free vectors here.
28409 (tree_unroll_loops_completely): Free vectors here.
28411 2023-04-27 Richard Biener <rguenther@suse.de>
28413 PR tree-optimization/109170
28414 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
28415 Handle __builtin_expect and similar via cfn_pass_through_arg1
28416 and inspecting the calls fnspec.
28417 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
28418 and BUILT_IN_EXPECT_WITH_PROBABILITY.
28420 2023-04-27 Alexandre Oliva <oliva@adacore.com>
28422 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
28424 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
28426 PR tree-optimization/109639
28427 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
28428 (propagate_vr_across_jump_function): Same.
28429 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
28430 * ipa-prop.h (ipa_range_set_and_normalize): New.
28431 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
28433 2023-04-27 Richard Biener <rguenther@suse.de>
28435 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
28436 create a CTOR operand in the result when simplifying GIMPLE.
28438 2023-04-27 Richard Biener <rguenther@suse.de>
28440 * gimplify.cc (gimplify_compound_lval): When the base
28441 gimplified to a register make sure to split up chains
28444 2023-04-27 Richard Biener <rguenther@suse.de>
28447 * ipa-param-manipulation.h
28448 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
28450 * ipa-param-manipulation.cc
28451 (ipa_param_body_adjustments::modify_expression): Likewise.
28452 When we need a conversion and the replacement is a register
28453 split the conversion out.
28454 (ipa_param_body_adjustments::modify_assignment): Pass
28455 extra_stmts to RHS modify_expression.
28457 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
28459 * doc/extend.texi (Zero Length): Describe example.
28461 2023-04-27 Richard Biener <rguenther@suse.de>
28463 PR tree-optimization/109594
28464 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
28465 what we rewrite to a register based on the above.
28467 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
28469 * config/riscv/riscv.cc: Fix whitespace.
28470 * config/riscv/sync.md: Fix whitespace.
28472 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28474 PR tree-optimization/108697
28475 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
28476 not clear the vector on an out of range query.
28477 (ssa_cache::dump): Use dump_range_query instead of get_range.
28478 (ssa_cache::dump_range_query): New.
28479 (ssa_lazy_cache::dump_range_query): New.
28480 (ssa_lazy_cache::set_range): New.
28481 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
28482 (class ssa_lazy_cache): New.
28483 (ssa_lazy_cache::ssa_lazy_cache): New.
28484 (ssa_lazy_cache::~ssa_lazy_cache): New.
28485 (ssa_lazy_cache::get_range): New.
28486 (ssa_lazy_cache::clear_range): New.
28487 (ssa_lazy_cache::clear): New.
28488 (ssa_lazy_cache::dump): New.
28489 * gimple-range-path.cc (path_range_query::path_range_query): Do
28490 not allocate a ssa_cache object nor has_cache bitmap.
28491 (path_range_query::~path_range_query): Do not free objects.
28492 (path_range_query::clear_cache): Remove.
28493 (path_range_query::get_cache): Adjust.
28494 (path_range_query::set_cache): Remove.
28495 (path_range_query::dump): Don't call through a pointer.
28496 (path_range_query::internal_range_of_expr): Set cache directly.
28497 (path_range_query::reset_path): Clear cache directly.
28498 (path_range_query::ssa_range_in_phi): Fold with globals only.
28499 (path_range_query::compute_ranges_in_phis): Simply set range.
28500 (path_range_query::compute_ranges_in_block): Call cache directly.
28501 * gimple-range-path.h (class path_range_query): Replace bitmap
28502 and cache pointer with lazy cache object.
28503 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
28505 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28507 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
28508 (ssa_cache::~ssa_cache): Rename.
28509 (ssa_cache::has_range): New.
28510 (ssa_cache::get_range): Rename.
28511 (ssa_cache::set_range): Rename.
28512 (ssa_cache::clear_range): Rename.
28513 (ssa_cache::clear): Rename.
28514 (ssa_cache::dump): Rename and use get_range.
28515 (ranger_cache::get_global_range): Use get_range and set_range.
28516 (ranger_cache::range_of_def): Use get_range.
28517 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
28518 (class ranger_cache): Use ssa_cache.
28519 * gimple-range-path.cc (path_range_query::path_range_query): Use
28521 (path_range_query::get_cache): Use get_range.
28522 (path_range_query::set_cache): Use set_range.
28523 * gimple-range-path.h (class path_range_query): Use ssa_cache.
28524 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
28525 (assume_query::range_of_expr): Use get_range.
28526 (assume_query::assume_query): Use set_range.
28527 (assume_query::calculate_op): Use get_range and set_range.
28528 * gimple-range.h (class assume_query): Use ssa_cache.
28530 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28532 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
28533 and local to optionally zero memory.
28534 (br_vector::grow): Only zero memory if flag is set.
28535 (class sbr_lazy_vector): New.
28536 (sbr_lazy_vector::sbr_lazy_vector): New.
28537 (sbr_lazy_vector::set_bb_range): New.
28538 (sbr_lazy_vector::get_bb_range): New.
28539 (sbr_lazy_vector::bb_range_p): New.
28540 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
28541 * gimple-range-gori.cc (gori_map::calculate_gori): Use
28542 param_vrp_switch_limit.
28543 (gori_compute::gori_compute): Use param_vrp_switch_limit.
28544 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
28545 (vrp_switch_limit): Rename from evrp_switch_limit.
28546 (vrp_vector_threshold): New.
28548 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28550 * value-relation.cc (dom_oracle::query_relation): Check early for lack
28552 * value-relation.h (equiv_oracle::has_equiv_p): New.
28554 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
28556 PR tree-optimization/109417
28557 * gimple-range-gori.cc (range_def_chain::register_dependency):
28558 Save the ssa version number, not the pointer.
28559 (gori_compute::may_recompute_p): No need to check if a dependency
28560 is in the free list.
28561 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
28562 fields to be unsigned int instead of trees.
28563 (ange_def_chain::depend1): Adjust.
28564 (ange_def_chain::depend2): Adjust.
28565 * gimple-range.h: Include "ssa.h" to inline ssa_name().
28567 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
28569 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
28570 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
28571 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
28573 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
28576 * config/riscv/riscv-protos.h: Add helper function stubs.
28577 * config/riscv/riscv.cc: Add helper functions for subword masking.
28578 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
28579 -mno-inline-atomics.
28580 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
28581 fetch_and_nand, CAS, and exchange ops.
28582 * doc/invoke.texi: Add blurb regarding new command-line flags
28583 -minline-atomics and -mno-inline-atomics.
28585 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28587 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
28588 Reimplement using standard RTL codes instead of unspec.
28589 (aarch64_rshrn2<mode>_insn_be): Likewise.
28590 (aarch64_rshrn2<mode>): Adjust for the above.
28591 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
28593 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28595 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
28596 with standard RTL codes instead of an UNSPEC.
28597 (aarch64_rshrn<mode>_insn_be): Likewise.
28598 (aarch64_rshrn<mode>): Adjust for the above.
28599 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
28601 2023-04-26 Pan Li <pan2.li@intel.com>
28602 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28604 * config/riscv/riscv.cc (riscv_classify_address): Allow
28605 const0_rtx for the RVV load/store.
28607 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28609 * range-op.cc (range_op_cast_tests): Remove legacy support.
28610 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
28611 * value-range.cc (irange::operator=): Same.
28612 (get_legacy_range): Same.
28613 (irange::copy_legacy_to_multi_range): Delete.
28614 (irange::copy_to_legacy): Delete.
28615 (irange::irange_set_anti_range): Delete.
28616 (irange::set): Remove legacy support.
28617 (irange::verify_range): Same.
28618 (irange::legacy_lower_bound): Delete.
28619 (irange::legacy_upper_bound): Delete.
28620 (irange::legacy_equal_p): Delete.
28621 (irange::operator==): Remove legacy support.
28622 (irange::singleton_p): Same.
28623 (irange::value_inside_range): Same.
28624 (irange::contains_p): Same.
28625 (intersect_ranges): Delete.
28626 (irange::legacy_intersect): Delete.
28627 (union_ranges): Delete.
28628 (irange::legacy_union): Delete.
28629 (irange::legacy_verbose_union_): Delete.
28630 (irange::legacy_verbose_intersect): Delete.
28631 (irange::irange_union): Remove legacy support.
28632 (irange::irange_intersect): Same.
28633 (irange::intersect): Same.
28634 (irange::invert): Same.
28635 (ranges_from_anti_range): Delete.
28636 (gt_pch_nx): Adjust for legacy removal.
28638 (range_tests_legacy): Delete.
28639 (range_tests_misc): Adjust for legacy removal.
28640 (range_tests): Same.
28641 * value-range.h (class irange): Same.
28642 (irange::legacy_mode_p): Delete.
28643 (ranges_from_anti_range): Delete.
28644 (irange::nonzero_p): Adjust for legacy removal.
28645 (irange::lower_bound): Same.
28646 (irange::upper_bound): Same.
28647 (irange::union_): Same.
28648 (irange::intersect): Same.
28649 (irange::set_nonzero): Same.
28650 (irange::set_zero): Same.
28651 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
28653 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28655 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
28656 of range_has_numeric_bounds_p with irange API.
28657 (range_has_numeric_bounds_p): Delete.
28658 * value-range.h (range_has_numeric_bounds_p): Delete.
28660 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28662 * tree-data-ref.cc (compute_distributive_range): Replace uses of
28663 range_int_cst_p with irange API.
28664 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
28665 * tree-vrp.h (range_int_cst_p): Delete.
28666 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
28667 range_int_cst_p with irange API.
28668 (vr_set_zero_nonzero_bits): Same.
28669 (range_fits_type_p): Same.
28670 (simplify_using_ranges::simplify_casted_cond): Same.
28671 * tree-vrp.cc (range_int_cst_p): Remove.
28673 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28675 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
28677 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28679 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
28680 API uses to new API.
28681 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
28682 * internal-fn.cc (get_min_precision): Same.
28684 * tree-affine.cc (expr_to_aff_combination): Same.
28685 * tree-data-ref.cc (dr_step_indicator): Same.
28686 * tree-dfa.cc (get_ref_base_and_extent): Same.
28687 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
28688 * tree-ssa-phiopt.cc (two_value_replacement): Same.
28689 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
28690 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
28691 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
28692 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
28693 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
28694 * tree.cc (get_range_pos_neg): Same.
28696 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28698 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
28699 vrange::dump instead of ad-hoc dumper.
28700 * tree-ssa-strlen.cc (dump_strlen_info): Same.
28701 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
28704 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28706 * range-op.cc (operator_cast::op1_range): Use
28707 create_possibly_reversed_range.
28708 (operator_bitwise_and::simple_op1_range_solver): Same.
28709 * value-range.cc (swap_out_of_order_endpoints): Delete.
28710 (irange::set): Remove call to swap_out_of_order_endpoints.
28712 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28714 * builtins.cc (determine_block_size): Convert use of legacy API to
28716 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
28717 (array_bounds_checker::check_array_ref): Same.
28718 * gimple-ssa-warn-restrict.cc
28719 (builtin_memref::extend_offset_range): Same.
28720 * ipa-cp.cc (ipcp_store_vr_results): Same.
28721 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
28722 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
28723 (ipa_write_jump_function): Same.
28724 * pointer-query.cc (get_size_range): Same.
28725 * tree-data-ref.cc (split_constant_offset): Same.
28726 * tree-ssa-strlen.cc (get_range): Same.
28727 (maybe_diag_stxncpy_trunc): Same.
28728 (strlen_pass::get_len_or_size): Same.
28729 (strlen_pass::count_nonzero_bytes_addr): Same.
28730 * tree-vect-patterns.cc (vect_get_range_info): Same.
28731 * value-range.cc (irange::maybe_anti_range): Remove.
28732 (get_legacy_range): New.
28733 (irange::copy_to_legacy): Use get_legacy_range.
28734 (ranges_from_anti_range): Same.
28735 * value-range.h (class irange): Remove maybe_anti_range.
28736 (get_legacy_range): New.
28737 * vr-values.cc (check_for_binary_op_overflow): Convert use of
28738 legacy API to get_legacy_range.
28739 (compare_ranges): Same.
28740 (compare_range_with_value): Same.
28741 (bounds_of_var_in_loop): Same.
28742 (find_case_label_ranges): Same.
28743 (simplify_using_ranges::simplify_switch_using_ranges): Same.
28745 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28747 * value-range-pretty-print.cc (vrange_printer::visit): Remove
28749 * value-range.cc (irange::constant_p): Remove.
28750 (irange::get_nonzero_bits_from_range): Remove constant_p use.
28751 * value-range.h (class irange): Remove constant_p.
28752 (irange::num_pairs): Remove constant_p use.
28754 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28756 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
28758 (irange::set): Same.
28759 (irange::legacy_lower_bound): Same.
28760 (irange::legacy_upper_bound): Same.
28761 (irange::contains_p): Same.
28762 (range_tests_legacy): Same.
28763 (irange::normalize_addresses): Remove.
28764 (irange::normalize_symbolics): Remove.
28765 (irange::symbolic_p): Remove.
28766 * value-range.h (class irange): Remove symbolic_p,
28767 normalize_symbolics, and normalize_addresses.
28768 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
28769 Remove symbolics support.
28771 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28773 * value-range.cc (irange::may_contain_p): Remove.
28774 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
28775 usage with contains_p.
28776 * vr-values.cc (compare_range_with_value): Same.
28778 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28780 * tree-vrp.cc (supported_types_p): Remove.
28781 (defined_ranges_p): Remove.
28782 (range_fold_binary_expr): Remove.
28783 (range_fold_unary_expr): Remove.
28784 * tree-vrp.h (range_fold_unary_expr): Remove.
28785 (range_fold_binary_expr): Remove.
28787 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28789 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
28790 (ipa_value_range_from_jfunc): Same.
28791 (propagate_vr_across_jump_function): Same.
28792 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
28793 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
28794 * vr-values.cc (bounds_of_var_in_loop): Same.
28796 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28798 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
28799 Add irange argument.
28800 (check_out_of_bounds_and_warn): Remove check for vr.
28801 (array_bounds_checker::check_array_ref): Remove pointer qualifier
28802 for vr and adjust accordingly.
28803 * gimple-array-bounds.h (get_value_range): Add irange argument.
28804 * value-query.cc (class equiv_allocator): Delete.
28805 (range_query::get_value_range): Delete.
28806 (range_query::range_query): Remove allocator access.
28807 (range_query::~range_query): Same.
28808 * value-query.h (get_value_range): Delete.
28810 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
28811 call to get_value_range.
28812 (check_for_binary_op_overflow): Same.
28813 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
28814 (simplify_using_ranges::simplify_abs_using_ranges): Same.
28815 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
28816 (simplify_using_ranges::simplify_casted_cond): Same.
28817 (simplify_using_ranges::simplify_switch_using_ranges): Same.
28818 (simplify_using_ranges::two_valued_val_range_p): Same.
28820 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28823 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
28825 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
28826 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
28827 (simplify_using_ranges::legacy_fold_cond): ...this.
28828 (simplify_using_ranges::fold_cond): Rename
28829 vrp_evaluate_conditional_warnv_with_ops to
28830 legacy_fold_cond_overflow.
28831 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
28832 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
28833 legacy_fold_cond_overflow respectively.
28835 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28837 * vr-values.cc (get_vr_for_comparison): Remove.
28838 (compare_name_with_value): Same.
28839 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
28840 compare_name_with_value.
28841 * vr-values.h: Remove compare_name_with_value.
28842 Remove get_vr_for_comparison.
28844 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
28846 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
28847 (bswapsi2): New define_insn.
28848 (swaphi): New define_insn to exchange two registers (swpw).
28849 (define_peephole2): Recognize exchange of registers as swaphi.
28851 2023-04-26 Richard Biener <rguenther@suse.de>
28853 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
28855 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
28856 * predict.cc (apply_return_prediction): Likewise.
28857 * sese.cc (set_ifsese_condition): Likewise. Simplify.
28858 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
28859 (make_edges_bb): Likewise.
28860 (make_cond_expr_edges): Likewise.
28861 (end_recording_case_labels): Likewise.
28862 (make_gimple_asm_edges): Likewise.
28863 (cleanup_dead_labels): Likewise.
28864 (group_case_labels): Likewise.
28865 (gimple_can_merge_blocks_p): Likewise.
28866 (gimple_merge_blocks): Likewise.
28867 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
28868 (gimple_duplicate_sese_tail): Avoid last_stmt.
28869 (find_loop_dist_alias): Likewise.
28870 (gimple_block_ends_with_condjump_p): Likewise.
28871 (gimple_purge_dead_eh_edges): Likewise.
28872 (gimple_purge_dead_abnormal_call_edges): Likewise.
28873 (pass_warn_function_return::execute): Likewise.
28874 (execute_fixup_cfg): Likewise.
28875 * tree-eh.cc (redirect_eh_edge_1): Likewise.
28876 (pass_lower_resx::execute): Likewise.
28877 (pass_lower_eh_dispatch::execute): Likewise.
28878 (cleanup_empty_eh): Likewise.
28879 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
28880 (predicate_bbs): Likewise.
28881 (ifcvt_split_critical_edges): Likewise.
28882 * tree-loop-distribution.cc (create_edge_for_control_dependence):
28884 (loop_distribution::transform_reduction_loop): Likewise.
28885 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
28886 (try_transform_to_exit_first_loop_alt): Likewise.
28887 (transform_to_exit_first_loop): Likewise.
28888 (create_parallel_loop): Likewise.
28889 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
28890 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
28891 (eliminate_unnecessary_stmts): Likewise.
28893 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
28895 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
28896 (pass_tree_ifcombine::execute): Likewise.
28897 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
28898 (should_duplicate_loop_header_p): Likewise.
28899 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
28900 (tree_estimate_loop_size): Likewise.
28901 (try_unroll_loop_completely): Likewise.
28902 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
28903 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
28904 (canonicalize_loop_ivs): Likewise.
28905 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
28906 (bound_difference): Likewise.
28907 (number_of_iterations_popcount): Likewise.
28908 (number_of_iterations_cltz): Likewise.
28909 (number_of_iterations_cltz_complement): Likewise.
28910 (simplify_using_initial_conditions): Likewise.
28911 (number_of_iterations_exit_assumptions): Likewise.
28912 (loop_niter_by_eval): Likewise.
28913 (estimate_numbers_of_iterations): Likewise.
28915 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28917 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
28919 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
28922 * config/rs6000/rs6000-builtins.def
28923 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
28924 __builtin_vsx_scalar_cmp_exp_qp_lt,
28925 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
28928 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
28931 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
28932 easy_vector_constant with const_vector_each_byte_same, add
28933 handlings in preparation for !easy_vector_constant, and update
28934 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
28935 * config/rs6000/predicates.md (const_vector_each_byte_same): New
28938 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28940 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
28941 (*pred_ltge<mode>_merge_tie_mask): Ditto.
28942 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
28943 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
28944 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
28945 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
28946 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
28948 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28950 * config/riscv/vector.md: Fix redundant vmv1r.v.
28952 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28954 * config/riscv/vector.md: Fix RA constraint.
28956 2023-04-26 Pan Li <pan2.li@intel.com>
28959 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
28960 check for vn_reference equal.
28962 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28964 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
28965 auto-vectorization preference.
28966 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
28967 auto-vectorization.
28968 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
28970 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
28972 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
28973 and bclridisi_nottwobits patterns.
28974 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
28975 predicate to avoid splitting arith constants.
28976 (const_nottwobits_not_arith_operand): New predicate.
28978 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
28980 * recog.cc (peep2_attempt, peep2_update_life): Correct
28981 head-comment description of parameter match_len.
28983 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
28985 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
28986 riscv_split_symbol() drop in_splitter arg.
28987 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
28988 riscv_split_symbol() drop in_splitter arg.
28989 riscv_force_temporary() drop in_splitter arg.
28990 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
28991 riscv_split_symbol() drop in_splitter arg.
28993 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
28995 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
28996 superfluous debug temporaries for single GIMPLE assignments.
28998 2023-04-25 Richard Biener <rguenther@suse.de>
29000 PR tree-optimization/109609
29001 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
29003 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
29004 the size given by arg_max_access_size_given_by_arg_p as
29005 maximum, not exact, size.
29007 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29010 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
29011 (orn<mode>3<vczle><vczbe>): ... This.
29012 (bic<mode>3): Rename to...
29013 (bic<mode>3<vczle><vczbe>): ... This.
29014 (<su><maxmin><mode>3): Rename to...
29015 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
29017 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29019 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
29020 * config/aarch64/iterators.md (VQDIV): New mode iterator.
29021 (vnx2di): New mode attribute.
29023 2023-04-25 Richard Biener <rguenther@suse.de>
29025 PR rtl-optimization/109585
29026 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
29028 2023-04-25 Jakub Jelinek <jakub@redhat.com>
29031 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
29032 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
29033 is larger than signed int maximum.
29035 2023-04-25 Martin Liska <mliska@suse.cz>
29037 * doc/gcov.texi: Document the new "calls" field and document
29038 the API bump. Mention also "block_ids" for lines.
29039 * gcov.cc (output_intermediate_json_line): Output info about
29040 calls and extend branches as well.
29041 (generate_results): Bump version to 2.
29042 (output_line_details): Use block ID instead of a non-sensual
29045 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
29047 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
29048 length attribute for the first (memory operand) alternative.
29050 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
29052 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
29053 * config/aarch64/constraints.md: Make "Umn" relaxed memory
29055 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
29057 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
29059 * value-range.cc (frange::set): Adjust constructor.
29060 * value-range.h (nan_state::nan_state): Replace default
29061 constructor with one taking an argument.
29063 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
29065 * ipa-cp.cc (ipa_range_contains_p): New.
29066 (decide_whether_version_node): Use it.
29068 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29070 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
29071 simplify two successive VEC_PERM_EXPRs with same VLA mask,
29072 where mask chooses elements in reverse order.
29074 2023-04-24 Andrew Pinski <apinski@marvell.com>
29076 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
29077 and support diamond shaped basic block form.
29078 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
29080 2023-04-24 Andrew Pinski <apinski@marvell.com>
29082 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
29083 Instead of calling last_and_only_stmt, look for the last statement
29086 2023-04-24 Andrew Pinski <apinski@marvell.com>
29088 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
29090 (match_simplify_replacement): Call
29091 empty_bb_or_one_feeding_into_p instead of doing it inline.
29093 2023-04-24 Andrew Pinski <apinski@marvell.com>
29095 PR tree-optimization/68894
29096 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
29097 continue for the do_hoist_loads diamond case.
29099 2023-04-24 Andrew Pinski <apinski@marvell.com>
29101 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
29102 code for better code readability.
29104 2023-04-24 Andrew Pinski <apinski@marvell.com>
29106 PR tree-optimization/109604
29107 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
29108 diamond form check from ...
29109 (minmax_replacement): Here.
29111 2023-04-24 Patrick Palka <ppalka@redhat.com>
29113 * tree.cc (strip_array_types): Don't define here.
29114 (is_typedef_decl): Don't define here.
29115 (typedef_variant_p): Don't define here.
29116 * tree.h (strip_array_types): Define here.
29117 (is_typedef_decl): Define here.
29118 (typedef_variant_p): Define here.
29120 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
29122 * doc/generic.texi (OpenMP): Add != to allowed
29123 conditions and state that vars can be unsigned.
29124 * tree.def (OMP_FOR): Likewise.
29126 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29128 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
29130 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
29132 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
29133 Remove explicit Solaris 11 references.
29135 (Options specification, --with-gnu-as): as and gas always differ
29137 Remove /usr/ccs/bin reference.
29138 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
29139 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
29140 (*-*-solaris2*): ... here.
29141 Update bundled GCC versions.
29142 Don't refer to pre-built binaries.
29143 Remove /bin/sh warning.
29144 Update assembler, linker recommendations.
29145 Document GNAT bootstrap compiler.
29146 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
29147 (sparc64-*-solaris2*): Move content...
29148 (sparcv9-*-solaris2*): ...here.
29149 Add GDC for 64-bit bootstrap compilers.
29151 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29154 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
29156 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
29159 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29161 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
29162 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
29163 (aarch64_<su>abal2<mode>): New define_expand.
29164 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
29165 (aarch64_rtx_costs): Handle ABD rtxes.
29166 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
29167 * config/aarch64/iterators.md (ABAL2): Delete.
29168 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
29170 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29172 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
29173 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
29174 (<sur>sadv16qi): Rename to...
29175 (<su>sadv16qi): ... This. Adjust for the above.
29176 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
29177 (<su>sad<vsi2qi>): ... This. Adjust for the above.
29178 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
29179 * config/aarch64/iterators.md (ABAL): Delete.
29180 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
29182 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29184 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
29185 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
29186 (aarch64_<su>abdl2<mode>): New define_expand.
29187 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
29188 * config/aarch64/iterators.md (ABDL2): Delete.
29189 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
29191 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29193 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
29194 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
29196 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
29197 * config/aarch64/iterators.md (ABDL): Delete.
29198 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
29200 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29202 * config/aarch64/aarch64-simd.md
29203 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
29205 2023-04-24 Richard Biener <rguenther@suse.de>
29207 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
29209 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
29211 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
29212 (set_switch_stmt_execution_predicate): Likewise.
29213 (phi_result_unknown_predicate): Likewise.
29214 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
29215 (ipa_analyze_indirect_call_uses): Likewise.
29216 * predict.cc (predict_iv_comparison): Likewise.
29217 (predict_extra_loop_exits): Likewise.
29218 (predict_loops): Likewise.
29219 (tree_predict_by_opcode): Likewise.
29220 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
29222 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
29223 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
29224 (replace_phi_edge_with_variable): Likewise.
29225 (two_value_replacement): Likewise.
29226 (value_replacement): Likewise.
29227 (minmax_replacement): Likewise.
29228 (spaceship_replacement): Likewise.
29229 (cond_removal_in_builtin_zero_pattern): Likewise.
29230 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
29231 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
29232 (vn_phi_lookup): Likewise.
29233 (vn_phi_insert): Likewise.
29234 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
29235 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
29237 (back_threader_profitability::possibly_profitable_path_p):
29239 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
29241 * tree-switch-conversion.cc (pass_convert_switch::execute):
29243 (pass_lower_switch<O0>::execute): Likewise.
29244 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
29245 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
29246 * tree-vect-slp.cc (vect_slp_function): Likewise.
29247 * tree-vect-stmts.cc (cfun_returns): Likewise.
29248 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
29249 (vect_loop_dist_alias_call): Likewise.
29251 2023-04-24 Richard Biener <rguenther@suse.de>
29253 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
29255 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29257 * config/riscv/riscv-vsetvl.cc
29258 (vector_infos_manager::all_avail_in_compatible_p): New function.
29259 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
29260 * config/riscv/riscv-vsetvl.h: New function.
29262 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29264 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
29265 comment for cleanup_insns.
29267 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29269 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
29270 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
29271 with the fault first load property.
29273 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29275 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
29276 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
29278 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29281 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
29282 (aarch64_addp<mode><vczle><vczbe>): ... This.
29284 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
29286 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
29287 provide reasonable values for common arithmetic operations and
29288 immediate operands (in several machine modes).
29290 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
29292 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
29293 format specifier to output high_part register name of SImode reg.
29294 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
29295 (zero_extendqihi2): Fix lengths, consistent formatting and add
29296 "and Rx,#255" alternative, for documentation purposes.
29297 (zero_extendhisi2): New define_insn.
29299 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
29301 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
29302 SImode shifts by two by performing a single bit SImode shift twice.
29304 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
29306 PR tree-optimization/109593
29307 * value-range.cc (frange::operator==): Handle NANs.
29309 2023-04-23 liuhongt <hongtao.liu@intel.com>
29311 PR rtl-optimization/108707
29312 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
29313 GENERAL_REGS when preferred reg_class is not known.
29315 2023-04-22 Andrew Pinski <apinski@marvell.com>
29317 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
29318 Change the code around slightly to move diamond
29319 handling for do_store_elim/do_hoist_loads out of
29322 2023-04-22 Andrew Pinski <apinski@marvell.com>
29324 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
29325 Remove check on empty_block_p.
29327 2023-04-22 Jakub Jelinek <jakub@redhat.com>
29329 PR bootstrap/109589
29330 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
29331 * realmpfr.h (class auto_mpfr): Likewise.
29333 2023-04-22 Jakub Jelinek <jakub@redhat.com>
29335 PR tree-optimization/109583
29336 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
29337 if vec_mode is not VECTOR_MODE_P.
29339 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
29340 Ondrej Kubanek <kubanek0ondrej@gmail.com>
29342 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
29343 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
29344 loop profile and bounds after header duplication.
29345 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
29346 Break out from try_peel_loop; fix handling of 0 iterations.
29347 (try_peel_loop): Use adjust_loop_info_after_peeling.
29349 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
29351 PR tree-optimization/109546
29352 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
29353 not fold conditions with ADDR_EXPR early.
29355 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29357 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
29358 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
29360 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
29361 (*aarch64_<optab><mode>3_zero): Define.
29362 (*aarch64_<optab><mode>3_cssc): Likewise.
29363 * config/aarch64/iterators.md (maxminand): New code attribute.
29365 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29368 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
29369 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
29371 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
29372 (aarch64_override_options_internal): Handle the above.
29373 (aarch64_output_load_tp): New function.
29374 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
29375 aarch64_output_load_tp.
29376 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
29377 (mtp=): New option.
29378 * doc/invoke.texi (AArch64 Options): Document -mtp=.
29380 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29383 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
29384 (add_vec_concat_subst_be): Likewise.
29387 (add<mode>3): Rename to...
29388 (add<mode>3<vczle><vczbe>): ... This.
29389 (sub<mode>3): Rename to...
29390 (sub<mode>3<vczle><vczbe>): ... This.
29391 (mul<mode>3): Rename to...
29392 (mul<mode>3<vczle><vczbe>): ... This.
29393 (and<mode>3): Rename to...
29394 (and<mode>3<vczle><vczbe>): ... This.
29395 (ior<mode>3): Rename to...
29396 (ior<mode>3<vczle><vczbe>): ... This.
29397 (xor<mode>3): Rename to...
29398 (xor<mode>3<vczle><vczbe>): ... This.
29399 * config/aarch64/iterators.md (VDZ): Define.
29401 2023-04-21 Patrick Palka <ppalka@redhat.com>
29403 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
29406 2023-04-21 Jan Hubicka <jh@suse.cz>
29408 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
29411 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
29413 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
29414 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
29416 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29418 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
29419 force_reg instead of copy_to_mode_reg.
29420 (aarch64_expand_vector_init): Likewise.
29422 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
29424 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
29425 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
29426 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
29427 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
29428 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
29429 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
29430 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
29431 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
29432 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
29433 * config/i386/predicates.md (index_register_operand):
29434 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
29435 * config/i386/i386.cc (ix86_legitimate_address_p): Use
29436 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
29437 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
29439 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
29440 Ondrej Kubanek <kubanek0ondrej@gmail.com>
29442 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
29445 2023-04-21 Richard Biener <rguenther@suse.de>
29447 * is-a.h (safe_is_a): New.
29449 2023-04-21 Richard Biener <rguenther@suse.de>
29451 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
29452 (gphi_iterator::operator*): Likewise.
29454 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
29455 Michal Jires <michal@jires.eu>
29457 * ipa-inline.cc (class inline_badness): New class.
29458 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
29460 (update_edge_key): Update.
29461 (lookup_recursive_calls): Likewise.
29462 (recursive_inlining): Likewise.
29463 (add_new_edges_to_heap): Likewise.
29464 (inline_small_functions): Likewise.
29466 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
29468 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
29470 2023-04-21 Richard Biener <rguenther@suse.de>
29472 PR tree-optimization/109573
29473 * tree-vect-loop.cc (vectorizable_live_operation): Allow
29474 unhandled SSA copy as well. Demote assert to checking only.
29476 2023-04-21 Richard Biener <rguenther@suse.de>
29478 * df-core.cc (df_analyze): Compute RPO on the reverse graph
29479 for DF_BACKWARD problems.
29480 (loop_post_order_compute): Rename to ...
29481 (loop_rev_post_order_compute): ... this, compute a RPO.
29482 (loop_inverted_post_order_compute): Rename to ...
29483 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
29484 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
29485 problems, RPO on the inverted graph for DF_BACKWARD.
29487 2023-04-21 Richard Biener <rguenther@suse.de>
29489 * cfganal.h (inverted_rev_post_order_compute): Rename
29491 (inverted_post_order_compute): ... this. Add struct function
29492 argument, change allocation to a C array.
29493 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
29494 * lcm.cc (compute_antinout_edge): Adjust.
29495 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
29496 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
29497 * tree-ssa-pre.cc (compute_antic): Likewise.
29499 2023-04-21 Richard Biener <rguenther@suse.de>
29501 * df.h (df_d::postorder_inverted): Change back to int *,
29503 * df-core.cc (rest_of_handle_df_finish): Adjust.
29504 (df_analyze_1): Likewise.
29505 (df_analyze): For DF_FORWARD problems use RPO on the forward
29507 (loop_inverted_post_order_compute): Adjust API.
29508 (df_analyze_loop): Adjust.
29509 (df_get_n_blocks): Likewise.
29510 (df_get_postorder): Likewise.
29512 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29515 * config/riscv/riscv-vsetvl.cc
29516 (vector_infos_manager::all_empty_predecessor_p): New function.
29517 (pass_vsetvl::backward_demand_fusion): Ditto.
29518 * config/riscv/riscv-vsetvl.h: Ditto.
29520 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
29523 * config/riscv/generic.md: Change standard names to insn names.
29525 2023-04-21 Richard Biener <rguenther@suse.de>
29527 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
29528 (compute_laterin): Use RPO.
29529 (compute_available): Likewise.
29531 2023-04-21 Peng Fan <fanpeng@loongson.cn>
29533 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
29535 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29538 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
29539 (vector_insn_info::skip_avl_compatible_p): Ditto.
29540 (vector_insn_info::merge): Remove default value.
29541 (pass_vsetvl::compute_local_backward_infos): Ditto.
29542 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
29543 * config/riscv/riscv-vsetvl.h: Ditto.
29545 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
29547 * doc/extend.texi (Common Function Attributes): Remove duplicate
29550 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
29552 PR tree-optimization/109564
29553 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
29554 UNDEFINED range names when deciding if all PHI arguments are the same,
29556 2023-04-20 Jakub Jelinek <jakub@redhat.com>
29558 PR tree-optimization/109011
29559 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
29560 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
29561 .CTZ (X) = PREC - .POPCOUNT (X | -X).
29563 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
29565 * lra-constraints.cc (match_reload): Exclude some hard regs for
29566 multi-reg inout reload pseudos used in asm in different mode.
29568 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
29570 * config/arm/arm.cc (thumb1_legitimate_address_p):
29571 Use VIRTUAL_REGISTER_P predicate.
29572 (arm_eliminable_register): Ditto.
29573 * config/avr/avr.md (push<mode>_1): Ditto.
29574 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
29575 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
29576 * config/i386/predicates.md (register_no_elim_operand): Ditto.
29577 * config/iq2000/predicates.md (call_insn_operand): Ditto.
29578 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
29580 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
29583 * config/i386/predicates.md (extract_operator): New predicate.
29584 * config/i386/i386.md (any_extract): Remove code iterator.
29585 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
29586 (*cmpqi_ext<mode>_1): Ditto.
29587 (*cmpqi_ext<mode>_2): Ditto.
29588 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
29589 (*cmpqi_ext<mode>_3): Ditto.
29590 (*cmpqi_ext<mode>_4): Ditto.
29591 (*extzvqi_mem_rex64): Ditto.
29593 (*insvqi_2): Ditto.
29594 (*extendqi<SWI24:mode>_ext_1): Ditto.
29595 (*addqi_ext<mode>_0): Ditto.
29596 (*addqi_ext<mode>_1): Ditto.
29597 (*addqi_ext<mode>_2): Ditto.
29598 (*subqi_ext<mode>_0): Ditto.
29599 (*subqi_ext<mode>_2): Ditto.
29600 (*testqi_ext<mode>_1): Ditto.
29601 (*testqi_ext<mode>_2): Ditto.
29602 (*andqi_ext<mode>_0): Ditto.
29603 (*andqi_ext<mode>_1): Ditto.
29604 (*andqi_ext<mode>_1_cc): Ditto.
29605 (*andqi_ext<mode>_2): Ditto.
29606 (*<any_or:code>qi_ext<mode>_0): Ditto.
29607 (*<any_or:code>qi_ext<mode>_1): Ditto.
29608 (*<any_or:code>qi_ext<mode>_2): Ditto.
29609 (*xorqi_ext<mode>_1_cc): Ditto.
29610 (*negqi_ext<mode>_2): Ditto.
29611 (*ashlqi_ext<mode>_2): Ditto.
29612 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
29614 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
29617 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
29618 <bitmanip_insn> as the type to allow for fine grained control of
29619 scheduling these insns.
29620 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
29622 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
29623 pcnt, signed and unsigned min/max.
29625 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29626 kito-cheng <kito.cheng@sifive.com>
29628 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
29630 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29631 kito-cheng <kito.cheng@sifive.com>
29634 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
29635 (pass_vsetvl::cleanup_insns): Fix bug.
29637 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
29639 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
29640 (ldexp<mode>3): Delete.
29641 (ldexp<mode>3<exec>): Change "B" to "A".
29643 2023-04-20 Jakub Jelinek <jakub@redhat.com>
29644 Jonathan Wakely <jwakely@redhat.com>
29646 * tree.h (built_in_function_equal_p): New helper function.
29647 (fndecl_built_in_p): Turn into variadic template to support
29648 1 or more built_in_function arguments.
29649 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
29650 * gimplify.cc (goa_stabilize_expr): Likewise.
29651 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
29652 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
29653 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
29654 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
29655 cgraph_update_edges_for_call_stmt_node,
29656 cgraph_edge::verify_corresponds_to_fndecl,
29657 cgraph_node::verify_node): Likewise.
29658 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
29659 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
29660 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
29662 2023-04-20 Jakub Jelinek <jakub@redhat.com>
29664 PR tree-optimization/109011
29665 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
29666 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
29667 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
29668 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
29669 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
29671 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
29673 2023-04-20 Richard Biener <rguenther@suse.de>
29675 * df-core.cc (rest_of_handle_df_initialize): Remove
29676 computation of df->postorder, df->postorder_inverted and
29679 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29681 * common/config/i386/i386-common.cc
29682 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
29683 (ix86_handle_option): Set AVX flag for VAES.
29684 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
29685 Add OPTION_MASK_ISA2_VAES_UNSET.
29686 (def_builtin): Share builtin between AES and VAES.
29687 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
29689 * config/i386/i386.md (aes): New isa attribute.
29690 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
29691 (aesenclast): Ditto.
29693 (aesdeclast): Ditto.
29694 * config/i386/vaesintrin.h: Remove redundant avx target push.
29695 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
29696 (_mm_aesdeclast_si128): Ditto.
29697 (_mm_aesenc_si128): Ditto.
29698 (_mm_aesenclast_si128): Ditto.
29700 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
29702 * config/i386/avx2intrin.h
29703 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
29704 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
29705 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
29706 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
29707 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
29708 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
29709 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
29710 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
29711 (_mm_reduce_add_epi16): New instrinsics.
29712 (_mm_reduce_mul_epi16): Ditto.
29713 (_mm_reduce_and_epi16): Ditto.
29714 (_mm_reduce_or_epi16): Ditto.
29715 (_mm_reduce_max_epi16): Ditto.
29716 (_mm_reduce_max_epu16): Ditto.
29717 (_mm_reduce_min_epi16): Ditto.
29718 (_mm_reduce_min_epu16): Ditto.
29719 (_mm256_reduce_add_epi16): Ditto.
29720 (_mm256_reduce_mul_epi16): Ditto.
29721 (_mm256_reduce_and_epi16): Ditto.
29722 (_mm256_reduce_or_epi16): Ditto.
29723 (_mm256_reduce_max_epi16): Ditto.
29724 (_mm256_reduce_max_epu16): Ditto.
29725 (_mm256_reduce_min_epi16): Ditto.
29726 (_mm256_reduce_min_epu16): Ditto.
29727 (_mm_reduce_add_epi8): Ditto.
29728 (_mm_reduce_mul_epi8): Ditto.
29729 (_mm_reduce_and_epi8): Ditto.
29730 (_mm_reduce_or_epi8): Ditto.
29731 (_mm_reduce_max_epi8): Ditto.
29732 (_mm_reduce_max_epu8): Ditto.
29733 (_mm_reduce_min_epi8): Ditto.
29734 (_mm_reduce_min_epu8): Ditto.
29735 (_mm256_reduce_add_epi8): Ditto.
29736 (_mm256_reduce_mul_epi8): Ditto.
29737 (_mm256_reduce_and_epi8): Ditto.
29738 (_mm256_reduce_or_epi8): Ditto.
29739 (_mm256_reduce_max_epi8): Ditto.
29740 (_mm256_reduce_max_epu8): Ditto.
29741 (_mm256_reduce_min_epi8): Ditto.
29742 (_mm256_reduce_min_epu8): Ditto.
29743 * config/i386/avx512vlbwintrin.h:
29744 (_mm_mask_reduce_add_epi16): Ditto.
29745 (_mm_mask_reduce_mul_epi16): Ditto.
29746 (_mm_mask_reduce_and_epi16): Ditto.
29747 (_mm_mask_reduce_or_epi16): Ditto.
29748 (_mm_mask_reduce_max_epi16): Ditto.
29749 (_mm_mask_reduce_max_epu16): Ditto.
29750 (_mm_mask_reduce_min_epi16): Ditto.
29751 (_mm_mask_reduce_min_epu16): Ditto.
29752 (_mm256_mask_reduce_add_epi16): Ditto.
29753 (_mm256_mask_reduce_mul_epi16): Ditto.
29754 (_mm256_mask_reduce_and_epi16): Ditto.
29755 (_mm256_mask_reduce_or_epi16): Ditto.
29756 (_mm256_mask_reduce_max_epi16): Ditto.
29757 (_mm256_mask_reduce_max_epu16): Ditto.
29758 (_mm256_mask_reduce_min_epi16): Ditto.
29759 (_mm256_mask_reduce_min_epu16): Ditto.
29760 (_mm_mask_reduce_add_epi8): Ditto.
29761 (_mm_mask_reduce_mul_epi8): Ditto.
29762 (_mm_mask_reduce_and_epi8): Ditto.
29763 (_mm_mask_reduce_or_epi8): Ditto.
29764 (_mm_mask_reduce_max_epi8): Ditto.
29765 (_mm_mask_reduce_max_epu8): Ditto.
29766 (_mm_mask_reduce_min_epi8): Ditto.
29767 (_mm_mask_reduce_min_epu8): Ditto.
29768 (_mm256_mask_reduce_add_epi8): Ditto.
29769 (_mm256_mask_reduce_mul_epi8): Ditto.
29770 (_mm256_mask_reduce_and_epi8): Ditto.
29771 (_mm256_mask_reduce_or_epi8): Ditto.
29772 (_mm256_mask_reduce_max_epi8): Ditto.
29773 (_mm256_mask_reduce_max_epu8): Ditto.
29774 (_mm256_mask_reduce_min_epi8): Ditto.
29775 (_mm256_mask_reduce_min_epu8): Ditto.
29777 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29779 * common/config/i386/i386-common.cc
29780 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
29781 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
29782 (OPTION_MASK_ISA_AVX_UNSET):
29783 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
29784 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
29785 * config/i386/i386.md (vpclmulqdqvl): New.
29786 * config/i386/sse.md (pclmulqdq): Add evex encoding.
29787 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
29790 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29792 * config/i386/avx512vlbwintrin.h
29793 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
29794 (_mm_mask_blend_epi8): Ditto.
29795 (_mm256_mask_blend_epi16): Ditto.
29796 (_mm256_mask_blend_epi8): Ditto.
29797 * config/i386/avx512vlintrin.h
29798 (_mm256_mask_blend_pd): Ditto.
29799 (_mm256_mask_blend_ps): Ditto.
29800 (_mm256_mask_blend_epi64): Ditto.
29801 (_mm256_mask_blend_epi32): Ditto.
29802 (_mm_mask_blend_pd): Ditto.
29803 (_mm_mask_blend_ps): Ditto.
29804 (_mm_mask_blend_epi64): Ditto.
29805 (_mm_mask_blend_epi32): Ditto.
29806 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
29807 (VF_AVX512HFBFVL): Move it before the first usage.
29808 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
29809 to VF_AVX512HFBFVL.
29811 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29813 * common/config/i386/i386-common.cc
29814 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
29815 to OPTION_MASK_ISA_AVX512BW_SET.
29816 (OPTION_MASK_ISA_AVX512F_UNSET):
29817 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
29818 (OPTION_MASK_ISA_AVX512BW_UNSET):
29819 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
29820 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
29821 * config/i386/avx512vbmi2vlintrin.h: Ditto.
29822 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
29823 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
29824 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
29825 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
29827 (compressstore<mode>_mask): Ditto.
29828 (expand<mode>_mask): Ditto.
29829 (expand<mode>_maskz): Ditto.
29830 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
29831 VI12_VI48F_AVX512VL.
29833 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29835 * common/config/i386/i386-common.cc
29836 (OPTION_MASK_ISA_AVX512BITALG_SET):
29837 Change OPTION_MASK_ISA_AVX512F_SET
29838 to OPTION_MASK_ISA_AVX512BW_SET.
29839 (OPTION_MASK_ISA_AVX512F_UNSET):
29840 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
29841 (OPTION_MASK_ISA_AVX512BW_UNSET):
29842 Add OPTION_MASK_ISA_AVX512BITALG_SET.
29843 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
29844 * config/i386/i386-builtin.def:
29845 Remove redundant OPTION_MASK_ISA_AVX512BW.
29846 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
29847 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
29848 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
29850 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29852 * config/i386/i386-expand.cc
29853 (ix86_check_builtin_isa_match): Correct wrong comments.
29854 Add a new macro SHARE_BUILTIN and refactor the current if
29857 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
29859 * config/i386/cpuid.h: Open a new section for Extended Features
29860 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
29863 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
29865 * config/i386/sse.md: Modify insn vperm{i,f}
29868 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
29870 * config/xtensa/xtensa-opts.h: New header.
29871 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
29872 xtensa_strict_align.
29873 * config/xtensa/xtensa.cc (xtensa_option_override): When
29874 -m[no-]strict-align is not specified in the command line set
29875 xtensa_strict_align to 0 if the hardware supports both unaligned
29876 loads and stores or to 1 otherwise.
29877 * config/xtensa/xtensa.opt (mstrict-align): New option.
29878 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
29880 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
29882 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
29885 2023-04-19 Andrew Pinski <apinski@marvell.com>
29887 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
29889 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29891 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
29892 (VECTOR_BOOL_MODE): Ditto.
29893 (ADJUST_NUNITS): Ditto.
29894 (ADJUST_ALIGNMENT): Ditto.
29895 (ADJUST_BYTESIZE): Ditto.
29896 (ADJUST_PRECISION): Ditto.
29897 (RVV_MODES): Ditto.
29898 (VECTOR_MODE_WITH_PREFIX): Ditto.
29899 * config/riscv/riscv-v.cc (ENTRY): Ditto.
29900 (get_vlmul): Ditto.
29901 (get_ratio): Ditto.
29902 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
29903 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
29904 (vbool64_t): Ditto.
29905 (vbool32_t): Ditto.
29906 (vbool16_t): Ditto.
29911 (vint8mf8_t): Ditto.
29912 (vuint8mf8_t): Ditto.
29913 (vint8mf4_t): Ditto.
29914 (vuint8mf4_t): Ditto.
29915 (vint8mf2_t): Ditto.
29916 (vuint8mf2_t): Ditto.
29917 (vint8m1_t): Ditto.
29918 (vuint8m1_t): Ditto.
29919 (vint8m2_t): Ditto.
29920 (vuint8m2_t): Ditto.
29921 (vint8m4_t): Ditto.
29922 (vuint8m4_t): Ditto.
29923 (vint8m8_t): Ditto.
29924 (vuint8m8_t): Ditto.
29925 (vint16mf4_t): Ditto.
29926 (vuint16mf4_t): Ditto.
29927 (vint16mf2_t): Ditto.
29928 (vuint16mf2_t): Ditto.
29929 (vint16m1_t): Ditto.
29930 (vuint16m1_t): Ditto.
29931 (vint16m2_t): Ditto.
29932 (vuint16m2_t): Ditto.
29933 (vint16m4_t): Ditto.
29934 (vuint16m4_t): Ditto.
29935 (vint16m8_t): Ditto.
29936 (vuint16m8_t): Ditto.
29937 (vint32mf2_t): Ditto.
29938 (vuint32mf2_t): Ditto.
29939 (vint32m1_t): Ditto.
29940 (vuint32m1_t): Ditto.
29941 (vint32m2_t): Ditto.
29942 (vuint32m2_t): Ditto.
29943 (vint32m4_t): Ditto.
29944 (vuint32m4_t): Ditto.
29945 (vint32m8_t): Ditto.
29946 (vuint32m8_t): Ditto.
29947 (vint64m1_t): Ditto.
29948 (vuint64m1_t): Ditto.
29949 (vint64m2_t): Ditto.
29950 (vuint64m2_t): Ditto.
29951 (vint64m4_t): Ditto.
29952 (vuint64m4_t): Ditto.
29953 (vint64m8_t): Ditto.
29954 (vuint64m8_t): Ditto.
29955 (vfloat32mf2_t): Ditto.
29956 (vfloat32m1_t): Ditto.
29957 (vfloat32m2_t): Ditto.
29958 (vfloat32m4_t): Ditto.
29959 (vfloat32m8_t): Ditto.
29960 (vfloat64m1_t): Ditto.
29961 (vfloat64m2_t): Ditto.
29962 (vfloat64m4_t): Ditto.
29963 (vfloat64m8_t): Ditto.
29964 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
29965 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
29966 (riscv_convert_vector_bits): Ditto.
29967 * config/riscv/riscv.md:
29968 * config/riscv/vector-iterators.md:
29969 * config/riscv/vector.md
29970 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
29971 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
29972 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
29973 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
29974 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
29975 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
29976 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
29977 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
29978 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
29980 2023-04-19 Pan Li <pan2.li@intel.com>
29982 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
29983 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
29985 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
29989 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
29990 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
29991 for operand 0. Use any_extract code iterator.
29992 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
29993 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
29994 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
29995 (*cmpqi_ext<mode>_1): Use general_operand predicate
29996 for operand 1. Use any_extract code iterator.
29997 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
29998 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
30000 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30002 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
30003 (aarch64_uaddw2<mode>): Delete.
30004 (aarch64_ssubw2<mode>): Delete.
30005 (aarch64_usubw2<mode>): Delete.
30006 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
30008 2023-04-19 Richard Biener <rguenther@suse.de>
30010 * tree-ssa-structalias.cc (do_ds_constraint): Use
30011 solve_add_graph_edge.
30013 2023-04-19 Richard Biener <rguenther@suse.de>
30015 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
30017 (do_sd_constraint): ... here.
30019 2023-04-19 Richard Biener <rguenther@suse.de>
30021 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
30022 rejecting the merge when A contains only a non-local label.
30024 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
30026 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
30027 (VIRTUAL_REGISTER_NUM_P): Ditto.
30028 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
30029 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
30030 * function.cc (instantiate_decl_rtl): Ditto.
30031 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
30032 (nonzero_address_p): Ditto.
30033 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
30035 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
30037 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
30039 2023-04-19 Richard Biener <rguenther@suse.de>
30041 * system.h (auto_mpz::operator->()): New.
30042 * realmpfr.h (auto_mpfr::operator->()): New.
30043 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
30044 * real.cc (real_from_string): Likewise.
30045 (dconst_e_ptr): Likewise.
30046 (dconst_sqrt2_ptr): Likewise.
30047 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
30049 (bound_difference_of_offsetted_base): Likewise.
30050 (number_of_iterations_ne): Likewise.
30051 (number_of_iterations_lt_to_ne): Likewise.
30052 * ubsan.cc: Include realmpfr.h.
30053 (ubsan_instrument_float_cast): Use auto_mpfr.
30055 2023-04-19 Richard Biener <rguenther@suse.de>
30057 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
30058 edges, remove edges from escaped after special-casing them.
30060 2023-04-19 Richard Biener <rguenther@suse.de>
30062 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
30065 2023-04-19 Richard Biener <rguenther@suse.de>
30067 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
30068 to the LHS varinfo solution member.
30070 2023-04-19 Richard Biener <rguenther@suse.de>
30072 * tree-ssa-structalias.cc (topo_visit): Look at the real
30073 destination of edges.
30075 2023-04-19 Richard Biener <rguenther@suse.de>
30077 PR tree-optimization/44794
30078 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
30079 If an epilogue loop is required set its iteration upper bound.
30081 2023-04-19 Xi Ruoyao <xry111@xry111.site>
30084 * config/loongarch/loongarch-protos.h
30085 (loongarch_expand_block_move): Add a parameter as alignment RTX.
30086 * config/loongarch/loongarch.h:
30087 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
30088 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
30089 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
30090 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
30091 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
30092 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
30093 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
30094 Take the alignment from the parameter, but set it to
30095 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
30096 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
30097 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
30098 (loongarch_block_move_straight): When there are left-over bytes,
30099 half the mode size instead of falling back to byte mode at once.
30100 (loongarch_block_move_loop): Limit the length of loop body with
30101 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
30102 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
30103 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
30104 to loongarch_expand_block_move.
30106 2023-04-19 Xi Ruoyao <xry111@xry111.site>
30108 * config/loongarch/loongarch.cc
30109 (loongarch_setup_incoming_varargs): Don't save more GARs than
30110 cfun->va_list_gpr_size / UNITS_PER_WORD.
30112 2023-04-19 Richard Biener <rguenther@suse.de>
30114 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
30115 no epilogue condition.
30117 2023-04-19 Richard Biener <rguenther@suse.de>
30119 * gimple.h (gimple_assign_load): Outline...
30120 * gimple.cc (gimple_assign_load): ... here. Avoid
30121 get_base_address and instead just strip the outermost
30122 handled component, treating a remaining handled component
30125 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30127 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
30129 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
30131 2023-04-19 Jakub Jelinek <jakub@redhat.com>
30133 PR tree-optimization/109011
30134 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
30135 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
30136 CLZ, CTZ and FFS. Remove vargs variable, use
30137 gimple_build_call_internal rather than gimple_build_call_internal_vec.
30138 (vect_vect_recog_func_ptrs): Adjust popcount entry.
30140 2023-04-19 Jakub Jelinek <jakub@redhat.com>
30143 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
30144 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
30145 a new REG rather than the SUBREG.
30147 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
30149 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
30152 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30155 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
30156 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
30158 2023-04-19 Richard Biener <rguenther@suse.de>
30160 PR rtl-optimization/109237
30161 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
30162 TREE_VISITED on INSN_VAR_LOCATION_DECL.
30163 (delete_trivially_dead_insns): Maintain TREE_VISITED on
30164 active debug bind INSN_VAR_LOCATION_DECL.
30166 2023-04-19 Richard Biener <rguenther@suse.de>
30168 PR rtl-optimization/109237
30169 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
30171 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
30173 * doc/install.texi (enable-decimal-float): Add AArch64.
30175 2023-04-19 liuhongt <hongtao.liu@intel.com>
30177 PR rtl-optimization/109351
30178 * ira.cc (setup_class_subset_and_memory_move_costs): Check
30179 hard_regno_mode_ok before setting lowest memory move cost for
30180 the mode with different reg classes.
30182 2023-04-18 Jason Merrill <jason@redhat.com>
30184 * doc/invoke.texi: Remove stray @gol.
30186 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
30188 * ifcvt.cc (cond_move_process_if_block): Consider the result of
30189 targetm.noce_conversion_profitable_p() when replacing the original
30190 sequence with the converted one.
30192 2023-04-18 Mark Harmstone <mark@harmstone.com>
30194 * common.opt (gcodeview): Add new option.
30195 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
30196 * opts.cc (command_handle_option): Similarly.
30197 * doc/invoke.texi: Add documentation for -gcodeview.
30199 2023-04-18 Andrew Pinski <apinski@marvell.com>
30201 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
30202 (make_pass_phiopt): Make execute out of line.
30203 (tree_ssa_cs_elim): Move code into ...
30204 (pass_cselim::execute): here.
30206 2023-04-18 Sam James <sam@gentoo.org>
30208 * system.h: Drop unused INCLUDE_PTHREAD_H.
30210 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
30212 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
30215 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
30217 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
30218 (bswapdi2, bswapsi2): Similarly.
30220 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
30223 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
30224 Use CODE_FOR_sse4_1_insertps_v4sf.
30225 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
30226 (expand_vec_perm_1): Call expand_vec_per_insertps.
30227 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
30228 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
30229 (@sse4_1_insertps_<mode>): New insn pattern.
30230 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
30231 pattern from sse4_1_insertps using VI4F_128 mode iterator.
30233 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30235 * value-range.cc (gt_ggc_mx): New.
30237 * value-range.h (class vrange): Add GTY marker.
30238 (class frange): Same.
30239 (gt_ggc_mx): Remove.
30240 (gt_pch_nx): Remove.
30242 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
30244 * lra-constraints.cc (constraint_unique): New.
30245 (process_address_1): Apply constraint_unique test.
30246 * recog.cc (constrain_operands): Allow relaxed memory
30249 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
30251 * doc/extend.texi (Target Builtins): Add RISC-V Vector
30253 (RISC-V Vector Intrinsics): Document GCC implemented which
30254 version of RISC-V vector intrinsics and its reference.
30256 2023-04-18 Richard Biener <rguenther@suse.de>
30258 PR middle-end/108786
30259 * bitmap.h (bitmap_clear_first_set_bit): New.
30260 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
30261 bitmap_first_set_bit and add optional clearing of the bit.
30262 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
30263 (bitmap_clear_first_set_bit): Likewise.
30264 * df-core.cc (df_worklist_dataflow_doublequeue): Use
30265 bitmap_clear_first_set_bit.
30266 * graphite-scop-detection.cc (scop_detection::merge_sese):
30268 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
30269 (sanitize_asan_mark_poison): Likewise.
30270 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
30271 * tree-into-ssa.cc (rewrite_blocks): Likewise.
30272 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
30273 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
30275 2023-04-18 Richard Biener <rguenther@suse.de>
30277 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
30278 (dump_sa_points_to_info): ... this function.
30279 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
30280 and call dump_sa_stats guarded with TDF_STATS.
30281 (ipa_pta_execute): Likewise.
30282 (compute_may_aliases): Guard dump_alias_info with
30283 TDF_DETAILS|TDF_ALIAS.
30285 2023-04-18 Andrew Pinski <apinski@marvell.com>
30287 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
30288 the expression that is being tried when TDF_FOLDING
30290 (phiopt_worker::match_simplify_replacement): Dump
30291 the sequence which was created by gimple_simplify_phiopt
30292 when TDF_FOLDING is true.
30294 2023-04-18 Andrew Pinski <apinski@marvell.com>
30296 * tree-ssa-phiopt.cc (match_simplify_replacement):
30297 Simplify code that does the movement slightly.
30299 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30301 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
30303 (rev16<mode>2): Rename to...
30304 (aarch64_rev16<mode>2_alt1): ... This.
30305 (rev16<mode>2_alt): Rename to...
30306 (*aarch64_rev16<mode>2_alt2): ... This.
30308 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30310 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
30311 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
30313 * range-op-float.cc (zero_range): Use dconstm0.
30314 (zero_to_inf_range): Same.
30315 * real.h (dconstm0): New.
30316 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
30317 (frange::set_zero): Do not declare dconstm0.
30319 2023-04-18 Richard Biener <rguenther@suse.de>
30321 * system.h (class auto_mpz): New,
30322 * realmpfr.h (class auto_mpfr): Likewise.
30323 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
30324 (do_mpfr_arg2): Likewise.
30325 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
30327 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30329 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
30330 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
30332 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30334 * value-range.cc (frange::operator==): Adjust for NAN.
30335 (range_tests_nan): Remove some NAN tests.
30337 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30339 * inchash.cc (hash::add_real_value): New.
30340 * inchash.h (class hash): Add add_real_value.
30341 * value-range.cc (add_vrange): New.
30342 * value-range.h (inchash::add_vrange): New.
30344 2023-04-18 Richard Biener <rguenther@suse.de>
30346 PR tree-optimization/109539
30347 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
30348 Re-implement pointer relatedness for PHIs.
30350 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
30352 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
30353 (SV_FP): New iterator.
30354 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
30355 (recip<mode>2): Unify the two patterns using SV_FP.
30356 (div_scale<mode><exec_vcc>): New insn.
30357 (div_fmas<mode><exec>): New insn.
30358 (div_fixup<mode><exec>): New insn.
30359 (div<mode>3): Unify the two expanders and rewrite using hardfp.
30360 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
30361 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
30362 and UNSPEC_DIV_FIXUP.
30363 (vccwait): New attribute.
30365 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30367 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
30368 if the argument matches that.
30370 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30372 * config/aarch64/atomics.md
30373 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
30374 Use SD_HSDI for destination mode iterator.
30376 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
30378 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
30379 of z-extensions and s-extensions.
30380 (riscv_subset_list::parse): Likewise.
30382 2023-04-18 Jakub Jelinek <jakub@redhat.com>
30384 PR tree-optimization/109240
30385 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
30386 first vec_perm operand and minus as second using fneg/fadd and
30387 minus as first vec_perm operand and plus as second using fneg/fsub.
30389 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30391 * data-streamer.cc (bp_pack_real_value): New.
30392 (bp_unpack_real_value): New.
30393 * data-streamer.h (bp_pack_real_value): New.
30394 (bp_unpack_real_value): New.
30395 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
30396 bp_unpack_real_value.
30397 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
30398 bp_pack_real_value.
30400 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30402 * wide-int.h (WIDE_INT_MAX_HWIS): New.
30403 (class fixed_wide_int_storage): Use it.
30404 (trailing_wide_ints <N>::set_precision): Use it.
30405 (trailing_wide_ints <N>::extra_size): Use it.
30407 2023-04-18 Xi Ruoyao <xry111@xry111.site>
30409 * config/loongarch/loongarch-protos.h
30410 (loongarch_addu16i_imm12_operand_p): New function prototype.
30411 (loongarch_split_plus_constant): Likewise.
30412 * config/loongarch/loongarch.cc
30413 (loongarch_addu16i_imm12_operand_p): New function.
30414 (loongarch_split_plus_constant): Likewise.
30415 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
30416 (DUAL_IMM12_OPERAND): Likewise.
30417 (DUAL_ADDU16I_OPERAND): Likewise.
30418 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
30420 * config/loongarch/predicates.md (const_dual_imm12_operand): New
30422 (const_addu16i_operand): Likewise.
30423 (const_addu16i_imm12_di_operand): Likewise.
30424 (const_addu16i_imm12_si_operand): Likewise.
30425 (plus_di_operand): Likewise.
30426 (plus_si_operand): Likewise.
30427 (plus_si_extend_operand): Likewise.
30428 * config/loongarch/loongarch.md (add<mode>3): Convert to
30429 define_insn_and_split. Use plus_<mode>_operand predicate
30430 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
30431 and Le constraints.
30432 (*addsi3_extended): Convert to define_insn_and_split. Use
30433 plus_si_extend_operand instead of arith_operand. Add
30434 alternatives for La and Le alternatives.
30436 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30438 * value-range.h (Value_Range::Value_Range): New.
30439 (Value_Range::contains_p): New.
30441 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
30443 * value-range.h (class vrange): Make m_discriminator const.
30444 (class irange): Make m_max_ranges const. Adjust constructors
30446 (class unsupported_range): Construct vrange appropriately.
30447 (class frange): Same.
30449 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
30451 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
30454 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
30456 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
30458 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
30460 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
30462 (riscv_expand_epilogue): Likewise.
30464 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
30466 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
30468 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
30470 2023-04-17 Andrew Pinski <apinski@marvell.com>
30472 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
30475 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
30477 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
30480 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
30482 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
30483 parameter remaining_size.
30484 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
30485 (riscv_expand_prologue): Likewise.
30486 (riscv_expand_epilogue): Likewise.
30488 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
30490 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
30491 roriw for constant counts.
30492 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
30493 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
30494 (simplify_context::simplify_binary_operation_1): Use it.
30495 * expmed.cc (expand_shift_1): Likewise.
30497 2023-04-17 Martin Jambor <mjambor@suse.cz>
30501 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
30502 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
30503 (ipa_zap_jf_refdesc): New function.
30504 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
30505 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
30506 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
30507 the new parameter of find_reference.
30508 (adjust_references_in_caller): Likewise. Make sure the constant jump
30509 function is not used to decrement a refdec counter again. Only
30510 decrement refdesc counters when the pass_through jump function allows
30511 it. Added a detailed dump when decrementing refdesc counters.
30512 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
30513 (ipa_set_jf_simple_pass_through): Initialize the new flag.
30514 (ipa_set_jf_unary_pass_through): Likewise.
30515 (ipa_set_jf_arith_pass_through): Likewise.
30516 (remove_described_reference): Provide a value for the new parameter of
30518 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
30519 the previous pass_through had a flag mandating that we do so.
30520 (propagate_controlled_uses): Likewise. Only decrement refdesc
30521 counters when the pass_through jump function allows it.
30522 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
30523 parameter of find_reference.
30524 (ipa_write_jump_function): Assert the new flag does not have to be
30526 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
30529 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
30530 Di Zhao <di.zhao@amperecomputing.com>
30532 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
30533 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
30534 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
30535 Check for the above tuning option when processing loads.
30537 2023-04-17 Richard Biener <rguenther@suse.de>
30539 PR tree-optimization/109524
30540 * tree-vrp.cc (remove_unreachable::m_list): Change to a
30541 vector of pairs of block indices.
30542 (remove_unreachable::maybe_register_block): Adjust.
30543 (remove_unreachable::remove_and_update_globals): Likewise.
30544 Deal with removed blocks.
30546 2023-04-16 Jeff Law <jlaw@ventanamicro>
30549 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
30550 TARGET_SFB_ALU, force the true arm into a register.
30552 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
30555 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
30556 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
30558 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
30559 (pa_function_arg_size): Change return type to int. Return zero
30560 for arguments larger than 1 GB. Update comments.
30562 2023-04-15 Jakub Jelinek <jakub@redhat.com>
30564 PR tree-optimization/109154
30565 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
30566 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
30568 2023-04-15 Jason Merrill <jason@redhat.com>
30571 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
30572 Overhaul lhs_ref.ref analysis.
30574 2023-04-14 Richard Biener <rguenther@suse.de>
30576 PR tree-optimization/109502
30577 * tree-vect-stmts.cc (vectorizable_assignment): Fix
30578 check for conversion between mask and non-mask types.
30580 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
30581 Jakub Jelinek <jakub@redhat.com>
30585 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
30586 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
30587 smaller than word_mode.
30588 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
30589 <case AND>: Likewise.
30591 2023-04-14 Jakub Jelinek <jakub@redhat.com>
30593 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
30596 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
30598 PR tree-optimization/108139
30599 PR tree-optimization/109462
30600 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
30601 equivalency check for PHI nodes.
30602 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
30603 does not dominate single-arg equivalency edges.
30605 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
30608 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
30609 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
30611 2023-04-13 Richard Biener <rguenther@suse.de>
30613 PR tree-optimization/109491
30614 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
30615 NULL operands test.
30617 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30620 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
30621 (vint16mf4_t): Ditto.
30622 (vint32mf2_t): Ditto.
30623 (vint64m1_t): Ditto.
30624 (vint64m2_t): Ditto.
30625 (vint64m4_t): Ditto.
30626 (vint64m8_t): Ditto.
30627 (vuint8mf8_t): Ditto.
30628 (vuint16mf4_t): Ditto.
30629 (vuint32mf2_t): Ditto.
30630 (vuint64m1_t): Ditto.
30631 (vuint64m2_t): Ditto.
30632 (vuint64m4_t): Ditto.
30633 (vuint64m8_t): Ditto.
30634 (vfloat32mf2_t): Ditto.
30635 (vbool64_t): Ditto.
30636 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
30637 (register_vector_type): Ditto.
30638 (check_required_extensions): Fix condition.
30639 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
30640 (RVV_REQUIRE_ELEN_64): New define.
30641 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
30642 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
30643 (TARGET_VECTOR_FP64): Ditto.
30644 (ENTRY): Fix predicate.
30645 * config/riscv/vector-iterators.md: Fix predicate.
30647 2023-04-12 Jakub Jelinek <jakub@redhat.com>
30649 PR tree-optimization/109410
30650 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
30651 block if first statement of the function is a call to returns_twice
30654 2023-04-12 Jakub Jelinek <jakub@redhat.com>
30657 * config/i386/i386.cc: Include rtl-error.h.
30658 (ix86_print_operand): For z modifier warning, use warning_for_asm
30659 if this_is_asm_operands. For Z modifier errors, use %c and code
30660 instead of hardcoded Z.
30662 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
30664 * config/i386/x-mingw32-utf8: Remove extrataneous $@
30666 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
30668 PR tree-optimization/109462
30669 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
30670 check for equivalences if NAME is a phi node.
30672 2023-04-12 Richard Biener <rguenther@suse.de>
30674 PR tree-optimization/109473
30675 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
30676 Convert scalar result to the computation type before performing
30677 the reduction adjustment.
30679 2023-04-12 Richard Biener <rguenther@suse.de>
30681 PR tree-optimization/109469
30682 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
30683 a returns-twice call.
30685 2023-04-12 Richard Biener <rguenther@suse.de>
30687 PR tree-optimization/109434
30688 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
30689 handle possibly throwing calls when processing the LHS
30690 and may-defs are not OK.
30692 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
30694 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
30695 predicate to avoid splitting arith constants.
30697 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
30698 Pan Li <pan2.li@intel.com>
30699 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30700 Kito Cheng <kito.cheng@sifive.com>
30703 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
30704 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
30705 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
30706 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
30707 (riscv_zero_call_used_regs): New.
30708 (TARGET_ZERO_CALL_USED_REGS): New.
30710 2023-04-11 Martin Liska <mliska@suse.cz>
30713 * opts.cc (finish_options): Drop also
30714 x_flag_var_tracking_assignments.
30716 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
30718 PR tree-optimization/108888
30719 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
30721 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
30724 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
30725 (vsx_sign_extend_v16qi_<mode>): ... this.
30726 (vsx_sign_extend_hi_<mode>): Rename to...
30727 (vsx_sign_extend_v8hi_<mode>): ... this.
30728 (vsx_sign_extend_si_v2di): Rename to...
30729 (vsx_sign_extend_v4si_v2di): ... this.
30730 (vsignextend_qi_<mode>): Remove.
30731 (vsignextend_hi_<mode>): Remove.
30732 (vsignextend_si_v2di): Remove.
30733 (vsignextend_v2di_v1ti): Remove.
30734 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
30735 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
30736 with gen_vsx_sign_extend_v16qi_v4si.
30737 * config/rs6000/rs6000.md (split for DI constant generation):
30738 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
30739 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
30740 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
30741 with gen_vsx_sign_extend_v16qi_si.
30742 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
30743 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
30744 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
30745 vsx_sign_extend_v16qi_v4si.
30746 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
30747 vsx_sign_extend_v8hi_v2di.
30748 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
30749 vsx_sign_extend_v8hi_v4si.
30750 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
30751 vsx_sign_extend_si_v2di.
30752 (__builtin_altivec_vsignext): Set bif-pattern to
30753 vsx_sign_extend_v2di_v1ti.
30754 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
30755 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
30756 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
30757 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
30759 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
30762 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
30763 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
30765 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
30767 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
30769 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
30771 * common/config/i386/cpuinfo.h (get_available_features):
30772 Detect AMX-COMPLEX.
30773 * common/config/i386/i386-common.cc
30774 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
30775 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
30776 (ix86_handle_option): Handle -mamx-complex.
30777 * common/config/i386/i386-cpuinfo.h (enum processor_features):
30778 Add FEATURE_AMX_COMPLEX.
30779 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
30781 * config.gcc: Add amxcomplexintrin.h.
30782 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
30783 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
30785 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
30786 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
30787 Handle amx-complex.
30788 * config/i386/i386.opt: Add option -mamx-complex.
30789 * config/i386/immintrin.h: Include amxcomplexintrin.h.
30790 * doc/extend.texi: Document amx-complex.
30791 * doc/invoke.texi: Document -mamx-complex.
30792 * doc/sourcebuild.texi: Document target amx-complex.
30793 * config/i386/amxcomplexintrin.h: New file.
30795 2023-04-08 Jakub Jelinek <jakub@redhat.com>
30797 PR tree-optimization/109392
30798 * tree-vect-generic.cc (tree_vec_extract): Handle failure
30799 of maybe_push_res_to_seq better.
30801 2023-04-08 Jakub Jelinek <jakub@redhat.com>
30803 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
30805 (SYSTEM_H): Depend on $(HASHTAB_H).
30806 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
30807 dependency on $(RTL_BASE_H), remove redundant dependency on
30810 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
30813 * config/arm/arm.cc (arm_effective_regno): New function.
30814 (mve_vector_mem_operand): Use it.
30816 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
30818 PR tree-optimization/109417
30819 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
30820 dependency is in SSA_NAME_FREE_LIST.
30822 2023-04-06 Andrew Pinski <apinski@marvell.com>
30824 PR tree-optimization/109427
30825 * params.opt (-param=vect-induction-float=):
30826 Fix option attribute typo for IntegerRange.
30828 2023-04-05 Jeff Law <jlaw@ventanamicro>
30831 * combine.cc (combine_instructions): Force re-recognition when
30832 after restoring the body of an insn to its original form.
30834 2023-04-05 Martin Jambor <mjambor@suse.cz>
30837 * ipa-sra.cc (zap_useless_ipcp_results): New function.
30838 (process_isra_node_results): Call it.
30840 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30842 * config/riscv/vector.md: Fix incorrect operand order.
30844 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30846 * config/riscv/riscv-vsetvl.cc
30847 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
30850 2023-04-05 Li Xu <xuli1@eswincomputing.com>
30852 * config/riscv/riscv-vector-builtins.def: Fix typo.
30853 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
30854 * config/riscv/vector-iterators.md: Ditto.
30856 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
30858 * doc/md.texi (Including Patterns): Fix page break.
30860 2023-04-04 Jakub Jelinek <jakub@redhat.com>
30862 PR tree-optimization/109386
30863 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
30864 foperator_le::op1_range, foperator_le::op2_range,
30865 foperator_gt::op1_range, foperator_gt::op2_range,
30866 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
30867 BRS_FALSE case even if the other op is maybe_isnan, not just
30869 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
30870 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
30871 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
30872 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
30873 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
30874 not just known_isnan.
30876 2023-04-04 Marek Polacek <polacek@redhat.com>
30878 PR sanitizer/109107
30879 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
30881 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
30883 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
30885 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
30886 (mve_vcreateq_f<mode>): Swap operands.
30888 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
30890 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
30892 2023-04-04 Jakub Jelinek <jakub@redhat.com>
30895 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
30896 Reword diagnostics about zfinx conflict with f, formatting fixes.
30898 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
30900 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
30902 2023-04-04 Richard Biener <rguenther@suse.de>
30904 PR tree-optimization/109304
30905 * tree-profile.cc (tree_profiling): Use symtab node
30906 availability to decide whether to skip adjusting calls.
30907 Do not adjust calls to internal functions.
30909 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
30912 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
30913 function for permutation control vector by considering big endianness.
30915 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
30918 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
30919 (rs6000_vprtyb<mode>2): ... this.
30920 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
30921 rs6000_vprtybv2di2.
30922 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
30923 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
30924 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
30925 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
30927 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
30928 Sandra Loosemore <sandra@codesourcery.com>
30930 * doc/md.texi (Insn Splitting): Tweak wording for readability.
30932 2023-04-03 Martin Jambor <mjambor@suse.cz>
30935 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
30936 offset + size will be representable in unsigned int.
30938 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
30940 * configure.ac (ZSTD_LIB): Move before zstd.h check.
30941 Unset gcc_cv_header_zstd_h without libzstd.
30942 * configure: Regenerate.
30944 2023-04-03 Martin Liska <mliska@suse.cz>
30946 * doc/invoke.texi: Document new param.
30948 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
30950 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
30951 new check_effective_target function.
30953 2023-04-03 Li Xu <xuli1@eswincomputing.com>
30955 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
30956 (vfloat32m8_t): Likewise
30958 2023-04-03 liuhongt <hongtao.liu@intel.com>
30960 * doc/md.texi: Document signbitm2.
30962 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30963 kito-cheng <kito.cheng@sifive.com>
30965 * config/riscv/vector.md: Fix RA constraint.
30967 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30969 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
30970 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
30971 * config/riscv/vector.md: Fix scalar move bug.
30973 2023-04-01 Jakub Jelinek <jakub@redhat.com>
30975 * range-op-float.cc (foperator_equal::fold_range): If at least
30976 one of the op ranges is not singleton and neither is NaN and all
30977 4 bounds are zero, return [1, 1].
30978 (foperator_not_equal::fold_range): In the same case return [0, 0].
30980 2023-04-01 Jakub Jelinek <jakub@redhat.com>
30982 * range-op-float.cc (foperator_equal::fold_range): Perform the
30983 non-singleton handling regardless of maybe_isnan (op1, op2).
30984 (foperator_not_equal::fold_range): Likewise.
30985 (foperator_lt::fold_range, foperator_le::fold_range,
30986 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
30987 real_* comparison check which results in range_false (type)
30988 even if maybe_isnan (op1, op2). Simplify.
30989 (foperator_ltgt): New class.
30990 (fop_ltgt): New variable.
30991 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
30994 2023-04-01 Jakub Jelinek <jakub@redhat.com>
30997 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
30998 returns VOIDmode, handle it like if the register isn't used for
30999 passing arguments at all.
31000 (apply_result_size): If targetm.calls.get_raw_result_mode returns
31001 VOIDmode, handle it like if the register isn't used for returning
31003 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
31004 means to return VOIDmode.
31005 * doc/tm.texi: Regenerated.
31006 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
31007 TARGET_SVE for P0_REGNUM.
31008 (aarch64_function_arg_regno_p): Also return true for p0-p3.
31009 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
31011 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
31013 * lra-constraints.cc: (combine_reload_insn): New function.
31015 2023-03-31 Jakub Jelinek <jakub@redhat.com>
31017 PR tree-optimization/91645
31018 * range-op-float.cc (foperator_unordered_lt::fold_range,
31019 foperator_unordered_le::fold_range,
31020 foperator_unordered_gt::fold_range,
31021 foperator_unordered_ge::fold_range,
31022 foperator_unordered_equal::fold_range): Call the ordered
31023 fold_range on ranges with cleared NaNs.
31024 * value-query.cc (range_query::get_tree_range): Handle also
31025 COMPARISON_CLASS_P trees.
31027 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
31028 Andrew Pinski <pinskia@gmail.com>
31031 * config/riscv/t-riscv: Add missing dependencies.
31033 2023-03-31 liuhongt <hongtao.liu@intel.com>
31035 * config/i386/i386.cc (inline_memory_move_cost): Return 100
31036 for MASK_REGS when MODE_SIZE > 8.
31038 2023-03-31 liuhongt <hongtao.liu@intel.com>
31041 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
31042 ufloat/ufix to floatuns/fixuns.
31043 * config/i386/i386-expand.cc
31044 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
31045 * config/i386/sse.md
31046 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
31048 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
31049 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
31051 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
31053 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
31055 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
31056 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
31057 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
31058 (ufloatv2siv2df2<mask_name>): Renamed to ..
31059 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
31060 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
31062 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
31064 (ufix_notruncv2dfv2si2): Renamed to ..
31065 (fixuns_notruncv2dfv2si2):.. this.
31066 (ufix_notruncv2dfv2si2_mask): Renamed to ..
31067 (fixuns_notruncv2dfv2si2_mask): .. this.
31068 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
31069 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
31070 (ufix_truncv2dfv2si2): Renamed to ..
31071 (*fixuns_truncv2dfv2si2): .. this.
31072 (ufix_truncv2dfv2si2_mask): Renamed to ..
31073 (fixuns_truncv2dfv2si2_mask): .. this.
31074 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
31075 (*fixuns_truncv2dfv2si2_mask_1): .. this.
31076 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
31077 (fixuns_truncv4dfv4si2<mask_name>): .. this.
31078 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
31080 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
31082 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
31083 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
31086 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
31088 PR tree-optimization/109154
31089 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
31090 * gimple-range-gori.h (may_recompute_p): Add depth param.
31091 * params.opt (ranger-recompute-depth): New param.
31093 2023-03-30 Jason Merrill <jason@redhat.com>
31097 * cgraph.h: Move reset() from cgraph_node to symtab_node.
31098 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
31099 remove_from_same_comdat_group.
31101 2023-03-30 Richard Biener <rguenther@suse.de>
31103 PR tree-optimization/107561
31104 * gimple-ssa-warn-access.cc (get_size_range): Add flags
31105 argument and pass it on.
31106 (check_access): When querying for the size range pass
31107 SR_ALLOW_ZERO when the known destination size is zero.
31109 2023-03-30 Richard Biener <rguenther@suse.de>
31111 PR tree-optimization/109342
31112 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
31113 overload for edge. When that edge is a backedge use
31114 dominated_by_p directly.
31116 2023-03-30 liuhongt <hongtao.liu@intel.com>
31118 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
31119 vpblendd instead of vpblendw for V4SI under avx2.
31121 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
31123 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
31124 for many quick operands, for register-sized modes.
31126 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
31128 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
31131 2023-03-29 Martin Liska <mliska@suse.cz>
31133 PR bootstrap/109310
31134 * configure.ac: Emit a warning for deprecated option
31135 --enable-link-mutex.
31136 * configure: Regenerate.
31138 2023-03-29 Richard Biener <rguenther@suse.de>
31140 PR tree-optimization/109331
31141 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
31142 discover a taken edge make sure to cleanup the CFG.
31144 2023-03-29 Richard Biener <rguenther@suse.de>
31146 PR tree-optimization/109327
31147 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
31148 already removed stmts when draining to_remove.
31150 2023-03-29 Richard Biener <rguenther@suse.de>
31153 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
31154 so we can re-create the DIE for the type if required.
31156 2023-03-29 Jakub Jelinek <jakub@redhat.com>
31157 Richard Biener <rguenther@suse.de>
31159 PR tree-optimization/109301
31160 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
31161 properties_provided from PROP_gimple_opt_math to 0.
31162 (pass_data_expand_powcabs): Change properties_provided from 0 to
31163 PROP_gimple_opt_math.
31165 2023-03-29 Richard Biener <rguenther@suse.de>
31167 PR tree-optimization/109154
31168 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
31169 inverted condition specially by inverting at the caller.
31170 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
31172 2023-03-28 David Malcolm <dmalcolm@redhat.com>
31175 * diagnostic-show-locus.cc (column_range::column_range): Factor
31176 out assertion conditional into...
31177 (column_range::valid_p): ...this new function.
31178 (line_corrections::add_hint): Don't attempt to consolidate hints
31179 if it would lead to invalid column_range instances.
31181 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
31184 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
31185 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
31188 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
31190 PR rtl-optimization/109187
31191 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
31192 subtraction in three-way comparison.
31194 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
31196 PR tree-optimization/109265
31197 PR tree-optimization/109274
31198 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
31199 not create a relation record is op1 and op2 are the same symbol.
31200 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
31201 handler for this stmt, but create a new record only if this statement
31202 generates a relation based on the ranges.
31203 (gori_compute::compute_operand2_range): Ditto.
31204 * value-relation.h (value_relation::set_relation): Always create the
31205 record that is requested.
31207 2023-03-28 Richard Biener <rguenther@suse.de>
31209 PR tree-optimization/107087
31210 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
31211 executable regions to avoid useless work and to better
31212 propagate degenerate PHIs.
31214 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
31216 * config/i386/x-mingw32-utf8: update comments.
31218 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
31221 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
31222 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
31224 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
31226 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
31227 after inlining. Record which decls are loaded from. Fix handling
31228 of vops for loads and stores.
31229 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
31230 (aarch64_accesses_vector_load_decl_p): Likewise.
31231 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
31233 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
31234 that loads from a decl, treat vector stores to those decls as
31236 (aarch64_vector_costs::finish_cost): ...and in that case,
31237 if the vector code does nothing more than a store, give the
31238 prologue a zero cost as well.
31240 2023-03-28 Richard Biener <rguenther@suse.de>
31243 PR tree-optimization/108129
31244 * genmatch.cc (lower_for): For (match ...) delay
31245 substituting into the match operator if possible.
31246 (dt_operand::gen_gimple_expr): For user_id look at the
31247 first substitute for determining how to access operands.
31248 (dt_operand::gen_generic_expr): Likewise.
31249 (dt_node::gen_kids): Properly sort user_ids according
31250 to their substitutes.
31251 (dt_node::gen_kids_1): Code-generate user_id matching.
31253 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31254 Jonathan Wakely <jwakely@redhat.com>
31256 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
31257 Use subcommand rather than sub-command in function comments.
31259 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31261 PR tree-optimization/109154
31262 * value-range.h (frange::flush_denormals_to_zero): Make it public
31263 rather than private.
31264 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
31266 * range-op-float.cc (range_operator_float::fold_range): Call
31267 flush_denormals_to_zero.
31269 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31271 PR middle-end/106190
31272 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
31273 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
31275 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31277 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
31278 as 4th argument to set to avoid clear_nan and union_ calls.
31280 2023-03-28 Jakub Jelinek <jakub@redhat.com>
31283 * config/i386/i386.cc (assign_386_stack_local): For DImode
31284 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
31285 align 32 rather than 0 to assign_stack_local.
31287 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
31290 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
31291 on operand #3 to get the final condition code. Use std::swap.
31292 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
31293 (fucmp<gcond:code>8<P:mode>_vis): Move around.
31294 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
31295 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
31297 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
31299 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
31300 top-level sections.
31302 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
31304 * config.host: Pull in i386/x-mingw32-utf8 Makefile
31305 fragment and reference utf8rc-mingw32.o explicitly
31307 * config/i386/sym-mingw32.cc: prevent name mangling of
31309 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
31310 depend on manifest file explicitly.
31312 2023-03-28 Richard Biener <rguenther@suse.de>
31315 2023-03-27 Richard Biener <rguenther@suse.de>
31317 PR rtl-optimization/109237
31318 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
31320 2023-03-28 Richard Biener <rguenther@suse.de>
31322 * common.opt (gdwarf): Remove Negative(gdwarf-).
31324 2023-03-28 Richard Biener <rguenther@suse.de>
31326 * common.opt (gdwarf): Add RejectNegative.
31327 (gdwarf-): Likewise.
31331 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
31333 * config/cris/constraints.md ("T"): Correct to
31334 define_memory_constraint.
31336 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
31338 * config/cris/cris.md (BW2): New mode-iterator.
31339 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
31342 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
31344 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
31345 for possible eliminable compares.
31347 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
31349 * config/cris/constraints.md ("R"): Remove unused constraint.
31351 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
31353 PR gcov-profile/109297
31354 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
31355 (merge_stream_usage): Likewise.
31356 (overlap_usage): Likewise.
31358 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
31361 * config/riscv/thead.md: Add missing mode specifiers.
31363 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
31364 Jiangning Liu <jiangning.liu@amperecomputing.com>
31365 Manolis Tsamis <manolis.tsamis@vrull.eu>
31367 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
31369 2023-03-27 Richard Biener <rguenther@suse.de>
31371 PR rtl-optimization/109237
31372 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
31374 2023-03-27 Richard Biener <rguenther@suse.de>
31377 * lto-wrapper.cc (run_gcc): Parse alternate debug options
31378 as well, they always enable debug.
31380 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
31383 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
31385 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
31387 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
31390 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
31391 than zero when calling vec_sld.
31392 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
31393 zero when calling vec_sld.
31394 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
31395 than zero when calling vec_sld.
31397 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
31399 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
31400 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
31401 loops are represented and which fields are vectors. Add
31402 documentation for OMP_FOR_PRE_BODY field. Document internal
31403 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
31404 * tree.def (OMP_FOR): Make documentation consistent with the
31405 Texinfo manual, to fill some gaps and correct errors.
31407 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
31410 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
31411 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
31412 (handle_move_double): Call it before handle_movsi.
31413 * config/m68k/m68k-protos.h: Declare it.
31415 2023-03-26 Jakub Jelinek <jakub@redhat.com>
31417 PR tree-optimization/109230
31418 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
31420 2023-03-26 Jakub Jelinek <jakub@redhat.com>
31423 * predict.cc (compute_function_frequency): Don't call
31424 warn_function_cold if function already has cold attribute.
31426 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
31428 * doc/install.texi: Remove anachronistic note
31429 related to languages built and separate source tarballs.
31431 2023-03-25 David Malcolm <dmalcolm@redhat.com>
31434 * diagnostic-format-sarif.cc (read_until_eof): Delete.
31435 (maybe_read_file): Delete.
31436 (sarif_builder::maybe_make_artifact_content_object): Use
31437 get_source_file_content rather than maybe_read_file.
31438 Reject it if it's not valid UTF-8.
31439 * input.cc (file_cache_slot::get_full_file_content): New.
31440 (get_source_file_content): New.
31441 (selftest::check_cpp_valid_utf8_p): New.
31442 (selftest::test_cpp_valid_utf8_p): New.
31443 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
31444 * input.h (get_source_file_content): New prototype.
31446 2023-03-24 David Malcolm <dmalcolm@redhat.com>
31448 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
31450 (Special Functions for Debugging the Analyzer): Convert to a
31451 table, and rewrite in places.
31452 (Other Debugging Techniques): Add notes on how to compare two
31453 different exploded graphs.
31455 2023-03-24 David Malcolm <dmalcolm@redhat.com>
31458 * json.cc: Update comments to indicate that we now preserve
31459 insertion order of keys within objects.
31460 (object::print): Traverse keys in insertion order.
31461 (object::set): Preserve insertion order of keys.
31462 (selftest::test_writing_objects): Add an additional key to verify
31463 that we preserve insertion order.
31464 * json.h (object::m_keys): New field.
31466 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
31468 PR tree-optimization/109238
31469 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
31470 predecessors which this block dominates.
31472 2023-03-24 Richard Biener <rguenther@suse.de>
31474 PR tree-optimization/106912
31475 * tree-profile.cc (tree_profiling): Update stmts only when
31476 profiling or testing coverage. Make sure to update calls
31477 fntype, stripping 'const' there.
31479 2023-03-24 Jakub Jelinek <jakub@redhat.com>
31481 PR middle-end/109258
31482 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
31483 if target == const0_rtx.
31485 2023-03-24 Alexandre Oliva <oliva@adacore.com>
31487 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
31488 Document options and effective targets.
31490 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
31492 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
31495 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
31497 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
31498 non-earlyclobber alternative.
31500 2023-03-23 Andrew Pinski <apinski@marvell.com>
31503 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
31506 2023-03-23 Richard Biener <rguenther@suse.de>
31508 PR tree-optimization/107569
31509 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
31510 Do not push SSA names with zero uses as available leader.
31511 (process_bb): Likewise.
31513 2023-03-23 Richard Biener <rguenther@suse.de>
31515 PR tree-optimization/109262
31516 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
31517 combining a piecewise complex load avoid touching loads
31518 that throw internally. Use fun, not cfun throughout.
31520 2023-03-23 Jakub Jelinek <jakub@redhat.com>
31522 * value-range.cc (irange::irange_union, irange::intersect): Fix
31523 comment spelling bugs.
31524 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
31525 * gimple-range-trace.h: Likewise.
31526 * gimple-range-edge.cc: Likewise.
31527 (gimple_outgoing_range_stmt_p,
31528 gimple_outgoing_range::switch_edge_range,
31529 gimple_outgoing_range::edge_range_p): Likewise.
31530 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
31531 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
31532 assume_query::assume_query, assume_query::calculate_phi): Likewise.
31533 * gimple-range-edge.h: Likewise.
31534 * value-range.h (Value_Range::set, Value_Range::lower_bound,
31535 Value_Range::upper_bound, frange::set_undefined): Likewise.
31536 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
31537 gori_compute): Likewise.
31538 * gimple-range-fold.h (fold_using_range): Likewise.
31539 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
31541 * gimple-range-gori.cc (range_def_chain::in_chain_p,
31542 range_def_chain::dump, gori_map::calculate_gori,
31543 gori_compute::compute_operand_range_switch,
31544 gori_compute::logical_combine, gori_compute::refine_using_relation,
31545 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
31547 * gimple-range.h: Likewise.
31548 (enable_ranger): Likewise.
31549 * range-op.h (empty_range_varying): Likewise.
31550 * value-query.h (value_query): Likewise.
31551 * gimple-range-cache.cc (block_range_cache::set_bb_range,
31552 block_range_cache::dump, ssa_global_cache::clear_global_range,
31553 temporal_cache::temporal_value, temporal_cache::current_p,
31554 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
31555 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
31557 * gimple-range-fold.cc (fur_edge::get_phi_operand,
31558 fur_stmt::get_operand, gimple_range_adjustment,
31559 fold_using_range::range_of_phi,
31560 fold_using_range::relation_fold_and_or): Likewise.
31561 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
31562 * value-query.cc (range_query::value_of_expr,
31563 range_query::value_on_edge, range_query::query_relation): Likewise.
31564 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
31565 intersect_range_with_nonzero_bits): Likewise.
31566 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
31567 exit_range): Likewise.
31568 * value-relation.h: Likewise.
31569 (equiv_oracle, relation_trio::relation_trio, value_relation,
31570 value_relation::value_relation, pe_min): Likewise.
31571 * range-op-float.cc (range_operator_float::rv_fold,
31572 frange_arithmetic, foperator_unordered_equal::op1_range,
31573 foperator_div::rv_fold): Likewise.
31574 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
31575 * value-relation.cc (equiv_oracle::query_relation,
31576 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
31577 value_relation::apply_transitive, relation_chain_head::find_relation,
31578 dom_oracle::query_relation, dom_oracle::find_relation_block,
31579 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
31580 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
31581 create_possibly_reversed_range, adjust_op1_for_overflow,
31582 operator_mult::wi_fold, operator_exact_divide::op1_range,
31583 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
31584 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
31585 range_op_lshift_tests): Likewise.
31587 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
31589 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
31590 (move_callee_saved_registers): Detect the bug condition early.
31592 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
31594 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
31595 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
31597 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
31598 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
31599 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
31600 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
31601 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
31603 2023-03-23 Jakub Jelinek <jakub@redhat.com>
31605 PR tree-optimization/109176
31606 * tree-vect-generic.cc (expand_vector_condition): If a has
31607 vector boolean type and is a comparison, also check if both
31608 the comparison and VEC_COND_EXPR could be successfully expanded
31611 2023-03-23 Pan Li <pan2.li@intel.com>
31612 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31616 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
31617 for vector mask modes.
31618 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
31619 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
31621 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
31623 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
31625 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31628 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
31629 (emit_vlmax_op): Ditto.
31630 * config/riscv/riscv-v.cc (get_sew): New function.
31631 (emit_vlmax_vsetvl): Adapt function.
31632 (emit_pred_op): Ditto.
31633 (emit_vlmax_op): Ditto.
31634 (emit_nonvlmax_op): Ditto.
31635 (legitimize_move): Fix LRA ICE.
31636 (gen_no_side_effects_vsetvl_rtx): Adapt function.
31637 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
31638 (@mov<VB:mode><P:mode>_lra): Ditto.
31639 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
31640 (*mov<VB:mode><P:mode>_lra): Ditto.
31642 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31645 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
31646 __riscv_vlenb support.
31648 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31649 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
31650 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
31652 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31653 * config/riscv/riscv-vector-builtins.cc: Ditto.
31655 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31656 kito-cheng <kito.cheng@sifive.com>
31658 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
31659 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
31660 (pass_vsetvl::need_vsetvl): Fix bugs.
31661 (pass_vsetvl::backward_demand_fusion): Fix bugs.
31662 (pass_vsetvl::demand_fusion): Fix bugs.
31663 (eliminate_insn): Fix bugs.
31664 (insert_vsetvl): Ditto.
31665 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
31666 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
31667 * config/riscv/vector.md: Ditto.
31669 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31670 kito-cheng <kito.cheng@sifive.com>
31672 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
31673 * config/riscv/vector-iterators.md (nmsac): Ditto.
31679 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
31680 (@pred_mul_plus<mode>): Ditto.
31681 (*pred_madd<mode>): Ditto.
31682 (*pred_macc<mode>): Ditto.
31683 (*pred_mul_plus<mode>): Ditto.
31684 (@pred_mul_plus<mode>_scalar): Ditto.
31685 (*pred_madd<mode>_scalar): Ditto.
31686 (*pred_macc<mode>_scalar): Ditto.
31687 (*pred_mul_plus<mode>_scalar): Ditto.
31688 (*pred_madd<mode>_extended_scalar): Ditto.
31689 (*pred_macc<mode>_extended_scalar): Ditto.
31690 (*pred_mul_plus<mode>_extended_scalar): Ditto.
31691 (@pred_minus_mul<mode>): Ditto.
31692 (*pred_<madd_nmsub><mode>): Ditto.
31693 (*pred_nmsub<mode>): Ditto.
31694 (*pred_<macc_nmsac><mode>): Ditto.
31695 (*pred_nmsac<mode>): Ditto.
31696 (*pred_mul_<optab><mode>): Ditto.
31697 (*pred_minus_mul<mode>): Ditto.
31698 (@pred_mul_<optab><mode>_scalar): Ditto.
31699 (@pred_minus_mul<mode>_scalar): Ditto.
31700 (*pred_<madd_nmsub><mode>_scalar): Ditto.
31701 (*pred_nmsub<mode>_scalar): Ditto.
31702 (*pred_<macc_nmsac><mode>_scalar): Ditto.
31703 (*pred_nmsac<mode>_scalar): Ditto.
31704 (*pred_mul_<optab><mode>_scalar): Ditto.
31705 (*pred_minus_mul<mode>_scalar): Ditto.
31706 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
31707 (*pred_nmsub<mode>_extended_scalar): Ditto.
31708 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
31709 (*pred_nmsac<mode>_extended_scalar): Ditto.
31710 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
31711 (*pred_minus_mul<mode>_extended_scalar): Ditto.
31712 (*pred_<madd_msub><mode>): Ditto.
31713 (*pred_<macc_msac><mode>): Ditto.
31714 (*pred_<madd_msub><mode>_scalar): Ditto.
31715 (*pred_<macc_msac><mode>_scalar): Ditto.
31716 (@pred_neg_mul_<optab><mode>): Ditto.
31717 (@pred_mul_neg_<optab><mode>): Ditto.
31718 (*pred_<nmadd_msub><mode>): Ditto.
31719 (*pred_<nmsub_nmadd><mode>): Ditto.
31720 (*pred_<nmacc_msac><mode>): Ditto.
31721 (*pred_<nmsac_nmacc><mode>): Ditto.
31722 (*pred_neg_mul_<optab><mode>): Ditto.
31723 (*pred_mul_neg_<optab><mode>): Ditto.
31724 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
31725 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
31726 (*pred_<nmadd_msub><mode>_scalar): Ditto.
31727 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
31728 (*pred_<nmacc_msac><mode>_scalar): Ditto.
31729 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
31730 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
31731 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
31732 (@pred_widen_neg_mul_<optab><mode>): Ditto.
31733 (@pred_widen_mul_neg_<optab><mode>): Ditto.
31734 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
31735 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
31737 2023-03-23 liuhongt <hongtao.liu@intel.com>
31739 * builtins.cc (builtin_memset_read_str): Replace
31740 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
31741 (builtin_memset_gen_str): Ditto.
31742 * config/i386/i386-expand.cc
31743 (ix86_convert_const_wide_int_to_broadcast): Replace
31744 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
31745 (ix86_expand_vector_move): Ditto.
31746 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
31748 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
31749 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
31750 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
31751 * doc/tm.texi.in: Ditto.
31752 * target.def: Ditto.
31754 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
31756 * lra.cc (lra): Do not repeat inheritance and live range splitting
31757 when asm error is found.
31759 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
31761 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
31762 (gcn_expand_dpp_distribute_even_insn)
31763 (gcn_expand_dpp_distribute_odd_insn): Declare.
31764 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
31765 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
31766 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
31767 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
31768 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
31769 (fms<mode>4_negop2): New patterns.
31770 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
31771 (gcn_expand_dpp_distribute_even_insn)
31772 (gcn_expand_dpp_distribute_odd_insn): New functions.
31773 * config/gcn/gcn.md: Add entries to unspec enum.
31775 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
31777 PR tree-optimization/109008
31778 * value-range.cc (frange::set): Add nan_state argument.
31779 * value-range.h (class nan_state): New.
31780 (frange::get_nan_state): New.
31782 2023-03-22 Martin Liska <mliska@suse.cz>
31784 * configure: Regenerate.
31786 2023-03-21 Joseph Myers <joseph@codesourcery.com>
31788 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
31791 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
31793 PR tree-optimization/109192
31794 * gimple-range-gori.cc (gori_compute::compute_operand_range):
31795 Terminate gori calculations if a relation is not relevant.
31796 * value-relation.h (value_relation::set_relation): Allow
31797 equality between op1 and op2 if they are the same.
31799 2023-03-21 Richard Biener <rguenther@suse.de>
31801 PR tree-optimization/109219
31802 * tree-vect-loop.cc (vectorizable_reduction): Check
31803 slp_node, not STMT_SLP_TYPE.
31804 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
31805 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
31806 Remove assertion on STMT_SLP_TYPE.
31808 2023-03-21 Jakub Jelinek <jakub@redhat.com>
31810 PR tree-optimization/109215
31811 * tree.h (enum special_array_member): Adjust comments for int_0
31813 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
31814 has zero sized element type and the array has variable number of
31815 elements or constant one or more elements.
31816 (component_ref_size): Adjust comments, formatting fix.
31818 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31820 * configure.ac: Add check for the Texinfo 6.8
31821 CONTENTS_OUTPUT_LOCATION customization variable and set it if
31823 * configure: Regenerate.
31824 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
31825 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
31826 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
31827 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
31829 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31831 * doc/extend.texi: Associate use_hazard_barrier_return index
31832 entry with its attribute.
31833 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
31836 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31838 * doc/implement-c.texi: Remove usage of @gol.
31839 * doc/invoke.texi: Ditto.
31840 * doc/sourcebuild.texi: Ditto.
31841 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
31842 texinfo.tex versions, the bug it was working around appears to
31845 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31847 * doc/include/texinfo.tex: Update to 2023-01-17.19.
31849 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31851 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
31852 @enddefbuiltin for defining built-in functions.
31853 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
31854 places where it should be used.
31856 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31858 * doc/extend.texi (Formatted Output Function Checking): New
31859 subsection for grouping together printf et al.
31860 (Exception handling) Fix missing @ sign before copyright
31861 header, which lead to the copyright line leaking into
31862 '(gcc)Exception handling'.
31863 * doc/gcc.texi: Set document language to en_US.
31864 (@copying): Wrap front cover texts in quotations, move in manual
31867 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31869 * doc/gcc.texi: Add the Indices appendix, to make texinfo
31870 generate nice indices overview page.
31872 2023-03-21 Richard Biener <rguenther@suse.de>
31874 PR tree-optimization/109170
31875 * gimple-range-op.cc (cfn_pass_through_arg1): New.
31876 (gimple_range_op_handler::maybe_builtin_call): Handle
31877 __builtin_expect via cfn_pass_through_arg1.
31879 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
31882 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
31883 (init_float128_ieee): Delete code to switch complex multiply and divide
31885 (complex_multiply_builtin_code): New helper function.
31886 (complex_divide_builtin_code): Likewise.
31887 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
31888 of complex 128-bit multiply and divide built-in functions.
31890 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
31893 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
31895 2023-03-19 Jonny Grant <jg@jguk.org>
31897 * doc/extend.texi (Common Function Attributes) <nonnull>:
31900 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
31902 PR rtl-optimization/109179
31903 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
31904 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
31906 2023-03-17 Jakub Jelinek <jakub@redhat.com>
31909 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
31911 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
31912 to allocate_struct_function instead of false.
31913 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
31914 nor DECL_RESULT here. Pass true as ABSTRACT_P to
31915 push_struct_function. Call targetm.target_option.relayout_function
31917 (tree_function_versioning): Formatting fix.
31919 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
31921 * lra-constraints.cc: Include hooks.h.
31922 (combine_reload_insn): New function.
31923 (lra_constraints): Call it.
31925 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31926 kito-cheng <kito.cheng@sifive.com>
31928 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
31929 as legitimate value.
31930 * config/riscv/riscv-vector-builtins.cc
31931 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
31932 (function_expander::use_widen_ternop_insn): Ditto.
31933 * config/riscv/vector.md (@vundefined<mode>): New pattern.
31934 (pred_mul_<optab><mode>_undef_merge): Remove.
31935 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
31936 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
31937 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
31938 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
31940 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31943 * config/riscv/riscv.md: Fix subreg bug.
31945 2023-03-17 Jakub Jelinek <jakub@redhat.com>
31947 PR middle-end/108685
31948 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
31949 use its loop_father rather than BODY_BB's loop_father.
31950 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
31951 If broken_loop with ordered > collapse and at least one of those
31952 extra loops aren't guaranteed to have at least one iteration, change
31953 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
31954 loop_father to l0_bb's loop_father rather than l1_bb's.
31956 2023-03-17 Jakub Jelinek <jakub@redhat.com>
31959 * gdbhooks.py (TreePrinter.to_string): Wrap
31960 gdb.parse_and_eval('tree_code_type') in a try block, parse
31961 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
31962 raises exception. Update comments for the recent tree_code_type
31965 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
31967 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
31968 issues. Add more line breaks to example so it doesn't overflow
31971 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
31973 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
31974 line breaks in examples.
31975 <malloc>: Fix bad line breaks in running text, also copy-edit
31977 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
31978 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
31980 (C++ Dialect Options) <-fcontracts>: Add line break in example.
31981 <-Wctad-maybe-unsupported>: Likewise.
31982 <-Winvalid-constexpr>: Likewise.
31983 (Warning Options) <-Wdangling-pointer>: Likewise.
31984 <-Winterference-size>: Likewise.
31985 <-Wvla-parameter>: Likewise.
31986 (Static Analyzer Options): Fix bad line breaks in running text,
31987 plus add some missing markup.
31988 (Optimize Options) <openacc-privatization>: Fix more bad line
31989 breaks in running text.
31991 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
31993 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
31994 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
31995 (expand_vec_perm_2perm_pblendv): Ditto.
31997 2023-03-16 Martin Liska <mliska@suse.cz>
31999 PR middle-end/106133
32000 * gcc.cc (driver_handle_option): Use x_main_input_basename
32001 if x_dump_base_name is null.
32002 * opts.cc (common_handle_option): Likewise.
32004 2023-03-16 Richard Biener <rguenther@suse.de>
32006 PR tree-optimization/109123
32007 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
32008 Do not emit -Wuse-after-free late.
32009 (pass_waccess::check_call): Always check call pointer uses.
32011 2023-03-16 Richard Biener <rguenther@suse.de>
32013 PR tree-optimization/109141
32014 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
32015 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
32017 (renumber_gimple_stmt_uids): ... here and
32018 (renumber_gimple_stmt_uids_in_blocks): ... here.
32019 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
32020 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
32022 (pass_waccess::check_pointer_uses): Process all PHIs.
32024 2023-03-15 David Malcolm <dmalcolm@redhat.com>
32027 * diagnostic-format-sarif.cc (class sarif_invocation): New.
32028 (class sarif_ice_notification): New.
32029 (sarif_builder::m_invocation_obj): New field.
32030 (sarif_invocation::add_notification_for_ice): New.
32031 (sarif_invocation::prepare_to_flush): New.
32032 (sarif_ice_notification::sarif_ice_notification): New.
32033 (sarif_builder::sarif_builder): Add m_invocation_obj.
32034 (sarif_builder::end_diagnostic): Special-case DK_ICE and
32036 (sarif_builder::flush_to_file): Call prepare_to_flush on
32037 m_invocation_obj. Pass the latter to make_top_level_object.
32038 (sarif_builder::make_result_object): Move creation of "locations"
32040 (sarif_builder::make_locations_arr): ...this new function.
32041 (sarif_builder::make_top_level_object): Add "invocation_obj" param
32042 and pass it to make_run_object.
32043 (sarif_builder::make_run_object): Add "invocation_obj" param and
32045 (sarif_ice_handler): New callback.
32046 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
32047 * diagnostic.cc (diagnostic_initialize): Initialize new field
32049 (diagnostic_action_after_output): If it is set, make one attempt
32050 to call ice_handler_cb.
32051 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
32053 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
32055 * config/i386/i386-expand.cc (expand_vec_perm_blend):
32056 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
32057 and fix V2HImode handling.
32058 (expand_vec_perm_1): Try to emit BLEND instruction
32059 before MOVSS/MOVSD.
32060 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
32062 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
32064 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
32066 2023-03-15 Richard Biener <rguenther@suse.de>
32068 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
32069 Do not diagnose clobbers.
32071 2023-03-15 Richard Biener <rguenther@suse.de>
32073 PR tree-optimization/109139
32074 * tree-ssa-live.cc (remove_unused_locals): Look at the
32075 base address for unused decls on the LHS of .DEFERRED_INIT.
32077 2023-03-15 Xi Ruoyao <xry111@xry111.site>
32080 * builtins.cc (inline_string_cmp): Force the character
32081 difference into "result" pseudo-register, instead of reassign
32082 the pseudo-register.
32084 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32086 * config.gcc: Add thead.o to RISC-V extra_objs.
32087 * config/riscv/peephole.md: Add mempair peephole passes.
32088 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
32090 (th_mempair_operands_p): Likewise.
32091 (th_mempair_order_operands): Likewise.
32092 (th_mempair_prepare_save_restore_operands): Likewise.
32093 (th_mempair_save_restore_regs): Likewise.
32094 (th_mempair_output_move): Likewise.
32095 * config/riscv/riscv.cc (riscv_save_reg): Move code.
32096 (riscv_restore_reg): Move code.
32097 (riscv_for_each_saved_reg): Add code to emit mempair insns.
32098 * config/riscv/t-riscv: Add thead.cc.
32099 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
32101 (*th_mempair_store_<GPR:mode>2): Likewise.
32102 (*th_mempair_load_extendsidi2): Likewise.
32103 (*th_mempair_load_zero_extendsidi2): Likewise.
32104 * config/riscv/thead.cc: New file.
32106 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32108 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
32109 New constraint "th_f_fmv".
32110 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
32112 * config/riscv/riscv.cc (riscv_split_doubleword_move):
32113 Add split code for XTheadFmv.
32114 (riscv_secondary_memory_needed): XTheadFmv does not need
32116 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
32117 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
32118 movdf_hardfloat_rv32.
32119 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
32120 (th_fmv_x_w): New INSN.
32121 (th_fmv_x_hw): New INSN.
32123 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32125 * config/riscv/riscv.md (maddhisi4): New expand.
32126 (msubhisi4): New expand.
32127 * config/riscv/thead.md (*th_mula<mode>): New pattern.
32128 (*th_mulawsi): New pattern.
32129 (*th_mulawsi2): New pattern.
32130 (*th_maddhisi4): New pattern.
32131 (*th_sextw_maddhisi4): New pattern.
32132 (*th_muls<mode>): New pattern.
32133 (*th_mulswsi): New pattern.
32134 (*th_mulswsi2): New pattern.
32135 (*th_msubhisi4): New pattern.
32136 (*th_sextw_msubhisi4): New pattern.
32138 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32140 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
32141 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
32143 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
32145 (riscv_expand_conditional_move): New function.
32146 (riscv_expand_conditional_move_onesided): New function.
32147 * config/riscv/riscv.md: Add support for XTheadCondMov.
32148 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
32149 support for XTheadCondMov.
32150 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
32152 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32154 * config/riscv/bitmanip.md (clzdi2): New expand.
32155 (clzsi2): New expand.
32156 (ctz<mode>2): New expand.
32157 (popcount<mode>2): New expand.
32158 (<bitmanip_optab>si2): Rename INSN.
32159 (*<bitmanip_optab>si2): Hide INSN name.
32160 (<bitmanip_optab>di2): Rename INSN.
32161 (*<bitmanip_optab>di2): Hide INSN name.
32162 (rotrsi3): Remove INSN.
32163 (rotr<mode>3): Add expand.
32164 (*rotrsi3): New INSN.
32165 (rotrdi3): Rename INSN.
32166 (*rotrdi3): Hide INSN name.
32167 (rotrsi3_sext): Rename INSN.
32168 (*rotrsi3_sext): Hide INSN name.
32169 (bswap<mode>2): Remove INSN.
32170 (bswapdi2): Add expand.
32171 (bswapsi2): Add expand.
32172 (*bswap<mode>2): Hide INSN name.
32173 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
32175 * config/riscv/riscv.md (extv<mode>): New expand.
32176 (extzv<mode>): New expand.
32177 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
32178 (*th_ext<mode>): New INSN.
32179 (*th_extu<mode>): New INSN.
32180 (*th_clz<mode>2): New INSN.
32181 (*th_rev<mode>2): New INSN.
32183 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32185 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
32186 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
32188 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32190 * config/riscv/riscv.md: Include thead.md
32191 * config/riscv/thead.md: New file.
32193 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32195 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
32197 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
32199 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
32200 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
32201 (MASK_XTHEADBB): New.
32202 (MASK_XTHEADBS): New.
32203 (MASK_XTHEADCMO): New.
32204 (MASK_XTHEADCONDMOV): New.
32205 (MASK_XTHEADFMEMIDX): New.
32206 (MASK_XTHEADFMV): New.
32207 (MASK_XTHEADINT): New.
32208 (MASK_XTHEADMAC): New.
32209 (MASK_XTHEADMEMIDX): New.
32210 (MASK_XTHEADMEMPAIR): New.
32211 (MASK_XTHEADSYNC): New.
32212 (TARGET_XTHEADBA): New.
32213 (TARGET_XTHEADBB): New.
32214 (TARGET_XTHEADBS): New.
32215 (TARGET_XTHEADCMO): New.
32216 (TARGET_XTHEADCONDMOV): New.
32217 (TARGET_XTHEADFMEMIDX): New.
32218 (TARGET_XTHEADFMV): New.
32219 (TARGET_XTHEADINT): New.
32220 (TARGET_XTHEADMAC): New.
32221 (TARGET_XTHEADMEMIDX): New.
32222 (TARGET_XTHEADMEMPAIR): new.
32223 (TARGET_XTHEADSYNC): New.
32224 * config/riscv/riscv.opt: Add riscv_xthead_subext.
32226 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
32229 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
32230 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
32231 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
32233 2023-03-14 Jakub Jelinek <jakub@redhat.com>
32236 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
32237 when lo is equal to dhi and hi is a MEM which uses dlo register.
32239 2023-03-14 Martin Jambor <mjambor@suse.cz>
32242 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
32243 global0 instead of zeroing when it does not have as many counts as
32246 2023-03-14 Martin Jambor <mjambor@suse.cz>
32249 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
32250 ipa count, remove assert, lenient_count_portion_handling, dump
32251 also orig_node_count.
32253 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
32255 * config/i386/i386-expand.cc (expand_vec_perm_movs):
32256 Handle V2SImode for TARGET_MMX_WITH_SSE.
32257 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
32258 using V2FI mode iterator to handle both V2SI and V2SF modes.
32260 2023-03-14 Sam James <sam@gentoo.org>
32262 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
32263 including <sstream> earlier.
32264 * system.h: Add INCLUDE_SSTREAM.
32266 2023-03-14 Richard Biener <rguenther@suse.de>
32268 * tree-ssa-live.cc (remove_unused_locals): Do not treat
32269 the .DEFERRED_INIT of a variable as use, instead remove
32270 that if it is the only use.
32272 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
32274 PR rtl-optimization/107762
32275 * expr.cc (emit_group_store): Revert latest change.
32277 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
32279 PR tree-optimization/109005
32280 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
32281 aggregate type check.
32283 2023-03-14 Jakub Jelinek <jakub@redhat.com>
32285 PR tree-optimization/109115
32286 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
32287 r.upper_bound () on r.undefined_p () range.
32289 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
32291 PR tree-optimization/106896
32292 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
32293 implementatoin with probability_in; avoid some asserts.
32295 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
32297 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
32299 2023-03-13 Sean Bright <sean@seanbright.com>
32301 * doc/invoke.texi (Warning Options): Remove errant 'See'
32304 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32306 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
32307 REG_OK_FOR_BASE_P): Remove.
32309 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32311 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
32312 (=vd,vd,vr,vr): Ditto.
32313 * config/riscv/vector.md: Ditto.
32315 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32317 * config/riscv/riscv-vector-builtins.cc
32318 (function_expander::use_compare_insn): Add operand predicate check.
32320 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32322 * config/riscv/vector.md: Fine tune RA constraints.
32324 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
32326 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
32327 hsaco assemble/link.
32329 2023-03-13 Richard Biener <rguenther@suse.de>
32331 PR tree-optimization/109046
32332 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
32333 piecewise complex loads.
32335 2023-03-12 Jakub Jelinek <jakub@redhat.com>
32337 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
32338 (aarch64_bf16_ptr_type_node): Adjust comment.
32339 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
32340 bfloat16_type_node rather than aarch64_bf16_type_node.
32341 (aarch64_libgcc_floating_mode_supported_p,
32342 aarch64_scalar_mode_supported_p): Also support BFmode.
32343 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
32344 (aarch64_invalid_binary_op): Remove BFmode related rejections.
32345 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
32346 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
32347 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
32348 aarch64_bf16_type_node.
32349 (aarch64_init_simd_builtin_types): Likewise.
32350 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
32351 which is created in tree.cc already.
32352 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
32354 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
32356 PR middle-end/109031
32357 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
32358 ensure that the type of x is as wide or wider than the type of a.
32360 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32363 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
32364 (*bitmask_shift_plus<mode>): New.
32365 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
32366 (@aarch64_bitmask_udiv<mode>3): Remove.
32367 * config/aarch64/aarch64.cc
32368 (aarch64_vectorize_can_special_div_by_constant,
32369 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
32370 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
32371 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
32373 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32376 * target.def (preferred_div_as_shifts_over_mult): New.
32377 * doc/tm.texi.in: Document it.
32378 * doc/tm.texi: Regenerate.
32379 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
32380 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
32381 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
32383 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32384 Richard Sandiford <richard.sandiford@arm.com>
32387 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
32390 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32391 Andrew MacLeod <amacleod@redhat.com>
32394 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
32395 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
32397 (gimple_range_op_handler::maybe_non_standard): New.
32398 * range-op.cc (class operator_widen_plus_signed,
32399 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
32400 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
32401 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
32402 operator_widen_mult_unsigned::wi_fold,
32403 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
32404 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
32405 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
32406 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
32408 2023-03-12 Tamar Christina <tamar.christina@arm.com>
32411 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
32412 * doc/tm.texi.in: Likewise.
32413 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
32414 * expmed.cc (expand_divmod): Likewise.
32415 * expmed.h (expand_divmod): Likewise.
32416 * expr.cc (force_operand, expand_expr_divmod): Likewise.
32417 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
32418 * target.def (can_special_div_by_const): Remove.
32419 * target.h: Remove tree-core.h include
32420 * targhooks.cc (default_can_special_div_by_const): Remove.
32421 * targhooks.h (default_can_special_div_by_const): Remove.
32422 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
32423 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
32424 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
32426 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
32428 * doc/install.texi2html: Fix issue number typo in comment.
32430 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
32432 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
32435 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
32437 * doc/invoke.texi (Optimize Options): Add markup to
32438 description of asan-kernel-mem-intrinsic-prefix, and clarify
32441 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
32443 * doc/extend.texi (Named Address Spaces): Drop a redundant link
32446 2023-03-11 Jeff Law <jlaw@ventanamicro>
32449 * doc/extend.texi: Clarify Attribute Syntax a bit.
32451 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
32453 * doc/install.texi (Prerequisites): Suggest using newer versions
32455 (Final install): Clean up and modernize discussion of how to
32456 build or obtain the GCC manuals.
32457 * doc/install.texi2html: Update comment to point to the PR instead
32458 of "makeinfo 4.7 brokenness" (it's not specific to that version).
32460 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32463 * optabs.cc (expand_fix): For conversions from BFmode to integral,
32464 use shifts to convert it to SFmode first and then convert SFmode
32467 2023-03-10 Andrew Pinski <apinski@marvell.com>
32469 * config/aarch64/aarch64.md: Add a new define_split
32472 2023-03-10 Richard Biener <rguenther@suse.de>
32474 * tree-ssa-structalias.cc (solve_graph): Immediately
32475 iterate self-cycles.
32477 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32479 PR tree-optimization/109008
32480 * range-op-float.cc (float_widen_lhs_range): If not
32481 -frounding-math and not IBM double double format, extend lhs
32482 range just by 0.5ulp rather than 1ulp in each direction.
32484 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32487 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
32489 * config/i386/t-cygwin-w64: Remove.
32491 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32494 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
32495 C++14, don't declare as extern const arrays.
32496 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
32497 static constexpr member arrays for C++11 or C++14.
32498 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
32499 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
32500 (TREE_CODE_LENGTH): For C++11 or C++14 use
32501 tree_code_length_tmpl <0>::tree_code_length instead of
32503 * tree.cc (tree_code_type, tree_code_length): Remove.
32505 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32508 * common.opt (fcanon-prefix-map): New option.
32509 * opts.cc: Include file-prefix-map.h.
32510 (flag_canon_prefix_map): New variable.
32511 (common_handle_option): Handle OPT_fcanon_prefix_map.
32512 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
32513 * file-prefix-map.h (flag_canon_prefix_map): Declare.
32514 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
32516 (add_prefix_map): Initialize canonicalize member from
32517 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
32518 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
32519 use lrealpath result only for map->canonicalize map entries.
32520 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
32521 * opts-global.cc (handle_common_deferred_options): Clear
32522 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
32523 * doc/invoke.texi (-fcanon-prefix-map): Document.
32524 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
32525 see also for -fcanon-prefix-map.
32526 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
32528 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32531 * cgraphunit.cc (check_global_declaration): Don't warn for unused
32532 variables which have OPT_Wunused_variable warning suppressed.
32534 2023-03-10 Jakub Jelinek <jakub@redhat.com>
32536 PR tree-optimization/109008
32537 * range-op-float.cc (float_widen_lhs_range): If lb is
32538 minimum representable finite number or ub is maximum
32539 representable finite number, instead of widening it to
32540 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
32541 Temporarily clear flag_finite_math_only when canonicalizing
32544 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32546 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
32547 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
32548 (gimple_fold_builtin): Ditto.
32549 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
32550 (class vleff): Ditto.
32552 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32553 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
32555 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
32556 (struct fault_load_def): Ditto.
32558 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32559 * config/riscv/riscv-vector-builtins.cc
32560 (rvv_arg_type_info::get_tree_type): Add size_ptr.
32561 (gimple_folder::gimple_folder): New class.
32562 (gimple_folder::fold): Ditto.
32563 (gimple_fold_builtin): New function.
32564 (get_read_vl_instance): Ditto.
32565 (get_read_vl_decl): Ditto.
32566 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
32567 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
32568 (get_read_vl_instance): New function.
32569 (get_read_vl_decl): Ditto.
32570 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
32571 (read_vl_insn_p): Ditto.
32572 (available_occurrence_p): Ditto.
32573 (backward_propagate_worthwhile_p): Ditto.
32574 (gen_vsetvl_pat): Adapt for vleff support.
32575 (get_forward_read_vl_insn): New function.
32576 (get_backward_fault_first_load_insn): Ditto.
32577 (source_equal_p): Adapt for vleff support.
32578 (first_ratio_invalid_for_second_sew_p): Remove.
32579 (first_ratio_invalid_for_second_lmul_p): Ditto.
32580 (first_lmul_less_than_second_lmul_p): Ditto.
32581 (first_ratio_less_than_second_ratio_p): Ditto.
32582 (support_relaxed_compatible_p): New function.
32583 (vector_insn_info::operator>): Remove.
32584 (vector_insn_info::operator>=): Refine.
32585 (vector_insn_info::parse_insn): Adapt for vleff support.
32586 (vector_insn_info::compatible_p): Ditto.
32587 (vector_insn_info::update_fault_first_load_avl): New function.
32588 (pass_vsetvl::transfer_after): Adapt for vleff support.
32589 (pass_vsetvl::demand_fusion): Ditto.
32590 (pass_vsetvl::cleanup_insns): Ditto.
32591 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
32592 redundant condtions.
32593 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
32594 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
32595 * config/riscv/riscv.md: Adapt for vleff support.
32596 * config/riscv/t-riscv: Ditto.
32597 * config/riscv/vector-iterators.md: New iterator.
32598 * config/riscv/vector.md (read_vlsi): New pattern.
32599 (read_vldi_zero_extend): Ditto.
32600 (@pred_fault_load<mode>): Ditto.
32602 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32604 * config/riscv/riscv-vector-builtins.cc
32605 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
32606 (function_expander::use_widen_ternop_insn): Ditto.
32607 * optabs.cc (maybe_gen_insn): Extend nops handling.
32609 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32611 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
32612 patterns according to RVV ISA.
32613 * config/riscv/vector-iterators.md: New iterators.
32614 * config/riscv/vector.md
32615 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
32616 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
32617 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
32618 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
32619 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
32620 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
32621 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
32622 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
32623 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
32624 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
32625 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
32626 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
32627 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
32628 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
32630 2023-03-10 Michael Collison <collison@rivosinc.com>
32632 * tree-vect-loop-manip.cc (vect_do_peeling): Use
32633 result of constant_lower_bound instead of vf for the lower
32634 bound of the epilog loop trip count.
32636 2023-03-09 Tamar Christina <tamar.christina@arm.com>
32638 * passes.cc (emergency_dump_function): Finish graph generation.
32640 2023-03-09 Tamar Christina <tamar.christina@arm.com>
32642 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
32643 and bottom bit only.
32645 2023-03-09 Andrew Pinski <apinski@marvell.com>
32647 PR tree-optimization/108980
32648 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
32649 Reorgnize the call to warning for not strict flexible arrays
32650 to be before the check of warned.
32652 2023-03-09 Jason Merrill <jason@redhat.com>
32654 * doc/extend.texi: Comment out __is_deducible docs.
32656 2023-03-09 Jason Merrill <jason@redhat.com>
32659 * doc/extend.texi (Type Traits):: Document __is_deducible.
32661 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
32664 * config.host: add object for x86_64-*-mingw*.
32665 * config/i386/sym-mingw32.cc: dummy file to attach
32667 * config/i386/utf8-mingw32.rc: windres resource file.
32668 * config/i386/winnt-utf8.manifest: XML manifest to
32670 * config/i386/x-mingw32: reference to x-mingw32-utf8.
32671 * config/i386/x-mingw32-utf8: Makefile fragment to
32672 embed UTF-8 manifest.
32674 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
32676 * lra-constraints.cc (process_alt_operands): Use operand modes for
32677 clobbered regs instead of the biggest access mode.
32679 2023-03-09 Richard Biener <rguenther@suse.de>
32681 PR middle-end/108995
32682 * fold-const.cc (extract_muldiv_1): Avoid folding
32683 (CST * b) / CST2 when sanitizing overflow and we rely on
32684 overflow being undefined.
32686 2023-03-09 Jakub Jelinek <jakub@redhat.com>
32687 Richard Biener <rguenther@suse.de>
32689 PR tree-optimization/109008
32690 * range-op-float.cc (float_widen_lhs_range): New function.
32691 (foperator_plus::op1_range, foperator_minus::op1_range,
32692 foperator_minus::op2_range, foperator_mult::op1_range,
32693 foperator_div::op1_range, foperator_div::op2_range): Use it.
32695 2023-03-07 Jonathan Grant <jg@jguk.org>
32698 * doc/invoke.texi (Instrumentation Options): Clarify
32699 LeakSanitizer behavior.
32701 2023-03-07 Benson Muite <benson_muite@emailplus.org>
32703 * doc/install.texi (Prerequisites): Add link to gmplib.org.
32705 2023-03-07 Pan Li <pan2.li@intel.com>
32706 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32710 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
32712 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
32713 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
32714 * genmodes.cc (adj_precision): New.
32715 (ADJUST_PRECISION): New.
32716 (emit_mode_adjustments): Handle ADJUST_PRECISION.
32718 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
32720 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
32722 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
32724 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
32725 {s|u}{max|min} in QI, HI and DI modes.
32726 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
32727 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
32728 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
32729 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
32732 2023-03-06 Richard Biener <rguenther@suse.de>
32734 PR tree-optimization/109025
32735 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
32736 the inner LC PHI use is the inner loop PHI latch definition
32737 before classifying an outer PHI as double reduction.
32739 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
32742 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
32744 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
32745 (X86_TUNE_USE_SCATTER): Likewise.
32747 2023-03-06 Xi Ruoyao <xry111@xry111.site>
32750 * config/loongarch/loongarch.h (FP_RETURN): Use
32751 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
32752 (UNITS_PER_FP_ARG): Likewise.
32754 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32756 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
32757 (pass_vsetvl::backward_demand_fusion): Ditto.
32759 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32760 SiYu Wu <siyu@isrc.iscas.ac.cn>
32762 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
32764 (riscv_sm3p1_<mode>): New.
32765 (riscv_sm4ed_<mode>): New.
32766 (riscv_sm4ks_<mode>): New.
32767 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
32768 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
32769 ZKSH's built-in functions.
32771 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32772 SiYu Wu <siyu@isrc.iscas.ac.cn>
32774 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
32775 (riscv_sha256sig1_<mode>): New.
32776 (riscv_sha256sum0_<mode>): New.
32777 (riscv_sha256sum1_<mode>): New.
32778 (riscv_sha512sig0h): New.
32779 (riscv_sha512sig0l): New.
32780 (riscv_sha512sig1h): New.
32781 (riscv_sha512sig1l): New.
32782 (riscv_sha512sum0r): New.
32783 (riscv_sha512sum1r): New.
32784 (riscv_sha512sig0): New.
32785 (riscv_sha512sig1): New.
32786 (riscv_sha512sum0): New.
32787 (riscv_sha512sum1): New.
32788 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
32789 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
32790 built-in functions.
32791 (DIRECT_BUILTIN): Add new.
32793 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32794 SiYu Wu <siyu@isrc.iscas.ac.cn>
32796 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
32798 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
32799 (riscv_aes32dsmi): New.
32800 (riscv_aes64ds): New.
32801 (riscv_aes64dsm): New.
32802 (riscv_aes64im): New.
32803 (riscv_aes64ks1i): New.
32804 (riscv_aes64ks2): New.
32805 (riscv_aes32esi): New.
32806 (riscv_aes32esmi): New.
32807 (riscv_aes64es): New.
32808 (riscv_aes64esm): New.
32809 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
32810 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
32811 ZKNE's built-in functions.
32813 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32814 SiYu Wu <siyu@isrc.iscas.ac.cn>
32816 * config/riscv/bitmanip.md: Add ZBKB's instructions.
32817 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
32818 * config/riscv/riscv.md: Add new type for crypto instructions.
32819 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
32821 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
32822 extension's built-in function file.
32824 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32825 SiYu Wu <siyu@isrc.iscas.ac.cn>
32827 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
32828 (RISCV_FTYPE_NAME3): New.
32829 (RISCV_ATYPE_QI): New.
32830 (RISCV_ATYPE_HI): New.
32831 (RISCV_FTYPE_ATYPES2): New.
32832 (RISCV_FTYPE_ATYPES3): New.
32833 * config/riscv/riscv-ftypes.def (2): New.
32836 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
32838 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
32841 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32842 kito-cheng <kito.cheng@sifive.com>
32844 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
32845 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
32846 (riscv_register_pragmas): Add builtin function check call.
32847 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
32848 (check_builtin_call): New function.
32849 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
32850 (class vreinterpret): Ditto.
32851 (class vlmul_ext): Ditto.
32852 (class vlmul_trunc): Ditto.
32853 (class vset): Ditto.
32854 (class vget): Ditto.
32856 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32857 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
32873 (vundefined): Add new intrinsic.
32874 (vreinterpret): Ditto.
32875 (vlmul_ext): Ditto.
32876 (vlmul_trunc): Ditto.
32879 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
32880 (struct narrow_alu_def): Ditto.
32881 (struct reduc_alu_def): Ditto.
32882 (struct vundefined_def): Ditto.
32883 (struct misc_def): Ditto.
32884 (struct vset_def): Ditto.
32885 (struct vget_def): Ditto.
32887 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32888 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
32889 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
32890 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
32891 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
32892 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
32893 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
32894 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
32895 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
32896 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
32897 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
32898 (DEF_RVV_LMUL1_OPS): Ditto.
32899 (DEF_RVV_LMUL2_OPS): Ditto.
32900 (DEF_RVV_LMUL4_OPS): Ditto.
32901 (vint16mf4_t): Ditto.
32902 (vint16mf2_t): Ditto.
32903 (vint16m1_t): Ditto.
32904 (vint16m2_t): Ditto.
32905 (vint16m4_t): Ditto.
32906 (vint16m8_t): Ditto.
32907 (vint32mf2_t): Ditto.
32908 (vint32m1_t): Ditto.
32909 (vint32m2_t): Ditto.
32910 (vint32m4_t): Ditto.
32911 (vint32m8_t): Ditto.
32912 (vint64m1_t): Ditto.
32913 (vint64m2_t): Ditto.
32914 (vint64m4_t): Ditto.
32915 (vint64m8_t): Ditto.
32916 (vuint16mf4_t): Ditto.
32917 (vuint16mf2_t): Ditto.
32918 (vuint16m1_t): Ditto.
32919 (vuint16m2_t): Ditto.
32920 (vuint16m4_t): Ditto.
32921 (vuint16m8_t): Ditto.
32922 (vuint32mf2_t): Ditto.
32923 (vuint32m1_t): Ditto.
32924 (vuint32m2_t): Ditto.
32925 (vuint32m4_t): Ditto.
32926 (vuint32m8_t): Ditto.
32927 (vuint64m1_t): Ditto.
32928 (vuint64m2_t): Ditto.
32929 (vuint64m4_t): Ditto.
32930 (vuint64m8_t): Ditto.
32931 (vint8mf4_t): Ditto.
32932 (vint8mf2_t): Ditto.
32933 (vint8m1_t): Ditto.
32934 (vint8m2_t): Ditto.
32935 (vint8m4_t): Ditto.
32936 (vint8m8_t): Ditto.
32937 (vuint8mf4_t): Ditto.
32938 (vuint8mf2_t): Ditto.
32939 (vuint8m1_t): Ditto.
32940 (vuint8m2_t): Ditto.
32941 (vuint8m4_t): Ditto.
32942 (vuint8m8_t): Ditto.
32943 (vint8mf8_t): Ditto.
32944 (vuint8mf8_t): Ditto.
32945 (vfloat32mf2_t): Ditto.
32946 (vfloat32m1_t): Ditto.
32947 (vfloat32m2_t): Ditto.
32948 (vfloat32m4_t): Ditto.
32949 (vfloat64m1_t): Ditto.
32950 (vfloat64m2_t): Ditto.
32951 (vfloat64m4_t): Ditto.
32952 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
32953 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
32954 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
32955 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
32956 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
32957 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
32958 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
32959 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
32960 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
32961 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
32962 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
32963 (DEF_RVV_LMUL1_OPS): Ditto.
32964 (DEF_RVV_LMUL2_OPS): Ditto.
32965 (DEF_RVV_LMUL4_OPS): Ditto.
32966 (DEF_RVV_TYPE_INDEX): Ditto.
32967 (required_extensions_p): Adapt for new intrinsic support/
32968 (get_required_extensions): New function.
32969 (check_required_extensions): Ditto.
32970 (unsigned_base_type_p): Remove.
32971 (rvv_arg_type_info::get_scalar_ptr_type): New function.
32972 (get_mode_for_bitsize): Remove.
32973 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
32974 (rvv_arg_type_info::get_base_vector_type): Ditto.
32975 (rvv_arg_type_info::get_function_type_index): Ditto.
32976 (DEF_RVV_BASE_TYPE): New def.
32977 (function_builder::apply_predication): New class.
32978 (function_expander::mask_mode): Ditto.
32979 (function_checker::function_checker): Ditto.
32980 (function_checker::report_non_ice): Ditto.
32981 (function_checker::report_out_of_range): Ditto.
32982 (function_checker::require_immediate): Ditto.
32983 (function_checker::require_immediate_range): Ditto.
32984 (function_checker::check): Ditto.
32985 (check_builtin_call): Ditto.
32986 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
32987 (DEF_RVV_BASE_TYPE): Ditto.
32988 (DEF_RVV_TYPE_INDEX): Ditto.
32989 (vbool64_t): Ditto.
32990 (vbool32_t): Ditto.
32991 (vbool16_t): Ditto.
32996 (vuint8mf8_t): Ditto.
32997 (vuint8mf4_t): Ditto.
32998 (vuint8mf2_t): Ditto.
32999 (vuint8m1_t): Ditto.
33000 (vuint8m2_t): Ditto.
33001 (vint8m4_t): Ditto.
33002 (vuint8m4_t): Ditto.
33003 (vint8m8_t): Ditto.
33004 (vuint8m8_t): Ditto.
33005 (vint16mf4_t): Ditto.
33006 (vuint16mf2_t): Ditto.
33007 (vuint16m1_t): Ditto.
33008 (vuint16m2_t): Ditto.
33009 (vuint16m4_t): Ditto.
33010 (vuint16m8_t): Ditto.
33011 (vint32mf2_t): Ditto.
33012 (vuint32m1_t): Ditto.
33013 (vuint32m2_t): Ditto.
33014 (vuint32m4_t): Ditto.
33015 (vuint32m8_t): Ditto.
33016 (vuint64m1_t): Ditto.
33017 (vuint64m2_t): Ditto.
33018 (vuint64m4_t): Ditto.
33019 (vuint64m8_t): Ditto.
33020 (vfloat32mf2_t): Ditto.
33021 (vfloat32m1_t): Ditto.
33022 (vfloat32m2_t): Ditto.
33023 (vfloat32m4_t): Ditto.
33024 (vfloat32m8_t): Ditto.
33025 (vfloat64m1_t): Ditto.
33026 (vfloat64m4_t): Ditto.
33027 (vector): Move it def.
33030 (signed_vector): Ditto.
33031 (unsigned_vector): Ditto.
33032 (unsigned_scalar): Ditto.
33033 (vector_ptr): Ditto.
33034 (scalar_ptr): Ditto.
33035 (scalar_const_ptr): Ditto.
33039 (unsigned_long): Ditto.
33041 (eew8_index): Ditto.
33042 (eew16_index): Ditto.
33043 (eew32_index): Ditto.
33044 (eew64_index): Ditto.
33045 (shift_vector): Ditto.
33046 (double_trunc_vector): Ditto.
33047 (quad_trunc_vector): Ditto.
33048 (oct_trunc_vector): Ditto.
33049 (double_trunc_scalar): Ditto.
33050 (double_trunc_signed_vector): Ditto.
33051 (double_trunc_unsigned_vector): Ditto.
33052 (double_trunc_unsigned_scalar): Ditto.
33053 (double_trunc_float_vector): Ditto.
33054 (float_vector): Ditto.
33055 (lmul1_vector): Ditto.
33056 (widen_lmul1_vector): Ditto.
33057 (eew8_interpret): Ditto.
33058 (eew16_interpret): Ditto.
33059 (eew32_interpret): Ditto.
33060 (eew64_interpret): Ditto.
33061 (vlmul_ext_x2): Ditto.
33062 (vlmul_ext_x4): Ditto.
33063 (vlmul_ext_x8): Ditto.
33064 (vlmul_ext_x16): Ditto.
33065 (vlmul_ext_x32): Ditto.
33066 (vlmul_ext_x64): Ditto.
33067 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
33068 (struct function_type_info): New function.
33069 (struct rvv_arg_type_info): Ditto.
33070 (class function_checker): New class.
33071 (rvv_arg_type_info::get_scalar_type): New function.
33072 (rvv_arg_type_info::get_vector_type): Ditto.
33073 (function_expander::ret_mode): New function.
33074 (function_checker::arg_mode): Ditto.
33075 (function_checker::ret_mode): Ditto.
33076 * config/riscv/t-riscv: Add generator.
33077 * config/riscv/vector-iterators.md: New iterators.
33078 * config/riscv/vector.md (vundefined<mode>): New pattern.
33079 (@vundefined<mode>): Ditto.
33080 (@vreinterpret<mode>): Ditto.
33081 (@vlmul_extx2<mode>): Ditto.
33082 (@vlmul_extx4<mode>): Ditto.
33083 (@vlmul_extx8<mode>): Ditto.
33084 (@vlmul_extx16<mode>): Ditto.
33085 (@vlmul_extx32<mode>): Ditto.
33086 (@vlmul_extx64<mode>): Ditto.
33087 (*vlmul_extx2<mode>): Ditto.
33088 (*vlmul_extx4<mode>): Ditto.
33089 (*vlmul_extx8<mode>): Ditto.
33090 (*vlmul_extx16<mode>): Ditto.
33091 (*vlmul_extx32<mode>): Ditto.
33092 (*vlmul_extx64<mode>): Ditto.
33093 * config/riscv/genrvv-type-indexer.cc: New file.
33095 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33097 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
33098 (slide1_sew64_helper): New function.
33099 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
33100 (get_unknown_min_value): Ditto.
33101 (force_vector_length_operand): Ditto.
33102 (gen_no_side_effects_vsetvl_rtx): Ditto.
33103 (get_vl_x2_rtx): Ditto.
33104 (slide1_sew64_helper): Ditto.
33105 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
33106 (class vrgather): Ditto.
33107 (class vrgatherei16): Ditto.
33108 (class vcompress): Ditto.
33110 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33111 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
33112 (vslidedown): Ditto.
33113 (vslide1up): Ditto.
33114 (vslide1down): Ditto.
33115 (vfslide1up): Ditto.
33116 (vfslide1down): Ditto.
33118 (vrgatherei16): Ditto.
33119 (vcompress): Ditto.
33120 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
33121 (vint8mf8_t): Ditto.
33122 (vint8mf4_t): Ditto.
33123 (vint8mf2_t): Ditto.
33124 (vint8m1_t): Ditto.
33125 (vint8m2_t): Ditto.
33126 (vint8m4_t): Ditto.
33127 (vint16mf4_t): Ditto.
33128 (vint16mf2_t): Ditto.
33129 (vint16m1_t): Ditto.
33130 (vint16m2_t): Ditto.
33131 (vint16m4_t): Ditto.
33132 (vint16m8_t): Ditto.
33133 (vint32mf2_t): Ditto.
33134 (vint32m1_t): Ditto.
33135 (vint32m2_t): Ditto.
33136 (vint32m4_t): Ditto.
33137 (vint32m8_t): Ditto.
33138 (vint64m1_t): Ditto.
33139 (vint64m2_t): Ditto.
33140 (vint64m4_t): Ditto.
33141 (vint64m8_t): Ditto.
33142 (vuint8mf8_t): Ditto.
33143 (vuint8mf4_t): Ditto.
33144 (vuint8mf2_t): Ditto.
33145 (vuint8m1_t): Ditto.
33146 (vuint8m2_t): Ditto.
33147 (vuint8m4_t): Ditto.
33148 (vuint16mf4_t): Ditto.
33149 (vuint16mf2_t): Ditto.
33150 (vuint16m1_t): Ditto.
33151 (vuint16m2_t): Ditto.
33152 (vuint16m4_t): Ditto.
33153 (vuint16m8_t): Ditto.
33154 (vuint32mf2_t): Ditto.
33155 (vuint32m1_t): Ditto.
33156 (vuint32m2_t): Ditto.
33157 (vuint32m4_t): Ditto.
33158 (vuint32m8_t): Ditto.
33159 (vuint64m1_t): Ditto.
33160 (vuint64m2_t): Ditto.
33161 (vuint64m4_t): Ditto.
33162 (vuint64m8_t): Ditto.
33163 (vfloat32mf2_t): Ditto.
33164 (vfloat32m1_t): Ditto.
33165 (vfloat32m2_t): Ditto.
33166 (vfloat32m4_t): Ditto.
33167 (vfloat32m8_t): Ditto.
33168 (vfloat64m1_t): Ditto.
33169 (vfloat64m2_t): Ditto.
33170 (vfloat64m4_t): Ditto.
33171 (vfloat64m8_t): Ditto.
33172 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
33173 * config/riscv/riscv.md: Adjust RVV instruction types.
33174 * config/riscv/vector-iterators.md (down): New iterator.
33175 (=vd,vr): New attribute.
33176 (UNSPEC_VSLIDE1UP): New unspec.
33177 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
33178 (*pred_slide<ud><mode>): Ditto.
33179 (*pred_slide<ud><mode>_extended): Ditto.
33180 (@pred_gather<mode>): Ditto.
33181 (@pred_gather<mode>_scalar): Ditto.
33182 (@pred_gatherei16<mode>): Ditto.
33183 (@pred_compress<mode>): Ditto.
33185 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33187 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
33189 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33191 * config/riscv/constraints.md (Wb1): New constraint.
33192 * config/riscv/predicates.md
33193 (vector_least_significant_set_mask_operand): New predicate.
33194 (vector_broadcast_mask_operand): Ditto.
33195 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
33196 (gen_scalar_move_mask): New function.
33197 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
33198 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
33199 (class vmv_s): Ditto.
33201 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33202 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
33206 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
33208 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33209 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
33210 (function_expander::use_exact_insn): New function.
33211 (function_expander::use_contiguous_load_insn): New function.
33212 (function_expander::use_contiguous_store_insn): New function.
33213 (function_expander::use_ternop_insn): New function.
33214 (function_expander::use_widen_ternop_insn): New function.
33215 (function_expander::use_scalar_move_insn): New function.
33216 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
33217 * config/riscv/riscv-vector-builtins.h
33218 (function_expander::add_scalar_move_mask_operand): New class.
33219 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
33220 (scalar_move_insn_p): Ditto.
33221 (has_vsetvl_killed_avl_p): Ditto.
33222 (anticipatable_occurrence_p): Ditto.
33223 (insert_vsetvl): Ditto.
33224 (get_vl_vtype_info): Ditto.
33225 (calculate_sew): Ditto.
33226 (calculate_vlmul): Ditto.
33227 (incompatible_avl_p): Ditto.
33228 (different_sew_p): Ditto.
33229 (different_lmul_p): Ditto.
33230 (different_ratio_p): Ditto.
33231 (different_tail_policy_p): Ditto.
33232 (different_mask_policy_p): Ditto.
33233 (possible_zero_avl_p): Ditto.
33234 (first_ratio_invalid_for_second_sew_p): Ditto.
33235 (first_ratio_invalid_for_second_lmul_p): Ditto.
33236 (second_ratio_invalid_for_first_sew_p): Ditto.
33237 (second_ratio_invalid_for_first_lmul_p): Ditto.
33238 (second_sew_less_than_first_sew_p): Ditto.
33239 (first_sew_less_than_second_sew_p): Ditto.
33240 (compare_lmul): Ditto.
33241 (second_lmul_less_than_first_lmul_p): Ditto.
33242 (first_lmul_less_than_second_lmul_p): Ditto.
33243 (first_ratio_less_than_second_ratio_p): Ditto.
33244 (second_ratio_less_than_first_ratio_p): Ditto.
33245 (DEF_INCOMPATIBLE_COND): Ditto.
33246 (greatest_sew): Ditto.
33247 (first_sew): Ditto.
33248 (second_sew): Ditto.
33249 (first_vlmul): Ditto.
33250 (second_vlmul): Ditto.
33251 (first_ratio): Ditto.
33252 (second_ratio): Ditto.
33253 (vlmul_for_first_sew_second_ratio): Ditto.
33254 (ratio_for_second_sew_first_vlmul): Ditto.
33255 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
33256 (always_unavailable): Ditto.
33257 (avl_unavailable_p): Ditto.
33258 (sew_unavailable_p): Ditto.
33259 (lmul_unavailable_p): Ditto.
33260 (ge_sew_unavailable_p): Ditto.
33261 (ge_sew_lmul_unavailable_p): Ditto.
33262 (ge_sew_ratio_unavailable_p): Ditto.
33263 (DEF_UNAVAILABLE_COND): Ditto.
33264 (same_sew_lmul_demand_p): Ditto.
33265 (propagate_avl_across_demands_p): Ditto.
33266 (reg_available_p): Ditto.
33267 (avl_info::has_non_zero_avl): Ditto.
33268 (vl_vtype_info::has_non_zero_avl): Ditto.
33269 (vector_insn_info::operator>=): Refactor.
33270 (vector_insn_info::parse_insn): Adjust for scalar move.
33271 (vector_insn_info::demand_vl_vtype): Remove.
33272 (vector_insn_info::compatible_p): New function.
33273 (vector_insn_info::compatible_avl_p): Ditto.
33274 (vector_insn_info::compatible_vtype_p): Ditto.
33275 (vector_insn_info::available_p): Ditto.
33276 (vector_insn_info::merge): Ditto.
33277 (vector_insn_info::fuse_avl): Ditto.
33278 (vector_insn_info::fuse_sew_lmul): Ditto.
33279 (vector_insn_info::fuse_tail_policy): Ditto.
33280 (vector_insn_info::fuse_mask_policy): Ditto.
33281 (vector_insn_info::dump): Ditto.
33282 (vector_infos_manager::release): Ditto.
33283 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
33284 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
33285 (pass_vsetvl::hard_empty_block_p): Ditto.
33286 (pass_vsetvl::backward_demand_fusion): Ditto.
33287 (pass_vsetvl::forward_demand_fusion): Ditto.
33288 (pass_vsetvl::refine_vsetvls): Ditto.
33289 (pass_vsetvl::cleanup_vsetvls): Ditto.
33290 (pass_vsetvl::commit_vsetvls): Ditto.
33291 (pass_vsetvl::propagate_avl): Ditto.
33292 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
33293 (struct demands_pair): Ditto.
33294 (struct demands_cond): Ditto.
33295 (struct demands_fuse_rule): Ditto.
33296 * config/riscv/vector-iterators.md: New iterator.
33297 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
33298 (*pred_broadcast<mode>): Ditto.
33299 (*pred_broadcast<mode>_extended_scalar): Ditto.
33300 (@pred_extract_first<mode>): Ditto.
33301 (*pred_extract_first<mode>): Ditto.
33302 (@pred_extract_first_trunc<mode>): Ditto.
33303 * config/riscv/riscv-vsetvl.def: New file.
33305 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
33307 * config/riscv/bitmanip.md: allow 0 constant in max/min
33310 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
33312 * config/riscv/bitmanip.md: Fix wrong index in the check.
33314 2023-03-04 Jakub Jelinek <jakub@redhat.com>
33316 PR middle-end/109006
33317 * vec.cc (test_auto_alias): Adjust comment for removal of
33319 * read-rtl-function.cc (function_reader::parse_block): Likewise.
33320 * gdbhooks.py: Likewise.
33322 2023-03-04 Jakub Jelinek <jakub@redhat.com>
33324 PR testsuite/108973
33325 * selftest-diagnostic.cc
33326 (test_diagnostic_context::test_diagnostic_context): Set
33327 caret_max_width to 80.
33329 2023-03-03 Alexandre Oliva <oliva@adacore.com>
33331 * gimple-ssa-warn-access.cc
33332 (pass_waccess::check_dangling_stores): Skip non-stores.
33334 2023-03-03 Alexandre Oliva <oliva@adacore.com>
33336 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
33337 after vmsr and vmrs, and lower the case of P0.
33339 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
33341 PR middle-end/109006
33342 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
33344 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
33346 PR middle-end/109006
33347 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
33349 2023-03-03 Jakub Jelinek <jakub@redhat.com>
33352 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
33353 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
33354 suppressed on stmt. For [static %E] warning, print access_nelts
33355 rather than access_size. Fix up comment wording.
33357 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
33359 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
33360 arch14 instead of z16.
33362 2023-03-03 Anthony Green <green@moxielogic.com>
33364 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
33366 2023-03-03 Anthony Green <green@moxielogic.com>
33368 * config/moxie/constraints.md (A, B, W): Change
33369 define_constraint to define_memory_constraint.
33371 2023-03-03 Xi Ruoyao <xry111@xry111.site>
33373 * toplev.cc (process_options): Fix the spelling of
33374 "-fstack-clash-protection".
33376 2023-03-03 Richard Biener <rguenther@suse.de>
33378 PR tree-optimization/109002
33379 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
33380 PHI-translate ANTIC_IN.
33382 2023-03-03 Jakub Jelinek <jakub@redhat.com>
33384 PR tree-optimization/108988
33385 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
33386 size_type_node before passing it as argument to fwrite. Formatting
33389 2023-03-03 Richard Biener <rguenther@suse.de>
33392 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
33393 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
33394 * config/i386/i386-features.h (scalar_chain::max_visits): New.
33395 (scalar_chain::build): Add bitmap parameter, return boolean.
33396 (scalar_chain::add_insn): Likewise.
33397 (scalar_chain::analyze_register_chain): Likewise.
33398 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
33399 Initialize max_visits.
33400 (scalar_chain::analyze_register_chain): When we exhaust
33401 max_visits, abort. Also abort when running into any
33403 (scalar_chain::add_insn): Propagate abort.
33404 (scalar_chain::build): Likewise. When aborting amend
33405 the set of disallowed insn with the insns set.
33406 (convert_scalars_to_vector): Adjust. Do not convert aborted
33409 2023-03-03 Richard Biener <rguenther@suse.de>
33412 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
33413 generate a DIE for a function scope static.
33415 2023-03-03 Alexandre Oliva <oliva@adacore.com>
33417 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
33419 2023-03-02 Jakub Jelinek <jakub@redhat.com>
33422 * target.h (emit_support_tinfos_callback): New typedef.
33423 * targhooks.h (default_emit_support_tinfos): Declare.
33424 * targhooks.cc (default_emit_support_tinfos): New function.
33425 * target.def (emit_support_tinfos): New target hook.
33426 * doc/tm.texi.in (emit_support_tinfos): Document it.
33427 * doc/tm.texi: Regenerated.
33428 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
33429 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
33431 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
33433 * ira-costs.cc: Include print-rtl.h.
33434 (record_reg_classes, scan_one_insn): Add code to print debug info.
33435 (record_operand_costs): Find and use smaller cost for hard reg
33438 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
33439 Paul-Antoine Arras <pa@codesourcery.com>
33441 * builtins.cc (mathfn_built_in_explicit): New.
33442 * config/gcn/gcn.cc: Include case-cfn-macros.h.
33443 (mathfn_built_in_explicit): Add prototype.
33444 (gcn_vectorize_builtin_vectorized_function): New.
33445 (gcn_libc_has_function): New.
33446 (TARGET_LIBC_HAS_FUNCTION): Define.
33447 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
33449 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
33451 PR tree-optimization/108979
33452 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
33453 operations on invariants.
33455 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
33457 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
33458 * config/s390/s390.cc (s390_option_override_internal): Make
33459 partial vector usage the default from z13 on.
33460 * config/s390/vector.md (len_load_v16qi): Add.
33461 (len_store_v16qi): Add.
33463 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
33465 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
33466 of constant 0 offset.
33468 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
33470 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
33472 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
33474 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
33476 * config.gcc: add -with-{no-}msa build option.
33477 * config/mips/mips.h: Likewise.
33478 * doc/install.texi: Likewise.
33480 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
33482 PR tree-optimization/108603
33483 * explow.cc (convert_memory_address_addr_space_1): Only wrap
33484 the result of a recursive call in a CONST if no instructions
33487 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
33489 PR tree-optimization/108430
33490 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
33491 of inverted condition.
33493 2023-03-02 Jakub Jelinek <jakub@redhat.com>
33496 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
33497 comparison copy the bytes from ptr to a temporary buffer and clearing
33498 padding bits in there.
33500 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
33502 PR middle-end/108545
33503 * gimplify.cc (struct tree_operand_hash_no_se): New.
33504 (omp_index_mapping_groups_1, omp_index_mapping_groups,
33505 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
33506 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
33507 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
33508 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
33509 of tree_operand_hash.
33511 2023-03-01 LIU Hao <lh_mouse@126.com>
33514 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
33515 Remove the size limit `pch_VA_max_size`
33517 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
33519 PR middle-end/108546
33520 * omp-low.cc (lower_omp_target): Remove optional handling
33521 on the receiver side, i.e. inside target (data), for
33524 2023-03-01 Jakub Jelinek <jakub@redhat.com>
33527 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
33528 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
33530 2023-03-01 Richard Biener <rguenther@suse.de>
33532 PR tree-optimization/108970
33533 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
33534 Check we can copy the BBs.
33535 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
33537 (vect_do_peeling): Streamline error handling.
33539 2023-03-01 Richard Biener <rguenther@suse.de>
33541 PR tree-optimization/108950
33542 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
33543 Check oprnd0 is defined in the loop.
33544 * tree-vect-loop.cc (vectorizable_reduction): Record all
33545 operands vector types, compute that of invariants and
33546 properly update their SLP nodes.
33548 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
33551 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
33552 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
33554 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
33556 PR middle-end/107411
33557 PR middle-end/107411
33558 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
33560 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
33561 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
33563 2023-02-28 Jakub Jelinek <jakub@redhat.com>
33565 PR sanitizer/108894
33566 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
33567 comparison rather than index > bound.
33568 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
33569 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
33570 * doc/invoke.texi (-fsanitize=bounds): Document that whether
33571 flexible array member-like arrays are instrumented or not depends
33572 on -fstrict-flex-arrays* options of strict_flex_array attributes.
33573 (-fsanitize=bounds-strict): Document that flexible array members
33574 are not instrumented.
33576 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
33580 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
33581 (fmod<mode>3): Ditto.
33582 (fpremxf4_i387): Ditto.
33583 (reminderxf3): Ditto.
33584 (reminder<mode>3): Ditto.
33585 (fprem1xf4_i387): Ditto.
33587 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
33589 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
33590 generating FFS with mismatched operand and result modes, by using
33591 an explicit SIGN_EXTEND/ZERO_EXTEND.
33592 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
33593 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
33595 2023-02-27 Patrick Palka <ppalka@redhat.com>
33597 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
33598 * lra-int.h (lra_change_class): Likewise.
33599 * recog.h (which_op_alt): Likewise.
33600 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
33603 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33605 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
33607 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
33609 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
33610 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
33612 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
33614 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
33615 (xtensa_get_config_v3): New functions.
33617 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33619 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
33621 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
33623 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
33624 the macro to 0x1000000000.
33626 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
33629 * doc/gm2.texi (-fm2-pathname): New option documented.
33630 (-fm2-pathnameI): New option documented.
33631 (-fm2-prefix=): New option documented.
33632 (-fruntime-modules=): Update default module list.
33634 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
33637 * config/xtensa/xtensa-protos.h
33638 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
33639 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
33640 to xtensa_expand_call.
33641 (xtensa_expand_call): Emit the call and add a clobber expression
33642 for the static chain to it in case of windowed ABI.
33643 * config/xtensa/xtensa.md (call, call_value, sibcall)
33644 (sibcall_value): Call xtensa_expand_call and complete expansion
33645 right after that call.
33647 2023-02-24 Richard Biener <rguenther@suse.de>
33649 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
33650 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
33651 changing alignment of vec<T, A, vl_embed> and simplifying
33653 (vec<T, A, vl_embed>::address): Compute as this + 1.
33654 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
33655 vector instead of the offset of the m_vecdata member.
33656 (auto_vec<T, N>::m_data): Turn storage into
33657 uninitialized unsigned char.
33658 (auto_vec<T, N>::auto_vec): Allow allocation of one
33659 stack member. Initialize m_vec in a special way to
33660 avoid later stringop overflow diagnostics.
33661 * vec.cc (test_auto_alias): New.
33662 (vec_cc_tests): Call it.
33664 2023-02-24 Richard Biener <rguenther@suse.de>
33666 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
33667 take a const reference to the object, use address to
33669 (vec<T, A, vl_embed>::contains): Use address to access data.
33670 (vec<T, A, vl_embed>::operator[]): Use address instead of
33671 m_vecdata to access data.
33672 (vec<T, A, vl_embed>::iterate): Likewise.
33673 (vec<T, A, vl_embed>::copy): Likewise.
33674 (vec<T, A, vl_embed>::quick_push): Likewise.
33675 (vec<T, A, vl_embed>::pop): Likewise.
33676 (vec<T, A, vl_embed>::quick_insert): Likewise.
33677 (vec<T, A, vl_embed>::ordered_remove): Likewise.
33678 (vec<T, A, vl_embed>::unordered_remove): Likewise.
33679 (vec<T, A, vl_embed>::block_remove): Likewise.
33680 (vec<T, A, vl_heap>::address): Likewise.
33682 2023-02-24 Martin Liska <mliska@suse.cz>
33684 PR sanitizer/108834
33685 * asan.cc (asan_add_global): Use proper TU name for normal
33686 global variables (and aux_base_name for the artificial one).
33688 2023-02-24 Jakub Jelinek <jakub@redhat.com>
33690 * config/i386/i386-builtin.def: Update description of BDESC
33691 and BDESC_FIRST in file comment to include mask2.
33693 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33695 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
33697 2023-02-24 Jakub Jelinek <jakub@redhat.com>
33699 PR middle-end/108854
33700 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
33701 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
33702 nodes and adjust their DECL_CONTEXT.
33704 2023-02-24 Jakub Jelinek <jakub@redhat.com>
33707 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
33708 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
33709 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
33710 __builtin_ia32_cvtne2ps2bf16_v8bf,
33711 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
33712 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
33713 __builtin_ia32_cvtneps2bf16_v8sf_mask,
33714 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
33715 __builtin_ia32_cvtneps2bf16_v4sf_mask,
33716 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
33717 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
33718 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
33719 __builtin_ia32_dpbf16ps_v4sf_mask,
33720 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
33721 OPTION_MASK_ISA_AVX512VL.
33723 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
33725 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
33726 Add non-compact 32-bit multilibs.
33728 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
33730 * config/mips/mips.md (*clo<mode>2): New pattern.
33732 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
33734 * config/mips/mips.h (machine_function): New variable
33735 use_hazard_barrier_return_p.
33736 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
33737 (mips_hb_return_internal): New insn pattern.
33738 * config/mips/mips.cc (mips_attribute_table): Add attribute
33739 use_hazard_barrier_return.
33740 (mips_use_hazard_barrier_return_p): New static function.
33741 (mips_function_attr_inlinable_p): Likewise.
33742 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
33743 Emit error for unsupported architecture choice.
33744 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
33745 Return false for use_hazard_barrier_return.
33746 (mips_expand_epilogue): Emit hazard barrier return.
33747 * doc/extend.texi: Document use_hazard_barrier_return.
33749 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33751 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
33752 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
33753 for the gcc-internal headers.
33755 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33757 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
33758 and $(POSTCOMPILE) instead of manual dependency listing.
33759 * config/xtensa/xtensa-dynconfig.c: Rename to ...
33760 * config/xtensa/xtensa-dynconfig.cc: ... this.
33762 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
33764 * doc/cfg.texi: Reorder index entries around @items.
33765 * doc/cpp.texi: Ditto.
33766 * doc/cppenv.texi: Ditto.
33767 * doc/cppopts.texi: Ditto.
33768 * doc/generic.texi: Ditto.
33769 * doc/install.texi: Ditto.
33770 * doc/extend.texi: Ditto.
33771 * doc/invoke.texi: Ditto.
33772 * doc/md.texi: Ditto.
33773 * doc/rtl.texi: Ditto.
33774 * doc/tm.texi.in: Ditto.
33775 * doc/trouble.texi: Ditto.
33776 * doc/tm.texi: Regenerate.
33778 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33780 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
33781 the occurrence of general-purpose register used only once and for
33782 transferring intermediate value.
33784 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33786 * config/xtensa/xtensa.cc (machine_function): Add new member
33787 'eliminated_callee_saved_bmp'.
33788 (xtensa_can_eliminate_callee_saved_reg_p): New function to
33789 determine whether the register can be eliminated or not.
33790 (xtensa_expand_prologue): Add invoking the above function and
33791 elimination the use of callee-saved register by using its stack
33792 slot through the stack pointer (or the frame pointer if needed)
33794 (xtensa_expand_prologue): Modify to not emit register restoration
33795 insn from its stack slot if the register is already eliminated.
33797 2023-02-23 Jakub Jelinek <jakub@redhat.com>
33799 PR translation/108890
33800 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
33801 around fatal_error format strings.
33803 2023-02-23 Richard Biener <rguenther@suse.de>
33805 * tree-ssa-structalias.cc (handle_lhs_call): Do not
33806 re-create rhsc, only truncate it.
33808 2023-02-23 Jakub Jelinek <jakub@redhat.com>
33810 PR middle-end/106258
33811 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
33812 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
33814 2023-02-23 Richard Biener <rguenther@suse.de>
33816 * tree-if-conv.cc (tree_if_conversion): Properly manage
33817 memory of refs and the contained data references.
33819 2023-02-23 Richard Biener <rguenther@suse.de>
33821 PR tree-optimization/108888
33822 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
33823 calls to predicate.
33824 (predicate_statements): Only predicate calls with PLF_2.
33826 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33828 * config/xtensa/xtensa.md
33829 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
33830 Add missing "SI:" to PLUS RTXes.
33832 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33835 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
33836 Emit (use (reg:SI A0_REG)) at the end in the sibling call
33837 (i.e. the same place as (return) in the normal call).
33839 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33842 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
33845 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
33847 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
33848 (sibcall_value, sibcall_value_internal): Add 'use' expression
33851 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
33853 * doc/cppdiropts.texi: Reorder @opindex commands to precede
33854 @items they relate to.
33855 * doc/cppopts.texi: Ditto.
33856 * doc/cppwarnopts.texi: Ditto.
33857 * doc/invoke.texi: Ditto.
33858 * doc/lto.texi: Ditto.
33860 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
33862 * internal-fn.cc (expand_MASK_CALL): New.
33863 * internal-fn.def (MASK_CALL): New.
33864 * internal-fn.h (expand_MASK_CALL): New prototype.
33865 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
33866 for mask arguments also.
33867 * tree-if-conv.cc: Include cgraph.h.
33868 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
33869 (predicate_statements): Convert functions to IFN_MASK_CALL.
33870 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
33871 IFN_MASK_CALL as a SIMD function call.
33872 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
33873 IFN_MASK_CALL as an inbranch SIMD function call.
33874 Generate the mask vector arguments.
33876 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33878 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
33879 (class widen_reducop): Ditto.
33880 (class freducop): Ditto.
33881 (class widen_freducop): Ditto.
33883 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33884 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
33893 (vwredsumu): Ditto.
33894 (vfredusum): Ditto.
33895 (vfredosum): Ditto.
33898 (vfwredosum): Ditto.
33899 (vfwredusum): Ditto.
33900 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
33902 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33903 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
33904 (DEF_RVV_WU_OPS): Ditto.
33905 (DEF_RVV_WF_OPS): Ditto.
33906 (vint8mf8_t): Ditto.
33907 (vint8mf4_t): Ditto.
33908 (vint8mf2_t): Ditto.
33909 (vint8m1_t): Ditto.
33910 (vint8m2_t): Ditto.
33911 (vint8m4_t): Ditto.
33912 (vint8m8_t): Ditto.
33913 (vint16mf4_t): Ditto.
33914 (vint16mf2_t): Ditto.
33915 (vint16m1_t): Ditto.
33916 (vint16m2_t): Ditto.
33917 (vint16m4_t): Ditto.
33918 (vint16m8_t): Ditto.
33919 (vint32mf2_t): Ditto.
33920 (vint32m1_t): Ditto.
33921 (vint32m2_t): Ditto.
33922 (vint32m4_t): Ditto.
33923 (vint32m8_t): Ditto.
33924 (vuint8mf8_t): Ditto.
33925 (vuint8mf4_t): Ditto.
33926 (vuint8mf2_t): Ditto.
33927 (vuint8m1_t): Ditto.
33928 (vuint8m2_t): Ditto.
33929 (vuint8m4_t): Ditto.
33930 (vuint8m8_t): Ditto.
33931 (vuint16mf4_t): Ditto.
33932 (vuint16mf2_t): Ditto.
33933 (vuint16m1_t): Ditto.
33934 (vuint16m2_t): Ditto.
33935 (vuint16m4_t): Ditto.
33936 (vuint16m8_t): Ditto.
33937 (vuint32mf2_t): Ditto.
33938 (vuint32m1_t): Ditto.
33939 (vuint32m2_t): Ditto.
33940 (vuint32m4_t): Ditto.
33941 (vuint32m8_t): Ditto.
33942 (vfloat32mf2_t): Ditto.
33943 (vfloat32m1_t): Ditto.
33944 (vfloat32m2_t): Ditto.
33945 (vfloat32m4_t): Ditto.
33946 (vfloat32m8_t): Ditto.
33947 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
33948 (DEF_RVV_WU_OPS): Ditto.
33949 (DEF_RVV_WF_OPS): Ditto.
33950 (required_extensions_p): Add reduction support.
33951 (rvv_arg_type_info::get_base_vector_type): Ditto.
33952 (rvv_arg_type_info::get_tree_type): Ditto.
33953 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
33954 * config/riscv/riscv.md: Ditto.
33955 * config/riscv/vector-iterators.md (minu): Ditto.
33956 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
33957 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
33958 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
33959 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
33960 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
33961 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
33962 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
33964 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33966 * config/riscv/iterators.md: New iterator.
33967 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
33968 (enum ternop_type): New enum.
33969 (class vmacc): New class.
33970 (class imac): Ditto.
33971 (class vnmsac): Ditto.
33972 (enum widen_ternop_type): New enum.
33973 (class vmadd): Ditto.
33974 (class vnmsub): Ditto.
33975 (class iwmac): Ditto.
33976 (class vwmacc): Ditto.
33977 (class vwmaccu): Ditto.
33978 (class vwmaccsu): Ditto.
33979 (class vwmaccus): Ditto.
33980 (class reverse_binop): Ditto.
33981 (class vfmacc): Ditto.
33982 (class vfnmsac): Ditto.
33983 (class vfmadd): Ditto.
33984 (class vfnmsub): Ditto.
33985 (class vfnmacc): Ditto.
33986 (class vfmsac): Ditto.
33987 (class vfnmadd): Ditto.
33988 (class vfmsub): Ditto.
33989 (class vfwmacc): Ditto.
33990 (class vfwnmacc): Ditto.
33991 (class vfwmsac): Ditto.
33992 (class vfwnmsac): Ditto.
33993 (class float_misc): Ditto.
33994 (class fcmp): Ditto.
33995 (class vfclass): Ditto.
33996 (class vfcvt_x): Ditto.
33997 (class vfcvt_rtz_x): Ditto.
33998 (class vfcvt_f): Ditto.
33999 (class vfwcvt_x): Ditto.
34000 (class vfwcvt_rtz_x): Ditto.
34001 (class vfwcvt_f): Ditto.
34002 (class vfncvt_x): Ditto.
34003 (class vfncvt_rtz_x): Ditto.
34004 (class vfncvt_f): Ditto.
34005 (class vfncvt_rod_f): Ditto.
34007 * config/riscv/riscv-vector-builtins-bases.h:
34008 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
34052 (vfcvt_rtz_x): Ditto.
34053 (vfcvt_rtz_xu): Ditto.
34056 (vfwcvt_xu): Ditto.
34057 (vfwcvt_rtz_x): Ditto.
34058 (vfwcvt_rtz_xu): Ditto.
34061 (vfncvt_xu): Ditto.
34062 (vfncvt_rtz_x): Ditto.
34063 (vfncvt_rtz_xu): Ditto.
34065 (vfncvt_rod_f): Ditto.
34066 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
34067 (struct move_def): Ditto.
34068 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
34069 (DEF_RVV_CONVERT_I_OPS): Ditto.
34070 (DEF_RVV_CONVERT_U_OPS): Ditto.
34071 (DEF_RVV_WCONVERT_I_OPS): Ditto.
34072 (DEF_RVV_WCONVERT_U_OPS): Ditto.
34073 (DEF_RVV_WCONVERT_F_OPS): Ditto.
34074 (vfloat64m1_t): Ditto.
34075 (vfloat64m2_t): Ditto.
34076 (vfloat64m4_t): Ditto.
34077 (vfloat64m8_t): Ditto.
34078 (vint32mf2_t): Ditto.
34079 (vint32m1_t): Ditto.
34080 (vint32m2_t): Ditto.
34081 (vint32m4_t): Ditto.
34082 (vint32m8_t): Ditto.
34083 (vint64m1_t): Ditto.
34084 (vint64m2_t): Ditto.
34085 (vint64m4_t): Ditto.
34086 (vint64m8_t): Ditto.
34087 (vuint32mf2_t): Ditto.
34088 (vuint32m1_t): Ditto.
34089 (vuint32m2_t): Ditto.
34090 (vuint32m4_t): Ditto.
34091 (vuint32m8_t): Ditto.
34092 (vuint64m1_t): Ditto.
34093 (vuint64m2_t): Ditto.
34094 (vuint64m4_t): Ditto.
34095 (vuint64m8_t): Ditto.
34096 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
34097 (DEF_RVV_CONVERT_U_OPS): Ditto.
34098 (DEF_RVV_WCONVERT_I_OPS): Ditto.
34099 (DEF_RVV_WCONVERT_U_OPS): Ditto.
34100 (DEF_RVV_WCONVERT_F_OPS): Ditto.
34101 (DEF_RVV_F_OPS): Ditto.
34102 (DEF_RVV_WEXTF_OPS): Ditto.
34103 (required_extensions_p): Adjust for floating-point support.
34104 (check_required_extensions): Ditto.
34105 (unsigned_base_type_p): Ditto.
34106 (get_mode_for_bitsize): Ditto.
34107 (rvv_arg_type_info::get_base_vector_type): Ditto.
34108 (rvv_arg_type_info::get_tree_type): Ditto.
34109 * config/riscv/riscv-vector-builtins.def (v_f): New define.
34112 (xu_v): New define.
34114 (xu_w): New define.
34115 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
34116 (function_expander::arg_mode): New function.
34117 * config/riscv/vector-iterators.md (sof): New iterator.
34123 (fixuns_trunc): Ditto.
34125 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
34126 (@pred_<optab><mode>): Ditto.
34127 (@pred_<optab><mode>_scalar): Ditto.
34128 (@pred_<optab><mode>_reverse_scalar): Ditto.
34129 (@pred_<copysign><mode>): Ditto.
34130 (@pred_<copysign><mode>_scalar): Ditto.
34131 (@pred_mul_<optab><mode>): Ditto.
34132 (pred_mul_<optab><mode>_undef_merge): Ditto.
34133 (*pred_<madd_nmsub><mode>): Ditto.
34134 (*pred_<macc_nmsac><mode>): Ditto.
34135 (*pred_mul_<optab><mode>): Ditto.
34136 (@pred_mul_<optab><mode>_scalar): Ditto.
34137 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
34138 (*pred_<madd_nmsub><mode>_scalar): Ditto.
34139 (*pred_<macc_nmsac><mode>_scalar): Ditto.
34140 (*pred_mul_<optab><mode>_scalar): Ditto.
34141 (@pred_neg_mul_<optab><mode>): Ditto.
34142 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
34143 (*pred_<nmadd_msub><mode>): Ditto.
34144 (*pred_<nmacc_msac><mode>): Ditto.
34145 (*pred_neg_mul_<optab><mode>): Ditto.
34146 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
34147 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
34148 (*pred_<nmadd_msub><mode>_scalar): Ditto.
34149 (*pred_<nmacc_msac><mode>_scalar): Ditto.
34150 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
34151 (@pred_<misc_op><mode>): Ditto.
34152 (@pred_class<mode>): Ditto.
34153 (@pred_dual_widen_<optab><mode>): Ditto.
34154 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
34155 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
34156 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
34157 (@pred_widen_mul_<optab><mode>): Ditto.
34158 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
34159 (@pred_widen_neg_mul_<optab><mode>): Ditto.
34160 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
34161 (@pred_cmp<mode>): Ditto.
34162 (*pred_cmp<mode>): Ditto.
34163 (*pred_cmp<mode>_narrow): Ditto.
34164 (@pred_cmp<mode>_scalar): Ditto.
34165 (*pred_cmp<mode>_scalar): Ditto.
34166 (*pred_cmp<mode>_scalar_narrow): Ditto.
34167 (@pred_eqne<mode>_scalar): Ditto.
34168 (*pred_eqne<mode>_scalar): Ditto.
34169 (*pred_eqne<mode>_scalar_narrow): Ditto.
34170 (@pred_merge<mode>_scalar): Ditto.
34171 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
34172 (@pred_<fix_cvt><mode>): Ditto.
34173 (@pred_<float_cvt><mode>): Ditto.
34174 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
34175 (@pred_widen_<fix_cvt><mode>): Ditto.
34176 (@pred_widen_<float_cvt><mode>): Ditto.
34177 (@pred_extend<mode>): Ditto.
34178 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
34179 (@pred_narrow_<fix_cvt><mode>): Ditto.
34180 (@pred_narrow_<float_cvt><mode>): Ditto.
34181 (@pred_trunc<mode>): Ditto.
34182 (@pred_rod_trunc<mode>): Ditto.
34184 2023-02-22 Jakub Jelinek <jakub@redhat.com>
34186 PR middle-end/106258
34187 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
34188 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
34189 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
34190 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
34192 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
34194 * common.opt (-Wcomplain-wrong-lang): New.
34195 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
34196 * opts-common.cc (prune_options): Handle it.
34197 * opts-global.cc (complain_wrong_lang): Use it.
34199 2023-02-21 David Malcolm <dmalcolm@redhat.com>
34202 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
34204 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
34207 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
34209 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
34210 (sibcall_value, sibcall_value_internal): Add 'use' expression
34213 2023-02-21 Richard Biener <rguenther@suse.de>
34215 PR tree-optimization/108691
34216 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
34217 assert about calls_setjmp not becoming true when it was false.
34219 2023-02-21 Richard Biener <rguenther@suse.de>
34221 PR tree-optimization/108793
34222 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
34223 Use convert operands to niter_type when computing num.
34225 2023-02-21 Richard Biener <rguenther@suse.de>
34228 2023-02-13 Richard Biener <rguenther@suse.de>
34230 PR tree-optimization/108691
34231 * tree-cfg.cc (notice_special_calls): When the CFG is built
34232 honor gimple_call_ctrl_altering_p.
34233 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
34234 temporarily if the call is not control-altering.
34235 * calls.cc (emit_call_1): Do not add REG_SETJMP if
34236 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
34238 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34240 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
34241 true if register A0 (return address register) when -Og is specified.
34243 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
34245 * config/i386/predicates.md
34246 (general_x64constmem_operand): New predicate.
34247 * config/i386/i386.md (*cmpqi_ext<mode>_1):
34248 Use nonimm_x64constmem_operand.
34249 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
34250 (*addqi_ext<mode>_1): Ditto.
34251 (*testqi_ext<mode>_1): Ditto.
34252 (*andqi_ext<mode>_1): Ditto.
34253 (*andqi_ext<mode>_1_cc): Ditto.
34254 (*<any_or:code>qi_ext<mode>_1): Ditto.
34255 (*xorqi_ext<mode>_1_cc): Ditto.
34257 2023-02-20 Jakub Jelinek <jakub2redhat.com>
34260 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
34261 gen_umadddi4_highpart{,_le}.
34263 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
34265 * config/riscv/riscv.md (prefetch): Use r instead of p for the
34267 (riscv_prefetchi_<mode>): Ditto.
34269 2023-02-20 Richard Biener <rguenther@suse.de>
34271 PR tree-optimization/108816
34272 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
34273 versioning condition split prerequesite, assert required
34276 2023-02-20 Richard Biener <rguenther@suse.de>
34278 PR tree-optimization/108825
34279 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
34280 loop-local verfication only verify there's no pending SSA
34283 2023-02-20 Richard Biener <rguenther@suse.de>
34285 PR tree-optimization/108819
34286 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
34287 we have an SSA name as iv_2 as expected.
34289 2023-02-18 Jakub Jelinek <jakub@redhat.com>
34291 PR tree-optimization/108819
34292 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
34294 2023-02-18 Jakub Jelinek <jakub@redhat.com>
34297 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
34298 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
34300 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
34301 with ix86_replace_reg_with_reg.
34303 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
34305 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
34307 2023-02-18 Xi Ruoyao <xry111@xry111.site>
34309 * config.gcc (triplet_abi): Set its value based on $with_abi,
34310 instead of $target.
34311 (la_canonical_triplet): Set it after $triplet_abi is set
34313 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
34314 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
34317 2023-02-18 Andrew Pinski <apinski@marvell.com>
34319 * match.pd: Remove #if GIMPLE around the
34322 2023-02-18 Andrew Pinski <apinski@marvell.com>
34324 * value-query.h (get_range_query): Return the global ranges
34325 for a nullptr func.
34327 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
34329 * doc/invoke.texi (@item -Wall): Fix typo in
34332 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
34335 * config/i386/predicates.md
34336 (nonimm_x64constmem_operand): New predicate.
34337 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
34338 (*subqi_ext<mode>_0): Ditto.
34339 (*andqi_ext<mode>_0): Ditto.
34340 (*<any_or:code>qi_ext<mode>_0): Ditto.
34342 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
34345 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
34346 int_outermode instead of GET_MODE (tem) to prevent
34347 VOIDmode from entering simplify_gen_subreg.
34349 2023-02-17 Richard Biener <rguenther@suse.de>
34351 PR tree-optimization/108821
34352 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
34353 move volatile accesses.
34355 2023-02-17 Richard Biener <rguenther@suse.de>
34357 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
34358 called on virtual operands.
34359 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
34360 ssa_undefined_value_p calls.
34361 (vn_phi_insert): Likewise.
34362 (set_ssa_val_to): Likewise.
34363 (visit_phi): Avoid extra work with equivalences for
34364 virtual operand PHIs.
34366 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34368 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
34370 (class mask_nlogic): Ditto.
34371 (class mask_notlogic): Ditto.
34372 (class vmmv): Ditto.
34373 (class vmclr): Ditto.
34374 (class vmset): Ditto.
34375 (class vmnot): Ditto.
34376 (class vcpop): Ditto.
34377 (class vfirst): Ditto.
34378 (class mask_misc): Ditto.
34379 (class viota): Ditto.
34380 (class vid): Ditto.
34382 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34383 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
34402 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
34403 (struct mask_alu_def): Ditto.
34405 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34406 * config/riscv/riscv-vector-builtins.cc: Ditto.
34407 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
34408 for dest it scalar RVV intrinsics.
34409 * config/riscv/vector-iterators.md (sof): New iterator.
34410 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
34411 (@pred_<optab>not<mode>): New pattern.
34412 (@pred_popcount<VB:mode><P:mode>): New pattern.
34413 (@pred_ffs<VB:mode><P:mode>): New pattern.
34414 (@pred_<misc_op><mode>): New pattern.
34415 (@pred_iota<mode>): New pattern.
34416 (@pred_series<mode>): New pattern.
34418 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34420 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
34424 * config/riscv/riscv-vector-builtins.cc: Ditto.
34426 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34427 kito-cheng <kito.cheng@sifive.com>
34429 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
34430 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
34431 (sew64_scalar_helper): New function.
34432 * config/riscv/vector.md: Normalization.
34434 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34436 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
34498 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34500 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
34501 (@pred_<optab><mode>_scalar): Ditto.
34502 (*pred_<optab><mode>_scalar): Ditto.
34503 (*pred_<optab><mode>_extended_scalar): Ditto.
34505 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34507 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
34508 (init_builtins): Ditto.
34509 (mangle_builtin_type): Ditto.
34510 (verify_type_context): Ditto.
34511 (handle_pragma_vector): Ditto.
34512 (builtin_decl): Ditto.
34513 (expand_builtin): Ditto.
34514 (const_vec_all_same_in_range_p): Ditto.
34515 (legitimize_move): Ditto.
34516 (emit_vlmax_op): Ditto.
34517 (emit_nonvlmax_op): Ditto.
34518 (get_vlmul): Ditto.
34519 (get_ratio): Ditto.
34522 (get_avl_type): Ditto.
34523 (calculate_ratio): Ditto.
34524 (enum vlmul_type): Ditto.
34526 (neg_simm5_p): Ditto.
34527 (has_vi_variant_p): Ditto.
34529 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34531 * config/riscv/riscv-protos.h (simm32_p): Remove.
34532 * config/riscv/riscv-v.cc (simm32_p): Ditto.
34533 * config/riscv/vector.md: Use immediate_operand
34534 instead of riscv_vector::simm32_p.
34536 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
34538 * doc/invoke.texi (Optimize Options): Reword the explanation
34539 getting minimal, maximal and default values of a parameter.
34541 2023-02-16 Patrick Palka <ppalka@redhat.com>
34543 * addresses.h: Mechanically drop 'static' from 'static inline'
34544 functions via s/^static inline/inline/g.
34545 * asan.h: Likewise.
34546 * attribs.h: Likewise.
34547 * basic-block.h: Likewise.
34548 * bitmap.h: Likewise.
34549 * cfghooks.h: Likewise.
34550 * cfgloop.h: Likewise.
34551 * cgraph.h: Likewise.
34552 * cselib.h: Likewise.
34553 * data-streamer.h: Likewise.
34554 * debug.h: Likewise.
34556 * diagnostic.h: Likewise.
34557 * dominance.h: Likewise.
34558 * dumpfile.h: Likewise.
34559 * emit-rtl.h: Likewise.
34560 * except.h: Likewise.
34561 * expmed.h: Likewise.
34562 * expr.h: Likewise.
34563 * fixed-value.h: Likewise.
34564 * gengtype.h: Likewise.
34565 * gimple-expr.h: Likewise.
34566 * gimple-iterator.h: Likewise.
34567 * gimple-predict.h: Likewise.
34568 * gimple-range-fold.h: Likewise.
34569 * gimple-ssa.h: Likewise.
34570 * gimple.h: Likewise.
34571 * graphite.h: Likewise.
34572 * hard-reg-set.h: Likewise.
34573 * hash-map.h: Likewise.
34574 * hash-set.h: Likewise.
34575 * hash-table.h: Likewise.
34576 * hwint.h: Likewise.
34577 * input.h: Likewise.
34578 * insn-addr.h: Likewise.
34579 * internal-fn.h: Likewise.
34580 * ipa-fnsummary.h: Likewise.
34581 * ipa-icf-gimple.h: Likewise.
34582 * ipa-inline.h: Likewise.
34583 * ipa-modref.h: Likewise.
34584 * ipa-prop.h: Likewise.
34585 * ira-int.h: Likewise.
34587 * lra-int.h: Likewise.
34589 * lto-streamer.h: Likewise.
34590 * memmodel.h: Likewise.
34591 * omp-general.h: Likewise.
34592 * optabs-query.h: Likewise.
34593 * optabs.h: Likewise.
34594 * plugin.h: Likewise.
34595 * pretty-print.h: Likewise.
34596 * range.h: Likewise.
34597 * read-md.h: Likewise.
34598 * recog.h: Likewise.
34599 * regs.h: Likewise.
34600 * rtl-iter.h: Likewise.
34602 * sbitmap.h: Likewise.
34603 * sched-int.h: Likewise.
34604 * sel-sched-ir.h: Likewise.
34605 * sese.h: Likewise.
34606 * sparseset.h: Likewise.
34607 * ssa-iterators.h: Likewise.
34608 * system.h: Likewise.
34609 * target-globals.h: Likewise.
34610 * target.h: Likewise.
34611 * timevar.h: Likewise.
34612 * tree-chrec.h: Likewise.
34613 * tree-data-ref.h: Likewise.
34614 * tree-iterator.h: Likewise.
34615 * tree-outof-ssa.h: Likewise.
34616 * tree-phinodes.h: Likewise.
34617 * tree-scalar-evolution.h: Likewise.
34618 * tree-sra.h: Likewise.
34619 * tree-ssa-alias.h: Likewise.
34620 * tree-ssa-live.h: Likewise.
34621 * tree-ssa-loop-manip.h: Likewise.
34622 * tree-ssa-loop.h: Likewise.
34623 * tree-ssa-operands.h: Likewise.
34624 * tree-ssa-propagate.h: Likewise.
34625 * tree-ssa-sccvn.h: Likewise.
34626 * tree-ssa.h: Likewise.
34627 * tree-ssanames.h: Likewise.
34628 * tree-streamer.h: Likewise.
34629 * tree-switch-conversion.h: Likewise.
34630 * tree-vectorizer.h: Likewise.
34631 * tree.h: Likewise.
34632 * wide-int.h: Likewise.
34634 2023-02-16 Jakub Jelinek <jakub@redhat.com>
34636 PR tree-optimization/108657
34637 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
34638 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
34639 is a call to internal or builtin function.
34641 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
34643 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
34644 using-declaration to unhide functions.
34646 2023-02-16 Jakub Jelinek <jakub@redhat.com>
34648 PR tree-optimization/108783
34649 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
34650 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
34651 t to curr->op. Otherwise, punt if either newop1 or newop2 are
34652 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
34654 2023-02-16 Richard Biener <rguenther@suse.de>
34656 PR tree-optimization/108791
34657 * tree-ssa-forwprop.cc (optimize_vector_load): Build
34658 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
34661 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
34664 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
34665 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
34666 (ix86_expand_prologue): Likewise.
34668 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
34670 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
34672 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
34674 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
34675 int248_register_operand predicate in zero_extract sub-RTX.
34676 (*cmpqi_ext<mode>_2): Ditto.
34677 (*cmpqi_ext<mode>_3): Ditto.
34678 (*cmpqi_ext<mode>_4): Ditto.
34679 (*extzvqi_mem_rex64): Ditto.
34681 (*insvqi_1_mem_rex64): Ditto.
34682 (@insv<mode>_1): Ditto.
34683 (*insvqi_1): Ditto.
34684 (*insvqi_2): Ditto.
34685 (*insvqi_3): Ditto.
34686 (*extendqi<SWI24:mode>_ext_1): Ditto.
34687 (*addqi_ext<mode>_1): Ditto.
34688 (*addqi_ext<mode>_2): Ditto.
34689 (*subqi_ext<mode>_2): Ditto.
34690 (*testqi_ext<mode>_1): Ditto.
34691 (*testqi_ext<mode>_2): Ditto.
34692 (*andqi_ext<mode>_1): Ditto.
34693 (*andqi_ext<mode>_1_cc): Ditto.
34694 (*andqi_ext<mode>_2): Ditto.
34695 (*<any_or:code>qi_ext<mode>_1): Ditto.
34696 (*<any_or:code>qi_ext<mode>_2): Ditto.
34697 (*xorqi_ext<mode>_1_cc): Ditto.
34698 (*negqi_ext<mode>_2): Ditto.
34699 (*ashlqi_ext<mode>_2): Ditto.
34700 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
34702 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
34704 * config/i386/predicates.md (int248_register_operand):
34705 Rename from extr_register_operand.
34706 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
34707 (*extzx<mode>): Ditto.
34708 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
34709 (*ashl<mode>3_mask): Ditto.
34710 (*<any_shiftrt:insn><mode>3_mask): Ditto.
34711 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
34712 (*<any_rotate:insn><mode>3_mask): Ditto.
34713 (*<btsc><mode>_mask): Ditto.
34714 (*btr<mode>_mask): Ditto.
34715 (*jcc_bt<mode>_mask_1): Ditto.
34717 2023-02-15 Richard Biener <rguenther@suse.de>
34719 PR middle-end/26854
34720 * df-core.cc (df_worklist_propagate_forward): Put later
34721 blocks on worklist and only earlier blocks on pending.
34722 (df_worklist_propagate_backward): Likewise.
34723 (df_worklist_dataflow_doublequeue): Change the iteration
34724 to process new blocks in the same iteration if that
34725 maintains the iteration order.
34727 2023-02-15 Marek Polacek <polacek@redhat.com>
34729 PR middle-end/106080
34730 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
34733 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34735 * config/riscv/predicates.md: Refine codes.
34736 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
34737 * config/riscv/riscv-v.cc: Refine codes.
34738 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
34740 (class imac): New class.
34741 (enum widen_ternop_type): New enum.
34742 (class iwmac): New class.
34744 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34745 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
34753 * config/riscv/riscv-vector-builtins.cc
34754 (function_builder::apply_predication): Adjust for multiply-add support.
34755 (function_expander::add_vundef_operand): Refine codes.
34756 (function_expander::use_ternop_insn): New function.
34757 (function_expander::use_widen_ternop_insn): Ditto.
34758 * config/riscv/riscv-vector-builtins.h: New function.
34759 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
34760 (pred_mul_<optab><mode>_undef_merge): Ditto.
34761 (*pred_<madd_nmsub><mode>): Ditto.
34762 (*pred_<macc_nmsac><mode>): Ditto.
34763 (*pred_mul_<optab><mode>): Ditto.
34764 (@pred_mul_<optab><mode>_scalar): Ditto.
34765 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
34766 (*pred_<madd_nmsub><mode>_scalar): Ditto.
34767 (*pred_<macc_nmsac><mode>_scalar): Ditto.
34768 (*pred_mul_<optab><mode>_scalar): Ditto.
34769 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
34770 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
34771 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
34772 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
34773 (@pred_widen_mul_plus<su><mode>): Ditto.
34774 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
34775 (@pred_widen_mul_plussu<mode>): Ditto.
34776 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
34777 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
34779 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34781 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
34782 (vector_all_trues_mask_operand): New predicate.
34783 (vector_undef_operand): New predicate.
34784 (ltge_operator): New predicate.
34785 (comparison_except_ltge_operator): New predicate.
34786 (comparison_except_eqge_operator): New predicate.
34787 (ge_operator): New predicate.
34788 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
34789 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
34791 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34792 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
34802 * config/riscv/riscv-vector-builtins-shapes.cc
34803 (struct return_mask_def): Adjust for compare support.
34804 * config/riscv/riscv-vector-builtins.cc
34805 (function_expander::use_compare_insn): New function.
34806 * config/riscv/riscv-vector-builtins.h
34807 (function_expander::add_integer_operand): Ditto.
34808 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
34809 * config/riscv/riscv.md: Add vector min/max attributes.
34810 * config/riscv/vector-iterators.md (xnor): New iterator.
34811 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
34812 (*pred_cmp<mode>): Ditto.
34813 (*pred_cmp<mode>_narrow): Ditto.
34814 (@pred_ltge<mode>): Ditto.
34815 (*pred_ltge<mode>): Ditto.
34816 (*pred_ltge<mode>_narrow): Ditto.
34817 (@pred_cmp<mode>_scalar): Ditto.
34818 (*pred_cmp<mode>_scalar): Ditto.
34819 (*pred_cmp<mode>_scalar_narrow): Ditto.
34820 (@pred_eqne<mode>_scalar): Ditto.
34821 (*pred_eqne<mode>_scalar): Ditto.
34822 (*pred_eqne<mode>_scalar_narrow): Ditto.
34823 (*pred_cmp<mode>_extended_scalar): Ditto.
34824 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
34825 (*pred_eqne<mode>_extended_scalar): Ditto.
34826 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
34827 (@pred_ge<mode>_scalar): Ditto.
34828 (@pred_<optab><mode>): Ditto.
34829 (@pred_n<optab><mode>): Ditto.
34830 (@pred_<optab>n<mode>): Ditto.
34831 (@pred_not<mode>): Ditto.
34833 2023-02-15 Martin Jambor <mjambor@suse.cz>
34836 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
34837 creation of non-scalar replacements even if IPA-CP knows their
34840 2023-02-15 Jakub Jelinek <jakub@redhat.com>
34844 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
34845 expander, change operand 3 to be TImode, emit maddlddi4 and
34846 umadddi4_highpart{,_le} with its low half and finally add the high
34847 half to the result.
34849 2023-02-15 Martin Liska <mliska@suse.cz>
34851 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
34853 2023-02-15 Richard Biener <rguenther@suse.de>
34855 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
34856 for with_poison and alias worklist to it.
34857 (sanitize_asan_mark_poison): Likewise.
34859 2023-02-15 Richard Biener <rguenther@suse.de>
34862 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
34863 Combine bitmap test and set.
34864 (scalar_chain::add_insn): Likewise.
34865 (scalar_chain::analyze_register_chain): Remove redundant
34866 attempt to add to queue and instead strengthen assert.
34867 Sink common attempts to mark the def dual-mode.
34868 (scalar_chain::add_to_queue): Remove redundant insn bitmap
34871 2023-02-15 Richard Biener <rguenther@suse.de>
34874 * config/i386/i386-features.cc (convert_scalars_to_vector):
34875 Switch candidates bitmaps to tree view before building the chains.
34877 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
34879 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
34880 "failure trying to reload" call.
34882 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
34884 * gdbinit.in (phrs): New command.
34885 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
34886 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
34888 2023-02-14 David Faust <david.faust@oracle.com>
34891 * config/bpf/constraints.md (q): New memory constraint.
34892 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
34893 (zero_extendqidi2): Likewise.
34894 (zero_extendsidi2): Likewise.
34895 (*mov<MM:mode>): Likewise.
34897 2023-02-14 Andrew Pinski <apinski@marvell.com>
34899 PR tree-optimization/108355
34900 PR tree-optimization/96921
34901 * match.pd: Add pattern for "1 - bool_val".
34903 2023-02-14 Richard Biener <rguenther@suse.de>
34905 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
34906 basic block index hashing on the availability of ->cclhs.
34907 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
34908 rely on ->cclhs availability.
34909 (vn_phi_lookup): Set ->cclhs only when we are eventually
34910 going to CSE the PHI.
34911 (vn_phi_insert): Likewise.
34913 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
34915 * gimplify.cc (gimplify_save_expr): Add missing guard.
34917 2023-02-14 Richard Biener <rguenther@suse.de>
34919 PR tree-optimization/108782
34920 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
34921 Make sure we're not vectorizing an inner loop.
34923 2023-02-14 Jakub Jelinek <jakub@redhat.com>
34925 PR sanitizer/108777
34926 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
34927 * asan.h (asan_memfn_rtl): Declare.
34928 * asan.cc (asan_memfn_rtls): New variable.
34929 (asan_memfn_rtl): New function.
34930 * builtins.cc (expand_builtin): If
34931 param_asan_kernel_mem_intrinsic_prefix and function is
34932 kernel-{,hw}address sanitized, emit calls to
34933 __{,hw}asan_{memcpy,memmove,memset} rather than
34934 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
34935 instead of flag_sanitize & SANITIZE_ADDRESS to check if
34936 asan_intercepted_p functions shouldn't be expanded inline.
34938 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
34940 PR tree-optimization/96373
34941 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
34942 operations on the loop mask. Reject partial vectors if this isn't
34945 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
34947 PR rtl-optimization/108681
34948 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
34949 code to handle bare uses and clobbers.
34951 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
34953 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
34954 caller_save_p flag when clearing defined_p flag.
34955 (setup_reg_equiv): Ditto.
34956 * lra-constraints.cc (lra_constraints): Ditto.
34958 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
34961 * config/i386/predicates.md (extr_register_operand):
34962 New special predicate.
34963 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
34964 as operand 1 predicate.
34965 (*exzv<mode>): Ditto.
34966 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
34968 2023-02-13 Richard Biener <rguenther@suse.de>
34970 PR tree-optimization/28614
34971 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
34972 walking all edges in most cases.
34973 (vn_nary_op_insert_pieces_predicated): Avoid repeated
34974 calls to can_track_predicate_on_edge unless checking is
34976 (process_bb): Instead call it once here for each edge
34977 we register possibly multiple predicates on.
34979 2023-02-13 Richard Biener <rguenther@suse.de>
34981 PR tree-optimization/108691
34982 * tree-cfg.cc (notice_special_calls): When the CFG is built
34983 honor gimple_call_ctrl_altering_p.
34984 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
34985 temporarily if the call is not control-altering.
34986 * calls.cc (emit_call_1): Do not add REG_SETJMP if
34987 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
34989 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
34992 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
34993 (struct s390_sched_state): Initialise to zero.
34994 (s390_sched_variable_issue): For better debuggability also emit
34996 (s390_sched_init): Unconditionally reset scheduler state.
34998 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
35000 * ifcvt.h (noce_if_info::cond_inverted): New field.
35001 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
35002 values when cond_inverted is true.
35003 (noce_find_if_block): Allow the condition to be inverted when
35004 handling conditional moves.
35006 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
35008 * config/s390/predicates.md (execute_operation): Use
35009 constrain_operands instead of extract_constrain_insn in order to
35010 determine wheter there exists a valid alternative.
35012 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
35014 * common/config/arc/arc-common.cc (arc_option_optimization_table):
35015 Remove millicode from list.
35017 2023-02-13 Martin Liska <mliska@suse.cz>
35019 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
35021 2023-02-13 Richard Biener <rguenther@suse.de>
35023 PR tree-optimization/106722
35024 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
35025 whether we marked a stmt.
35026 (mark_control_dependent_edges_necessary): When
35027 mark_last_stmt_necessary didn't mark any stmt make sure
35028 to mark its control dependent edges.
35029 (propagate_necessity): Likewise.
35031 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
35033 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
35034 (DWARF_FRAME_REGISTERS): New.
35035 (DWARF_REG_TO_UNWIND_COLUMN): New.
35037 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
35039 * doc/sourcebuild.texi: Remove (broken) direct reference to
35040 "The GNU configure and build system".
35042 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
35044 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
35045 gen_add3_insn to gen_rtx_SET.
35046 (riscv_adjust_libcall_cfi_epilogue): Likewise.
35048 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35050 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
35051 (class vnclip): Ditto.
35053 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35054 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
35063 * config/riscv/vector-iterators.md (su): Add instruction.
35066 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
35067 (@pred_<sat_op><mode>_scalar): Ditto.
35068 (*pred_<sat_op><mode>_scalar): Ditto.
35069 (*pred_<sat_op><mode>_extended_scalar): Ditto.
35070 (@pred_narrow_clip<v_su><mode>): Ditto.
35071 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
35073 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35075 * config/riscv/constraints.md (Wbr): Remove unused constraint.
35076 * config/riscv/predicates.md: Fix move operand predicate.
35077 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
35078 (class vncvt_x): Ditto.
35079 (class vmerge): Ditto.
35080 (class vmv_v): Ditto.
35082 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35083 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
35090 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
35091 (struct move_def): Ditto.
35093 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35094 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
35095 (DEF_RVV_WEXTU_OPS): Ditto
35096 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
35101 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
35102 * config/riscv/vector-iterators.md (nmsac):New iterator.
35103 (nmsub): New iterator.
35104 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
35105 (@pred_merge<mode>_scalar): New pattern.
35106 (*pred_merge<mode>_scalar): New pattern.
35107 (*pred_merge<mode>_extended_scalar): New pattern.
35108 (@pred_narrow_<optab><mode>): New pattern.
35109 (@pred_narrow_<optab><mode>_scalar): New pattern.
35110 (@pred_trunc<mode>): New pattern.
35112 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35114 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
35115 (class vmsbc): Ditto.
35116 (BASE): Define new class.
35117 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35118 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
35120 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
35123 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35124 * config/riscv/riscv-vector-builtins.cc
35125 (function_expander::use_exact_insn): Adjust for new support
35126 * config/riscv/riscv-vector-builtins.h
35127 (function_base::has_merge_operand_p): New function.
35128 * config/riscv/vector-iterators.md: New iterator.
35129 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
35130 (@pred_msbc<mode>): Ditto.
35131 (@pred_madc<mode>_scalar): Ditto.
35132 (@pred_msbc<mode>_scalar): Ditto.
35133 (*pred_madc<mode>_scalar): Ditto.
35134 (*pred_madc<mode>_extended_scalar): Ditto.
35135 (*pred_msbc<mode>_scalar): Ditto.
35136 (*pred_msbc<mode>_extended_scalar): Ditto.
35137 (@pred_madc<mode>_overflow): Ditto.
35138 (@pred_msbc<mode>_overflow): Ditto.
35139 (@pred_madc<mode>_overflow_scalar): Ditto.
35140 (@pred_msbc<mode>_overflow_scalar): Ditto.
35141 (*pred_madc<mode>_overflow_scalar): Ditto.
35142 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
35143 (*pred_msbc<mode>_overflow_scalar): Ditto.
35144 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
35146 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35148 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
35149 * config/riscv/riscv-v.cc (simm32_p): Ditto.
35150 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
35151 (class vsbc): Ditto.
35153 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35154 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
35156 * config/riscv/riscv-vector-builtins-shapes.cc
35157 (struct no_mask_policy_def): Ditto.
35159 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35160 * config/riscv/riscv-vector-builtins.cc
35161 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
35162 (rvv_arg_type_info::get_tree_type): Ditto.
35163 (function_expander::use_exact_insn): Ditto.
35164 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
35165 (function_base::use_mask_predication_p): New function.
35166 * config/riscv/vector-iterators.md: New iterator.
35167 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
35168 (@pred_sbc<mode>): Ditto.
35169 (@pred_adc<mode>_scalar): Ditto.
35170 (@pred_sbc<mode>_scalar): Ditto.
35171 (*pred_adc<mode>_scalar): Ditto.
35172 (*pred_adc<mode>_extended_scalar): Ditto.
35173 (*pred_sbc<mode>_scalar): Ditto.
35174 (*pred_sbc<mode>_extended_scalar): Ditto.
35176 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35178 * config/riscv/vector.md: use "zero" reg.
35180 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35182 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
35184 (class vwmulsu): Ditto.
35185 (class vwcvt): Ditto.
35186 (BASE): Add integer widening support.
35187 * config/riscv/riscv-vector-builtins-bases.h: Ditto
35188 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
35189 (vwsub): New class.
35190 (vwmul): New class.
35191 (vwmulu): New class.
35192 (vwmulsu): New class.
35193 (vwaddu): New class.
35194 (vwsubu): New class.
35195 (vwcvt_x): New class.
35196 (vwcvtu_x): New class.
35197 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
35199 (struct widen_alu_def): New class.
35200 (SHAPE): New class.
35201 * config/riscv/riscv-vector-builtins-shapes.h: New class.
35202 * config/riscv/riscv-vector-builtins.cc
35203 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
35204 (rvv_arg_type_info::get_tree_type): Ditto.
35205 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
35207 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
35209 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
35210 * config/riscv/riscv.h (X0_REGNUM): New constant.
35211 * config/riscv/vector-iterators.md: New iterators.
35212 * config/riscv/vector.md
35213 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
35215 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
35217 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
35218 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
35220 (@pred_widen_mulsu<mode>): Ditto.
35221 (@pred_widen_mulsu<mode>_scalar): Ditto.
35222 (@pred_<optab><mode>): Ditto.
35224 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35225 kito-cheng <kito.cheng@sifive.com>
35227 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
35228 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
35230 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35231 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
35235 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
35237 (DEF_RVV_FULL_V_U_OPS): Ditto.
35238 (vint8mf8_t): Ditto.
35239 (vint8mf4_t): Ditto.
35240 (vint8mf2_t): Ditto.
35241 (vint8m1_t): Ditto.
35242 (vint8m2_t): Ditto.
35243 (vint8m4_t): Ditto.
35244 (vint8m8_t): Ditto.
35245 (vint16mf4_t): Ditto.
35246 (vint16mf2_t): Ditto.
35247 (vint16m1_t): Ditto.
35248 (vint16m2_t): Ditto.
35249 (vint16m4_t): Ditto.
35250 (vint16m8_t): Ditto.
35251 (vint32mf2_t): Ditto.
35252 (vint32m1_t): Ditto.
35253 (vint32m2_t): Ditto.
35254 (vint32m4_t): Ditto.
35255 (vint32m8_t): Ditto.
35256 (vint64m1_t): Ditto.
35257 (vint64m2_t): Ditto.
35258 (vint64m4_t): Ditto.
35259 (vint64m8_t): Ditto.
35260 (vuint8mf8_t): Ditto.
35261 (vuint8mf4_t): Ditto.
35262 (vuint8mf2_t): Ditto.
35263 (vuint8m1_t): Ditto.
35264 (vuint8m2_t): Ditto.
35265 (vuint8m4_t): Ditto.
35266 (vuint8m8_t): Ditto.
35267 (vuint16mf4_t): Ditto.
35268 (vuint16mf2_t): Ditto.
35269 (vuint16m1_t): Ditto.
35270 (vuint16m2_t): Ditto.
35271 (vuint16m4_t): Ditto.
35272 (vuint16m8_t): Ditto.
35273 (vuint32mf2_t): Ditto.
35274 (vuint32m1_t): Ditto.
35275 (vuint32m2_t): Ditto.
35276 (vuint32m4_t): Ditto.
35277 (vuint32m8_t): Ditto.
35278 (vuint64m1_t): Ditto.
35279 (vuint64m2_t): Ditto.
35280 (vuint64m4_t): Ditto.
35281 (vuint64m8_t): Ditto.
35282 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
35283 (DEF_RVV_FULL_V_U_OPS): Ditto.
35284 (check_required_extensions): Add vmulh support.
35285 (rvv_arg_type_info::get_tree_type): Ditto.
35286 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
35287 (enum rvv_base_type): Ditto.
35288 * config/riscv/riscv.opt: Add 'V' extension flag.
35289 * config/riscv/vector-iterators.md (su): New iterator.
35290 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
35291 (@pred_mulh<v_su><mode>_scalar): Ditto.
35292 (*pred_mulh<v_su><mode>_scalar): Ditto.
35293 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
35295 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35297 * config/riscv/iterators.md: Add sign_extend/zero_extend.
35298 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
35300 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
35301 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
35304 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
35305 for vsext/vzext support.
35306 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
35308 (DEF_RVV_QEXTI_OPS): Ditto.
35309 (DEF_RVV_OEXTI_OPS): Ditto.
35310 (DEF_RVV_WEXTU_OPS): Ditto.
35311 (DEF_RVV_QEXTU_OPS): Ditto.
35312 (DEF_RVV_OEXTU_OPS): Ditto.
35313 (vint16mf4_t): Ditto.
35314 (vint16mf2_t): Ditto.
35315 (vint16m1_t): Ditto.
35316 (vint16m2_t): Ditto.
35317 (vint16m4_t): Ditto.
35318 (vint16m8_t): Ditto.
35319 (vint32mf2_t): Ditto.
35320 (vint32m1_t): Ditto.
35321 (vint32m2_t): Ditto.
35322 (vint32m4_t): Ditto.
35323 (vint32m8_t): Ditto.
35324 (vint64m1_t): Ditto.
35325 (vint64m2_t): Ditto.
35326 (vint64m4_t): Ditto.
35327 (vint64m8_t): Ditto.
35328 (vuint16mf4_t): Ditto.
35329 (vuint16mf2_t): Ditto.
35330 (vuint16m1_t): Ditto.
35331 (vuint16m2_t): Ditto.
35332 (vuint16m4_t): Ditto.
35333 (vuint16m8_t): Ditto.
35334 (vuint32mf2_t): Ditto.
35335 (vuint32m1_t): Ditto.
35336 (vuint32m2_t): Ditto.
35337 (vuint32m4_t): Ditto.
35338 (vuint32m8_t): Ditto.
35339 (vuint64m1_t): Ditto.
35340 (vuint64m2_t): Ditto.
35341 (vuint64m4_t): Ditto.
35342 (vuint64m8_t): Ditto.
35343 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
35344 (DEF_RVV_QEXTI_OPS): Ditto.
35345 (DEF_RVV_OEXTI_OPS): Ditto.
35346 (DEF_RVV_WEXTU_OPS): Ditto.
35347 (DEF_RVV_QEXTU_OPS): Ditto.
35348 (DEF_RVV_OEXTU_OPS): Ditto.
35349 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
35351 (rvv_arg_type_info::get_tree_type): Ditto.
35352 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
35353 * config/riscv/vector-iterators.md (z): New attribute.
35354 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
35355 (@pred_<optab><mode>_vf4): Ditto.
35356 (@pred_<optab><mode>_vf8): Ditto.
35358 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35360 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
35361 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
35362 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
35363 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35364 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
35368 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
35373 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
35374 (@pred_<optab><mode>_scalar): New pattern.
35375 (*pred_<optab><mode>_scalar): New pattern.
35376 (*pred_<optab><mode>_extended_scalar): New pattern.
35378 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35380 * config/riscv/iterators.md: Add neg and not.
35381 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
35383 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35384 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
35405 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
35406 (struct alu_def): Ditto.
35408 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35409 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
35410 * config/riscv/vector-iterators.md: New iterator.
35411 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
35413 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35415 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
35417 2023-02-11 Jakub Jelinek <jakub@redhat.com>
35420 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
35421 item->offset bit position is too large to be representable as
35422 unsigned int byte position.
35424 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
35426 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
35428 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
35430 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
35431 valid_combine only when ira_use_lra_p is true.
35433 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
35435 * params.opt (ira-simple-lra-insn-threshold): Add new param.
35436 * ira.cc (ira): Use the param to switch on simple LRA.
35438 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
35440 PR tree-optimization/108687
35441 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
35442 back to RFD_NONE mode for calculations.
35443 (ranger_cache::propagate_cache): Call the internal edge range API
35444 with RFD_READ_ONLY instead of changing the external routine.
35446 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
35448 PR tree-optimization/108520
35449 * gimple-range-infer.cc (check_assume_func): Invoke
35450 gimple_range_global directly instead using global_range_query.
35451 * value-query.cc (get_range_global): Add function context and
35452 avoid calling nonnull_arg_p if not cfun.
35453 (gimple_range_global): Add function context pointer.
35454 * value-query.h (imple_range_global): Add function context.
35456 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35458 * config/riscv/constraints.md (Wdm): Adjust constraint.
35459 (Wbr): New constraint.
35460 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
35461 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
35462 (emit_vlmax_op): New function.
35463 (emit_nonvlmax_op): Ditto.
35465 (neg_simm5_p): Ditto.
35466 (has_vi_variant_p): Ditto.
35467 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
35468 (emit_vlmax_op): New function.
35469 (emit_nonvlmax_op): Ditto.
35470 (expand_const_vector): Adjust function.
35471 (legitimize_move): Ditto.
35472 (simm32_p): New function.
35474 (neg_simm5_p): Ditto.
35475 (has_vi_variant_p): Ditto.
35476 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
35478 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35479 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
35482 (vminu): Remove signed cases.
35484 (vdiv): Remove unsigned cases.
35486 (vdivu): Remove signed cases.
35490 (vrsub): New class.
35495 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
35496 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
35497 * config/riscv/vector-iterators.md: New iterators.
35498 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
35500 (@pred_<optab><mode>_scalar): New pattern.
35501 (@pred_sub<mode>_reverse_scalar): Ditto.
35502 (*pred_<optab><mode>_scalar): Ditto.
35503 (*pred_<optab><mode>_extended_scalar): Ditto.
35504 (*pred_sub<mode>_reverse_scalar): Ditto.
35505 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
35507 2023-02-10 Richard Biener <rguenther@suse.de>
35509 PR tree-optimization/108724
35510 * tree-vect-stmts.cc (vectorizable_operation): Avoid
35511 using word_mode vectors when vector lowering will
35512 decompose them to elementwise operations.
35514 2023-02-10 Jakub Jelinek <jakub@redhat.com>
35517 2023-02-09 Martin Liska <mliska@suse.cz>
35520 * doc/extend.texi: Document that the function
35521 does not work correctly for old VIA processors.
35523 2023-02-10 Andrew Pinski <apinski@marvell.com>
35524 Andrew Macleod <amacleod@redhat.com>
35526 PR tree-optimization/108684
35527 * tree-ssa-dce.cc (simple_dce_from_worklist):
35528 Check all ssa names and not just non-vdef ones
35529 before accepting the inline-asm.
35530 Call unlink_stmt_vdef on the statement before
35533 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
35535 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
35536 * ira.cc (validate_equiv_mem): Check memref address variance.
35537 (no_equiv): Clear caller_save_p flag.
35538 (update_equiv_regs): Define caller save equivalence for
35540 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
35541 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
35542 call_save_p. Use caller save equivalence depending on the arg.
35543 (split_reg): Adjust the call.
35545 2023-02-09 Jakub Jelinek <jakub@redhat.com>
35548 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
35549 (cpu_indicator_init): Call get_available_features for all CPUs with
35550 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
35553 2023-02-09 Jakub Jelinek <jakub@redhat.com>
35555 PR tree-optimization/108688
35556 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
35557 of BIT_INSERT_EXPR extracting exactly all inserted bits even
35558 when without mode precision. Formatting fixes.
35560 2023-02-09 Andrew Pinski <apinski@marvell.com>
35562 PR tree-optimization/108688
35563 * match.pd (bit_field_ref [bit_insert]): Avoid generating
35564 BIT_FIELD_REFs of non-mode-precision integral operands.
35566 2023-02-09 Martin Liska <mliska@suse.cz>
35569 * doc/extend.texi: Document that the function
35570 does not work correctly for old VIA processors.
35572 2023-02-09 Andreas Schwab <schwab@suse.de>
35574 * lto-wrapper.cc (merge_and_complain): Handle
35575 -funwind-tables and -fasynchronous-unwind-tables.
35576 (append_compiler_options): Likewise.
35578 2023-02-09 Richard Biener <rguenther@suse.de>
35580 PR tree-optimization/26854
35581 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
35582 view around insert_updated_phi_nodes_for.
35583 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
35585 (walk_aliased_vdefs_1): Likewise.
35587 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
35589 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
35591 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
35594 * config.gcc (tm_mlib_file): Define new variable.
35596 2023-02-08 Jakub Jelinek <jakub@redhat.com>
35598 PR tree-optimization/108692
35599 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
35600 widened_code which is different from code, don't call
35601 vect_look_through_possible_promotion but instead just check op is
35602 SSA_NAME with integral type for which vect_is_simple_use is true
35603 and call set_op on this_unprom.
35605 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
35607 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
35609 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
35611 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
35612 to 'aarch_ra_sign_key'.
35613 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
35615 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
35616 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
35617 * config/arm/arm.opt: Define.
35619 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
35621 PR tree-optimization/108316
35622 * tree-vect-stmts.cc (get_load_store_type): When using
35623 internal functions for gather/scatter, make sure that the type
35624 of the offset argument is consistent with the offset vector type.
35626 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
35629 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
35631 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
35632 * ira.cc (validate_equiv_mem): Check memref address variance.
35633 (update_equiv_regs): Define caller save equivalence for
35635 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
35636 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
35637 call_save_p. Use caller save equivalence depending on the arg.
35638 (split_reg): Adjust the call.
35640 2023-02-08 Jakub Jelinek <jakub@redhat.com>
35642 * tree.def (SAD_EXPR): Remove outdated comment about missing
35645 2023-02-07 Marek Polacek <polacek@redhat.com>
35647 * doc/invoke.texi: Update -fchar8_t documentation.
35649 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
35651 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
35652 * ira.cc (validate_equiv_mem): Check memref address variance.
35653 (update_equiv_regs): Define caller save equivalence for
35655 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
35656 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
35657 call_save_p. Use caller save equivalence depending on the arg.
35658 (split_reg): Adjust the call.
35660 2023-02-07 Richard Biener <rguenther@suse.de>
35662 PR tree-optimization/26854
35663 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
35664 instead of immediate uses.
35666 2023-02-07 Jakub Jelinek <jakub@redhat.com>
35668 PR tree-optimization/106923
35669 * ipa-split.cc (execute_split_functions): Don't split returns_twice
35672 2023-02-07 Jakub Jelinek <jakub@redhat.com>
35674 PR tree-optimization/106433
35675 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
35676 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
35678 2023-02-07 Jan Hubicka <jh@suse.cz>
35680 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
35683 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
35685 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
35686 (process_asm): Create a constructor for GCN_STACK_SIZE.
35687 (main): Parse the -mstack-size option.
35689 2023-02-06 Alex Coplan <alex.coplan@arm.com>
35692 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
35693 Use correct constraint for operand 3.
35695 2023-02-06 Martin Jambor <mjambor@suse.cz>
35697 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
35699 2023-02-06 Xi Ruoyao <xry111@xry111.site>
35701 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
35702 New define_int_iterator.
35703 (bytepick_d_ashift_amount): Likewise.
35704 (bytepick_imm): New define_int_attr.
35705 (bytepick_w_lshiftrt_amount): Likewise.
35706 (bytepick_d_lshiftrt_amount): Likewise.
35707 (bytepick_w_<bytepick_imm>): New define_insn template.
35708 (bytepick_w_<bytepick_imm>_extend): Likewise.
35709 (bytepick_d_<bytepick_imm>): Likewise.
35710 (bytepick_w): Remove unused define_insn.
35711 (bytepick_d): Likewise.
35712 (UNSPEC_BYTEPICK_W): Remove unused unspec.
35713 (UNSPEC_BYTEPICK_D): Likewise.
35714 * config/loongarch/predicates.md (const_0_to_3_operand):
35715 Remove unused define_predicate.
35716 (const_0_to_7_operand): Likewise.
35718 2023-02-06 Jakub Jelinek <jakub@redhat.com>
35720 PR tree-optimization/108655
35721 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
35722 or -fsanitize=unreachable -fsanitize-trap=unreachable return
35723 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
35725 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
35727 * doc/install.texi (Specific): Remove PW32.
35729 2023-02-03 Jakub Jelinek <jakub@redhat.com>
35731 PR tree-optimization/108647
35732 * range-op.cc (operator_equal::op1_range,
35733 operator_not_equal::op1_range): Don't test op2 bound
35734 equality if op2.undefined_p (), instead set_varying.
35735 (operator_lt::op1_range, operator_le::op1_range,
35736 operator_gt::op1_range, operator_ge::op1_range): Return false if
35737 op2.undefined_p ().
35738 (operator_lt::op2_range, operator_le::op2_range,
35739 operator_gt::op2_range, operator_ge::op2_range): Return false if
35740 op1.undefined_p ().
35742 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
35744 PR tree-optimization/108639
35745 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
35747 (irange::operator==): Same.
35749 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
35751 PR tree-optimization/108647
35752 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
35753 (foperator_lt::op2_range): Same.
35754 (foperator_le::op1_range): Same.
35755 (foperator_le::op2_range): Same.
35756 (foperator_gt::op1_range): Same.
35757 (foperator_gt::op2_range): Same.
35758 (foperator_ge::op1_range): Same.
35759 (foperator_ge::op2_range): Same.
35760 (foperator_unordered_lt::op1_range): Same.
35761 (foperator_unordered_lt::op2_range): Same.
35762 (foperator_unordered_le::op1_range): Same.
35763 (foperator_unordered_le::op2_range): Same.
35764 (foperator_unordered_gt::op1_range): Same.
35765 (foperator_unordered_gt::op2_range): Same.
35766 (foperator_unordered_ge::op1_range): Same.
35767 (foperator_unordered_ge::op2_range): Same.
35769 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
35771 PR tree-optimization/107570
35772 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
35774 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
35776 * doc/gm2.texi (Internals): Remove from menu.
35777 (Using): Comment out ifnohtml conditional.
35778 (Documentation): Use gcc url.
35779 (License): Node simplified.
35780 (Copying): New node. Include gpl_v3_without_node.
35781 (Contributing): Node simplified.
35782 (Internals): Commented out.
35783 (Libraries): Node simplified.
35786 (Functions): Ditto.
35788 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
35790 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
35792 (mve_vqshluq_m_n_s<mode>): Likewise.
35793 (mve_vshlq_m_<supf><mode>): Likewise.
35794 (mve_vsriq_m_n_<supf><mode>): Likewise.
35795 (mve_vsubq_m_<supf><mode>): Likewise.
35797 2023-02-03 Martin Jambor <mjambor@suse.cz>
35800 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
35801 when comparing to an IPA-CP value.
35802 (dump_list_of_param_indices): New function.
35803 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
35804 Dump removed candidates using dump_list_of_param_indices.
35805 * ipa-param-manipulation.cc
35806 (ipa_param_body_adjustments::modify_expression): Add assert checking
35807 sizes of a VIEW_CONVERT_EXPR will match.
35808 (ipa_param_body_adjustments::modify_assignment): Likewise.
35810 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
35812 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
35813 * config/riscv/riscv.cc: Ditto.
35815 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35817 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
35821 * config/riscv/vector.md: Ditto.
35823 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35825 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
35826 * config/riscv/riscv-vector-builtins-bases.cc: New class.
35827 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
35830 * config/riscv/riscv-vector-builtins.cc: Ditto.
35831 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
35833 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
35835 * toplev.cc (toplev::main): Only print the version information header
35836 from toplevel main().
35838 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
35840 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
35841 cond_{ashl|ashr|lshr}
35843 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
35845 PR rtl-optimization/108086
35846 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
35847 Adjust size-related commentary accordingly.
35849 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
35851 PR rtl-optimization/108508
35852 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
35853 the splay tree search gives the first clobber in the second group,
35854 make sure that the root of the first clobber group is updated
35855 correctly. Enter the new clobber group into the definition splay
35858 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
35860 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
35861 Fix finding best match score.
35863 2023-02-02 Jakub Jelinek <jakub@redhat.com>
35866 PR rtl-optimization/108463
35868 * cselib.cc (cselib_current_insn): Move declaration earlier.
35869 (cselib_hasher::equal): For debug only locs, temporarily override
35870 cselib_current_insn to their l->setting_insn for the
35871 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
35872 promote some debug locs.
35873 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
35874 when using cselib call cselib_lookup_from_insn on the address but
35875 don't substitute it.
35877 2023-02-02 Richard Biener <rguenther@suse.de>
35879 PR middle-end/108625
35880 * genmatch.cc (expr::gen_transform): Also disallow resimplification
35881 from pushing to lseq with force_leaf.
35882 (dt_simplify::gen_1): Likewise.
35884 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
35886 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
35887 (struct kernargs): Replace the common content with kernargs_abi.
35888 (struct heap): Delete.
35889 (main): Read GCN_STACK_SIZE envvar.
35890 Allocate space for the device stacks.
35891 Write the new kernargs fields.
35892 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
35893 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
35894 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
35895 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
35896 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
35897 Set up the stacks from the values in the kernargs, not private.
35898 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
35899 (gcn_hsa_declare_function_name): Turn off the private segment.
35900 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
35901 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
35902 * config/gcn/gcn.opt (mstack-size): Change the description.
35904 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35907 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
35908 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
35909 addressing MVE predicate modes.
35910 (mve_bool_vec_to_const): Change to represent correct MVE predicate
35912 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
35914 (arm_vector_mode_supported_p): Likewise.
35915 (arm_mode_to_pred_mode): Add V2QI.
35916 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
35918 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
35919 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
35920 (v2qi_UP): New macro.
35921 (v4bi_UP): New macro.
35922 (v8bi_UP): New macro.
35923 (v16bi_UP): New macro.
35924 (arm_expand_builtin_args): Make it able to expand the new predicate
35926 * config/arm/arm-modes.def (V2QI): New mode.
35927 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
35928 Pred4x4_t): Remove unused predicate builtin types.
35929 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
35930 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
35931 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
35932 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
35933 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
35934 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
35935 of MODE_VECTOR_BOOL.
35936 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
35937 (MVE_VPRED): Likewise.
35938 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
35939 (MVE_vctp): New mode attribute.
35943 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
35944 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
35946 (mve_vpnothi): Rename this...
35947 (mve_vpnotv16bi): ... to this.
35948 (mve_vctp<mode1>q_mhi): Rename this...
35949 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
35950 (mve_vldrdq_gather_base_z_<supf>v2di,
35951 mve_vldrdq_gather_offset_z_<supf>v2di,
35952 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
35953 mve_vstrdq_scatter_base_p_<supf>v2di,
35954 mve_vstrdq_scatter_offset_p_<supf>v2di,
35955 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
35956 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
35957 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
35958 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
35959 mve_vldrdq_gather_base_wb_z_<supf>v2di,
35960 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
35961 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
35963 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
35965 (VCTP): ... with this.
35966 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
35967 (VCTP_M): ... with this.
35968 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
35969 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
35971 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35974 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
35975 (arm_modes_tieable_p): Make MVE predicate modes tieable.
35976 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
35977 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
35978 simplify_subreg to simplify subregs where the outermode is not scalar.
35980 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35983 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
35984 new qualifiers parameter and use unsigned short type for MVE predicate.
35985 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
35987 (arm_init_crypto_builtins): Likewise.
35989 2023-02-02 Jakub Jelinek <jakub@redhat.com>
35992 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
35993 * internal-fn.def (TRAP): Remove.
35994 * internal-fn.cc (expand_TRAP): Remove.
35995 * tree.cc (build_common_builtin_nodes): Define
35996 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
35997 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
35998 instead of BUILT_IN_TRAP.
35999 * gimple.cc (gimple_build_builtin_unreachable): Remove
36000 emitting internal function for BUILT_IN_TRAP.
36001 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
36002 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
36003 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
36004 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
36005 BUILT_IN_UNREACHABLE_TRAP.
36006 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
36007 * tree-cfg.cc (verify_gimple_call,
36008 pass_warn_function_return::execute): Likewise.
36009 * attribs.cc (decl_attributes): Don't report exclusions on
36010 BUILT_IN_UNREACHABLE_TRAP either.
36012 2023-02-02 liuhongt <hongtao.liu@intel.com>
36014 PR tree-optimization/108601
36015 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
36016 * tree-vect-loop.cc
36017 (vectorizable_nonlinear_induction): Remove
36018 vect_can_peel_nonlinear_iv_p.
36019 (vect_can_peel_nonlinear_iv_p): Don't peel
36020 nonlinear iv(mult or shift) for epilog when vf is not
36021 constant and moved the defination to ..
36022 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
36025 2023-02-02 Jakub Jelinek <jakub@redhat.com>
36027 PR middle-end/108435
36028 * tree-nested.cc (convert_nonlocal_omp_clauses)
36029 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
36030 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
36031 before calling declare_vars.
36032 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
36033 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
36034 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
36035 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
36037 2023-02-01 Tamar Christina <tamar.christina@arm.com>
36039 * common/config/aarch64/aarch64-common.cc
36040 (struct aarch64_option_extension): Add native_detect and document struct
36042 (all_extensions): Set new field native_detect.
36043 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
36046 2023-02-01 Martin Liska <mliska@suse.cz>
36048 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
36051 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
36053 PR tree-optimization/108356
36054 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
36055 do a search of the DOM tree for a range.
36057 2023-02-01 Martin Liska <mliska@suse.cz>
36060 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
36061 ony non-null values.
36062 * ipa.cc (walk_polymorphic_call_targets): Likewise.
36064 2023-02-01 Martin Liska <mliska@suse.cz>
36067 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
36070 2023-02-01 Jakub Jelinek <jakub@redhat.com>
36073 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
36074 subregs in DEBUG_INSNs.
36076 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
36078 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
36080 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
36082 * config/s390/s390.cc (s390_restore_gpr_p): New function.
36083 (s390_preserve_gpr_arg_in_range_p): New function.
36084 (s390_preserve_gpr_arg_p): New function.
36085 (s390_preserve_fpr_arg_p): New function.
36086 (s390_register_info_stdarg_fpr): Rename to ...
36087 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
36088 (s390_register_info_stdarg_gpr): Rename to ...
36089 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
36090 (s390_register_info): Use the renamed functions above.
36091 (s390_optimize_register_info): Likewise.
36092 (save_fpr): Generate CFI for -mpreserve-args.
36093 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
36094 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
36095 (s390_optimize_prologue): Likewise.
36096 * config/s390/s390.opt: New option -mpreserve-args
36098 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
36100 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
36101 (restore_gprs): Likewise.
36102 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
36103 frame pointer if a frame-pointer is used.
36104 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
36105 * config/s390/s390.md (stack_tie): Add a register operand and
36107 (@stack_tie<mode>): ... this.
36109 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
36111 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
36112 EMIT_CFI parameter.
36113 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
36114 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
36116 2023-02-01 Richard Biener <rguenther@suse.de>
36118 PR middle-end/108500
36119 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
36120 with tree traversal algorithm.
36122 2023-02-01 Jason Merrill <jason@redhat.com>
36124 * doc/invoke.texi: Document -Wno-changes-meaning.
36126 2023-02-01 David Malcolm <dmalcolm@redhat.com>
36128 * doc/invoke.texi (Static Analyzer Options): Add notes about
36129 limitations of -fanalyzer.
36131 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36133 * config/riscv/constraints.md (vj): New.
36135 * config/riscv/iterators.md: Add more opcode.
36136 * config/riscv/predicates.md (vector_arith_operand): New.
36137 (vector_neg_arith_operand): New.
36138 (vector_shift_operand): New.
36139 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
36140 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
36157 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
36174 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
36175 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
36176 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
36177 (DEF_RVV_U_OPS): New.
36178 (rvv_arg_type_info::get_base_vector_type): Handle
36179 RVV_BASE_shift_vector.
36180 (rvv_arg_type_info::get_tree_type): Ditto.
36181 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
36182 RVV_BASE_shift_vector.
36183 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
36184 * config/riscv/vector-iterators.md: Handle more opcode.
36185 * config/riscv/vector.md (@pred_<optab><mode>): New.
36187 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
36190 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
36193 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
36195 PR tree-optimization/108608
36196 * tree-vect-loop.cc (vect_transform_reduction): Handle single
36197 def-use cycles that involve function calls rather than tree codes.
36199 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
36201 PR tree-optimization/108385
36202 * gimple-range-gori.cc (gori_compute::compute_operand_range):
36203 Allow VARYING computations to continue if there is a relation.
36204 * range-op.cc (pointer_plus_operator::op2_range): New.
36206 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
36208 PR tree-optimization/108359
36209 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
36210 (range_operator::fold_range): If op1 is equivalent to op2 then
36211 invoke new fold_in_parts_equiv to operate on sub-components.
36212 * range-op.h (wi_fold_in_parts_equiv): New prototype.
36214 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
36216 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
36217 not abort calculations if there is a valid relation available.
36218 (gori_compute::refine_using_relation): Pass correct relation trio.
36219 (gori_compute::compute_operand1_range): Create trio and use it.
36220 (gori_compute::compute_operand2_range): Ditto.
36221 * range-op.cc (operator_plus::op1_range): Use correct trio member.
36222 (operator_minus::op1_range): Use correct trio member.
36223 * value-relation.cc (value_relation::create_trio): New.
36224 * value-relation.h (value_relation::create_trio): New prototype.
36226 2023-01-31 Jakub Jelinek <jakub@redhat.com>
36229 * config/i386/i386-expand.cc
36230 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
36231 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
36232 equal to bitsize of mode.
36234 2023-01-31 Jakub Jelinek <jakub@redhat.com>
36236 PR rtl-optimization/108596
36237 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
36238 ends with asm goto and has a crossing fallthrough edge to the same bb
36239 that contains at least one of its labels by restoring EDGE_CROSSING
36240 flag even on possible edge from cur_bb to new_bb successor.
36242 2023-01-31 Jakub Jelinek <jakub@redhat.com>
36245 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
36246 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
36247 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
36248 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
36249 uninitialized automatic variable __W.
36251 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
36253 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
36255 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36257 * config/riscv/riscv-protos.h (get_vector_mode): New function.
36258 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
36259 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
36260 (class loadstore): Adjust for indexed loads/stores support.
36262 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
36263 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
36279 * config/riscv/riscv-vector-builtins-shapes.cc
36280 (struct indexed_loadstore_def): New class.
36282 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36283 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
36284 for indexed loads/stores support.
36285 (check_required_extensions): Ditto.
36286 (rvv_arg_type_info::get_base_vector_type): New function.
36287 (rvv_arg_type_info::get_tree_type): Ditto.
36288 (function_builder::add_unique_function): Adjust for indexed loads/stores
36290 (function_expander::use_exact_insn): New function.
36291 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
36292 indexed loads/stores support.
36293 (struct rvv_arg_type_info): Ditto.
36294 (function_expander::index_mode): New function.
36295 (function_base::apply_tail_policy_p): Ditto.
36296 (function_base::apply_mask_policy_p): Ditto.
36297 * config/riscv/vector-iterators.md (unspec): New unspec.
36298 * config/riscv/vector.md (unspec): Ditto.
36299 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
36301 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
36302 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
36303 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
36304 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
36305 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
36306 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
36307 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
36308 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
36309 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
36310 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
36311 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
36312 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
36313 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
36315 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
36317 * config.gcc: Recognize x86_64-*-gnu* targets and include
36319 * config/i386/gnu64.h: Define configuration for new target
36320 including ld.so location.
36322 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
36324 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
36325 ampere1a to include SM4.
36327 2023-01-30 Andrew Pinski <apinski@marvell.com>
36329 PR tree-optimization/108582
36330 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
36331 for middlebb to have no phi nodes.
36333 2023-01-30 Richard Biener <rguenther@suse.de>
36335 PR tree-optimization/108574
36336 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
36337 sameval and def, ignore the equivalence if there's the
36338 danger of oscillating between two values.
36340 2023-01-30 Andreas Schwab <schwab@suse.de>
36342 * common/config/riscv/riscv-common.cc
36343 (riscv_option_optimization_table)
36344 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
36345 -fasynchronous-unwind-tables and -funwind-tables.
36346 * config.gcc (riscv*-*-linux*): Define
36347 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
36349 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
36351 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
36352 value of includedir.
36354 2023-01-30 Richard Biener <rguenther@suse.de>
36357 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
36360 2023-01-30 liuhongt <hongtao.liu@intel.com>
36362 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
36363 * doc/invoke.texi: Ditto.
36365 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
36367 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
36368 (stmt_may_terminate_function_p): If assuming return or EH
36369 volatile asm is safe.
36370 (find_always_executed_bbs): Fix handling of terminating BBS and
36371 infinite loops; add debug output.
36372 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
36374 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
36376 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
36377 off-by-one in checking the permissible shift-amount.
36379 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36381 * doc/extend.texi (Named Address Spaces): Update link to the
36384 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36386 * doc/standards.texi (Standards): Fix markup.
36388 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36390 * doc/standards.texi (Standards): Update link to Objective-C book.
36392 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36394 * doc/invoke.texi (Instrumentation Options): Update reference to
36397 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
36399 * doc/standards.texi: Update Go1 link.
36401 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36403 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
36404 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
36407 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36408 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
36410 * config/riscv/riscv-vector-builtins.cc
36411 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
36412 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
36413 (@pred_strided_store<mode>): Ditto.
36415 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36417 * config/riscv/vector.md (tail_policy_op_idx): Remove.
36418 (mask_policy_op_idx): Remove.
36419 (avl_type_op_idx): Remove.
36421 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
36423 PR tree-optimization/96373
36424 * tree.h (sign_mask_for): Declare.
36425 * tree.cc (sign_mask_for): New function.
36426 (signed_or_unsigned_type_for): For vector types, try to use the
36427 related_int_vector_mode.
36428 * genmatch.cc (commutative_op): Handle conditional internal functions.
36429 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
36431 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
36433 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
36434 Use the likely minimum VF when bounding the denominators to
36435 the estimated number of iterations.
36437 2023-01-27 Richard Biener <rguenther@suse.de>
36440 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
36441 and -Ofast FP environment side-effects.
36443 2023-01-27 Richard Biener <rguenther@suse.de>
36446 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
36447 Don't add crtfastmath.o for -shared.
36449 2023-01-27 Richard Biener <rguenther@suse.de>
36452 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
36455 2023-01-27 Richard Biener <rguenther@suse.de>
36458 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
36459 crtfastmath.o for -shared.
36461 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
36463 PR tree-optimization/108306
36464 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
36465 varying for shifts that are always out of void range.
36466 (operator_rshift::fold_range): Return [0, 0] not
36467 varying for shifts that are always out of void range.
36469 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
36471 PR tree-optimization/108447
36472 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
36473 Do not attempt to fold HONOR_NAN types.
36475 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36477 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
36478 Remove _m suffix for "vop_m" C++ overloaded API name.
36480 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36482 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
36483 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36484 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
36486 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
36487 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
36488 (vbool64_t): Ditto.
36489 (vbool32_t): Ditto.
36490 (vbool16_t): Ditto.
36495 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
36496 (rvv_arg_type_info::get_tree_type): Ditto.
36497 (function_expander::use_contiguous_load_insn): Ditto.
36498 * config/riscv/vector.md (@pred_store<mode>): Ditto.
36500 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36502 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
36503 (vsetvl_discard_result_insn_p): New function.
36504 (reg_killed_by_bb_p): rename to find_reg_killed_by.
36505 (find_reg_killed_by): New name.
36506 (get_vl): allow it to be called by more functions.
36507 (has_vsetvl_killed_avl_p): Add condition.
36508 (get_avl): allow it to be called by more functions.
36509 (insn_should_be_added_p): New function.
36510 (get_all_nonphi_defs): Refine function.
36511 (get_all_sets): Ditto.
36512 (get_same_bb_set): New function.
36513 (any_insn_in_bb_p): Ditto.
36514 (any_set_in_bb_p): Ditto.
36515 (get_vl_vtype_info): Add VLMAX forward optimization.
36516 (source_equal_p): Fix issues.
36517 (extract_single_source): Refine.
36518 (avl_info::multiple_source_equal_p): New function.
36519 (avl_info::operator==): Adjust for final version.
36520 (vl_vtype_info::operator==): Ditto.
36521 (vl_vtype_info::same_avl_p): Ditto.
36522 (vector_insn_info::parse_insn): Ditto.
36523 (vector_insn_info::available_p): New function.
36524 (vector_insn_info::merge): Adjust for final version.
36525 (vector_insn_info::dump): Add hard_empty.
36526 (pass_vsetvl::hard_empty_block_p): New function.
36527 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
36528 (pass_vsetvl::forward_demand_fusion): Ditto.
36529 (pass_vsetvl::demand_fusion): Ditto.
36530 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
36531 (pass_vsetvl::compute_local_properties): Adjust for final version.
36532 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
36533 (pass_vsetvl::refine_vsetvls): Ditto.
36534 (pass_vsetvl::commit_vsetvls): Ditto.
36535 (pass_vsetvl::propagate_avl): New function.
36536 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
36537 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
36539 2023-01-27 Jakub Jelinek <jakub@redhat.com>
36542 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
36543 from size_t to int.
36545 2023-01-27 Jakub Jelinek <jakub@redhat.com>
36548 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
36549 redirection of calls to __builtin_trap in addition to redirection
36550 to __builtin_unreachable.
36552 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36554 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
36556 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36558 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
36559 (emit_vsetvl_insn): Ditto.
36561 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36563 * config/riscv/vector.md: Fix constraints.
36565 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36567 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
36569 2023-01-27 Patrick Palka <ppalka@redhat.com>
36570 Jakub Jelinek <jakub@redhat.com>
36572 * tree-core.h (tree_code_type, tree_code_length): For
36573 C++17 and later, add inline keyword, otherwise don't define
36574 the arrays, but declare extern arrays.
36575 * tree.cc (tree_code_type, tree_code_length): Define these
36576 arrays for C++14 and older.
36578 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36580 * config/riscv/riscv-vsetvl.h: Change it into public.
36582 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36584 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
36587 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36589 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
36591 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36593 * config/riscv/vector.md: Fix incorrect attributes.
36595 2023-01-27 Richard Biener <rguenther@suse.de>
36598 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
36599 Don't add crtfastmath.o for -shared.
36601 2023-01-27 Alexandre Oliva <oliva@gnu.org>
36603 * doc/options.texi (option, RejectNegative): Mention that
36604 -g-started options are also implicitly negatable.
36606 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
36608 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
36609 Use get_typenode_from_name to get fixed-width integer type
36611 * config/riscv/riscv-vector-builtins.def: Update define with
36612 fixed-width integer type nodes.
36614 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36616 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
36617 (real_insn_and_same_bb_p): New function.
36618 (same_bb_and_after_or_equal_p): Remove it.
36619 (before_p): New function.
36620 (reg_killed_by_bb_p): Ditto.
36621 (has_vsetvl_killed_avl_p): Ditto.
36622 (get_vl): Move location so that we can call it.
36623 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
36624 (available_occurrence_p): Ditto.
36625 (dominate_probability_p): Remove it.
36626 (can_backward_propagate_p): Remove it.
36627 (get_all_nonphi_defs): New function.
36628 (get_all_predecessors): Ditto.
36629 (any_insn_in_bb_p): Ditto.
36630 (insert_vsetvl): Adjust AVL REG.
36631 (source_equal_p): New function.
36632 (extract_single_source): Ditto.
36633 (avl_info::single_source_equal_p): Ditto.
36634 (avl_info::operator==): Adjust for AVL=REG.
36635 (vl_vtype_info::same_avl_p): Ditto.
36636 (vector_insn_info::set_demand_info): Remove it.
36637 (vector_insn_info::compatible_p): Adjust for AVL=REG.
36638 (vector_insn_info::compatible_avl_p): New function.
36639 (vector_insn_info::merge): Adjust AVL=REG.
36640 (vector_insn_info::dump): Ditto.
36641 (pass_vsetvl::merge_successors): Remove it.
36642 (enum fusion_type): New enum.
36643 (pass_vsetvl::get_backward_fusion_type): New function.
36644 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
36645 (pass_vsetvl::forward_demand_fusion): Ditto.
36646 (pass_vsetvl::demand_fusion): Ditto.
36647 (pass_vsetvl::prune_expressions): Ditto.
36648 (pass_vsetvl::compute_local_properties): Ditto.
36649 (pass_vsetvl::cleanup_vsetvls): Ditto.
36650 (pass_vsetvl::commit_vsetvls): Ditto.
36651 (pass_vsetvl::init): Ditto.
36652 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
36653 (enum merge_type): New enum.
36655 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36657 * config/riscv/riscv-vsetvl.cc
36658 (vector_infos_manager::vector_infos_manager): Add probability.
36659 (vector_infos_manager::dump): Ditto.
36660 (pass_vsetvl::compute_probabilities): Ditto.
36661 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
36663 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36665 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
36666 (vector_insn_info::merge): Ditto.
36667 (vector_insn_info::dump): Ditto.
36668 (pass_vsetvl::merge_successors): Ditto.
36669 (pass_vsetvl::backward_demand_fusion): Ditto.
36670 (pass_vsetvl::forward_demand_fusion): Ditto.
36671 (pass_vsetvl::commit_vsetvls): Ditto.
36672 * config/riscv/riscv-vsetvl.h: Ditto.
36674 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36676 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
36679 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36681 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
36683 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36685 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
36686 Add pre-check for redundant flow.
36688 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36690 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
36691 (vector_infos_manager::free_bitmap_vectors): Ditto.
36692 (pass_vsetvl::pre_vsetvl): Adjust codes.
36693 * config/riscv/riscv-vsetvl.h: New function declaration.
36695 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36697 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
36698 (vector_insn_info::set_demand_info): New function.
36699 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
36700 (pass_vsetvl::merge_successors): Ditto.
36701 (pass_vsetvl::compute_global_backward_infos): Ditto.
36702 (pass_vsetvl::backward_demand_fusion): Ditto.
36703 (pass_vsetvl::forward_demand_fusion): Ditto.
36704 (pass_vsetvl::demand_fusion): New function.
36705 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
36706 * config/riscv/riscv-vsetvl.h: New function declaration.
36708 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36710 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
36712 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36714 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
36715 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
36717 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36719 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
36720 (backward_propagate_worthwhile_p): Fix non-worthwhile.
36722 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36724 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
36726 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36728 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
36729 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
36730 (pass_vsetvl::commit_vsetvls): Ditto.
36731 * config/riscv/riscv-vsetvl.h: New function declaration.
36733 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36735 * config/riscv/vector.md:
36737 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36739 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
36740 pred_store for vse.
36741 * config/riscv/riscv-vector-builtins.cc
36742 (function_expander::add_mem_operand): Refine function.
36743 (function_expander::use_contiguous_load_insn): Adjust new
36745 (function_expander::use_contiguous_store_insn): Ditto.
36746 * config/riscv/riscv-vector-builtins.h: Refine function.
36747 * config/riscv/vector.md (@pred_store<mode>): New pattern.
36749 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36751 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
36753 2023-01-26 Marek Polacek <polacek@redhat.com>
36755 PR middle-end/108543
36756 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
36757 if it was previously set.
36759 2023-01-26 Jakub Jelinek <jakub@redhat.com>
36761 PR tree-optimization/108540
36762 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
36763 are singletons, use range_true even if op1 != op2
36764 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
36765 even if intersection of the ranges is empty and one has
36766 zero low bound and another zero high bound, use range_true_and_false
36767 rather than range_false.
36768 (foperator_not_equal::fold_range): If both op1 and op2
36769 are singletons, use range_false even if op1 != op2
36770 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
36771 even if intersection of the ranges is empty and one has
36772 zero low bound and another zero high bound, use range_true_and_false
36773 rather than range_true.
36775 2023-01-26 Jakub Jelinek <jakub@redhat.com>
36777 * value-relation.cc (kind_string): Add const.
36778 (rr_negate_table, rr_swap_table, rr_intersect_table,
36779 rr_union_table, rr_transitive_table): Add static const, change
36780 element type from relation_kind to unsigned char.
36781 (relation_negate, relation_swap, relation_intersect, relation_union,
36782 relation_transitive): Cast rr_*_table element to relation_kind.
36783 (relation_to_code): Add static const.
36784 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
36786 2023-01-26 Richard Biener <rguenther@suse.de>
36788 PR tree-optimization/108547
36789 * gimple-predicate-analysis.cc (value_sat_pred_p):
36792 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
36794 PR tree-optimization/108522
36795 * tree-object-size.cc (compute_object_offset): Make EXPR
36796 argument non-const. Call component_ref_field_offset.
36798 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36800 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
36801 FEATURE_STRING field.
36803 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
36805 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
36807 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
36811 * gcc.cc: Provide default specs for Modula-2 so that when the
36812 language is not built-in better diagnostics are emitted for
36813 attempts to use .mod or .m2i file extensions.
36815 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36817 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
36819 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36821 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
36823 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36825 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
36828 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36830 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
36832 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36834 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
36836 2023-01-25 Richard Biener <rguenther@suse.de>
36838 PR tree-optimization/108523
36839 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
36840 backedge value for the result when using predication to
36843 2023-01-25 Richard Biener <rguenther@suse.de>
36845 * doc/lto.texi (Command line options): Reword and update reference
36846 to removed lto_read_all_file_options.
36848 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
36850 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
36853 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
36855 * doc/contrib.texi: Add Jose E. Marchesi.
36857 2023-01-25 Jakub Jelinek <jakub@redhat.com>
36859 PR tree-optimization/108498
36860 * gimple-ssa-store-merging.cc (class store_operand_info):
36861 End coment with full stop rather than comma.
36862 (split_group): Likewise.
36863 (merged_store_group::apply_stores): Clear string_concatenation if
36864 start or end aren't on a byte boundary.
36866 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
36867 Jakub Jelinek <jakub@redhat.com>
36869 PR tree-optimization/108522
36870 * tree-object-size.cc (compute_object_offset): Use
36871 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
36873 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36875 * config/xtensa/xtensa.md:
36876 Fix exit from loops detecting references before overwriting in the
36879 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
36881 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
36882 do elimination but only for hard register.
36883 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
36884 calls of get_hard_regno.
36886 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36888 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
36891 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
36894 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
36895 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
36898 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36900 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
36901 and only include 'csky/t-csky-linux' when enable multilib.
36902 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
36903 define it when disable multilib.
36905 2023-01-24 Richard Biener <rguenther@suse.de>
36907 PR tree-optimization/108500
36908 * dominance.h (calculate_dominance_info): Add parameter
36909 to indicate fast-query compute, defaulted to true.
36910 * dominance.cc (calculate_dominance_info): Honor
36911 fast-query compute parameter.
36912 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
36913 not compute the dominator fast-query DFS numbers.
36915 2023-01-24 Eric Biggers <ebiggers@google.com>
36918 * optc-save-gen.awk: Fix copy-and-paste error.
36920 2023-01-24 Jakub Jelinek <jakub@redhat.com>
36923 * cgraphbuild.cc: Include gimplify.h.
36924 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
36925 their corresponding DECL_VALUE_EXPR expressions after unsharing.
36927 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36930 * config.gcc (tm_file): Move the variable out of loop.
36932 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
36933 Yang Yujie <yangyujie@loongson.cn>
36936 * config/loongarch/loongarch.cc (loongarch_classify_address):
36937 Add precessint for CONST_INT.
36938 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
36939 (loongarch_print_operand): Increase the processing of '%c'.
36940 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
36941 And port the public operand modifiers information to this document.
36943 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36945 * doc/invoke.texi (-mbranch-protection): Update documentation.
36947 2023-01-23 Richard Biener <rguenther@suse.de>
36950 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
36952 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
36953 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
36954 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
36955 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
36957 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36959 * config/arm/aout.h (ra_auth_code): Add entry in enum.
36960 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
36961 to dwarf frame expression.
36962 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
36963 (arm_expand_prologue): Update frame related information and reg notes
36964 for pac/pacbit insn.
36965 (arm_regno_class): Check for pac pseudo reigster.
36966 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
36967 (arm_init_machine_status): Set pacspval_needed to zero.
36968 (arm_debugger_regno): Check for PAC register.
36969 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
36971 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
36972 (arm_unwind_emit): Update REG_CFA_REGISTER case._
36973 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
36974 (DWARF_PAC_REGNUM): Define.
36975 (IS_PAC_REGNUM): Likewise.
36976 (enum reg_class): Add PAC_REG entry.
36977 (machine_function): Add pacbti_needed state to structure.
36978 * config/arm/arm.md (RA_AUTH_CODE): Define.
36980 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36982 * config.gcc ($tm_file): Update variable.
36983 * config/arm/arm-mlib.h: Create new header file.
36984 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
36985 multilib arch directory.
36986 (MULTILIB_REUSE): Add multilib reuse rules.
36987 (MULTILIB_MATCHES): Add multilib match rules.
36989 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36991 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
36992 * config/arm/arm-tables.opt: Regenerate.
36993 * config/arm/arm-tune.md: Likewise.
36994 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
36995 * (-mfix-cmse-cve-2021-35465): Likewise.
36997 2023-01-23 Richard Biener <rguenther@suse.de>
36999 PR tree-optimization/108482
37000 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
37001 .LOOP_DIST_ALIAS calls.
37003 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37005 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
37006 * config/arm/arm-protos.h: Update.
37007 * config/arm/aarch-common-protos.h: Declare
37008 'aarch_bti_arch_check'.
37009 * config/arm/arm.cc (aarch_bti_enabled) Update.
37010 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
37011 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
37012 * config/arm/arm.md (bti_nop): New insn.
37013 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
37014 (aarch-bti-insert.o): New target.
37015 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
37016 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
37018 (gate): Make use of 'aarch_bti_arch_check'.
37019 * config/arm/arm-passes.def: New file.
37020 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
37022 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37024 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
37025 'aarch-bti-insert.o'.
37026 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
37028 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
37029 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
37030 (aarch64_output_mi_thunk)
37031 (aarch64_print_patchable_function_entry)
37032 (aarch64_file_end_indicate_exec_stack): Update renamed function
37033 calls to renamed functions.
37034 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
37035 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
37037 * config/aarch64/aarch64-bti-insert.cc: Delete.
37038 * config/arm/aarch-bti-insert.cc: New file including and
37039 generalizing code from aarch64-bti-insert.cc.
37040 * config/arm/aarch-common-protos.h: Update.
37042 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37044 * config/arm/arm.h (arm_arch8m_main): Declare it.
37045 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
37047 * config/arm/arm.cc (arm_arch8m_main): Define it.
37048 (arm_option_reconfigure_globals): Set arm_arch8m_main.
37049 (arm_compute_frame_layout, arm_expand_prologue)
37050 (thumb2_expand_return, arm_expand_epilogue)
37051 (arm_conditional_register_usage): Update for pac codegen.
37052 (arm_current_function_pac_enabled_p): New function.
37053 (aarch_bti_enabled) New function.
37054 (use_return_insn): Return zero when pac is enabled.
37055 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
37057 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
37058 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
37060 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37062 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
37063 mbranch-protection.
37065 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37066 Tejas Belagod <tbelagod@arm.com>
37068 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
37069 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
37071 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37072 Tejas Belagod <tbelagod@arm.com>
37073 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37075 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
37076 new pseudo register class _UVRSC_PAC.
37078 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37079 Tejas Belagod <tbelagod@arm.com>
37081 * config/arm/arm-c.cc (arm_cpu_builtins): Define
37082 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
37083 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
37085 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37086 Tejas Belagod <tbelagod@arm.com>
37088 * doc/sourcebuild.texi: Document arm_pacbti_hw.
37090 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37091 Tejas Belagod <tbelagod@arm.com>
37092 Richard Earnshaw <Richard.Earnshaw@arm.com>
37094 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
37095 -mbranch-protection option and initialize appropriate data structures.
37096 * config/arm/arm.opt (-mbranch-protection): New option.
37097 * doc/invoke.texi (Arm Options): Document it.
37099 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37100 Tejas Belagod <tbelagod@arm.com>
37102 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
37103 * config/arm/arm-cpus.in (pacbti): New feature.
37104 * doc/invoke.texi (Arm Options): Document it.
37106 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
37107 Tejas Belagod <tbelagod@arm.com>
37109 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
37110 (all_architectures): Fix comment.
37111 (aarch64_parse_extension): Rename return type, enum value names.
37112 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
37113 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
37114 Also rename corresponding enum values.
37115 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
37116 out aarch64_function_type and move it to common code as
37117 aarch_function_type in aarch-common.h.
37118 * config/aarch64/aarch64-protos.h: Include common types header,
37119 move out types aarch64_parse_opt_result and aarch64_key_type to
37121 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
37122 and functions out into aarch-common.h and aarch-common.cc. Fix up
37123 all the name changes resulting from the move.
37124 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
37126 * config/aarch64/aarch64.opt: Include aarch-common.h to import
37127 type move. Fix up name changes from factoring out common code and
37129 * config/arm/aarch-common-protos.h: Export factored out routines to both
37131 * config/arm/aarch-common.cc: Include newly factored out types.
37132 Move all mbranch-protection code and data structures from
37134 * config/arm/aarch-common.h: New header that declares types shared
37135 between aarch32 and aarch64 backends.
37136 * config/arm/arm-protos.h: Declare types and variables that are
37137 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
37138 aarch_ra_sign_scope and aarch_enable_bti.
37139 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
37140 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
37141 * config/arm/arm.cc: Add missing includes.
37143 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
37145 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
37147 2023-01-23 Richard Biener <rguenther@suse.de>
37149 PR tree-optimization/108449
37150 * cgraphunit.cc (check_global_declaration): Do not turn
37151 undefined statics into externs.
37153 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
37155 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
37156 and HI input modes.
37157 * config/pru/pru.md (clz): Fix generated code for QI and HI
37160 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
37162 * config/v850/v850.cc (v850_select_section): Put const volatile
37163 objects into read-only sections.
37165 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
37167 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
37168 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
37169 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
37171 2023-01-20 Jakub Jelinek <jakub@redhat.com>
37173 PR tree-optimization/108457
37174 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
37175 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
37176 argument instead of a temporary. Formatting fixes.
37178 2023-01-19 Jakub Jelinek <jakub@redhat.com>
37180 PR tree-optimization/108447
37181 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
37182 (relation_tests): Add self-tests for relation_{intersect,union}
37184 * selftest.h (relation_tests): Declare.
37185 * function-tests.cc (test_ranges): Call it.
37187 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
37190 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
37191 invalid third argument to __builtin_ia32_prefetch.
37193 2023-01-19 Jakub Jelinek <jakub@redhat.com>
37195 PR middle-end/108459
37196 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
37197 than fold_unary for NEGATE_EXPR.
37199 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
37202 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
37203 comment. Move assert about alignment a bit later.
37205 2023-01-19 Jakub Jelinek <jakub@redhat.com>
37207 PR tree-optimization/108440
37208 * tree-ssa-forwprop.cc: Include gimple-range.h.
37209 (simplify_rotate): For the forms with T2 wider than T and shift counts of
37210 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
37211 to B. For the forms with T2 wider than T and shift counts of
37212 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
37213 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
37214 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
37215 pass specific ranger instead of get_global_range_query.
37216 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
37219 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
37221 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
37222 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
37224 (aarch64_simd_vec_copy_lane<mode>): Likewise.
37225 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
37227 2023-01-19 Alexandre Oliva <oliva@adacore.com>
37230 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
37231 within debug insns.
37233 2023-01-18 Martin Jambor <mjambor@suse.cz>
37236 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
37237 lcone_of chain also do not need the body.
37239 2023-01-18 Richard Biener <rguenther@suse.de>
37242 2022-12-16 Richard Biener <rguenther@suse.de>
37244 PR middle-end/108086
37245 * tree-inline.cc (remap_ssa_name): Do not unshare the
37246 result from the decl_map.
37248 2023-01-18 Murray Steele <murray.steele@arm.com>
37251 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
37253 (__arm_vst1q_p_s8): Likewise.
37254 (__arm_vld1q_z_u8): Likewise.
37255 (__arm_vld1q_z_s8): Likewise.
37256 (__arm_vst1q_p_u16): Likewise.
37257 (__arm_vst1q_p_s16): Likewise.
37258 (__arm_vld1q_z_u16): Likewise.
37259 (__arm_vld1q_z_s16): Likewise.
37260 (__arm_vst1q_p_u32): Likewise.
37261 (__arm_vst1q_p_s32): Likewise.
37262 (__arm_vld1q_z_u32): Likewise.
37263 (__arm_vld1q_z_s32): Likewise.
37264 (__arm_vld1q_z_f16): Likewise.
37265 (__arm_vst1q_p_f16): Likewise.
37266 (__arm_vld1q_z_f32): Likewise.
37267 (__arm_vst1q_p_f32): Likewise.
37269 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37271 * config/xtensa/xtensa.md (xorsi3_internal):
37272 Rename from the original of "xorsi3".
37273 (xorsi3): New expansion pattern that emits addition rather than
37274 bitwise-XOR when the second source is a constant of -2147483648
37277 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
37278 Andrew Pinski <apinski@marvell.com>
37281 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
37282 vec_vsubcuqP with vec_vsubcuq.
37284 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
37287 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
37288 support for invalid uses of MMA opaque type in function arguments.
37290 2023-01-18 liuhongt <hongtao.liu@intel.com>
37293 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
37294 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
37295 -share or -mno-daz-ftz is specified.
37296 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
37297 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
37299 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
37301 * config/bpf/bpf.cc (bpf_option_override): Disable
37304 2023-01-17 Jakub Jelinek <jakub@redhat.com>
37306 PR tree-optimization/106523
37307 * tree-ssa-forwprop.cc (simplify_rotate): For the
37308 patterns with (-Y) & (B - 1) in one operand's shift
37309 count and Y in another, if T2 has wider precision than T,
37310 punt if Y could have a value in [B, B2 - 1] range.
37312 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
37315 * config/i386/i386.cc (x86_output_mi_thunk): Disable
37316 -mforce-indirect-call for PIC in 32-bit mode.
37318 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
37321 * ipa-modref.cc (modref_access_analysis::analyze): Use
37322 find_always_executed_bbs.
37323 * ipa-sra.cc (process_scan_results): Likewise.
37324 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
37325 (find_always_executed_bbs): New function.
37326 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
37327 (find_always_executed_bbs): Declare.
37329 2023-01-16 Jan Hubicka <jh@suse.cz>
37331 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
37332 by TARGET_USE_SCATTER.
37333 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
37334 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
37335 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
37336 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
37337 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
37338 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
37340 2023-01-16 Richard Biener <rguenther@suse.de>
37343 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
37345 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
37349 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
37350 (__ARM_mve_coerce3): Likewise.
37352 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
37354 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
37356 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
37358 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
37359 (number_of_iterations_bitcount): Add call to the above.
37360 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
37361 c[lt]z idiom recognition.
37363 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
37365 * doc/sourcebuild.texi: Add missing target attributes.
37367 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
37369 PR tree-optimization/94793
37370 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
37372 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
37373 (number_of_iterations_cltz_complement): New.
37374 (number_of_iterations_bitcount): Add call to the above.
37376 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
37378 * doc/extend.texi (Common Function Attributes): Fix grammar.
37380 2023-01-16 Jakub Jelinek <jakub@redhat.com>
37383 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
37384 * config/riscv/riscv-vsetvl.cc: Likewise.
37386 2023-01-16 Jakub Jelinek <jakub@redhat.com>
37389 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
37390 disable -Winit-self using pragma GCC diagnostic ignored.
37391 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
37393 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
37394 _mm256_undefined_si256): Likewise.
37395 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
37396 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
37397 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
37398 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
37400 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
37403 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
37404 support for invalid uses in inline asm, factor out the checking and
37405 erroring to lambda function check_and_error_invalid_use.
37407 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
37409 PR tree-optimization/107608
37410 * range-op-float.cc (range_operator_float::fold_range): Avoid
37411 folding into INF when flag_trapping_math.
37412 * value-range.h (frange::known_isinf): Return false for possible NANs.
37414 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37416 * config.gcc (csky-*-*): Support --with-float=softfp.
37418 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37420 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
37421 Rename to xtensa_adjust_reg_alloc_order.
37422 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
37423 Ditto. And also remove code to reorder register numbers for
37424 leaf functions, rename the tables, and adjust the allocation
37425 order for the call0 ABI to use register A0 more.
37426 (xtensa_leaf_regs): Remove.
37427 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
37428 (order_regs_for_local_alloc): Rename as the above.
37429 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
37431 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
37433 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
37434 Change to define_insn_and_split to fold ldr+dup to ld1rq.
37435 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
37437 2023-01-14 Alexandre Oliva <oliva@adacore.com>
37439 * hash-table.h (is_deleted): Precheck !is_empty.
37440 (mark_deleted): Postcheck !is_empty.
37441 (copy constructor): Test is_empty before is_deleted.
37443 2023-01-14 Alexandre Oliva <oliva@adacore.com>
37446 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
37449 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
37451 PR rtl-optimization/108274
37452 * function.cc (thread_prologue_and_epilogue_insns): Also update the
37453 DF information for calls in a few more cases.
37455 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
37457 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
37458 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
37460 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
37461 (MAX_SYNC_LIBFUNC_SIZE): Define.
37462 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
37464 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
37465 libcall when sync libcalls are disabled.
37466 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
37467 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
37468 are disabled on 32-bit target.
37469 * config/pa/pa.opt (matomic-libcalls): New option.
37470 * doc/invoke.texi (HPPA Options): Update.
37472 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
37474 PR rtl-optimization/108117
37475 PR rtl-optimization/108132
37476 * sched-deps.cc (deps_analyze_insn): Do not schedule across
37477 calls before reload.
37479 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
37481 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
37482 options for -mlibarch.
37483 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
37484 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
37486 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
37488 * attribs.cc (strict_flex_array_level_of): Move this function to ...
37489 * attribs.h (strict_flex_array_level_of): Remove the declaration.
37490 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
37491 replace the referece to strict_flex_array_level_of with
37492 DECL_NOT_FLEXARRAY.
37493 * tree.cc (component_ref_size): Likewise.
37495 2023-01-13 Richard Biener <rguenther@suse.de>
37498 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
37499 crtfastmath.o for -shared.
37500 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
37502 2023-01-13 Richard Biener <rguenther@suse.de>
37505 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
37506 crtfastmath.o for -shared.
37507 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
37509 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
37512 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
37514 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
37516 (TARGET_DWARF_FRAME_REG_MODE): Define.
37518 2023-01-13 Richard Biener <rguenther@suse.de>
37521 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
37522 update EH info on the fly.
37524 2023-01-13 Richard Biener <rguenther@suse.de>
37526 PR tree-optimization/108387
37527 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
37528 value before inserting expression into the tables.
37530 2023-01-12 Andrew Pinski <apinski@marvell.com>
37531 Roger Sayle <roger@nextmovesoftware.com>
37533 PR tree-optimization/92342
37534 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
37535 Use tcc_comparison and :c for the multiply.
37536 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
37538 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
37539 Richard Sandiford <richard.sandiford@arm.com>
37542 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
37543 Check DECL_PACKED for bitfield.
37544 (aarch64_layout_arg): Warn when parameter passing ABI changes.
37545 (aarch64_function_arg_boundary): Do not warn here.
37546 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
37549 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
37550 Richard Sandiford <richard.sandiford@arm.com>
37552 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
37554 (aarch64_layout_arg): Factorize warning conditions.
37555 (aarch64_function_arg_boundary): Fix typo.
37556 * function.cc (currently_expanding_function_start): New variable.
37557 (expand_function_start): Handle
37558 currently_expanding_function_start.
37559 * function.h (currently_expanding_function_start): Declare.
37561 2023-01-12 Richard Biener <rguenther@suse.de>
37563 PR tree-optimization/99412
37564 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
37565 (swap_ops_for_binary_stmt): Remove reduction handling.
37566 (rewrite_expr_tree_parallel): Adjust.
37567 (reassociate_bb): Likewise.
37568 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
37570 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37572 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
37573 Rearrange the emitting codes.
37575 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37577 * config/xtensa/xtensa.md (*btrue):
37578 Correct value of the attribute "length" that depends on
37579 TARGET_DENSITY and operands, and add '?' character to the register
37580 constraint of the compared operand.
37582 2023-01-12 Alexandre Oliva <oliva@adacore.com>
37584 * hash-table.h (expand): Check elements and deleted counts.
37585 (verify): Likewise.
37587 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
37589 PR tree-optimization/71343
37590 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
37591 the value number of the expression X << C the same as the value
37592 number for the multiplication X * (1<<C).
37594 2023-01-11 David Faust <david.faust@oracle.com>
37597 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
37598 floating point modes.
37600 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
37602 PR tree-optimization/108199
37603 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
37604 for bit-field references.
37606 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
37608 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
37609 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
37610 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
37611 OPTION_MASK_P10_FUSION.
37613 2023-01-11 Richard Biener <rguenther@suse.de>
37615 PR tree-optimization/107767
37616 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
37617 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
37618 * tree-switch-conversion.cc (switch_conversion::collect):
37619 Count unique non-default targets accounting for later
37620 merging opportunities.
37622 2023-01-11 Martin Liska <mliska@suse.cz>
37624 PR middle-end/107976
37625 * params.opt: Limit JT params.
37626 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
37628 2023-01-11 Richard Biener <rguenther@suse.de>
37630 PR tree-optimization/108352
37631 * tree-ssa-threadbackward.cc
37632 (back_threader_profitability::profitable_path_p): Adjust
37633 heuristic that allows non-multi-way branch threads creating
37635 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
37636 (--param fsm-scale-path-stmts): Adjust.
37637 * params.opt (--param=fsm-scale-path-blocks=): Remove.
37638 (-param=fsm-scale-path-stmts=): Adjust description.
37640 2023-01-11 Richard Biener <rguenther@suse.de>
37642 PR tree-optimization/108353
37643 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
37645 (add_ssa_edge): Simplify.
37646 (add_control_edge): Likewise.
37647 (ssa_prop_init): Likewise.
37648 (ssa_prop_fini): Likewise.
37649 (ssa_propagation_engine::ssa_propagate): Likewise.
37651 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
37653 * config/s390/s390.md (*not<mode>): New pattern.
37655 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37657 * config/xtensa/xtensa.cc (xtensa_insn_cost):
37658 Let insn cost for size be obtained by applying COSTS_N_INSNS()
37659 to instruction length and then dividing by 3.
37661 2023-01-10 Richard Biener <rguenther@suse.de>
37663 PR tree-optimization/106293
37664 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
37665 process degenerate PHI defs.
37667 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
37669 PR rtl-optimization/106421
37670 * cprop.cc (bypass_block): Check that DEST is local to this
37671 function (non-NULL) before calling find_edge.
37673 2023-01-10 Martin Jambor <mjambor@suse.cz>
37676 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
37677 sort_replacements, lookup_first_base_replacement and
37678 m_sorted_replacements_p.
37679 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
37680 (ipa_param_body_adjustments::register_replacement): Set
37681 m_sorted_replacements_p to false.
37682 (compare_param_body_replacement): New function.
37683 (ipa_param_body_adjustments::sort_replacements): Likewise.
37684 (ipa_param_body_adjustments::common_initialization): Call
37686 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
37687 m_sorted_replacements_p.
37688 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
37690 (ipa_param_body_adjustments::lookup_first_base_replacement): New
37692 (ipa_param_body_adjustments::modify_call_stmt): Use
37693 lookup_first_base_replacement.
37694 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
37695 adjustments->sort_replacements.
37697 2023-01-10 Richard Biener <rguenther@suse.de>
37699 PR tree-optimization/108314
37700 * tree-vect-stmts.cc (vectorizable_condition): Do not
37701 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
37703 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37705 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
37707 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37709 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
37711 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37713 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
37714 defines for soft float abi.
37716 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37718 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
37719 (smart_bclri): Likewise.
37720 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
37721 (fast_bclri): Likewise.
37722 (fast_cmpnesi_i): Likewise.
37723 (*fast_cmpltsi_i): Likewise.
37724 (*fast_cmpgeusi_i): Likewise.
37726 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37728 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
37729 flag_fp_int_builtin_inexact || !flag_trapping_math.
37730 (<frm_pattern><mode>2): Likewise.
37732 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
37734 * config/s390/s390.cc (s390_register_info): Check call_used_regs
37735 instead of hard-coding the register numbers for call saved
37737 (s390_optimize_register_info): Likewise.
37739 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
37741 * doc/gm2.texi (Overview): Fix @node markers.
37742 (Using): Likewise. Remove subsections that were moved to Overview
37743 from the menu and move others around.
37745 2023-01-09 Richard Biener <rguenther@suse.de>
37747 PR middle-end/108209
37748 * genmatch.cc (commutative_op): Fix return value for
37749 user-id with non-commutative first replacement.
37751 2023-01-09 Jakub Jelinek <jakub@redhat.com>
37754 * calls.cc (expand_call): For calls with
37755 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
37758 2023-01-09 Richard Biener <rguenther@suse.de>
37760 PR middle-end/69482
37761 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
37762 qualified accesses also force objects to memory.
37764 2023-01-09 Martin Liska <mliska@suse.cz>
37767 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
37768 NULL (deleleted value) to a hash_set.
37770 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37772 * config/xtensa/xtensa.md (*splice_bits):
37773 New insn_and_split pattern.
37775 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37777 * config/xtensa/xtensa.cc
37778 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
37779 New helper functions.
37780 (xtensa_set_return_address, xtensa_output_mi_thunk):
37781 Change to use the helper function.
37782 (xtensa_emit_adjust_stack_ptr): Ditto.
37783 And also change to try reusing the content of scratch register
37784 A9 if the register is not modified in the function body.
37786 2023-01-07 LIU Hao <lh_mouse@126.com>
37788 PR middle-end/108300
37789 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
37790 before <windows.h>.
37791 * diagnostic-color.cc: Likewise.
37792 * plugin.cc: Likewise.
37793 * prefix.cc: Likewise.
37795 2023-01-06 Joseph Myers <joseph@codesourcery.com>
37797 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
37798 for handling real integer types.
37800 2023-01-06 Tamar Christina <tamar.christina@arm.com>
37803 2022-12-12 Tamar Christina <tamar.christina@arm.com>
37805 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
37806 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
37807 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
37808 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
37809 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
37810 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
37811 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
37812 (aarch64_simd_dupv2hf): New.
37813 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
37815 * config/aarch64/iterators.md (VHSDF_P): New.
37816 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
37817 Vel, q, vp): Add V2HF.
37818 * config/arm/types.md (neon_fp_reduc_add_h): New.
37820 2023-01-06 Martin Liska <mliska@suse.cz>
37822 PR middle-end/107966
37823 * doc/options.texi: Fix Var documentation in internal manual.
37825 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
37828 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
37830 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
37831 RTL expansion to allow condition (mask) to be shared/reused,
37832 by avoiding overwriting pseudos and adding REG_EQUAL notes.
37834 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
37836 * common.opt: Add -static-libgm2.
37837 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
37838 * doc/gm2.texi: Document static-libgm2.
37839 * gcc.cc (driver_handle_option): Allow static-libgm2.
37841 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
37843 * common/config/i386/i386-common.cc (processor_alias_table):
37844 Use CPU_ZNVER4 for znver4.
37845 * config/i386/i386.md: Add znver4.md.
37846 * config/i386/znver4.md: New.
37848 2023-01-04 Jakub Jelinek <jakub@redhat.com>
37850 PR tree-optimization/108253
37851 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
37854 2023-01-04 Jakub Jelinek <jakub@redhat.com>
37856 PR middle-end/108237
37857 * generic-match-head.cc: Include tree-pass.h.
37858 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
37859 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
37860 resp. PROP_gimple_lvec property set.
37862 2023-01-04 Jakub Jelinek <jakub@redhat.com>
37864 PR sanitizer/108256
37865 * convert.cc (do_narrow): Punt for MULT_EXPR if original
37866 type doesn't wrap around and -fsanitize=signed-integer-overflow
37868 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
37870 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
37872 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
37873 * common/config/i386/i386-common.cc: Add Emeraldrapids.
37875 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
37877 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
37880 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
37882 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
37883 default constructor to initialize it.
37884 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
37885 for last and iterate to handle recursive calls. Delete leftover
37886 candidates at the end.
37887 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
37889 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
37890 gc_candidate bit when a clone is used.
37892 2023-01-03 Florian Weimer <fweimer@redhat.com>
37895 2023-01-02 Florian Weimer <fweimer@redhat.com>
37897 * dwarf2cfi.cc (init_return_column_size): Remove.
37898 (init_one_dwarf_reg_size): Adjust.
37899 (generate_dwarf_reg_sizes): New function. Extracted
37900 from expand_builtin_init_dwarf_reg_sizes.
37901 (expand_builtin_init_dwarf_reg_sizes): Call
37902 generate_dwarf_reg_sizes.
37903 * target.def (init_dwarf_reg_sizes_extra): Adjust
37905 * config/msp430/msp430.cc
37906 (msp430_init_dwarf_reg_sizes_extra): Adjust.
37907 * config/rs6000/rs6000.cc
37908 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
37909 * doc/tm.texi: Update.
37911 2023-01-03 Florian Weimer <fweimer@redhat.com>
37914 2023-01-02 Florian Weimer <fweimer@redhat.com>
37916 * debug.h (dwarf_reg_sizes_constant): Declare.
37917 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
37919 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
37921 PR tree-optimization/105043
37922 * doc/extend.texi (Object Size Checking): Split out into two
37923 subsections and mention _FORTIFY_SOURCE.
37925 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
37927 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
37928 RTL expansion to allow condition (mask) to be shared/reused,
37929 by avoiding overwriting pseudos and adding REG_EQUAL notes.
37931 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
37934 * config/i386/i386-features.cc
37935 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
37936 the gain/cost of converting a MEM operand.
37938 2023-01-03 Jakub Jelinek <jakub@redhat.com>
37940 PR middle-end/108264
37941 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
37942 from source which doesn't have scalar integral mode first convert
37945 2023-01-03 Jakub Jelinek <jakub@redhat.com>
37947 PR rtl-optimization/108263
37948 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
37951 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
37954 * config/i386/lujiazui.md (lujiazui_div): New automaton.
37955 (lua_div): New unit.
37956 (lua_idiv_qi): Correct unit in the reservation.
37957 (lua_idiv_qi_load): Ditto.
37958 (lua_idiv_hi): Ditto.
37959 (lua_idiv_hi_load): Ditto.
37960 (lua_idiv_si): Ditto.
37961 (lua_idiv_si_load): Ditto.
37962 (lua_idiv_di): Ditto.
37963 (lua_idiv_di_load): Ditto.
37964 (lua_fdiv_SF): Ditto.
37965 (lua_fdiv_SF_load): Ditto.
37966 (lua_fdiv_DF): Ditto.
37967 (lua_fdiv_DF_load): Ditto.
37968 (lua_fdiv_XF): Ditto.
37969 (lua_fdiv_XF_load): Ditto.
37970 (lua_ssediv_SF): Ditto.
37971 (lua_ssediv_load_SF): Ditto.
37972 (lua_ssediv_V4SF): Ditto.
37973 (lua_ssediv_load_V4SF): Ditto.
37974 (lua_ssediv_V8SF): Ditto.
37975 (lua_ssediv_load_V8SF): Ditto.
37976 (lua_ssediv_SD): Ditto.
37977 (lua_ssediv_load_SD): Ditto.
37978 (lua_ssediv_V2DF): Ditto.
37979 (lua_ssediv_load_V2DF): Ditto.
37980 (lua_ssediv_V4DF): Ditto.
37981 (lua_ssediv_load_V4DF): Ditto.
37983 2023-01-02 Florian Weimer <fweimer@redhat.com>
37985 * debug.h (dwarf_reg_sizes_constant): Declare.
37986 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
37988 2023-01-02 Florian Weimer <fweimer@redhat.com>
37990 * dwarf2cfi.cc (init_return_column_size): Remove.
37991 (init_one_dwarf_reg_size): Adjust.
37992 (generate_dwarf_reg_sizes): New function. Extracted
37993 from expand_builtin_init_dwarf_reg_sizes.
37994 (expand_builtin_init_dwarf_reg_sizes): Call
37995 generate_dwarf_reg_sizes.
37996 * target.def (init_dwarf_reg_sizes_extra): Adjust
37998 * config/msp430/msp430.cc
37999 (msp430_init_dwarf_reg_sizes_extra): Adjust.
38000 * config/rs6000/rs6000.cc
38001 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
38002 * doc/tm.texi: Update.
38004 2023-01-02 Jakub Jelinek <jakub@redhat.com>
38006 * gcc.cc (process_command): Update copyright notice dates.
38007 * gcov-dump.cc (print_version): Ditto.
38008 * gcov.cc (print_version): Ditto.
38009 * gcov-tool.cc (print_version): Ditto.
38010 * gengtype.cc (create_file): Ditto.
38011 * doc/cpp.texi: Bump @copying's copyright year.
38012 * doc/cppinternals.texi: Ditto.
38013 * doc/gcc.texi: Ditto.
38014 * doc/gccint.texi: Ditto.
38015 * doc/gcov.texi: Ditto.
38016 * doc/install.texi: Ditto.
38017 * doc/invoke.texi: Ditto.
38019 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
38020 Uroš Bizjak <ubizjak@gmail.com>
38022 * config/i386/i386.md (extendditi2): New define_insn.
38023 (define_split): Use DWIH mode iterator to treat new extendditi2
38024 identically to existing extendsidi2_1.
38025 (define_peephole2): Likewise.
38026 (define_peephole2): Likewise.
38027 (define_Split): Likewise.
38030 Copyright (C) 2023 Free Software Foundation, Inc.
38032 Copying and distribution of this file, with or without modification,
38033 are permitted in any medium without royalty provided the copyright
38034 notice and this notice are preserved.