gcc/lra-int.h

   1 /* Local Register Allocator (LRA) intercommunication header file.
   2    Copyright (C) 2010-2014 Free Software Foundation, Inc.
   3    Contributed by Vladimir Makarov <vmakarov@redhat.com>.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 3, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING3.  If not see
  19 <http://www.gnu.org/licenses/>.  */
  20
  21 #include "lra.h"
  22 #include "bitmap.h"
  23 #include "recog.h"
  24 #include "insn-attr.h"
  25 #include "insn-codes.h"
  26 #include "insn-config.h"
  27 #include "regs.h"
  28
  29 #define lra_assert(c) gcc_checking_assert (c)
  30
  31 /* The parameter used to prevent infinite reloading for an insn.  Each
  32    insn operands might require a reload and, if it is a memory, its
  33    base and index registers might require a reload too.  */
  34 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
  35
  36 typedef struct lra_live_range *lra_live_range_t;
  37
  38 /* The structure describes program points where a given pseudo lives.
  39    The live ranges can be used to find conflicts with other pseudos.
  40    If the live ranges of two pseudos are intersected, the pseudos are
  41    in conflict.  */
  42 struct lra_live_range
  43 {
  44   /* Pseudo regno whose live range is described by given
  45      structure.  */
  46   int regno;
  47   /* Program point range.  */
  48   int start, finish;
  49   /* Next structure describing program points where the pseudo
  50      lives.  */
  51   lra_live_range_t next;
  52   /* Pointer to structures with the same start.  */
  53   lra_live_range_t start_next;
  54 };
  55
  56 typedef struct lra_copy *lra_copy_t;
  57
  58 /* Copy between pseudos which affects assigning hard registers.  */
  59 struct lra_copy
  60 {
  61   /* True if regno1 is the destination of the copy.  */
  62   bool regno1_dest_p;
  63   /* Execution frequency of the copy.  */
  64   int freq;
  65   /* Pseudos connected by the copy.  REGNO1 < REGNO2.  */
  66   int regno1, regno2;
  67   /* Next copy with correspondingly REGNO1 and REGNO2.  */
  68   lra_copy_t regno1_next, regno2_next;
  69 };
  70
  71 /* Common info about a register (pseudo or hard register).  */
  72 struct lra_reg
  73 {
  74   /* Bitmap of UIDs of insns (including debug insns) referring the
  75      reg.  */
  76   bitmap_head insn_bitmap;
  77   /* The following fields are defined only for pseudos.  */
  78   /* Hard registers with which the pseudo conflicts.  */
  79   HARD_REG_SET conflict_hard_regs;
  80   /* We assign hard registers to reload pseudos which can occur in few
  81      places.  So two hard register preferences are enough for them.
  82      The following fields define the preferred hard registers.  If
  83      there are no such hard registers the first field value is
  84      negative.  If there is only one preferred hard register, the 2nd
  85      field is negative.  */
  86   int preferred_hard_regno1, preferred_hard_regno2;
  87   /* Profits to use the corresponding preferred hard registers.  If
  88      the both hard registers defined, the first hard register has not
  89      less profit than the second one.  */
  90   int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
  91 #ifdef STACK_REGS
  92   /* True if the pseudo should not be assigned to a stack register.  */
  93   bool no_stack_p;
  94 #endif
  95 #ifdef ENABLE_CHECKING
  96   /* True if the pseudo crosses a call.  It is setup in lra-lives.c
  97      and used to check that the pseudo crossing a call did not get a
  98      call used hard register.  */
  99   bool call_p;
 100 #endif
 101   /* Number of references and execution frequencies of the register in
 102      *non-debug* insns.  */
 103   int nrefs, freq;
 104   int last_reload;
 105   /* Regno used to undo the inheritance.  It can be non-zero only
 106      between couple of inheritance and undo inheritance passes.  */
 107   int restore_regno;
 108   /* Value holding by register.  If the pseudos have the same value
 109      they do not conflict.  */
 110   int val;
 111   /* Offset from relative eliminate register to pesudo reg.  */
 112   int offset;
 113   /* These members are set up in lra-lives.c and updated in
 114      lra-coalesce.c.  */
 115   /* The biggest size mode in which each pseudo reg is referred in
 116      whole function (possibly via subreg).  */
 117   enum machine_mode biggest_mode;
 118   /* Live ranges of the pseudo.  */
 119   lra_live_range_t live_ranges;
 120   /* This member is set up in lra-lives.c for subsequent
 121      assignments.  */
 122   lra_copy_t copies;
 123 };
 124
 125 /* References to the common info about each register.  */
 126 extern struct lra_reg *lra_reg_info;
 127
 128 /* Static info about each insn operand (common for all insns with the
 129    same ICODE).  Warning: if the structure definition is changed, the
 130    initializer for debug_operand_data in lra.c should be changed
 131    too.  */
 132 struct lra_operand_data
 133 {
 134   /* The machine description constraint string of the operand.  */
 135   const char *constraint;
 136   /* It is taken only from machine description (which is different
 137      from recog_data.operand_mode) and can be of VOIDmode.  */
 138   ENUM_BITFIELD(machine_mode) mode : 16;
 139   /* The type of the operand (in/out/inout).  */
 140   ENUM_BITFIELD (op_type) type : 8;
 141   /* Through if accessed through STRICT_LOW.  */
 142   unsigned int strict_low : 1;
 143   /* True if the operand is an operator.  */
 144   unsigned int is_operator : 1;
 145   /* True if there is an early clobber alternative for this operand.
 146      This field is set up every time when corresponding
 147      operand_alternative in lra_static_insn_data is set up.  */
 148   unsigned int early_clobber : 1;
 149   /* True if the operand is an address.  */
 150   unsigned int is_address : 1;
 151 };
 152
 153 /* Info about register occurrence in an insn.  */
 154 struct lra_insn_reg
 155 {
 156   /* The biggest mode through which the insn refers to the register
 157      occurrence (remember the register can be accessed through a
 158      subreg in the insn).  */
 159   ENUM_BITFIELD(machine_mode) biggest_mode : 16;
 160   /* The type of the corresponding operand which is the register.  */
 161   ENUM_BITFIELD (op_type) type : 8;
 162   /* True if the reg is accessed through a subreg and the subreg is
 163      just a part of the register.  */
 164   unsigned int subreg_p : 1;
 165   /* True if there is an early clobber alternative for this
 166      operand.  */
 167   unsigned int early_clobber : 1;
 168   /* The corresponding regno of the register.  */
 169   int regno;
 170   /* Next reg info of the same insn.  */
 171   struct lra_insn_reg *next;
 172 };
 173
 174 /* Static part (common info for insns with the same ICODE) of LRA
 175    internal insn info. It exists in at most one exemplar for each
 176    non-negative ICODE. There is only one exception. Each asm insn has
 177    own structure.  Warning: if the structure definition is changed,
 178    the initializer for debug_insn_static_data in lra.c should be
 179    changed too.  */
 180 struct lra_static_insn_data
 181 {
 182   /* Static info about each insn operand.  */
 183   struct lra_operand_data *operand;
 184   /* Each duplication refers to the number of the corresponding
 185      operand which is duplicated.  */
 186   int *dup_num;
 187   /* The number of an operand marked as commutative, -1 otherwise.  */
 188   int commutative;
 189   /* Number of operands, duplications, and alternatives of the
 190      insn.  */
 191   char n_operands;
 192   char n_dups;
 193   char n_alternatives;
 194   /* Insns in machine description (or clobbers in asm) may contain
 195      explicit hard regs which are not operands.  The following list
 196      describes such hard registers.  */
 197   struct lra_insn_reg *hard_regs;
 198   /* Array [n_alternatives][n_operand] of static constraint info for
 199      given operand in given alternative.  This info can be changed if
 200      the target reg info is changed.  */
 201   struct operand_alternative *operand_alternative;
 202 };
 203
 204 /* LRA internal info about an insn (LRA internal insn
 205    representation).  */
 206 struct lra_insn_recog_data
 207 {
 208   /* The insn code.  */
 209   int icode;
 210   /* The alternative should be used for the insn, -1 if invalid, or we
 211      should try to use any alternative, or the insn is a debug
 212      insn.  */
 213   int used_insn_alternative;
 214   /* SP offset before the insn relative to one at the func start.  */
 215   HOST_WIDE_INT sp_offset;
 216   /* The insn itself.  */
 217   rtx insn;
 218   /* Common data for insns with the same ICODE.  Asm insns (their
 219      ICODE is negative) do not share such structures.  */
 220   struct lra_static_insn_data *insn_static_data;
 221   /* Two arrays of size correspondingly equal to the operand and the
 222      duplication numbers: */
 223   rtx **operand_loc; /* The operand locations, NULL if no operands.  */
 224   rtx **dup_loc; /* The dup locations, NULL if no dups.  */
 225   /* Number of hard registers implicitly used in given call insn.  The
 226      value can be NULL or points to array of the hard register numbers
 227      ending with a negative value.  */
 228   int *arg_hard_regs;
 229   /* Alternative enabled for the insn.  NULL for debug insns.  */
 230   bool *alternative_enabled_p;
 231   /* The following member value is always NULL for a debug insn.  */
 232   struct lra_insn_reg *regs;
 233 };
 234
 235 typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
 236
 237 /* Whether the clobber is used temporary in LRA.  */
 238 #define LRA_TEMP_CLOBBER_P(x) \
 239   (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
 240
 241 /* Cost factor for each additional reload and maximal cost reject for
 242    insn reloads.  One might ask about such strange numbers.  Their
 243    values occurred historically from former reload pass.  */
 244 #define LRA_LOSER_COST_FACTOR 6
 245 #define LRA_MAX_REJECT 600
 246
 247 /* Maximum allowed number of assignment pass iterations after the
 248    latest spill pass when any former reload pseudo was spilled.  It is
 249    for preventing LRA cycling in a bug case.  */
 250 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
 251
 252 /* The maximal number of inheritance/split passes in LRA.  It should
 253    be more 1 in order to perform caller saves transformations and much
 254    less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
 255    as permitted constraint passes in some complicated cases.  The
 256    first inheritance/split pass has a biggest impact on generated code
 257    quality.  Each subsequent affects generated code in less degree.
 258    For example, the 3rd pass does not change generated SPEC2000 code
 259    at all on x86-64.  */
 260 #define LRA_MAX_INHERITANCE_PASSES 2
 261
 262 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
 263     || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
 264 #error wrong LRA_MAX_INHERITANCE_PASSES value
 265 #endif
 266
 267 /* lra.c: */
 268
 269 extern FILE *lra_dump_file;
 270
 271 extern bool lra_reg_spill_p;
 272
 273 extern HARD_REG_SET lra_no_alloc_regs;
 274
 275 extern int lra_insn_recog_data_len;
 276 extern lra_insn_recog_data_t *lra_insn_recog_data;
 277
 278 extern int lra_curr_reload_num;
 279
 280 extern void lra_push_insn (rtx);
 281 extern void lra_push_insn_by_uid (unsigned int);
 282 extern void lra_push_insn_and_update_insn_regno_info (rtx);
 283 extern rtx lra_pop_insn (void);
 284 extern unsigned int lra_insn_stack_length (void);
 285
 286 extern rtx lra_create_new_reg_with_unique_value (enum machine_mode, rtx,
 287                                                  enum reg_class, const char *);
 288 extern void lra_set_regno_unique_value (int);
 289 extern void lra_invalidate_insn_data (rtx);
 290 extern void lra_set_insn_deleted (rtx);
 291 extern void lra_delete_dead_insn (rtx);
 292 extern void lra_emit_add (rtx, rtx, rtx);
 293 extern void lra_emit_move (rtx, rtx);
 294 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
 295
 296 extern void lra_process_new_insns (rtx, rtx, rtx, const char *);
 297
 298 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx);
 299 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx);
 300 extern void lra_set_used_insn_alternative (rtx, int);
 301 extern void lra_set_used_insn_alternative_by_uid (int, int);
 302
 303 extern void lra_invalidate_insn_regno_info (rtx);
 304 extern void lra_update_insn_regno_info (rtx);
 305 extern struct lra_insn_reg *lra_get_insn_regs (int);
 306
 307 extern void lra_free_copies (void);
 308 extern void lra_create_copy (int, int, int);
 309 extern lra_copy_t lra_get_copy (int);
 310 extern bool lra_former_scratch_p (int);
 311 extern bool lra_former_scratch_operand_p (rtx, int);
 312
 313 extern int lra_new_regno_start;
 314 extern int lra_constraint_new_regno_start;
 315 extern bitmap_head lra_inheritance_pseudos;
 316 extern bitmap_head lra_split_regs;
 317 extern bitmap_head lra_subreg_reload_pseudos;
 318 extern bitmap_head lra_optional_reload_pseudos;
 319 extern int lra_constraint_new_insn_uid_start;
 320
 321 /* lra-constraints.c: */
 322
 323 extern void lra_init_equiv (void);
 324 extern int lra_constraint_offset (int, enum machine_mode);
 325
 326 extern int lra_constraint_iter;
 327 extern bool lra_risky_transformations_p;
 328 extern int lra_inheritance_iter;
 329 extern int lra_undo_inheritance_iter;
 330 extern bool lra_constraints (bool);
 331 extern void lra_constraints_init (void);
 332 extern void lra_constraints_finish (void);
 333 extern void lra_inheritance (void);
 334 extern bool lra_undo_inheritance (void);
 335
 336 /* lra-lives.c: */
 337
 338 extern int lra_live_max_point;
 339 extern int *lra_point_freq;
 340
 341 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
 342
 343 extern int lra_live_range_iter;
 344 extern void lra_create_live_ranges (bool);
 345 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
 346 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
 347                                                lra_live_range_t);
 348 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
 349                                            lra_live_range_t);
 350 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
 351 extern void debug (lra_live_range &ref);
 352 extern void debug (lra_live_range *ptr);
 353 extern void lra_debug_live_range_list (lra_live_range_t);
 354 extern void lra_debug_pseudo_live_ranges (int);
 355 extern void lra_debug_live_ranges (void);
 356 extern void lra_clear_live_ranges (void);
 357 extern void lra_live_ranges_init (void);
 358 extern void lra_live_ranges_finish (void);
 359 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
 360
 361 /* lra-assigns.c: */
 362
 363 extern int lra_assignment_iter;
 364 extern int lra_assignment_iter_after_spill;
 365 extern void lra_setup_reg_renumber (int, int, bool);
 366 extern bool lra_assign (void);
 367
 368
 369 /* lra-coalesce.c: */
 370
 371 extern int lra_coalesce_iter;
 372 extern bool lra_coalesce (void);
 373
 374 /* lra-spills.c:  */
 375
 376 extern bool lra_need_for_spills_p (void);
 377 extern void lra_spill (void);
 378 extern void lra_final_code_change (void);
 379
 380
 381 /* lra-elimination.c: */
 382
 383 extern void lra_debug_elim_table (void);
 384 extern int lra_get_elimination_hard_regno (int);
 385 extern rtx lra_eliminate_regs_1 (rtx, rtx, enum machine_mode, bool, bool, bool);
 386 extern void lra_eliminate (bool, bool);
 387
 388 extern void lra_eliminate_reg_if_possible (rtx *);
 389
 390 \f
 391
 392 /* Return the hard register which given pseudo REGNO assigned to.
 393    Negative value means that the register got memory or we don't know
 394    allocation yet.  */
 395 static inline int
 396 lra_get_regno_hard_regno (int regno)
 397 {
 398   resize_reg_info ();
 399   return reg_renumber[regno];
 400 }
 401
 402 /* Change class of pseudo REGNO to NEW_CLASS.  Print info about it
 403    using TITLE.  Output a new line if NL_P.  */
 404 static void inline
 405 lra_change_class (int regno, enum reg_class new_class,
 406                   const char *title, bool nl_p)
 407 {
 408   lra_assert (regno >= FIRST_PSEUDO_REGISTER);
 409   if (lra_dump_file != NULL)
 410     fprintf (lra_dump_file, "%s class %s for r%d",
 411              title, reg_class_names[new_class], regno);
 412   setup_reg_classes (regno, new_class, NO_REGS, new_class);
 413   if (lra_dump_file != NULL && nl_p)
 414     fprintf (lra_dump_file, "\n");
 415 }
 416
 417 /* Update insn operands which are duplication of NOP operand.  The
 418    insn is represented by its LRA internal representation ID.  */
 419 static inline void
 420 lra_update_dup (lra_insn_recog_data_t id, int nop)
 421 {
 422   int i;
 423   struct lra_static_insn_data *static_id = id->insn_static_data;
 424
 425   for (i = 0; i < static_id->n_dups; i++)
 426     if (static_id->dup_num[i] == nop)
 427       *id->dup_loc[i] = *id->operand_loc[nop];
 428 }
 429
 430 /* Process operator duplications in insn with ID.  We do it after the
 431    operands processing.  Generally speaking, we could do this probably
 432    simultaneously with operands processing because a common practice
 433    is to enumerate the operators after their operands.  */
 434 static inline void
 435 lra_update_operator_dups (lra_insn_recog_data_t id)
 436 {
 437   int i;
 438   struct lra_static_insn_data *static_id = id->insn_static_data;
 439
 440   for (i = 0; i < static_id->n_dups; i++)
 441     {
 442       int ndup = static_id->dup_num[i];
 443
 444       if (static_id->operand[ndup].is_operator)
 445         *id->dup_loc[i] = *id->operand_loc[ndup];
 446     }
 447 }
 448
 449 /* Return info about INSN.  Set up the info if it is not done yet.  */
 450 static inline lra_insn_recog_data_t
 451 lra_get_insn_recog_data (rtx insn)
 452 {
 453   lra_insn_recog_data_t data;
 454   unsigned int uid = INSN_UID (insn);
 455
 456   if (lra_insn_recog_data_len > (int) uid
 457       && (data = lra_insn_recog_data[uid]) != NULL)
 458     {
 459       /* Check that we did not change insn without updating the insn
 460          info.  */
 461       lra_assert (data->insn == insn
 462                   && (INSN_CODE (insn) < 0
 463                       || data->icode == INSN_CODE (insn)));
 464       return data;
 465     }
 466   return lra_set_insn_recog_data (insn);
 467 }
 468
 469 /* Update offset from pseudos with VAL by INCR.  */
 470 static inline void
 471 lra_update_reg_val_offset (int val, int incr)
 472 {
 473   int i;
 474
 475   for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
 476     {
 477       if (lra_reg_info[i].val == val)
 478         lra_reg_info[i].offset += incr;
 479     }
 480 }
 481
 482 /* Return true if register content is equal to VAL with OFFSET.  */
 483 static inline bool
 484 lra_reg_val_equal_p (int regno, int val, int offset)
 485 {
 486   if (lra_reg_info[regno].val == val
 487       && lra_reg_info[regno].offset == offset)
 488     return true;
 489
 490   return false;
 491 }
 492
 493 /* Assign value of register FROM to TO.  */
 494 static inline void
 495 lra_assign_reg_val (int from, int to)
 496 {
 497   lra_reg_info[to].val = lra_reg_info[from].val;
 498   lra_reg_info[to].offset = lra_reg_info[from].offset;
 499 }
 500 \f
 501
 502 struct target_lra_int
 503 {
 504   /* Map INSN_UID -> the operand alternative data (NULL if unknown).
 505      We assume that this data is valid until register info is changed
 506      because classes in the data can be changed.  */
 507   struct operand_alternative *x_op_alt_data[LAST_INSN_CODE];
 508 };
 509
 510 extern struct target_lra_int default_target_lra_int;
 511 #if SWITCHABLE_TARGET
 512 extern struct target_lra_int *this_target_lra_int;
 513 #else
 514 #define this_target_lra_int (&default_target_lra_int)
 515 #endif
 516
 517 #define op_alt_data (this_target_lra_int->x_op_alt_data)