1 2018-01-15 Richard Biener <rguenther@suse.de>
4 * expmed.c (extract_bit_field_1): Fix typo.
6 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9 * config/arm/iterators.md (VF): New mode iterator.
10 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
11 Remove integer-related logic from pattern.
12 (neon_vabd<mode>_3): Likewise.
14 2018-01-15 Jakub Jelinek <jakub@redhat.com>
17 * common.opt (fstrict-overflow): No longer an alias.
18 (fwrapv-pointer): New option.
19 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
20 also for pointer types based on flag_wrapv_pointer.
21 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
22 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
23 opts->x_flag_wrapv got set.
24 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
25 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
26 POINTER_TYPE_OVERFLOW_UNDEFINED.
27 * match.pd: Likewise in address comparison pattern.
28 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
30 2018-01-15 Richard Biener <rguenther@suse.de>
33 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
34 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
35 Reset type names to their identifier if their TYPE_DECL doesn't
36 have linkage (and thus is used for ODR and devirt).
37 (save_debug_info_for_decl): Remove.
38 (save_debug_info_for_type): Likewise.
39 (add_tree_to_fld_list): Adjust.
40 * tree-pretty-print.c (dump_generic_node): Make dumping of
41 type names more robust.
43 2018-01-15 Richard Biener <rguenther@suse.de>
45 * BASE-VER: Bump to 8.0.1.
47 2018-01-14 Martin Sebor <msebor@redhat.com>
50 * builtins.c (check_access): Avoid warning when the no-warning bit
53 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
55 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
56 * ira-color (allocno_hard_regs_compare): Likewise.
58 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
61 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
62 Use .pushsection/.popsection.
64 2018-01-14 Martin Sebor <msebor@redhat.com>
67 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
69 2018-01-14 Jakub Jelinek <jakub@redhat.com>
71 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
72 entry from extra_headers.
73 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
74 extra_headers, make the list bitwise identical to the i?86-*-* one.
76 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
78 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
79 -mcmodel=large with -mindirect-branch=thunk,
80 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
81 -mfunction-return=thunk-extern.
82 * doc/invoke.texi: Document -mcmodel=large is incompatible with
83 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
84 -mfunction-return=thunk and -mfunction-return=thunk-extern.
86 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
88 * config/i386/i386.c (print_reg): Print the name of the full
89 integer register without '%'.
90 (ix86_print_operand): Handle 'V'.
91 * doc/extend.texi: Document 'V' modifier.
93 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
95 * config/i386/constraints.md (Bs): Disallow memory operand for
96 -mindirect-branch-register.
98 * config/i386/predicates.md (indirect_branch_operand): Likewise.
99 (GOT_memory_operand): Likewise.
100 (call_insn_operand): Likewise.
101 (sibcall_insn_operand): Likewise.
102 (GOT32_symbol_operand): Likewise.
103 * config/i386/i386.md (indirect_jump): Call convert_memory_address
104 for -mindirect-branch-register.
105 (tablejump): Likewise.
106 (*sibcall_memory): Likewise.
107 (*sibcall_value_memory): Likewise.
108 Disallow peepholes of indirect call and jump via memory for
109 -mindirect-branch-register.
110 (*call_pop): Replace m with Bw.
111 (*call_value_pop): Likewise.
112 (*sibcall_pop_memory): Replace m with Bs.
113 * config/i386/i386.opt (mindirect-branch-register): New option.
114 * doc/invoke.texi: Document -mindirect-branch-register option.
116 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
118 * config/i386/i386-protos.h (ix86_output_function_return): New.
119 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
120 set function_return_type.
121 (indirect_thunk_name): Add ret_p to indicate thunk for function
123 (output_indirect_thunk_function): Pass false to
125 (ix86_output_indirect_branch_via_reg): Likewise.
126 (ix86_output_indirect_branch_via_push): Likewise.
127 (output_indirect_thunk_function): Create alias for function
128 return thunk if regno < 0.
129 (ix86_output_function_return): New function.
130 (ix86_handle_fndecl_attribute): Handle function_return.
131 (ix86_attribute_table): Add function_return.
132 * config/i386/i386.h (machine_function): Add
133 function_return_type.
134 * config/i386/i386.md (simple_return_internal): Use
135 ix86_output_function_return.
136 (simple_return_internal_long): Likewise.
137 * config/i386/i386.opt (mfunction-return=): New option.
138 (indirect_branch): Mention -mfunction-return=.
139 * doc/extend.texi: Document function_return function attribute.
140 * doc/invoke.texi: Document -mfunction-return= option.
142 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
144 * config/i386/i386-opts.h (indirect_branch): New.
145 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
146 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
147 with local indirect jump when converting indirect call and jump.
148 (ix86_set_indirect_branch_type): New.
149 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
150 (indirectlabelno): New.
151 (indirect_thunk_needed): Likewise.
152 (indirect_thunk_bnd_needed): Likewise.
153 (indirect_thunks_used): Likewise.
154 (indirect_thunks_bnd_used): Likewise.
155 (INDIRECT_LABEL): Likewise.
156 (indirect_thunk_name): Likewise.
157 (output_indirect_thunk): Likewise.
158 (output_indirect_thunk_function): Likewise.
159 (ix86_output_indirect_branch_via_reg): Likewise.
160 (ix86_output_indirect_branch_via_push): Likewise.
161 (ix86_output_indirect_branch): Likewise.
162 (ix86_output_indirect_jmp): Likewise.
163 (ix86_code_end): Call output_indirect_thunk_function if needed.
164 (ix86_output_call_insn): Call ix86_output_indirect_branch if
166 (ix86_handle_fndecl_attribute): Handle indirect_branch.
167 (ix86_attribute_table): Add indirect_branch.
168 * config/i386/i386.h (machine_function): Add indirect_branch_type
169 and has_local_indirect_jump.
170 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
172 (tablejump): Likewise.
173 (*indirect_jump): Use ix86_output_indirect_jmp.
174 (*tablejump_1): Likewise.
175 (simple_return_indirect_internal): Likewise.
176 * config/i386/i386.opt (mindirect-branch=): New option.
177 (indirect_branch): New.
180 (thunk-inline): Likewise.
181 (thunk-extern): Likewise.
182 * doc/extend.texi: Document indirect_branch function attribute.
183 * doc/invoke.texi: Document -mindirect-branch= option.
185 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
188 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
190 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
192 * ipa-inline.c (want_inline_small_function_p): Return false if
193 inlining has already failed with CIF_FINAL_ERROR.
194 (update_caller_keys): Call want_inline_small_function_p before
196 (update_callee_keys): Likewise.
198 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
200 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
202 (rs6000_quadword_masked_address_p): Likewise.
203 (quad_aligned_load_p): Likewise.
204 (quad_aligned_store_p): Likewise.
205 (const_load_sequence_p): Add comment to describe the outer-most loop.
206 (mimic_memory_attributes_and_flags): New function.
207 (rs6000_gen_stvx): Likewise.
208 (replace_swapped_aligned_store): Likewise.
209 (rs6000_gen_lvx): Likewise.
210 (replace_swapped_aligned_load): Likewise.
211 (replace_swapped_load_constant): Capitalize argument name in
212 comment describing this function.
213 (rs6000_analyze_swaps): Add a third pass to search for vector loads
214 and stores that access quad-word aligned addresses and replace
215 with stvx or lvx instructions when appropriate.
216 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
217 New function prototype.
218 (rs6000_quadword_masked_address_p): Likewise.
219 (rs6000_gen_lvx): Likewise.
220 (rs6000_gen_stvx): Likewise.
221 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
222 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
223 when memory address is aligned.
224 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
225 this split to select lvx instruction when memory address is aligned.
226 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
227 instruction when memory address is aligned.
228 (*vsx_le_perm_load_v16qi): Likewise.
229 (four unnamed splitters): Modify to select the stvx instruction
230 when memory is aligned.
232 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
234 * predict.c (determine_unlikely_bbs): Handle correctly BBs
235 which appears in the queue multiple times.
237 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
238 Alan Hayward <alan.hayward@arm.com>
239 David Sherwood <david.sherwood@arm.com>
241 * tree-vectorizer.h (vec_lower_bound): New structure.
242 (_loop_vec_info): Add check_nonzero and lower_bounds.
243 (LOOP_VINFO_CHECK_NONZERO): New macro.
244 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
245 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
246 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
247 fields. Make seg_len the distance travelled, not including the
249 (dr_direction_indicator): Declare.
250 (dr_zero_step_indicator): Likewise.
251 (dr_known_forward_stride_p): Likewise.
252 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
254 (runtime_alias_check_p): Allow runtime alias checks with
256 (operator ==): Compare access_size and align.
257 (prune_runtime_alias_test_list): Rework for new distinction between
258 the access_size and seg_len.
259 (create_intersect_range_checks_index): Likewise. Cope with polynomial
261 (get_segment_min_max): New function.
262 (create_intersect_range_checks): Use it.
263 (dr_step_indicator): New function.
264 (dr_direction_indicator): Likewise.
265 (dr_zero_step_indicator): Likewise.
266 (dr_known_forward_stride_p): Likewise.
267 * tree-loop-distribution.c (data_ref_segment_size): Return
268 DR_STEP * (niters - 1).
269 (compute_alias_check_pairs): Update call to the dr_with_seg_len
271 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
272 (vect_preserves_scalar_order_p): New function, split out from...
273 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
274 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
275 (vect_vfa_access_size): New function.
276 (vect_vfa_align): Likewise.
277 (vect_compile_time_alias): Take access_size_a and access_b arguments.
278 (dump_lower_bound): New function.
279 (vect_check_lower_bound): Likewise.
280 (vect_small_gap_p): Likewise.
281 (vectorizable_with_step_bound_p): Likewise.
282 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
283 depencies if the vectorization factor is 1. Convert the checks
284 for nonzero steps into checks on the bounds of DR_STEP. Try using
285 a bunds check for variable steps if the minimum required step is
286 relatively small. Update calls to the dr_with_seg_len
287 constructor and to vect_compile_time_alias.
288 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
290 (vect_loop_versioning): Call it.
291 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
293 (vect_estimate_min_profitable_iters): Account for any bounds checks.
295 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
296 Alan Hayward <alan.hayward@arm.com>
297 David Sherwood <david.sherwood@arm.com>
299 * doc/sourcebuild.texi (vect_scatter_store): Document.
300 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
302 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
304 * genopinit.c (main): Add supports_vec_scatter_store and
305 supports_vec_scatter_store_cached to target_optabs.
306 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
307 IFN_MASK_SCATTER_STORE.
308 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
310 * internal-fn.h (internal_store_fn_p): Declare.
311 (internal_fn_stored_value_index): Likewise.
312 * internal-fn.c (scatter_store_direct): New macro.
313 (expand_scatter_store_optab_fn): New function.
314 (direct_scatter_store_optab_supported_p): New macro.
315 (internal_store_fn_p): New function.
316 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
317 IFN_MASK_SCATTER_STORE.
318 (internal_fn_mask_index): Likewise.
319 (internal_fn_stored_value_index): New function.
320 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
322 * optabs-query.h (supports_vec_scatter_store_p): Declare.
323 * optabs-query.c (supports_vec_scatter_store_p): New function.
324 * tree-vectorizer.h (vect_get_store_rhs): Declare.
325 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
326 true for scatter stores.
327 (vect_gather_scatter_fn_p): Handle scatter stores too.
328 (vect_check_gather_scatter): Consider using scatter stores if
329 supports_vec_scatter_store_p.
330 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
332 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
333 internal_fn_stored_value_index.
334 (check_load_store_masking): Handle scatter stores too.
335 (vect_get_store_rhs): Make public.
336 (vectorizable_call): Use internal_store_fn_p.
337 (vectorizable_store): Handle scatter store internal functions.
338 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
339 when deciding whether the end of the group has been reached.
340 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
341 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
342 (mask_scatter_store<mode>): New insns.
344 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
345 Alan Hayward <alan.hayward@arm.com>
346 David Sherwood <david.sherwood@arm.com>
348 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
349 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
350 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
352 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
353 Use vect_truncate_gather_scatter_offset if we can't treat the
354 operation as a normal gather load or scatter store.
355 (get_group_load_store_type): Take the gather_scatter_info
356 as argument. Try using a gather load or scatter store for
357 single-element groups.
358 (get_load_store_type): Update calls to get_group_load_store_type
359 and vect_use_strided_gather_scatters_p.
361 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
362 Alan Hayward <alan.hayward@arm.com>
363 David Sherwood <david.sherwood@arm.com>
365 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
366 optional tree argument.
367 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
369 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
370 but continue to use the current value as a fallback.
371 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
372 to compare the updates.
373 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
374 (get_load_store_type): Use it when handling a strided access.
375 (vect_get_strided_load_store_ops): New function.
376 (vect_get_data_ptr_increment): Likewise.
377 (vectorizable_load): Handle strided gather loads. Always pass
378 a step to vect_create_data_ref_ptr and bump_vector_ptr.
380 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
381 Alan Hayward <alan.hayward@arm.com>
382 David Sherwood <david.sherwood@arm.com>
384 * doc/md.texi (gather_load@var{m}): Document.
385 (mask_gather_load@var{m}): Likewise.
386 * genopinit.c (main): Add supports_vec_gather_load and
387 supports_vec_gather_load_cached to target_optabs.
388 * optabs-tree.c (init_tree_optimization_optabs): Use
389 ggc_cleared_alloc to allocate target_optabs.
390 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
391 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
393 * internal-fn.h (internal_load_fn_p): Declare.
394 (internal_gather_scatter_fn_p): Likewise.
395 (internal_fn_mask_index): Likewise.
396 (internal_gather_scatter_fn_supported_p): Likewise.
397 * internal-fn.c (gather_load_direct): New macro.
398 (expand_gather_load_optab_fn): New function.
399 (direct_gather_load_optab_supported_p): New macro.
400 (direct_internal_fn_optab): New function.
401 (internal_load_fn_p): Likewise.
402 (internal_gather_scatter_fn_p): Likewise.
403 (internal_fn_mask_index): Likewise.
404 (internal_gather_scatter_fn_supported_p): Likewise.
405 * optabs-query.c (supports_at_least_one_mode_p): New function.
406 (supports_vec_gather_load_p): Likewise.
407 * optabs-query.h (supports_vec_gather_load_p): Declare.
408 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
409 and memory_type field.
410 (NUM_PATTERNS): Bump to 15.
411 * tree-vect-data-refs.c: Include internal-fn.h.
412 (vect_gather_scatter_fn_p): New function.
413 (vect_describe_gather_scatter_call): Likewise.
414 (vect_check_gather_scatter): Try using internal functions for
415 gather loads. Recognize existing calls to a gather load function.
416 (vect_analyze_data_refs): Consider using gather loads if
417 supports_vec_gather_load_p.
418 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
419 (vect_get_gather_scatter_offset_type): Likewise.
420 (vect_convert_mask_for_vectype): Likewise.
421 (vect_add_conversion_to_patterm): Likewise.
422 (vect_try_gather_scatter_pattern): Likewise.
423 (vect_recog_gather_scatter_pattern): New pattern recognizer.
424 (vect_vect_recog_func_ptrs): Add it.
425 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
426 internal_fn_mask_index and internal_gather_scatter_fn_p.
427 (check_load_store_masking): Take the gather_scatter_info as an
428 argument and handle gather loads.
429 (vect_get_gather_scatter_ops): New function.
430 (vectorizable_call): Check internal_load_fn_p.
431 (vectorizable_load): Likewise. Handle gather load internal
433 (vectorizable_store): Update call to check_load_store_masking.
434 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
435 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
436 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
437 (aarch64_gather_scale_operand_d): New predicates.
438 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
439 (mask_gather_load<mode>): New insns.
441 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
442 Alan Hayward <alan.hayward@arm.com>
443 David Sherwood <david.sherwood@arm.com>
445 * optabs.def (fold_left_plus_optab): New optab.
446 * doc/md.texi (fold_left_plus_@var{m}): Document.
447 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
448 * internal-fn.c (fold_left_direct): Define.
449 (expand_fold_left_optab_fn): Likewise.
450 (direct_fold_left_optab_supported_p): Likewise.
451 * fold-const-call.c (fold_const_fold_left): New function.
452 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
453 * tree-parloops.c (valid_reduction_p): New function.
454 (gather_scalar_reductions): Use it.
455 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
456 (vect_finish_replace_stmt): Declare.
457 * tree-vect-loop.c (fold_left_reduction_fn): New function.
458 (needs_fold_left_reduction_p): New function, split out from...
459 (vect_is_simple_reduction): ...here. Accept reductions that
460 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
461 (vect_force_simple_reduction): Also store the reduction type in
462 the assignment's STMT_VINFO_REDUC_TYPE.
463 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
464 (merge_with_identity): New function.
465 (vect_expand_fold_left): Likewise.
466 (vectorize_fold_left_reduction): Likewise.
467 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
468 scalar phi in place for it. Check for target support and reject
469 cases that would reassociate the operation. Defer the transform
470 phase to vectorize_fold_left_reduction.
471 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
472 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
473 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
475 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
477 * tree-if-conv.c (predicate_mem_writes): Remove redundant
478 call to ifc_temp_var.
480 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
481 Alan Hayward <alan.hayward@arm.com>
482 David Sherwood <david.sherwood@arm.com>
484 * target.def (legitimize_address_displacement): Take the original
485 offset as a poly_int.
486 * targhooks.h (default_legitimize_address_displacement): Update
488 * targhooks.c (default_legitimize_address_displacement): Likewise.
489 * doc/tm.texi: Regenerate.
490 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
491 as an argument, moving assert of ad->disp == ad->disp_term to...
492 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
493 Try calling targetm.legitimize_address_displacement before expanding
494 the address rather than afterwards, and adjust for the new interface.
495 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
496 Match the new hook interface. Handle SVE addresses.
497 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
500 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
502 * Makefile.in (OBJS): Add early-remat.o.
503 * target.def (select_early_remat_modes): New hook.
504 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
505 * doc/tm.texi: Regenerate.
506 * targhooks.h (default_select_early_remat_modes): Declare.
507 * targhooks.c (default_select_early_remat_modes): New function.
508 * timevar.def (TV_EARLY_REMAT): New timevar.
509 * passes.def (pass_early_remat): New pass.
510 * tree-pass.h (make_pass_early_remat): Declare.
511 * early-remat.c: New file.
512 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
514 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
516 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
517 Alan Hayward <alan.hayward@arm.com>
518 David Sherwood <david.sherwood@arm.com>
520 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
521 vfm1 with a bound_epilog parameter.
522 (vect_do_peeling): Update calls accordingly, and move the prologue
523 call earlier in the function. Treat the base bound_epilog as 0 for
524 fully-masked loops and retain vf - 1 for other loops. Add 1 to
525 this base when peeling for gaps.
526 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
527 with fully-masked loops.
528 (vect_estimate_min_profitable_iters): Handle the single peeled
529 iteration in that case.
531 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
532 Alan Hayward <alan.hayward@arm.com>
533 David Sherwood <david.sherwood@arm.com>
535 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
536 single-element interleaving even if the size is not a power of 2.
537 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
538 accesses for single-element interleaving if the group size is
541 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
542 Alan Hayward <alan.hayward@arm.com>
543 David Sherwood <david.sherwood@arm.com>
545 * doc/md.texi (fold_extract_last_@var{m}): Document.
546 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
547 * optabs.def (fold_extract_last_optab): New optab.
548 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
549 * internal-fn.c (fold_extract_direct): New macro.
550 (expand_fold_extract_optab_fn): Likewise.
551 (direct_fold_extract_optab_supported_p): Likewise.
552 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
553 * tree-vect-loop.c (vect_model_reduction_cost): Handle
554 EXTRACT_LAST_REDUCTION.
555 (get_initial_def_for_reduction): Do not create an initial vector
556 for EXTRACT_LAST_REDUCTION reductions.
557 (vectorizable_reduction): Leave the scalar phi in place for
558 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
559 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
560 epilogue code for EXTRACT_LAST_REDUCTION and defer the
561 transform phase to vectorizable_condition.
562 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
564 (vect_finish_stmt_generation): ...here.
565 (vect_finish_replace_stmt): New function.
566 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
567 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
569 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
571 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
572 Alan Hayward <alan.hayward@arm.com>
573 David Sherwood <david.sherwood@arm.com>
575 * doc/md.texi (extract_last_@var{m}): Document.
576 * optabs.def (extract_last_optab): New optab.
577 * internal-fn.def (EXTRACT_LAST): New internal function.
578 * internal-fn.c (cond_unary_direct): New macro.
579 (expand_cond_unary_optab_fn): Likewise.
580 (direct_cond_unary_optab_supported_p): Likewise.
581 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
582 loops using EXTRACT_LAST.
583 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
584 (extract_last_<mode>): ...this optab.
585 (vec_extract<mode><Vel>): Update accordingly.
587 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
588 Alan Hayward <alan.hayward@arm.com>
589 David Sherwood <david.sherwood@arm.com>
591 * target.def (empty_mask_is_expensive): New hook.
592 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
593 * doc/tm.texi: Regenerate.
594 * targhooks.h (default_empty_mask_is_expensive): Declare.
595 * targhooks.c (default_empty_mask_is_expensive): New function.
596 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
597 if the target says that empty masks are expensive.
598 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
600 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
602 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
603 Alan Hayward <alan.hayward@arm.com>
604 David Sherwood <david.sherwood@arm.com>
606 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
607 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
608 (vect_use_loop_mask_for_alignment_p): New function.
609 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
610 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
611 niters_skip argument. Make sure that the first niters_skip elements
612 of the first iteration are inactive.
613 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
614 Update call to vect_set_loop_masks_directly.
615 (get_misalign_in_elems): New function, split out from...
616 (vect_gen_prolog_loop_niters): ...here.
617 (vect_update_init_of_dr): Take a code argument that specifies whether
618 the adjustment should be added or subtracted.
619 (vect_update_init_of_drs): Likewise.
620 (vect_prepare_for_masked_peels): New function.
621 (vect_do_peeling): Skip prologue peeling if we're using a mask
622 instead. Update call to vect_update_inits_of_drs.
623 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
625 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
626 alignment. Do not include the number of peeled iterations in
627 the minimum threshold in that case.
628 (vectorizable_induction): Adjust the start value down by
629 LOOP_VINFO_MASK_SKIP_NITERS iterations.
630 (vect_transform_loop): Call vect_prepare_for_masked_peels.
631 Take the number of skipped iterations into account when calculating
633 * tree-vect-stmts.c (vect_gen_while_not): New function.
635 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
636 Alan Hayward <alan.hayward@arm.com>
637 David Sherwood <david.sherwood@arm.com>
639 * doc/sourcebuild.texi (vect_fully_masked): Document.
640 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
642 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
644 (vect_analyze_loop_2): ...here. Don't check the vectorization
645 factor against the number of loop iterations if the loop is
648 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
649 Alan Hayward <alan.hayward@arm.com>
650 David Sherwood <david.sherwood@arm.com>
652 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
653 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
654 (dump_groups): Update accordingly.
655 (iv_use::mem_type): New member variable.
656 (address_p): New function.
657 (record_use): Add a mem_type argument and initialize the new
659 (record_group_use): Add a mem_type argument. Use address_p.
660 Remove obsolete null checks of base_object. Update call to record_use.
661 (find_interesting_uses_op): Update call to record_group_use.
662 (find_interesting_uses_cond): Likewise.
663 (find_interesting_uses_address): Likewise.
664 (get_mem_type_for_internal_fn): New function.
665 (find_address_like_use): Likewise.
666 (find_interesting_uses_stmt): Try find_address_like_use before
667 calling find_interesting_uses_op.
668 (addr_offset_valid_p): Use the iv mem_type field as the type
669 of the addressed memory.
670 (add_autoinc_candidates): Likewise.
671 (get_address_cost): Likewise.
672 (split_small_address_groups_p): Use address_p.
673 (split_address_groups): Likewise.
674 (add_iv_candidate_for_use): Likewise.
675 (autoinc_possible_for_pair): Likewise.
676 (rewrite_groups): Likewise.
677 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
678 (determine_group_iv_cost): Update after split of USE_ADDRESS.
679 (get_alias_ptr_type_for_ptr_address): New function.
680 (rewrite_use_address): Rewrite address uses in calls that were
681 identified by find_address_like_use.
683 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
684 Alan Hayward <alan.hayward@arm.com>
685 David Sherwood <david.sherwood@arm.com>
687 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
689 * gimple-expr.h (is_gimple_addressable: Likewise.
690 * gimple-expr.c (is_gimple_address): Likewise.
691 * internal-fn.c (expand_call_mem_ref): New function.
692 (expand_mask_load_optab_fn): Use it.
693 (expand_mask_store_optab_fn): Likewise.
695 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
696 Alan Hayward <alan.hayward@arm.com>
697 David Sherwood <david.sherwood@arm.com>
699 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
700 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
701 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
702 (cond_umax@var{mode}): Document.
703 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
704 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
705 (cond_umin_optab, cond_umax_optab): New optabs.
706 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
707 (COND_IOR, COND_XOR): New internal functions.
708 * internal-fn.h (get_conditional_internal_fn): Declare.
709 * internal-fn.c (cond_binary_direct): New macro.
710 (expand_cond_binary_optab_fn): Likewise.
711 (direct_cond_binary_optab_supported_p): Likewise.
712 (get_conditional_internal_fn): New function.
713 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
714 Cope with reduction statements that are vectorized as calls rather
716 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
717 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
718 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
719 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
720 (UNSPEC_COND_EOR): New unspecs.
721 (optab): Add mappings for them.
722 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
723 (sve_int_op, sve_fp_op): New int attributes.
725 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
726 Alan Hayward <alan.hayward@arm.com>
727 David Sherwood <david.sherwood@arm.com>
729 * optabs.def (while_ult_optab): New optab.
730 * doc/md.texi (while_ult@var{m}@var{n}): Document.
731 * internal-fn.def (WHILE_ULT): New internal function.
732 * internal-fn.h (direct_internal_fn_supported_p): New override
733 that takes two types as argument.
734 * internal-fn.c (while_direct): New macro.
735 (expand_while_optab_fn): New function.
736 (convert_optab_supported_p): Likewise.
737 (direct_while_optab_supported_p): New macro.
738 * wide-int.h (wi::udiv_ceil): New function.
739 * tree-vectorizer.h (rgroup_masks): New structure.
740 (vec_loop_masks): New typedef.
741 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
743 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
744 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
745 (vect_max_vf): New function.
746 (slpeel_make_loop_iterate_ntimes): Delete.
747 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
748 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
749 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
750 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
751 internal-fn.h, stor-layout.h and optabs-query.h.
752 (vect_set_loop_mask): New function.
753 (add_preheader_seq): Likewise.
754 (add_header_seq): Likewise.
755 (interleave_supported_p): Likewise.
756 (vect_maybe_permute_loop_masks): Likewise.
757 (vect_set_loop_masks_directly): Likewise.
758 (vect_set_loop_condition_masked): Likewise.
759 (vect_set_loop_condition_unmasked): New function, split out from
760 slpeel_make_loop_iterate_ntimes.
761 (slpeel_make_loop_iterate_ntimes): Rename to..
762 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
763 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
764 (vect_do_peeling): Update call accordingly.
765 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
767 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
768 mask_compare_type, can_fully_mask_p and fully_masked_p.
769 (release_vec_loop_masks): New function.
770 (_loop_vec_info): Use it to free the loop masks.
771 (can_produce_all_loop_masks_p): New function.
772 (vect_get_max_nscalars_per_iter): Likewise.
773 (vect_verify_full_masking): Likewise.
774 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
775 retries, and free the mask rgroups before retrying. Check loop-wide
776 reasons for disallowing fully-masked loops. Make the final decision
777 about whether use a fully-masked loop or not.
778 (vect_estimate_min_profitable_iters): Do not assume that peeling
779 for the number of iterations will be needed for fully-masked loops.
780 (vectorizable_reduction): Disable fully-masked loops.
781 (vectorizable_live_operation): Likewise.
782 (vect_halve_mask_nunits): New function.
783 (vect_double_mask_nunits): Likewise.
784 (vect_record_loop_mask): Likewise.
785 (vect_get_loop_mask): Likewise.
786 (vect_transform_loop): Handle the case in which the final loop
787 iteration might handle a partial vector. Call vect_set_loop_condition
788 instead of slpeel_make_loop_iterate_ntimes.
789 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
790 (check_load_store_masking): New function.
791 (prepare_load_store_mask): Likewise.
792 (vectorizable_store): Handle fully-masked loops.
793 (vectorizable_load): Likewise.
794 (supportable_widening_operation): Use vect_halve_mask_nunits for
796 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
797 (vect_gen_while): New function.
798 * config/aarch64/aarch64.md (umax<mode>3): New expander.
799 (aarch64_uqdec<mode>): New insn.
801 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
802 Alan Hayward <alan.hayward@arm.com>
803 David Sherwood <david.sherwood@arm.com>
805 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
806 (reduc_xor_scal_optab): New optabs.
807 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
808 (reduc_xor_scal_@var{m}): Document.
809 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
810 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
812 * fold-const-call.c (fold_const_call): Handle them.
813 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
814 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
815 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
816 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
817 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
818 (UNSPEC_XORV): New unspecs.
819 (optab): Add entries for them.
820 (BITWISEV): New int iterator.
821 (bit_reduc_op): New int attributes.
823 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
824 Alan Hayward <alan.hayward@arm.com>
825 David Sherwood <david.sherwood@arm.com>
827 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
828 * internal-fn.def (VEC_SHL_INSERT): New internal function.
829 * optabs.def (vec_shl_insert_optab): New optab.
830 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
831 (duplicate_and_interleave): Likewise.
832 * tree-vect-loop.c: Include internal-fn.h.
833 (neutral_op_for_slp_reduction): New function, split out from
834 get_initial_defs_for_reduction.
835 (get_initial_def_for_reduction): Handle option 2 for variable-length
836 vectors by loading the neutral value into a vector and then shifting
837 the initial value into element 0.
838 (get_initial_defs_for_reduction): Replace the code argument with
839 the neutral value calculated by neutral_op_for_slp_reduction.
840 Use gimple_build_vector for constant-length vectors.
841 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
842 but the first group_size elements have a neutral value.
843 Use duplicate_and_interleave otherwise.
844 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
845 Update call to get_initial_defs_for_reduction. Handle SLP
846 reductions for variable-length vectors by creating one vector
847 result for each scalar result, with the elements associated
848 with other scalar results stubbed out with the neutral value.
849 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
850 Require IFN_VEC_SHL_INSERT for double reductions on
851 variable-length vectors, or SLP reductions that have
852 a neutral value. Require can_duplicate_and_interleave_p
853 support for variable-length unchained SLP reductions if there
854 is no neutral value, such as for MIN/MAX reductions. Also require
855 the number of vector elements to be a multiple of the number of
856 SLP statements when doing variable-length unchained SLP reductions.
857 Update call to vect_create_epilog_for_reduction.
858 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
859 and remove initial values.
860 (duplicate_and_interleave): Make public.
861 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
862 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
864 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
865 Alan Hayward <alan.hayward@arm.com>
866 David Sherwood <david.sherwood@arm.com>
868 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
869 (can_duplicate_and_interleave_p): New function.
870 (vect_get_and_check_slp_defs): Take the vector of statements
871 rather than just the current one. Remove excess parentheses.
872 Restriction rejectinon of vect_constant_def and vect_external_def
873 for variable-length vectors to boolean types, or types for which
874 can_duplicate_and_interleave_p is false.
875 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
876 (duplicate_and_interleave): New function.
877 (vect_get_constant_vectors): Use gimple_build_vector for
878 constant-length vectors and suitable variable-length constant
879 vectors. Use duplicate_and_interleave for other variable-length
880 vectors. Don't defer the update when inserting new statements.
882 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
883 Alan Hayward <alan.hayward@arm.com>
884 David Sherwood <david.sherwood@arm.com>
886 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
887 min_profitable_iters doesn't go negative.
889 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
890 Alan Hayward <alan.hayward@arm.com>
891 David Sherwood <david.sherwood@arm.com>
893 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
894 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
895 * optabs.def (vec_mask_load_lanes_optab): New optab.
896 (vec_mask_store_lanes_optab): Likewise.
897 * internal-fn.def (MASK_LOAD_LANES): New internal function.
898 (MASK_STORE_LANES): Likewise.
899 * internal-fn.c (mask_load_lanes_direct): New macro.
900 (mask_store_lanes_direct): Likewise.
901 (expand_mask_load_optab_fn): Handle masked operations.
902 (expand_mask_load_lanes_optab_fn): New macro.
903 (expand_mask_store_optab_fn): Handle masked operations.
904 (expand_mask_store_lanes_optab_fn): New macro.
905 (direct_mask_load_lanes_optab_supported_p): Likewise.
906 (direct_mask_store_lanes_optab_supported_p): Likewise.
907 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
909 (vect_load_lanes_supported): Likewise.
910 * tree-vect-data-refs.c (strip_conversion): New function.
911 (can_group_stmts_p): Likewise.
912 (vect_analyze_data_ref_accesses): Use it instead of checking
913 for a pair of assignments.
914 (vect_store_lanes_supported): Take a masked_p parameter.
915 (vect_load_lanes_supported): Likewise.
916 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
917 vect_store_lanes_supported and vect_load_lanes_supported.
918 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
919 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
920 parameter. Don't allow gaps for masked accesses.
921 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
922 and vect_load_lanes_supported.
923 (get_load_store_type): Take a masked_p parameter and update
924 call to get_group_load_store_type.
925 (vectorizable_store): Update call to get_load_store_type.
926 Handle IFN_MASK_STORE_LANES.
927 (vectorizable_load): Update call to get_load_store_type.
928 Handle IFN_MASK_LOAD_LANES.
930 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
931 Alan Hayward <alan.hayward@arm.com>
932 David Sherwood <david.sherwood@arm.com>
934 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
936 * config/aarch64/aarch64-protos.h
937 (aarch64_sve_struct_memory_operand_p): Declare.
938 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
939 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
940 (VPRED, vpred): Handle SVE structure modes.
941 * config/aarch64/constraints.md (Utx): New constraint.
942 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
943 (aarch64_sve_struct_nonimmediate_operand): New predicates.
944 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
945 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
946 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
947 structure modes. Split into pieces after RA.
948 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
949 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
951 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
953 (aarch64_classify_address): Likewise.
954 (sizetochar): Move earlier in file.
955 (aarch64_print_operand): Handle SVE register lists.
956 (aarch64_array_mode): New function.
957 (aarch64_sve_struct_memory_operand_p): Likewise.
958 (TARGET_ARRAY_MODE): Redefine.
960 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
961 Alan Hayward <alan.hayward@arm.com>
962 David Sherwood <david.sherwood@arm.com>
964 * target.def (array_mode): New target hook.
965 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
966 * doc/tm.texi: Regenerate.
967 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
968 * hooks.c (hook_optmode_mode_uhwi_none): New function.
969 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
971 * stor-layout.c (mode_for_array): Likewise. Support polynomial
974 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
975 Alan Hayward <alan.hayward@arm.com>
976 David Sherwood <david.sherwood@arm.com>
978 * fold-const.c (fold_binary_loc): Check the argument types
979 rather than the result type when testing for a vector operation.
981 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
983 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
984 * doc/tm.texi: Regenerate.
986 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
987 Alan Hayward <alan.hayward@arm.com>
988 David Sherwood <david.sherwood@arm.com>
990 * doc/invoke.texi (-msve-vector-bits=): Document new option.
991 (sve): Document new AArch64 extension.
992 * doc/md.texi (w): Extend the description of the AArch64
993 constraint to include SVE vectors.
994 (Upl, Upa): Document new AArch64 predicate constraints.
995 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
997 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
998 (msve-vector-bits=): New option.
999 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1000 SVE when these are disabled.
1001 (sve): New extension.
1002 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1003 modes. Adjust their number of units based on aarch64_sve_vg.
1004 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1005 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1006 aarch64_addr_query_type.
1007 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1008 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1009 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1010 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1011 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1012 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1013 (aarch64_simd_imm_zero_p): Delete.
1014 (aarch64_check_zero_based_sve_index_immediate): Declare.
1015 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1016 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1017 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1018 (aarch64_sve_float_mul_immediate_p): Likewise.
1019 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1021 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1022 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1023 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1024 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1025 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1026 (aarch64_regmode_natural_size): Likewise.
1027 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1028 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1030 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1031 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1032 for VG and the SVE predicate registers.
1033 (V_ALIASES): Add a "z"-prefixed alias.
1034 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1035 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1036 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1037 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1038 (REG_CLASS_NAMES): Add entries for them.
1039 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1040 and the predicate registers.
1041 (aarch64_sve_vg): Declare.
1042 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1043 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1044 (REGMODE_NATURAL_SIZE): Define.
1045 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1047 * config/aarch64/aarch64.c: Include cfgrtl.h.
1048 (simd_immediate_info): Add a constructor for series vectors,
1049 and an associated step field.
1050 (aarch64_sve_vg): New variable.
1051 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1052 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1053 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1054 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1055 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1056 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1057 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1058 (aarch64_get_mask_mode): New functions.
1059 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1060 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1061 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1062 predicate modes and predicate registers. Explicitly restrict
1063 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1064 to store a vector mode if it is recognized by
1065 aarch64_classify_vector_mode.
1066 (aarch64_regmode_natural_size): New function.
1067 (aarch64_hard_regno_caller_save_mode): Return the original mode
1069 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1070 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1071 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1072 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1074 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1075 does not overlap dest if the function is frame-related. Handle
1077 (aarch64_split_add_offset): New function.
1078 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1079 them aarch64_add_offset.
1080 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1081 and update call to aarch64_sub_sp.
1082 (aarch64_add_cfa_expression): New function.
1083 (aarch64_expand_prologue): Pass extra temporary registers to the
1084 functions above. Handle the case in which we need to emit new
1085 DW_CFA_expressions for registers that were originally saved
1086 relative to the stack pointer, but now have to be expressed
1087 relative to the frame pointer.
1088 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1090 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1091 IP0 and IP1 values for SVE frames.
1092 (aarch64_expand_vec_series): New function.
1093 (aarch64_expand_sve_widened_duplicate): Likewise.
1094 (aarch64_expand_sve_const_vector): Likewise.
1095 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1096 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1097 into the register, rather than emitting a SET directly.
1098 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1099 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1100 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1101 (offset_9bit_signed_scaled_p): New functions.
1102 (aarch64_replicate_bitmask_imm): New function.
1103 (aarch64_bitmask_imm): Use it.
1104 (aarch64_cannot_force_const_mem): Reject expressions involving
1105 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1106 (aarch64_classify_index): Handle SVE indices, by requiring
1107 a plain register index with a scale that matches the element size.
1108 (aarch64_classify_address): Handle SVE addresses. Assert that
1109 the mode of the address is VOIDmode or an integer mode.
1110 Update call to aarch64_classify_symbol.
1111 (aarch64_classify_symbolic_expression): Update call to
1112 aarch64_classify_symbol.
1113 (aarch64_const_vec_all_in_range_p): New function.
1114 (aarch64_print_vector_float_operand): Likewise.
1115 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1116 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1117 and the FP immediates 1.0 and 0.5.
1118 (aarch64_print_address_internal): Handle SVE addresses.
1119 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1120 (aarch64_regno_regclass): Handle predicate registers.
1121 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1123 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1124 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1125 (aarch64_convert_sve_vector_bits): New function.
1126 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1127 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1129 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1130 Handle SVE vector and predicate modes. Accept VL-based constants
1131 that need only one temporary register, and VL offsets that require
1132 no temporary registers.
1133 (aarch64_conditional_register_usage): Mark the predicate registers
1134 as fixed if SVE isn't available.
1135 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1136 Return true for SVE vector and predicate modes.
1137 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1138 rather than an unsigned int. Handle SVE modes.
1139 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1141 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1143 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1144 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1145 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1146 (aarch64_sve_float_mul_immediate_p): New functions.
1147 (aarch64_sve_valid_immediate): New function.
1148 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1149 Explicitly reject structure modes. Check for INDEX constants.
1150 Handle PTRUE and PFALSE constants.
1151 (aarch64_check_zero_based_sve_index_immediate): New function.
1152 (aarch64_simd_imm_zero_p): Delete.
1153 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1154 vector modes. Accept constants in the range of CNT[BHWD].
1155 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1156 ask for an Advanced SIMD mode.
1157 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1158 (aarch64_simd_vector_alignment): Handle SVE predicates.
1159 (aarch64_vectorize_preferred_vector_alignment): New function.
1160 (aarch64_simd_vector_alignment_reachable): Use it instead of
1162 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1163 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1165 (MAX_VECT_LEN): Delete.
1166 (expand_vec_perm_d): Add a vec_flags field.
1167 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1168 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1169 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1171 (aarch64_evpc_rev): Rename to...
1172 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1173 (aarch64_evpc_rev_global): New function.
1174 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1175 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1177 (aarch64_evpc_sve_tbl): New function.
1178 (aarch64_expand_vec_perm_const_1): Update after rename of
1179 aarch64_evpc_rev. Handle SVE permutes too, trying
1180 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1181 than aarch64_evpc_tbl.
1182 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1183 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1184 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1185 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1186 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1187 (aarch64_expand_sve_vcond): New functions.
1188 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1189 of aarch64_vector_mode_p.
1190 (aarch64_dwarf_poly_indeterminate_value): New function.
1191 (aarch64_compute_pressure_classes): Likewise.
1192 (aarch64_can_change_mode_class): Likewise.
1193 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1194 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1195 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1196 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1197 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1198 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1199 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1200 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1202 (Dn, Dl, Dr): Accept const as well as const_vector.
1203 (Dz): Likewise. Compare against CONST0_RTX.
1204 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1205 of "vector" where appropriate.
1206 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1207 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1208 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1209 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1210 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1211 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1212 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1213 (v_int_equiv): Extend to SVE modes.
1214 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1216 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1217 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1218 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1219 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1220 (SVE_COND_FP_CMP): New int iterators.
1221 (perm_hilo): Handle the new unpack unspecs.
1222 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1224 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1225 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1226 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1227 (aarch64_equality_operator, aarch64_constant_vector_operand)
1228 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1229 (aarch64_sve_nonimmediate_operand): Likewise.
1230 (aarch64_sve_general_operand): Likewise.
1231 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1232 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1233 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1234 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1235 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1236 (aarch64_sve_float_arith_immediate): Likewise.
1237 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1238 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1239 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1240 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1241 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1242 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1243 (aarch64_sve_float_arith_operand): Likewise.
1244 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1245 (aarch64_sve_float_mul_operand): Likewise.
1246 (aarch64_sve_vec_perm_operand): Likewise.
1247 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1248 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1249 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1250 as well as const_vector.
1251 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1252 in file. Use CONST0_RTX and CONSTM1_RTX.
1253 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1254 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1255 Use aarch64_simd_imm_zero.
1256 * config/aarch64/aarch64-sve.md: New file.
1257 * config/aarch64/aarch64.md: Include it.
1258 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1259 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1260 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1261 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1262 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1263 (sve): New attribute.
1264 (enabled): Disable instructions with the sve attribute unless
1266 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1267 aarch64_expand_mov_immediate.
1268 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1269 CNT[BHSD] immediates.
1270 (movti): Split CONST_POLY_INT moves into two halves.
1271 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1272 Split additions that need a temporary here if the destination
1273 is the stack pointer.
1274 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1275 (*add<mode>3_poly_1): New instruction.
1276 (set_clobber_cc): New expander.
1278 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1280 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1281 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1282 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1283 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1284 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1285 Change innermode from fixed_mode_size to machine_mode.
1286 (simplify_subreg): Update call accordingly. Handle a constant-sized
1287 subreg of a variable-length CONST_VECTOR.
1289 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1290 Alan Hayward <alan.hayward@arm.com>
1291 David Sherwood <david.sherwood@arm.com>
1293 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1294 (add_offset_to_base): New function, split out from...
1295 (create_mem_ref): ...here. When handling a scale other than 1,
1296 check first whether the address is valid without the offset.
1297 Add it into the base if so, leaving the index and scale as-is.
1299 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1302 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1303 fold_for_warn before checking if arg2 is INTEGER_CST.
1305 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1307 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1308 (store_multiple_operation): Delete.
1309 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1310 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1311 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1312 guarded by TARGET_STRING.
1313 (rs6000_output_load_multiple): Delete.
1314 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1315 OPTION_MASK_STRING / TARGET_STRING handling.
1316 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1317 (const rs6000_opt_masks) <"string">: Change mask to 0.
1318 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1319 (MASK_STRING): Delete.
1320 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1322 (load_multiple): Delete.
1329 (store_multiple): Delete.
1336 (movmemsi_8reg): Delete.
1337 (corresponding unnamed define_insn): Delete.
1338 (movmemsi_6reg): Delete.
1339 (corresponding unnamed define_insn): Delete.
1340 (movmemsi_4reg): Delete.
1341 (corresponding unnamed define_insn): Delete.
1342 (movmemsi_2reg): Delete.
1343 (corresponding unnamed define_insn): Delete.
1344 (movmemsi_1reg): Delete.
1345 (corresponding unnamed define_insn): Delete.
1346 * config/rs6000/rs6000.opt (mno-string): New.
1347 (mstring): Replace by deprecation warning stub.
1348 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1350 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1352 * regrename.c (regrename_do_replace): If replacing the same
1353 reg multiple times, try to reuse last created gen_raw_REG.
1356 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1357 main to workaround a bug in GDB.
1359 2018-01-12 Tom de Vries <tom@codesourcery.com>
1362 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1364 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1366 PR rtl-optimization/80481
1367 * ira-color.c (get_cap_member): New function.
1368 (allocnos_conflict_by_live_ranges_p): Use it.
1369 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1370 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1372 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1375 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1376 (*saddl_se_1): Ditto.
1378 (*saddl_se_1): Ditto.
1380 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1382 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1383 rather than wi::to_widest for DR_INITs.
1384 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1385 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1386 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1388 (vect_analyze_group_access_1): Note that here.
1390 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1392 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1393 polynomial type sizes.
1395 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1397 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1398 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1399 (gimple_add_tmp_var): Likewise.
1401 2018-01-12 Martin Liska <mliska@suse.cz>
1403 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1404 (gimple_alloc_sizes): Likewise.
1405 (dump_gimple_statistics): Use PRIu64 in printf format.
1406 * gimple.h: Change uint64_t to int.
1408 2018-01-12 Martin Liska <mliska@suse.cz>
1410 * tree-core.h: Use uint64_t instead of int.
1411 * tree.c (tree_node_counts): Likewise.
1412 (tree_node_sizes): Likewise.
1413 (dump_tree_statistics): Use PRIu64 in printf format.
1415 2018-01-12 Martin Liska <mliska@suse.cz>
1417 * Makefile.in: As qsort_chk is implemented in vec.c, add
1418 vec.o to linkage of gencfn-macros.
1419 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1420 passing the info to record_node_allocation_statistics.
1421 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1423 * ggc-common.c (struct ggc_usage): Add operator== and use
1424 it in operator< and compare function.
1425 * mem-stats.h (struct mem_usage): Likewise.
1426 * vec.c (struct vec_usage): Remove operator< and compare
1427 function. Can be simply inherited.
1429 2018-01-12 Martin Jambor <mjambor@suse.cz>
1432 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1433 * tree-ssa-math-opts.c: Include domwalk.h.
1434 (convert_mult_to_fma_1): New function.
1435 (fma_transformation_info): New type.
1436 (fma_deferring_state): Likewise.
1437 (cancel_fma_deferring): New function.
1438 (result_of_phi): Likewise.
1439 (last_fma_candidate_feeds_initial_phi): Likewise.
1440 (convert_mult_to_fma): Added deferring logic, split actual
1441 transformation to convert_mult_to_fma_1.
1442 (math_opts_dom_walker): New type.
1443 (math_opts_dom_walker::after_dom_children): New method, body moved
1444 here from pass_optimize_widening_mul::execute, added deferring logic
1446 (pass_optimize_widening_mul::execute): Moved most of code to
1447 math_opts_dom_walker::after_dom_children.
1448 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1449 * config/i386/i386.c (ix86_option_override_internal): Added
1450 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1452 2018-01-12 Richard Biener <rguenther@suse.de>
1455 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1456 inline instance vars.
1458 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1461 * config/rx/rx.c (rx_is_restricted_memory_address):
1464 2018-01-12 Richard Biener <rguenther@suse.de>
1466 PR tree-optimization/80846
1467 * target.def (split_reduction): New target hook.
1468 * targhooks.c (default_split_reduction): New function.
1469 * targhooks.h (default_split_reduction): Declare.
1470 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1471 target requests first reduce vectors by combining low and high
1473 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1474 (get_vectype_for_scalar_type_and_size): Export.
1475 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1476 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1477 * doc/tm.texi: Regenerate.
1478 * config/i386/i386.c (ix86_split_reduction): Implement
1479 TARGET_VECTORIZE_SPLIT_REDUCTION.
1481 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1484 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1485 in PIC mode except for TARGET_VXWORKS_RTP.
1486 * config/sparc/sparc.c: Include cfgrtl.h.
1487 (TARGET_INIT_PIC_REG): Define.
1488 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1489 (sparc_pic_register_p): New predicate.
1490 (sparc_legitimate_address_p): Use it.
1491 (sparc_legitimize_pic_address): Likewise.
1492 (sparc_delegitimize_address): Likewise.
1493 (sparc_mode_dependent_address_p): Likewise.
1494 (gen_load_pcrel_sym): Remove 4th parameter.
1495 (load_got_register): Adjust call to above. Remove obsolete stuff.
1496 (sparc_expand_prologue): Do not call load_got_register here.
1497 (sparc_flat_expand_prologue): Likewise.
1498 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1499 (sparc_use_pseudo_pic_reg): New function.
1500 (sparc_init_pic_reg): Likewise.
1501 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1502 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1504 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1506 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1507 Add item for branch_cost.
1509 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1511 PR rtl-optimization/83565
1512 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1513 not extend the result to a larger mode for rotate operations.
1514 (num_sign_bit_copies1): Likewise.
1516 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1519 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1521 Use values-Xc.o for -pedantic.
1522 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1524 2018-01-12 Martin Liska <mliska@suse.cz>
1527 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1529 (possible_polymorphic_call_targets): Use it.
1530 (ipa_devirt): Likewise.
1532 2018-01-12 Martin Liska <mliska@suse.cz>
1534 * profile-count.h (enum profile_quality): Use 0 as invalid
1535 enum value of profile_quality.
1537 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1539 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1540 -mext-string options.
1542 2018-01-12 Richard Biener <rguenther@suse.de>
1544 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1545 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1546 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1548 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1550 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1552 * configure.ac (--with-long-double-format): Add support for the
1553 configuration option to change the default long double format on
1555 * config.gcc (powerpc*-linux*-*): Likewise.
1556 * configure: Regenerate.
1557 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1558 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1559 used without modification.
1561 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1563 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1564 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1565 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1566 MISC_BUILTIN_SPEC_BARRIER.
1567 (rs6000_init_builtins): Likewise.
1568 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1570 (speculation_barrier): New define_insn.
1571 * doc/extend.texi: Document __builtin_speculation_barrier.
1573 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1576 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1577 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1578 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1580 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1581 integral modes instead of "ss" and "sd".
1582 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1583 vectors with 32-bit and 64-bit elements.
1584 (vecdupssescalarmodesuffix): New mode attribute.
1585 (vec_dup<mode>): Use it.
1587 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1590 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1591 frame if argument is passed on stack.
1593 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1596 * ree.c (combine_reaching_defs): Optimize also
1597 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1598 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1600 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1603 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1605 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1608 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1609 after they are computed.
1611 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1613 PR tree-optimization/83695
1614 * gimple-loop-linterchange.cc
1615 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1616 reset cached scev information after interchange.
1617 (pass_linterchange::execute): Remove call to scev_reset_htab.
1619 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1621 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1622 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1623 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1624 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1625 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1626 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1627 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1628 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1629 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1630 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1631 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1632 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1633 (V_lane_reg): Likewise.
1634 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1636 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1637 (vfmal_lane_low<mode>_intrinsic,
1638 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1639 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1640 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1641 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1642 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1643 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1645 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1647 * config/arm/arm-cpus.in (fp16fml): New feature.
1648 (ALL_SIMD): Add fp16fml.
1649 (armv8.2-a): Add fp16fml as an option.
1650 (armv8.3-a): Likewise.
1651 (armv8.4-a): Add fp16fml as part of fp16.
1652 * config/arm/arm.h (TARGET_FP16FML): Define.
1653 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1655 * config/arm/arm-modes.def (V2HF): Define.
1656 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1657 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1658 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1659 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1660 vfmsl_low, vfmsl_high): New set of builtins.
1661 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1662 (vfml_op): New code attribute.
1663 (VFMLHALVES): New int iterator.
1664 (VFML, VFMLSEL): New mode attributes.
1665 (V_reg): Define mapping for V2HF.
1666 (V_hi, V_lo): New mode attributes.
1667 (VF_constraint): Likewise.
1668 (vfml_half, vfml_half_selector): New int attributes.
1669 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1671 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1672 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1674 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1675 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1676 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1677 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1679 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1680 Document new effective target and option set.
1682 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1684 * config/arm/arm-cpus.in (armv8_4): New feature.
1685 (ARMv8_4a): New fgroup.
1686 (armv8.4-a): New arch.
1687 * config/arm/arm-tables.opt: Regenerate.
1688 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1689 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1690 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1691 Add matching rules for -march=armv8.4-a and extensions.
1692 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1694 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1697 * config/rx/rx.md (BW): New mode attribute.
1698 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1700 2018-01-11 Richard Biener <rguenther@suse.de>
1702 PR tree-optimization/83435
1703 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1704 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1705 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1707 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1708 Alan Hayward <alan.hayward@arm.com>
1709 David Sherwood <david.sherwood@arm.com>
1711 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1713 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1714 (aarch64_print_address_internal): Use it to check for a zero offset.
1716 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1717 Alan Hayward <alan.hayward@arm.com>
1718 David Sherwood <david.sherwood@arm.com>
1720 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1721 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1722 Return a poly_int64 rather than a HOST_WIDE_INT.
1723 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1724 rather than a HOST_WIDE_INT.
1725 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1726 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1727 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1728 final_offset from HOST_WIDE_INT to poly_int64.
1729 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1730 to_constant when getting the number of units in an Advanced SIMD
1732 (aarch64_builtin_vectorized_function): Check for a constant number
1734 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1736 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1737 attribute instead of GET_MODE_NUNITS.
1738 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1739 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1740 GET_MODE_SIZE for fixed-size registers.
1741 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1742 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1743 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1744 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1745 (aarch64_print_operand, aarch64_print_address_internal)
1746 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1747 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1748 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1749 Handle polynomial GET_MODE_SIZE.
1750 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1751 wider than SImode without modification.
1752 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1753 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1754 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1755 passing and returning SVE modes.
1756 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1757 rather than GEN_INT.
1758 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1759 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1760 (aarch64_allocate_and_probe_stack_space): Likewise.
1761 (aarch64_layout_frame): Cope with polynomial offsets.
1762 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1763 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1765 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1766 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1767 poly_int64 rather than a HOST_WIDE_INT.
1768 (aarch64_get_separate_components, aarch64_process_components)
1769 (aarch64_expand_prologue, aarch64_expand_epilogue)
1770 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1771 (aarch64_anchor_offset): New function, split out from...
1772 (aarch64_legitimize_address): ...here.
1773 (aarch64_builtin_vectorization_cost): Handle polynomial
1774 TYPE_VECTOR_SUBPARTS.
1775 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1777 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1778 number of elements from the PARALLEL rather than the mode.
1779 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1780 rather than GET_MODE_BITSIZE.
1781 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1782 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1783 (aarch64_expand_vec_perm_const_1): Handle polynomial
1784 d->perm.length () and d->perm elements.
1785 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1786 Apply to_constant to d->perm elements.
1787 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1788 polynomial CONST_VECTOR_NUNITS.
1789 (aarch64_move_pointer): Take amount as a poly_int64 rather
1791 (aarch64_progress_pointer): Avoid temporary variable.
1792 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1793 the mode attribute instead of GET_MODE.
1795 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1796 Alan Hayward <alan.hayward@arm.com>
1797 David Sherwood <david.sherwood@arm.com>
1799 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1800 x exists before using it.
1801 (aarch64_add_constant_internal): Rename to...
1802 (aarch64_add_offset_1): ...this. Replace regnum with separate
1803 src and dest rtxes. Handle the case in which they're different,
1804 including when the offset is zero. Replace scratchreg with an rtx.
1805 Use 2 additions if there is no spare register into which we can
1806 move a 16-bit constant.
1807 (aarch64_add_constant): Delete.
1808 (aarch64_add_offset): Replace reg with separate src and dest
1809 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1810 Use aarch64_add_offset_1.
1811 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1812 an rtx rather than an int. Take the delta as a poly_int64
1813 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1814 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1815 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1816 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1817 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1819 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1820 aarch64_add_constant.
1822 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1824 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1825 Use scalar_float_mode.
1827 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1829 * config/aarch64/aarch64-simd.md
1830 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1831 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1832 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1833 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1834 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1835 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1836 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1837 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1838 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1839 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1841 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1844 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1845 targ_options->x_arm_arch_string is non NULL.
1847 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1849 * config/aarch64/aarch64.h
1850 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1852 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1855 * expmed.c (emit_store_flag_force): Swap if const op0
1856 and change VOIDmode to mode of op0.
1858 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1860 PR rtl-optimization/83761
1861 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1862 than bytes to mode_for_size.
1864 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1867 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1868 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1871 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1874 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1875 when in layout mode.
1876 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1877 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1880 2018-01-10 Michael Collison <michael.collison@arm.com>
1882 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1883 * config/aarch64/aarch64-option-extension.def: Add
1884 AARCH64_OPT_EXTENSION of 'fp16fml'.
1885 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1886 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1887 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1888 * config/aarch64/constraints.md (Ui7): New constraint.
1889 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1890 (VFMLA_SEL_W): Ditto.
1893 (VFMLA16_LOW): New int iterator.
1894 (VFMLA16_HIGH): Ditto.
1895 (UNSPEC_FMLAL): New unspec.
1896 (UNSPEC_FMLSL): Ditto.
1897 (UNSPEC_FMLAL2): Ditto.
1898 (UNSPEC_FMLSL2): Ditto.
1899 (f16mac): New code attribute.
1900 * config/aarch64/aarch64-simd-builtins.def
1901 (aarch64_fmlal_lowv2sf): Ditto.
1902 (aarch64_fmlsl_lowv2sf): Ditto.
1903 (aarch64_fmlalq_lowv4sf): Ditto.
1904 (aarch64_fmlslq_lowv4sf): Ditto.
1905 (aarch64_fmlal_highv2sf): Ditto.
1906 (aarch64_fmlsl_highv2sf): Ditto.
1907 (aarch64_fmlalq_highv4sf): Ditto.
1908 (aarch64_fmlslq_highv4sf): Ditto.
1909 (aarch64_fmlal_lane_lowv2sf): Ditto.
1910 (aarch64_fmlsl_lane_lowv2sf): Ditto.
1911 (aarch64_fmlal_laneq_lowv2sf): Ditto.
1912 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1913 (aarch64_fmlalq_lane_lowv4sf): Ditto.
1914 (aarch64_fmlsl_lane_lowv4sf): Ditto.
1915 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1916 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1917 (aarch64_fmlal_lane_highv2sf): Ditto.
1918 (aarch64_fmlsl_lane_highv2sf): Ditto.
1919 (aarch64_fmlal_laneq_highv2sf): Ditto.
1920 (aarch64_fmlsl_laneq_highv2sf): Ditto.
1921 (aarch64_fmlalq_lane_highv4sf): Ditto.
1922 (aarch64_fmlsl_lane_highv4sf): Ditto.
1923 (aarch64_fmlalq_laneq_highv4sf): Ditto.
1924 (aarch64_fmlsl_laneq_highv4sf): Ditto.
1925 * config/aarch64/aarch64-simd.md:
1926 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1927 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1928 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1929 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1930 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1931 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1932 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1933 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1934 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1935 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1936 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1937 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1938 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1939 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1940 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1941 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1942 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1943 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1944 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1945 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1946 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1947 (vfmlsl_low_u32): Ditto.
1948 (vfmlalq_low_u32): Ditto.
1949 (vfmlslq_low_u32): Ditto.
1950 (vfmlal_high_u32): Ditto.
1951 (vfmlsl_high_u32): Ditto.
1952 (vfmlalq_high_u32): Ditto.
1953 (vfmlslq_high_u32): Ditto.
1954 (vfmlal_lane_low_u32): Ditto.
1955 (vfmlsl_lane_low_u32): Ditto.
1956 (vfmlal_laneq_low_u32): Ditto.
1957 (vfmlsl_laneq_low_u32): Ditto.
1958 (vfmlalq_lane_low_u32): Ditto.
1959 (vfmlslq_lane_low_u32): Ditto.
1960 (vfmlalq_laneq_low_u32): Ditto.
1961 (vfmlslq_laneq_low_u32): Ditto.
1962 (vfmlal_lane_high_u32): Ditto.
1963 (vfmlsl_lane_high_u32): Ditto.
1964 (vfmlal_laneq_high_u32): Ditto.
1965 (vfmlsl_laneq_high_u32): Ditto.
1966 (vfmlalq_lane_high_u32): Ditto.
1967 (vfmlslq_lane_high_u32): Ditto.
1968 (vfmlalq_laneq_high_u32): Ditto.
1969 (vfmlslq_laneq_high_u32): Ditto.
1970 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1971 (AARCH64_FL_FOR_ARCH8_4): New.
1972 (AARCH64_ISA_F16FML): New ISA flag.
1973 (TARGET_F16FML): New feature flag for fp16fml.
1974 (doc/invoke.texi): Document new fp16fml option.
1976 2018-01-10 Michael Collison <michael.collison@arm.com>
1978 * config/aarch64/aarch64-builtins.c:
1979 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1980 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1981 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1982 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1983 (AARCH64_ISA_SHA3): New ISA flag.
1984 (TARGET_SHA3): New feature flag for sha3.
1985 * config/aarch64/iterators.md (sha512_op): New int attribute.
1986 (CRYPTO_SHA512): New int iterator.
1987 (UNSPEC_SHA512H): New unspec.
1988 (UNSPEC_SHA512H2): Ditto.
1989 (UNSPEC_SHA512SU0): Ditto.
1990 (UNSPEC_SHA512SU1): Ditto.
1991 * config/aarch64/aarch64-simd-builtins.def
1992 (aarch64_crypto_sha512hqv2di): New builtin.
1993 (aarch64_crypto_sha512h2qv2di): Ditto.
1994 (aarch64_crypto_sha512su0qv2di): Ditto.
1995 (aarch64_crypto_sha512su1qv2di): Ditto.
1996 (aarch64_eor3qv8hi): Ditto.
1997 (aarch64_rax1qv2di): Ditto.
1998 (aarch64_xarqv2di): Ditto.
1999 (aarch64_bcaxqv8hi): Ditto.
2000 * config/aarch64/aarch64-simd.md:
2001 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2002 (aarch64_crypto_sha512su0qv2di): Ditto.
2003 (aarch64_crypto_sha512su1qv2di): Ditto.
2004 (aarch64_eor3qv8hi): Ditto.
2005 (aarch64_rax1qv2di): Ditto.
2006 (aarch64_xarqv2di): Ditto.
2007 (aarch64_bcaxqv8hi): Ditto.
2008 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2009 (vsha512h2q_u64): Ditto.
2010 (vsha512su0q_u64): Ditto.
2011 (vsha512su1q_u64): Ditto.
2012 (veor3q_u16): Ditto.
2013 (vrax1q_u64): Ditto.
2015 (vbcaxq_u16): Ditto.
2016 * config/arm/types.md (crypto_sha512): New type attribute.
2017 (crypto_sha3): Ditto.
2018 (doc/invoke.texi): Document new sha3 option.
2020 2018-01-10 Michael Collison <michael.collison@arm.com>
2022 * config/aarch64/aarch64-builtins.c:
2023 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2024 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2025 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2026 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2027 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2028 (AARCH64_ISA_SM4): New ISA flag.
2029 (TARGET_SM4): New feature flag for sm4.
2030 * config/aarch64/aarch64-simd-builtins.def
2031 (aarch64_sm3ss1qv4si): Ditto.
2032 (aarch64_sm3tt1aq4si): Ditto.
2033 (aarch64_sm3tt1bq4si): Ditto.
2034 (aarch64_sm3tt2aq4si): Ditto.
2035 (aarch64_sm3tt2bq4si): Ditto.
2036 (aarch64_sm3partw1qv4si): Ditto.
2037 (aarch64_sm3partw2qv4si): Ditto.
2038 (aarch64_sm4eqv4si): Ditto.
2039 (aarch64_sm4ekeyqv4si): Ditto.
2040 * config/aarch64/aarch64-simd.md:
2041 (aarch64_sm3ss1qv4si): Ditto.
2042 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2043 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2044 (aarch64_sm4eqv4si): Ditto.
2045 (aarch64_sm4ekeyqv4si): Ditto.
2046 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2047 (sm3part_op): Ditto.
2048 (CRYPTO_SM3TT): Ditto.
2049 (CRYPTO_SM3PART): Ditto.
2050 (UNSPEC_SM3SS1): New unspec.
2051 (UNSPEC_SM3TT1A): Ditto.
2052 (UNSPEC_SM3TT1B): Ditto.
2053 (UNSPEC_SM3TT2A): Ditto.
2054 (UNSPEC_SM3TT2B): Ditto.
2055 (UNSPEC_SM3PARTW1): Ditto.
2056 (UNSPEC_SM3PARTW2): Ditto.
2057 (UNSPEC_SM4E): Ditto.
2058 (UNSPEC_SM4EKEY): Ditto.
2059 * config/aarch64/constraints.md (Ui2): New constraint.
2060 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2061 * config/arm/types.md (crypto_sm3): New type attribute.
2062 (crypto_sm4): Ditto.
2063 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2064 (vsm3tt1aq_u32): Ditto.
2065 (vsm3tt1bq_u32): Ditto.
2066 (vsm3tt2aq_u32): Ditto.
2067 (vsm3tt2bq_u32): Ditto.
2068 (vsm3partw1q_u32): Ditto.
2069 (vsm3partw2q_u32): Ditto.
2070 (vsm4eq_u32): Ditto.
2071 (vsm4ekeyq_u32): Ditto.
2072 (doc/invoke.texi): Document new sm4 option.
2074 2018-01-10 Michael Collison <michael.collison@arm.com>
2076 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2077 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2078 (AARCH64_FL_FOR_ARCH8_4): New.
2079 (AARCH64_FL_V8_4): New flag.
2080 (doc/invoke.texi): Document new armv8.4-a option.
2082 2018-01-10 Michael Collison <michael.collison@arm.com>
2084 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2085 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2086 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2087 * config/aarch64/aarch64-option-extension.def: Add
2088 AARCH64_OPT_EXTENSION of 'sha2'.
2089 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2090 (crypto): Disable sha2 and aes if crypto disabled.
2091 (crypto): Enable aes and sha2 if enabled.
2092 (simd): Disable sha2 and aes if simd disabled.
2093 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2095 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2096 (TARGET_SHA2): New feature flag for sha2.
2097 (TARGET_AES): New feature flag for aes.
2098 * config/aarch64/aarch64-simd.md:
2099 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2100 conditional on TARGET_AES.
2101 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2102 (aarch64_crypto_sha1hsi): Make pattern conditional
2104 (aarch64_crypto_sha1hv4si): Ditto.
2105 (aarch64_be_crypto_sha1hv4si): Ditto.
2106 (aarch64_crypto_sha1su1v4si): Ditto.
2107 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2108 (aarch64_crypto_sha1su0v4si): Ditto.
2109 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2110 (aarch64_crypto_sha256su0v4si): Ditto.
2111 (aarch64_crypto_sha256su1v4si): Ditto.
2112 (doc/invoke.texi): Document new aes and sha2 options.
2114 2018-01-10 Martin Sebor <msebor@redhat.com>
2116 PR tree-optimization/83781
2117 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2120 2018-01-11 Martin Sebor <msebor@gmail.com>
2121 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2123 PR tree-optimization/83501
2124 PR tree-optimization/81703
2126 * tree-ssa-strlen.c (get_string_cst): Rename...
2127 (get_string_len): ...to this. Handle global constants.
2128 (handle_char_store): Adjust.
2130 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2131 Jim Wilson <jimw@sifive.com>
2133 * config/riscv/riscv-protos.h (riscv_output_return): New.
2134 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2135 (riscv_attribute_table, riscv_output_return),
2136 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2137 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2138 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2140 (riscv_expand_prologue): Add early return for naked function.
2141 (riscv_expand_epilogue): Likewise.
2142 (riscv_function_ok_for_sibcall): Return false for naked function.
2143 (riscv_set_current_function): New.
2144 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2145 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2146 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2147 * doc/extend.texi (RISC-V Function Attributes): New.
2149 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2151 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2152 check for 128-bit long double before checking TCmode.
2153 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2154 128-bit long doubles before checking TFmode or TCmode.
2155 (FLOAT128_IBM_P): Likewise.
2157 2018-01-10 Martin Sebor <msebor@redhat.com>
2159 PR tree-optimization/83671
2160 * builtins.c (c_strlen): Unconditionally return zero for the empty
2162 Use -Warray-bounds for warnings.
2163 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2164 for non-constant array indices with COMPONENT_REF, arrays of
2165 arrays, and pointers to arrays.
2166 (gimple_fold_builtin_strlen): Determine and set length range for
2167 non-constant character arrays.
2169 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2172 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2175 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2177 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2179 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2182 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2183 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2184 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2185 indexed_or_indirect_operand predicate.
2186 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2187 (*vsx_le_perm_load_v8hi): Likewise.
2188 (*vsx_le_perm_load_v16qi): Likewise.
2189 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2190 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2191 (*vsx_le_perm_store_v8hi): Likewise.
2192 (*vsx_le_perm_store_v16qi): Likewise.
2193 (eight unnamed splitters): Likewise.
2195 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2197 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2198 * config/rs6000/emmintrin.h: Likewise.
2199 * config/rs6000/mmintrin.h: Likewise.
2200 * config/rs6000/xmmintrin.h: Likewise.
2202 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2205 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2207 * tree.c (tree_nop_conversion): Return true for location wrapper
2209 (maybe_wrap_with_location): New function.
2210 (selftest::check_strip_nops): New function.
2211 (selftest::test_location_wrappers): New function.
2212 (selftest::tree_c_tests): Call it.
2213 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2214 (maybe_wrap_with_location): New decl.
2215 (EXPR_LOCATION_WRAPPER_P): New macro.
2216 (location_wrapper_p): New inline function.
2217 (tree_strip_any_location_wrapper): New inline function.
2219 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2222 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2223 stack_realign_offset for the largest alignment of stack slot
2225 (ix86_find_max_used_stack_alignment): New function.
2226 (ix86_finalize_stack_frame_flags): Use it. Set
2227 max_used_stack_alignment if we don't realign stack.
2228 * config/i386/i386.h (machine_function): Add
2229 max_used_stack_alignment.
2231 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2233 * config/arm/arm.opt (-mbranch-cost): New option.
2234 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2237 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2240 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2241 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2243 2018-01-10 Richard Biener <rguenther@suse.de>
2246 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2247 early out so it also covers the case where we have a non-NULL
2250 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2252 PR tree-optimization/83753
2253 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2254 for non-strided grouped accesses if the number of elements is 1.
2256 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2259 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2260 * i386.h (TARGET_USE_GATHER): Define.
2261 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2263 2018-01-10 Martin Liska <mliska@suse.cz>
2266 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2267 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2269 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2270 CLEANUP_NO_PARTITIONING is not set.
2272 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2274 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2275 for vectors, as a partial revert of r254296.
2276 * rtl.h (const_vec_p): Delete.
2277 (const_vec_duplicate_p): Don't test for vector CONSTs.
2278 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2279 * expmed.c (make_tree): Likewise.
2282 * common.md (E, F): Use CONSTANT_P instead of checking for
2284 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2285 checking for CONST_VECTOR.
2287 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2290 * predict.c (force_edge_cold): Handle in more sane way edges
2293 2018-01-09 Carl Love <cel@us.ibm.com>
2295 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2297 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2298 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2299 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2300 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2301 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2302 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2303 * config/rs6000/rs6000-protos.h: Add extern defition for
2304 rs6000_generate_float2_double_code.
2305 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2307 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2308 (float2_v2df): Add define_expand.
2310 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2313 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2314 op_mode in the force_to_mode call.
2316 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2318 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2319 instead of checking each element individually.
2320 (aarch64_evpc_uzp): Likewise.
2321 (aarch64_evpc_zip): Likewise.
2322 (aarch64_evpc_ext): Likewise.
2323 (aarch64_evpc_rev): Likewise.
2324 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2325 instead of checking each element individually. Return true without
2327 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2328 whether all selected elements come from the same input, instead of
2329 checking each element individually. Remove calls to gen_rtx_REG,
2330 start_sequence and end_sequence and instead assert that no rtl is
2333 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2335 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2336 order of HIGH and CONST checks.
2338 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2340 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2341 if the destination isn't an SSA_NAME.
2343 2018-01-09 Richard Biener <rguenther@suse.de>
2345 PR tree-optimization/83668
2346 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2348 (canonicalize_loop_form): ... here, renamed from ...
2349 (canonicalize_loop_closed_ssa_form): ... this and amended to
2350 swap successor edges for loop exit blocks to make us use
2351 the RPO order we need for initial schedule generation.
2353 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2355 PR tree-optimization/64811
2356 * match.pd: When optimizing comparisons with Inf, avoid
2357 introducing or losing exceptions from comparisons with NaN.
2359 2018-01-09 Martin Liska <mliska@suse.cz>
2362 * asan.c (shadow_mem_size): Add gcc_assert.
2364 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2366 Don't save registers in main().
2369 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2370 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2371 * config/avr/avr.c (avr_set_current_function): Don't error if
2372 naked, OS_task or OS_main are specified at the same time.
2373 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2375 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2377 * common/config/avr/avr-common.c (avr_option_optimization_table):
2378 Switch on -mmain-is-OS_task for optimizing compilations.
2380 2018-01-09 Richard Biener <rguenther@suse.de>
2382 PR tree-optimization/83572
2383 * graphite.c: Include cfganal.h.
2384 (graphite_transform_loops): Connect infinite loops to exit
2385 and remove fake edges at the end.
2387 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2389 * ipa-inline.c (edge_badness): Revert accidental checkin.
2391 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2394 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2395 symbols; not inline clones.
2397 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2400 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2401 hard registers. Formatting fixes.
2403 PR preprocessor/83722
2404 * gcc.c (try_generate_repro): Pass
2405 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2406 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2409 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2410 Kito Cheng <kito.cheng@gmail.com>
2412 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2413 (riscv_leaf_function_p): Delete.
2414 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2416 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2418 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2420 (do_ifelse): New function.
2421 (do_isel): New function.
2422 (do_sub3): New function.
2423 (do_add3): New function.
2424 (do_load_mask_compare): New function.
2425 (do_overlap_load_compare): New function.
2426 (expand_compare_loop): New function.
2427 (expand_block_compare): Call expand_compare_loop() when appropriate.
2428 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2430 (-mblock-compare-inline-loop-limit): New option.
2432 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2435 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2436 Reverse order of second and third operands in first alternative.
2437 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2438 of first and second elements in UNSPEC_VPERMR vector.
2439 (altivec_expand_vec_perm_le): Likewise.
2441 2017-01-08 Jeff Law <law@redhat.com>
2443 PR rtl-optimizatin/81308
2444 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2445 (process_switch): If group_case_labels makes a change, then set
2447 (pass_convert_switch::execute): If a switch is converted, then
2448 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2450 PR rtl-optimization/81308
2451 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2454 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2456 PR target/83663 - Revert r255946
2457 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2458 generation for cases where splatting a value is not useful.
2459 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2460 across a vec_duplicate and a paradoxical subreg forming a vector
2461 mode to a vec_concat.
2463 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2465 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2466 -march=armv8.3-a variants.
2467 * config/arm/t-multilib: Likewise.
2468 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2470 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2472 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2474 (cceq_ior_compare_complement): Give it a name so I can use it, and
2475 change boolean_or_operator predicate to boolean_operator so it can
2476 be used to generate a crand.
2477 (eqne): New code iterator.
2478 (bd/bd_neg): New code_attrs.
2479 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2480 a single define_insn.
2481 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2482 decrement (bdnzt/bdnzf/bdzt/bdzf).
2483 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2484 with the new names of the branch decrement patterns, and added the
2485 names of the branch decrement conditional patterns.
2487 2018-01-08 Richard Biener <rguenther@suse.de>
2489 PR tree-optimization/83563
2490 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2493 2018-01-08 Richard Biener <rguenther@suse.de>
2496 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2498 2018-01-08 Richard Biener <rguenther@suse.de>
2500 PR tree-optimization/83685
2501 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2502 references to abnormals.
2504 2018-01-08 Richard Biener <rguenther@suse.de>
2507 * dwarf2out.c (output_indirect_strings): Handle empty
2508 skeleton_debug_str_hash.
2509 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2511 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2513 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2514 (emit_store_direct): Likewise.
2515 (arc_trampoline_adjust_address): Likewise.
2516 (arc_asm_trampoline_template): New function.
2517 (arc_initialize_trampoline): Use asm_trampoline_template.
2518 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2519 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2520 * config/arc/arc.md (flush_icache): Delete pattern.
2522 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2524 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2525 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2528 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2531 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2532 by not USED_FOR_TARGET.
2533 (make_pass_resolve_sw_modes): Likewise.
2535 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2537 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2540 2018-01-08 Richard Biener <rguenther@suse.de>
2543 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2545 2018-01-08 Richard Biener <rguenther@suse.de>
2548 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2550 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2553 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2554 basic blocks with a small number of successors.
2555 (convert_control_dep_chain_into_preds): Improve handling of
2557 (dump_predicates): Split apart into...
2558 (dump_pred_chain): ...here...
2559 (dump_pred_info): ...and here.
2560 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2561 (can_chain_union_be_invalidated_p): Improve check for invalidation
2563 (uninit_uses_cannot_happen): Avoid unnecessary if
2564 convert_control_dep_chain_into_preds yielded nothing.
2566 2018-01-06 Martin Sebor <msebor@redhat.com>
2568 PR tree-optimization/83640
2569 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2570 subtracting negative offset from size.
2571 (builtin_access::overlap): Adjust offset bounds of the access to fall
2572 within the size of the object if possible.
2574 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2576 PR rtl-optimization/83699
2577 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2578 extract_bit_field_as_subreg to cases in which the extracted
2579 value is also a vector.
2581 * lra-constraints.c (process_alt_operands): Test for the equivalence
2582 substitutions when detecting a possible reload cycle.
2584 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2587 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2588 by default if flag_selective_schedling{,2}. Formatting fixes.
2590 PR rtl-optimization/83682
2591 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2592 if it has non-VECTOR_MODE element mode.
2593 (vec_duplicate_p): Likewise.
2596 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2597 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2599 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2602 * config/i386/i386-builtin.def
2603 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2604 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2605 Require also OPTION_MASK_ISA_AVX512F in addition to
2606 OPTION_MASK_ISA_GFNI.
2607 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2608 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2609 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2610 to OPTION_MASK_ISA_GFNI.
2611 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2612 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2613 OPTION_MASK_ISA_AVX512BW.
2614 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2615 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2616 addition to OPTION_MASK_ISA_GFNI.
2617 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2618 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2619 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2620 to OPTION_MASK_ISA_GFNI.
2621 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2622 a requirement for all ISAs rather than any of them with a few
2624 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2626 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2627 bitmasks to be enabled with 3 exceptions, instead of requiring any
2628 enabled ISA with lots of exceptions.
2629 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2630 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2631 Change avx512bw in isa attribute to avx512f.
2632 * config/i386/sgxintrin.h: Add license boilerplate.
2633 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2634 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2635 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2636 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2638 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2639 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2640 temporarily sse2 rather than sse if not enabled already.
2643 * config/i386/sse.md (VI248_VLBW): Rename to ...
2644 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2645 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2646 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2647 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2648 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2649 mode iterator instead of VI248_VLBW.
2651 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2653 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2654 (record_modified): Skip clobbers; add debug output.
2655 (param_change_prob): Use sreal frequencies.
2657 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2659 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2660 punt for user-aligned variables.
2662 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2664 * tree-chrec.c (chrec_contains_symbols): Return true for
2667 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2670 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2671 of (x|y) == x for BICS pattern.
2673 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2675 PR tree-optimization/83605
2676 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2677 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2680 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2682 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2683 * config/epiphany/rtems.h: New file.
2685 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2686 Uros Bizjak <ubizjak@gmail.com>
2689 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2690 QIreg_operand instead of register_operand predicate.
2691 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2692 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2693 comments instead of -fmitigate[-_]rop.
2695 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2698 * cgraphunit.c (symbol_table::compile): Switch to text_section
2699 before calling assembly_start debug hook.
2700 * run-rtl-passes.c (run_rtl_passes): Likewise.
2703 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2705 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2706 range_int_cst_p rather than !symbolic_range_p before calling
2707 extract_range_from_multiplicative_op_1.
2709 2017-01-04 Jeff Law <law@redhat.com>
2711 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2712 redundant test in assertion.
2714 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2716 * doc/rtl.texi: Document machine_mode wrapper classes.
2718 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2720 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2723 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2725 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2726 the VEC_PERM_EXPR fold to fail.
2728 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2731 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2732 to switched_sections.
2734 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2737 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2740 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2743 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2744 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2746 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2749 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2750 is BLKmode and bitpos not zero or mode change is needed.
2752 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2755 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2758 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2761 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2762 instead of MULT rtx. Update all corresponding splitters.
2764 (*ssub<modesuffix>): Ditto.
2766 (*cmp_sadd_di): Update split patterns.
2767 (*cmp_sadd_si): Ditto.
2768 (*cmp_sadd_sidi): Ditto.
2769 (*cmp_ssub_di): Ditto.
2770 (*cmp_ssub_si): Ditto.
2771 (*cmp_ssub_sidi): Ditto.
2772 * config/alpha/predicates.md (const23_operand): New predicate.
2773 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2774 Look for ASHIFT, not MULT inner operand.
2775 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2777 2018-01-04 Martin Liska <mliska@suse.cz>
2779 PR gcov-profile/83669
2780 * gcov.c (output_intermediate_file): Add version to intermediate
2782 * doc/gcov.texi: Document new field 'version' in intermediate
2783 file format. Fix location of '-k' option of gcov command.
2785 2018-01-04 Martin Liska <mliska@suse.cz>
2788 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2790 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2792 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2794 2018-01-03 Martin Sebor <msebor@redhat.com>
2796 PR tree-optimization/83655
2797 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2798 checking calls with invalid arguments.
2800 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2802 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2803 (vectorizable_mask_load_store): Delete.
2804 (vectorizable_call): Return false for masked loads and stores.
2805 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2806 instead of gimple_assign_rhs1.
2807 (vectorizable_load): Handle IFN_MASK_LOAD.
2808 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2810 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2812 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2814 (vectorizable_mask_load_store): ...here.
2815 (vectorizable_load): ...and here.
2817 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2819 * tree-vect-stmts.c (vect_build_all_ones_mask)
2820 (vect_build_zero_merge_argument): New functions, split out from...
2821 (vectorizable_load): ...here.
2823 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2825 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2827 (vectorizable_mask_load_store): ...here.
2828 (vectorizable_store): ...and here.
2830 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2832 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2834 (vectorizable_mask_load_store): ...here.
2836 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2838 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2839 (vect_model_store_cost): Take a vec_load_store_type instead of a
2841 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2842 (vect_model_store_cost): Take a vec_load_store_type instead of a
2844 (vectorizable_mask_load_store): Update accordingly.
2845 (vectorizable_store): Likewise.
2846 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2848 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2850 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2851 IFN_MASK_LOAD calls here rather than...
2852 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2854 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2855 Alan Hayward <alan.hayward@arm.com>
2856 David Sherwood <david.sherwood@arm.com>
2858 * expmed.c (extract_bit_field_1): For vector extracts,
2859 fall back to extract_bit_field_as_subreg if vec_extract
2862 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2863 Alan Hayward <alan.hayward@arm.com>
2864 David Sherwood <david.sherwood@arm.com>
2866 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2867 they are variable or constant sized.
2868 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2869 slots for constant-sized data.
2871 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2872 Alan Hayward <alan.hayward@arm.com>
2873 David Sherwood <david.sherwood@arm.com>
2875 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2876 handling COND_EXPRs with boolean comparisons, try to find a better
2877 basis for the mask type than the boolean itself.
2879 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2881 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2882 is calculated and how it can be overridden.
2883 * genmodes.c (max_bitsize_mode_any_mode): New variable.
2884 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2886 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2889 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2890 Alan Hayward <alan.hayward@arm.com>
2891 David Sherwood <david.sherwood@arm.com>
2893 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2894 Remove the mode argument.
2895 (aarch64_simd_valid_immediate): Remove the mode and inverse
2897 * config/aarch64/iterators.md (bitsize): New iterator.
2898 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2899 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2900 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2901 aarch64_simd_valid_immediate.
2902 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2903 (aarch64_reg_or_bic_imm): Likewise.
2904 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2905 with an insn_type enum and msl with a modifier_type enum.
2906 Replace element_width with a scalar_mode. Change the shift
2907 to unsigned int. Add constructors for scalar_float_mode and
2908 scalar_int_mode elements.
2909 (aarch64_vect_float_const_representable_p): Delete.
2910 (aarch64_can_const_movi_rtx_p)
2911 (aarch64_simd_scalar_immediate_valid_for_move)
2912 (aarch64_simd_make_constant): Update call to
2913 aarch64_simd_valid_immediate.
2914 (aarch64_advsimd_valid_immediate_hs): New function.
2915 (aarch64_advsimd_valid_immediate): Likewise.
2916 (aarch64_simd_valid_immediate): Remove mode and inverse
2917 arguments. Rewrite to use the above. Use const_vec_duplicate_p
2918 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2919 and aarch64_float_const_representable_p on the result.
2920 (aarch64_output_simd_mov_immediate): Remove mode argument.
2921 Update call to aarch64_simd_valid_immediate and use of
2922 simd_immediate_info.
2923 (aarch64_output_scalar_simd_mov_immediate): Update call
2926 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2927 Alan Hayward <alan.hayward@arm.com>
2928 David Sherwood <david.sherwood@arm.com>
2930 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2931 (mode_nunits): Likewise CONST_MODE_NUNITS.
2932 * machmode.def (ADJUST_NUNITS): Document.
2933 * genmodes.c (mode_data::need_nunits_adj): New field.
2934 (blank_mode): Update accordingly.
2935 (adj_nunits): New variable.
2936 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2938 (emit_mode_size_inline): Set need_bytesize_adj for all modes
2939 listed in adj_nunits.
2940 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2941 listed in adj_nunits. Don't emit case statements for such modes.
2942 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2943 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
2944 nothing if adj_nunits is nonnull.
2945 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2946 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2947 (emit_mode_fbit): Update use of print_maybe_const_decl.
2948 (emit_move_size): Likewise. Treat the array as non-const
2950 (emit_mode_adjustments): Handle adj_nunits.
2952 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2954 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2955 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2956 (VECTOR_MODES): Use it.
2957 (make_vector_modes): Take the prefix as an argument.
2959 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2960 Alan Hayward <alan.hayward@arm.com>
2961 David Sherwood <david.sherwood@arm.com>
2963 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2964 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2965 for MODE_VECTOR_BOOL.
2966 * machmode.def (VECTOR_BOOL_MODE): Document.
2967 * genmodes.c (VECTOR_BOOL_MODE): New macro.
2968 (make_vector_bool_mode): New function.
2969 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2971 * lto-streamer-in.c (lto_input_mode_table): Likewise.
2972 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2974 * stor-layout.c (int_mode_for_mode): Likewise.
2975 * tree.c (build_vector_type_for_mode): Likewise.
2976 * varasm.c (output_constant_pool_2): Likewise.
2977 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2978 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
2979 for MODE_VECTOR_BOOL.
2980 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2981 of mode class checks.
2982 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2983 instead of a list of mode class checks.
2984 (expand_vector_scalar_condition): Likewise.
2985 (type_for_widest_vector_mode): Handle BImode as an inner mode.
2987 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2988 Alan Hayward <alan.hayward@arm.com>
2989 David Sherwood <david.sherwood@arm.com>
2991 * machmode.h (mode_size): Change from unsigned short to
2993 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2994 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2995 or if measurement_type is not polynomial.
2996 (fixed_size_mode::includes_p): Check for constant-sized modes.
2997 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2998 return a poly_uint16 rather than an unsigned short.
2999 (emit_mode_size): Change the type of mode_size from unsigned short
3000 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3001 (emit_mode_adjustments): Cope with polynomial vector sizes.
3002 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3004 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3006 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3007 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3008 * caller-save.c (setup_save_areas): Likewise.
3009 (replace_reg_with_saved_mem): Likewise.
3010 * calls.c (emit_library_call_value_1): Likewise.
3011 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3012 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3013 (gen_lowpart_for_combine): Likewise.
3014 * convert.c (convert_to_integer_1): Likewise.
3015 * cse.c (equiv_constant, cse_insn): Likewise.
3016 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3017 (cselib_subst_to_values): Likewise.
3018 * dce.c (word_dce_process_block): Likewise.
3019 * df-problems.c (df_word_lr_mark_ref): Likewise.
3020 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3021 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3022 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3023 (rtl_for_decl_location): Likewise.
3024 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3025 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3026 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3027 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3028 (expand_expr_real_1): Likewise.
3029 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3030 (pad_below): Likewise.
3031 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3032 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3033 * ira.c (get_subreg_tracking_sizes): Likewise.
3034 * ira-build.c (ira_create_allocno_objects): Likewise.
3035 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3036 (ira_sort_regnos_for_alter_reg): Likewise.
3037 * ira-costs.c (record_operand_costs): Likewise.
3038 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3039 (resolve_simple_move): Likewise.
3040 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3041 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3042 (lra_constraints): Likewise.
3043 (CONST_POOL_OK_P): Reject variable-sized modes.
3044 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3045 (add_pseudo_to_slot, lra_spill): Likewise.
3046 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3047 * optabs-query.c (get_best_extraction_insn): Likewise.
3048 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3049 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3050 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3051 * recog.c (offsettable_address_addr_space_p): Likewise.
3052 * regcprop.c (maybe_mode_change): Likewise.
3053 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3054 * regrename.c (build_def_use): Likewise.
3055 * regstat.c (dump_reg_info): Likewise.
3056 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3057 (find_reloads, find_reloads_subreg_address): Likewise.
3058 * reload1.c (eliminate_regs_1): Likewise.
3059 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3060 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3061 (simplify_binary_operation_1, simplify_subreg): Likewise.
3062 * targhooks.c (default_function_arg_padding): Likewise.
3063 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3064 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3065 (verify_gimple_assign_ternary): Likewise.
3066 * tree-inline.c (estimate_move_cost): Likewise.
3067 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3068 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3069 (get_address_cost_ainc): Likewise.
3070 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3071 (vect_supportable_dr_alignment): Likewise.
3072 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3073 (vectorizable_reduction): Likewise.
3074 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3075 (vectorizable_operation, vectorizable_load): Likewise.
3076 * tree.c (build_same_sized_truth_vector_type): Likewise.
3077 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3078 * var-tracking.c (emit_note_insn_var_location): Likewise.
3079 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3080 (ADDR_VEC_ALIGN): Likewise.
3082 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3083 Alan Hayward <alan.hayward@arm.com>
3084 David Sherwood <david.sherwood@arm.com>
3086 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3088 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3089 or if measurement_type is polynomial.
3090 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3091 * combine.c (make_extraction): Likewise.
3092 * dse.c (find_shift_sequence): Likewise.
3093 * dwarf2out.c (mem_loc_descriptor): Likewise.
3094 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3095 (extract_bit_field, extract_low_bits): Likewise.
3096 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3097 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3098 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3099 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3100 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3101 * reload.c (find_reloads): Likewise.
3102 * reload1.c (alter_reg): Likewise.
3103 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3104 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3105 * tree-if-conv.c (predicate_mem_writes): Likewise.
3106 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3107 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3108 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3109 * valtrack.c (dead_debug_insert_temp): Likewise.
3110 * varasm.c (mergeable_constant_section): Likewise.
3111 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3113 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3114 Alan Hayward <alan.hayward@arm.com>
3115 David Sherwood <david.sherwood@arm.com>
3117 * expr.c (expand_assignment): Cope with polynomial mode sizes
3118 when assigning to a CONCAT.
3120 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3121 Alan Hayward <alan.hayward@arm.com>
3122 David Sherwood <david.sherwood@arm.com>
3124 * machmode.h (mode_precision): Change from unsigned short to
3126 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3128 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3129 or if measurement_type is not polynomial.
3130 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3131 in which the mode is already known to be a scalar_int_mode.
3132 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3133 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3135 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3136 for GET_MODE_PRECISION.
3137 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3138 for GET_MODE_PRECISION.
3139 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3141 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3142 (expand_field_assignment, make_extraction): Likewise.
3143 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3144 (get_last_value): Likewise.
3145 * convert.c (convert_to_integer_1): Likewise.
3146 * cse.c (cse_insn): Likewise.
3147 * expr.c (expand_expr_real_1): Likewise.
3148 * lra-constraints.c (simplify_operand_subreg): Likewise.
3149 * optabs-query.c (can_atomic_load_p): Likewise.
3150 * optabs.c (expand_atomic_load): Likewise.
3151 (expand_atomic_store): Likewise.
3152 * ree.c (combine_reaching_defs): Likewise.
3153 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3154 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3155 * tree.h (type_has_mode_precision_p): Likewise.
3156 * ubsan.c (instrument_si_overflow): Likewise.
3158 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3159 Alan Hayward <alan.hayward@arm.com>
3160 David Sherwood <david.sherwood@arm.com>
3162 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3163 polynomial numbers of units.
3164 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3165 (valid_vector_subparts_p): New function.
3166 (build_vector_type): Remove temporary shim and take the number
3167 of units as a poly_uint64 rather than an int.
3168 (build_opaque_vector_type): Take the number of units as a
3169 poly_uint64 rather than an int.
3170 * tree.c (build_vector_from_ctor): Handle polynomial
3171 TYPE_VECTOR_SUBPARTS.
3172 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3173 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3174 (build_vector_from_val): If the number of units is variable,
3175 use build_vec_duplicate_cst for constant operands and
3176 VEC_DUPLICATE_EXPR otherwise.
3177 (make_vector_type): Remove temporary is_constant ().
3178 (build_vector_type, build_opaque_vector_type): Take the number of
3179 units as a poly_uint64 rather than an int.
3180 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3182 * cfgexpand.c (expand_debug_expr): Likewise.
3183 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3184 (store_constructor, expand_expr_real_1): Likewise.
3185 (const_scalar_mask_from_tree): Likewise.
3186 * fold-const-call.c (fold_const_reduction): Likewise.
3187 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3188 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3189 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3190 (fold_relational_const): Likewise.
3191 (native_interpret_vector): Likewise. Change the size from an
3192 int to an unsigned int.
3193 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3194 TYPE_VECTOR_SUBPARTS.
3195 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3196 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3197 duplicating a non-constant operand into a variable-length vector.
3198 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3199 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3200 * ipa-icf.c (sem_variable::equals): Likewise.
3201 * match.pd: Likewise.
3202 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3203 * print-tree.c (print_node): Likewise.
3204 * stor-layout.c (layout_type): Likewise.
3205 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3206 * tree-cfg.c (verify_gimple_comparison): Likewise.
3207 (verify_gimple_assign_binary): Likewise.
3208 (verify_gimple_assign_ternary): Likewise.
3209 (verify_gimple_assign_single): Likewise.
3210 * tree-pretty-print.c (dump_generic_node): Likewise.
3211 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3212 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3213 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3214 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3215 (vect_shift_permute_load_chain): Likewise.
3216 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3217 (expand_vector_condition, optimize_vector_constructor): Likewise.
3218 (lower_vec_perm, get_compute_type): Likewise.
3219 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3220 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3221 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3222 (vect_recog_mask_conversion_pattern): Likewise.
3223 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3224 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3225 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3226 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3227 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3228 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3229 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3230 (supportable_widening_operation): Likewise.
3231 (supportable_narrowing_operation): Likewise.
3232 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3234 * varasm.c (output_constant): Likewise.
3236 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3237 Alan Hayward <alan.hayward@arm.com>
3238 David Sherwood <david.sherwood@arm.com>
3240 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3241 so that both the length == 3 and length != 3 cases set up their
3242 own permute vectors. Add comments explaining why we know the
3243 number of elements is constant.
3244 (vect_permute_load_chain): Likewise.
3246 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3247 Alan Hayward <alan.hayward@arm.com>
3248 David Sherwood <david.sherwood@arm.com>
3250 * machmode.h (mode_nunits): Change from unsigned char to
3252 (ONLY_FIXED_SIZE_MODES): New macro.
3253 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3254 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3255 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3257 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3258 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3259 or if measurement_type is not polynomial.
3260 * genmodes.c (ZERO_COEFFS): New macro.
3261 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3263 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3264 Use ZERO_COEFFS when emitting initializers.
3265 * data-streamer.h (bp_pack_poly_value): New function.
3266 (bp_unpack_poly_value): Likewise.
3267 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3268 for GET_MODE_NUNITS.
3269 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3270 for GET_MODE_NUNITS.
3271 * tree.c (make_vector_type): Remove temporary shim and make
3272 the real function take the number of units as a poly_uint64
3274 (build_vector_type_for_mode): Handle polynomial nunits.
3275 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3276 * emit-rtl.c (const_vec_series_p_1): Likewise.
3277 (gen_rtx_CONST_VECTOR): Likewise.
3278 * fold-const.c (test_vec_duplicate_folding): Likewise.
3279 * genrecog.c (validate_pattern): Likewise.
3280 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3281 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3282 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3283 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3284 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3285 * rtlanal.c (subreg_get_info): Likewise.
3286 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3287 (vect_grouped_load_supported): Likewise.
3288 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3289 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3290 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3291 (simplify_const_unary_operation, simplify_binary_operation_1)
3292 (simplify_const_binary_operation, simplify_ternary_operation)
3293 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3294 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3295 instead of CONST_VECTOR_NUNITS.
3296 * varasm.c (output_constant_pool_2): Likewise.
3297 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3298 explicit-encoded elements in the XVEC for variable-length vectors.
3300 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3302 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3304 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3305 Alan Hayward <alan.hayward@arm.com>
3306 David Sherwood <david.sherwood@arm.com>
3308 * coretypes.h (fixed_size_mode): Declare.
3309 (fixed_size_mode_pod): New typedef.
3310 * builtins.h (target_builtins::x_apply_args_mode)
3311 (target_builtins::x_apply_result_mode): Change type to
3312 fixed_size_mode_pod.
3313 * builtins.c (apply_args_size, apply_result_size, result_vector)
3314 (expand_builtin_apply_args_1, expand_builtin_apply)
3315 (expand_builtin_return): Update accordingly.
3317 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3319 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3320 * cselib.c (cselib_hash_rtx): Likewise.
3321 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3322 CONST_VECTOR encoding.
3324 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3325 Jeff Law <law@redhat.com>
3328 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3329 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3330 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3331 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3334 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3335 explicitly probe *sp in a noreturn function if there were any callee
3336 register saves or frame pointer is needed.
3338 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3341 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3342 BLKmode for ternary, binary or unary expressions.
3345 * var-tracking.c (delete_vta_debug_insn): New inline function.
3346 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3347 insns from get_insns () to NULL instead of each bb separately.
3348 Use delete_vta_debug_insn. No longer static.
3349 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3350 delete_vta_debug_insns callers.
3351 * rtl.h (delete_vta_debug_insns): Declare.
3352 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3353 instead of variable_tracking_main.
3355 2018-01-03 Martin Sebor <msebor@redhat.com>
3357 PR tree-optimization/83603
3358 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3359 arguments past the endof the argument list in functions declared
3360 without a prototype.
3361 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3362 Avoid checking when arguments are null.
3364 2018-01-03 Martin Sebor <msebor@redhat.com>
3367 * doc/extend.texi (attribute const): Fix a typo.
3368 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3369 issuing -Wsuggest-attribute for void functions.
3371 2018-01-03 Martin Sebor <msebor@redhat.com>
3373 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3374 offset_int::from instead of wide_int::to_shwi.
3375 (maybe_diag_overlap): Remove assertion.
3376 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3377 * gimple-ssa-sprintf.c (format_directive): Same.
3378 (parse_directive): Same.
3379 (sprintf_dom_walker::compute_format_length): Same.
3380 (try_substitute_return_value): Same.
3382 2017-01-03 Jeff Law <law@redhat.com>
3385 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3386 non-constant residual for zero at runtime and avoid probing in
3387 that case. Reorganize code for trailing problem to mirror handling
3390 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3392 PR tree-optimization/83501
3393 * tree-ssa-strlen.c (get_string_cst): New.
3394 (handle_char_store): Call get_string_cst.
3396 2018-01-03 Martin Liska <mliska@suse.cz>
3398 PR tree-optimization/83593
3399 * tree-ssa-strlen.c: Include tree-cfg.h.
3400 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3401 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3402 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3404 (strlen_dom_walker::before_dom_children): Call
3405 gimple_purge_dead_eh_edges. Dump tranformation with details
3407 (strlen_dom_walker::before_dom_children): Update call by adding
3408 new argument cleanup_eh.
3409 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3411 2018-01-03 Martin Liska <mliska@suse.cz>
3414 * cif-code.def (VARIADIC_THUNK): New enum value.
3415 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3418 2018-01-03 Jan Beulich <jbeulich@suse.com>
3420 * sse.md (mov<mode>_internal): Tighten condition for when to use
3421 vmovdqu<ssescalarsize> for TI and OI modes.
3423 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3425 Update copyright years.
3427 2018-01-03 Martin Liska <mliska@suse.cz>
3430 * ipa-visibility.c (function_and_variable_visibility): Skip
3431 functions with noipa attribure.
3433 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3435 * gcc.c (process_command): Update copyright notice dates.
3436 * gcov-dump.c (print_version): Ditto.
3437 * gcov.c (print_version): Ditto.
3438 * gcov-tool.c (print_version): Ditto.
3439 * gengtype.c (create_file): Ditto.
3440 * doc/cpp.texi: Bump @copying's copyright year.
3441 * doc/cppinternals.texi: Ditto.
3442 * doc/gcc.texi: Ditto.
3443 * doc/gccint.texi: Ditto.
3444 * doc/gcov.texi: Ditto.
3445 * doc/install.texi: Ditto.
3446 * doc/invoke.texi: Ditto.
3448 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3450 * vector-builder.h (vector_builder::m_full_nelts): Change from
3451 unsigned int to poly_uint64.
3452 (vector_builder::full_nelts): Update prototype accordingly.
3453 (vector_builder::new_vector): Likewise.
3454 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3455 (vector_builder::operator ==): Likewise.
3456 (vector_builder::finalize): Likewise.
3457 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3458 Take the number of elements as a poly_uint64 rather than an
3460 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3461 from unsigned int to poly_uint64.
3462 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3463 (vec_perm_indices::new_vector): Likewise.
3464 (vec_perm_indices::length): Likewise.
3465 (vec_perm_indices::nelts_per_input): Likewise.
3466 (vec_perm_indices::input_nelts): Likewise.
3467 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3468 number of elements per input as a poly_uint64 rather than an
3469 unsigned int. Use the original encoding for variable-length
3470 vectors, rather than clamping each individual element.
3471 For the second and subsequent elements in each pattern,
3472 clamp the step and base before clamping their sum.
3473 (vec_perm_indices::series_p): Handle polynomial element counts.
3474 (vec_perm_indices::all_in_range_p): Likewise.
3475 (vec_perm_indices_to_tree): Likewise.
3476 (vec_perm_indices_to_rtx): Likewise.
3477 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3478 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3479 (tree_vector_builder::new_binary_operation): Handle polynomial
3480 element counts. Return false if we need to know the number
3481 of elements at compile time.
3482 * fold-const.c (fold_vec_perm): Punt if the number of elements
3483 isn't known at compile time.
3485 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3487 * vec-perm-indices.h (vec_perm_builder): Change element type
3488 from HOST_WIDE_INT to poly_int64.
3489 (vec_perm_indices::element_type): Update accordingly.
3490 (vec_perm_indices::clamp): Handle polynomial element_types.
3491 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3492 (vec_perm_indices::all_in_range_p): Likewise.
3493 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3495 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3496 polynomial vec_perm_indices element types.
3497 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3498 * fold-const.c (fold_vec_perm): Likewise.
3499 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3500 * tree-vect-generic.c (lower_vec_perm): Likewise.
3501 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3502 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3503 element type to HOST_WIDE_INT.
3505 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3506 Alan Hayward <alan.hayward@arm.com>
3507 David Sherwood <david.sherwood@arm.com>
3509 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3510 rather than an int. Use plus_constant.
3511 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3512 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3514 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3515 Alan Hayward <alan.hayward@arm.com>
3516 David Sherwood <david.sherwood@arm.com>
3518 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3519 a HOST_WIDE_INT to a poly_int64.
3521 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3522 Alan Hayward <alan.hayward@arm.com>
3523 David Sherwood <david.sherwood@arm.com>
3525 * calls.c (load_register_parameters): Cope with polynomial
3526 mode sizes. Require a constant size for BLKmode parameters
3527 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3528 forces a parameter to be padded at the lsb end in order to
3529 fill a complete number of words, require the parameter size
3530 to be ordered wrt UNITS_PER_WORD.
3532 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3533 Alan Hayward <alan.hayward@arm.com>
3534 David Sherwood <david.sherwood@arm.com>
3536 * reload1.c (spill_stack_slot_width): Change element type
3537 from unsigned int to poly_uint64_pod.
3538 (alter_reg): Treat mode sizes as polynomial.
3540 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3541 Alan Hayward <alan.hayward@arm.com>
3542 David Sherwood <david.sherwood@arm.com>
3544 * reload.c (complex_word_subreg_p): New function.
3545 (reload_inner_reg_of_subreg, push_reload): Use it.
3547 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3548 Alan Hayward <alan.hayward@arm.com>
3549 David Sherwood <david.sherwood@arm.com>
3551 * lra-constraints.c (process_alt_operands): Reject matched
3552 operands whose sizes aren't ordered.
3553 (match_reload): Refer to this check here.
3555 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3556 Alan Hayward <alan.hayward@arm.com>
3557 David Sherwood <david.sherwood@arm.com>
3559 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3560 that the mode size is in the set {1, 2, 4, 8, 16}.
3562 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3563 Alan Hayward <alan.hayward@arm.com>
3564 David Sherwood <david.sherwood@arm.com>
3566 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3567 Use plus_constant instead of gen_rtx_PLUS.
3569 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3570 Alan Hayward <alan.hayward@arm.com>
3571 David Sherwood <david.sherwood@arm.com>
3573 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3574 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3575 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3576 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3577 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3578 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3579 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3580 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3581 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3582 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3584 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3585 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3586 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3587 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3588 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3589 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3590 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3591 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3592 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3593 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3595 * expr.c (emit_move_resolve_push): Treat the input and result
3596 of PUSH_ROUNDING as a poly_int64.
3597 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3598 (emit_push_insn): Likewise.
3599 * lra-eliminations.c (mark_not_eliminable): Likewise.
3600 * recog.c (push_operand): Likewise.
3601 * reload1.c (elimination_effects): Likewise.
3602 * rtlanal.c (nonzero_bits1): Likewise.
3603 * calls.c (store_one_arg): Likewise. Require the padding to be
3604 known at compile time.
3606 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3607 Alan Hayward <alan.hayward@arm.com>
3608 David Sherwood <david.sherwood@arm.com>
3610 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3611 Use plus_constant instead of gen_rtx_PLUS.
3613 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3614 Alan Hayward <alan.hayward@arm.com>
3615 David Sherwood <david.sherwood@arm.com>
3617 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3620 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3621 Alan Hayward <alan.hayward@arm.com>
3622 David Sherwood <david.sherwood@arm.com>
3624 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3625 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3626 via stack temporaries. Treat the mode size as polynomial too.
3628 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3629 Alan Hayward <alan.hayward@arm.com>
3630 David Sherwood <david.sherwood@arm.com>
3632 * expr.c (expand_expr_real_2): When handling conversions involving
3633 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3634 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3635 as a poly_uint64 too.
3637 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3638 Alan Hayward <alan.hayward@arm.com>
3639 David Sherwood <david.sherwood@arm.com>
3641 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3643 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3644 Alan Hayward <alan.hayward@arm.com>
3645 David Sherwood <david.sherwood@arm.com>
3647 * combine.c (can_change_dest_mode): Handle polynomial
3648 REGMODE_NATURAL_SIZE.
3649 * expmed.c (store_bit_field_1): Likewise.
3650 * expr.c (store_constructor): Likewise.
3651 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3652 and polynomial REGMODE_NATURAL_SIZE.
3653 (gen_lowpart_common): Likewise.
3654 * reginfo.c (record_subregs_of_mode): Likewise.
3655 * rtlanal.c (read_modify_subreg_p): Likewise.
3657 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3658 Alan Hayward <alan.hayward@arm.com>
3659 David Sherwood <david.sherwood@arm.com>
3661 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3662 numbers of elements.
3664 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3665 Alan Hayward <alan.hayward@arm.com>
3666 David Sherwood <david.sherwood@arm.com>
3668 * match.pd: Cope with polynomial numbers of vector elements.
3670 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3671 Alan Hayward <alan.hayward@arm.com>
3672 David Sherwood <david.sherwood@arm.com>
3674 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3675 in a POINTER_PLUS_EXPR.
3677 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3678 Alan Hayward <alan.hayward@arm.com>
3679 David Sherwood <david.sherwood@arm.com>
3681 * omp-simd-clone.c (simd_clone_subparts): New function.
3682 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3683 (ipa_simd_modify_function_body): Likewise.
3685 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3686 Alan Hayward <alan.hayward@arm.com>
3687 David Sherwood <david.sherwood@arm.com>
3689 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3690 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3691 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3692 (expand_vector_condition, vector_element): Likewise.
3693 (subparts_gt): New function.
3694 (get_compute_type): Use subparts_gt.
3695 (count_type_subparts): Delete.
3696 (expand_vector_operations_1): Use subparts_gt instead of
3697 count_type_subparts.
3699 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3700 Alan Hayward <alan.hayward@arm.com>
3701 David Sherwood <david.sherwood@arm.com>
3703 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3704 (vect_compile_time_alias): ...this new function. Do the calculation
3705 on poly_ints rather than trees.
3706 (vect_prune_runtime_alias_test_list): Update call accordingly.
3708 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3709 Alan Hayward <alan.hayward@arm.com>
3710 David Sherwood <david.sherwood@arm.com>
3712 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3714 (vect_schedule_slp_instance): Likewise.
3716 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3717 Alan Hayward <alan.hayward@arm.com>
3718 David Sherwood <david.sherwood@arm.com>
3720 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3721 constant and extern definitions for variable-length vectors.
3722 (vect_get_constant_vectors): Note that the number of units
3723 is known to be constant.
3725 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3726 Alan Hayward <alan.hayward@arm.com>
3727 David Sherwood <david.sherwood@arm.com>
3729 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3730 of units as polynomial. Choose between WIDE and NARROW based
3733 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3734 Alan Hayward <alan.hayward@arm.com>
3735 David Sherwood <david.sherwood@arm.com>
3737 * tree-vect-stmts.c (simd_clone_subparts): New function.
3738 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3740 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3741 Alan Hayward <alan.hayward@arm.com>
3742 David Sherwood <david.sherwood@arm.com>
3744 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3745 vectors as polynomial. Use build_index_vector for
3748 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3749 Alan Hayward <alan.hayward@arm.com>
3750 David Sherwood <david.sherwood@arm.com>
3752 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3753 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3754 for variable-length vectors.
3755 (vectorizable_mask_load_store): Treat the number of units as
3756 polynomial, asserting that it is constant if the condition has
3757 already been enforced.
3758 (vectorizable_store, vectorizable_load): Likewise.
3760 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3761 Alan Hayward <alan.hayward@arm.com>
3762 David Sherwood <david.sherwood@arm.com>
3764 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3765 of units as polynomial. Punt if we can't tell at compile time
3766 which vector contains the final result.
3768 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3769 Alan Hayward <alan.hayward@arm.com>
3770 David Sherwood <david.sherwood@arm.com>
3772 * tree-vect-loop.c (vectorizable_induction): Treat the number
3773 of units as polynomial. Punt on SLP inductions. Use an integer
3774 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3775 cast of such a series for variable-length floating-point
3778 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3779 Alan Hayward <alan.hayward@arm.com>
3780 David Sherwood <david.sherwood@arm.com>
3782 * tree.h (build_index_vector): Declare.
3783 * tree.c (build_index_vector): New function.
3784 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3785 of units as polynomial, forcibly converting it to a constant if
3786 vectorizable_reduction has already enforced the condition.
3787 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3788 to create a {1,2,3,...} vector.
3789 (vectorizable_reduction): Treat the number of units as polynomial.
3790 Choose vectype_in based on the largest scalar element size rather
3791 than the smallest number of units. Enforce the restrictions
3794 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3795 Alan Hayward <alan.hayward@arm.com>
3796 David Sherwood <david.sherwood@arm.com>
3798 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3799 number of units as polynomial.
3801 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3802 Alan Hayward <alan.hayward@arm.com>
3803 David Sherwood <david.sherwood@arm.com>
3805 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3806 * target.def (autovectorize_vector_sizes): Return the vector sizes
3807 by pointer, using vector_sizes rather than a bitmask.
3808 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3809 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3810 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3812 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3813 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3814 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3815 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3816 * omp-general.c (omp_max_vf): Likewise.
3817 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3818 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3819 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3820 * tree-vect-slp.c (vect_slp_bb): Likewise.
3821 * doc/tm.texi: Regenerate.
3822 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3824 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3825 the vector size as a poly_uint64 rather than an unsigned int.
3826 (current_vector_size): Change from an unsigned int to a poly_uint64.
3827 (get_vectype_for_scalar_type): Update accordingly.
3828 * tree.h (build_truth_vector_type): Take the size and number of
3829 units as a poly_uint64 rather than an unsigned int.
3830 (build_vector_type): Add a temporary overload that takes
3831 the number of units as a poly_uint64 rather than an unsigned int.
3832 * tree.c (make_vector_type): Likewise.
3833 (build_truth_vector_type): Take the number of units as a poly_uint64
3834 rather than an unsigned int.
3836 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3837 Alan Hayward <alan.hayward@arm.com>
3838 David Sherwood <david.sherwood@arm.com>
3840 * target.def (get_mask_mode): Take the number of units and length
3841 as poly_uint64s rather than unsigned ints.
3842 * targhooks.h (default_get_mask_mode): Update accordingly.
3843 * targhooks.c (default_get_mask_mode): Likewise.
3844 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3845 * doc/tm.texi: Regenerate.
3847 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3848 Alan Hayward <alan.hayward@arm.com>
3849 David Sherwood <david.sherwood@arm.com>
3851 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3852 * omp-general.c (omp_max_vf): Likewise.
3853 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3854 (expand_omp_simd): Handle polynomial safelen.
3855 * omp-low.c (omplow_simd_context): Add a default constructor.
3856 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3857 (lower_rec_simd_input_clauses): Update accordingly.
3858 (lower_rec_input_clauses): Likewise.
3860 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3861 Alan Hayward <alan.hayward@arm.com>
3862 David Sherwood <david.sherwood@arm.com>
3864 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3865 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3866 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3867 (vect_analyze_slp_cost): Likewise.
3868 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3869 (vect_model_load_cost): Likewise.
3871 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3872 Alan Hayward <alan.hayward@arm.com>
3873 David Sherwood <david.sherwood@arm.com>
3875 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3876 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3877 from an unsigned int * to a poly_uint64_pod *.
3878 (calculate_unrolling_factor): New function.
3879 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
3881 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3882 Alan Hayward <alan.hayward@arm.com>
3883 David Sherwood <david.sherwood@arm.com>
3885 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3886 from an unsigned int to a poly_uint64.
3887 (_loop_vec_info::slp_unrolling_factor): Likewise.
3888 (_loop_vec_info::vectorization_factor): Change from an int
3890 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3891 (vect_get_num_vectors): New function.
3892 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3893 (vect_get_num_copies): Use vect_get_num_vectors.
3894 (vect_analyze_data_ref_dependences): Change max_vf from an int *
3895 to an unsigned int *.
3896 (vect_analyze_data_refs): Change min_vf from an int * to a
3898 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3899 than an unsigned HOST_WIDE_INT.
3900 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3901 (vect_analyze_data_ref_dependence): Change max_vf from an int *
3902 to an unsigned int *.
3903 (vect_analyze_data_ref_dependences): Likewise.
3904 (vect_compute_data_ref_alignment): Handle polynomial vf.
3905 (vect_enhance_data_refs_alignment): Likewise.
3906 (vect_prune_runtime_alias_test_list): Likewise.
3907 (vect_shift_permute_load_chain): Likewise.
3908 (vect_supportable_dr_alignment): Likewise.
3909 (dependence_distance_ge_vf): Take the vectorization factor as a
3910 poly_uint64 rather than an unsigned HOST_WIDE_INT.
3911 (vect_analyze_data_refs): Change min_vf from an int * to a
3913 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3914 vfm1 as a poly_uint64 rather than an int. Make the same change
3915 for the returned bound_scalar.
3916 (vect_gen_vector_loop_niters): Handle polynomial vf.
3917 (vect_do_peeling): Likewise. Update call to
3918 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3919 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3921 * tree-vect-loop.c (vect_determine_vectorization_factor)
3922 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3923 (vect_get_known_peeling_cost): Likewise.
3924 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3925 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3926 (vect_transform_loop): Likewise. Use the lowest possible VF when
3927 updating the upper bounds of the loop.
3928 (vect_min_worthwhile_factor): Make static. Return an unsigned int
3930 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3931 polynomial unroll factors.
3932 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3933 (vect_make_slp_decision): Likewise.
3934 (vect_supported_load_permutation_p): Likewise, and polynomial
3936 (vect_analyze_slp_cost): Handle polynomial vf.
3937 (vect_slp_analyze_node_operations): Likewise.
3938 (vect_slp_analyze_bb_1): Likewise.
3939 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3940 than an unsigned HOST_WIDE_INT.
3941 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3942 (vectorizable_load): Handle polynomial vf.
3943 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3945 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3947 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3948 Alan Hayward <alan.hayward@arm.com>
3949 David Sherwood <david.sherwood@arm.com>
3951 * match.pd: Handle bit operations involving three constants
3952 and try to fold one pair.
3954 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3956 * tree-vect-loop-manip.c: Include gimple-fold.h.
3957 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3958 niters_maybe_zero parameters. Handle other cases besides a step of 1.
3959 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3960 Add a path that uses a step of VF instead of 1, but disable it
3962 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3963 and niters_no_overflow parameters. Update calls to
3964 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3965 Create a new SSA name if the latter choses to use a ste other
3966 than zero, and return it via niters_vector_mult_vf_var.
3967 * tree-vect-loop.c (vect_transform_loop): Update calls to
3968 vect_do_peeling, vect_gen_vector_loop_niters and
3969 slpeel_make_loop_iterate_ntimes.
3970 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3971 (vect_gen_vector_loop_niters): Update declarations after above changes.
3973 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
3975 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3976 128-bit round to integer instructions.
3977 (ceil<mode>2): Likewise.
3978 (btrunc<mode>2): Likewise.
3979 (round<mode>2): Likewise.
3981 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3983 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3984 unaligned VSX load/store on P8/P9.
3985 (expand_block_clear): Allow the use of unaligned VSX
3986 load/store on P8/P9.
3988 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3990 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3992 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3993 swap associated with both a load and a store.
3995 2018-01-02 Andrew Waterman <andrew@sifive.com>
3997 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3998 * config/riscv/riscv.md (clear_cache): Use it.
4000 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4002 * web.c: Remove out-of-date comment.
4004 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4006 * expr.c (fixup_args_size_notes): Check that any existing
4007 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4008 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4009 (emit_single_push_insn): ...here.
4011 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4013 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4014 (const_vector_encoded_nelts): New function.
4015 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4016 (const_vector_int_elt, const_vector_elt): Declare.
4017 * emit-rtl.c (const_vector_int_elt_1): New function.
4018 (const_vector_elt): Likewise.
4019 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4020 of CONST_VECTOR_ELT.
4022 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4024 * expr.c: Include rtx-vector-builder.h.
4025 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4026 directly on the tree encoding.
4027 (const_vector_from_tree): Likewise.
4028 * optabs.c: Include rtx-vector-builder.h.
4029 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4030 sequence of "u" values.
4031 * vec-perm-indices.c: Include rtx-vector-builder.h.
4032 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4033 directly on the vec_perm_indices encoding.
4035 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4037 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4038 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4039 * rtx-vector-builder.h: New file.
4040 * rtx-vector-builder.c: Likewise.
4041 * rtl.h (rtx_def::u2): Add a const_vector field.
4042 (CONST_VECTOR_NPATTERNS): New macro.
4043 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4044 (CONST_VECTOR_DUPLICATE_P): Likewise.
4045 (CONST_VECTOR_STEPPED_P): Likewise.
4046 (CONST_VECTOR_ENCODED_ELT): Likewise.
4047 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4048 (unwrap_const_vec_duplicate): Likewise.
4049 (const_vec_series_p): Check for a non-duplicated vector encoding.
4050 Say that the function only returns true for integer vectors.
4051 * emit-rtl.c: Include rtx-vector-builder.h.
4052 (gen_const_vec_duplicate_1): Delete.
4053 (gen_const_vector): Call gen_const_vec_duplicate instead of
4054 gen_const_vec_duplicate_1.
4055 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4056 (gen_const_vec_duplicate): Use rtx_vector_builder.
4057 (gen_const_vec_series): Likewise.
4058 (gen_rtx_CONST_VECTOR): Likewise.
4059 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4060 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4061 Build a new vector rather than modifying a CONST_VECTOR in-place.
4062 (handle_special_swappables): Update call accordingly.
4063 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4064 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4065 Build a new vector rather than modifying a CONST_VECTOR in-place.
4066 (handle_special_swappables): Update call accordingly.
4068 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4070 * simplify-rtx.c (simplify_const_binary_operation): Use
4071 CONST_VECTOR_ELT instead of XVECEXP.
4073 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4075 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4076 the selector elements to be different from the data elements
4077 if the selector is a VECTOR_CST.
4078 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4079 ssizetype for the selector.
4081 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4083 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4084 before testing each element individually.
4085 * tree-vect-generic.c (lower_vec_perm): Likewise.
4087 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4089 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4090 * selftest-run-tests.c (selftest::run_tests): Call it.
4091 * vector-builder.h (vector_builder::operator ==): New function.
4092 (vector_builder::operator !=): Likewise.
4093 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4094 (vec_perm_indices::all_from_input_p): New function.
4095 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4096 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4097 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4098 instead of reading the VECTOR_CST directly. Detect whether both
4099 vector inputs are the same before constructing the vec_perm_indices,
4100 and update the number of inputs argument accordingly. Use the
4101 utility functions added above. Only construct sel2 if we need to.
4103 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4105 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4106 the broadcast of the low byte.
4107 (expand_mult_highpart): Use an explicit encoding for the permutes.
4108 * optabs-query.c (can_mult_highpart_p): Likewise.
4109 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4110 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4111 (vectorizable_bswap): Likewise.
4112 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4113 explicit encoding for the power-of-2 permutes.
4114 (vect_permute_store_chain): Likewise.
4115 (vect_grouped_load_supported): Likewise.
4116 (vect_permute_load_chain): Likewise.
4118 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4120 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4121 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4122 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4123 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4124 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4125 (vect_gen_perm_mask_any): Likewise.
4127 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4129 * int-vector-builder.h: New file.
4130 * vec-perm-indices.h: Include int-vector-builder.h.
4131 (vec_perm_indices): Redefine as an int_vector_builder.
4132 (auto_vec_perm_indices): Delete.
4133 (vec_perm_builder): Redefine as a stand-alone class.
4134 (vec_perm_indices::vec_perm_indices): New function.
4135 (vec_perm_indices::clamp): Likewise.
4136 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4137 (vec_perm_indices::new_vector): New function.
4138 (vec_perm_indices::new_expanded_vector): Update for new
4139 vec_perm_indices class.
4140 (vec_perm_indices::rotate_inputs): New function.
4141 (vec_perm_indices::all_in_range_p): Operate directly on the
4142 encoded form, without computing elided elements.
4143 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4144 encoding. Update for new vec_perm_indices class.
4145 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4146 the given vec_perm_builder.
4147 (expand_vec_perm_var): Update vec_perm_builder constructor.
4148 (expand_mult_highpart): Use vec_perm_builder instead of
4149 auto_vec_perm_indices.
4150 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4151 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4152 or double series encoding as appropriate.
4153 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4154 vec_perm_indices instead of auto_vec_perm_indices.
4155 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4156 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4157 (vect_permute_store_chain): Likewise.
4158 (vect_grouped_load_supported): Likewise.
4159 (vect_permute_load_chain): Likewise.
4160 (vect_shift_permute_load_chain): Likewise.
4161 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4162 (vect_transform_slp_perm_load): Likewise.
4163 (vect_schedule_slp_instance): Likewise.
4164 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4165 (vectorizable_mask_load_store): Likewise.
4166 (vectorizable_bswap): Likewise.
4167 (vectorizable_store): Likewise.
4168 (vectorizable_load): Likewise.
4169 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4170 vec_perm_indices instead of auto_vec_perm_indices. Use
4171 tree_to_vec_perm_builder to read the vector from a tree.
4172 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4173 vec_perm_builder instead of a vec_perm_indices.
4174 (have_whole_vector_shift): Use vec_perm_builder and
4175 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4176 truncation to calc_vec_perm_mask_for_shift.
4177 (vect_create_epilog_for_reduction): Likewise.
4178 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4179 from auto_vec_perm_indices to vec_perm_indices.
4180 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4181 instead of changing individual elements.
4182 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4183 the vector in d.perm.
4184 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4185 from auto_vec_perm_indices to vec_perm_indices.
4186 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4187 instead of changing individual elements.
4188 (arm_vectorize_vec_perm_const): Use new_vector to install
4189 the vector in d.perm.
4190 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4191 Update vec_perm_builder constructor.
4192 (rs6000_expand_interleave): Likewise.
4193 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4194 (rs6000_expand_interleave): Likewise.
4196 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4198 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4199 to qimode could truncate the indices.
4200 * optabs.c (expand_vec_perm_var): Likewise.
4202 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4204 * Makefile.in (OBJS): Add vec-perm-indices.o.
4205 * vec-perm-indices.h: New file.
4206 * vec-perm-indices.c: Likewise.
4207 * target.h (vec_perm_indices): Replace with a forward class
4209 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4210 * optabs.h: Include vec-perm-indices.h.
4211 (expand_vec_perm): Delete.
4212 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4213 (expand_vec_perm_const): Declare.
4214 * target.def (vec_perm_const_ok): Replace with...
4215 (vec_perm_const): ...this new hook.
4216 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4217 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4218 * doc/tm.texi: Regenerate.
4219 * optabs.def (vec_perm_const): Delete.
4220 * doc/md.texi (vec_perm_const): Likewise.
4221 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4222 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4223 expand_vec_perm for constant permutation vectors. Assert that
4224 the mode of variable permutation vectors is the integer equivalent
4225 of the mode that is being permuted.
4226 * optabs-query.h (selector_fits_mode_p): Declare.
4227 * optabs-query.c: Include vec-perm-indices.h.
4228 (selector_fits_mode_p): New function.
4229 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4230 is defined, instead of checking whether the vec_perm_const_optab
4231 exists. Use targetm.vectorize.vec_perm_const instead of
4232 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4233 fit in the vector mode before using a variable permute.
4234 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4235 vec_perm_indices instead of an rtx.
4236 (expand_vec_perm): Replace with...
4237 (expand_vec_perm_const): ...this new function. Take the selector
4238 as a vec_perm_indices rather than an rtx. Also take the mode of
4239 the selector. Update call to shift_amt_for_vec_perm_mask.
4240 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4241 Use vec_perm_indices::new_expanded_vector to expand the original
4242 selector into bytes. Check whether the indices fit in the vector
4243 mode before using a variable permute.
4244 (expand_vec_perm_var): Make global.
4245 (expand_mult_highpart): Use expand_vec_perm_const.
4246 * fold-const.c: Includes vec-perm-indices.h.
4247 * tree-ssa-forwprop.c: Likewise.
4248 * tree-vect-data-refs.c: Likewise.
4249 * tree-vect-generic.c: Likewise.
4250 * tree-vect-loop.c: Likewise.
4251 * tree-vect-slp.c: Likewise.
4252 * tree-vect-stmts.c: Likewise.
4253 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4255 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4256 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4257 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4258 (aarch64_vectorize_vec_perm_const): ...this new function.
4259 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4260 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4261 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4262 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4263 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4264 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4265 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4267 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4268 check for NEON modes.
4269 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4270 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4271 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4272 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4274 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4275 the old VEC_PERM_CONST conditions.
4276 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4277 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4278 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4279 (ia64_vectorize_vec_perm_const_ok): Merge into...
4280 (ia64_vectorize_vec_perm_const): ...this new function.
4281 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4282 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4283 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4284 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4285 * config/mips/mips.c (mips_expand_vec_perm_const)
4286 (mips_vectorize_vec_perm_const_ok): Merge into...
4287 (mips_vectorize_vec_perm_const): ...this new function.
4288 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4289 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4290 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4291 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4292 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4293 (rs6000_expand_vec_perm_const): Delete.
4294 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4296 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4297 (altivec_expand_vec_perm_const_le): Take each operand individually.
4298 Operate on constant selectors rather than rtxes.
4299 (altivec_expand_vec_perm_const): Likewise. Update call to
4300 altivec_expand_vec_perm_const_le.
4301 (rs6000_expand_vec_perm_const): Delete.
4302 (rs6000_vectorize_vec_perm_const_ok): Delete.
4303 (rs6000_vectorize_vec_perm_const): New function.
4304 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4305 an element count and rtx array.
4306 (rs6000_expand_extract_even): Update call accordingly.
4307 (rs6000_expand_interleave): Likewise.
4308 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4309 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4310 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4311 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4312 (rs6000_expand_vec_perm_const): Delete.
4313 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4314 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4315 (altivec_expand_vec_perm_const_le): Take each operand individually.
4316 Operate on constant selectors rather than rtxes.
4317 (altivec_expand_vec_perm_const): Likewise. Update call to
4318 altivec_expand_vec_perm_const_le.
4319 (rs6000_expand_vec_perm_const): Delete.
4320 (rs6000_vectorize_vec_perm_const_ok): Delete.
4321 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4322 reference to the SPE evmerge intructions.
4323 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4324 an element count and rtx array.
4325 (rs6000_expand_extract_even): Update call accordingly.
4326 (rs6000_expand_interleave): Likewise.
4327 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4328 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4330 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4332 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4334 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4335 vector mode and that that mode matches the mode of the data
4337 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4338 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4339 directly using expand_vec_perm_1 when forcing selectors into
4341 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4343 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4345 * optabs-query.h (can_vec_perm_p): Delete.
4346 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4347 * optabs-query.c (can_vec_perm_p): Split into...
4348 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4349 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4350 particular selector is valid.
4351 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4352 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4353 (vect_grouped_load_supported): Likewise.
4354 (vect_shift_permute_load_chain): Likewise.
4355 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4356 (vect_transform_slp_perm_load): Likewise.
4357 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4358 (vectorizable_bswap): Likewise.
4359 (vect_gen_perm_mask_checked): Likewise.
4360 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4361 implementations of variable permutation vectors into account
4362 when deciding which selector to use.
4363 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4364 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4365 with a false third argument.
4366 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4367 to test whether the constant selector is valid and can_vec_perm_var_p
4368 to test whether a variable selector is valid.
4370 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4372 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4373 * optabs-query.c (can_vec_perm_p): Likewise.
4374 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4375 instead of vec_perm_indices.
4376 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4377 (vect_gen_perm_mask_checked): Likewise,
4378 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4379 (vect_gen_perm_mask_checked): Likewise,
4381 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4383 * optabs-query.h (qimode_for_vec_perm): Declare.
4384 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4385 (qimode_for_vec_perm): ...this new function.
4386 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4388 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4390 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4391 does not have a conditional at the top.
4393 2018-01-02 Richard Biener <rguenther@suse.de>
4395 * ipa-inline.c (big_speedup_p): Fix expression.
4397 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4400 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4403 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4407 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4408 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4409 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4410 cond_taken_branch_cost 3->4.
4412 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4414 PR tree-optimization/83581
4415 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4416 TODO_cleanup_cfg if any changes have been made.
4419 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4420 convert_modes if target mode has the right side, but different mode
4424 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4425 last argument when extracting from CONCAT. If either from_real or
4426 from_imag is NULL, use expansion through memory. If result is not
4427 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4428 the parts directly to inner mode, if even that fails, use expansion
4432 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4433 check for bswap in mode rather than HImode and use that in expand_unop
4436 Copyright (C) 2018 Free Software Foundation, Inc.
4438 Copying and distribution of this file, with or without modification,
4439 are permitted in any medium without royalty provided the copyright
4440 notice and this notice are preserved.