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[official-gcc.git] / gcc / ira-int.h
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1 /* Integrated Register Allocator (IRA) intercommunication header file.
2 Copyright (C) 2006-2013 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #include "cfgloop.h"
22 #include "ira.h"
23 #include "alloc-pool.h"
25 /* To provide consistency in naming, all IRA external variables,
26 functions, common typedefs start with prefix ira_. */
28 #ifdef ENABLE_CHECKING
29 #define ENABLE_IRA_CHECKING
30 #endif
32 #ifdef ENABLE_IRA_CHECKING
33 #define ira_assert(c) gcc_assert (c)
34 #else
35 /* Always define and include C, so that warnings for empty body in an
36 'if' statement and unused variable do not occur. */
37 #define ira_assert(c) ((void)(0 && (c)))
38 #endif
40 /* Compute register frequency from edge frequency FREQ. It is
41 analogous to REG_FREQ_FROM_BB. When optimizing for size, or
42 profile driven feedback is available and the function is never
43 executed, frequency is always equivalent. Otherwise rescale the
44 edge frequency. */
45 #define REG_FREQ_FROM_EDGE_FREQ(freq) \
46 (optimize_size || (flag_branch_probabilities && !ENTRY_BLOCK_PTR->count) \
47 ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \
48 ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1)
50 /* A modified value of flag `-fira-verbose' used internally. */
51 extern int internal_flag_ira_verbose;
53 /* Dump file of the allocator if it is not NULL. */
54 extern FILE *ira_dump_file;
56 /* Typedefs for pointers to allocno live range, allocno, and copy of
57 allocnos. */
58 typedef struct live_range *live_range_t;
59 typedef struct ira_allocno *ira_allocno_t;
60 typedef struct ira_allocno_pref *ira_pref_t;
61 typedef struct ira_allocno_copy *ira_copy_t;
62 typedef struct ira_object *ira_object_t;
64 /* Definition of vector of allocnos and copies. */
66 /* Typedef for pointer to the subsequent structure. */
67 typedef struct ira_loop_tree_node *ira_loop_tree_node_t;
69 typedef unsigned short move_table[N_REG_CLASSES];
71 /* In general case, IRA is a regional allocator. The regions are
72 nested and form a tree. Currently regions are natural loops. The
73 following structure describes loop tree node (representing basic
74 block or loop). We need such tree because the loop tree from
75 cfgloop.h is not convenient for the optimization: basic blocks are
76 not a part of the tree from cfgloop.h. We also use the nodes for
77 storing additional information about basic blocks/loops for the
78 register allocation purposes. */
79 struct ira_loop_tree_node
81 /* The node represents basic block if children == NULL. */
82 basic_block bb; /* NULL for loop. */
83 /* NULL for BB or for loop tree root if we did not build CFG loop tree. */
84 struct loop *loop;
85 /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent.
86 SUBLOOP_NEXT is always NULL for BBs. */
87 ira_loop_tree_node_t subloop_next, next;
88 /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside
89 the node. They are NULL for BBs. */
90 ira_loop_tree_node_t subloops, children;
91 /* The node immediately containing given node. */
92 ira_loop_tree_node_t parent;
94 /* Loop level in range [0, ira_loop_tree_height). */
95 int level;
97 /* All the following members are defined only for nodes representing
98 loops. */
100 /* The loop number from CFG loop tree. The root number is 0. */
101 int loop_num;
103 /* True if the loop was marked for removal from the register
104 allocation. */
105 bool to_remove_p;
107 /* Allocnos in the loop corresponding to their regnos. If it is
108 NULL the loop does not form a separate register allocation region
109 (e.g. because it has abnormal enter/exit edges and we can not put
110 code for register shuffling on the edges if a different
111 allocation is used for a pseudo-register on different sides of
112 the edges). Caps are not in the map (remember we can have more
113 one cap with the same regno in a region). */
114 ira_allocno_t *regno_allocno_map;
116 /* True if there is an entry to given loop not from its parent (or
117 grandparent) basic block. For example, it is possible for two
118 adjacent loops inside another loop. */
119 bool entered_from_non_parent_p;
121 /* Maximal register pressure inside loop for given register class
122 (defined only for the pressure classes). */
123 int reg_pressure[N_REG_CLASSES];
125 /* Numbers of allocnos referred or living in the loop node (except
126 for its subloops). */
127 bitmap all_allocnos;
129 /* Numbers of allocnos living at the loop borders. */
130 bitmap border_allocnos;
132 /* Regnos of pseudos modified in the loop node (including its
133 subloops). */
134 bitmap modified_regnos;
136 /* Numbers of copies referred in the corresponding loop. */
137 bitmap local_copies;
140 /* The root of the loop tree corresponding to the all function. */
141 extern ira_loop_tree_node_t ira_loop_tree_root;
143 /* Height of the loop tree. */
144 extern int ira_loop_tree_height;
146 /* All nodes representing basic blocks are referred through the
147 following array. We can not use basic block member `aux' for this
148 because it is used for insertion of insns on edges. */
149 extern ira_loop_tree_node_t ira_bb_nodes;
151 /* Two access macros to the nodes representing basic blocks. */
152 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
153 #define IRA_BB_NODE_BY_INDEX(index) __extension__ \
154 (({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \
155 if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\
157 fprintf (stderr, \
158 "\n%s: %d: error in %s: it is not a block node\n", \
159 __FILE__, __LINE__, __FUNCTION__); \
160 gcc_unreachable (); \
162 _node; }))
163 #else
164 #define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index])
165 #endif
167 #define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index)
169 /* All nodes representing loops are referred through the following
170 array. */
171 extern ira_loop_tree_node_t ira_loop_nodes;
173 /* Two access macros to the nodes representing loops. */
174 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
175 #define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \
176 (({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]); \
177 if (_node->children == NULL || _node->bb != NULL \
178 || (_node->loop == NULL && current_loops != NULL)) \
180 fprintf (stderr, \
181 "\n%s: %d: error in %s: it is not a loop node\n", \
182 __FILE__, __LINE__, __FUNCTION__); \
183 gcc_unreachable (); \
185 _node; }))
186 #else
187 #define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index])
188 #endif
190 #define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
193 /* The structure describes program points where a given allocno lives.
194 If the live ranges of two allocnos are intersected, the allocnos
195 are in conflict. */
196 struct live_range
198 /* Object whose live range is described by given structure. */
199 ira_object_t object;
200 /* Program point range. */
201 int start, finish;
202 /* Next structure describing program points where the allocno
203 lives. */
204 live_range_t next;
205 /* Pointer to structures with the same start/finish. */
206 live_range_t start_next, finish_next;
209 /* Program points are enumerated by numbers from range
210 0..IRA_MAX_POINT-1. There are approximately two times more program
211 points than insns. Program points are places in the program where
212 liveness info can be changed. In most general case (there are more
213 complicated cases too) some program points correspond to places
214 where input operand dies and other ones correspond to places where
215 output operands are born. */
216 extern int ira_max_point;
218 /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno
219 live ranges with given start/finish point. */
220 extern live_range_t *ira_start_point_ranges, *ira_finish_point_ranges;
222 /* A structure representing conflict information for an allocno
223 (or one of its subwords). */
224 struct ira_object
226 /* The allocno associated with this record. */
227 ira_allocno_t allocno;
228 /* Vector of accumulated conflicting conflict_redords with NULL end
229 marker (if OBJECT_CONFLICT_VEC_P is true) or conflict bit vector
230 otherwise. */
231 void *conflicts_array;
232 /* Pointer to structures describing at what program point the
233 object lives. We always maintain the list in such way that *the
234 ranges in the list are not intersected and ordered by decreasing
235 their program points*. */
236 live_range_t live_ranges;
237 /* The subword within ALLOCNO which is represented by this object.
238 Zero means the lowest-order subword (or the entire allocno in case
239 it is not being tracked in subwords). */
240 int subword;
241 /* Allocated size of the conflicts array. */
242 unsigned int conflicts_array_size;
243 /* A unique number for every instance of this structure, which is used
244 to represent it in conflict bit vectors. */
245 int id;
246 /* Before building conflicts, MIN and MAX are initialized to
247 correspondingly minimal and maximal points of the accumulated
248 live ranges. Afterwards, they hold the minimal and maximal ids
249 of other ira_objects that this one can conflict with. */
250 int min, max;
251 /* Initial and accumulated hard registers conflicting with this
252 object and as a consequences can not be assigned to the allocno.
253 All non-allocatable hard regs and hard regs of register classes
254 different from given allocno one are included in the sets. */
255 HARD_REG_SET conflict_hard_regs, total_conflict_hard_regs;
256 /* Number of accumulated conflicts in the vector of conflicting
257 objects. */
258 int num_accumulated_conflicts;
259 /* TRUE if conflicts are represented by a vector of pointers to
260 ira_object structures. Otherwise, we use a bit vector indexed
261 by conflict ID numbers. */
262 unsigned int conflict_vec_p : 1;
265 /* A structure representing an allocno (allocation entity). Allocno
266 represents a pseudo-register in an allocation region. If
267 pseudo-register does not live in a region but it lives in the
268 nested regions, it is represented in the region by special allocno
269 called *cap*. There may be more one cap representing the same
270 pseudo-register in region. It means that the corresponding
271 pseudo-register lives in more one non-intersected subregion. */
272 struct ira_allocno
274 /* The allocno order number starting with 0. Each allocno has an
275 unique number and the number is never changed for the
276 allocno. */
277 int num;
278 /* Regno for allocno or cap. */
279 int regno;
280 /* Mode of the allocno which is the mode of the corresponding
281 pseudo-register. */
282 ENUM_BITFIELD (machine_mode) mode : 8;
283 /* Register class which should be used for allocation for given
284 allocno. NO_REGS means that we should use memory. */
285 ENUM_BITFIELD (reg_class) aclass : 16;
286 /* During the reload, value TRUE means that we should not reassign a
287 hard register to the allocno got memory earlier. It is set up
288 when we removed memory-memory move insn before each iteration of
289 the reload. */
290 unsigned int dont_reassign_p : 1;
291 #ifdef STACK_REGS
292 /* Set to TRUE if allocno can't be assigned to the stack hard
293 register correspondingly in this region and area including the
294 region and all its subregions recursively. */
295 unsigned int no_stack_reg_p : 1, total_no_stack_reg_p : 1;
296 #endif
297 /* TRUE value means that there is no sense to spill the allocno
298 during coloring because the spill will result in additional
299 reloads in reload pass. */
300 unsigned int bad_spill_p : 1;
301 /* TRUE if a hard register or memory has been assigned to the
302 allocno. */
303 unsigned int assigned_p : 1;
304 /* TRUE if conflicts for given allocno are represented by vector of
305 pointers to the conflicting allocnos. Otherwise, we use a bit
306 vector where a bit with given index represents allocno with the
307 same number. */
308 unsigned int conflict_vec_p : 1;
309 /* Hard register assigned to given allocno. Negative value means
310 that memory was allocated to the allocno. During the reload,
311 spilled allocno has value equal to the corresponding stack slot
312 number (0, ...) - 2. Value -1 is used for allocnos spilled by the
313 reload (at this point pseudo-register has only one allocno) which
314 did not get stack slot yet. */
315 short int hard_regno;
316 /* Allocnos with the same regno are linked by the following member.
317 Allocnos corresponding to inner loops are first in the list (it
318 corresponds to depth-first traverse of the loops). */
319 ira_allocno_t next_regno_allocno;
320 /* There may be different allocnos with the same regno in different
321 regions. Allocnos are bound to the corresponding loop tree node.
322 Pseudo-register may have only one regular allocno with given loop
323 tree node but more than one cap (see comments above). */
324 ira_loop_tree_node_t loop_tree_node;
325 /* Accumulated usage references of the allocno. Here and below,
326 word 'accumulated' means info for given region and all nested
327 subregions. In this case, 'accumulated' means sum of references
328 of the corresponding pseudo-register in this region and in all
329 nested subregions recursively. */
330 int nrefs;
331 /* Accumulated frequency of usage of the allocno. */
332 int freq;
333 /* Minimal accumulated and updated costs of usage register of the
334 allocno class. */
335 int class_cost, updated_class_cost;
336 /* Minimal accumulated, and updated costs of memory for the allocno.
337 At the allocation start, the original and updated costs are
338 equal. The updated cost may be changed after finishing
339 allocation in a region and starting allocation in a subregion.
340 The change reflects the cost of spill/restore code on the
341 subregion border if we assign memory to the pseudo in the
342 subregion. */
343 int memory_cost, updated_memory_cost;
344 /* Accumulated number of points where the allocno lives and there is
345 excess pressure for its class. Excess pressure for a register
346 class at some point means that there are more allocnos of given
347 register class living at the point than number of hard-registers
348 of the class available for the allocation. */
349 int excess_pressure_points_num;
350 /* Allocno hard reg preferences. */
351 ira_pref_t allocno_prefs;
352 /* Copies to other non-conflicting allocnos. The copies can
353 represent move insn or potential move insn usually because of two
354 operand insn constraints. */
355 ira_copy_t allocno_copies;
356 /* It is a allocno (cap) representing given allocno on upper loop tree
357 level. */
358 ira_allocno_t cap;
359 /* It is a link to allocno (cap) on lower loop level represented by
360 given cap. Null if given allocno is not a cap. */
361 ira_allocno_t cap_member;
362 /* The number of objects tracked in the following array. */
363 int num_objects;
364 /* An array of structures describing conflict information and live
365 ranges for each object associated with the allocno. There may be
366 more than one such object in cases where the allocno represents a
367 multi-word register. */
368 ira_object_t objects[2];
369 /* Accumulated frequency of calls which given allocno
370 intersects. */
371 int call_freq;
372 /* Accumulated number of the intersected calls. */
373 int calls_crossed_num;
374 /* The number of calls across which it is live, but which should not
375 affect register preferences. */
376 int cheap_calls_crossed_num;
377 /* Array of usage costs (accumulated and the one updated during
378 coloring) for each hard register of the allocno class. The
379 member value can be NULL if all costs are the same and equal to
380 CLASS_COST. For example, the costs of two different hard
381 registers can be different if one hard register is callee-saved
382 and another one is callee-used and the allocno lives through
383 calls. Another example can be case when for some insn the
384 corresponding pseudo-register value should be put in specific
385 register class (e.g. AREG for x86) which is a strict subset of
386 the allocno class (GENERAL_REGS for x86). We have updated costs
387 to reflect the situation when the usage cost of a hard register
388 is decreased because the allocno is connected to another allocno
389 by a copy and the another allocno has been assigned to the hard
390 register. */
391 int *hard_reg_costs, *updated_hard_reg_costs;
392 /* Array of decreasing costs (accumulated and the one updated during
393 coloring) for allocnos conflicting with given allocno for hard
394 regno of the allocno class. The member value can be NULL if all
395 costs are the same. These costs are used to reflect preferences
396 of other allocnos not assigned yet during assigning to given
397 allocno. */
398 int *conflict_hard_reg_costs, *updated_conflict_hard_reg_costs;
399 /* Different additional data. It is used to decrease size of
400 allocno data footprint. */
401 void *add_data;
405 /* All members of the allocno structures should be accessed only
406 through the following macros. */
407 #define ALLOCNO_NUM(A) ((A)->num)
408 #define ALLOCNO_REGNO(A) ((A)->regno)
409 #define ALLOCNO_REG(A) ((A)->reg)
410 #define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno)
411 #define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node)
412 #define ALLOCNO_CAP(A) ((A)->cap)
413 #define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member)
414 #define ALLOCNO_NREFS(A) ((A)->nrefs)
415 #define ALLOCNO_FREQ(A) ((A)->freq)
416 #define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno)
417 #define ALLOCNO_CALL_FREQ(A) ((A)->call_freq)
418 #define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num)
419 #define ALLOCNO_CHEAP_CALLS_CROSSED_NUM(A) ((A)->cheap_calls_crossed_num)
420 #define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest)
421 #define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p)
422 #define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p)
423 #define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p)
424 #define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p)
425 #ifdef STACK_REGS
426 #define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p)
427 #define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p)
428 #endif
429 #define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p)
430 #define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p)
431 #define ALLOCNO_MODE(A) ((A)->mode)
432 #define ALLOCNO_PREFS(A) ((A)->allocno_prefs)
433 #define ALLOCNO_COPIES(A) ((A)->allocno_copies)
434 #define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs)
435 #define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs)
436 #define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \
437 ((A)->conflict_hard_reg_costs)
438 #define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \
439 ((A)->updated_conflict_hard_reg_costs)
440 #define ALLOCNO_CLASS(A) ((A)->aclass)
441 #define ALLOCNO_CLASS_COST(A) ((A)->class_cost)
442 #define ALLOCNO_UPDATED_CLASS_COST(A) ((A)->updated_class_cost)
443 #define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost)
444 #define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost)
445 #define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) \
446 ((A)->excess_pressure_points_num)
447 #define ALLOCNO_OBJECT(A,N) ((A)->objects[N])
448 #define ALLOCNO_NUM_OBJECTS(A) ((A)->num_objects)
449 #define ALLOCNO_ADD_DATA(A) ((A)->add_data)
451 /* Typedef for pointer to the subsequent structure. */
452 typedef struct ira_emit_data *ira_emit_data_t;
454 /* Allocno bound data used for emit pseudo live range split insns and
455 to flattening IR. */
456 struct ira_emit_data
458 /* TRUE if the allocno assigned to memory was a destination of
459 removed move (see ira-emit.c) at loop exit because the value of
460 the corresponding pseudo-register is not changed inside the
461 loop. */
462 unsigned int mem_optimized_dest_p : 1;
463 /* TRUE if the corresponding pseudo-register has disjoint live
464 ranges and the other allocnos of the pseudo-register except this
465 one changed REG. */
466 unsigned int somewhere_renamed_p : 1;
467 /* TRUE if allocno with the same REGNO in a subregion has been
468 renamed, in other words, got a new pseudo-register. */
469 unsigned int child_renamed_p : 1;
470 /* Final rtx representation of the allocno. */
471 rtx reg;
472 /* Non NULL if we remove restoring value from given allocno to
473 MEM_OPTIMIZED_DEST at loop exit (see ira-emit.c) because the
474 allocno value is not changed inside the loop. */
475 ira_allocno_t mem_optimized_dest;
478 #define ALLOCNO_EMIT_DATA(a) ((ira_emit_data_t) ALLOCNO_ADD_DATA (a))
480 /* Data used to emit live range split insns and to flattening IR. */
481 extern ira_emit_data_t ira_allocno_emit_data;
483 /* Abbreviation for frequent emit data access. */
484 static inline rtx
485 allocno_emit_reg (ira_allocno_t a)
487 return ALLOCNO_EMIT_DATA (a)->reg;
490 #define OBJECT_ALLOCNO(O) ((O)->allocno)
491 #define OBJECT_SUBWORD(O) ((O)->subword)
492 #define OBJECT_CONFLICT_ARRAY(O) ((O)->conflicts_array)
493 #define OBJECT_CONFLICT_VEC(O) ((ira_object_t *)(O)->conflicts_array)
494 #define OBJECT_CONFLICT_BITVEC(O) ((IRA_INT_TYPE *)(O)->conflicts_array)
495 #define OBJECT_CONFLICT_ARRAY_SIZE(O) ((O)->conflicts_array_size)
496 #define OBJECT_CONFLICT_VEC_P(O) ((O)->conflict_vec_p)
497 #define OBJECT_NUM_CONFLICTS(O) ((O)->num_accumulated_conflicts)
498 #define OBJECT_CONFLICT_HARD_REGS(O) ((O)->conflict_hard_regs)
499 #define OBJECT_TOTAL_CONFLICT_HARD_REGS(O) ((O)->total_conflict_hard_regs)
500 #define OBJECT_MIN(O) ((O)->min)
501 #define OBJECT_MAX(O) ((O)->max)
502 #define OBJECT_CONFLICT_ID(O) ((O)->id)
503 #define OBJECT_LIVE_RANGES(O) ((O)->live_ranges)
505 /* Map regno -> allocnos with given regno (see comments for
506 allocno member `next_regno_allocno'). */
507 extern ira_allocno_t *ira_regno_allocno_map;
509 /* Array of references to all allocnos. The order number of the
510 allocno corresponds to the index in the array. Removed allocnos
511 have NULL element value. */
512 extern ira_allocno_t *ira_allocnos;
514 /* The size of the previous array. */
515 extern int ira_allocnos_num;
517 /* Map a conflict id to its corresponding ira_object structure. */
518 extern ira_object_t *ira_object_id_map;
520 /* The size of the previous array. */
521 extern int ira_objects_num;
523 /* The following structure represents a hard register prefererence of
524 allocno. The preference represent move insns or potential move
525 insns usually because of two operand insn constraints. One move
526 operand is a hard register. */
527 struct ira_allocno_pref
529 /* The unique order number of the preference node starting with 0. */
530 int num;
531 /* Preferred hard register. */
532 int hard_regno;
533 /* Accumulated execution frequency of insns from which the
534 preference created. */
535 int freq;
536 /* Given allocno. */
537 ira_allocno_t allocno;
538 /* All prefernces with the same allocno are linked by the following
539 member. */
540 ira_pref_t next_pref;
543 /* Array of references to all allocno preferences. The order number
544 of the preference corresponds to the index in the array. */
545 extern ira_pref_t *ira_prefs;
547 /* Size of the previous array. */
548 extern int ira_prefs_num;
550 /* The following structure represents a copy of two allocnos. The
551 copies represent move insns or potential move insns usually because
552 of two operand insn constraints. To remove register shuffle, we
553 also create copies between allocno which is output of an insn and
554 allocno becoming dead in the insn. */
555 struct ira_allocno_copy
557 /* The unique order number of the copy node starting with 0. */
558 int num;
559 /* Allocnos connected by the copy. The first allocno should have
560 smaller order number than the second one. */
561 ira_allocno_t first, second;
562 /* Execution frequency of the copy. */
563 int freq;
564 bool constraint_p;
565 /* It is a move insn which is an origin of the copy. The member
566 value for the copy representing two operand insn constraints or
567 for the copy created to remove register shuffle is NULL. In last
568 case the copy frequency is smaller than the corresponding insn
569 execution frequency. */
570 rtx insn;
571 /* All copies with the same allocno as FIRST are linked by the two
572 following members. */
573 ira_copy_t prev_first_allocno_copy, next_first_allocno_copy;
574 /* All copies with the same allocno as SECOND are linked by the two
575 following members. */
576 ira_copy_t prev_second_allocno_copy, next_second_allocno_copy;
577 /* Region from which given copy is originated. */
578 ira_loop_tree_node_t loop_tree_node;
581 /* Array of references to all copies. The order number of the copy
582 corresponds to the index in the array. Removed copies have NULL
583 element value. */
584 extern ira_copy_t *ira_copies;
586 /* Size of the previous array. */
587 extern int ira_copies_num;
589 /* The following structure describes a stack slot used for spilled
590 pseudo-registers. */
591 struct ira_spilled_reg_stack_slot
593 /* pseudo-registers assigned to the stack slot. */
594 bitmap_head spilled_regs;
595 /* RTL representation of the stack slot. */
596 rtx mem;
597 /* Size of the stack slot. */
598 unsigned int width;
601 /* The number of elements in the following array. */
602 extern int ira_spilled_reg_stack_slots_num;
604 /* The following array contains info about spilled pseudo-registers
605 stack slots used in current function so far. */
606 extern struct ira_spilled_reg_stack_slot *ira_spilled_reg_stack_slots;
608 /* Correspondingly overall cost of the allocation, cost of the
609 allocnos assigned to hard-registers, cost of the allocnos assigned
610 to memory, cost of loads, stores and register move insns generated
611 for pseudo-register live range splitting (see ira-emit.c). */
612 extern int ira_overall_cost;
613 extern int ira_reg_cost, ira_mem_cost;
614 extern int ira_load_cost, ira_store_cost, ira_shuffle_cost;
615 extern int ira_move_loops_num, ira_additional_jumps_num;
618 /* This page contains a bitset implementation called 'min/max sets' used to
619 record conflicts in IRA.
620 They are named min/maxs set since we keep track of a minimum and a maximum
621 bit number for each set representing the bounds of valid elements. Otherwise,
622 the implementation resembles sbitmaps in that we store an array of integers
623 whose bits directly represent the members of the set. */
625 /* The type used as elements in the array, and the number of bits in
626 this type. */
628 #define IRA_INT_BITS HOST_BITS_PER_WIDE_INT
629 #define IRA_INT_TYPE HOST_WIDE_INT
631 /* Set, clear or test bit number I in R, a bit vector of elements with
632 minimal index and maximal index equal correspondingly to MIN and
633 MAX. */
634 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
636 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
637 (({ int _min = (MIN), _max = (MAX), _i = (I); \
638 if (_i < _min || _i > _max) \
640 fprintf (stderr, \
641 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
642 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
643 gcc_unreachable (); \
645 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
646 |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
649 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
650 (({ int _min = (MIN), _max = (MAX), _i = (I); \
651 if (_i < _min || _i > _max) \
653 fprintf (stderr, \
654 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
655 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
656 gcc_unreachable (); \
658 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
659 &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
661 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
662 (({ int _min = (MIN), _max = (MAX), _i = (I); \
663 if (_i < _min || _i > _max) \
665 fprintf (stderr, \
666 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
667 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
668 gcc_unreachable (); \
670 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
671 & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
673 #else
675 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) \
676 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
677 |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
679 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) \
680 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
681 &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
683 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) \
684 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
685 & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
687 #endif
689 /* The iterator for min/max sets. */
690 typedef struct {
692 /* Array containing the bit vector. */
693 IRA_INT_TYPE *vec;
695 /* The number of the current element in the vector. */
696 unsigned int word_num;
698 /* The number of bits in the bit vector. */
699 unsigned int nel;
701 /* The current bit index of the bit vector. */
702 unsigned int bit_num;
704 /* Index corresponding to the 1st bit of the bit vector. */
705 int start_val;
707 /* The word of the bit vector currently visited. */
708 unsigned IRA_INT_TYPE word;
709 } minmax_set_iterator;
711 /* Initialize the iterator I for bit vector VEC containing minimal and
712 maximal values MIN and MAX. */
713 static inline void
714 minmax_set_iter_init (minmax_set_iterator *i, IRA_INT_TYPE *vec, int min,
715 int max)
717 i->vec = vec;
718 i->word_num = 0;
719 i->nel = max < min ? 0 : max - min + 1;
720 i->start_val = min;
721 i->bit_num = 0;
722 i->word = i->nel == 0 ? 0 : vec[0];
725 /* Return TRUE if we have more allocnos to visit, in which case *N is
726 set to the number of the element to be visited. Otherwise, return
727 FALSE. */
728 static inline bool
729 minmax_set_iter_cond (minmax_set_iterator *i, int *n)
731 /* Skip words that are zeros. */
732 for (; i->word == 0; i->word = i->vec[i->word_num])
734 i->word_num++;
735 i->bit_num = i->word_num * IRA_INT_BITS;
737 /* If we have reached the end, break. */
738 if (i->bit_num >= i->nel)
739 return false;
742 /* Skip bits that are zero. */
743 for (; (i->word & 1) == 0; i->word >>= 1)
744 i->bit_num++;
746 *n = (int) i->bit_num + i->start_val;
748 return true;
751 /* Advance to the next element in the set. */
752 static inline void
753 minmax_set_iter_next (minmax_set_iterator *i)
755 i->word >>= 1;
756 i->bit_num++;
759 /* Loop over all elements of a min/max set given by bit vector VEC and
760 their minimal and maximal values MIN and MAX. In each iteration, N
761 is set to the number of next allocno. ITER is an instance of
762 minmax_set_iterator used to iterate over the set. */
763 #define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \
764 for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
765 minmax_set_iter_cond (&(ITER), &(N)); \
766 minmax_set_iter_next (&(ITER)))
768 struct target_ira_int {
769 /* Initialized once. It is a maximal possible size of the allocated
770 struct costs. */
771 int x_max_struct_costs_size;
773 /* Allocated and initialized once, and used to initialize cost values
774 for each insn. */
775 struct costs *x_init_cost;
777 /* Allocated once, and used for temporary purposes. */
778 struct costs *x_temp_costs;
780 /* Allocated once, and used for the cost calculation. */
781 struct costs *x_op_costs[MAX_RECOG_OPERANDS];
782 struct costs *x_this_op_costs[MAX_RECOG_OPERANDS];
784 /* Hard registers that can not be used for the register allocator for
785 all functions of the current compilation unit. */
786 HARD_REG_SET x_no_unit_alloc_regs;
788 /* Map: hard regs X modes -> set of hard registers for storing value
789 of given mode starting with given hard register. */
790 HARD_REG_SET (x_ira_reg_mode_hard_regset
791 [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]);
793 /* Maximum cost of moving from a register in one class to a register
794 in another class. Based on TARGET_REGISTER_MOVE_COST. */
795 move_table *x_ira_register_move_cost[MAX_MACHINE_MODE];
797 /* Similar, but here we don't have to move if the first index is a
798 subset of the second so in that case the cost is zero. */
799 move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE];
801 /* Similar, but here we don't have to move if the first index is a
802 superset of the second so in that case the cost is zero. */
803 move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE];
805 /* Keep track of the last mode we initialized move costs for. */
806 int x_last_mode_for_init_move_cost;
808 /* Array analog of the macro MEMORY_MOVE_COST but they contain maximal
809 cost not minimal. */
810 short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
812 /* Map class->true if class is a possible allocno class, false
813 otherwise. */
814 bool x_ira_reg_allocno_class_p[N_REG_CLASSES];
816 /* Map class->true if class is a pressure class, false otherwise. */
817 bool x_ira_reg_pressure_class_p[N_REG_CLASSES];
819 /* Array of the number of hard registers of given class which are
820 available for allocation. The order is defined by the hard
821 register numbers. */
822 short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
824 /* Index (in ira_class_hard_regs; for given register class and hard
825 register (in general case a hard register can belong to several
826 register classes;. The index is negative for hard registers
827 unavailable for the allocation. */
828 short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
830 /* Array whose values are hard regset of hard registers available for
831 the allocation of given register class whose HARD_REGNO_MODE_OK
832 values for given mode are zero. */
833 HARD_REG_SET x_ira_prohibited_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
835 /* Index [CL][M] contains R if R appears somewhere in a register of the form:
837 (reg:M R'), R' not in x_ira_prohibited_class_mode_regs[CL][M]
839 For example, if:
841 - (reg:M 2) is valid and occupies two registers;
842 - register 2 belongs to CL; and
843 - register 3 belongs to the same pressure class as CL
845 then (reg:M 2) contributes to [CL][M] and registers 2 and 3 will be
846 in the set. */
847 HARD_REG_SET x_ira_useful_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
849 /* The value is number of elements in the subsequent array. */
850 int x_ira_important_classes_num;
852 /* The array containing all non-empty classes. Such classes is
853 important for calculation of the hard register usage costs. */
854 enum reg_class x_ira_important_classes[N_REG_CLASSES];
856 /* The array containing indexes of important classes in the previous
857 array. The array elements are defined only for important
858 classes. */
859 int x_ira_important_class_nums[N_REG_CLASSES];
861 /* Map class->true if class is an uniform class, false otherwise. */
862 bool x_ira_uniform_class_p[N_REG_CLASSES];
864 /* The biggest important class inside of intersection of the two
865 classes (that is calculated taking only hard registers available
866 for allocation into account;. If the both classes contain no hard
867 registers available for allocation, the value is calculated with
868 taking all hard-registers including fixed ones into account. */
869 enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
871 /* Classes with end marker LIM_REG_CLASSES which are intersected with
872 given class (the first index). That includes given class itself.
873 This is calculated taking only hard registers available for
874 allocation into account. */
875 enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
877 /* The biggest (smallest) important class inside of (covering) union
878 of the two classes (that is calculated taking only hard registers
879 available for allocation into account). If the both classes
880 contain no hard registers available for allocation, the value is
881 calculated with taking all hard-registers including fixed ones
882 into account. In other words, the value is the corresponding
883 reg_class_subunion (reg_class_superunion) value. */
884 enum reg_class x_ira_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
885 enum reg_class x_ira_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
887 /* For each reg class, table listing all the classes contained in it
888 (excluding the class itself. Non-allocatable registers are
889 excluded from the consideration). */
890 enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
892 /* Array whose values are hard regset of hard registers for which
893 move of the hard register in given mode into itself is
894 prohibited. */
895 HARD_REG_SET x_ira_prohibited_mode_move_regs[NUM_MACHINE_MODES];
897 /* Flag of that the above array has been initialized. */
898 bool x_ira_prohibited_mode_move_regs_initialized_p;
901 extern struct target_ira_int default_target_ira_int;
902 #if SWITCHABLE_TARGET
903 extern struct target_ira_int *this_target_ira_int;
904 #else
905 #define this_target_ira_int (&default_target_ira_int)
906 #endif
908 #define ira_reg_mode_hard_regset \
909 (this_target_ira_int->x_ira_reg_mode_hard_regset)
910 #define ira_register_move_cost \
911 (this_target_ira_int->x_ira_register_move_cost)
912 #define ira_max_memory_move_cost \
913 (this_target_ira_int->x_ira_max_memory_move_cost)
914 #define ira_may_move_in_cost \
915 (this_target_ira_int->x_ira_may_move_in_cost)
916 #define ira_may_move_out_cost \
917 (this_target_ira_int->x_ira_may_move_out_cost)
918 #define ira_reg_allocno_class_p \
919 (this_target_ira_int->x_ira_reg_allocno_class_p)
920 #define ira_reg_pressure_class_p \
921 (this_target_ira_int->x_ira_reg_pressure_class_p)
922 #define ira_non_ordered_class_hard_regs \
923 (this_target_ira_int->x_ira_non_ordered_class_hard_regs)
924 #define ira_class_hard_reg_index \
925 (this_target_ira_int->x_ira_class_hard_reg_index)
926 #define ira_prohibited_class_mode_regs \
927 (this_target_ira_int->x_ira_prohibited_class_mode_regs)
928 #define ira_useful_class_mode_regs \
929 (this_target_ira_int->x_ira_useful_class_mode_regs)
930 #define ira_important_classes_num \
931 (this_target_ira_int->x_ira_important_classes_num)
932 #define ira_important_classes \
933 (this_target_ira_int->x_ira_important_classes)
934 #define ira_important_class_nums \
935 (this_target_ira_int->x_ira_important_class_nums)
936 #define ira_uniform_class_p \
937 (this_target_ira_int->x_ira_uniform_class_p)
938 #define ira_reg_class_intersect \
939 (this_target_ira_int->x_ira_reg_class_intersect)
940 #define ira_reg_class_super_classes \
941 (this_target_ira_int->x_ira_reg_class_super_classes)
942 #define ira_reg_class_subunion \
943 (this_target_ira_int->x_ira_reg_class_subunion)
944 #define ira_reg_class_superunion \
945 (this_target_ira_int->x_ira_reg_class_superunion)
946 #define ira_prohibited_mode_move_regs \
947 (this_target_ira_int->x_ira_prohibited_mode_move_regs)
949 /* ira.c: */
951 extern void *ira_allocate (size_t);
952 extern void ira_free (void *addr);
953 extern bitmap ira_allocate_bitmap (void);
954 extern void ira_free_bitmap (bitmap);
955 extern void ira_print_disposition (FILE *);
956 extern void ira_debug_disposition (void);
957 extern void ira_debug_allocno_classes (void);
958 extern void ira_init_register_move_cost (enum machine_mode);
959 extern void ira_setup_alts (rtx insn, HARD_REG_SET &alts);
960 extern int ira_get_dup_out_num (int op_num, HARD_REG_SET &alts);
962 /* ira-build.c */
964 /* The current loop tree node and its regno allocno map. */
965 extern ira_loop_tree_node_t ira_curr_loop_tree_node;
966 extern ira_allocno_t *ira_curr_regno_allocno_map;
968 extern void ira_debug_pref (ira_pref_t);
969 extern void ira_debug_prefs (void);
970 extern void ira_debug_allocno_prefs (ira_allocno_t);
972 extern void ira_debug_copy (ira_copy_t);
973 extern void debug (ira_allocno_copy &ref);
974 extern void debug (ira_allocno_copy *ptr);
976 extern void ira_debug_copies (void);
977 extern void ira_debug_allocno_copies (ira_allocno_t);
978 extern void debug (ira_allocno &ref);
979 extern void debug (ira_allocno *ptr);
981 extern void ira_traverse_loop_tree (bool, ira_loop_tree_node_t,
982 void (*) (ira_loop_tree_node_t),
983 void (*) (ira_loop_tree_node_t));
984 extern ira_allocno_t ira_parent_allocno (ira_allocno_t);
985 extern ira_allocno_t ira_parent_or_cap_allocno (ira_allocno_t);
986 extern ira_allocno_t ira_create_allocno (int, bool, ira_loop_tree_node_t);
987 extern void ira_create_allocno_objects (ira_allocno_t);
988 extern void ira_set_allocno_class (ira_allocno_t, enum reg_class);
989 extern bool ira_conflict_vector_profitable_p (ira_object_t, int);
990 extern void ira_allocate_conflict_vec (ira_object_t, int);
991 extern void ira_allocate_object_conflicts (ira_object_t, int);
992 extern void ior_hard_reg_conflicts (ira_allocno_t, HARD_REG_SET *);
993 extern void ira_print_expanded_allocno (ira_allocno_t);
994 extern void ira_add_live_range_to_object (ira_object_t, int, int);
995 extern live_range_t ira_create_live_range (ira_object_t, int, int,
996 live_range_t);
997 extern live_range_t ira_copy_live_range_list (live_range_t);
998 extern live_range_t ira_merge_live_ranges (live_range_t, live_range_t);
999 extern bool ira_live_ranges_intersect_p (live_range_t, live_range_t);
1000 extern void ira_finish_live_range (live_range_t);
1001 extern void ira_finish_live_range_list (live_range_t);
1002 extern void ira_free_allocno_updated_costs (ira_allocno_t);
1003 extern ira_pref_t ira_create_pref (ira_allocno_t, int, int);
1004 extern void ira_add_allocno_pref (ira_allocno_t, int, int);
1005 extern void ira_remove_pref (ira_pref_t);
1006 extern void ira_remove_allocno_prefs (ira_allocno_t);
1007 extern ira_copy_t ira_create_copy (ira_allocno_t, ira_allocno_t,
1008 int, bool, rtx, ira_loop_tree_node_t);
1009 extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
1010 bool, rtx, ira_loop_tree_node_t);
1012 extern int *ira_allocate_cost_vector (reg_class_t);
1013 extern void ira_free_cost_vector (int *, reg_class_t);
1015 extern void ira_flattening (int, int);
1016 extern bool ira_build (void);
1017 extern void ira_destroy (void);
1019 /* ira-costs.c */
1020 extern void ira_init_costs_once (void);
1021 extern void ira_init_costs (void);
1022 extern void ira_finish_costs_once (void);
1023 extern void ira_costs (void);
1024 extern void ira_tune_allocno_costs (void);
1026 /* ira-lives.c */
1028 extern void ira_rebuild_start_finish_chains (void);
1029 extern void ira_print_live_range_list (FILE *, live_range_t);
1030 extern void debug (live_range &ref);
1031 extern void debug (live_range *ptr);
1032 extern void ira_debug_live_range_list (live_range_t);
1033 extern void ira_debug_allocno_live_ranges (ira_allocno_t);
1034 extern void ira_debug_live_ranges (void);
1035 extern void ira_create_allocno_live_ranges (void);
1036 extern void ira_compress_allocno_live_ranges (void);
1037 extern void ira_finish_allocno_live_ranges (void);
1039 /* ira-conflicts.c */
1040 extern void ira_debug_conflicts (bool);
1041 extern void ira_build_conflicts (void);
1043 /* ira-color.c */
1044 extern void ira_debug_hard_regs_forest (void);
1045 extern int ira_loop_edge_freq (ira_loop_tree_node_t, int, bool);
1046 extern void ira_reassign_conflict_allocnos (int);
1047 extern void ira_initiate_assign (void);
1048 extern void ira_finish_assign (void);
1049 extern void ira_color (void);
1051 /* ira-emit.c */
1052 extern void ira_initiate_emit_data (void);
1053 extern void ira_finish_emit_data (void);
1054 extern void ira_emit (bool);
1058 /* Return true if equivalence of pseudo REGNO is not a lvalue. */
1059 static inline bool
1060 ira_equiv_no_lvalue_p (int regno)
1062 if (regno >= ira_reg_equiv_len)
1063 return false;
1064 return (ira_reg_equiv[regno].constant != NULL_RTX
1065 || ira_reg_equiv[regno].invariant != NULL_RTX
1066 || (ira_reg_equiv[regno].memory != NULL_RTX
1067 && MEM_READONLY_P (ira_reg_equiv[regno].memory)));
1072 /* Initialize register costs for MODE if necessary. */
1073 static inline void
1074 ira_init_register_move_cost_if_necessary (enum machine_mode mode)
1076 if (ira_register_move_cost[mode] == NULL)
1077 ira_init_register_move_cost (mode);
1082 /* The iterator for all allocnos. */
1083 typedef struct {
1084 /* The number of the current element in IRA_ALLOCNOS. */
1085 int n;
1086 } ira_allocno_iterator;
1088 /* Initialize the iterator I. */
1089 static inline void
1090 ira_allocno_iter_init (ira_allocno_iterator *i)
1092 i->n = 0;
1095 /* Return TRUE if we have more allocnos to visit, in which case *A is
1096 set to the allocno to be visited. Otherwise, return FALSE. */
1097 static inline bool
1098 ira_allocno_iter_cond (ira_allocno_iterator *i, ira_allocno_t *a)
1100 int n;
1102 for (n = i->n; n < ira_allocnos_num; n++)
1103 if (ira_allocnos[n] != NULL)
1105 *a = ira_allocnos[n];
1106 i->n = n + 1;
1107 return true;
1109 return false;
1112 /* Loop over all allocnos. In each iteration, A is set to the next
1113 allocno. ITER is an instance of ira_allocno_iterator used to iterate
1114 the allocnos. */
1115 #define FOR_EACH_ALLOCNO(A, ITER) \
1116 for (ira_allocno_iter_init (&(ITER)); \
1117 ira_allocno_iter_cond (&(ITER), &(A));)
1119 /* The iterator for all objects. */
1120 typedef struct {
1121 /* The number of the current element in ira_object_id_map. */
1122 int n;
1123 } ira_object_iterator;
1125 /* Initialize the iterator I. */
1126 static inline void
1127 ira_object_iter_init (ira_object_iterator *i)
1129 i->n = 0;
1132 /* Return TRUE if we have more objects to visit, in which case *OBJ is
1133 set to the object to be visited. Otherwise, return FALSE. */
1134 static inline bool
1135 ira_object_iter_cond (ira_object_iterator *i, ira_object_t *obj)
1137 int n;
1139 for (n = i->n; n < ira_objects_num; n++)
1140 if (ira_object_id_map[n] != NULL)
1142 *obj = ira_object_id_map[n];
1143 i->n = n + 1;
1144 return true;
1146 return false;
1149 /* Loop over all objects. In each iteration, OBJ is set to the next
1150 object. ITER is an instance of ira_object_iterator used to iterate
1151 the objects. */
1152 #define FOR_EACH_OBJECT(OBJ, ITER) \
1153 for (ira_object_iter_init (&(ITER)); \
1154 ira_object_iter_cond (&(ITER), &(OBJ));)
1156 /* The iterator for objects associated with an allocno. */
1157 typedef struct {
1158 /* The number of the element the allocno's object array. */
1159 int n;
1160 } ira_allocno_object_iterator;
1162 /* Initialize the iterator I. */
1163 static inline void
1164 ira_allocno_object_iter_init (ira_allocno_object_iterator *i)
1166 i->n = 0;
1169 /* Return TRUE if we have more objects to visit in allocno A, in which
1170 case *O is set to the object to be visited. Otherwise, return
1171 FALSE. */
1172 static inline bool
1173 ira_allocno_object_iter_cond (ira_allocno_object_iterator *i, ira_allocno_t a,
1174 ira_object_t *o)
1176 int n = i->n++;
1177 if (n < ALLOCNO_NUM_OBJECTS (a))
1179 *o = ALLOCNO_OBJECT (a, n);
1180 return true;
1182 return false;
1185 /* Loop over all objects associated with allocno A. In each
1186 iteration, O is set to the next object. ITER is an instance of
1187 ira_allocno_object_iterator used to iterate the conflicts. */
1188 #define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \
1189 for (ira_allocno_object_iter_init (&(ITER)); \
1190 ira_allocno_object_iter_cond (&(ITER), (A), &(O));)
1193 /* The iterator for prefs. */
1194 typedef struct {
1195 /* The number of the current element in IRA_PREFS. */
1196 int n;
1197 } ira_pref_iterator;
1199 /* Initialize the iterator I. */
1200 static inline void
1201 ira_pref_iter_init (ira_pref_iterator *i)
1203 i->n = 0;
1206 /* Return TRUE if we have more prefs to visit, in which case *PREF is
1207 set to the pref to be visited. Otherwise, return FALSE. */
1208 static inline bool
1209 ira_pref_iter_cond (ira_pref_iterator *i, ira_pref_t *pref)
1211 int n;
1213 for (n = i->n; n < ira_prefs_num; n++)
1214 if (ira_prefs[n] != NULL)
1216 *pref = ira_prefs[n];
1217 i->n = n + 1;
1218 return true;
1220 return false;
1223 /* Loop over all prefs. In each iteration, P is set to the next
1224 pref. ITER is an instance of ira_pref_iterator used to iterate
1225 the prefs. */
1226 #define FOR_EACH_PREF(P, ITER) \
1227 for (ira_pref_iter_init (&(ITER)); \
1228 ira_pref_iter_cond (&(ITER), &(P));)
1231 /* The iterator for copies. */
1232 typedef struct {
1233 /* The number of the current element in IRA_COPIES. */
1234 int n;
1235 } ira_copy_iterator;
1237 /* Initialize the iterator I. */
1238 static inline void
1239 ira_copy_iter_init (ira_copy_iterator *i)
1241 i->n = 0;
1244 /* Return TRUE if we have more copies to visit, in which case *CP is
1245 set to the copy to be visited. Otherwise, return FALSE. */
1246 static inline bool
1247 ira_copy_iter_cond (ira_copy_iterator *i, ira_copy_t *cp)
1249 int n;
1251 for (n = i->n; n < ira_copies_num; n++)
1252 if (ira_copies[n] != NULL)
1254 *cp = ira_copies[n];
1255 i->n = n + 1;
1256 return true;
1258 return false;
1261 /* Loop over all copies. In each iteration, C is set to the next
1262 copy. ITER is an instance of ira_copy_iterator used to iterate
1263 the copies. */
1264 #define FOR_EACH_COPY(C, ITER) \
1265 for (ira_copy_iter_init (&(ITER)); \
1266 ira_copy_iter_cond (&(ITER), &(C));)
1268 /* The iterator for object conflicts. */
1269 typedef struct {
1271 /* TRUE if the conflicts are represented by vector of allocnos. */
1272 bool conflict_vec_p;
1274 /* The conflict vector or conflict bit vector. */
1275 void *vec;
1277 /* The number of the current element in the vector (of type
1278 ira_object_t or IRA_INT_TYPE). */
1279 unsigned int word_num;
1281 /* The bit vector size. It is defined only if
1282 OBJECT_CONFLICT_VEC_P is FALSE. */
1283 unsigned int size;
1285 /* The current bit index of bit vector. It is defined only if
1286 OBJECT_CONFLICT_VEC_P is FALSE. */
1287 unsigned int bit_num;
1289 /* The object id corresponding to the 1st bit of the bit vector. It
1290 is defined only if OBJECT_CONFLICT_VEC_P is FALSE. */
1291 int base_conflict_id;
1293 /* The word of bit vector currently visited. It is defined only if
1294 OBJECT_CONFLICT_VEC_P is FALSE. */
1295 unsigned IRA_INT_TYPE word;
1296 } ira_object_conflict_iterator;
1298 /* Initialize the iterator I with ALLOCNO conflicts. */
1299 static inline void
1300 ira_object_conflict_iter_init (ira_object_conflict_iterator *i,
1301 ira_object_t obj)
1303 i->conflict_vec_p = OBJECT_CONFLICT_VEC_P (obj);
1304 i->vec = OBJECT_CONFLICT_ARRAY (obj);
1305 i->word_num = 0;
1306 if (i->conflict_vec_p)
1307 i->size = i->bit_num = i->base_conflict_id = i->word = 0;
1308 else
1310 if (OBJECT_MIN (obj) > OBJECT_MAX (obj))
1311 i->size = 0;
1312 else
1313 i->size = ((OBJECT_MAX (obj) - OBJECT_MIN (obj)
1314 + IRA_INT_BITS)
1315 / IRA_INT_BITS) * sizeof (IRA_INT_TYPE);
1316 i->bit_num = 0;
1317 i->base_conflict_id = OBJECT_MIN (obj);
1318 i->word = (i->size == 0 ? 0 : ((IRA_INT_TYPE *) i->vec)[0]);
1322 /* Return TRUE if we have more conflicting allocnos to visit, in which
1323 case *A is set to the allocno to be visited. Otherwise, return
1324 FALSE. */
1325 static inline bool
1326 ira_object_conflict_iter_cond (ira_object_conflict_iterator *i,
1327 ira_object_t *pobj)
1329 ira_object_t obj;
1331 if (i->conflict_vec_p)
1333 obj = ((ira_object_t *) i->vec)[i->word_num++];
1334 if (obj == NULL)
1335 return false;
1337 else
1339 unsigned IRA_INT_TYPE word = i->word;
1340 unsigned int bit_num = i->bit_num;
1342 /* Skip words that are zeros. */
1343 for (; word == 0; word = ((IRA_INT_TYPE *) i->vec)[i->word_num])
1345 i->word_num++;
1347 /* If we have reached the end, break. */
1348 if (i->word_num * sizeof (IRA_INT_TYPE) >= i->size)
1349 return false;
1351 bit_num = i->word_num * IRA_INT_BITS;
1354 /* Skip bits that are zero. */
1355 for (; (word & 1) == 0; word >>= 1)
1356 bit_num++;
1358 obj = ira_object_id_map[bit_num + i->base_conflict_id];
1359 i->bit_num = bit_num + 1;
1360 i->word = word >> 1;
1363 *pobj = obj;
1364 return true;
1367 /* Loop over all objects conflicting with OBJ. In each iteration,
1368 CONF is set to the next conflicting object. ITER is an instance
1369 of ira_object_conflict_iterator used to iterate the conflicts. */
1370 #define FOR_EACH_OBJECT_CONFLICT(OBJ, CONF, ITER) \
1371 for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \
1372 ira_object_conflict_iter_cond (&(ITER), &(CONF));)
1376 /* The function returns TRUE if at least one hard register from ones
1377 starting with HARD_REGNO and containing value of MODE are in set
1378 HARD_REGSET. */
1379 static inline bool
1380 ira_hard_reg_set_intersection_p (int hard_regno, enum machine_mode mode,
1381 HARD_REG_SET hard_regset)
1383 int i;
1385 gcc_assert (hard_regno >= 0);
1386 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1387 if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1388 return true;
1389 return false;
1392 /* Return number of hard registers in hard register SET. */
1393 static inline int
1394 hard_reg_set_size (HARD_REG_SET set)
1396 int i, size;
1398 for (size = i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1399 if (TEST_HARD_REG_BIT (set, i))
1400 size++;
1401 return size;
1404 /* The function returns TRUE if hard registers starting with
1405 HARD_REGNO and containing value of MODE are fully in set
1406 HARD_REGSET. */
1407 static inline bool
1408 ira_hard_reg_in_set_p (int hard_regno, enum machine_mode mode,
1409 HARD_REG_SET hard_regset)
1411 int i;
1413 ira_assert (hard_regno >= 0);
1414 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1415 if (!TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1416 return false;
1417 return true;
1422 /* To save memory we use a lazy approach for allocation and
1423 initialization of the cost vectors. We do this only when it is
1424 really necessary. */
1426 /* Allocate cost vector *VEC for hard registers of ACLASS and
1427 initialize the elements by VAL if it is necessary */
1428 static inline void
1429 ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val)
1431 int i, *reg_costs;
1432 int len;
1434 if (*vec != NULL)
1435 return;
1436 *vec = reg_costs = ira_allocate_cost_vector (aclass);
1437 len = ira_class_hard_regs_num[(int) aclass];
1438 for (i = 0; i < len; i++)
1439 reg_costs[i] = val;
1442 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1443 values of vector SRC into the vector if it is necessary */
1444 static inline void
1445 ira_allocate_and_copy_costs (int **vec, enum reg_class aclass, int *src)
1447 int len;
1449 if (*vec != NULL || src == NULL)
1450 return;
1451 *vec = ira_allocate_cost_vector (aclass);
1452 len = ira_class_hard_regs_num[aclass];
1453 memcpy (*vec, src, sizeof (int) * len);
1456 /* Allocate cost vector *VEC for hard registers of ACLASS and add
1457 values of vector SRC into the vector if it is necessary */
1458 static inline void
1459 ira_allocate_and_accumulate_costs (int **vec, enum reg_class aclass, int *src)
1461 int i, len;
1463 if (src == NULL)
1464 return;
1465 len = ira_class_hard_regs_num[aclass];
1466 if (*vec == NULL)
1468 *vec = ira_allocate_cost_vector (aclass);
1469 memset (*vec, 0, sizeof (int) * len);
1471 for (i = 0; i < len; i++)
1472 (*vec)[i] += src[i];
1475 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1476 values of vector SRC into the vector or initialize it by VAL (if
1477 SRC is null). */
1478 static inline void
1479 ira_allocate_and_set_or_copy_costs (int **vec, enum reg_class aclass,
1480 int val, int *src)
1482 int i, *reg_costs;
1483 int len;
1485 if (*vec != NULL)
1486 return;
1487 *vec = reg_costs = ira_allocate_cost_vector (aclass);
1488 len = ira_class_hard_regs_num[aclass];
1489 if (src != NULL)
1490 memcpy (reg_costs, src, sizeof (int) * len);
1491 else
1493 for (i = 0; i < len; i++)
1494 reg_costs[i] = val;
1498 extern rtx ira_create_new_reg (rtx);
1499 extern int first_moveable_pseudo, last_moveable_pseudo;