1 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
4 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
5 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
6 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
7 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
8 * config/pa/pa.c (pa_function_arg_advance): Likewise.
9 (pa_function_arg, pa_arg_partial_bytes): Likewise.
10 (pa_function_arg_size): New function.
12 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
14 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
15 in a separate statement.
17 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
19 PR tree-optimization/83847
20 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
21 group gathers and scatters.
23 2018-01-16 Jakub Jelinek <jakub@redhat.com>
25 PR rtl-optimization/86620
26 * params.def (max-sched-ready-insns): Bump minimum value to 1.
28 PR rtl-optimization/83213
29 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
30 to last if both are JUMP_INSNs.
32 PR tree-optimization/83843
33 * gimple-ssa-store-merging.c
34 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
35 store_immediate_info for bswap/nop orig_stores.
37 2018-01-15 Andrew Waterman <andrew@sifive.com>
39 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
41 <UDIV>: Increase cost if !TARGET_DIV.
43 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
45 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
46 (define_attr "cr_logical_3op"): New.
47 (cceq_ior_compare): Adjust.
48 (cceq_ior_compare_complement): Adjust.
49 (*cceq_rev_compare): Adjust.
50 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
51 (is_cracked_insn): Adjust.
52 (insn_must_be_first_in_group): Adjust.
53 * config/rs6000/40x.md: Adjust.
54 * config/rs6000/440.md: Adjust.
55 * config/rs6000/476.md: Adjust.
56 * config/rs6000/601.md: Adjust.
57 * config/rs6000/603.md: Adjust.
58 * config/rs6000/6xx.md: Adjust.
59 * config/rs6000/7450.md: Adjust.
60 * config/rs6000/7xx.md: Adjust.
61 * config/rs6000/8540.md: Adjust.
62 * config/rs6000/cell.md: Adjust.
63 * config/rs6000/e300c2c3.md: Adjust.
64 * config/rs6000/e500mc.md: Adjust.
65 * config/rs6000/e500mc64.md: Adjust.
66 * config/rs6000/e5500.md: Adjust.
67 * config/rs6000/e6500.md: Adjust.
68 * config/rs6000/mpc.md: Adjust.
69 * config/rs6000/power4.md: Adjust.
70 * config/rs6000/power5.md: Adjust.
71 * config/rs6000/power6.md: Adjust.
72 * config/rs6000/power7.md: Adjust.
73 * config/rs6000/power8.md: Adjust.
74 * config/rs6000/power9.md: Adjust.
75 * config/rs6000/rs64.md: Adjust.
76 * config/rs6000/titan.md: Adjust.
78 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
80 * config/i386/predicates.md (indirect_branch_operand): Rewrite
81 ix86_indirect_branch_register logic.
83 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
85 * config/i386/constraints.md (Bs): Update
86 ix86_indirect_branch_register check. Don't check
87 ix86_indirect_branch_register with GOT_memory_operand.
89 * config/i386/predicates.md (GOT_memory_operand): Don't check
90 ix86_indirect_branch_register here.
91 (GOT32_symbol_operand): Likewise.
93 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
95 * config/i386/predicates.md (constant_call_address_operand):
96 Rewrite ix86_indirect_branch_register logic.
97 (sibcall_insn_operand): Likewise.
99 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
101 * config/i386/constraints.md (Bs): Replace
102 ix86_indirect_branch_thunk_register with
103 ix86_indirect_branch_register.
105 * config/i386/i386.md (indirect_jump): Likewise.
106 (tablejump): Likewise.
107 (*sibcall_memory): Likewise.
108 (*sibcall_value_memory): Likewise.
109 Peepholes of indirect call and jump via memory: Likewise.
110 * config/i386/i386.opt: Likewise.
111 * config/i386/predicates.md (indirect_branch_operand): Likewise.
112 (GOT_memory_operand): Likewise.
113 (call_insn_operand): Likewise.
114 (sibcall_insn_operand): Likewise.
115 (GOT32_symbol_operand): Likewise.
117 2018-01-15 Jakub Jelinek <jakub@redhat.com>
120 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
121 type rather than type addr's type points to.
122 (expand_omp_atomic_mutex): Likewise.
123 (expand_omp_atomic): Likewise.
125 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
128 * config/i386/i386.c (output_indirect_thunk_function): Use
129 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
130 for __x86_return_thunk.
132 2018-01-15 Richard Biener <rguenther@suse.de>
135 * expmed.c (extract_bit_field_1): Fix typo.
137 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
140 * config/arm/iterators.md (VF): New mode iterator.
141 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
142 Remove integer-related logic from pattern.
143 (neon_vabd<mode>_3): Likewise.
145 2018-01-15 Jakub Jelinek <jakub@redhat.com>
148 * common.opt (fstrict-overflow): No longer an alias.
149 (fwrapv-pointer): New option.
150 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
151 also for pointer types based on flag_wrapv_pointer.
152 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
153 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
154 opts->x_flag_wrapv got set.
155 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
156 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
157 POINTER_TYPE_OVERFLOW_UNDEFINED.
158 * match.pd: Likewise in address comparison pattern.
159 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
161 2018-01-15 Richard Biener <rguenther@suse.de>
164 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
165 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
166 Reset type names to their identifier if their TYPE_DECL doesn't
167 have linkage (and thus is used for ODR and devirt).
168 (save_debug_info_for_decl): Remove.
169 (save_debug_info_for_type): Likewise.
170 (add_tree_to_fld_list): Adjust.
171 * tree-pretty-print.c (dump_generic_node): Make dumping of
172 type names more robust.
174 2018-01-15 Richard Biener <rguenther@suse.de>
176 * BASE-VER: Bump to 8.0.1.
178 2018-01-14 Martin Sebor <msebor@redhat.com>
181 * builtins.c (check_access): Avoid warning when the no-warning bit
184 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
186 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
187 * ira-color (allocno_hard_regs_compare): Likewise.
189 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
192 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
193 Use .pushsection/.popsection.
195 2018-01-14 Martin Sebor <msebor@redhat.com>
198 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
200 2018-01-14 Jakub Jelinek <jakub@redhat.com>
202 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
203 entry from extra_headers.
204 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
205 extra_headers, make the list bitwise identical to the i?86-*-* one.
207 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
209 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
210 -mcmodel=large with -mindirect-branch=thunk,
211 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
212 -mfunction-return=thunk-extern.
213 * doc/invoke.texi: Document -mcmodel=large is incompatible with
214 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
215 -mfunction-return=thunk and -mfunction-return=thunk-extern.
217 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
219 * config/i386/i386.c (print_reg): Print the name of the full
220 integer register without '%'.
221 (ix86_print_operand): Handle 'V'.
222 * doc/extend.texi: Document 'V' modifier.
224 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
226 * config/i386/constraints.md (Bs): Disallow memory operand for
227 -mindirect-branch-register.
229 * config/i386/predicates.md (indirect_branch_operand): Likewise.
230 (GOT_memory_operand): Likewise.
231 (call_insn_operand): Likewise.
232 (sibcall_insn_operand): Likewise.
233 (GOT32_symbol_operand): Likewise.
234 * config/i386/i386.md (indirect_jump): Call convert_memory_address
235 for -mindirect-branch-register.
236 (tablejump): Likewise.
237 (*sibcall_memory): Likewise.
238 (*sibcall_value_memory): Likewise.
239 Disallow peepholes of indirect call and jump via memory for
240 -mindirect-branch-register.
241 (*call_pop): Replace m with Bw.
242 (*call_value_pop): Likewise.
243 (*sibcall_pop_memory): Replace m with Bs.
244 * config/i386/i386.opt (mindirect-branch-register): New option.
245 * doc/invoke.texi: Document -mindirect-branch-register option.
247 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
249 * config/i386/i386-protos.h (ix86_output_function_return): New.
250 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
251 set function_return_type.
252 (indirect_thunk_name): Add ret_p to indicate thunk for function
254 (output_indirect_thunk_function): Pass false to
256 (ix86_output_indirect_branch_via_reg): Likewise.
257 (ix86_output_indirect_branch_via_push): Likewise.
258 (output_indirect_thunk_function): Create alias for function
259 return thunk if regno < 0.
260 (ix86_output_function_return): New function.
261 (ix86_handle_fndecl_attribute): Handle function_return.
262 (ix86_attribute_table): Add function_return.
263 * config/i386/i386.h (machine_function): Add
264 function_return_type.
265 * config/i386/i386.md (simple_return_internal): Use
266 ix86_output_function_return.
267 (simple_return_internal_long): Likewise.
268 * config/i386/i386.opt (mfunction-return=): New option.
269 (indirect_branch): Mention -mfunction-return=.
270 * doc/extend.texi: Document function_return function attribute.
271 * doc/invoke.texi: Document -mfunction-return= option.
273 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
275 * config/i386/i386-opts.h (indirect_branch): New.
276 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
277 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
278 with local indirect jump when converting indirect call and jump.
279 (ix86_set_indirect_branch_type): New.
280 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
281 (indirectlabelno): New.
282 (indirect_thunk_needed): Likewise.
283 (indirect_thunk_bnd_needed): Likewise.
284 (indirect_thunks_used): Likewise.
285 (indirect_thunks_bnd_used): Likewise.
286 (INDIRECT_LABEL): Likewise.
287 (indirect_thunk_name): Likewise.
288 (output_indirect_thunk): Likewise.
289 (output_indirect_thunk_function): Likewise.
290 (ix86_output_indirect_branch_via_reg): Likewise.
291 (ix86_output_indirect_branch_via_push): Likewise.
292 (ix86_output_indirect_branch): Likewise.
293 (ix86_output_indirect_jmp): Likewise.
294 (ix86_code_end): Call output_indirect_thunk_function if needed.
295 (ix86_output_call_insn): Call ix86_output_indirect_branch if
297 (ix86_handle_fndecl_attribute): Handle indirect_branch.
298 (ix86_attribute_table): Add indirect_branch.
299 * config/i386/i386.h (machine_function): Add indirect_branch_type
300 and has_local_indirect_jump.
301 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
303 (tablejump): Likewise.
304 (*indirect_jump): Use ix86_output_indirect_jmp.
305 (*tablejump_1): Likewise.
306 (simple_return_indirect_internal): Likewise.
307 * config/i386/i386.opt (mindirect-branch=): New option.
308 (indirect_branch): New.
311 (thunk-inline): Likewise.
312 (thunk-extern): Likewise.
313 * doc/extend.texi: Document indirect_branch function attribute.
314 * doc/invoke.texi: Document -mindirect-branch= option.
316 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
319 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
321 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
323 * ipa-inline.c (want_inline_small_function_p): Return false if
324 inlining has already failed with CIF_FINAL_ERROR.
325 (update_caller_keys): Call want_inline_small_function_p before
327 (update_callee_keys): Likewise.
329 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
331 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
333 (rs6000_quadword_masked_address_p): Likewise.
334 (quad_aligned_load_p): Likewise.
335 (quad_aligned_store_p): Likewise.
336 (const_load_sequence_p): Add comment to describe the outer-most loop.
337 (mimic_memory_attributes_and_flags): New function.
338 (rs6000_gen_stvx): Likewise.
339 (replace_swapped_aligned_store): Likewise.
340 (rs6000_gen_lvx): Likewise.
341 (replace_swapped_aligned_load): Likewise.
342 (replace_swapped_load_constant): Capitalize argument name in
343 comment describing this function.
344 (rs6000_analyze_swaps): Add a third pass to search for vector loads
345 and stores that access quad-word aligned addresses and replace
346 with stvx or lvx instructions when appropriate.
347 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
348 New function prototype.
349 (rs6000_quadword_masked_address_p): Likewise.
350 (rs6000_gen_lvx): Likewise.
351 (rs6000_gen_stvx): Likewise.
352 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
353 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
354 when memory address is aligned.
355 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
356 this split to select lvx instruction when memory address is aligned.
357 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
358 instruction when memory address is aligned.
359 (*vsx_le_perm_load_v16qi): Likewise.
360 (four unnamed splitters): Modify to select the stvx instruction
361 when memory is aligned.
363 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
365 * predict.c (determine_unlikely_bbs): Handle correctly BBs
366 which appears in the queue multiple times.
368 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
369 Alan Hayward <alan.hayward@arm.com>
370 David Sherwood <david.sherwood@arm.com>
372 * tree-vectorizer.h (vec_lower_bound): New structure.
373 (_loop_vec_info): Add check_nonzero and lower_bounds.
374 (LOOP_VINFO_CHECK_NONZERO): New macro.
375 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
376 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
377 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
378 fields. Make seg_len the distance travelled, not including the
380 (dr_direction_indicator): Declare.
381 (dr_zero_step_indicator): Likewise.
382 (dr_known_forward_stride_p): Likewise.
383 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
385 (runtime_alias_check_p): Allow runtime alias checks with
387 (operator ==): Compare access_size and align.
388 (prune_runtime_alias_test_list): Rework for new distinction between
389 the access_size and seg_len.
390 (create_intersect_range_checks_index): Likewise. Cope with polynomial
392 (get_segment_min_max): New function.
393 (create_intersect_range_checks): Use it.
394 (dr_step_indicator): New function.
395 (dr_direction_indicator): Likewise.
396 (dr_zero_step_indicator): Likewise.
397 (dr_known_forward_stride_p): Likewise.
398 * tree-loop-distribution.c (data_ref_segment_size): Return
399 DR_STEP * (niters - 1).
400 (compute_alias_check_pairs): Update call to the dr_with_seg_len
402 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
403 (vect_preserves_scalar_order_p): New function, split out from...
404 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
405 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
406 (vect_vfa_access_size): New function.
407 (vect_vfa_align): Likewise.
408 (vect_compile_time_alias): Take access_size_a and access_b arguments.
409 (dump_lower_bound): New function.
410 (vect_check_lower_bound): Likewise.
411 (vect_small_gap_p): Likewise.
412 (vectorizable_with_step_bound_p): Likewise.
413 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
414 depencies if the vectorization factor is 1. Convert the checks
415 for nonzero steps into checks on the bounds of DR_STEP. Try using
416 a bunds check for variable steps if the minimum required step is
417 relatively small. Update calls to the dr_with_seg_len
418 constructor and to vect_compile_time_alias.
419 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
421 (vect_loop_versioning): Call it.
422 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
424 (vect_estimate_min_profitable_iters): Account for any bounds checks.
426 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
427 Alan Hayward <alan.hayward@arm.com>
428 David Sherwood <david.sherwood@arm.com>
430 * doc/sourcebuild.texi (vect_scatter_store): Document.
431 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
433 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
435 * genopinit.c (main): Add supports_vec_scatter_store and
436 supports_vec_scatter_store_cached to target_optabs.
437 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
438 IFN_MASK_SCATTER_STORE.
439 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
441 * internal-fn.h (internal_store_fn_p): Declare.
442 (internal_fn_stored_value_index): Likewise.
443 * internal-fn.c (scatter_store_direct): New macro.
444 (expand_scatter_store_optab_fn): New function.
445 (direct_scatter_store_optab_supported_p): New macro.
446 (internal_store_fn_p): New function.
447 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
448 IFN_MASK_SCATTER_STORE.
449 (internal_fn_mask_index): Likewise.
450 (internal_fn_stored_value_index): New function.
451 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
453 * optabs-query.h (supports_vec_scatter_store_p): Declare.
454 * optabs-query.c (supports_vec_scatter_store_p): New function.
455 * tree-vectorizer.h (vect_get_store_rhs): Declare.
456 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
457 true for scatter stores.
458 (vect_gather_scatter_fn_p): Handle scatter stores too.
459 (vect_check_gather_scatter): Consider using scatter stores if
460 supports_vec_scatter_store_p.
461 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
463 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
464 internal_fn_stored_value_index.
465 (check_load_store_masking): Handle scatter stores too.
466 (vect_get_store_rhs): Make public.
467 (vectorizable_call): Use internal_store_fn_p.
468 (vectorizable_store): Handle scatter store internal functions.
469 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
470 when deciding whether the end of the group has been reached.
471 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
472 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
473 (mask_scatter_store<mode>): New insns.
475 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
476 Alan Hayward <alan.hayward@arm.com>
477 David Sherwood <david.sherwood@arm.com>
479 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
480 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
481 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
483 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
484 Use vect_truncate_gather_scatter_offset if we can't treat the
485 operation as a normal gather load or scatter store.
486 (get_group_load_store_type): Take the gather_scatter_info
487 as argument. Try using a gather load or scatter store for
488 single-element groups.
489 (get_load_store_type): Update calls to get_group_load_store_type
490 and vect_use_strided_gather_scatters_p.
492 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
493 Alan Hayward <alan.hayward@arm.com>
494 David Sherwood <david.sherwood@arm.com>
496 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
497 optional tree argument.
498 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
500 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
501 but continue to use the current value as a fallback.
502 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
503 to compare the updates.
504 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
505 (get_load_store_type): Use it when handling a strided access.
506 (vect_get_strided_load_store_ops): New function.
507 (vect_get_data_ptr_increment): Likewise.
508 (vectorizable_load): Handle strided gather loads. Always pass
509 a step to vect_create_data_ref_ptr and bump_vector_ptr.
511 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
512 Alan Hayward <alan.hayward@arm.com>
513 David Sherwood <david.sherwood@arm.com>
515 * doc/md.texi (gather_load@var{m}): Document.
516 (mask_gather_load@var{m}): Likewise.
517 * genopinit.c (main): Add supports_vec_gather_load and
518 supports_vec_gather_load_cached to target_optabs.
519 * optabs-tree.c (init_tree_optimization_optabs): Use
520 ggc_cleared_alloc to allocate target_optabs.
521 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
522 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
524 * internal-fn.h (internal_load_fn_p): Declare.
525 (internal_gather_scatter_fn_p): Likewise.
526 (internal_fn_mask_index): Likewise.
527 (internal_gather_scatter_fn_supported_p): Likewise.
528 * internal-fn.c (gather_load_direct): New macro.
529 (expand_gather_load_optab_fn): New function.
530 (direct_gather_load_optab_supported_p): New macro.
531 (direct_internal_fn_optab): New function.
532 (internal_load_fn_p): Likewise.
533 (internal_gather_scatter_fn_p): Likewise.
534 (internal_fn_mask_index): Likewise.
535 (internal_gather_scatter_fn_supported_p): Likewise.
536 * optabs-query.c (supports_at_least_one_mode_p): New function.
537 (supports_vec_gather_load_p): Likewise.
538 * optabs-query.h (supports_vec_gather_load_p): Declare.
539 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
540 and memory_type field.
541 (NUM_PATTERNS): Bump to 15.
542 * tree-vect-data-refs.c: Include internal-fn.h.
543 (vect_gather_scatter_fn_p): New function.
544 (vect_describe_gather_scatter_call): Likewise.
545 (vect_check_gather_scatter): Try using internal functions for
546 gather loads. Recognize existing calls to a gather load function.
547 (vect_analyze_data_refs): Consider using gather loads if
548 supports_vec_gather_load_p.
549 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
550 (vect_get_gather_scatter_offset_type): Likewise.
551 (vect_convert_mask_for_vectype): Likewise.
552 (vect_add_conversion_to_patterm): Likewise.
553 (vect_try_gather_scatter_pattern): Likewise.
554 (vect_recog_gather_scatter_pattern): New pattern recognizer.
555 (vect_vect_recog_func_ptrs): Add it.
556 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
557 internal_fn_mask_index and internal_gather_scatter_fn_p.
558 (check_load_store_masking): Take the gather_scatter_info as an
559 argument and handle gather loads.
560 (vect_get_gather_scatter_ops): New function.
561 (vectorizable_call): Check internal_load_fn_p.
562 (vectorizable_load): Likewise. Handle gather load internal
564 (vectorizable_store): Update call to check_load_store_masking.
565 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
566 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
567 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
568 (aarch64_gather_scale_operand_d): New predicates.
569 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
570 (mask_gather_load<mode>): New insns.
572 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
573 Alan Hayward <alan.hayward@arm.com>
574 David Sherwood <david.sherwood@arm.com>
576 * optabs.def (fold_left_plus_optab): New optab.
577 * doc/md.texi (fold_left_plus_@var{m}): Document.
578 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
579 * internal-fn.c (fold_left_direct): Define.
580 (expand_fold_left_optab_fn): Likewise.
581 (direct_fold_left_optab_supported_p): Likewise.
582 * fold-const-call.c (fold_const_fold_left): New function.
583 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
584 * tree-parloops.c (valid_reduction_p): New function.
585 (gather_scalar_reductions): Use it.
586 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
587 (vect_finish_replace_stmt): Declare.
588 * tree-vect-loop.c (fold_left_reduction_fn): New function.
589 (needs_fold_left_reduction_p): New function, split out from...
590 (vect_is_simple_reduction): ...here. Accept reductions that
591 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
592 (vect_force_simple_reduction): Also store the reduction type in
593 the assignment's STMT_VINFO_REDUC_TYPE.
594 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
595 (merge_with_identity): New function.
596 (vect_expand_fold_left): Likewise.
597 (vectorize_fold_left_reduction): Likewise.
598 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
599 scalar phi in place for it. Check for target support and reject
600 cases that would reassociate the operation. Defer the transform
601 phase to vectorize_fold_left_reduction.
602 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
603 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
604 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
606 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
608 * tree-if-conv.c (predicate_mem_writes): Remove redundant
609 call to ifc_temp_var.
611 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
612 Alan Hayward <alan.hayward@arm.com>
613 David Sherwood <david.sherwood@arm.com>
615 * target.def (legitimize_address_displacement): Take the original
616 offset as a poly_int.
617 * targhooks.h (default_legitimize_address_displacement): Update
619 * targhooks.c (default_legitimize_address_displacement): Likewise.
620 * doc/tm.texi: Regenerate.
621 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
622 as an argument, moving assert of ad->disp == ad->disp_term to...
623 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
624 Try calling targetm.legitimize_address_displacement before expanding
625 the address rather than afterwards, and adjust for the new interface.
626 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
627 Match the new hook interface. Handle SVE addresses.
628 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
631 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
633 * Makefile.in (OBJS): Add early-remat.o.
634 * target.def (select_early_remat_modes): New hook.
635 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
636 * doc/tm.texi: Regenerate.
637 * targhooks.h (default_select_early_remat_modes): Declare.
638 * targhooks.c (default_select_early_remat_modes): New function.
639 * timevar.def (TV_EARLY_REMAT): New timevar.
640 * passes.def (pass_early_remat): New pass.
641 * tree-pass.h (make_pass_early_remat): Declare.
642 * early-remat.c: New file.
643 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
645 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
647 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
648 Alan Hayward <alan.hayward@arm.com>
649 David Sherwood <david.sherwood@arm.com>
651 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
652 vfm1 with a bound_epilog parameter.
653 (vect_do_peeling): Update calls accordingly, and move the prologue
654 call earlier in the function. Treat the base bound_epilog as 0 for
655 fully-masked loops and retain vf - 1 for other loops. Add 1 to
656 this base when peeling for gaps.
657 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
658 with fully-masked loops.
659 (vect_estimate_min_profitable_iters): Handle the single peeled
660 iteration in that case.
662 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
663 Alan Hayward <alan.hayward@arm.com>
664 David Sherwood <david.sherwood@arm.com>
666 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
667 single-element interleaving even if the size is not a power of 2.
668 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
669 accesses for single-element interleaving if the group size is
672 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
673 Alan Hayward <alan.hayward@arm.com>
674 David Sherwood <david.sherwood@arm.com>
676 * doc/md.texi (fold_extract_last_@var{m}): Document.
677 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
678 * optabs.def (fold_extract_last_optab): New optab.
679 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
680 * internal-fn.c (fold_extract_direct): New macro.
681 (expand_fold_extract_optab_fn): Likewise.
682 (direct_fold_extract_optab_supported_p): Likewise.
683 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
684 * tree-vect-loop.c (vect_model_reduction_cost): Handle
685 EXTRACT_LAST_REDUCTION.
686 (get_initial_def_for_reduction): Do not create an initial vector
687 for EXTRACT_LAST_REDUCTION reductions.
688 (vectorizable_reduction): Leave the scalar phi in place for
689 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
690 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
691 epilogue code for EXTRACT_LAST_REDUCTION and defer the
692 transform phase to vectorizable_condition.
693 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
695 (vect_finish_stmt_generation): ...here.
696 (vect_finish_replace_stmt): New function.
697 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
698 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
700 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
702 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
703 Alan Hayward <alan.hayward@arm.com>
704 David Sherwood <david.sherwood@arm.com>
706 * doc/md.texi (extract_last_@var{m}): Document.
707 * optabs.def (extract_last_optab): New optab.
708 * internal-fn.def (EXTRACT_LAST): New internal function.
709 * internal-fn.c (cond_unary_direct): New macro.
710 (expand_cond_unary_optab_fn): Likewise.
711 (direct_cond_unary_optab_supported_p): Likewise.
712 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
713 loops using EXTRACT_LAST.
714 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
715 (extract_last_<mode>): ...this optab.
716 (vec_extract<mode><Vel>): Update accordingly.
718 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
719 Alan Hayward <alan.hayward@arm.com>
720 David Sherwood <david.sherwood@arm.com>
722 * target.def (empty_mask_is_expensive): New hook.
723 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
724 * doc/tm.texi: Regenerate.
725 * targhooks.h (default_empty_mask_is_expensive): Declare.
726 * targhooks.c (default_empty_mask_is_expensive): New function.
727 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
728 if the target says that empty masks are expensive.
729 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
731 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
733 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
734 Alan Hayward <alan.hayward@arm.com>
735 David Sherwood <david.sherwood@arm.com>
737 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
738 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
739 (vect_use_loop_mask_for_alignment_p): New function.
740 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
741 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
742 niters_skip argument. Make sure that the first niters_skip elements
743 of the first iteration are inactive.
744 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
745 Update call to vect_set_loop_masks_directly.
746 (get_misalign_in_elems): New function, split out from...
747 (vect_gen_prolog_loop_niters): ...here.
748 (vect_update_init_of_dr): Take a code argument that specifies whether
749 the adjustment should be added or subtracted.
750 (vect_update_init_of_drs): Likewise.
751 (vect_prepare_for_masked_peels): New function.
752 (vect_do_peeling): Skip prologue peeling if we're using a mask
753 instead. Update call to vect_update_inits_of_drs.
754 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
756 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
757 alignment. Do not include the number of peeled iterations in
758 the minimum threshold in that case.
759 (vectorizable_induction): Adjust the start value down by
760 LOOP_VINFO_MASK_SKIP_NITERS iterations.
761 (vect_transform_loop): Call vect_prepare_for_masked_peels.
762 Take the number of skipped iterations into account when calculating
764 * tree-vect-stmts.c (vect_gen_while_not): New function.
766 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
767 Alan Hayward <alan.hayward@arm.com>
768 David Sherwood <david.sherwood@arm.com>
770 * doc/sourcebuild.texi (vect_fully_masked): Document.
771 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
773 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
775 (vect_analyze_loop_2): ...here. Don't check the vectorization
776 factor against the number of loop iterations if the loop is
779 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
780 Alan Hayward <alan.hayward@arm.com>
781 David Sherwood <david.sherwood@arm.com>
783 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
784 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
785 (dump_groups): Update accordingly.
786 (iv_use::mem_type): New member variable.
787 (address_p): New function.
788 (record_use): Add a mem_type argument and initialize the new
790 (record_group_use): Add a mem_type argument. Use address_p.
791 Remove obsolete null checks of base_object. Update call to record_use.
792 (find_interesting_uses_op): Update call to record_group_use.
793 (find_interesting_uses_cond): Likewise.
794 (find_interesting_uses_address): Likewise.
795 (get_mem_type_for_internal_fn): New function.
796 (find_address_like_use): Likewise.
797 (find_interesting_uses_stmt): Try find_address_like_use before
798 calling find_interesting_uses_op.
799 (addr_offset_valid_p): Use the iv mem_type field as the type
800 of the addressed memory.
801 (add_autoinc_candidates): Likewise.
802 (get_address_cost): Likewise.
803 (split_small_address_groups_p): Use address_p.
804 (split_address_groups): Likewise.
805 (add_iv_candidate_for_use): Likewise.
806 (autoinc_possible_for_pair): Likewise.
807 (rewrite_groups): Likewise.
808 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
809 (determine_group_iv_cost): Update after split of USE_ADDRESS.
810 (get_alias_ptr_type_for_ptr_address): New function.
811 (rewrite_use_address): Rewrite address uses in calls that were
812 identified by find_address_like_use.
814 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
815 Alan Hayward <alan.hayward@arm.com>
816 David Sherwood <david.sherwood@arm.com>
818 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
820 * gimple-expr.h (is_gimple_addressable: Likewise.
821 * gimple-expr.c (is_gimple_address): Likewise.
822 * internal-fn.c (expand_call_mem_ref): New function.
823 (expand_mask_load_optab_fn): Use it.
824 (expand_mask_store_optab_fn): Likewise.
826 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
827 Alan Hayward <alan.hayward@arm.com>
828 David Sherwood <david.sherwood@arm.com>
830 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
831 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
832 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
833 (cond_umax@var{mode}): Document.
834 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
835 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
836 (cond_umin_optab, cond_umax_optab): New optabs.
837 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
838 (COND_IOR, COND_XOR): New internal functions.
839 * internal-fn.h (get_conditional_internal_fn): Declare.
840 * internal-fn.c (cond_binary_direct): New macro.
841 (expand_cond_binary_optab_fn): Likewise.
842 (direct_cond_binary_optab_supported_p): Likewise.
843 (get_conditional_internal_fn): New function.
844 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
845 Cope with reduction statements that are vectorized as calls rather
847 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
848 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
849 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
850 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
851 (UNSPEC_COND_EOR): New unspecs.
852 (optab): Add mappings for them.
853 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
854 (sve_int_op, sve_fp_op): New int attributes.
856 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
857 Alan Hayward <alan.hayward@arm.com>
858 David Sherwood <david.sherwood@arm.com>
860 * optabs.def (while_ult_optab): New optab.
861 * doc/md.texi (while_ult@var{m}@var{n}): Document.
862 * internal-fn.def (WHILE_ULT): New internal function.
863 * internal-fn.h (direct_internal_fn_supported_p): New override
864 that takes two types as argument.
865 * internal-fn.c (while_direct): New macro.
866 (expand_while_optab_fn): New function.
867 (convert_optab_supported_p): Likewise.
868 (direct_while_optab_supported_p): New macro.
869 * wide-int.h (wi::udiv_ceil): New function.
870 * tree-vectorizer.h (rgroup_masks): New structure.
871 (vec_loop_masks): New typedef.
872 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
874 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
875 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
876 (vect_max_vf): New function.
877 (slpeel_make_loop_iterate_ntimes): Delete.
878 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
879 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
880 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
881 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
882 internal-fn.h, stor-layout.h and optabs-query.h.
883 (vect_set_loop_mask): New function.
884 (add_preheader_seq): Likewise.
885 (add_header_seq): Likewise.
886 (interleave_supported_p): Likewise.
887 (vect_maybe_permute_loop_masks): Likewise.
888 (vect_set_loop_masks_directly): Likewise.
889 (vect_set_loop_condition_masked): Likewise.
890 (vect_set_loop_condition_unmasked): New function, split out from
891 slpeel_make_loop_iterate_ntimes.
892 (slpeel_make_loop_iterate_ntimes): Rename to..
893 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
894 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
895 (vect_do_peeling): Update call accordingly.
896 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
898 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
899 mask_compare_type, can_fully_mask_p and fully_masked_p.
900 (release_vec_loop_masks): New function.
901 (_loop_vec_info): Use it to free the loop masks.
902 (can_produce_all_loop_masks_p): New function.
903 (vect_get_max_nscalars_per_iter): Likewise.
904 (vect_verify_full_masking): Likewise.
905 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
906 retries, and free the mask rgroups before retrying. Check loop-wide
907 reasons for disallowing fully-masked loops. Make the final decision
908 about whether use a fully-masked loop or not.
909 (vect_estimate_min_profitable_iters): Do not assume that peeling
910 for the number of iterations will be needed for fully-masked loops.
911 (vectorizable_reduction): Disable fully-masked loops.
912 (vectorizable_live_operation): Likewise.
913 (vect_halve_mask_nunits): New function.
914 (vect_double_mask_nunits): Likewise.
915 (vect_record_loop_mask): Likewise.
916 (vect_get_loop_mask): Likewise.
917 (vect_transform_loop): Handle the case in which the final loop
918 iteration might handle a partial vector. Call vect_set_loop_condition
919 instead of slpeel_make_loop_iterate_ntimes.
920 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
921 (check_load_store_masking): New function.
922 (prepare_load_store_mask): Likewise.
923 (vectorizable_store): Handle fully-masked loops.
924 (vectorizable_load): Likewise.
925 (supportable_widening_operation): Use vect_halve_mask_nunits for
927 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
928 (vect_gen_while): New function.
929 * config/aarch64/aarch64.md (umax<mode>3): New expander.
930 (aarch64_uqdec<mode>): New insn.
932 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
933 Alan Hayward <alan.hayward@arm.com>
934 David Sherwood <david.sherwood@arm.com>
936 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
937 (reduc_xor_scal_optab): New optabs.
938 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
939 (reduc_xor_scal_@var{m}): Document.
940 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
941 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
943 * fold-const-call.c (fold_const_call): Handle them.
944 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
945 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
946 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
947 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
948 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
949 (UNSPEC_XORV): New unspecs.
950 (optab): Add entries for them.
951 (BITWISEV): New int iterator.
952 (bit_reduc_op): New int attributes.
954 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
955 Alan Hayward <alan.hayward@arm.com>
956 David Sherwood <david.sherwood@arm.com>
958 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
959 * internal-fn.def (VEC_SHL_INSERT): New internal function.
960 * optabs.def (vec_shl_insert_optab): New optab.
961 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
962 (duplicate_and_interleave): Likewise.
963 * tree-vect-loop.c: Include internal-fn.h.
964 (neutral_op_for_slp_reduction): New function, split out from
965 get_initial_defs_for_reduction.
966 (get_initial_def_for_reduction): Handle option 2 for variable-length
967 vectors by loading the neutral value into a vector and then shifting
968 the initial value into element 0.
969 (get_initial_defs_for_reduction): Replace the code argument with
970 the neutral value calculated by neutral_op_for_slp_reduction.
971 Use gimple_build_vector for constant-length vectors.
972 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
973 but the first group_size elements have a neutral value.
974 Use duplicate_and_interleave otherwise.
975 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
976 Update call to get_initial_defs_for_reduction. Handle SLP
977 reductions for variable-length vectors by creating one vector
978 result for each scalar result, with the elements associated
979 with other scalar results stubbed out with the neutral value.
980 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
981 Require IFN_VEC_SHL_INSERT for double reductions on
982 variable-length vectors, or SLP reductions that have
983 a neutral value. Require can_duplicate_and_interleave_p
984 support for variable-length unchained SLP reductions if there
985 is no neutral value, such as for MIN/MAX reductions. Also require
986 the number of vector elements to be a multiple of the number of
987 SLP statements when doing variable-length unchained SLP reductions.
988 Update call to vect_create_epilog_for_reduction.
989 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
990 and remove initial values.
991 (duplicate_and_interleave): Make public.
992 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
993 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
995 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
996 Alan Hayward <alan.hayward@arm.com>
997 David Sherwood <david.sherwood@arm.com>
999 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1000 (can_duplicate_and_interleave_p): New function.
1001 (vect_get_and_check_slp_defs): Take the vector of statements
1002 rather than just the current one. Remove excess parentheses.
1003 Restriction rejectinon of vect_constant_def and vect_external_def
1004 for variable-length vectors to boolean types, or types for which
1005 can_duplicate_and_interleave_p is false.
1006 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1007 (duplicate_and_interleave): New function.
1008 (vect_get_constant_vectors): Use gimple_build_vector for
1009 constant-length vectors and suitable variable-length constant
1010 vectors. Use duplicate_and_interleave for other variable-length
1011 vectors. Don't defer the update when inserting new statements.
1013 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1014 Alan Hayward <alan.hayward@arm.com>
1015 David Sherwood <david.sherwood@arm.com>
1017 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1018 min_profitable_iters doesn't go negative.
1020 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1021 Alan Hayward <alan.hayward@arm.com>
1022 David Sherwood <david.sherwood@arm.com>
1024 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1025 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1026 * optabs.def (vec_mask_load_lanes_optab): New optab.
1027 (vec_mask_store_lanes_optab): Likewise.
1028 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1029 (MASK_STORE_LANES): Likewise.
1030 * internal-fn.c (mask_load_lanes_direct): New macro.
1031 (mask_store_lanes_direct): Likewise.
1032 (expand_mask_load_optab_fn): Handle masked operations.
1033 (expand_mask_load_lanes_optab_fn): New macro.
1034 (expand_mask_store_optab_fn): Handle masked operations.
1035 (expand_mask_store_lanes_optab_fn): New macro.
1036 (direct_mask_load_lanes_optab_supported_p): Likewise.
1037 (direct_mask_store_lanes_optab_supported_p): Likewise.
1038 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1040 (vect_load_lanes_supported): Likewise.
1041 * tree-vect-data-refs.c (strip_conversion): New function.
1042 (can_group_stmts_p): Likewise.
1043 (vect_analyze_data_ref_accesses): Use it instead of checking
1044 for a pair of assignments.
1045 (vect_store_lanes_supported): Take a masked_p parameter.
1046 (vect_load_lanes_supported): Likewise.
1047 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1048 vect_store_lanes_supported and vect_load_lanes_supported.
1049 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1050 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1051 parameter. Don't allow gaps for masked accesses.
1052 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1053 and vect_load_lanes_supported.
1054 (get_load_store_type): Take a masked_p parameter and update
1055 call to get_group_load_store_type.
1056 (vectorizable_store): Update call to get_load_store_type.
1057 Handle IFN_MASK_STORE_LANES.
1058 (vectorizable_load): Update call to get_load_store_type.
1059 Handle IFN_MASK_LOAD_LANES.
1061 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1062 Alan Hayward <alan.hayward@arm.com>
1063 David Sherwood <david.sherwood@arm.com>
1065 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1067 * config/aarch64/aarch64-protos.h
1068 (aarch64_sve_struct_memory_operand_p): Declare.
1069 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1070 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1071 (VPRED, vpred): Handle SVE structure modes.
1072 * config/aarch64/constraints.md (Utx): New constraint.
1073 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1074 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1075 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1076 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1077 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1078 structure modes. Split into pieces after RA.
1079 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1080 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1082 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1083 SVE structure modes.
1084 (aarch64_classify_address): Likewise.
1085 (sizetochar): Move earlier in file.
1086 (aarch64_print_operand): Handle SVE register lists.
1087 (aarch64_array_mode): New function.
1088 (aarch64_sve_struct_memory_operand_p): Likewise.
1089 (TARGET_ARRAY_MODE): Redefine.
1091 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1092 Alan Hayward <alan.hayward@arm.com>
1093 David Sherwood <david.sherwood@arm.com>
1095 * target.def (array_mode): New target hook.
1096 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1097 * doc/tm.texi: Regenerate.
1098 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1099 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1100 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1102 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1105 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1106 Alan Hayward <alan.hayward@arm.com>
1107 David Sherwood <david.sherwood@arm.com>
1109 * fold-const.c (fold_binary_loc): Check the argument types
1110 rather than the result type when testing for a vector operation.
1112 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1114 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1115 * doc/tm.texi: Regenerate.
1117 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1118 Alan Hayward <alan.hayward@arm.com>
1119 David Sherwood <david.sherwood@arm.com>
1121 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1122 (sve): Document new AArch64 extension.
1123 * doc/md.texi (w): Extend the description of the AArch64
1124 constraint to include SVE vectors.
1125 (Upl, Upa): Document new AArch64 predicate constraints.
1126 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1128 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1129 (msve-vector-bits=): New option.
1130 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1131 SVE when these are disabled.
1132 (sve): New extension.
1133 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1134 modes. Adjust their number of units based on aarch64_sve_vg.
1135 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1136 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1137 aarch64_addr_query_type.
1138 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1139 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1140 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1141 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1142 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1143 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1144 (aarch64_simd_imm_zero_p): Delete.
1145 (aarch64_check_zero_based_sve_index_immediate): Declare.
1146 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1147 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1148 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1149 (aarch64_sve_float_mul_immediate_p): Likewise.
1150 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1152 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1153 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1154 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1155 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1156 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1157 (aarch64_regmode_natural_size): Likewise.
1158 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1159 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1161 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1162 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1163 for VG and the SVE predicate registers.
1164 (V_ALIASES): Add a "z"-prefixed alias.
1165 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1166 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1167 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1168 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1169 (REG_CLASS_NAMES): Add entries for them.
1170 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1171 and the predicate registers.
1172 (aarch64_sve_vg): Declare.
1173 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1174 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1175 (REGMODE_NATURAL_SIZE): Define.
1176 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1178 * config/aarch64/aarch64.c: Include cfgrtl.h.
1179 (simd_immediate_info): Add a constructor for series vectors,
1180 and an associated step field.
1181 (aarch64_sve_vg): New variable.
1182 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1183 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1184 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1185 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1186 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1187 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1188 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1189 (aarch64_get_mask_mode): New functions.
1190 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1191 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1192 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1193 predicate modes and predicate registers. Explicitly restrict
1194 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1195 to store a vector mode if it is recognized by
1196 aarch64_classify_vector_mode.
1197 (aarch64_regmode_natural_size): New function.
1198 (aarch64_hard_regno_caller_save_mode): Return the original mode
1200 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1201 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1202 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1203 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1205 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1206 does not overlap dest if the function is frame-related. Handle
1208 (aarch64_split_add_offset): New function.
1209 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1210 them aarch64_add_offset.
1211 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1212 and update call to aarch64_sub_sp.
1213 (aarch64_add_cfa_expression): New function.
1214 (aarch64_expand_prologue): Pass extra temporary registers to the
1215 functions above. Handle the case in which we need to emit new
1216 DW_CFA_expressions for registers that were originally saved
1217 relative to the stack pointer, but now have to be expressed
1218 relative to the frame pointer.
1219 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1221 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1222 IP0 and IP1 values for SVE frames.
1223 (aarch64_expand_vec_series): New function.
1224 (aarch64_expand_sve_widened_duplicate): Likewise.
1225 (aarch64_expand_sve_const_vector): Likewise.
1226 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1227 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1228 into the register, rather than emitting a SET directly.
1229 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1230 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1231 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1232 (offset_9bit_signed_scaled_p): New functions.
1233 (aarch64_replicate_bitmask_imm): New function.
1234 (aarch64_bitmask_imm): Use it.
1235 (aarch64_cannot_force_const_mem): Reject expressions involving
1236 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1237 (aarch64_classify_index): Handle SVE indices, by requiring
1238 a plain register index with a scale that matches the element size.
1239 (aarch64_classify_address): Handle SVE addresses. Assert that
1240 the mode of the address is VOIDmode or an integer mode.
1241 Update call to aarch64_classify_symbol.
1242 (aarch64_classify_symbolic_expression): Update call to
1243 aarch64_classify_symbol.
1244 (aarch64_const_vec_all_in_range_p): New function.
1245 (aarch64_print_vector_float_operand): Likewise.
1246 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1247 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1248 and the FP immediates 1.0 and 0.5.
1249 (aarch64_print_address_internal): Handle SVE addresses.
1250 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1251 (aarch64_regno_regclass): Handle predicate registers.
1252 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1254 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1255 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1256 (aarch64_convert_sve_vector_bits): New function.
1257 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1258 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1260 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1261 Handle SVE vector and predicate modes. Accept VL-based constants
1262 that need only one temporary register, and VL offsets that require
1263 no temporary registers.
1264 (aarch64_conditional_register_usage): Mark the predicate registers
1265 as fixed if SVE isn't available.
1266 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1267 Return true for SVE vector and predicate modes.
1268 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1269 rather than an unsigned int. Handle SVE modes.
1270 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1272 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1274 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1275 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1276 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1277 (aarch64_sve_float_mul_immediate_p): New functions.
1278 (aarch64_sve_valid_immediate): New function.
1279 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1280 Explicitly reject structure modes. Check for INDEX constants.
1281 Handle PTRUE and PFALSE constants.
1282 (aarch64_check_zero_based_sve_index_immediate): New function.
1283 (aarch64_simd_imm_zero_p): Delete.
1284 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1285 vector modes. Accept constants in the range of CNT[BHWD].
1286 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1287 ask for an Advanced SIMD mode.
1288 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1289 (aarch64_simd_vector_alignment): Handle SVE predicates.
1290 (aarch64_vectorize_preferred_vector_alignment): New function.
1291 (aarch64_simd_vector_alignment_reachable): Use it instead of
1293 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1294 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1296 (MAX_VECT_LEN): Delete.
1297 (expand_vec_perm_d): Add a vec_flags field.
1298 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1299 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1300 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1302 (aarch64_evpc_rev): Rename to...
1303 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1304 (aarch64_evpc_rev_global): New function.
1305 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1306 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1308 (aarch64_evpc_sve_tbl): New function.
1309 (aarch64_expand_vec_perm_const_1): Update after rename of
1310 aarch64_evpc_rev. Handle SVE permutes too, trying
1311 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1312 than aarch64_evpc_tbl.
1313 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1314 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1315 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1316 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1317 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1318 (aarch64_expand_sve_vcond): New functions.
1319 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1320 of aarch64_vector_mode_p.
1321 (aarch64_dwarf_poly_indeterminate_value): New function.
1322 (aarch64_compute_pressure_classes): Likewise.
1323 (aarch64_can_change_mode_class): Likewise.
1324 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1325 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1326 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1327 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1328 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1329 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1330 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1331 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1333 (Dn, Dl, Dr): Accept const as well as const_vector.
1334 (Dz): Likewise. Compare against CONST0_RTX.
1335 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1336 of "vector" where appropriate.
1337 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1338 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1339 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1340 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1341 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1342 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1343 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1344 (v_int_equiv): Extend to SVE modes.
1345 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1347 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1348 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1349 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1350 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1351 (SVE_COND_FP_CMP): New int iterators.
1352 (perm_hilo): Handle the new unpack unspecs.
1353 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1355 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1356 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1357 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1358 (aarch64_equality_operator, aarch64_constant_vector_operand)
1359 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1360 (aarch64_sve_nonimmediate_operand): Likewise.
1361 (aarch64_sve_general_operand): Likewise.
1362 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1363 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1364 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1365 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1366 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1367 (aarch64_sve_float_arith_immediate): Likewise.
1368 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1369 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1370 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1371 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1372 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1373 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1374 (aarch64_sve_float_arith_operand): Likewise.
1375 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1376 (aarch64_sve_float_mul_operand): Likewise.
1377 (aarch64_sve_vec_perm_operand): Likewise.
1378 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1379 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1380 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1381 as well as const_vector.
1382 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1383 in file. Use CONST0_RTX and CONSTM1_RTX.
1384 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1385 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1386 Use aarch64_simd_imm_zero.
1387 * config/aarch64/aarch64-sve.md: New file.
1388 * config/aarch64/aarch64.md: Include it.
1389 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1390 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1391 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1392 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1393 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1394 (sve): New attribute.
1395 (enabled): Disable instructions with the sve attribute unless
1397 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1398 aarch64_expand_mov_immediate.
1399 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1400 CNT[BHSD] immediates.
1401 (movti): Split CONST_POLY_INT moves into two halves.
1402 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1403 Split additions that need a temporary here if the destination
1404 is the stack pointer.
1405 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1406 (*add<mode>3_poly_1): New instruction.
1407 (set_clobber_cc): New expander.
1409 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1411 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1412 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1413 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1414 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1415 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1416 Change innermode from fixed_mode_size to machine_mode.
1417 (simplify_subreg): Update call accordingly. Handle a constant-sized
1418 subreg of a variable-length CONST_VECTOR.
1420 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1421 Alan Hayward <alan.hayward@arm.com>
1422 David Sherwood <david.sherwood@arm.com>
1424 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1425 (add_offset_to_base): New function, split out from...
1426 (create_mem_ref): ...here. When handling a scale other than 1,
1427 check first whether the address is valid without the offset.
1428 Add it into the base if so, leaving the index and scale as-is.
1430 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1433 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1434 fold_for_warn before checking if arg2 is INTEGER_CST.
1436 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1438 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1439 (store_multiple_operation): Delete.
1440 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1441 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1442 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1443 guarded by TARGET_STRING.
1444 (rs6000_output_load_multiple): Delete.
1445 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1446 OPTION_MASK_STRING / TARGET_STRING handling.
1447 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1448 (const rs6000_opt_masks) <"string">: Change mask to 0.
1449 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1450 (MASK_STRING): Delete.
1451 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1453 (load_multiple): Delete.
1460 (store_multiple): Delete.
1467 (movmemsi_8reg): Delete.
1468 (corresponding unnamed define_insn): Delete.
1469 (movmemsi_6reg): Delete.
1470 (corresponding unnamed define_insn): Delete.
1471 (movmemsi_4reg): Delete.
1472 (corresponding unnamed define_insn): Delete.
1473 (movmemsi_2reg): Delete.
1474 (corresponding unnamed define_insn): Delete.
1475 (movmemsi_1reg): Delete.
1476 (corresponding unnamed define_insn): Delete.
1477 * config/rs6000/rs6000.opt (mno-string): New.
1478 (mstring): Replace by deprecation warning stub.
1479 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1481 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1483 * regrename.c (regrename_do_replace): If replacing the same
1484 reg multiple times, try to reuse last created gen_raw_REG.
1487 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1488 main to workaround a bug in GDB.
1490 2018-01-12 Tom de Vries <tom@codesourcery.com>
1493 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1495 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1497 PR rtl-optimization/80481
1498 * ira-color.c (get_cap_member): New function.
1499 (allocnos_conflict_by_live_ranges_p): Use it.
1500 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1501 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1503 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1506 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1507 (*saddl_se_1): Ditto.
1509 (*saddl_se_1): Ditto.
1511 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1513 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1514 rather than wi::to_widest for DR_INITs.
1515 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1516 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1517 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1519 (vect_analyze_group_access_1): Note that here.
1521 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1523 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1524 polynomial type sizes.
1526 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1528 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1529 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1530 (gimple_add_tmp_var): Likewise.
1532 2018-01-12 Martin Liska <mliska@suse.cz>
1534 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1535 (gimple_alloc_sizes): Likewise.
1536 (dump_gimple_statistics): Use PRIu64 in printf format.
1537 * gimple.h: Change uint64_t to int.
1539 2018-01-12 Martin Liska <mliska@suse.cz>
1541 * tree-core.h: Use uint64_t instead of int.
1542 * tree.c (tree_node_counts): Likewise.
1543 (tree_node_sizes): Likewise.
1544 (dump_tree_statistics): Use PRIu64 in printf format.
1546 2018-01-12 Martin Liska <mliska@suse.cz>
1548 * Makefile.in: As qsort_chk is implemented in vec.c, add
1549 vec.o to linkage of gencfn-macros.
1550 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1551 passing the info to record_node_allocation_statistics.
1552 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1554 * ggc-common.c (struct ggc_usage): Add operator== and use
1555 it in operator< and compare function.
1556 * mem-stats.h (struct mem_usage): Likewise.
1557 * vec.c (struct vec_usage): Remove operator< and compare
1558 function. Can be simply inherited.
1560 2018-01-12 Martin Jambor <mjambor@suse.cz>
1563 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1564 * tree-ssa-math-opts.c: Include domwalk.h.
1565 (convert_mult_to_fma_1): New function.
1566 (fma_transformation_info): New type.
1567 (fma_deferring_state): Likewise.
1568 (cancel_fma_deferring): New function.
1569 (result_of_phi): Likewise.
1570 (last_fma_candidate_feeds_initial_phi): Likewise.
1571 (convert_mult_to_fma): Added deferring logic, split actual
1572 transformation to convert_mult_to_fma_1.
1573 (math_opts_dom_walker): New type.
1574 (math_opts_dom_walker::after_dom_children): New method, body moved
1575 here from pass_optimize_widening_mul::execute, added deferring logic
1577 (pass_optimize_widening_mul::execute): Moved most of code to
1578 math_opts_dom_walker::after_dom_children.
1579 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1580 * config/i386/i386.c (ix86_option_override_internal): Added
1581 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1583 2018-01-12 Richard Biener <rguenther@suse.de>
1586 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1587 inline instance vars.
1589 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1592 * config/rx/rx.c (rx_is_restricted_memory_address):
1595 2018-01-12 Richard Biener <rguenther@suse.de>
1597 PR tree-optimization/80846
1598 * target.def (split_reduction): New target hook.
1599 * targhooks.c (default_split_reduction): New function.
1600 * targhooks.h (default_split_reduction): Declare.
1601 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1602 target requests first reduce vectors by combining low and high
1604 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1605 (get_vectype_for_scalar_type_and_size): Export.
1606 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1607 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1608 * doc/tm.texi: Regenerate.
1609 * config/i386/i386.c (ix86_split_reduction): Implement
1610 TARGET_VECTORIZE_SPLIT_REDUCTION.
1612 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1615 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1616 in PIC mode except for TARGET_VXWORKS_RTP.
1617 * config/sparc/sparc.c: Include cfgrtl.h.
1618 (TARGET_INIT_PIC_REG): Define.
1619 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1620 (sparc_pic_register_p): New predicate.
1621 (sparc_legitimate_address_p): Use it.
1622 (sparc_legitimize_pic_address): Likewise.
1623 (sparc_delegitimize_address): Likewise.
1624 (sparc_mode_dependent_address_p): Likewise.
1625 (gen_load_pcrel_sym): Remove 4th parameter.
1626 (load_got_register): Adjust call to above. Remove obsolete stuff.
1627 (sparc_expand_prologue): Do not call load_got_register here.
1628 (sparc_flat_expand_prologue): Likewise.
1629 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1630 (sparc_use_pseudo_pic_reg): New function.
1631 (sparc_init_pic_reg): Likewise.
1632 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1633 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1635 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1637 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1638 Add item for branch_cost.
1640 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1642 PR rtl-optimization/83565
1643 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1644 not extend the result to a larger mode for rotate operations.
1645 (num_sign_bit_copies1): Likewise.
1647 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1650 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1652 Use values-Xc.o for -pedantic.
1653 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1655 2018-01-12 Martin Liska <mliska@suse.cz>
1658 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1660 (possible_polymorphic_call_targets): Use it.
1661 (ipa_devirt): Likewise.
1663 2018-01-12 Martin Liska <mliska@suse.cz>
1665 * profile-count.h (enum profile_quality): Use 0 as invalid
1666 enum value of profile_quality.
1668 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1670 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1671 -mext-string options.
1673 2018-01-12 Richard Biener <rguenther@suse.de>
1675 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1676 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1677 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1679 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1681 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1683 * configure.ac (--with-long-double-format): Add support for the
1684 configuration option to change the default long double format on
1686 * config.gcc (powerpc*-linux*-*): Likewise.
1687 * configure: Regenerate.
1688 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1689 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1690 used without modification.
1692 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1694 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1695 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1696 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1697 MISC_BUILTIN_SPEC_BARRIER.
1698 (rs6000_init_builtins): Likewise.
1699 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1701 (speculation_barrier): New define_insn.
1702 * doc/extend.texi: Document __builtin_speculation_barrier.
1704 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1707 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1708 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1709 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1711 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1712 integral modes instead of "ss" and "sd".
1713 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1714 vectors with 32-bit and 64-bit elements.
1715 (vecdupssescalarmodesuffix): New mode attribute.
1716 (vec_dup<mode>): Use it.
1718 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1721 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1722 frame if argument is passed on stack.
1724 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1727 * ree.c (combine_reaching_defs): Optimize also
1728 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1729 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1731 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1734 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1736 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1739 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1740 after they are computed.
1742 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1744 PR tree-optimization/83695
1745 * gimple-loop-linterchange.cc
1746 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1747 reset cached scev information after interchange.
1748 (pass_linterchange::execute): Remove call to scev_reset_htab.
1750 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1752 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1753 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1754 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1755 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1756 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1757 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1758 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1759 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1760 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1761 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1762 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1763 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1764 (V_lane_reg): Likewise.
1765 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1767 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1768 (vfmal_lane_low<mode>_intrinsic,
1769 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1770 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1771 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1772 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1773 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1774 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1776 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1778 * config/arm/arm-cpus.in (fp16fml): New feature.
1779 (ALL_SIMD): Add fp16fml.
1780 (armv8.2-a): Add fp16fml as an option.
1781 (armv8.3-a): Likewise.
1782 (armv8.4-a): Add fp16fml as part of fp16.
1783 * config/arm/arm.h (TARGET_FP16FML): Define.
1784 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1786 * config/arm/arm-modes.def (V2HF): Define.
1787 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1788 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1789 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1790 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1791 vfmsl_low, vfmsl_high): New set of builtins.
1792 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1793 (vfml_op): New code attribute.
1794 (VFMLHALVES): New int iterator.
1795 (VFML, VFMLSEL): New mode attributes.
1796 (V_reg): Define mapping for V2HF.
1797 (V_hi, V_lo): New mode attributes.
1798 (VF_constraint): Likewise.
1799 (vfml_half, vfml_half_selector): New int attributes.
1800 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1802 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1803 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1805 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1806 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1807 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1808 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1810 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1811 Document new effective target and option set.
1813 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1815 * config/arm/arm-cpus.in (armv8_4): New feature.
1816 (ARMv8_4a): New fgroup.
1817 (armv8.4-a): New arch.
1818 * config/arm/arm-tables.opt: Regenerate.
1819 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1820 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1821 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1822 Add matching rules for -march=armv8.4-a and extensions.
1823 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1825 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1828 * config/rx/rx.md (BW): New mode attribute.
1829 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1831 2018-01-11 Richard Biener <rguenther@suse.de>
1833 PR tree-optimization/83435
1834 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1835 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1836 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1838 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1839 Alan Hayward <alan.hayward@arm.com>
1840 David Sherwood <david.sherwood@arm.com>
1842 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1844 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1845 (aarch64_print_address_internal): Use it to check for a zero offset.
1847 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1848 Alan Hayward <alan.hayward@arm.com>
1849 David Sherwood <david.sherwood@arm.com>
1851 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1852 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1853 Return a poly_int64 rather than a HOST_WIDE_INT.
1854 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1855 rather than a HOST_WIDE_INT.
1856 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1857 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1858 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1859 final_offset from HOST_WIDE_INT to poly_int64.
1860 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1861 to_constant when getting the number of units in an Advanced SIMD
1863 (aarch64_builtin_vectorized_function): Check for a constant number
1865 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1867 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1868 attribute instead of GET_MODE_NUNITS.
1869 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1870 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1871 GET_MODE_SIZE for fixed-size registers.
1872 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1873 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1874 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1875 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1876 (aarch64_print_operand, aarch64_print_address_internal)
1877 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1878 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1879 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1880 Handle polynomial GET_MODE_SIZE.
1881 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1882 wider than SImode without modification.
1883 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1884 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1885 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1886 passing and returning SVE modes.
1887 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1888 rather than GEN_INT.
1889 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1890 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1891 (aarch64_allocate_and_probe_stack_space): Likewise.
1892 (aarch64_layout_frame): Cope with polynomial offsets.
1893 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1894 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1896 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1897 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1898 poly_int64 rather than a HOST_WIDE_INT.
1899 (aarch64_get_separate_components, aarch64_process_components)
1900 (aarch64_expand_prologue, aarch64_expand_epilogue)
1901 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1902 (aarch64_anchor_offset): New function, split out from...
1903 (aarch64_legitimize_address): ...here.
1904 (aarch64_builtin_vectorization_cost): Handle polynomial
1905 TYPE_VECTOR_SUBPARTS.
1906 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1908 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1909 number of elements from the PARALLEL rather than the mode.
1910 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1911 rather than GET_MODE_BITSIZE.
1912 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1913 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1914 (aarch64_expand_vec_perm_const_1): Handle polynomial
1915 d->perm.length () and d->perm elements.
1916 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1917 Apply to_constant to d->perm elements.
1918 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1919 polynomial CONST_VECTOR_NUNITS.
1920 (aarch64_move_pointer): Take amount as a poly_int64 rather
1922 (aarch64_progress_pointer): Avoid temporary variable.
1923 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1924 the mode attribute instead of GET_MODE.
1926 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1927 Alan Hayward <alan.hayward@arm.com>
1928 David Sherwood <david.sherwood@arm.com>
1930 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1931 x exists before using it.
1932 (aarch64_add_constant_internal): Rename to...
1933 (aarch64_add_offset_1): ...this. Replace regnum with separate
1934 src and dest rtxes. Handle the case in which they're different,
1935 including when the offset is zero. Replace scratchreg with an rtx.
1936 Use 2 additions if there is no spare register into which we can
1937 move a 16-bit constant.
1938 (aarch64_add_constant): Delete.
1939 (aarch64_add_offset): Replace reg with separate src and dest
1940 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1941 Use aarch64_add_offset_1.
1942 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1943 an rtx rather than an int. Take the delta as a poly_int64
1944 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1945 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1946 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1947 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1948 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1950 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1951 aarch64_add_constant.
1953 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1955 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1956 Use scalar_float_mode.
1958 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1960 * config/aarch64/aarch64-simd.md
1961 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1962 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1963 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1964 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1965 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1966 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1967 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1968 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1969 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1970 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1972 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1975 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1976 targ_options->x_arm_arch_string is non NULL.
1978 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1980 * config/aarch64/aarch64.h
1981 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1983 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1986 * expmed.c (emit_store_flag_force): Swap if const op0
1987 and change VOIDmode to mode of op0.
1989 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1991 PR rtl-optimization/83761
1992 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1993 than bytes to mode_for_size.
1995 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1998 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1999 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2002 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2005 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2006 when in layout mode.
2007 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2008 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2011 2018-01-10 Michael Collison <michael.collison@arm.com>
2013 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2014 * config/aarch64/aarch64-option-extension.def: Add
2015 AARCH64_OPT_EXTENSION of 'fp16fml'.
2016 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2017 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2018 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2019 * config/aarch64/constraints.md (Ui7): New constraint.
2020 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2021 (VFMLA_SEL_W): Ditto.
2024 (VFMLA16_LOW): New int iterator.
2025 (VFMLA16_HIGH): Ditto.
2026 (UNSPEC_FMLAL): New unspec.
2027 (UNSPEC_FMLSL): Ditto.
2028 (UNSPEC_FMLAL2): Ditto.
2029 (UNSPEC_FMLSL2): Ditto.
2030 (f16mac): New code attribute.
2031 * config/aarch64/aarch64-simd-builtins.def
2032 (aarch64_fmlal_lowv2sf): Ditto.
2033 (aarch64_fmlsl_lowv2sf): Ditto.
2034 (aarch64_fmlalq_lowv4sf): Ditto.
2035 (aarch64_fmlslq_lowv4sf): Ditto.
2036 (aarch64_fmlal_highv2sf): Ditto.
2037 (aarch64_fmlsl_highv2sf): Ditto.
2038 (aarch64_fmlalq_highv4sf): Ditto.
2039 (aarch64_fmlslq_highv4sf): Ditto.
2040 (aarch64_fmlal_lane_lowv2sf): Ditto.
2041 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2042 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2043 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2044 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2045 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2046 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2047 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2048 (aarch64_fmlal_lane_highv2sf): Ditto.
2049 (aarch64_fmlsl_lane_highv2sf): Ditto.
2050 (aarch64_fmlal_laneq_highv2sf): Ditto.
2051 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2052 (aarch64_fmlalq_lane_highv4sf): Ditto.
2053 (aarch64_fmlsl_lane_highv4sf): Ditto.
2054 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2055 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2056 * config/aarch64/aarch64-simd.md:
2057 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2058 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2059 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2060 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2061 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2062 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2063 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2064 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2065 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2066 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2067 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2068 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2069 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2070 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2071 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2072 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2073 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2074 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2075 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2076 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2077 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2078 (vfmlsl_low_u32): Ditto.
2079 (vfmlalq_low_u32): Ditto.
2080 (vfmlslq_low_u32): Ditto.
2081 (vfmlal_high_u32): Ditto.
2082 (vfmlsl_high_u32): Ditto.
2083 (vfmlalq_high_u32): Ditto.
2084 (vfmlslq_high_u32): Ditto.
2085 (vfmlal_lane_low_u32): Ditto.
2086 (vfmlsl_lane_low_u32): Ditto.
2087 (vfmlal_laneq_low_u32): Ditto.
2088 (vfmlsl_laneq_low_u32): Ditto.
2089 (vfmlalq_lane_low_u32): Ditto.
2090 (vfmlslq_lane_low_u32): Ditto.
2091 (vfmlalq_laneq_low_u32): Ditto.
2092 (vfmlslq_laneq_low_u32): Ditto.
2093 (vfmlal_lane_high_u32): Ditto.
2094 (vfmlsl_lane_high_u32): Ditto.
2095 (vfmlal_laneq_high_u32): Ditto.
2096 (vfmlsl_laneq_high_u32): Ditto.
2097 (vfmlalq_lane_high_u32): Ditto.
2098 (vfmlslq_lane_high_u32): Ditto.
2099 (vfmlalq_laneq_high_u32): Ditto.
2100 (vfmlslq_laneq_high_u32): Ditto.
2101 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2102 (AARCH64_FL_FOR_ARCH8_4): New.
2103 (AARCH64_ISA_F16FML): New ISA flag.
2104 (TARGET_F16FML): New feature flag for fp16fml.
2105 (doc/invoke.texi): Document new fp16fml option.
2107 2018-01-10 Michael Collison <michael.collison@arm.com>
2109 * config/aarch64/aarch64-builtins.c:
2110 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2111 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2112 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2113 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2114 (AARCH64_ISA_SHA3): New ISA flag.
2115 (TARGET_SHA3): New feature flag for sha3.
2116 * config/aarch64/iterators.md (sha512_op): New int attribute.
2117 (CRYPTO_SHA512): New int iterator.
2118 (UNSPEC_SHA512H): New unspec.
2119 (UNSPEC_SHA512H2): Ditto.
2120 (UNSPEC_SHA512SU0): Ditto.
2121 (UNSPEC_SHA512SU1): Ditto.
2122 * config/aarch64/aarch64-simd-builtins.def
2123 (aarch64_crypto_sha512hqv2di): New builtin.
2124 (aarch64_crypto_sha512h2qv2di): Ditto.
2125 (aarch64_crypto_sha512su0qv2di): Ditto.
2126 (aarch64_crypto_sha512su1qv2di): Ditto.
2127 (aarch64_eor3qv8hi): Ditto.
2128 (aarch64_rax1qv2di): Ditto.
2129 (aarch64_xarqv2di): Ditto.
2130 (aarch64_bcaxqv8hi): Ditto.
2131 * config/aarch64/aarch64-simd.md:
2132 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2133 (aarch64_crypto_sha512su0qv2di): Ditto.
2134 (aarch64_crypto_sha512su1qv2di): Ditto.
2135 (aarch64_eor3qv8hi): Ditto.
2136 (aarch64_rax1qv2di): Ditto.
2137 (aarch64_xarqv2di): Ditto.
2138 (aarch64_bcaxqv8hi): Ditto.
2139 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2140 (vsha512h2q_u64): Ditto.
2141 (vsha512su0q_u64): Ditto.
2142 (vsha512su1q_u64): Ditto.
2143 (veor3q_u16): Ditto.
2144 (vrax1q_u64): Ditto.
2146 (vbcaxq_u16): Ditto.
2147 * config/arm/types.md (crypto_sha512): New type attribute.
2148 (crypto_sha3): Ditto.
2149 (doc/invoke.texi): Document new sha3 option.
2151 2018-01-10 Michael Collison <michael.collison@arm.com>
2153 * config/aarch64/aarch64-builtins.c:
2154 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2155 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2156 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2157 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2158 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2159 (AARCH64_ISA_SM4): New ISA flag.
2160 (TARGET_SM4): New feature flag for sm4.
2161 * config/aarch64/aarch64-simd-builtins.def
2162 (aarch64_sm3ss1qv4si): Ditto.
2163 (aarch64_sm3tt1aq4si): Ditto.
2164 (aarch64_sm3tt1bq4si): Ditto.
2165 (aarch64_sm3tt2aq4si): Ditto.
2166 (aarch64_sm3tt2bq4si): Ditto.
2167 (aarch64_sm3partw1qv4si): Ditto.
2168 (aarch64_sm3partw2qv4si): Ditto.
2169 (aarch64_sm4eqv4si): Ditto.
2170 (aarch64_sm4ekeyqv4si): Ditto.
2171 * config/aarch64/aarch64-simd.md:
2172 (aarch64_sm3ss1qv4si): Ditto.
2173 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2174 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2175 (aarch64_sm4eqv4si): Ditto.
2176 (aarch64_sm4ekeyqv4si): Ditto.
2177 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2178 (sm3part_op): Ditto.
2179 (CRYPTO_SM3TT): Ditto.
2180 (CRYPTO_SM3PART): Ditto.
2181 (UNSPEC_SM3SS1): New unspec.
2182 (UNSPEC_SM3TT1A): Ditto.
2183 (UNSPEC_SM3TT1B): Ditto.
2184 (UNSPEC_SM3TT2A): Ditto.
2185 (UNSPEC_SM3TT2B): Ditto.
2186 (UNSPEC_SM3PARTW1): Ditto.
2187 (UNSPEC_SM3PARTW2): Ditto.
2188 (UNSPEC_SM4E): Ditto.
2189 (UNSPEC_SM4EKEY): Ditto.
2190 * config/aarch64/constraints.md (Ui2): New constraint.
2191 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2192 * config/arm/types.md (crypto_sm3): New type attribute.
2193 (crypto_sm4): Ditto.
2194 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2195 (vsm3tt1aq_u32): Ditto.
2196 (vsm3tt1bq_u32): Ditto.
2197 (vsm3tt2aq_u32): Ditto.
2198 (vsm3tt2bq_u32): Ditto.
2199 (vsm3partw1q_u32): Ditto.
2200 (vsm3partw2q_u32): Ditto.
2201 (vsm4eq_u32): Ditto.
2202 (vsm4ekeyq_u32): Ditto.
2203 (doc/invoke.texi): Document new sm4 option.
2205 2018-01-10 Michael Collison <michael.collison@arm.com>
2207 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2208 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2209 (AARCH64_FL_FOR_ARCH8_4): New.
2210 (AARCH64_FL_V8_4): New flag.
2211 (doc/invoke.texi): Document new armv8.4-a option.
2213 2018-01-10 Michael Collison <michael.collison@arm.com>
2215 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2216 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2217 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2218 * config/aarch64/aarch64-option-extension.def: Add
2219 AARCH64_OPT_EXTENSION of 'sha2'.
2220 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2221 (crypto): Disable sha2 and aes if crypto disabled.
2222 (crypto): Enable aes and sha2 if enabled.
2223 (simd): Disable sha2 and aes if simd disabled.
2224 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2226 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2227 (TARGET_SHA2): New feature flag for sha2.
2228 (TARGET_AES): New feature flag for aes.
2229 * config/aarch64/aarch64-simd.md:
2230 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2231 conditional on TARGET_AES.
2232 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2233 (aarch64_crypto_sha1hsi): Make pattern conditional
2235 (aarch64_crypto_sha1hv4si): Ditto.
2236 (aarch64_be_crypto_sha1hv4si): Ditto.
2237 (aarch64_crypto_sha1su1v4si): Ditto.
2238 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2239 (aarch64_crypto_sha1su0v4si): Ditto.
2240 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2241 (aarch64_crypto_sha256su0v4si): Ditto.
2242 (aarch64_crypto_sha256su1v4si): Ditto.
2243 (doc/invoke.texi): Document new aes and sha2 options.
2245 2018-01-10 Martin Sebor <msebor@redhat.com>
2247 PR tree-optimization/83781
2248 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2251 2018-01-11 Martin Sebor <msebor@gmail.com>
2252 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2254 PR tree-optimization/83501
2255 PR tree-optimization/81703
2257 * tree-ssa-strlen.c (get_string_cst): Rename...
2258 (get_string_len): ...to this. Handle global constants.
2259 (handle_char_store): Adjust.
2261 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2262 Jim Wilson <jimw@sifive.com>
2264 * config/riscv/riscv-protos.h (riscv_output_return): New.
2265 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2266 (riscv_attribute_table, riscv_output_return),
2267 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2268 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2269 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2271 (riscv_expand_prologue): Add early return for naked function.
2272 (riscv_expand_epilogue): Likewise.
2273 (riscv_function_ok_for_sibcall): Return false for naked function.
2274 (riscv_set_current_function): New.
2275 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2276 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2277 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2278 * doc/extend.texi (RISC-V Function Attributes): New.
2280 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2282 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2283 check for 128-bit long double before checking TCmode.
2284 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2285 128-bit long doubles before checking TFmode or TCmode.
2286 (FLOAT128_IBM_P): Likewise.
2288 2018-01-10 Martin Sebor <msebor@redhat.com>
2290 PR tree-optimization/83671
2291 * builtins.c (c_strlen): Unconditionally return zero for the empty
2293 Use -Warray-bounds for warnings.
2294 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2295 for non-constant array indices with COMPONENT_REF, arrays of
2296 arrays, and pointers to arrays.
2297 (gimple_fold_builtin_strlen): Determine and set length range for
2298 non-constant character arrays.
2300 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2303 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2306 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2308 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2310 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2313 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2314 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2315 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2316 indexed_or_indirect_operand predicate.
2317 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2318 (*vsx_le_perm_load_v8hi): Likewise.
2319 (*vsx_le_perm_load_v16qi): Likewise.
2320 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2321 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2322 (*vsx_le_perm_store_v8hi): Likewise.
2323 (*vsx_le_perm_store_v16qi): Likewise.
2324 (eight unnamed splitters): Likewise.
2326 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2328 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2329 * config/rs6000/emmintrin.h: Likewise.
2330 * config/rs6000/mmintrin.h: Likewise.
2331 * config/rs6000/xmmintrin.h: Likewise.
2333 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2336 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2338 * tree.c (tree_nop_conversion): Return true for location wrapper
2340 (maybe_wrap_with_location): New function.
2341 (selftest::check_strip_nops): New function.
2342 (selftest::test_location_wrappers): New function.
2343 (selftest::tree_c_tests): Call it.
2344 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2345 (maybe_wrap_with_location): New decl.
2346 (EXPR_LOCATION_WRAPPER_P): New macro.
2347 (location_wrapper_p): New inline function.
2348 (tree_strip_any_location_wrapper): New inline function.
2350 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2353 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2354 stack_realign_offset for the largest alignment of stack slot
2356 (ix86_find_max_used_stack_alignment): New function.
2357 (ix86_finalize_stack_frame_flags): Use it. Set
2358 max_used_stack_alignment if we don't realign stack.
2359 * config/i386/i386.h (machine_function): Add
2360 max_used_stack_alignment.
2362 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2364 * config/arm/arm.opt (-mbranch-cost): New option.
2365 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2368 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2371 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2372 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2374 2018-01-10 Richard Biener <rguenther@suse.de>
2377 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2378 early out so it also covers the case where we have a non-NULL
2381 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2383 PR tree-optimization/83753
2384 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2385 for non-strided grouped accesses if the number of elements is 1.
2387 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2390 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2391 * i386.h (TARGET_USE_GATHER): Define.
2392 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2394 2018-01-10 Martin Liska <mliska@suse.cz>
2397 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2398 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2400 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2401 CLEANUP_NO_PARTITIONING is not set.
2403 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2405 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2406 for vectors, as a partial revert of r254296.
2407 * rtl.h (const_vec_p): Delete.
2408 (const_vec_duplicate_p): Don't test for vector CONSTs.
2409 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2410 * expmed.c (make_tree): Likewise.
2413 * common.md (E, F): Use CONSTANT_P instead of checking for
2415 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2416 checking for CONST_VECTOR.
2418 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2421 * predict.c (force_edge_cold): Handle in more sane way edges
2424 2018-01-09 Carl Love <cel@us.ibm.com>
2426 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2428 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2429 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2430 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2431 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2432 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2433 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2434 * config/rs6000/rs6000-protos.h: Add extern defition for
2435 rs6000_generate_float2_double_code.
2436 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2438 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2439 (float2_v2df): Add define_expand.
2441 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2444 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2445 op_mode in the force_to_mode call.
2447 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2449 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2450 instead of checking each element individually.
2451 (aarch64_evpc_uzp): Likewise.
2452 (aarch64_evpc_zip): Likewise.
2453 (aarch64_evpc_ext): Likewise.
2454 (aarch64_evpc_rev): Likewise.
2455 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2456 instead of checking each element individually. Return true without
2458 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2459 whether all selected elements come from the same input, instead of
2460 checking each element individually. Remove calls to gen_rtx_REG,
2461 start_sequence and end_sequence and instead assert that no rtl is
2464 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2466 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2467 order of HIGH and CONST checks.
2469 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2471 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2472 if the destination isn't an SSA_NAME.
2474 2018-01-09 Richard Biener <rguenther@suse.de>
2476 PR tree-optimization/83668
2477 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2479 (canonicalize_loop_form): ... here, renamed from ...
2480 (canonicalize_loop_closed_ssa_form): ... this and amended to
2481 swap successor edges for loop exit blocks to make us use
2482 the RPO order we need for initial schedule generation.
2484 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2486 PR tree-optimization/64811
2487 * match.pd: When optimizing comparisons with Inf, avoid
2488 introducing or losing exceptions from comparisons with NaN.
2490 2018-01-09 Martin Liska <mliska@suse.cz>
2493 * asan.c (shadow_mem_size): Add gcc_assert.
2495 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2497 Don't save registers in main().
2500 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2501 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2502 * config/avr/avr.c (avr_set_current_function): Don't error if
2503 naked, OS_task or OS_main are specified at the same time.
2504 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2506 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2508 * common/config/avr/avr-common.c (avr_option_optimization_table):
2509 Switch on -mmain-is-OS_task for optimizing compilations.
2511 2018-01-09 Richard Biener <rguenther@suse.de>
2513 PR tree-optimization/83572
2514 * graphite.c: Include cfganal.h.
2515 (graphite_transform_loops): Connect infinite loops to exit
2516 and remove fake edges at the end.
2518 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2520 * ipa-inline.c (edge_badness): Revert accidental checkin.
2522 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2525 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2526 symbols; not inline clones.
2528 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2531 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2532 hard registers. Formatting fixes.
2534 PR preprocessor/83722
2535 * gcc.c (try_generate_repro): Pass
2536 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2537 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2540 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2541 Kito Cheng <kito.cheng@gmail.com>
2543 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2544 (riscv_leaf_function_p): Delete.
2545 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2547 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2549 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2551 (do_ifelse): New function.
2552 (do_isel): New function.
2553 (do_sub3): New function.
2554 (do_add3): New function.
2555 (do_load_mask_compare): New function.
2556 (do_overlap_load_compare): New function.
2557 (expand_compare_loop): New function.
2558 (expand_block_compare): Call expand_compare_loop() when appropriate.
2559 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2561 (-mblock-compare-inline-loop-limit): New option.
2563 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2566 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2567 Reverse order of second and third operands in first alternative.
2568 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2569 of first and second elements in UNSPEC_VPERMR vector.
2570 (altivec_expand_vec_perm_le): Likewise.
2572 2017-01-08 Jeff Law <law@redhat.com>
2574 PR rtl-optimizatin/81308
2575 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2576 (process_switch): If group_case_labels makes a change, then set
2578 (pass_convert_switch::execute): If a switch is converted, then
2579 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2581 PR rtl-optimization/81308
2582 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2585 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2587 PR target/83663 - Revert r255946
2588 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2589 generation for cases where splatting a value is not useful.
2590 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2591 across a vec_duplicate and a paradoxical subreg forming a vector
2592 mode to a vec_concat.
2594 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2596 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2597 -march=armv8.3-a variants.
2598 * config/arm/t-multilib: Likewise.
2599 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2601 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2603 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2605 (cceq_ior_compare_complement): Give it a name so I can use it, and
2606 change boolean_or_operator predicate to boolean_operator so it can
2607 be used to generate a crand.
2608 (eqne): New code iterator.
2609 (bd/bd_neg): New code_attrs.
2610 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2611 a single define_insn.
2612 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2613 decrement (bdnzt/bdnzf/bdzt/bdzf).
2614 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2615 with the new names of the branch decrement patterns, and added the
2616 names of the branch decrement conditional patterns.
2618 2018-01-08 Richard Biener <rguenther@suse.de>
2620 PR tree-optimization/83563
2621 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2624 2018-01-08 Richard Biener <rguenther@suse.de>
2627 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2629 2018-01-08 Richard Biener <rguenther@suse.de>
2631 PR tree-optimization/83685
2632 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2633 references to abnormals.
2635 2018-01-08 Richard Biener <rguenther@suse.de>
2638 * dwarf2out.c (output_indirect_strings): Handle empty
2639 skeleton_debug_str_hash.
2640 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2642 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2644 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2645 (emit_store_direct): Likewise.
2646 (arc_trampoline_adjust_address): Likewise.
2647 (arc_asm_trampoline_template): New function.
2648 (arc_initialize_trampoline): Use asm_trampoline_template.
2649 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2650 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2651 * config/arc/arc.md (flush_icache): Delete pattern.
2653 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2655 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2656 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2659 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2662 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2663 by not USED_FOR_TARGET.
2664 (make_pass_resolve_sw_modes): Likewise.
2666 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2668 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2671 2018-01-08 Richard Biener <rguenther@suse.de>
2674 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2676 2018-01-08 Richard Biener <rguenther@suse.de>
2679 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2681 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2684 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2685 basic blocks with a small number of successors.
2686 (convert_control_dep_chain_into_preds): Improve handling of
2688 (dump_predicates): Split apart into...
2689 (dump_pred_chain): ...here...
2690 (dump_pred_info): ...and here.
2691 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2692 (can_chain_union_be_invalidated_p): Improve check for invalidation
2694 (uninit_uses_cannot_happen): Avoid unnecessary if
2695 convert_control_dep_chain_into_preds yielded nothing.
2697 2018-01-06 Martin Sebor <msebor@redhat.com>
2699 PR tree-optimization/83640
2700 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2701 subtracting negative offset from size.
2702 (builtin_access::overlap): Adjust offset bounds of the access to fall
2703 within the size of the object if possible.
2705 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2707 PR rtl-optimization/83699
2708 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2709 extract_bit_field_as_subreg to cases in which the extracted
2710 value is also a vector.
2712 * lra-constraints.c (process_alt_operands): Test for the equivalence
2713 substitutions when detecting a possible reload cycle.
2715 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2718 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2719 by default if flag_selective_schedling{,2}. Formatting fixes.
2721 PR rtl-optimization/83682
2722 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2723 if it has non-VECTOR_MODE element mode.
2724 (vec_duplicate_p): Likewise.
2727 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2728 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2730 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2733 * config/i386/i386-builtin.def
2734 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2735 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2736 Require also OPTION_MASK_ISA_AVX512F in addition to
2737 OPTION_MASK_ISA_GFNI.
2738 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2739 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2740 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2741 to OPTION_MASK_ISA_GFNI.
2742 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2743 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2744 OPTION_MASK_ISA_AVX512BW.
2745 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2746 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2747 addition to OPTION_MASK_ISA_GFNI.
2748 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2749 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2750 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2751 to OPTION_MASK_ISA_GFNI.
2752 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2753 a requirement for all ISAs rather than any of them with a few
2755 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2757 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2758 bitmasks to be enabled with 3 exceptions, instead of requiring any
2759 enabled ISA with lots of exceptions.
2760 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2761 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2762 Change avx512bw in isa attribute to avx512f.
2763 * config/i386/sgxintrin.h: Add license boilerplate.
2764 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2765 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2766 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2767 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2769 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2770 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2771 temporarily sse2 rather than sse if not enabled already.
2774 * config/i386/sse.md (VI248_VLBW): Rename to ...
2775 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2776 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2777 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2778 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2779 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2780 mode iterator instead of VI248_VLBW.
2782 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2784 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2785 (record_modified): Skip clobbers; add debug output.
2786 (param_change_prob): Use sreal frequencies.
2788 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2790 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2791 punt for user-aligned variables.
2793 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2795 * tree-chrec.c (chrec_contains_symbols): Return true for
2798 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2801 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2802 of (x|y) == x for BICS pattern.
2804 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2806 PR tree-optimization/83605
2807 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2808 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2811 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2813 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2814 * config/epiphany/rtems.h: New file.
2816 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2817 Uros Bizjak <ubizjak@gmail.com>
2820 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2821 QIreg_operand instead of register_operand predicate.
2822 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2823 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2824 comments instead of -fmitigate[-_]rop.
2826 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2829 * cgraphunit.c (symbol_table::compile): Switch to text_section
2830 before calling assembly_start debug hook.
2831 * run-rtl-passes.c (run_rtl_passes): Likewise.
2834 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2836 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2837 range_int_cst_p rather than !symbolic_range_p before calling
2838 extract_range_from_multiplicative_op_1.
2840 2017-01-04 Jeff Law <law@redhat.com>
2842 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2843 redundant test in assertion.
2845 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2847 * doc/rtl.texi: Document machine_mode wrapper classes.
2849 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2851 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2854 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2856 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2857 the VEC_PERM_EXPR fold to fail.
2859 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2862 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2863 to switched_sections.
2865 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2868 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2871 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2874 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2875 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2877 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2880 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2881 is BLKmode and bitpos not zero or mode change is needed.
2883 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2886 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2889 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2892 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2893 instead of MULT rtx. Update all corresponding splitters.
2895 (*ssub<modesuffix>): Ditto.
2897 (*cmp_sadd_di): Update split patterns.
2898 (*cmp_sadd_si): Ditto.
2899 (*cmp_sadd_sidi): Ditto.
2900 (*cmp_ssub_di): Ditto.
2901 (*cmp_ssub_si): Ditto.
2902 (*cmp_ssub_sidi): Ditto.
2903 * config/alpha/predicates.md (const23_operand): New predicate.
2904 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2905 Look for ASHIFT, not MULT inner operand.
2906 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2908 2018-01-04 Martin Liska <mliska@suse.cz>
2910 PR gcov-profile/83669
2911 * gcov.c (output_intermediate_file): Add version to intermediate
2913 * doc/gcov.texi: Document new field 'version' in intermediate
2914 file format. Fix location of '-k' option of gcov command.
2916 2018-01-04 Martin Liska <mliska@suse.cz>
2919 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2921 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2923 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2925 2018-01-03 Martin Sebor <msebor@redhat.com>
2927 PR tree-optimization/83655
2928 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2929 checking calls with invalid arguments.
2931 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2933 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2934 (vectorizable_mask_load_store): Delete.
2935 (vectorizable_call): Return false for masked loads and stores.
2936 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2937 instead of gimple_assign_rhs1.
2938 (vectorizable_load): Handle IFN_MASK_LOAD.
2939 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2941 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2943 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2945 (vectorizable_mask_load_store): ...here.
2946 (vectorizable_load): ...and here.
2948 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2950 * tree-vect-stmts.c (vect_build_all_ones_mask)
2951 (vect_build_zero_merge_argument): New functions, split out from...
2952 (vectorizable_load): ...here.
2954 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2956 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2958 (vectorizable_mask_load_store): ...here.
2959 (vectorizable_store): ...and here.
2961 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2963 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2965 (vectorizable_mask_load_store): ...here.
2967 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2969 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2970 (vect_model_store_cost): Take a vec_load_store_type instead of a
2972 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2973 (vect_model_store_cost): Take a vec_load_store_type instead of a
2975 (vectorizable_mask_load_store): Update accordingly.
2976 (vectorizable_store): Likewise.
2977 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2979 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2981 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2982 IFN_MASK_LOAD calls here rather than...
2983 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2985 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2986 Alan Hayward <alan.hayward@arm.com>
2987 David Sherwood <david.sherwood@arm.com>
2989 * expmed.c (extract_bit_field_1): For vector extracts,
2990 fall back to extract_bit_field_as_subreg if vec_extract
2993 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2994 Alan Hayward <alan.hayward@arm.com>
2995 David Sherwood <david.sherwood@arm.com>
2997 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2998 they are variable or constant sized.
2999 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3000 slots for constant-sized data.
3002 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3003 Alan Hayward <alan.hayward@arm.com>
3004 David Sherwood <david.sherwood@arm.com>
3006 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3007 handling COND_EXPRs with boolean comparisons, try to find a better
3008 basis for the mask type than the boolean itself.
3010 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3012 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3013 is calculated and how it can be overridden.
3014 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3015 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3017 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3020 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3021 Alan Hayward <alan.hayward@arm.com>
3022 David Sherwood <david.sherwood@arm.com>
3024 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3025 Remove the mode argument.
3026 (aarch64_simd_valid_immediate): Remove the mode and inverse
3028 * config/aarch64/iterators.md (bitsize): New iterator.
3029 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3030 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3031 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3032 aarch64_simd_valid_immediate.
3033 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3034 (aarch64_reg_or_bic_imm): Likewise.
3035 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3036 with an insn_type enum and msl with a modifier_type enum.
3037 Replace element_width with a scalar_mode. Change the shift
3038 to unsigned int. Add constructors for scalar_float_mode and
3039 scalar_int_mode elements.
3040 (aarch64_vect_float_const_representable_p): Delete.
3041 (aarch64_can_const_movi_rtx_p)
3042 (aarch64_simd_scalar_immediate_valid_for_move)
3043 (aarch64_simd_make_constant): Update call to
3044 aarch64_simd_valid_immediate.
3045 (aarch64_advsimd_valid_immediate_hs): New function.
3046 (aarch64_advsimd_valid_immediate): Likewise.
3047 (aarch64_simd_valid_immediate): Remove mode and inverse
3048 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3049 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3050 and aarch64_float_const_representable_p on the result.
3051 (aarch64_output_simd_mov_immediate): Remove mode argument.
3052 Update call to aarch64_simd_valid_immediate and use of
3053 simd_immediate_info.
3054 (aarch64_output_scalar_simd_mov_immediate): Update call
3057 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3058 Alan Hayward <alan.hayward@arm.com>
3059 David Sherwood <david.sherwood@arm.com>
3061 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3062 (mode_nunits): Likewise CONST_MODE_NUNITS.
3063 * machmode.def (ADJUST_NUNITS): Document.
3064 * genmodes.c (mode_data::need_nunits_adj): New field.
3065 (blank_mode): Update accordingly.
3066 (adj_nunits): New variable.
3067 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3069 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3070 listed in adj_nunits.
3071 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3072 listed in adj_nunits. Don't emit case statements for such modes.
3073 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3074 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3075 nothing if adj_nunits is nonnull.
3076 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3077 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3078 (emit_mode_fbit): Update use of print_maybe_const_decl.
3079 (emit_move_size): Likewise. Treat the array as non-const
3081 (emit_mode_adjustments): Handle adj_nunits.
3083 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3085 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3086 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3087 (VECTOR_MODES): Use it.
3088 (make_vector_modes): Take the prefix as an argument.
3090 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3091 Alan Hayward <alan.hayward@arm.com>
3092 David Sherwood <david.sherwood@arm.com>
3094 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3095 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3096 for MODE_VECTOR_BOOL.
3097 * machmode.def (VECTOR_BOOL_MODE): Document.
3098 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3099 (make_vector_bool_mode): New function.
3100 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3102 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3103 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3105 * stor-layout.c (int_mode_for_mode): Likewise.
3106 * tree.c (build_vector_type_for_mode): Likewise.
3107 * varasm.c (output_constant_pool_2): Likewise.
3108 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3109 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3110 for MODE_VECTOR_BOOL.
3111 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3112 of mode class checks.
3113 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3114 instead of a list of mode class checks.
3115 (expand_vector_scalar_condition): Likewise.
3116 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3118 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3119 Alan Hayward <alan.hayward@arm.com>
3120 David Sherwood <david.sherwood@arm.com>
3122 * machmode.h (mode_size): Change from unsigned short to
3124 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3125 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3126 or if measurement_type is not polynomial.
3127 (fixed_size_mode::includes_p): Check for constant-sized modes.
3128 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3129 return a poly_uint16 rather than an unsigned short.
3130 (emit_mode_size): Change the type of mode_size from unsigned short
3131 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3132 (emit_mode_adjustments): Cope with polynomial vector sizes.
3133 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3135 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3137 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3138 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3139 * caller-save.c (setup_save_areas): Likewise.
3140 (replace_reg_with_saved_mem): Likewise.
3141 * calls.c (emit_library_call_value_1): Likewise.
3142 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3143 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3144 (gen_lowpart_for_combine): Likewise.
3145 * convert.c (convert_to_integer_1): Likewise.
3146 * cse.c (equiv_constant, cse_insn): Likewise.
3147 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3148 (cselib_subst_to_values): Likewise.
3149 * dce.c (word_dce_process_block): Likewise.
3150 * df-problems.c (df_word_lr_mark_ref): Likewise.
3151 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3152 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3153 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3154 (rtl_for_decl_location): Likewise.
3155 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3156 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3157 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3158 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3159 (expand_expr_real_1): Likewise.
3160 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3161 (pad_below): Likewise.
3162 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3163 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3164 * ira.c (get_subreg_tracking_sizes): Likewise.
3165 * ira-build.c (ira_create_allocno_objects): Likewise.
3166 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3167 (ira_sort_regnos_for_alter_reg): Likewise.
3168 * ira-costs.c (record_operand_costs): Likewise.
3169 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3170 (resolve_simple_move): Likewise.
3171 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3172 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3173 (lra_constraints): Likewise.
3174 (CONST_POOL_OK_P): Reject variable-sized modes.
3175 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3176 (add_pseudo_to_slot, lra_spill): Likewise.
3177 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3178 * optabs-query.c (get_best_extraction_insn): Likewise.
3179 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3180 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3181 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3182 * recog.c (offsettable_address_addr_space_p): Likewise.
3183 * regcprop.c (maybe_mode_change): Likewise.
3184 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3185 * regrename.c (build_def_use): Likewise.
3186 * regstat.c (dump_reg_info): Likewise.
3187 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3188 (find_reloads, find_reloads_subreg_address): Likewise.
3189 * reload1.c (eliminate_regs_1): Likewise.
3190 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3191 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3192 (simplify_binary_operation_1, simplify_subreg): Likewise.
3193 * targhooks.c (default_function_arg_padding): Likewise.
3194 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3195 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3196 (verify_gimple_assign_ternary): Likewise.
3197 * tree-inline.c (estimate_move_cost): Likewise.
3198 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3199 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3200 (get_address_cost_ainc): Likewise.
3201 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3202 (vect_supportable_dr_alignment): Likewise.
3203 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3204 (vectorizable_reduction): Likewise.
3205 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3206 (vectorizable_operation, vectorizable_load): Likewise.
3207 * tree.c (build_same_sized_truth_vector_type): Likewise.
3208 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3209 * var-tracking.c (emit_note_insn_var_location): Likewise.
3210 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3211 (ADDR_VEC_ALIGN): Likewise.
3213 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3214 Alan Hayward <alan.hayward@arm.com>
3215 David Sherwood <david.sherwood@arm.com>
3217 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3219 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3220 or if measurement_type is polynomial.
3221 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3222 * combine.c (make_extraction): Likewise.
3223 * dse.c (find_shift_sequence): Likewise.
3224 * dwarf2out.c (mem_loc_descriptor): Likewise.
3225 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3226 (extract_bit_field, extract_low_bits): Likewise.
3227 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3228 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3229 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3230 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3231 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3232 * reload.c (find_reloads): Likewise.
3233 * reload1.c (alter_reg): Likewise.
3234 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3235 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3236 * tree-if-conv.c (predicate_mem_writes): Likewise.
3237 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3238 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3239 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3240 * valtrack.c (dead_debug_insert_temp): Likewise.
3241 * varasm.c (mergeable_constant_section): Likewise.
3242 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3244 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3245 Alan Hayward <alan.hayward@arm.com>
3246 David Sherwood <david.sherwood@arm.com>
3248 * expr.c (expand_assignment): Cope with polynomial mode sizes
3249 when assigning to a CONCAT.
3251 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3252 Alan Hayward <alan.hayward@arm.com>
3253 David Sherwood <david.sherwood@arm.com>
3255 * machmode.h (mode_precision): Change from unsigned short to
3257 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3259 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3260 or if measurement_type is not polynomial.
3261 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3262 in which the mode is already known to be a scalar_int_mode.
3263 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3264 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3266 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3267 for GET_MODE_PRECISION.
3268 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3269 for GET_MODE_PRECISION.
3270 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3272 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3273 (expand_field_assignment, make_extraction): Likewise.
3274 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3275 (get_last_value): Likewise.
3276 * convert.c (convert_to_integer_1): Likewise.
3277 * cse.c (cse_insn): Likewise.
3278 * expr.c (expand_expr_real_1): Likewise.
3279 * lra-constraints.c (simplify_operand_subreg): Likewise.
3280 * optabs-query.c (can_atomic_load_p): Likewise.
3281 * optabs.c (expand_atomic_load): Likewise.
3282 (expand_atomic_store): Likewise.
3283 * ree.c (combine_reaching_defs): Likewise.
3284 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3285 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3286 * tree.h (type_has_mode_precision_p): Likewise.
3287 * ubsan.c (instrument_si_overflow): Likewise.
3289 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3290 Alan Hayward <alan.hayward@arm.com>
3291 David Sherwood <david.sherwood@arm.com>
3293 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3294 polynomial numbers of units.
3295 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3296 (valid_vector_subparts_p): New function.
3297 (build_vector_type): Remove temporary shim and take the number
3298 of units as a poly_uint64 rather than an int.
3299 (build_opaque_vector_type): Take the number of units as a
3300 poly_uint64 rather than an int.
3301 * tree.c (build_vector_from_ctor): Handle polynomial
3302 TYPE_VECTOR_SUBPARTS.
3303 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3304 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3305 (build_vector_from_val): If the number of units is variable,
3306 use build_vec_duplicate_cst for constant operands and
3307 VEC_DUPLICATE_EXPR otherwise.
3308 (make_vector_type): Remove temporary is_constant ().
3309 (build_vector_type, build_opaque_vector_type): Take the number of
3310 units as a poly_uint64 rather than an int.
3311 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3313 * cfgexpand.c (expand_debug_expr): Likewise.
3314 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3315 (store_constructor, expand_expr_real_1): Likewise.
3316 (const_scalar_mask_from_tree): Likewise.
3317 * fold-const-call.c (fold_const_reduction): Likewise.
3318 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3319 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3320 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3321 (fold_relational_const): Likewise.
3322 (native_interpret_vector): Likewise. Change the size from an
3323 int to an unsigned int.
3324 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3325 TYPE_VECTOR_SUBPARTS.
3326 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3327 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3328 duplicating a non-constant operand into a variable-length vector.
3329 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3330 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3331 * ipa-icf.c (sem_variable::equals): Likewise.
3332 * match.pd: Likewise.
3333 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3334 * print-tree.c (print_node): Likewise.
3335 * stor-layout.c (layout_type): Likewise.
3336 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3337 * tree-cfg.c (verify_gimple_comparison): Likewise.
3338 (verify_gimple_assign_binary): Likewise.
3339 (verify_gimple_assign_ternary): Likewise.
3340 (verify_gimple_assign_single): Likewise.
3341 * tree-pretty-print.c (dump_generic_node): Likewise.
3342 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3343 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3344 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3345 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3346 (vect_shift_permute_load_chain): Likewise.
3347 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3348 (expand_vector_condition, optimize_vector_constructor): Likewise.
3349 (lower_vec_perm, get_compute_type): Likewise.
3350 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3351 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3352 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3353 (vect_recog_mask_conversion_pattern): Likewise.
3354 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3355 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3356 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3357 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3358 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3359 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3360 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3361 (supportable_widening_operation): Likewise.
3362 (supportable_narrowing_operation): Likewise.
3363 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3365 * varasm.c (output_constant): Likewise.
3367 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3368 Alan Hayward <alan.hayward@arm.com>
3369 David Sherwood <david.sherwood@arm.com>
3371 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3372 so that both the length == 3 and length != 3 cases set up their
3373 own permute vectors. Add comments explaining why we know the
3374 number of elements is constant.
3375 (vect_permute_load_chain): Likewise.
3377 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3378 Alan Hayward <alan.hayward@arm.com>
3379 David Sherwood <david.sherwood@arm.com>
3381 * machmode.h (mode_nunits): Change from unsigned char to
3383 (ONLY_FIXED_SIZE_MODES): New macro.
3384 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3385 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3386 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3388 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3389 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3390 or if measurement_type is not polynomial.
3391 * genmodes.c (ZERO_COEFFS): New macro.
3392 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3394 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3395 Use ZERO_COEFFS when emitting initializers.
3396 * data-streamer.h (bp_pack_poly_value): New function.
3397 (bp_unpack_poly_value): Likewise.
3398 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3399 for GET_MODE_NUNITS.
3400 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3401 for GET_MODE_NUNITS.
3402 * tree.c (make_vector_type): Remove temporary shim and make
3403 the real function take the number of units as a poly_uint64
3405 (build_vector_type_for_mode): Handle polynomial nunits.
3406 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3407 * emit-rtl.c (const_vec_series_p_1): Likewise.
3408 (gen_rtx_CONST_VECTOR): Likewise.
3409 * fold-const.c (test_vec_duplicate_folding): Likewise.
3410 * genrecog.c (validate_pattern): Likewise.
3411 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3412 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3413 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3414 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3415 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3416 * rtlanal.c (subreg_get_info): Likewise.
3417 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3418 (vect_grouped_load_supported): Likewise.
3419 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3420 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3421 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3422 (simplify_const_unary_operation, simplify_binary_operation_1)
3423 (simplify_const_binary_operation, simplify_ternary_operation)
3424 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3425 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3426 instead of CONST_VECTOR_NUNITS.
3427 * varasm.c (output_constant_pool_2): Likewise.
3428 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3429 explicit-encoded elements in the XVEC for variable-length vectors.
3431 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3433 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3435 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3436 Alan Hayward <alan.hayward@arm.com>
3437 David Sherwood <david.sherwood@arm.com>
3439 * coretypes.h (fixed_size_mode): Declare.
3440 (fixed_size_mode_pod): New typedef.
3441 * builtins.h (target_builtins::x_apply_args_mode)
3442 (target_builtins::x_apply_result_mode): Change type to
3443 fixed_size_mode_pod.
3444 * builtins.c (apply_args_size, apply_result_size, result_vector)
3445 (expand_builtin_apply_args_1, expand_builtin_apply)
3446 (expand_builtin_return): Update accordingly.
3448 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3450 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3451 * cselib.c (cselib_hash_rtx): Likewise.
3452 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3453 CONST_VECTOR encoding.
3455 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3456 Jeff Law <law@redhat.com>
3459 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3460 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3461 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3462 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3465 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3466 explicitly probe *sp in a noreturn function if there were any callee
3467 register saves or frame pointer is needed.
3469 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3472 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3473 BLKmode for ternary, binary or unary expressions.
3476 * var-tracking.c (delete_vta_debug_insn): New inline function.
3477 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3478 insns from get_insns () to NULL instead of each bb separately.
3479 Use delete_vta_debug_insn. No longer static.
3480 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3481 delete_vta_debug_insns callers.
3482 * rtl.h (delete_vta_debug_insns): Declare.
3483 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3484 instead of variable_tracking_main.
3486 2018-01-03 Martin Sebor <msebor@redhat.com>
3488 PR tree-optimization/83603
3489 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3490 arguments past the endof the argument list in functions declared
3491 without a prototype.
3492 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3493 Avoid checking when arguments are null.
3495 2018-01-03 Martin Sebor <msebor@redhat.com>
3498 * doc/extend.texi (attribute const): Fix a typo.
3499 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3500 issuing -Wsuggest-attribute for void functions.
3502 2018-01-03 Martin Sebor <msebor@redhat.com>
3504 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3505 offset_int::from instead of wide_int::to_shwi.
3506 (maybe_diag_overlap): Remove assertion.
3507 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3508 * gimple-ssa-sprintf.c (format_directive): Same.
3509 (parse_directive): Same.
3510 (sprintf_dom_walker::compute_format_length): Same.
3511 (try_substitute_return_value): Same.
3513 2017-01-03 Jeff Law <law@redhat.com>
3516 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3517 non-constant residual for zero at runtime and avoid probing in
3518 that case. Reorganize code for trailing problem to mirror handling
3521 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3523 PR tree-optimization/83501
3524 * tree-ssa-strlen.c (get_string_cst): New.
3525 (handle_char_store): Call get_string_cst.
3527 2018-01-03 Martin Liska <mliska@suse.cz>
3529 PR tree-optimization/83593
3530 * tree-ssa-strlen.c: Include tree-cfg.h.
3531 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3532 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3533 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3535 (strlen_dom_walker::before_dom_children): Call
3536 gimple_purge_dead_eh_edges. Dump tranformation with details
3538 (strlen_dom_walker::before_dom_children): Update call by adding
3539 new argument cleanup_eh.
3540 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3542 2018-01-03 Martin Liska <mliska@suse.cz>
3545 * cif-code.def (VARIADIC_THUNK): New enum value.
3546 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3549 2018-01-03 Jan Beulich <jbeulich@suse.com>
3551 * sse.md (mov<mode>_internal): Tighten condition for when to use
3552 vmovdqu<ssescalarsize> for TI and OI modes.
3554 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3556 Update copyright years.
3558 2018-01-03 Martin Liska <mliska@suse.cz>
3561 * ipa-visibility.c (function_and_variable_visibility): Skip
3562 functions with noipa attribure.
3564 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3566 * gcc.c (process_command): Update copyright notice dates.
3567 * gcov-dump.c (print_version): Ditto.
3568 * gcov.c (print_version): Ditto.
3569 * gcov-tool.c (print_version): Ditto.
3570 * gengtype.c (create_file): Ditto.
3571 * doc/cpp.texi: Bump @copying's copyright year.
3572 * doc/cppinternals.texi: Ditto.
3573 * doc/gcc.texi: Ditto.
3574 * doc/gccint.texi: Ditto.
3575 * doc/gcov.texi: Ditto.
3576 * doc/install.texi: Ditto.
3577 * doc/invoke.texi: Ditto.
3579 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3581 * vector-builder.h (vector_builder::m_full_nelts): Change from
3582 unsigned int to poly_uint64.
3583 (vector_builder::full_nelts): Update prototype accordingly.
3584 (vector_builder::new_vector): Likewise.
3585 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3586 (vector_builder::operator ==): Likewise.
3587 (vector_builder::finalize): Likewise.
3588 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3589 Take the number of elements as a poly_uint64 rather than an
3591 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3592 from unsigned int to poly_uint64.
3593 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3594 (vec_perm_indices::new_vector): Likewise.
3595 (vec_perm_indices::length): Likewise.
3596 (vec_perm_indices::nelts_per_input): Likewise.
3597 (vec_perm_indices::input_nelts): Likewise.
3598 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3599 number of elements per input as a poly_uint64 rather than an
3600 unsigned int. Use the original encoding for variable-length
3601 vectors, rather than clamping each individual element.
3602 For the second and subsequent elements in each pattern,
3603 clamp the step and base before clamping their sum.
3604 (vec_perm_indices::series_p): Handle polynomial element counts.
3605 (vec_perm_indices::all_in_range_p): Likewise.
3606 (vec_perm_indices_to_tree): Likewise.
3607 (vec_perm_indices_to_rtx): Likewise.
3608 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3609 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3610 (tree_vector_builder::new_binary_operation): Handle polynomial
3611 element counts. Return false if we need to know the number
3612 of elements at compile time.
3613 * fold-const.c (fold_vec_perm): Punt if the number of elements
3614 isn't known at compile time.
3616 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3618 * vec-perm-indices.h (vec_perm_builder): Change element type
3619 from HOST_WIDE_INT to poly_int64.
3620 (vec_perm_indices::element_type): Update accordingly.
3621 (vec_perm_indices::clamp): Handle polynomial element_types.
3622 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3623 (vec_perm_indices::all_in_range_p): Likewise.
3624 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3626 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3627 polynomial vec_perm_indices element types.
3628 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3629 * fold-const.c (fold_vec_perm): Likewise.
3630 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3631 * tree-vect-generic.c (lower_vec_perm): Likewise.
3632 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3633 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3634 element type to HOST_WIDE_INT.
3636 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3637 Alan Hayward <alan.hayward@arm.com>
3638 David Sherwood <david.sherwood@arm.com>
3640 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3641 rather than an int. Use plus_constant.
3642 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3643 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3645 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3646 Alan Hayward <alan.hayward@arm.com>
3647 David Sherwood <david.sherwood@arm.com>
3649 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3650 a HOST_WIDE_INT to a poly_int64.
3652 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3653 Alan Hayward <alan.hayward@arm.com>
3654 David Sherwood <david.sherwood@arm.com>
3656 * calls.c (load_register_parameters): Cope with polynomial
3657 mode sizes. Require a constant size for BLKmode parameters
3658 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3659 forces a parameter to be padded at the lsb end in order to
3660 fill a complete number of words, require the parameter size
3661 to be ordered wrt UNITS_PER_WORD.
3663 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3664 Alan Hayward <alan.hayward@arm.com>
3665 David Sherwood <david.sherwood@arm.com>
3667 * reload1.c (spill_stack_slot_width): Change element type
3668 from unsigned int to poly_uint64_pod.
3669 (alter_reg): Treat mode sizes as polynomial.
3671 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3672 Alan Hayward <alan.hayward@arm.com>
3673 David Sherwood <david.sherwood@arm.com>
3675 * reload.c (complex_word_subreg_p): New function.
3676 (reload_inner_reg_of_subreg, push_reload): Use it.
3678 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3679 Alan Hayward <alan.hayward@arm.com>
3680 David Sherwood <david.sherwood@arm.com>
3682 * lra-constraints.c (process_alt_operands): Reject matched
3683 operands whose sizes aren't ordered.
3684 (match_reload): Refer to this check here.
3686 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3687 Alan Hayward <alan.hayward@arm.com>
3688 David Sherwood <david.sherwood@arm.com>
3690 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3691 that the mode size is in the set {1, 2, 4, 8, 16}.
3693 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3694 Alan Hayward <alan.hayward@arm.com>
3695 David Sherwood <david.sherwood@arm.com>
3697 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3698 Use plus_constant instead of gen_rtx_PLUS.
3700 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3701 Alan Hayward <alan.hayward@arm.com>
3702 David Sherwood <david.sherwood@arm.com>
3704 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3705 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3706 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3707 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3708 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3709 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3710 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3711 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3712 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3713 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3715 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3716 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3717 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3718 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3719 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3720 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3721 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3722 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3723 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3724 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3726 * expr.c (emit_move_resolve_push): Treat the input and result
3727 of PUSH_ROUNDING as a poly_int64.
3728 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3729 (emit_push_insn): Likewise.
3730 * lra-eliminations.c (mark_not_eliminable): Likewise.
3731 * recog.c (push_operand): Likewise.
3732 * reload1.c (elimination_effects): Likewise.
3733 * rtlanal.c (nonzero_bits1): Likewise.
3734 * calls.c (store_one_arg): Likewise. Require the padding to be
3735 known at compile time.
3737 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3738 Alan Hayward <alan.hayward@arm.com>
3739 David Sherwood <david.sherwood@arm.com>
3741 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3742 Use plus_constant instead of gen_rtx_PLUS.
3744 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3745 Alan Hayward <alan.hayward@arm.com>
3746 David Sherwood <david.sherwood@arm.com>
3748 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3751 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3752 Alan Hayward <alan.hayward@arm.com>
3753 David Sherwood <david.sherwood@arm.com>
3755 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3756 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3757 via stack temporaries. Treat the mode size as polynomial too.
3759 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3760 Alan Hayward <alan.hayward@arm.com>
3761 David Sherwood <david.sherwood@arm.com>
3763 * expr.c (expand_expr_real_2): When handling conversions involving
3764 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3765 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3766 as a poly_uint64 too.
3768 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3769 Alan Hayward <alan.hayward@arm.com>
3770 David Sherwood <david.sherwood@arm.com>
3772 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3774 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3775 Alan Hayward <alan.hayward@arm.com>
3776 David Sherwood <david.sherwood@arm.com>
3778 * combine.c (can_change_dest_mode): Handle polynomial
3779 REGMODE_NATURAL_SIZE.
3780 * expmed.c (store_bit_field_1): Likewise.
3781 * expr.c (store_constructor): Likewise.
3782 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3783 and polynomial REGMODE_NATURAL_SIZE.
3784 (gen_lowpart_common): Likewise.
3785 * reginfo.c (record_subregs_of_mode): Likewise.
3786 * rtlanal.c (read_modify_subreg_p): Likewise.
3788 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3789 Alan Hayward <alan.hayward@arm.com>
3790 David Sherwood <david.sherwood@arm.com>
3792 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3793 numbers of elements.
3795 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3796 Alan Hayward <alan.hayward@arm.com>
3797 David Sherwood <david.sherwood@arm.com>
3799 * match.pd: Cope with polynomial numbers of vector elements.
3801 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3802 Alan Hayward <alan.hayward@arm.com>
3803 David Sherwood <david.sherwood@arm.com>
3805 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3806 in a POINTER_PLUS_EXPR.
3808 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3809 Alan Hayward <alan.hayward@arm.com>
3810 David Sherwood <david.sherwood@arm.com>
3812 * omp-simd-clone.c (simd_clone_subparts): New function.
3813 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3814 (ipa_simd_modify_function_body): Likewise.
3816 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3817 Alan Hayward <alan.hayward@arm.com>
3818 David Sherwood <david.sherwood@arm.com>
3820 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3821 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3822 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3823 (expand_vector_condition, vector_element): Likewise.
3824 (subparts_gt): New function.
3825 (get_compute_type): Use subparts_gt.
3826 (count_type_subparts): Delete.
3827 (expand_vector_operations_1): Use subparts_gt instead of
3828 count_type_subparts.
3830 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3831 Alan Hayward <alan.hayward@arm.com>
3832 David Sherwood <david.sherwood@arm.com>
3834 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3835 (vect_compile_time_alias): ...this new function. Do the calculation
3836 on poly_ints rather than trees.
3837 (vect_prune_runtime_alias_test_list): Update call accordingly.
3839 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3840 Alan Hayward <alan.hayward@arm.com>
3841 David Sherwood <david.sherwood@arm.com>
3843 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3845 (vect_schedule_slp_instance): Likewise.
3847 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3848 Alan Hayward <alan.hayward@arm.com>
3849 David Sherwood <david.sherwood@arm.com>
3851 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3852 constant and extern definitions for variable-length vectors.
3853 (vect_get_constant_vectors): Note that the number of units
3854 is known to be constant.
3856 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3857 Alan Hayward <alan.hayward@arm.com>
3858 David Sherwood <david.sherwood@arm.com>
3860 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3861 of units as polynomial. Choose between WIDE and NARROW based
3864 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3865 Alan Hayward <alan.hayward@arm.com>
3866 David Sherwood <david.sherwood@arm.com>
3868 * tree-vect-stmts.c (simd_clone_subparts): New function.
3869 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3871 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3872 Alan Hayward <alan.hayward@arm.com>
3873 David Sherwood <david.sherwood@arm.com>
3875 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3876 vectors as polynomial. Use build_index_vector for
3879 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3880 Alan Hayward <alan.hayward@arm.com>
3881 David Sherwood <david.sherwood@arm.com>
3883 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3884 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3885 for variable-length vectors.
3886 (vectorizable_mask_load_store): Treat the number of units as
3887 polynomial, asserting that it is constant if the condition has
3888 already been enforced.
3889 (vectorizable_store, vectorizable_load): Likewise.
3891 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3892 Alan Hayward <alan.hayward@arm.com>
3893 David Sherwood <david.sherwood@arm.com>
3895 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3896 of units as polynomial. Punt if we can't tell at compile time
3897 which vector contains the final result.
3899 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3900 Alan Hayward <alan.hayward@arm.com>
3901 David Sherwood <david.sherwood@arm.com>
3903 * tree-vect-loop.c (vectorizable_induction): Treat the number
3904 of units as polynomial. Punt on SLP inductions. Use an integer
3905 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3906 cast of such a series for variable-length floating-point
3909 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3910 Alan Hayward <alan.hayward@arm.com>
3911 David Sherwood <david.sherwood@arm.com>
3913 * tree.h (build_index_vector): Declare.
3914 * tree.c (build_index_vector): New function.
3915 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3916 of units as polynomial, forcibly converting it to a constant if
3917 vectorizable_reduction has already enforced the condition.
3918 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3919 to create a {1,2,3,...} vector.
3920 (vectorizable_reduction): Treat the number of units as polynomial.
3921 Choose vectype_in based on the largest scalar element size rather
3922 than the smallest number of units. Enforce the restrictions
3925 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3926 Alan Hayward <alan.hayward@arm.com>
3927 David Sherwood <david.sherwood@arm.com>
3929 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3930 number of units as polynomial.
3932 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3933 Alan Hayward <alan.hayward@arm.com>
3934 David Sherwood <david.sherwood@arm.com>
3936 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3937 * target.def (autovectorize_vector_sizes): Return the vector sizes
3938 by pointer, using vector_sizes rather than a bitmask.
3939 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3940 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3941 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3943 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3944 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3945 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3946 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3947 * omp-general.c (omp_max_vf): Likewise.
3948 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3949 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3950 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3951 * tree-vect-slp.c (vect_slp_bb): Likewise.
3952 * doc/tm.texi: Regenerate.
3953 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3955 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3956 the vector size as a poly_uint64 rather than an unsigned int.
3957 (current_vector_size): Change from an unsigned int to a poly_uint64.
3958 (get_vectype_for_scalar_type): Update accordingly.
3959 * tree.h (build_truth_vector_type): Take the size and number of
3960 units as a poly_uint64 rather than an unsigned int.
3961 (build_vector_type): Add a temporary overload that takes
3962 the number of units as a poly_uint64 rather than an unsigned int.
3963 * tree.c (make_vector_type): Likewise.
3964 (build_truth_vector_type): Take the number of units as a poly_uint64
3965 rather than an unsigned int.
3967 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3968 Alan Hayward <alan.hayward@arm.com>
3969 David Sherwood <david.sherwood@arm.com>
3971 * target.def (get_mask_mode): Take the number of units and length
3972 as poly_uint64s rather than unsigned ints.
3973 * targhooks.h (default_get_mask_mode): Update accordingly.
3974 * targhooks.c (default_get_mask_mode): Likewise.
3975 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3976 * doc/tm.texi: Regenerate.
3978 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3979 Alan Hayward <alan.hayward@arm.com>
3980 David Sherwood <david.sherwood@arm.com>
3982 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3983 * omp-general.c (omp_max_vf): Likewise.
3984 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3985 (expand_omp_simd): Handle polynomial safelen.
3986 * omp-low.c (omplow_simd_context): Add a default constructor.
3987 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3988 (lower_rec_simd_input_clauses): Update accordingly.
3989 (lower_rec_input_clauses): Likewise.
3991 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3992 Alan Hayward <alan.hayward@arm.com>
3993 David Sherwood <david.sherwood@arm.com>
3995 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3996 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3997 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3998 (vect_analyze_slp_cost): Likewise.
3999 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4000 (vect_model_load_cost): Likewise.
4002 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4003 Alan Hayward <alan.hayward@arm.com>
4004 David Sherwood <david.sherwood@arm.com>
4006 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4007 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4008 from an unsigned int * to a poly_uint64_pod *.
4009 (calculate_unrolling_factor): New function.
4010 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4012 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4013 Alan Hayward <alan.hayward@arm.com>
4014 David Sherwood <david.sherwood@arm.com>
4016 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4017 from an unsigned int to a poly_uint64.
4018 (_loop_vec_info::slp_unrolling_factor): Likewise.
4019 (_loop_vec_info::vectorization_factor): Change from an int
4021 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4022 (vect_get_num_vectors): New function.
4023 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4024 (vect_get_num_copies): Use vect_get_num_vectors.
4025 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4026 to an unsigned int *.
4027 (vect_analyze_data_refs): Change min_vf from an int * to a
4029 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4030 than an unsigned HOST_WIDE_INT.
4031 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4032 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4033 to an unsigned int *.
4034 (vect_analyze_data_ref_dependences): Likewise.
4035 (vect_compute_data_ref_alignment): Handle polynomial vf.
4036 (vect_enhance_data_refs_alignment): Likewise.
4037 (vect_prune_runtime_alias_test_list): Likewise.
4038 (vect_shift_permute_load_chain): Likewise.
4039 (vect_supportable_dr_alignment): Likewise.
4040 (dependence_distance_ge_vf): Take the vectorization factor as a
4041 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4042 (vect_analyze_data_refs): Change min_vf from an int * to a
4044 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4045 vfm1 as a poly_uint64 rather than an int. Make the same change
4046 for the returned bound_scalar.
4047 (vect_gen_vector_loop_niters): Handle polynomial vf.
4048 (vect_do_peeling): Likewise. Update call to
4049 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4050 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4052 * tree-vect-loop.c (vect_determine_vectorization_factor)
4053 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4054 (vect_get_known_peeling_cost): Likewise.
4055 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4056 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4057 (vect_transform_loop): Likewise. Use the lowest possible VF when
4058 updating the upper bounds of the loop.
4059 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4061 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4062 polynomial unroll factors.
4063 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4064 (vect_make_slp_decision): Likewise.
4065 (vect_supported_load_permutation_p): Likewise, and polynomial
4067 (vect_analyze_slp_cost): Handle polynomial vf.
4068 (vect_slp_analyze_node_operations): Likewise.
4069 (vect_slp_analyze_bb_1): Likewise.
4070 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4071 than an unsigned HOST_WIDE_INT.
4072 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4073 (vectorizable_load): Handle polynomial vf.
4074 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4076 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4078 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4079 Alan Hayward <alan.hayward@arm.com>
4080 David Sherwood <david.sherwood@arm.com>
4082 * match.pd: Handle bit operations involving three constants
4083 and try to fold one pair.
4085 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4087 * tree-vect-loop-manip.c: Include gimple-fold.h.
4088 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4089 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4090 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4091 Add a path that uses a step of VF instead of 1, but disable it
4093 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4094 and niters_no_overflow parameters. Update calls to
4095 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4096 Create a new SSA name if the latter choses to use a ste other
4097 than zero, and return it via niters_vector_mult_vf_var.
4098 * tree-vect-loop.c (vect_transform_loop): Update calls to
4099 vect_do_peeling, vect_gen_vector_loop_niters and
4100 slpeel_make_loop_iterate_ntimes.
4101 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4102 (vect_gen_vector_loop_niters): Update declarations after above changes.
4104 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4106 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4107 128-bit round to integer instructions.
4108 (ceil<mode>2): Likewise.
4109 (btrunc<mode>2): Likewise.
4110 (round<mode>2): Likewise.
4112 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4114 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4115 unaligned VSX load/store on P8/P9.
4116 (expand_block_clear): Allow the use of unaligned VSX
4117 load/store on P8/P9.
4119 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4121 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4123 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4124 swap associated with both a load and a store.
4126 2018-01-02 Andrew Waterman <andrew@sifive.com>
4128 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4129 * config/riscv/riscv.md (clear_cache): Use it.
4131 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4133 * web.c: Remove out-of-date comment.
4135 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4137 * expr.c (fixup_args_size_notes): Check that any existing
4138 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4139 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4140 (emit_single_push_insn): ...here.
4142 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4144 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4145 (const_vector_encoded_nelts): New function.
4146 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4147 (const_vector_int_elt, const_vector_elt): Declare.
4148 * emit-rtl.c (const_vector_int_elt_1): New function.
4149 (const_vector_elt): Likewise.
4150 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4151 of CONST_VECTOR_ELT.
4153 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4155 * expr.c: Include rtx-vector-builder.h.
4156 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4157 directly on the tree encoding.
4158 (const_vector_from_tree): Likewise.
4159 * optabs.c: Include rtx-vector-builder.h.
4160 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4161 sequence of "u" values.
4162 * vec-perm-indices.c: Include rtx-vector-builder.h.
4163 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4164 directly on the vec_perm_indices encoding.
4166 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4168 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4169 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4170 * rtx-vector-builder.h: New file.
4171 * rtx-vector-builder.c: Likewise.
4172 * rtl.h (rtx_def::u2): Add a const_vector field.
4173 (CONST_VECTOR_NPATTERNS): New macro.
4174 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4175 (CONST_VECTOR_DUPLICATE_P): Likewise.
4176 (CONST_VECTOR_STEPPED_P): Likewise.
4177 (CONST_VECTOR_ENCODED_ELT): Likewise.
4178 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4179 (unwrap_const_vec_duplicate): Likewise.
4180 (const_vec_series_p): Check for a non-duplicated vector encoding.
4181 Say that the function only returns true for integer vectors.
4182 * emit-rtl.c: Include rtx-vector-builder.h.
4183 (gen_const_vec_duplicate_1): Delete.
4184 (gen_const_vector): Call gen_const_vec_duplicate instead of
4185 gen_const_vec_duplicate_1.
4186 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4187 (gen_const_vec_duplicate): Use rtx_vector_builder.
4188 (gen_const_vec_series): Likewise.
4189 (gen_rtx_CONST_VECTOR): Likewise.
4190 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4191 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4192 Build a new vector rather than modifying a CONST_VECTOR in-place.
4193 (handle_special_swappables): Update call accordingly.
4194 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4195 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4196 Build a new vector rather than modifying a CONST_VECTOR in-place.
4197 (handle_special_swappables): Update call accordingly.
4199 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4201 * simplify-rtx.c (simplify_const_binary_operation): Use
4202 CONST_VECTOR_ELT instead of XVECEXP.
4204 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4206 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4207 the selector elements to be different from the data elements
4208 if the selector is a VECTOR_CST.
4209 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4210 ssizetype for the selector.
4212 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4214 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4215 before testing each element individually.
4216 * tree-vect-generic.c (lower_vec_perm): Likewise.
4218 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4220 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4221 * selftest-run-tests.c (selftest::run_tests): Call it.
4222 * vector-builder.h (vector_builder::operator ==): New function.
4223 (vector_builder::operator !=): Likewise.
4224 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4225 (vec_perm_indices::all_from_input_p): New function.
4226 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4227 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4228 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4229 instead of reading the VECTOR_CST directly. Detect whether both
4230 vector inputs are the same before constructing the vec_perm_indices,
4231 and update the number of inputs argument accordingly. Use the
4232 utility functions added above. Only construct sel2 if we need to.
4234 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4236 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4237 the broadcast of the low byte.
4238 (expand_mult_highpart): Use an explicit encoding for the permutes.
4239 * optabs-query.c (can_mult_highpart_p): Likewise.
4240 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4241 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4242 (vectorizable_bswap): Likewise.
4243 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4244 explicit encoding for the power-of-2 permutes.
4245 (vect_permute_store_chain): Likewise.
4246 (vect_grouped_load_supported): Likewise.
4247 (vect_permute_load_chain): Likewise.
4249 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4251 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4252 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4253 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4254 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4255 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4256 (vect_gen_perm_mask_any): Likewise.
4258 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4260 * int-vector-builder.h: New file.
4261 * vec-perm-indices.h: Include int-vector-builder.h.
4262 (vec_perm_indices): Redefine as an int_vector_builder.
4263 (auto_vec_perm_indices): Delete.
4264 (vec_perm_builder): Redefine as a stand-alone class.
4265 (vec_perm_indices::vec_perm_indices): New function.
4266 (vec_perm_indices::clamp): Likewise.
4267 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4268 (vec_perm_indices::new_vector): New function.
4269 (vec_perm_indices::new_expanded_vector): Update for new
4270 vec_perm_indices class.
4271 (vec_perm_indices::rotate_inputs): New function.
4272 (vec_perm_indices::all_in_range_p): Operate directly on the
4273 encoded form, without computing elided elements.
4274 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4275 encoding. Update for new vec_perm_indices class.
4276 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4277 the given vec_perm_builder.
4278 (expand_vec_perm_var): Update vec_perm_builder constructor.
4279 (expand_mult_highpart): Use vec_perm_builder instead of
4280 auto_vec_perm_indices.
4281 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4282 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4283 or double series encoding as appropriate.
4284 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4285 vec_perm_indices instead of auto_vec_perm_indices.
4286 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4287 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4288 (vect_permute_store_chain): Likewise.
4289 (vect_grouped_load_supported): Likewise.
4290 (vect_permute_load_chain): Likewise.
4291 (vect_shift_permute_load_chain): Likewise.
4292 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4293 (vect_transform_slp_perm_load): Likewise.
4294 (vect_schedule_slp_instance): Likewise.
4295 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4296 (vectorizable_mask_load_store): Likewise.
4297 (vectorizable_bswap): Likewise.
4298 (vectorizable_store): Likewise.
4299 (vectorizable_load): Likewise.
4300 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4301 vec_perm_indices instead of auto_vec_perm_indices. Use
4302 tree_to_vec_perm_builder to read the vector from a tree.
4303 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4304 vec_perm_builder instead of a vec_perm_indices.
4305 (have_whole_vector_shift): Use vec_perm_builder and
4306 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4307 truncation to calc_vec_perm_mask_for_shift.
4308 (vect_create_epilog_for_reduction): Likewise.
4309 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4310 from auto_vec_perm_indices to vec_perm_indices.
4311 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4312 instead of changing individual elements.
4313 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4314 the vector in d.perm.
4315 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4316 from auto_vec_perm_indices to vec_perm_indices.
4317 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4318 instead of changing individual elements.
4319 (arm_vectorize_vec_perm_const): Use new_vector to install
4320 the vector in d.perm.
4321 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4322 Update vec_perm_builder constructor.
4323 (rs6000_expand_interleave): Likewise.
4324 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4325 (rs6000_expand_interleave): Likewise.
4327 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4329 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4330 to qimode could truncate the indices.
4331 * optabs.c (expand_vec_perm_var): Likewise.
4333 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4335 * Makefile.in (OBJS): Add vec-perm-indices.o.
4336 * vec-perm-indices.h: New file.
4337 * vec-perm-indices.c: Likewise.
4338 * target.h (vec_perm_indices): Replace with a forward class
4340 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4341 * optabs.h: Include vec-perm-indices.h.
4342 (expand_vec_perm): Delete.
4343 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4344 (expand_vec_perm_const): Declare.
4345 * target.def (vec_perm_const_ok): Replace with...
4346 (vec_perm_const): ...this new hook.
4347 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4348 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4349 * doc/tm.texi: Regenerate.
4350 * optabs.def (vec_perm_const): Delete.
4351 * doc/md.texi (vec_perm_const): Likewise.
4352 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4353 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4354 expand_vec_perm for constant permutation vectors. Assert that
4355 the mode of variable permutation vectors is the integer equivalent
4356 of the mode that is being permuted.
4357 * optabs-query.h (selector_fits_mode_p): Declare.
4358 * optabs-query.c: Include vec-perm-indices.h.
4359 (selector_fits_mode_p): New function.
4360 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4361 is defined, instead of checking whether the vec_perm_const_optab
4362 exists. Use targetm.vectorize.vec_perm_const instead of
4363 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4364 fit in the vector mode before using a variable permute.
4365 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4366 vec_perm_indices instead of an rtx.
4367 (expand_vec_perm): Replace with...
4368 (expand_vec_perm_const): ...this new function. Take the selector
4369 as a vec_perm_indices rather than an rtx. Also take the mode of
4370 the selector. Update call to shift_amt_for_vec_perm_mask.
4371 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4372 Use vec_perm_indices::new_expanded_vector to expand the original
4373 selector into bytes. Check whether the indices fit in the vector
4374 mode before using a variable permute.
4375 (expand_vec_perm_var): Make global.
4376 (expand_mult_highpart): Use expand_vec_perm_const.
4377 * fold-const.c: Includes vec-perm-indices.h.
4378 * tree-ssa-forwprop.c: Likewise.
4379 * tree-vect-data-refs.c: Likewise.
4380 * tree-vect-generic.c: Likewise.
4381 * tree-vect-loop.c: Likewise.
4382 * tree-vect-slp.c: Likewise.
4383 * tree-vect-stmts.c: Likewise.
4384 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4386 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4387 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4388 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4389 (aarch64_vectorize_vec_perm_const): ...this new function.
4390 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4391 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4392 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4393 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4394 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4395 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4396 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4398 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4399 check for NEON modes.
4400 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4401 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4402 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4403 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4405 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4406 the old VEC_PERM_CONST conditions.
4407 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4408 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4409 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4410 (ia64_vectorize_vec_perm_const_ok): Merge into...
4411 (ia64_vectorize_vec_perm_const): ...this new function.
4412 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4413 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4414 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4415 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4416 * config/mips/mips.c (mips_expand_vec_perm_const)
4417 (mips_vectorize_vec_perm_const_ok): Merge into...
4418 (mips_vectorize_vec_perm_const): ...this new function.
4419 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4420 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4421 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4422 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4423 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4424 (rs6000_expand_vec_perm_const): Delete.
4425 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4427 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4428 (altivec_expand_vec_perm_const_le): Take each operand individually.
4429 Operate on constant selectors rather than rtxes.
4430 (altivec_expand_vec_perm_const): Likewise. Update call to
4431 altivec_expand_vec_perm_const_le.
4432 (rs6000_expand_vec_perm_const): Delete.
4433 (rs6000_vectorize_vec_perm_const_ok): Delete.
4434 (rs6000_vectorize_vec_perm_const): New function.
4435 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4436 an element count and rtx array.
4437 (rs6000_expand_extract_even): Update call accordingly.
4438 (rs6000_expand_interleave): Likewise.
4439 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4440 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4441 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4442 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4443 (rs6000_expand_vec_perm_const): Delete.
4444 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4445 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4446 (altivec_expand_vec_perm_const_le): Take each operand individually.
4447 Operate on constant selectors rather than rtxes.
4448 (altivec_expand_vec_perm_const): Likewise. Update call to
4449 altivec_expand_vec_perm_const_le.
4450 (rs6000_expand_vec_perm_const): Delete.
4451 (rs6000_vectorize_vec_perm_const_ok): Delete.
4452 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4453 reference to the SPE evmerge intructions.
4454 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4455 an element count and rtx array.
4456 (rs6000_expand_extract_even): Update call accordingly.
4457 (rs6000_expand_interleave): Likewise.
4458 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4459 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4461 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4463 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4465 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4466 vector mode and that that mode matches the mode of the data
4468 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4469 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4470 directly using expand_vec_perm_1 when forcing selectors into
4472 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4474 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4476 * optabs-query.h (can_vec_perm_p): Delete.
4477 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4478 * optabs-query.c (can_vec_perm_p): Split into...
4479 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4480 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4481 particular selector is valid.
4482 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4483 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4484 (vect_grouped_load_supported): Likewise.
4485 (vect_shift_permute_load_chain): Likewise.
4486 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4487 (vect_transform_slp_perm_load): Likewise.
4488 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4489 (vectorizable_bswap): Likewise.
4490 (vect_gen_perm_mask_checked): Likewise.
4491 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4492 implementations of variable permutation vectors into account
4493 when deciding which selector to use.
4494 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4495 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4496 with a false third argument.
4497 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4498 to test whether the constant selector is valid and can_vec_perm_var_p
4499 to test whether a variable selector is valid.
4501 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4503 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4504 * optabs-query.c (can_vec_perm_p): Likewise.
4505 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4506 instead of vec_perm_indices.
4507 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4508 (vect_gen_perm_mask_checked): Likewise,
4509 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4510 (vect_gen_perm_mask_checked): Likewise,
4512 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4514 * optabs-query.h (qimode_for_vec_perm): Declare.
4515 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4516 (qimode_for_vec_perm): ...this new function.
4517 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4519 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4521 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4522 does not have a conditional at the top.
4524 2018-01-02 Richard Biener <rguenther@suse.de>
4526 * ipa-inline.c (big_speedup_p): Fix expression.
4528 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4531 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4534 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4538 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4539 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4540 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4541 cond_taken_branch_cost 3->4.
4543 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4545 PR tree-optimization/83581
4546 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4547 TODO_cleanup_cfg if any changes have been made.
4550 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4551 convert_modes if target mode has the right side, but different mode
4555 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4556 last argument when extracting from CONCAT. If either from_real or
4557 from_imag is NULL, use expansion through memory. If result is not
4558 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4559 the parts directly to inner mode, if even that fails, use expansion
4563 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4564 check for bswap in mode rather than HImode and use that in expand_unop
4567 Copyright (C) 2018 Free Software Foundation, Inc.
4569 Copying and distribution of this file, with or without modification,
4570 are permitted in any medium without royalty provided the copyright
4571 notice and this notice are preserved.