1 ;; Scheduling description for PowerPC 601 processor.
2 ;; Copyright (C) 2003-2014 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify it
7 ;; under the terms of the GNU General Public License as published
8 ;; by the Free Software Foundation; either version 3, or (at your
9 ;; option) any later version.
11 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
12 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 ;; License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 (define_automaton "ppc601,ppc601fp")
21 (define_cpu_unit "iu_ppc601" "ppc601")
22 (define_cpu_unit "fpu_ppc601" "ppc601fp")
23 (define_cpu_unit "bpu_ppc601" "ppc601")
25 ;; PPC601 32-bit IU, FPU, BPU
27 (define_insn_reservation "ppc601-load" 2
28 (and (eq_attr "type" "load,load_l,store_c,sync")
29 (eq_attr "cpu" "ppc601"))
32 (define_insn_reservation "ppc601-store" 2
33 (and (eq_attr "type" "store")
34 (eq_attr "cpu" "ppc601"))
37 (define_insn_reservation "ppc601-fpload" 3
38 (and (eq_attr "type" "fpload")
39 (eq_attr "cpu" "ppc601"))
42 (define_insn_reservation "ppc601-fpstore" 3
43 (and (eq_attr "type" "fpstore")
44 (eq_attr "cpu" "ppc601"))
45 "iu_ppc601+fpu_ppc601")
47 (define_insn_reservation "ppc601-integer" 1
48 (and (eq_attr "type" "integer,insert,shift,\
49 trap,var_shift_rotate,cntlz,exts,isel")
50 (eq_attr "cpu" "ppc601"))
53 (define_insn_reservation "ppc601-two" 1
54 (and (eq_attr "type" "two")
55 (eq_attr "cpu" "ppc601"))
56 "iu_ppc601,iu_ppc601")
58 (define_insn_reservation "ppc601-three" 1
59 (and (eq_attr "type" "three")
60 (eq_attr "cpu" "ppc601"))
61 "iu_ppc601,iu_ppc601,iu_ppc601")
63 (define_insn_reservation "ppc601-imul" 5
64 (and (eq_attr "type" "mul")
65 (eq_attr "cpu" "ppc601"))
68 (define_insn_reservation "ppc601-idiv" 36
69 (and (eq_attr "type" "idiv")
70 (eq_attr "cpu" "ppc601"))
73 ; compare executes on integer unit, but feeds insns which
74 ; execute on the branch unit.
75 (define_insn_reservation "ppc601-compare" 3
76 (and (eq_attr "type" "cmp,compare,delayed_compare,\
78 (eq_attr "cpu" "ppc601"))
79 "iu_ppc601,nothing,bpu_ppc601")
81 (define_insn_reservation "ppc601-fpcompare" 5
82 (and (eq_attr "type" "fpcompare")
83 (eq_attr "cpu" "ppc601"))
84 "(fpu_ppc601+iu_ppc601*2),nothing*2,bpu_ppc601")
86 (define_insn_reservation "ppc601-fp" 4
87 (and (eq_attr "type" "fp")
88 (eq_attr "cpu" "ppc601"))
91 (define_insn_reservation "ppc601-dmul" 5
92 (and (eq_attr "type" "dmul")
93 (eq_attr "cpu" "ppc601"))
96 (define_insn_reservation "ppc601-sdiv" 17
97 (and (eq_attr "type" "sdiv")
98 (eq_attr "cpu" "ppc601"))
101 (define_insn_reservation "ppc601-ddiv" 31
102 (and (eq_attr "type" "ddiv")
103 (eq_attr "cpu" "ppc601"))
106 (define_insn_reservation "ppc601-mfcr" 2
107 (and (eq_attr "type" "mfcr")
108 (eq_attr "cpu" "ppc601"))
109 "iu_ppc601,bpu_ppc601")
111 (define_insn_reservation "ppc601-mtcr" 4
112 (and (eq_attr "type" "mtcr")
113 (eq_attr "cpu" "ppc601"))
114 "iu_ppc601,bpu_ppc601")
116 (define_insn_reservation "ppc601-crlogical" 4
117 (and (eq_attr "type" "cr_logical,delayed_cr")
118 (eq_attr "cpu" "ppc601"))
121 (define_insn_reservation "ppc601-mtjmpr" 4
122 (and (eq_attr "type" "mtjmpr")
123 (eq_attr "cpu" "ppc601"))
124 "iu_ppc601,bpu_ppc601")
126 (define_insn_reservation "ppc601-mfjmpr" 2
127 (and (eq_attr "type" "mfjmpr")
128 (eq_attr "cpu" "ppc601"))
129 "iu_ppc601,bpu_ppc601")
131 (define_insn_reservation "ppc601-branch" 1
132 (and (eq_attr "type" "jmpreg,branch,isync")
133 (eq_attr "cpu" "ppc601"))