| blob | e8617439a480485021178c3ea1531cb3e8cd5542 |
1 /* Statement Analysis and Transformation for Vectorization
2 Copyright (C) 2003-2024 Free Software Foundation, Inc.
3 Contributed by Dorit Naishlos <dorit@il.ibm.com>
4 and Ira Rosen <irar@il.ibm.com>
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
61 /* For lang_hooks.types.type_for_mode. */
64 /* Return the vectorized type for the given statement. */
66 tree
68 {
70 }
72 /* Return TRUE iff the given statement is in an inner loop relative to
73 the loop being vectorized. */
74 bool
76 {
88 }
90 /* Record the cost of a statement, either by directly informing the
91 target model or by saving it in a vector for later processing.
92 Return a preliminary estimate of the statement's cost. */
94 static unsigned
100 {
108 stmt_info_for_cost si
114 }
116 unsigned
121 {
124 }
126 unsigned
131 {
134 }
136 unsigned
140 {
145 }
147 /* Return a variable of type ELEM_TYPE[NELEMS]. */
149 static tree
151 {
154 }
156 /* ARRAY is an array of vectors created by create_vector_array.
157 Return an SSA_NAME for the vector in index N. The reference
158 is part of the vectorization of STMT_INFO and the vector is associated
159 with scalar destination SCALAR_DEST. */
161 static tree
165 {
182 }
184 /* ARRAY is an array of vectors created by create_vector_array.
185 Emit code to store SSA_NAME VECT in index N of the array.
186 The store is part of the vectorization of STMT_INFO. */
188 static void
192 {
193 tree array_ref;
202 }
204 /* PTR is a pointer to an array of type TYPE. Return a representation
205 of *PTR. The memory reference replaces those in FIRST_DR
206 (and its group). */
208 static tree
210 {
211 tree mem_ref;
214 /* Arrays have the same alignment as their type. */
217 }
219 /* Add a clobber of variable VAR to the vectorization of STMT_INFO.
220 Emit the clobber before *GSI. */
222 static void
225 {
229 }
231 /* Utility functions used by vect_mark_stmts_to_be_vectorized. */
233 /* Function vect_mark_relevant.
235 Mark STMT_INFO as "relevant for vectorization" and add it to WORKLIST. */
237 static void
240 {
249 /* If this stmt is an original stmt in a pattern, we might need to mark its
250 related pattern stmt instead of the original stmt. However, such stmts
251 may have their own uses that are not in any pattern, in such cases the
252 stmt itself should be marked. */
254 {
255 /* This is the last stmt in a sequence that was detected as a
256 pattern that can potentially be vectorized. Don't mark the stmt
257 as relevant/live because it's not going to be vectorized.
258 Instead mark the pattern-stmt that replaces it. */
262 "last stmt in pattern. don't mark"
272 {
275 "vec_stmt_relevant_p: forcing live pattern stmt "
278 }
284 }
292 {
297 }
300 }
303 /* Function is_simple_and_all_uses_invariant
305 Return true if STMT_INFO is simple and all uses of it are invariant. */
307 bool
309 loop_vec_info loop_vinfo)
310 {
311 tree op;
312 ssa_op_iter iter;
319 {
323 {
328 }
332 }
334 }
336 /* Function vect_stmt_relevant_p.
338 Return true if STMT_INFO, in the loop that is represented by LOOP_VINFO,
339 is "relevant for vectorization".
341 A stmt is considered "relevant for vectorization" if:
342 - it has uses outside the loop.
343 - it has vdefs (it alters memory).
344 - control stmts in the loop (except for the exit condition).
345 - it is an induction and we have multiple exits.
347 CHECKME: what other side effects would the vectorizer allow? */
349 static bool
352 {
354 ssa_op_iter op_iter;
355 imm_use_iterator imm_iter;
356 use_operand_p use_p;
357 def_operand_p def_p;
362 /* cond stmt other than loop exit cond. */
369 /* changing memory. */
373 {
378 }
380 /* uses outside the loop. */
382 {
384 {
387 {
395 /* We expect all such uses to be in the loop exit phis
396 (because of loop closed form) */
400 }
401 }
402 }
404 /* Check if it's an induction and multiple exits. In this case there will be
405 a usage later on after peeling which is needed for the alternate exit. */
408 {
411 "vec_stmt_relevant_p: induction forced for "
415 }
419 {
424 }
427 }
430 /* Function exist_non_indexing_operands_for_use_p
432 USE is one of the uses attached to STMT_INFO. Check if USE is
433 used in STMT_INFO for anything other than indexing an array. */
435 static bool
437 {
438 tree operand;
440 /* USE corresponds to some operand in STMT. If there is no data
441 reference in STMT, then any operand that corresponds to USE
442 is not indexing an array. */
446 /* STMT has a data_ref. FORNOW this means that its of one of
447 the following forms:
448 -1- ARRAY_REF = var
449 -2- var = ARRAY_REF
450 (This should have been verified in analyze_data_refs).
452 'var' in the second case corresponds to a def, not a use,
453 so USE cannot correspond to any operands that are not used
454 for array indexing.
456 Therefore, all we need to check is if STMT falls into the
457 first case, and whether var corresponds to USE. */
461 {
464 {
477 }
479 }
491 }
494 /*
495 Function process_use.
497 Inputs:
498 - a USE in STMT_VINFO in a loop represented by LOOP_VINFO
499 - RELEVANT - enum value to be set in the STMT_VINFO of the stmt
500 that defined USE. This is done by calling mark_relevant and passing it
501 the WORKLIST (to add DEF_STMT to the WORKLIST in case it is relevant).
502 - FORCE is true if exist_non_indexing_operands_for_use_p check shouldn't
503 be performed.
505 Outputs:
506 Generally, LIVE_P and RELEVANT are used to define the liveness and
507 relevance info of the DEF_STMT of this USE:
508 STMT_VINFO_LIVE_P (DEF_stmt_vinfo) <-- live_p
509 STMT_VINFO_RELEVANT (DEF_stmt_vinfo) <-- relevant
510 Exceptions:
511 - case 1: If USE is used only for address computations (e.g. array indexing),
512 which does not need to be directly vectorized, then the liveness/relevance
513 of the respective DEF_STMT is left unchanged.
514 - case 2: If STMT_VINFO is a reduction phi and DEF_STMT is a reduction stmt,
515 we skip DEF_STMT cause it had already been processed.
516 - case 3: If DEF_STMT and STMT_VINFO are in different nests, then
517 "relevant" will be modified accordingly.
519 Return true if everything is as expected. Return false otherwise. */
521 static opt_result
525 {
526 stmt_vec_info dstmt_vinfo;
529 /* case 1: we are only interested in uses that need to be vectorized. Uses
530 that are used for address computation are not considered relevant. */
536 "not vectorized:"
545 /* case 2: A reduction phi (STMT) defined by a reduction stmt (DSTMT_VINFO).
546 We have to force the stmt live since the epilogue loop needs it to
547 continue computing the reduction. */
553 {
559 }
561 /* case 3a: outer-loop stmt defining an inner-loop stmt:
562 outer-loop-header-bb:
563 d = dstmt_vinfo
564 inner-loop:
565 stmt # use (d)
566 outer-loop-tail-bb:
567 ... */
569 {
575 {
596 }
597 }
599 /* case 3b: inner-loop stmt defining an outer-loop stmt:
600 outer-loop-header-bb:
601 ...
602 inner-loop:
603 d = dstmt_vinfo
604 outer-loop-tail-bb (or outer-loop-exit-bb in double reduction):
605 stmt # use (d) */
607 {
613 {
631 }
632 }
633 /* We are also not interested in uses on loop PHI backedges that are
634 inductions. Otherwise we'll needlessly vectorize the IV increment
635 and cause hybrid SLP for SLP inductions. Unless the PHI is live
636 of course. */
643 {
648 }
653 }
656 /* Function vect_mark_stmts_to_be_vectorized.
658 Not all stmts in the loop need to be vectorized. For example:
660 for i...
661 for j...
662 1. T0 = i + j
663 2. T1 = a[T0]
665 3. j = j + 1
667 Stmt 1 and 3 do not need to be vectorized, because loop control and
668 addressing of vectorized data-refs are handled differently.
670 This pass detects such stmts. */
672 opt_result
674 {
678 gimple_stmt_iterator si;
680 basic_block bb;
688 /* 1. Init worklist. */
690 {
693 {
701 }
703 {
713 }
714 }
716 /* 2. Process_worklist */
718 {
719 use_operand_p use_p;
720 ssa_op_iter iter;
727 /* Examine the USEs of STMT. For each USE, mark the stmt that defines it
728 (DEF_STMT) as relevant/irrelevant according to the relevance property
729 of STMT. */
732 /* Generally, the relevance property of STMT (in STMT_VINFO_RELEVANT) is
733 propagated as is to the DEF_STMTs of its USEs.
735 One exception is when STMT has been identified as defining a reduction
736 variable; in this case we set the relevance to vect_used_by_reduction.
737 This is because we distinguish between two kinds of relevant stmts -
738 those that are used by a reduction computation, and those that are
739 (also) used by a regular computation. This allows us later on to
740 identify stmts that are used solely by a reduction, and therefore the
741 order of the results that they produce does not have to be kept. */
744 {
773 }
776 {
777 /* Pattern statements are not inserted into the code, so
778 FOR_EACH_PHI_OR_STMT_USE optimizes their operands out, and we
779 have to scan the RHS or function arguments instead. */
781 {
787 {
788 opt_result res
798 }
800 {
803 {
804 opt_result res
809 }
810 }
811 }
813 {
816 opt_result res
825 }
827 {
829 {
831 opt_result res
836 }
837 }
838 else
840 }
841 else
843 {
845 opt_result res
850 }
853 {
854 gather_scatter_info gs_info;
857 opt_result res
861 {
865 }
866 }
870 }
872 /* Function vect_model_simple_cost.
874 Models cost for simple operations, i.e. those that only emit ncopies of a
875 single op. Right now, this does not account for multiple insns that could
876 be generated for the single vector op. We will handle that shortly. */
878 static void
883 slp_tree node,
886 {
891 /* ??? Somehow we need to fix this at the callers. */
896 /* Cost the "broadcast" of a scalar operand in to a vector operand.
897 Use scalar_to_vec to cost the broadcast, as elsewhere in the vector
898 cost model. */
904 /* Pass the inside-of-loop statements to the target-specific cost model. */
910 "vect_model_simple_cost: inside_cost = %d, "
912 }
915 /* Model cost for type demotion and promotion operations. PWR is
916 normally zero for single-step promotions and demotions. It will be
917 one if two-step promotion/demotion is required, and so on. NCOPIES
918 is the number of vector results (and thus number of instructions)
919 for the narrowest end of the operation chain. Each additional
920 step doubles the number of instructions required. If WIDEN_ARITH
921 is true the stmt is doing widening arithmetic. */
923 static void
929 {
934 {
936 widen_arith
940 }
942 /* FORNOW: Assuming maximum 2 args per stmts. */
950 "vect_model_promotion_demotion_cost: inside_cost = %d, "
952 }
954 /* Returns true if the current function returns DECL. */
956 static bool
958 {
959 edge_iterator ei;
960 edge e;
962 {
968 /* We often end up with an aggregate copy to the result decl,
969 handle that case as well. First skip intermediate clobbers
970 though. */
972 do
973 {
975 }
981 }
983 }
985 /* Calculate cost of DR's memory access. */
986 void
988 dr_alignment_support alignment_support_scheme,
992 {
994 {
996 {
999 vect_body);
1005 }
1008 {
1009 /* Here, we assign an additional cost for the unaligned store. */
1015 "vect_model_store_cost: unaligned supported by "
1018 }
1021 {
1028 }
1032 }
1033 }
1035 /* Calculate cost of DR's memory access. */
1036 void
1038 dr_alignment_support alignment_support_scheme,
1045 {
1047 {
1049 {
1058 }
1060 {
1061 /* Here, we assign an additional cost for the unaligned load. */
1068 "vect_model_load_cost: unaligned supported by "
1072 }
1074 {
1080 /* FIXME: If the misalignment remains fixed across the iterations of
1081 the containing loop, the following cost should be added to the
1082 prologue costs. */
1092 }
1094 {
1097 "vect_model_load_cost: unaligned software "
1100 /* Unaligned software pipeline has a load of an address, an initial
1101 load, and possibly a mask operation to "prime" the loop. However,
1102 if this is an access in a group of loads, which provide grouped
1103 access, then the above cost should only be considered for one
1104 access in the group. Inside the loop, there is a load op
1105 and a realignment op. */
1108 {
1116 }
1125 "vect_model_load_cost: explicit realign optimized"
1129 }
1132 {
1139 }
1143 }
1144 }
1146 /* Insert the new stmt NEW_STMT at *GSI or at the appropriate place in
1147 the loop preheader for the vectorized stmt STMT_VINFO. */
1149 static void
1152 {
1155 else
1161 }
1163 /* Function vect_init_vector.
1165 Insert a new stmt (INIT_STMT) that initializes a new variable of type
1166 TYPE with the value VAL. If TYPE is a vector type and VAL does not have
1167 vector type a vector with all elements equal to VAL is created first.
1168 Place the initialization at GSI if it is not NULL. Otherwise, place the
1169 initialization at the loop preheader.
1170 Return the DEF of INIT_STMT.
1171 It will be used in the vectorization of STMT_INFO. */
1173 tree
1176 {
1178 tree new_temp;
1180 /* We abuse this function to push sth to a SSA name with initial 'val'. */
1182 {
1185 {
1186 /* Scalar boolean value should be transformed into
1187 all zeros or all ones value before building a vector. */
1189 {
1195 else
1196 {
1202 }
1203 }
1204 else
1205 {
1210 else
1211 /* ??? Condition vectorization expects us to do
1212 promotion of invariant/external defs. */
1216 {
1220 }
1221 }
1222 }
1224 }
1230 }
1233 /* Function vect_get_vec_defs_for_operand.
1235 OP is an operand in STMT_VINFO. This function returns a vector of
1236 NCOPIES defs that will be used in the vectorized stmts for STMT_VINFO.
1238 In the case that OP is an SSA_NAME which is defined in the loop, then
1239 STMT_VINFO_VEC_STMTS of the defining stmt holds the relevant defs.
1241 In case OP is an invariant or constant, a new stmt that creates a vector def
1242 needs to be introduced. VECTYPE may be used to specify a required type for
1243 vector invariant. */
1245 void
1249 {
1259 stmt_vec_info def_stmt_info;
1268 {
1270 tree vector_type;
1277 else
1284 }
1285 else
1286 {
1292 }
1293 }
1296 /* Get vectorized definitions for OP0 and OP1. */
1298 void
1305 {
1307 {
1316 }
1317 else
1318 {
1331 }
1332 }
1334 void
1341 {
1347 }
1349 /* Helper function called by vect_finish_replace_stmt and
1350 vect_finish_stmt_generation. Set the location of the new
1351 statement and create and return a stmt_vec_info for it. */
1353 static void
1356 {
1361 {
1364 /* While EH edges will generally prevent vectorization, stmt might
1365 e.g. be in a must-not-throw region. Ensure newly created stmts
1366 that could throw are part of the same region. */
1370 }
1371 else
1373 }
1375 /* Replace the scalar statement STMT_INFO with a new vector statement VEC_STMT,
1376 which sets the same scalar result as STMT_INFO did. Create and return a
1377 stmt_vec_info for VEC_STMT. */
1379 void
1382 {
1390 }
1392 /* Add VEC_STMT to the vectorized implementation of STMT_INFO and insert it
1393 before *GSI. Create and return a stmt_vec_info for VEC_STMT. */
1395 void
1399 {
1404 {
1408 {
1412 /* If we have an SSA vuse and insert a store, update virtual
1413 SSA form to avoid triggering the renamer. Do so only
1414 if we can easily see all uses - which is what almost always
1415 happens with the way vectorized stmts are inserted. */
1424 {
1428 }
1429 }
1430 }
1433 }
1435 /* We want to vectorize a call to combined function CFN with function
1436 decl FNDECL, using VECTYPE_OUT as the type of the output and VECTYPE_IN
1437 as the types of all inputs. Check whether this is possible using
1438 an internal function, returning its code if so or IFN_LAST if not. */
1440 static internal_fn
1443 {
1444 internal_fn ifn;
1447 else
1450 {
1453 {
1458 /* The type size of both the vectype_in and vectype_out should be
1459 exactly the same when vectype_out isn't participating the optab.
1460 While there is no restriction for type size when vectype_out
1461 is part of the optab query. */
1466 OPTIMIZE_FOR_SPEED))
1468 }
1469 }
1471 }
1475 gimple_stmt_iterator *);
1477 /* Check whether a load or store statement in the loop described by
1478 LOOP_VINFO is possible in a loop using partial vectors. This is
1479 testing whether the vectorizer pass has the appropriate support,
1480 as well as whether the target does.
1482 VLS_TYPE says whether the statement is a load or store and VECTYPE
1483 is the type of the vector being loaded or stored. SLP_NODE is the SLP
1484 node that contains the statement, or null if none. MEMORY_ACCESS_TYPE
1485 says how the load or store is going to be implemented and GROUP_SIZE
1486 is the number of load or store statements in the containing group.
1487 If the access is a gather load or scatter store, GS_INFO describes
1488 its arguments. If the load or store is conditional, SCALAR_MASK is the
1489 condition under which it occurs.
1491 Clear LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P if a loop using partial
1492 vectors is not supported, otherwise record the required rgroup control
1493 types. */
1495 static void
1497 slp_tree slp_node,
1498 vec_load_store_type vls_type,
1500 vect_memory_access_type
1501 memory_access_type,
1503 tree scalar_mask)
1504 {
1505 /* Invariant loads need no special support. */
1512 else
1520 {
1521 internal_fn ifn
1528 scalar_mask);
1529 else
1530 {
1533 "can't operate on partial vectors because"
1534 " the target doesn't have an appropriate"
1537 }
1539 }
1542 {
1543 internal_fn ifn = (is_load
1544 ? IFN_MASK_GATHER_LOAD
1546 internal_fn len_ifn = (is_load
1547 ? IFN_MASK_LEN_GATHER_LOAD
1559 scalar_mask);
1560 else
1561 {
1564 "can't operate on partial vectors because"
1565 " the target doesn't have an appropriate"
1568 }
1570 }
1574 {
1575 /* Element X of the data must come from iteration i * VF + X of the
1576 scalar loop. We need more work to support other mappings. */
1579 "can't operate on partial vectors because an"
1583 }
1586 {
1589 "can't operate on partial vectors when emulating"
1593 }
1595 /* We might load more scalars than we need for permuting SLP loads.
1596 We checked in get_group_load_store_type that the extra elements
1597 don't leak into a new vector. */
1599 {
1604 };
1608 machine_mode mask_mode;
1609 machine_mode vmode;
1612 {
1617 }
1620 {
1624 }
1627 {
1630 "can't operate on partial vectors because the"
1631 " target doesn't have the appropriate partial"
1634 }
1635 }
1637 /* Return the mask input to a masked load or store. VEC_MASK is the vectorized
1638 form of the scalar mask condition and LOOP_MASK, if nonnull, is the mask
1639 that needs to be applied to all loads and stores in a vectorized loop.
1640 Return VEC_MASK if LOOP_MASK is null or if VEC_MASK is already masked,
1641 otherwise return VEC_MASK & LOOP_MASK.
1643 MASK_TYPE is the type of both masks. If new statements are needed,
1644 insert them before GSI. */
1646 static tree
1649 {
1665 }
1667 /* Determine whether we can use a gather load or scatter store to vectorize
1668 strided load or store STMT_INFO by truncating the current offset to a
1669 smaller width. We need to be able to construct an offset vector:
1671 { 0, X, X*2, X*3, ... }
1673 without loss of precision, where X is STMT_INFO's DR_STEP.
1675 Return true if this is possible, describing the gather load or scatter
1676 store in GS_INFO. MASKED_P is true if the load or store is conditional. */
1678 static bool
1682 {
1687 {
1688 /* ??? Perhaps we could use range information here? */
1693 }
1695 /* Get the number of bits in an element. */
1700 /* Set COUNT to the upper limit on the number of elements - 1.
1701 Start with the maximum vectorization factor. */
1704 /* Try lowering COUNT to the number of scalar latch iterations. */
1706 widest_int max_iters;
1711 /* Try scales of 1 and the element size. */
1715 {
1717 widest_int factor;
1721 /* Determine the minimum precision of (COUNT - 1) * STEP / SCALE. */
1728 /* Find the narrowest viable offset type. */
1733 /* See whether the target supports the operation with an offset
1734 no narrower than OFFSET_TYPE. */
1743 /* Logically the sum of DR_BASE_ADDRESS, DR_INIT and DR_OFFSET,
1744 but we don't need to store that here. */
1752 }
1756 "truncating gather/scatter offset to %d bits"
1760 }
1762 /* Return true if we can use gather/scatter internal functions to
1763 vectorize STMT_INFO, which is a grouped or strided load or store.
1764 MASKED_P is true if load or store is conditional. When returning
1765 true, fill in GS_INFO with the information required to perform the
1766 operation. */
1768 static bool
1772 {
1787 "using gather/scatter for strided/grouped access,"
1791 }
1793 /* STMT_INFO is a non-strided load or store, meaning that it accesses
1794 elements with a known constant step. Return -1 if that step
1795 is negative, 0 if it is zero, and 1 if it is greater than zero. */
1797 static int
1799 {
1802 size_zero_node);
1803 }
1805 /* If the target supports a permute mask that reverses the elements in
1806 a vector of type VECTYPE, return that mask, otherwise return null. */
1808 tree
1810 {
1813 /* The encoding has a single stepped pattern. */
1820 indices))
1823 }
1825 /* A subroutine of get_load_store_type, with a subset of the same
1826 arguments. Handle the case where STMT_INFO is a load or store that
1827 accesses consecutive elements with a negative step. Sets *POFFSET
1828 to the offset to be applied to the DR for the first access. */
1830 static vect_memory_access_type
1833 vec_load_store_type vls_type,
1835 {
1837 dr_alignment_support alignment_support_scheme;
1840 {
1845 }
1847 /* For backward running DRs the first access in vectype actually is
1848 N-1 elements before the address of the DR. */
1853 alignment_support_scheme
1857 {
1863 }
1866 {
1869 "negative step with invariant source;"
1872 }
1875 {
1881 }
1884 }
1886 /* STMT_INFO is either a masked or unconditional store. Return the value
1887 being stored. */
1889 tree
1891 {
1893 {
1896 }
1898 {
1903 }
1905 }
1907 /* Function VECTOR_VECTOR_COMPOSITION_TYPE
1909 This function returns a vector type which can be composed with NETLS pieces,
1910 whose type is recorded in PTYPE. VTYPE should be a vector type, and has the
1911 same vector size as the return vector. It checks target whether supports
1912 pieces-size vector mode for construction firstly, if target fails to, check
1913 pieces-size scalar mode for construction further. It returns NULL_TREE if
1914 fails to find the available composition.
1916 For example, for (vtype=V16QI, nelts=4), we can probably get:
1917 - V16QI with PTYPE V4QI.
1918 - V4SI with PTYPE SI.
1919 - NULL_TREE. */
1921 static tree
1923 {
1931 /* When we are asked to compose the vector from its components let
1932 that happen directly. */
1934 {
1937 }
1942 {
1943 /* First check if vec_init optab supports construction from
1944 vector pieces directly. */
1947 machine_mode rmode;
1951 {
1954 }
1956 /* Otherwise check if exists an integer type of the same piece size and
1957 if vec_init optab supports construction from it directly. */
1962 {
1965 }
1966 }
1969 }
1971 /* A subroutine of get_load_store_type, with a subset of the same
1972 arguments. Handle the case where STMT_INFO is part of a grouped load
1973 or store.
1975 For stores, the statements in the group are all consecutive
1976 and there is no gap at the end. For loads, the statements in the
1977 group might not be consecutive; there can be gaps between statements
1978 as well as at the end. */
1980 static bool
1990 {
1993 stmt_vec_info first_stmt_info;
1997 {
2001 }
2002 else
2003 {
2007 }
2013 /* True if the vectorized statements would access beyond the last
2014 statement in the group. */
2017 /* True if we can cope with such overrun by peeling for gaps, so that
2018 there is at least one final scalar iteration after the vector loop. */
2021 && loop_vinfo
2024 /* There can only be a gap at the end of the group if the stride is
2025 known at compile time. */
2028 /* Stores can't yet have gaps. */
2032 {
2033 /* For SLP vectorization we directly vectorize a subchain
2034 without permutation. */
2036 first_dr_info
2039 {
2040 /* Try to use consecutive accesses of DR_GROUP_SIZE elements,
2041 separated by the stride, until we have a complete vector.
2042 Fall back to scalar accesses if that isn't possible. */
2045 else
2047 }
2048 else
2049 {
2052 {
2054 "Grouped store with gaps requires"
2057 }
2058 /* An overrun is fine if the trailing elements are smaller
2059 than the alignment boundary B. Every vector access will
2060 be a multiple of B and so we are guaranteed to access a
2061 non-gap element in the same B-sized block. */
2064 vectype)
2068 /* If the gap splits the vector in half and the target
2069 can do half-vector operations avoid the epilogue peeling
2070 by simply loading half of the vector only. Usually
2071 the construction with an upper zero half will be elided. */
2072 dr_alignment_support alss;
2074 tree half_vtype;
2076 && !masked_p
2079 == dr_aligned
2088 {
2093 }
2096 {
2098 /* ??? The VMAT_CONTIGUOUS_REVERSE code generation is
2099 only correct for single element "interleaving" SLP. */
2102 else
2103 {
2104 /* Try to use consecutive accesses of DR_GROUP_SIZE elements,
2105 separated by the stride, until we have a complete vector.
2106 Fall back to scalar accesses if that isn't possible. */
2109 else
2111 }
2112 }
2114 {
2117 /* Invariant accesses perform only component accesses, alignment
2118 is irrelevant for them. */
2120 }
2121 else
2124 /* When we have a contiguous access across loop iterations
2125 but the access in the loop doesn't cover the full vector
2126 we can end up with no gap recorded but still excess
2127 elements accessed, see PR103116. Make sure we peel for
2128 gaps if necessary and sufficient and give up if not.
2130 If there is a combination of the access not covering the full
2131 vector and a gap recorded then we may need to peel twice. */
2136 nunits))
2137 {
2142 /* Peeling for gaps assumes that a single scalar iteration
2143 is enough to make sure the last vector iteration doesn't
2144 access excess elements.
2145 ??? Enhancements include peeling multiple iterations
2146 or using masked loads with a static mask. */
2148 {
2151 "peeling for gaps insufficient for "
2154 }
2156 }
2157 }
2158 }
2159 else
2160 {
2161 /* We can always handle this case using elementwise accesses,
2162 but see if something more efficient is available. */
2165 /* If there is a gap at the end of the group then these optimizations
2166 would access excess elements in the last iteration. */
2168 /* An overrun is fine if the trailing elements are smaller than the
2169 alignment boundary B. Every vector access will be a multiple of B
2170 and so we are guaranteed to access a non-gap element in the
2171 same B-sized block. */
2173 && !masked_p
2181 {
2182 /* First cope with the degenerate case of a single-element
2183 vector. */
2185 ;
2187 else
2188 {
2189 /* Otherwise try using LOAD/STORE_LANES. */
2190 *lanes_ifn
2194 masked_p);
2196 {
2199 }
2201 /* If that fails, try using permuting loads. */
2204 single_element_p,
2205 group_size)
2207 {
2210 }
2211 }
2212 }
2214 /* As a last resort, trying using a gather load or scatter store.
2216 ??? Although the code can handle all group sizes correctly,
2217 it probably isn't a win to use separate strided accesses based
2218 on nearby locations. Or, even if it's a win over scalar code,
2219 it might not be a win over vectorizing at a lower VF, if that
2220 allows us to use contiguous accesses. */
2222 && single_element_p
2223 && loop_vinfo
2227 }
2231 {
2234 }
2235 else
2236 {
2238 *alignment_support_scheme
2241 }
2244 {
2245 /* STMT is the leader of the group. Check the operands of all the
2246 stmts of the group. */
2249 {
2253 {
2258 }
2260 }
2261 }
2264 {
2268 "Data access with gaps requires scalar "
2271 }
2274 }
2276 /* Analyze load or store statement STMT_INFO of type VLS_TYPE. Return true
2277 if there is a memory access type that the vectorized form can use,
2278 storing it in *MEMORY_ACCESS_TYPE if so. If we decide to use gathers
2279 or scatters, fill in GS_INFO accordingly. In addition
2280 *ALIGNMENT_SUPPORT_SCHEME is filled out and false is returned if
2281 the target does not support the alignment scheme. *MISALIGNMENT
2282 is set according to the alignment of the access (including
2283 DR_MISALIGNMENT_UNKNOWN when it is unknown).
2285 SLP says whether we're performing SLP rather than loop vectorization.
2286 MASKED_P is true if the statement is conditional on a vectorized mask.
2287 VECTYPE is the vector type that the vectorized statements will use.
2288 NCOPIES is the number of vector statements that will be needed. */
2290 static bool
2301 {
2307 {
2311 /* When using internal functions, we rely on pattern recognition
2312 to convert the type of the offset to the type that the target
2313 requires, with the result being a call to an internal function.
2314 If that failed for some reason (e.g. because another pattern
2315 took priority), just handle cases in which the offset already
2316 has the right type. */
2321 {
2327 }
2331 {
2337 }
2339 {
2345 {
2348 "unsupported vector types for emulated "
2351 }
2352 }
2353 /* Gather-scatter accesses perform only component accesses, alignment
2354 is irrelevant for them. */
2356 }
2358 {
2360 masked_p,
2362 alignment_support_scheme,
2365 }
2367 {
2373 else
2375 /* Alignment is irrelevant here. */
2377 }
2378 else
2379 {
2382 {
2385 /* Invariant accesses perform only component accesses, alignment
2386 is irrelevant for them. */
2388 }
2389 else
2390 {
2394 else
2398 *alignment_support_scheme
2402 }
2403 }
2408 {
2411 "Not using elementwise accesses due to variable "
2414 }
2417 {
2422 }
2424 /* FIXME: At the moment the cost model seems to underestimate the
2425 cost of using elementwise accesses. This check preserves the
2426 traditional behavior until that can be fixed. */
2435 {
2440 }
2442 }
2444 /* Return true if boolean argument at MASK_INDEX is suitable for vectorizing
2445 conditional operation STMT_INFO. When returning true, store the mask
2446 in *MASK, the type of its definition in *MASK_DT_OUT, the type of the
2447 vectorized mask in *MASK_VECTYPE_OUT and the SLP node corresponding
2448 to the mask in *MASK_NODE if MASK_NODE is not NULL. */
2450 static bool
2455 {
2457 tree mask_vectype;
2458 slp_tree mask_node_1;
2461 {
2466 }
2469 {
2474 }
2476 /* If the caller is not prepared for adjusting an external/constant
2477 SLP mask vector type fail. */
2479 && !mask_node
2481 {
2486 }
2491 mask_node_1);
2494 {
2499 }
2503 {
2506 "vector mask type %T"
2511 }
2518 }
2520 /* Return true if stored value is suitable for vectorizing store
2521 statement STMT_INFO. When returning true, store the scalar stored
2522 in *RHS and *RHS_NODE, the type of the definition in *RHS_DT_OUT,
2523 the type of the vectorized store value in
2524 *RHS_VECTYPE_OUT and the type of the store in *VLS_TYPE_OUT. */
2526 static bool
2531 {
2534 {
2538 }
2540 op_no = vect_slp_child_index_for_operand
2544 tree rhs_vectype;
2547 {
2552 }
2554 /* In the case this is a store from a constant make sure
2555 native_encode_expr can handle it. */
2557 {
2562 }
2566 {
2571 }
2577 else
2580 }
2582 /* Build an all-ones vector mask of type MASKTYPE while vectorizing STMT_INFO.
2583 Note that we support masks with floating-point type, in which case the
2584 floats are interpreted as a bitmask. */
2586 static tree
2589 {
2594 {
2598 }
2600 {
2601 REAL_VALUE_TYPE r;
2609 }
2611 }
2613 /* Build an all-zero merge value of type VECTYPE while vectorizing
2614 STMT_INFO as a gather load. */
2616 static tree
2619 {
2620 tree merge;
2624 {
2625 REAL_VALUE_TYPE r;
2631 }
2632 else
2636 }
2638 /* Build a gather load call while vectorizing STMT_INFO. Insert new
2639 instructions before GSI and add them to VEC_STMT. GS_INFO describes
2640 the gather load operation. If the load is conditional, MASK is the
2641 vectorized condition, otherwise MASK is null. PTR is the base
2642 pointer and OFFSET is the vectorized offset. */
2649 {
2658 tree var;
2660 && (!mask
2666 {
2674 }
2679 {
2681 {
2686 else
2690 gassign *new_stmt
2695 {
2702 }
2705 }
2706 else
2707 {
2710 }
2711 }
2712 else
2713 {
2716 }
2723 {
2731 }
2734 }
2736 /* Build a scatter store call while vectorizing STMT_INFO. Insert new
2737 instructions before GSI. GS_INFO describes the scatter store operation.
2738 PTR is the base pointer, OFFSET the vectorized offsets and OPRND the
2739 vectorized data to store.
2740 If the store is conditional, MASK is the vectorized condition, otherwise
2741 MASK is null. */
2748 {
2761 {
2764 tree utype;
2767 else
2771 gassign *new_stmt
2776 {
2782 }
2783 }
2784 else
2785 {
2788 }
2792 {
2800 }
2804 {
2812 }
2815 gcall *new_stmt
2818 }
2820 /* Prepare the base and offset in GS_INFO for vectorization.
2821 Set *DATAREF_PTR to the loop-invariant base address and *VEC_OFFSET
2822 to the vectorized offset argument for the first copy of STMT_INFO.
2823 STMT_INFO is the statement described by GS_INFO and LOOP is the
2824 containing loop. */
2826 static void
2831 {
2835 {
2836 basic_block new_bb;
2840 }
2843 else
2844 {
2845 unsigned ncopies
2850 }
2851 }
2853 /* Prepare to implement a grouped or strided load or store using
2854 the gather load or scatter store operation described by GS_INFO.
2855 STMT_INFO is the load or store statement.
2857 Set *DATAREF_BUMP to the amount that should be added to the base
2858 address after each copy of the vectorized statement. Set *VEC_OFFSET
2859 to an invariant offset vector in which element I has the value
2860 I * DR_STEP / SCALE. */
2862 static void
2864 loop_vec_info loop_vinfo,
2869 {
2874 {
2875 /* _31 = .SELECT_VL (ivtmp_29, POLY_INT_CST [4, 4]);
2876 ivtmp_8 = _31 * 16 (step in bytes);
2877 .MASK_LEN_SCATTER_STORE (vectp_a.9_7, ... );
2878 vectp_a.9_26 = vectp_a.9_7 + ivtmp_8; */
2879 tree loop_len
2881 tree tmp
2884 loop_len);
2886 GSI_SAME_STMT);
2887 }
2888 else
2889 {
2890 tree bump
2895 }
2897 /* The offset given in GS_INFO can have pointer type, so use the element
2898 type of the vector instead. */
2901 /* Calculate X = DR_STEP / SCALE and convert it to the appropriate type. */
2906 /* Create {0, X, X*2, X*3, ...}. */
2910 }
2912 /* Prepare the pointer IVs which needs to be updated by a variable amount.
2913 Such variable amount is the outcome of .SELECT_VL. In this case, we can
2914 allow each iteration process the flexible number of elements as long as
2915 the number <= vf elments.
2917 Return data reference according to SELECT_VL.
2918 If new statements are needed, insert them before GSI. */
2920 static tree
2924 vect_memory_access_type memory_access_type)
2925 {
2929 /* gather/scatter never reach here. */
2932 /* When we support SELECT_VL pattern, we dynamic adjust
2933 the memory address by .SELECT_VL result.
2935 The result of .SELECT_VL is the number of elements to
2936 be processed of each iteration. So the memory address
2937 adjustment operation should be:
2939 addr = addr + .SELECT_VL (ARG..) * step;
2940 */
2941 tree loop_len
2944 /* Since the outcome of .SELECT_VL is element size, we should adjust
2945 it into bytesize so that it can be used in address pointer variable
2946 amount IVs adjustment. */
2953 }
2955 /* Return the amount that should be added to a vector pointer to move
2956 to the next or previous copy of AGGR_TYPE. DR_INFO is the data reference
2957 being vectorized and MEMORY_ACCESS_TYPE describes the type of
2958 vectorization. */
2960 static tree
2963 vect_memory_access_type memory_access_type,
2965 {
2973 memory_access_type);
2980 }
2982 /* Check and perform vectorization of BUILT_IN_BSWAP{16,32,64,128}. */
2984 static bool
2990 {
3000 /* Multiple types in SLP are handled by creating the appropriate number of
3001 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
3002 case of SLP. */
3005 else
3011 {
3017 }
3028 /* The encoding uses one stepped pattern for each byte in the word. */
3040 {
3043 {
3048 }
3055 slp_node
3059 }
3063 /* Transform. */
3067 /* Arguments are ready. create the new vector stmt. */
3069 tree vop;
3071 {
3087 else
3089 }
3096 }
3098 /* Return true if vector types VECTYPE_IN and VECTYPE_OUT have
3099 integer elements and if we can narrow VECTYPE_IN to VECTYPE_OUT
3100 in a single step. On success, store the binary pack code in
3101 *CONVERT_CODE. */
3103 static bool
3106 {
3111 code_helper code;
3121 }
3123 /* Function vectorizable_call.
3125 Check if STMT_INFO performs a function call that can be vectorized.
3126 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
3127 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
3128 Return true if STMT_INFO is vectorizable in this way. */
3130 static bool
3135 {
3137 tree vec_dest;
3138 tree scalar_dest;
3139 tree op;
3142 poly_uint64 nunits_in;
3143 poly_uint64 nunits_out;
3149 vect_unknown_def_type };
3157 tree lhs;
3167 /* Is STMT_INFO a vectorizable call? */
3175 /* Handled by vectorizable_load and vectorizable_store. */
3186 /* Process function arguments. */
3191 /* Bail out if the function has more than four arguments, we do not have
3192 interesting builtin functions to vectorize with more than two arguments
3193 except for fma. No arguments is also not good. */
3197 /* Ignore the arguments of IFN_GOMP_SIMD_LANE, they are magic. */
3200 {
3203 }
3204 /* Similarly pretend IFN_CLZ and IFN_CTZ only has one argument, the second
3205 argument just says whether it is well-defined at zero or not and what
3206 value should be returned for it. */
3208 {
3211 }
3218 {
3220 {
3225 }
3229 {
3234 }
3236 /* We can only handle calls with arguments of the same type. */
3239 {
3244 }
3252 {
3257 }
3258 }
3259 /* If all arguments are external or constant defs, infer the vector type
3260 from the scalar type. */
3266 {
3272 }
3276 {
3281 }
3284 {
3289 }
3291 /* FORNOW */
3300 else
3303 /* We only handle functions that do not read or clobber memory. */
3305 {
3310 }
3312 /* For now, we only vectorize functions if a target specific builtin
3313 is available. TODO -- in some cases, it might be profitable to
3314 insert the calls for pieces of the vector, in order to be able
3315 to vectorize other operations in the loop. */
3320 /* First try using an internal function. */
3328 vectype_in);
3330 /* If that fails, try asking for a target-specific built-in function. */
3332 {
3339 }
3342 {
3344 && !slp_node
3345 && loop_vinfo
3350 {
3351 /* We can handle IFN_GOMP_SIMD_LANE by returning a
3352 { 0, 1, 2, ... vf - 1 } vector. */
3354 }
3362 else
3363 {
3368 }
3369 }
3375 else
3378 /* Sanity check: make sure that at least one copy of the vectorized stmt
3379 needs to be generated. */
3389 {
3395 {
3400 }
3412 {
3416 OPTIMIZE_FOR_SPEED))
3419 OPTIMIZE_FOR_SPEED)))
3420 {
3423 "can't use a fully-masked loop because no"
3426 }
3427 else
3428 {
3429 unsigned int nvectors
3430 = (slp_node
3438 OPTIMIZE_FOR_SPEED))
3441 else
3443 scalar_mask);
3444 }
3445 }
3447 }
3449 /* Transform. */
3454 /* Handle def. */
3462 {
3464 {
3466 /* COND_* -> COND_LEN_* takes 2 extra arguments:LEN,BIAS. */
3468 }
3471 }
3473 {
3476 }
3481 {
3486 {
3487 /* Build argument list for the vectorized call. */
3489 {
3495 /* Arguments are ready. Create the new vector stmt. */
3497 {
3500 {
3502 /* Always true for SLP. */
3507 }
3510 {
3513 }
3521 {
3522 /* We don't define any narrowing conditional functions
3523 at present. */
3526 gcall *call
3532 {
3535 }
3541 }
3542 else
3543 {
3545 {
3547 /* Always true for SLP. */
3549 tree len
3552 signed char biasval
3557 }
3559 {
3561 /* Always true for SLP. */
3569 }
3574 else
3581 }
3583 }
3585 }
3592 {
3595 {
3600 }
3602 }
3609 {
3612 signed char biasval
3617 }
3619 {
3625 }
3629 {
3631 tree new_var
3638 }
3640 {
3641 /* We don't define any narrowing conditional functions at
3642 present. */
3650 {
3653 }
3656 half_res);
3658 }
3659 else
3660 {
3664 else
3671 }
3676 }
3678 {
3681 }
3682 }
3684 {
3686 /* We don't define any narrowing conditional functions at present. */
3689 {
3690 /* Build argument list for the vectorized call. */
3693 else
3697 {
3703 /* Arguments are ready. Create the new vector stmt. */
3705 {
3709 {
3713 }
3717 else
3724 }
3726 }
3729 {
3732 {
3736 }
3742 }
3750 }
3756 {
3759 }
3760 }
3761 else
3762 /* No current target implements this case. */
3767 /* The call in STMT might prevent it from being removed in dce.
3768 We however cannot remove it here, due to the way the ssa name
3769 it defines is mapped to the new definition. So just replace
3770 rhs of the statement with something harmless. */
3778 gassign *new_stmt
3783 }
3786 struct simd_call_arg_info
3787 {
3788 tree vectype;
3789 tree op;
3790 HOST_WIDE_INT linear_step;
3794 };
3796 /* Helper function of vectorizable_simd_clone_call. If OP, an SSA_NAME,
3797 is linear within simd lane (but not within whole loop), note it in
3798 *ARGINFO. */
3800 static void
3803 {
3815 {
3816 tree t;
3820 {
3835 CASE_CONVERT:
3847 }
3853 {
3860 }
3861 }
3862 }
3864 /* Function vectorizable_simd_clone_call.
3866 Check if STMT_INFO performs a function call that can be vectorized
3867 by calling a simd clone of the function.
3868 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
3869 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
3870 Return true if STMT_INFO is vectorizable in this way. */
3872 static bool
3876 stmt_vector_for_cost *)
3877 {
3878 tree vec_dest;
3879 tree scalar_dest;
3882 tree vectype;
3883 poly_uint64 nunits;
3896 /* Is STMT a vectorizable call? */
3904 {
3910 }
3936 /* Process function arguments. */
3939 /* Bail out if the function has zero arguments. */
3950 {
3951 simd_call_arg_info thisarginfo;
3952 affine_iv iv;
3966 {
3971 }
3975 {
3976 /* With SLP we determine the vector type of constants/externals
3977 at analysis time, handling conflicts via
3978 vect_maybe_update_slp_op_vectype. At transform time
3979 we have a vector type recorded for SLP. */
3981 || !slp_node
3986 slp_node);
3987 }
3988 else
3991 /* For linear arguments, the analyze phase should have saved
3992 the base and step in {STMT_VINFO,SLP_TREE}_SIMD_CLONE_INFO. */
3995 {
3999 thisarginfo.simd_lane_linear
4001 /* If loop has been peeled for alignment, we need to adjust it. */
4005 {
4011 thisarginfo.op
4015 }
4016 }
4020 && loop_vinfo
4025 {
4028 }
4033 /* Addresses of array elements indexed by GOMP_SIMD_LANE are
4034 linear too. */
4037 && !vec_stmt
4040 && loop_vinfo
4045 }
4053 else
4056 {
4059 /* The number of arguments in the call and the number of parameters in
4060 the simdclone should match. However, when the simdclone is
4061 'inbranch', it could have one more paramater than nargs when using
4062 an inbranch simdclone to call a non-inbranch call, either in a
4063 non-masked loop using a all true constant mask, or inside a masked
4064 loop using it's mask. */
4067 simd_nargs--;
4082 {
4084 {
4115 /* FORNOW */
4119 /* While we can create a traditional data vector from
4120 an incoming integer mode mask we have no good way to
4121 force generate an integer mode mask from a traditional
4122 boolean vector input. */
4130 }
4134 {
4137 }
4141 }
4147 {
4149 SIMD_CLONE_ARG_TYPE_MASK);
4150 /* Penalize using a masked SIMD clone in a non-masked loop, that is
4151 not in a branch, as we'd have to construct an all-true mask. */
4154 }
4156 {
4159 }
4160 }
4169 num_mask_args++;
4172 {
4176 {
4180 slp_node);
4185 }
4189 {
4194 }
4197 {
4200 {
4203 {
4204 /* FORNOW we only have partial support for vector-type masks
4205 that can't hold all of simdlen. */
4208 vect_location,
4209 "in-branch vector clones are not yet"
4212 }
4215 {
4218 vect_location,
4219 "cannot compute mask argument for"
4222 }
4223 }
4225 {
4228 num_mask_args),
4230 {
4231 /* FORNOW we only have partial support for integer-type masks
4232 that represent the same number of lanes as the
4233 vectorized mask inputs. */
4236 vect_location,
4237 "in-branch vector clones are not yet "
4240 }
4241 }
4242 else
4243 {
4246 vect_location,
4247 "in-branch vector clones not supported"
4250 }
4251 }
4252 }
4258 else
4261 /* If the function isn't const, only allow it in simd loops where user
4262 has asserted that at least nunits consecutive iterations can be
4263 performed using SIMD instructions. */
4268 /* Sanity check: make sure that at least one copy of the vectorized stmt
4269 needs to be generated. */
4273 {
4277 {
4282 }
4283 /* When the original call is pure or const but the SIMD ABI dictates
4284 an aggregate return we will have to use a virtual definition and
4285 in a loop eventually even need to add a virtual PHI. That's
4286 not straight-forward so allow to fix this up via renaming. */
4291 /* ??? For SLP code-gen we end up inserting after the last
4292 vector argument def rather than at the original call position
4293 so automagic virtual operand updating doesn't work. */
4298 {
4300 {
4305 {
4315 }
4325 }
4326 }
4329 {
4333 "can't use a fully-masked loop because a"
4336 }
4340 /* vect_model_simple_cost (vinfo, stmt_info, ncopies,
4341 dt, slp_node, cost_vec); */
4343 }
4345 /* Transform. */
4350 /* Handle def. */
4356 {
4360 {
4363 }
4364 }
4370 {
4373 }
4374 else
4377 {
4378 poly_uint64 callee_nelements;
4379 poly_uint64 caller_nelements;
4380 /* Build argument list for the vectorized call. */
4383 else
4387 {
4389 tree atype;
4392 {
4399 {
4401 {
4409 {
4416 }
4417 else
4418 {
4422 }
4424 vec_oprnd0
4428 gassign *new_stmt
4430 vec_oprnd0);
4434 }
4435 else
4436 {
4444 else
4447 {
4449 {
4453 op,
4457 }
4458 else
4464 vec_oprnd0);
4465 }
4468 atype))
4469 {
4471 vec_oprnd0);
4472 gassign *new_stmt
4474 vec_oprnd0);
4478 }
4479 else
4481 else
4482 {
4484 gassign *new_stmt
4486 vec_oprnd0);
4490 }
4491 }
4492 }
4496 {
4505 {
4507 {
4508 /* The mask type has fewer elements than simdlen. */
4510 /* FORNOW */
4512 }
4514 {
4515 /* The SIMD clone function has the same number of
4516 elements as the current function. */
4518 {
4522 op,
4525 }
4529 {
4530 vec_loop_masks *loop_masks
4532 tree loop_mask
4536 vec_oprnd0
4540 gsi);
4542 loop_mask });
4544 }
4545 vec_oprnd0
4549 gassign *new_stmt
4551 vec_oprnd0);
4555 }
4556 else
4557 {
4558 /* The mask type has more elements than simdlen. */
4560 /* FORNOW */
4562 }
4563 }
4564 }
4566 {
4568 /* Guess the number of lanes represented by atype. */
4569 poly_uint64 atype_subparts
4571 num_mask_args);
4574 {
4576 {
4580 op,
4583 }
4586 {
4587 /* The mask argument has fewer elements than the
4588 input vector. */
4589 /* FORNOW */
4591 }
4594 {
4595 /* The vector mask argument matches the input
4596 in the number of lanes, but not necessarily
4597 in the mode. */
4602 vec_oprnd0);
4603 gassign *new_stmt
4605 vec_oprnd0);
4609 {
4610 new_stmt
4612 NOP_EXPR,
4613 gimple_assign_lhs
4617 }
4619 }
4620 else
4621 {
4622 /* The mask argument has more elements than the
4623 input vector. */
4624 /* FORNOW */
4626 }
4627 }
4628 }
4629 else
4638 {
4639 gimple_seq stmts;
4644 {
4645 basic_block new_bb;
4649 }
4651 {
4654 }
4659 enum tree_code code
4664 poly_widest_int cst
4669 gassign *new_stmt
4674 UNKNOWN_LOCATION);
4677 }
4678 else
4679 {
4680 enum tree_code code
4685 poly_widest_int cst
4690 gassign *new_stmt
4695 }
4705 }
4706 }
4711 {
4714 tree mask;
4716 SIMD_CLONE_ARG_TYPE_MASK);
4722 {
4724 {
4728 }
4729 else
4734 {
4735 /* This means we are dealing with integer mask modes.
4736 First convert to an integer type with the same size as
4737 the current vector type. */
4738 unsigned HOST_WIDE_INT intermediate_size
4740 tree mid_int_type =
4743 new_stmt
4745 mask);
4747 /* Then zero-extend to the mask mode. */
4750 }
4752 {
4754 integer_one_node);
4756 integer_zero_node);
4760 }
4761 else
4769 }
4770 }
4774 {
4781 else
4784 }
4789 {
4791 {
4799 {
4800 tree t;
4802 {
4806 }
4807 else
4818 else
4820 }
4825 }
4827 {
4836 {
4841 {
4845 tem);
4850 }
4852 }
4853 else
4858 new_stmt
4867 else
4870 }
4872 {
4879 }
4881 {
4883 new_stmt
4886 }
4887 }
4893 else
4895 }
4898 {
4901 }
4904 /* Mark the clone as no longer being a candidate for GC. */
4907 /* The call in STMT might prevent it from being removed in dce.
4908 We however cannot remove it here, due to the way the ssa name
4909 it defines is mapped to the new definition. So just replace
4910 rhs of the statement with something harmless. */
4917 {
4921 }
4922 else
4928 }
4931 /* Function vect_gen_widened_results_half
4933 Create a vector stmt whose code, type, number of arguments, and result
4934 variable are CODE, OP_TYPE, and VEC_DEST, and its arguments are
4935 VEC_OPRND0 and VEC_OPRND1. The new vector stmt is to be inserted at GSI.
4936 In the case that CODE is a CALL_EXPR, this means that a call to DECL
4937 needs to be created (DECL is a function-decl of a target-builtin).
4938 STMT_INFO is the original scalar stmt that we are vectorizing. */
4944 stmt_vec_info stmt_info)
4945 {
4947 tree new_temp;
4949 /* Generate half of the widened result: */
4958 }
4961 /* Create vectorized demotion statements for vector operands from VEC_OPRNDS.
4962 For multi-step conversions store the resulting vectors and call the function
4963 recursively. When NARROW_SRC_P is true, there's still a conversion after
4964 narrowing, don't store the vectors in the SLP_NODE or in vector info of
4965 the scalar statement(or in STMT_VINFO_RELATED_STMT chain). */
4967 static void
4970 stmt_vec_info stmt_info,
4975 {
4982 {
4983 /* Create demotion operation. */
4991 /* Store the resulting vector for next recursive call,
4992 or return the resulting vector_tmp for NARROW FLOAT_EXPR. */
4994 else
4995 {
4996 /* This is the last step of the conversion sequence. Store the
4997 vectors in SLP_NODE or in vector info of the scalar statement
4998 (or in STMT_VINFO_RELATED_STMT chain). */
5001 else
5003 }
5004 }
5006 /* For multi-step demotion operations we first generate demotion operations
5007 from the source type to the intermediate types, and then combine the
5008 results (stored in VEC_OPRNDS) in demotion operation to the destination
5009 type. */
5011 {
5012 /* At each level of recursion we have half of the operands we had at the
5013 previous level. */
5019 narrow_src_p);
5020 }
5023 }
5026 /* Create vectorized promotion statements for vector operands from VEC_OPRNDS0
5027 and VEC_OPRNDS1, for a binary operation associated with scalar statement
5028 STMT_INFO. For multi-step conversions store the resulting vectors and
5029 call the function recursively. */
5031 static void
5037 code_helper ch1,
5039 {
5047 {
5050 else
5053 /* Generate the two halves of promotion operation. */
5056 stmt_info);
5059 stmt_info);
5061 {
5064 }
5065 else
5066 {
5069 }
5071 /* Store the results for the next step. */
5074 }
5078 }
5080 /* Create vectorized promotion stmts for widening stmts using only half the
5081 potential vector size for input. */
5082 static void
5088 code_helper code1,
5090 {
5100 {
5106 /* Widen the first vector input. */
5112 {
5113 /* Widen the second vector input. */
5117 /* Perform the operation. With both vector inputs widened. */
5119 }
5120 else
5121 {
5122 /* Perform the operation. With the single vector input widened. */
5124 }
5130 /* Store the results for the next step. */
5132 }
5136 }
5139 /* Check if STMT_INFO performs a conversion operation that can be vectorized.
5140 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
5141 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
5142 Return true if STMT_INFO is vectorizable in this way. */
5144 static bool
5149 {
5151 tree scalar_dest;
5157 tree new_temp;
5160 poly_uint64 nunits_in;
5161 poly_uint64 nunits_out;
5165 /* For conversions between floating point and integer, there're 2 NARROW
5166 cases. NARROW_SRC is for FLOAT_EXPR, means
5167 integer --DEMOTION--> integer --FLOAT_EXPR--> floating point.
5168 This is safe when the range of the source integer can fit into the lower
5169 precision. NARROW_DST is for FIX_TRUNC_EXPR, means
5170 floating point --FIX_TRUNC_EXPR--> integer --DEMOTION--> INTEGER.
5171 For other conversions, when there's narrowing, NARROW_DST is used as
5172 default. */
5176 tree vop0;
5184 /* Is STMT a vectorizable conversion? */
5205 {
5208 }
5210 {
5213 }
5214 else
5227 /* Check types of lhs and rhs. */
5232 /* Check the operands of the operation. */
5236 {
5241 }
5256 {
5259 "type conversion to/from bit-precision unsupported."
5262 }
5265 {
5272 tree vectype1_in;
5275 {
5280 }
5281 /* For WIDEN_MULT_EXPR, if OP0 is a constant, use the type of
5282 OP1. */
5285 }
5287 /* If op0 is an external or constant def, infer the vector type
5288 from the scalar type. */
5294 {
5300 }
5304 {
5307 "can't convert between boolean and non "
5311 }
5318 else
5322 else
5323 {
5326 }
5328 /* Multiple types in SLP are handled by creating the appropriate number of
5329 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
5330 case of SLP. */
5335 else
5338 /* Sanity check: make sure that at least one copy of the vectorized stmt
5339 needs to be generated. */
5345 opt_scalar_mode rhs_mode_iter;
5347 /* Supportable by target? */
5349 {
5358 {
5361 }
5363 /* For conversions between float and integer types try whether
5364 we can use intermediate signed integer types to support the
5365 conversion. */
5369 {
5373 scalar_mode intermediate_mode;
5375 {
5378 }
5379 else
5380 {
5385 }
5388 opt_scalar_mode mode_iter;
5390 {
5396 scalar_mode cvt_mode;
5401 cvt_type = build_nonstandard_integer_type
5404 /* Check if the intermediate type can hold OP0's range.
5405 When converting from float to integer this is not necessary
5406 because values that do not fit the (smaller) target type are
5407 unspecified anyway. */
5409 {
5420 }
5423 /* This should only happened for SLP as long as loop vectorizer
5424 only supports same-sized vector. */
5428 vectype_out,
5431 cvt_type,
5437 }
5440 {
5441 multi_step_cvt++;
5447 }
5448 }
5449 /* FALLTHRU */
5450 unsupported:
5458 {
5467 }
5472 {
5473 /* Binary widening operation can only be supported directly by the
5474 architecture. */
5477 }
5485 {
5490 cvt_type
5497 {
5504 }
5511 else
5515 cvt_type,
5519 {
5522 }
5523 }
5530 else
5531 {
5532 multi_step_cvt++;
5535 }
5549 {
5550 cvt_type
5558 else
5564 }
5565 /* If op0 can be represented with low precision integer,
5566 truncate it to cvt_type and the do FLOAT_EXPR. */
5568 {
5573 cvt_type
5591 {
5595 }
5596 }
5602 }
5605 {
5609 {
5614 }
5617 {
5622 }
5624 {
5626 /* The final packing step produces one vector result per copy. */
5627 unsigned int nvectors
5631 widen_arith);
5632 }
5633 else
5634 {
5636 /* The initial unpacking step produces two vector results
5637 per copy. MULTI_STEP_CVT is 0 for a single conversion,
5638 so >> MULTI_STEP_CVT divides by 2^(number of steps - 1). */
5639 unsigned int nvectors
5640 = (slp_node
5645 widen_arith);
5646 }
5649 }
5651 /* Transform. */
5657 {
5662 }
5664 /* In case of multi-step conversion, we first generate conversion operations
5665 to the intermediate types, and then from that types to the final one.
5666 We create vector destinations for the intermediate type (TYPES) received
5667 from supportable_*_operation, and store them in the correct order
5668 for future use in vect_create_vectorized_*_stmts (). */
5670 bool widen_or_narrow_float_p
5673 widen_or_narrow_float_p
5678 {
5681 {
5683 intermediate_type);
5685 }
5686 }
5690 widen_or_narrow_float_p
5695 {
5697 ;
5699 {
5703 }
5704 }
5707 {
5711 /* vec_dest is intermediate type operand when multi_step_cvt. */
5713 {
5716 }
5719 {
5720 /* Arguments are ready, create the new vector stmt. */
5723 {
5730 }
5738 else
5740 }
5744 /* In case the vectorization factor (VF) is bigger than the number
5745 of elements that we can fit in a vectype (nunits), we have to
5746 generate more than one vector stmt - i.e - we need to "unroll"
5747 the vector stmt by a factor VF/nunits. */
5753 {
5758 }
5759 /* Arguments are ready. Create the new vector stmts. */
5761 {
5765 {
5768 }
5772 op_type);
5773 else
5778 }
5781 {
5784 {
5788 }
5789 else
5794 else
5796 }
5801 /* In case the vectorization factor (VF) is bigger than the number
5802 of elements that we can fit in a vectype (nunits), we have to
5803 generate more than one vector stmt - i.e - we need to "unroll"
5804 the vector stmt by a factor VF/nunits. */
5807 /* Arguments are ready. Create the new vector stmts. */
5810 {
5815 }
5818 multi_step_cvt,
5822 /* After demoting op0 to cvt_type, convert it to dest. */
5824 {
5826 {
5827 /* Arguments are ready, create the new vector stmt. */
5829 gimple *new_stmt
5835 /* This is the last step of the conversion sequence. Store the
5836 vectors in SLP_NODE or in vector info of the scalar statement
5837 (or in STMT_VINFO_RELATED_STMT chain). */
5840 else
5842 }
5843 }
5845 }
5854 }
5856 /* Return true if we can assume from the scalar form of STMT_INFO that
5857 neither the scalar nor the vector forms will generate code. STMT_INFO
5858 is known not to involve a data reference. */
5860 bool
5862 {
5878 }
5880 /* Function vectorizable_assignment.
5882 Check if STMT_INFO performs an assignment (copy) that can be vectorized.
5883 If VEC_STMT is also passed, vectorize the STMT_INFO: create a vectorized
5884 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
5885 Return true if STMT_INFO is vectorizable in this way. */
5887 static bool
5892 {
5893 tree vec_dest;
5894 tree scalar_dest;
5895 tree op;
5897 tree new_temp;
5903 tree vop;
5906 tree vectype_in;
5915 /* Is vectorizable assignment? */
5936 /* Multiple types in SLP are handled by creating the appropriate number of
5937 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
5938 case of SLP. */
5941 else
5946 slp_tree slp_op;
5949 {
5954 }
5958 /* We can handle NOP_EXPR conversions that do not change the number
5959 of elements or the vector size. */
5962 && (!vectype_in
5969 {
5972 "can't convert between boolean and non "
5976 }
5978 /* We do not handle bit-precision changes. */
5985 /* But a conversion that does not change the bit-pattern is ok. */
5993 {
5996 "type conversion to/from bit-precision "
5999 }
6002 {
6005 {
6010 }
6015 cost_vec);
6017 }
6019 /* Transform. */
6023 /* Handle def. */
6026 /* Handle use. */
6029 /* Arguments are ready. create the new vector stmt. */
6031 {
6041 else
6043 }
6049 }
6052 /* Return TRUE if CODE (a shift operation) is supported for SCALAR_TYPE
6053 either as shift by a scalar or by a vector. */
6055 bool
6057 {
6059 machine_mode vec_mode;
6060 optab optab;
6062 tree vectype;
6071 {
6077 }
6085 }
6088 /* Function vectorizable_shift.
6090 Check if STMT_INFO performs a shift operation that can be vectorized.
6091 If VEC_STMT is also passed, vectorize the STMT_INFO: create a vectorized
6092 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
6093 Return true if STMT_INFO is vectorizable in this way. */
6095 static bool
6100 {
6101 tree vec_dest;
6102 tree scalar_dest;
6105 tree vectype;
6108 machine_mode vec_mode;
6109 tree new_temp;
6110 optab optab;
6112 machine_mode optab_op2_mode;
6115 poly_uint64 nunits_in;
6116 poly_uint64 nunits_out;
6117 tree vectype_out;
6118 tree op1_vectype;
6137 /* Is STMT a vectorizable binary/unary operation? */
6154 {
6159 }
6161 slp_tree slp_op0;
6164 {
6169 }
6170 /* If op0 is an external or constant def, infer the vector type
6171 from the scalar type. */
6177 {
6182 }
6189 stmt_vec_info op1_def_stmt_info;
6190 slp_tree slp_op1;
6193 {
6198 }
6200 /* Multiple types in SLP are handled by creating the appropriate number of
6201 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
6202 case of SLP. */
6205 else
6210 /* Determine whether the shift amount is a vector, or scalar. If the
6211 shift/rotate amount is a vector, use the vector/vector shift optabs. */
6221 {
6222 /* In SLP, need to check whether the shift count is the same,
6223 in loops if it is a constant or invariant, it is always
6224 a scalar shift. */
6226 {
6228 stmt_vec_info slpstmt_info;
6231 {
6235 }
6237 /* For internal SLP defs we have to make sure we see scalar stmts
6238 for all vector elements.
6239 ??? For different vectors we could resort to a different
6240 scalar shift operand but code-generation below simply always
6241 takes the first. */
6246 }
6248 /* If the shift amount is computed by a pattern stmt we cannot
6249 use the scalar amount directly thus give up and use a vector
6250 shift. */
6253 }
6254 else
6255 {
6260 }
6262 /* Vector shifted by vector. */
6265 {
6273 slp_op1);
6274 incompatible_op1_vectype_p
6280 && (!slp_node
6283 {
6286 "unusable type for last operand in"
6289 }
6290 }
6291 /* See if the machine has a vector shifted by scalar insn and if not
6292 then see if it has a vector shifted by vector insn. */
6293 else
6294 {
6298 {
6302 }
6303 else
6304 {
6309 {
6319 slp_op1);
6321 /* Unlike the other binary operators, shifts/rotates have
6322 the rhs being int, instead of the same type as the lhs,
6323 so make sure the scalar is the right type if we are
6324 dealing with vectors of long long/long/short/char. */
6325 incompatible_op1_vectype_p
6326 = (!op1_vectype
6331 {
6334 "unusable type for last operand in"
6337 }
6338 }
6339 }
6340 }
6342 /* Supportable by target? */
6344 {
6349 }
6353 {
6358 }
6359 /* vector lowering cannot optimize vector shifts using word arithmetic. */
6364 {
6368 && (!incompatible_op1_vectype_p
6370 && !vect_maybe_update_slp_op_vectype
6373 {
6378 }
6379 /* Now adjust the constant shift amount in place. */
6381 && incompatible_op1_vectype_p
6383 {
6386 {
6392 }
6393 }
6399 }
6401 /* Transform. */
6408 {
6414 }
6416 /* Handle def. */
6420 {
6421 /* Vector shl and shr insn patterns can be defined with scalar
6422 operand 2 (shift operand). In this case, use constant or loop
6423 invariant op1 directly, without extending it to vector mode
6424 first. */
6427 {
6434 /* Store vec_oprnd1 for every vector stmt to be created.
6435 We check during the analysis that all the shift arguments
6436 are the same.
6437 TODO: Allow different constants for different vector
6438 stmts generated for an SLP instance. */
6442 }
6443 }
6445 {
6447 {
6448 /* If the argument was the same in all lanes create
6449 the correctly typed vector shift amount directly. */
6458 }
6460 /* The constant shift amount has been adjusted in place. */
6461 ;
6462 else
6464 }
6466 /* vec_oprnd1 is available if operand 1 should be of a scalar-type
6467 (a special case for certain kind of vector shifts); otherwise,
6468 operand 1 should be of a vector type (the usual case). */
6473 /* Arguments are ready. Create the new vector stmt. */
6475 {
6476 /* For internal defs where we need to use a scalar shift arg
6477 extract the first lane. */
6479 {
6482 gassign *new_stmt
6485 vop1,
6487 bitsize_zero_node));
6490 }
6491 else
6499 else
6501 }
6510 }
6512 /* Function vectorizable_operation.
6514 Check if STMT_INFO performs a binary, unary or ternary operation that can
6515 be vectorized.
6516 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
6517 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
6518 Return true if STMT_INFO is vectorizable in this way. */
6520 static bool
6525 {
6526 tree vec_dest;
6527 tree scalar_dest;
6529 tree vectype;
6532 machine_mode vec_mode;
6533 tree new_temp;
6535 optab optab;
6540 poly_uint64 nunits_in;
6541 poly_uint64 nunits_out;
6542 tree vectype_out;
6558 /* Is STMT a vectorizable binary/unary operation? */
6563 /* Loads and stores are handled in vectorizable_{load,store}. */
6569 /* Shifts are handled in vectorizable_shift. */
6576 /* Comparisons are handled in vectorizable_comparison. */
6580 /* Conditions are handled in vectorizable_condition. */
6584 /* For pointer addition and subtraction, we should use the normal
6585 plus and minus for the vector operation. */
6591 /* Support only unary or binary operations. */
6594 {
6598 op_type);
6600 }
6605 /* Most operations cannot handle bit-precision types without extra
6606 truncations. */
6610 /* Exception are bitwise binary operations. */
6614 {
6619 }
6621 slp_tree slp_op0;
6624 {
6629 }
6632 /* If op0 is an external or constant def, infer the vector type
6633 from the scalar type. */
6635 {
6636 /* For boolean type we cannot determine vectype by
6637 invariant value (don't know whether it is a vector
6638 of booleans or vector of integers). We use output
6639 vectype because operations on boolean don't change
6640 type. */
6642 {
6644 {
6649 }
6651 }
6652 else
6654 slp_node);
6655 }
6659 {
6666 }
6676 {
6679 {
6684 }
6690 }
6692 {
6695 {
6700 }
6706 }
6708 /* Multiple types in SLP are handled by creating the appropriate number of
6709 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
6710 case of SLP. */
6712 {
6715 }
6716 else
6717 {
6720 }
6724 /* Reject attempts to combine mask types with nonmask types, e.g. if
6725 we have an AND between a (nonmask) boolean loaded from memory and
6726 a (mask) boolean result of a comparison.
6728 TODO: We could easily fix these cases up using pattern statements. */
6732 {
6737 }
6739 /* Supportable by target? */
6744 else
6745 {
6748 {
6753 }
6756 }
6760 {
6764 /* When vec_mode is not a vector mode and we verified ops we
6765 do not have to lower like AND are natively supported let
6766 those through even when the mode isn't word_mode. For
6767 ops we have to lower the lowering code assumes we are
6768 dealing with word_mode. */
6773 /* Check only during analysis. */
6775 {
6779 }
6784 }
6792 /* If operating on inactive elements could generate spurious traps,
6793 we need to restrict the operation to active lanes. Note that this
6794 specifically doesn't apply to unhoisted invariants, since they
6795 operate on the same value for every lane.
6797 Similarly, if this operation is part of a reduction, a fully-masked
6798 loop should only change the active lanes of the reduction chain,
6799 keeping the inactive lanes as-is. */
6804 {
6808 {
6811 OPTIMIZE_FOR_SPEED))
6816 OPTIMIZE_FOR_SPEED))
6819 else
6820 {
6823 "can't use a fully-masked loop because no"
6826 }
6827 }
6829 /* Put types on constant and invariant SLP children. */
6834 {
6839 }
6846 {
6847 /* The above vect_model_simple_cost call handles constants
6848 in the prologue and (mis-)costs one of the stmts as
6849 vector stmt. See below for the actual lowering that will
6850 be applied. */
6851 unsigned n
6854 {
6865 /* Bit operations do not have extra cost and are accounted
6866 as vector stmt by vect_model_simple_cost. */
6869 }
6871 {
6872 /* We also need to materialize two large constants. */
6877 }
6878 }
6880 }
6882 /* Transform. */
6891 /* POINTER_DIFF_EXPR has pointer arguments which are vectorized as
6892 vectors with unsigned elements, but the result is signed. So, we
6893 need to compute the MINUS_EXPR into vectype temporary and
6894 VIEW_CONVERT_EXPR it into the final vectype_out result. */
6897 {
6900 }
6901 /* Handle def. */
6902 else
6905 /* In case the vectorization factor (VF) is bigger than the number
6906 of elements that we can fit in a vectype (nunits), we have to generate
6907 more than one vector stmt - i.e - we need to "unroll" the
6908 vector stmt by a factor VF/nunits. In doing so, we record a pointer
6909 from one copy of the vector stmt to the next, in the field
6910 STMT_VINFO_RELATED_STMT. This is necessary in order to allow following
6911 stages to find the correct vector defs to be used when vectorizing
6912 stmts that use the defs of the current stmt. The example below
6913 illustrates the vectorization process when VF=16 and nunits=4 (i.e.,
6914 we need to create 4 vectorized stmts):
6916 before vectorization:
6917 RELATED_STMT VEC_STMT
6918 S1: x = memref - -
6919 S2: z = x + 1 - -
6921 step 1: vectorize stmt S1 (done in vectorizable_load. See more details
6922 there):
6923 RELATED_STMT VEC_STMT
6924 VS1_0: vx0 = memref0 VS1_1 -
6925 VS1_1: vx1 = memref1 VS1_2 -
6926 VS1_2: vx2 = memref2 VS1_3 -
6927 VS1_3: vx3 = memref3 - -
6928 S1: x = load - VS1_0
6929 S2: z = x + 1 - -
6931 step2: vectorize stmt S2 (done here):
6932 To vectorize stmt S2 we first need to find the relevant vector
6933 def for the first operand 'x'. This is, as usual, obtained from
6934 the vector stmt recorded in the STMT_VINFO_VEC_STMT of the stmt
6935 that defines 'x' (S1). This way we find the stmt VS1_0, and the
6936 relevant vector def 'vx0'. Having found 'vx0' we can generate
6937 the vector stmt VS2_0, and as usual, record it in the
6938 STMT_VINFO_VEC_STMT of stmt S2.
6939 When creating the second copy (VS2_1), we obtain the relevant vector
6940 def from the vector stmt recorded in the STMT_VINFO_RELATED_STMT of
6941 stmt VS1_0. This way we find the stmt VS1_1 and the relevant
6942 vector def 'vx1'. Using 'vx1' we create stmt VS2_1 and record a
6943 pointer to it in the STMT_VINFO_RELATED_STMT of the vector stmt VS2_0.
6944 Similarly when creating stmts VS2_2 and VS2_3. This is the resulting
6945 chain of stmts and pointers:
6946 RELATED_STMT VEC_STMT
6947 VS1_0: vx0 = memref0 VS1_1 -
6948 VS1_1: vx1 = memref1 VS1_2 -
6949 VS1_2: vx2 = memref2 VS1_3 -
6950 VS1_3: vx3 = memref3 - -
6951 S1: x = load - VS1_0
6952 VS2_0: vz0 = vx0 + v1 VS2_1 -
6953 VS2_1: vz1 = vx1 + v1 VS2_2 -
6954 VS2_2: vz2 = vx2 + v1 VS2_3 -
6955 VS2_3: vz3 = vx3 + v1 - -
6956 S2: z = x + 1 - VS2_0 */
6960 /* Arguments are ready. Create the new vector stmt. */
6962 {
6969 {
6970 /* Lower the operation. This follows vector lowering. */
6973 tree word_type
6977 tree high_bits
6986 {
7004 else
7009 {
7015 }
7024 }
7025 else
7026 {
7043 }
7045 signs);
7055 }
7057 {
7058 tree mask;
7062 else
7063 /* Dummy mask. */
7073 {
7074 /* Perform the operation on active elements only and take
7075 inactive elements from the reduction chain input. */
7078 }
7079 else
7080 {
7084 }
7086 {
7089 signed char biasval
7094 }
7095 gcall *call
7098 vops);
7104 }
7105 else
7106 {
7108 /* When combining two masks check if either of them is elsewhere
7109 combined with a loop mask, if that's the case we can mark that the
7110 new combined mask doesn't need to be combined with a loop mask. */
7114 {
7116 ncopies}))
7117 {
7123 }
7126 ncopies }))
7127 {
7133 }
7134 }
7143 /* Enter the combined value into the vector cond hash so we don't
7144 AND it with a loop mask again. */
7147 }
7150 {
7153 new_temp);
7158 }
7162 else
7164 }
7174 }
7176 /* A helper function to ensure data reference DR_INFO's base alignment. */
7178 static void
7180 {
7181 /* Alignment is only analyzed for the first element of a DR group,
7182 use that to look at base alignment we need to enforce. */
7189 {
7192 // We should only be able to increase the alignment of a base object if
7193 // we know what its new alignment should be at compile time.
7200 {
7203 }
7205 }
7206 }
7209 /* Function get_group_alias_ptr_type.
7211 Return the alias type for the group starting at FIRST_STMT_INFO. */
7213 static tree
7215 {
7221 {
7225 {
7230 }
7232 }
7234 }
7237 /* Function scan_operand_equal_p.
7239 Helper function for check_scan_store. Compare two references
7240 with .GOMP_SIMD_LANE bases. */
7242 static bool
7244 {
7249 {
7250 machine_mode mode;
7260 {
7266 {
7271 }
7272 }
7273 }
7280 {
7284 {
7287 {
7290 {
7296 {
7299 }
7300 }
7302 {
7305 }
7308 {
7312 }
7321 }
7325 }
7326 }
7328 }
7332 /* Normal permutation. */
7333 scan_store_kind_perm,
7335 /* Whole vector left shift permutation with zero init. */
7336 scan_store_kind_lshift_zero,
7338 /* Whole vector left shift permutation and VEC_COND_EXPR. */
7339 scan_store_kind_lshift_cond
7340 };
7342 /* Function check_scan_store.
7344 Verify if we can perform the needed permutations or whole vector shifts.
7345 Return -1 on failure, otherwise exact log2 of vectype's nunits.
7346 USE_WHOLE_VECTOR is a vector of enum scan_store_kind which operation
7347 to do at each step. */
7349 static int
7352 {
7364 {
7370 {
7373 }
7374 else
7375 {
7380 }
7383 {
7388 {
7392 /* Whole vector shifts shift in zeros, so if init is all zero
7393 constant, there is no need to do anything further. */
7397 {
7402 }
7403 }
7405 }
7407 {
7412 }
7413 }
7416 }
7419 /* Function check_scan_store.
7421 Check magic stores for #pragma omp scan {in,ex}clusive reductions. */
7423 static bool
7426 vect_memory_access_type memory_access_type)
7427 {
7430 tree ref_type;
7434 || mask
7446 {
7451 }
7453 /* We need to pattern match code built by OpenMP lowering and simplified
7454 by following optimizations into something we can handle.
7455 #pragma omp simd reduction(inscan,+:r)
7456 for (...)
7457 {
7458 r += something ();
7459 #pragma omp scan inclusive (r)
7460 use (r);
7461 }
7462 shall have body with:
7463 // Initialization for input phase, store the reduction initializer:
7464 _20 = .GOMP_SIMD_LANE (simduid.3_14(D), 0);
7465 _21 = .GOMP_SIMD_LANE (simduid.3_14(D), 1);
7466 D.2042[_21] = 0;
7467 // Actual input phase:
7468 ...
7469 r.0_5 = D.2042[_20];
7470 _6 = _4 + r.0_5;
7471 D.2042[_20] = _6;
7472 // Initialization for scan phase:
7473 _25 = .GOMP_SIMD_LANE (simduid.3_14(D), 2);
7474 _26 = D.2043[_25];
7475 _27 = D.2042[_25];
7476 _28 = _26 + _27;
7477 D.2043[_25] = _28;
7478 D.2042[_25] = _28;
7479 // Actual scan phase:
7480 ...
7481 r.1_8 = D.2042[_20];
7482 ...
7483 The "omp simd array" variable D.2042 holds the privatized copy used
7484 inside of the loop and D.2043 is another one that holds copies of
7485 the current original list item. The separate GOMP_SIMD_LANE ifn
7486 kinds are there in order to allow optimizing the initializer store
7487 and combiner sequence, e.g. if it is originally some C++ish user
7488 defined reduction, but allow the vectorizer to pattern recognize it
7489 and turn into the appropriate vectorized scan.
7491 For exclusive scan, this is slightly different:
7492 #pragma omp simd reduction(inscan,+:r)
7493 for (...)
7494 {
7495 use (r);
7496 #pragma omp scan exclusive (r)
7497 r += something ();
7498 }
7499 shall have body with:
7500 // Initialization for input phase, store the reduction initializer:
7501 _20 = .GOMP_SIMD_LANE (simduid.3_14(D), 0);
7502 _21 = .GOMP_SIMD_LANE (simduid.3_14(D), 1);
7503 D.2042[_21] = 0;
7504 // Actual input phase:
7505 ...
7506 r.0_5 = D.2042[_20];
7507 _6 = _4 + r.0_5;
7508 D.2042[_20] = _6;
7509 // Initialization for scan phase:
7510 _25 = .GOMP_SIMD_LANE (simduid.3_14(D), 3);
7511 _26 = D.2043[_25];
7512 D.2044[_25] = _26;
7513 _27 = D.2042[_25];
7514 _28 = _26 + _27;
7515 D.2043[_25] = _28;
7516 // Actual scan phase:
7517 ...
7518 r.1_8 = D.2044[_20];
7519 ... */
7522 {
7523 /* Match the D.2042[_21] = 0; store above. Just require that
7524 it is a constant or external definition store. */
7526 {
7527 fail_init:
7532 }
7542 /* These stores can be vectorized normally. */
7544 }
7547 {
7548 fail:
7553 }
7562 bool inscan_var_store
7566 {
7568 {
7569 use_operand_p use_p;
7570 imm_use_iterator iter;
7572 {
7579 || other_store_stmt
7583 }
7589 }
7590 }
7592 {
7593 use_operand_p use_p;
7594 imm_use_iterator iter;
7596 {
7603 }
7604 }
7605 else
7615 /* For pointer addition, we should use the normal plus for the vector
7616 operation. */
7618 {
7626 }
7654 {
7660 tree lrhs;
7663 else
7665 use_operand_p use_p;
7666 imm_use_iterator iter;
7668 {
7675 }
7676 }
7684 stmt_vec_info other_store_stmt_info
7697 {
7701 }
7712 {
7723 }
7742 {
7747 }
7755 /* The IL is as expected, now check if we can actually vectorize it.
7756 Inclusive scan:
7757 _26 = D.2043[_25];
7758 _27 = D.2042[_25];
7759 _28 = _26 + _27;
7760 D.2043[_25] = _28;
7761 D.2042[_25] = _28;
7762 should be vectorized as (where _40 is the vectorized rhs
7763 from the D.2042[_21] = 0; store):
7764 _30 = MEM <vector(8) int> [(int *)&D.2043];
7765 _31 = MEM <vector(8) int> [(int *)&D.2042];
7766 _32 = VEC_PERM_EXPR <_40, _31, { 0, 8, 9, 10, 11, 12, 13, 14 }>;
7767 _33 = _31 + _32;
7768 // _33 = { _31[0], _31[0]+_31[1], _31[1]+_31[2], ..., _31[6]+_31[7] };
7769 _34 = VEC_PERM_EXPR <_40, _33, { 0, 1, 8, 9, 10, 11, 12, 13 }>;
7770 _35 = _33 + _34;
7771 // _35 = { _31[0], _31[0]+_31[1], _31[0]+.._31[2], _31[0]+.._31[3],
7772 // _31[1]+.._31[4], ... _31[4]+.._31[7] };
7773 _36 = VEC_PERM_EXPR <_40, _35, { 0, 1, 2, 3, 8, 9, 10, 11 }>;
7774 _37 = _35 + _36;
7775 // _37 = { _31[0], _31[0]+_31[1], _31[0]+.._31[2], _31[0]+.._31[3],
7776 // _31[0]+.._31[4], ... _31[0]+.._31[7] };
7777 _38 = _30 + _37;
7778 _39 = VEC_PERM_EXPR <_38, _38, { 7, 7, 7, 7, 7, 7, 7, 7 }>;
7779 MEM <vector(8) int> [(int *)&D.2043] = _39;
7780 MEM <vector(8) int> [(int *)&D.2042] = _38;
7781 Exclusive scan:
7782 _26 = D.2043[_25];
7783 D.2044[_25] = _26;
7784 _27 = D.2042[_25];
7785 _28 = _26 + _27;
7786 D.2043[_25] = _28;
7787 should be vectorized as (where _40 is the vectorized rhs
7788 from the D.2042[_21] = 0; store):
7789 _30 = MEM <vector(8) int> [(int *)&D.2043];
7790 _31 = MEM <vector(8) int> [(int *)&D.2042];
7791 _32 = VEC_PERM_EXPR <_40, _31, { 0, 8, 9, 10, 11, 12, 13, 14 }>;
7792 _33 = VEC_PERM_EXPR <_40, _32, { 0, 8, 9, 10, 11, 12, 13, 14 }>;
7793 _34 = _32 + _33;
7794 // _34 = { 0, _31[0], _31[0]+_31[1], _31[1]+_31[2], _31[2]+_31[3],
7795 // _31[3]+_31[4], ... _31[5]+.._31[6] };
7796 _35 = VEC_PERM_EXPR <_40, _34, { 0, 1, 8, 9, 10, 11, 12, 13 }>;
7797 _36 = _34 + _35;
7798 // _36 = { 0, _31[0], _31[0]+_31[1], _31[0]+.._31[2], _31[0]+.._31[3],
7799 // _31[1]+.._31[4], ... _31[3]+.._31[6] };
7800 _37 = VEC_PERM_EXPR <_40, _36, { 0, 1, 2, 3, 8, 9, 10, 11 }>;
7801 _38 = _36 + _37;
7802 // _38 = { 0, _31[0], _31[0]+_31[1], _31[0]+.._31[2], _31[0]+.._31[3],
7803 // _31[0]+.._31[4], ... _31[0]+.._31[6] };
7804 _39 = _30 + _38;
7805 _50 = _31 + _39;
7806 _51 = VEC_PERM_EXPR <_50, _50, { 7, 7, 7, 7, 7, 7, 7, 7 }>;
7807 MEM <vector(8) int> [(int *)&D.2044] = _39;
7808 MEM <vector(8) int> [(int *)&D.2042] = _51; */
7819 }
7822 /* Function vectorizable_scan_store.
7824 Helper of vectorizable_score, arguments like on vectorizable_store.
7825 Handle only the transformation, checking is done in check_scan_store. */
7827 static bool
7831 {
7846 bool inscan_var_store
7850 {
7851 use_operand_p use_p;
7852 imm_use_iterator iter;
7854 {
7860 }
7861 }
7882 {
7886 }
7901 {
7908 else
7909 {
7914 }
7918 {
7925 }
7926 else
7928 }
7949 {
7960 {
7964 dataref_offset);
7970 }
7974 {
7977 (zero_vec
7987 {
7988 /* Whole vector shift shifted in zero bits, but if *init
7989 is not initializer_zerop, we need to replace those elements
7990 with elements from vec_oprnd1. */
8003 }
8005 /* For exclusive scan, perform the perms[i] permutation once
8006 more. */
8010 {
8014 }
8022 }
8030 /* For exclusive scan, new_temp computed above is the exclusive scan
8031 prefix sum. Turn it into inclusive prefix sum for the broadcast
8032 of the last element into orig. */
8034 {
8039 }
8048 {
8051 dataref_offset);
8056 }
8057 }
8061 {
8067 dataref_offset);
8072 }
8074 }
8077 /* Function vectorizable_store.
8079 Check if STMT_INFO defines a non scalar data-ref (array/pointer/structure)
8080 that can be vectorized.
8081 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
8082 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
8083 Return true if STMT_INFO is vectorizable in this way. */
8085 static bool
8090 {
8091 tree data_ref;
8093 tree elem_type;
8096 machine_mode vec_mode;
8097 tree dummy;
8105 stmt_vec_info first_stmt_info;
8111 tree aggr_type;
8112 gather_scatter_info gs_info;
8113 poly_uint64 vf;
8114 vec_load_store_type vls_type;
8115 tree ref_type;
8124 /* Is vectorizable store? */
8129 {
8142 }
8143 else
8144 {
8155 mask_index = vect_slp_child_index_for_operand
8162 }
8164 /* Cannot have hybrid store SLP -- that would mean storing to the
8165 same location twice. */
8172 {
8175 }
8176 else
8179 /* Multiple types in SLP are handled by creating the appropriate number of
8180 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
8181 case of SLP. */
8184 else
8189 /* FORNOW. This restriction should be relaxed. */
8191 {
8196 }
8198 tree op;
8199 slp_tree op_node;
8210 vect_memory_access_type memory_access_type;
8213 poly_int64 poffset;
8214 internal_fn lanes_ifn;
8222 {
8224 {
8229 }
8233 {
8238 }
8242 {
8247 }
8248 }
8249 else
8250 {
8251 /* FORNOW. In some cases can vectorize even if data-type not supported
8252 (e.g. - array initialization with 0). */
8255 }
8262 {
8266 }
8267 else
8268 {
8272 }
8275 {
8277 memory_access_type))
8279 }
8283 {
8291 mask);
8295 || (mask
8297 mask_vectype))))
8298 {
8303 }
8314 /* As function vect_transform_stmt shows, for interleaving stores
8315 the whole chain is vectorized when the last store in the chain
8316 is reached, the other stores in the group are skipped. So we
8317 want to only cost the last one here, but it's not trivial to
8318 get the last, as it's equivalent to use the first one for
8319 costing, use the first one instead. */
8321 && !slp
8324 }
8327 /* Transform. */
8332 {
8336 {
8347 "vect_model_store_cost: inside_cost = %d, "
8352 }
8354 }
8357 {
8358 /* FORNOW */
8362 {
8364 /* VEC_NUM is the number of vect stmts to be created for this
8365 group. */
8372 }
8373 else
8374 /* VEC_NUM is the number of vect stmts to be created for this
8375 group. */
8379 }
8380 else
8385 ncopies);
8387 /* Check if we need to update prologue cost for invariant,
8388 and update it accordingly if so. If it's not for
8389 interleaving store, we can just check vls_type; but if
8390 it's for interleaving store, need to check the def_type
8391 of the stored value since the current vls_type is just
8392 for first_stmt_info. */
8394 {
8399 {
8405 }
8410 };
8414 {
8416 gimple_stmt_iterator incr_gsi;
8419 tree offvar;
8420 tree ivstep;
8421 tree running_off;
8424 tree dr_offset;
8426 /* Checked by get_load_store_type. */
8433 stride_base
8434 = fold_build_pointer_plus
8441 /* For a store with loop-invariant (but other than power-of-2)
8442 stride (i.e. not a grouped access) like so:
8444 for (i = 0; i < n; i += stride)
8445 array[i] = ...;
8447 we generate a new induction variable and new stores from
8448 the components of the (vectorized) rhs:
8450 for (j = 0; ; j += VF*stride)
8451 vectemp = ...;
8452 tmp1 = vectemp[0];
8453 array[j] = tmp1;
8454 tmp2 = vectemp[1];
8455 array[j + stride] = tmp2;
8456 ...
8457 */
8464 {
8467 {
8473 /* First check if vec_extract optab doesn't support extraction
8474 of vector elts directly. */
8476 machine_mode vmode;
8483 {
8484 /* Try to avoid emitting an extract of vector elements
8485 by performing the extracts using an integer type of the
8486 same size, extracting from a vector of those and then
8487 re-interpreting it as the original vector type if
8488 supported. */
8489 unsigned lsize
8492 /* If we can't construct such a vector fall back to
8493 element extracts from the original vector type and
8494 element size stores. */
8502 {
8507 }
8508 /* Else fall back to vector extraction anyway.
8509 Fewer stores are more important than avoiding spilling
8510 of the vector we extract from. Compared to the
8511 construction case in vectorizable_load no store-forwarding
8512 issue exists here for reasonable archs. */
8513 }
8514 }
8517 {
8519 dr_alignment_support dr_align
8521 mis_align);
8524 {
8531 }
8532 }
8535 }
8538 {
8552 }
8557 /* For costing some adjacent vector stores, we'd like to cost with
8558 the total number of them once instead of cost each one by one. */
8561 {
8564 {
8566 {
8568 tree pos
8575 }
8576 }
8582 else
8585 unsigned HOST_WIDE_INT
8588 {
8590 {
8592 /* Pun the vector to extract from if necessary. */
8594 {
8596 tree cvt
8601 }
8602 }
8604 {
8606 {
8607 /* Only need vector extracting when there are more
8608 than one stores. */
8610 inside_cost
8613 /* Take a single lane vector type store as scalar
8614 store to avoid ICE like 110776. */
8617 n_adjacent_stores++;
8618 else
8619 inside_cost
8623 }
8627 /* Extract the i'th component. */
8635 GSI_SAME_STMT);
8643 /* And store it to *running_off. */
8650 {
8658 }
8661 {
8665 }
8666 }
8667 }
8672 }
8675 {
8682 "vect_model_store_cost: inside_cost = %d, "
8685 }
8688 }
8691 vec_loop_masks *loop_masks
8695 vec_loop_lens *loop_lens
8700 /* The vect_transform_stmt and vect_analyze_stmt will go here but there
8701 are some difference here. We cannot enable both the lens and masks
8702 during transform but it is allowed during analysis.
8703 Shouldn't go with length-based approach if fully masked. */
8705 /* The cost_vec is NULL during transfrom. */
8708 /* Targets with store-lane instructions must not require explicit
8709 realignment. vect_supportable_dr_alignment always returns either
8710 dr_aligned or dr_unaligned_supported for masked operations. */
8712 && !mask
8721 tree bump;
8724 {
8727 }
8729 {
8734 }
8735 else
8736 {
8739 else
8743 }
8748 /* In case the vectorization factor (VF) is bigger than the number
8749 of elements that we can fit in a vectype (nunits), we have to generate
8750 more than one vector stmt - i.e - we need to "unroll" the
8751 vector stmt by a factor VF/nunits. */
8753 /* In case of interleaving (non-unit grouped access):
8755 S1: &base + 2 = x2
8756 S2: &base = x0
8757 S3: &base + 1 = x1
8758 S4: &base + 3 = x3
8760 We create vectorized stores starting from base address (the access of the
8761 first stmt in the chain (S2 in the above example), when the last store stmt
8762 of the chain (S4) is reached:
8764 VS1: &base = vx2
8765 VS2: &base + vec_size*1 = vx0
8766 VS3: &base + vec_size*2 = vx1
8767 VS4: &base + vec_size*3 = vx3
8769 Then permutation statements are generated:
8771 VS5: vx5 = VEC_PERM_EXPR < vx0, vx3, {0, 8, 1, 9, 2, 10, 3, 11} >
8772 VS6: vx6 = VEC_PERM_EXPR < vx0, vx3, {4, 12, 5, 13, 6, 14, 7, 15} >
8773 ...
8775 And they are put in STMT_VINFO_VEC_STMT of the corresponding scalar stmts
8776 (the order of the data-refs in the output of vect_permute_store_chain
8777 corresponds to the order of scalar stmts in the interleaving chain - see
8778 the documentation of vect_permute_store_chain()).
8780 In case of both multiple types and interleaving, above vector stores and
8781 permutation stmts are created for every copy. The result vector stmts are
8782 put in STMT_VINFO_VEC_STMT for the first copy and in the corresponding
8783 STMT_VINFO_RELATED_STMT for the next copies.
8784 */
8794 {
8797 /* For costing some adjacent vector stores, we'd like to cost with
8798 the total number of them once instead of cost each one by one. */
8801 {
8804 {
8805 /* For interleaved stores we collect vectorized defs for all
8806 the stores in the group in DR_CHAIN. DR_CHAIN is then used
8807 as an input to vect_permute_store_chain(). */
8810 {
8811 /* Since gaps are not supported for interleaved stores,
8812 DR_GROUP_SIZE is the exact number of stmts in the
8813 chain. Therefore, NEXT_STMT_INFO can't be NULL_TREE. */
8817 else
8818 {
8824 }
8826 }
8829 {
8831 {
8834 mask_vectype);
8836 }
8838 /* We should have catched mismatched types earlier. */
8841 dataref_ptr
8845 }
8846 }
8848 {
8850 /* DR_CHAIN is then used as an input to
8851 vect_permute_store_chain(). */
8853 {
8856 }
8861 }
8864 {
8867 }
8869 /* Get an array into which we can store the individual vectors. */
8872 /* Invalidate the current contents of VEC_ARRAY. This should
8873 become an RTL clobber too, which prevents the vector registers
8874 from being upward-exposed. */
8877 /* Store the individual vectors into the array. */
8879 {
8882 i);
8883 }
8896 {
8900 else
8902 signed char biasval
8906 {
8909 }
8910 }
8914 {
8915 /* Emit:
8916 MASK_LEN_STORE_LANES (DATAREF_PTR, ALIAS_PTR, VEC_MASK,
8917 LEN, BIAS, VEC_ARRAY). */
8923 vec_array);
8924 }
8926 {
8927 /* Emit:
8928 MASK_STORE_LANES (DATAREF_PTR, ALIAS_PTR, VEC_MASK,
8929 VEC_ARRAY). */
8935 }
8936 else
8937 {
8938 /* Emit:
8939 MEM_REF[...all elements...] = STORE_LANES (VEC_ARRAY). */
8943 }
8948 /* Record that VEC_ARRAY is now dead. */
8953 }
8956 {
8963 "vect_model_store_cost: inside_cost = %d, "
8966 }
8969 }
8972 {
8977 {
8980 {
8985 {
8986 /* Since the store is not grouped, DR_GROUP_SIZE is 1, and
8987 DR_CHAIN is of size 1. */
8991 else
8995 {
8998 else
9000 ncopies,
9002 mask_vectype);
9003 }
9009 else
9010 dataref_ptr
9014 bump);
9015 }
9016 }
9018 {
9023 }
9027 {
9029 {
9033 /* We should have catched mismatched types earlier. */
9036 }
9042 {
9050 }
9053 {
9055 {
9057 inside_cost
9061 }
9068 {
9073 else
9075 signed char biasval
9079 {
9082 }
9083 }
9087 call = gimple_build_call_internal
9092 call = gimple_build_call_internal
9095 else
9102 }
9104 {
9105 /* The builtin decls path for scatter is legacy, x86 only. */
9107 && (!final_mask
9108 || SCALAR_INT_MODE_P
9111 {
9113 inside_cost
9117 }
9118 poly_uint64 offset_nunits
9121 {
9122 new_stmt = vect_build_one_scatter_store_call
9128 }
9130 {
9131 /* We have a offset vector with half the number of
9132 lanes but the builtins will store full vectype
9133 data from the lower lanes. */
9134 new_stmt = vect_build_one_scatter_store_call
9136 dataref_ptr,
9147 tree perm_mask
9151 perm_mask);
9157 {
9159 VEC_UNPACK_HI_EXPR,
9160 final_mask);
9161 final_mask = make_ssa_name
9166 }
9167 new_stmt = vect_build_one_scatter_store_call
9169 dataref_ptr,
9174 }
9176 {
9177 /* We have a offset vector with double the number of
9178 lanes. Select the low/high part accordingly. */
9181 {
9188 tree perm_mask = vect_gen_perm_mask_checked
9191 VEC_PERM_EXPR,
9192 vec_offset,
9193 vec_offset,
9194 perm_mask);
9199 }
9200 new_stmt = vect_build_one_scatter_store_call
9206 }
9207 else
9209 }
9210 else
9211 {
9212 /* Emulated scatter. */
9215 {
9217 /* For emulated scatter N offset vector element extracts
9218 (we assume the scalar scaling and ptr + offset add is
9219 consumed by the load). */
9220 inside_cost
9223 /* N scalar stores plus extracting the elements. */
9224 inside_cost
9227 inside_cost
9231 }
9234 unsigned HOST_WIDE_INT const_offset_nunits
9240 unsigned HOST_WIDE_INT elt_size
9242 /* We support offset vectors with more elements
9243 than the data vector for now. */
9244 unsigned HOST_WIDE_INT factor
9247 unsigned elt_offset
9254 {
9255 /* Compute the offsetted pointer. */
9258 tree idx
9264 tree ptr
9269 /* Extract the element to be stored. */
9270 tree elt
9277 tree ref
9283 }
9286 }
9287 }
9290 }
9297 "vect_model_store_cost: inside_cost = %d, "
9302 }
9310 /* For costing some adjacent vector stores, we'd like to cost with
9311 the total number of them once instead of cost each one by one. */
9316 {
9319 {
9321 {
9322 /* Get vectorized arguments for SLP_NODE. */
9328 }
9329 else
9330 {
9331 /* For interleaved stores we collect vectorized defs for all the
9332 stores in the group in DR_CHAIN. DR_CHAIN is then used as an
9333 input to vect_permute_store_chain().
9335 If the store is not grouped, DR_GROUP_SIZE is 1, and DR_CHAIN
9336 is of size 1. */
9339 {
9340 /* Since gaps are not supported for interleaved stores,
9341 DR_GROUP_SIZE is the exact number of stmts in the chain.
9342 Therefore, NEXT_STMT_INFO can't be NULL_TREE. In case
9343 that there is no interleaving, DR_GROUP_SIZE is 1,
9344 and only one iteration of the loop will be executed. */
9348 else
9349 {
9355 }
9357 }
9359 {
9362 mask_vectype);
9364 }
9365 }
9367 /* We should have catched mismatched types earlier. */
9371 bool simd_lane_access_p
9374 && simd_lane_access_p
9375 && !loop_masks
9382 {
9385 }
9387 dataref_ptr
9392 }
9394 {
9396 /* DR_CHAIN is then used as an input to vect_permute_store_chain().
9397 If the store is not grouped, DR_GROUP_SIZE is 1, and DR_CHAIN is
9398 of size 1. */
9400 {
9403 }
9408 else
9411 }
9415 {
9416 /* Permute. */
9419 {
9426 "vect_model_store_cost: "
9428 group_size);
9429 }
9430 else
9433 }
9437 {
9439 {
9443 /* For grouped stores vectorized defs are interleaved in
9444 vect_permute_store_chain(). */
9446 }
9449 {
9453 else
9454 {
9460 /* Generate the permute statement. */
9461 gimple *perm_stmt
9465 gsi);
9469 }
9470 }
9473 {
9474 n_adjacent_stores++;
9477 {
9481 }
9484 }
9500 /* Bump the vector pointer. */
9510 {
9513 }
9514 else
9519 misalign);
9522 /* Compute IFN when LOOP_LENS or final_mask valid. */
9527 {
9528 opt_machine_mode new_ovmode
9531 unsigned factor
9536 }
9538 {
9543 }
9546 {
9548 {
9549 /* Pass VF value to 'len' argument of
9550 MASK_LEN_STORE if LOOP_LENS is invalid. */
9552 }
9554 {
9555 /* Pass all ones value to 'mask' argument of
9556 MASK_LEN_STORE if final_mask is invalid. */
9559 }
9560 }
9562 {
9563 signed char biasval
9567 }
9569 /* Arguments are ready. Create the new vector stmt. */
9571 {
9574 /* Need conversion if it's wrapped with VnQI. */
9576 {
9577 tree new_vtype
9579 new_vmode);
9582 gassign *new_stmt
9586 }
9592 else
9599 }
9601 {
9603 gcall *call
9609 }
9610 else
9611 {
9612 data_ref
9614 dataref_offset ? dataref_offset
9617 ;
9618 else
9625 }
9633 }
9635 {
9639 }
9640 }
9643 {
9649 /* When vectorizing a store into the function result assign
9650 a penalty if the function returns in a multi-register location.
9651 In this case we assume we'll end up with having to spill the
9652 vector result and do piecewise loads as a conservative estimate. */
9658 {
9660 /* ??? Handle PARALLEL in some way. */
9662 {
9664 /* Assume that a single reg-reg move is possible and cheap,
9665 do not account for vector to gp register move cost. */
9667 {
9668 /* Spill. */
9669 prologue_cost
9672 /* Loads. */
9673 prologue_cost
9676 }
9677 }
9678 }
9681 "vect_model_store_cost: inside_cost = %d, "
9684 }
9687 }
9689 /* Given a vector type VECTYPE, turns permutation SEL into the equivalent
9690 VECTOR_CST mask. No checks are made that the target platform supports the
9691 mask, so callers may wish to test can_vec_perm_const_p separately, or use
9692 vect_gen_perm_mask_checked. */
9694 tree
9696 {
9697 tree mask_type;
9704 }
9706 /* Checked version of vect_gen_perm_mask_any. Asserts can_vec_perm_const_p,
9707 i.e. that the target supports the pattern _for arbitrary input vectors_. */
9709 tree
9711 {
9715 }
9717 /* Given a vector variable X and Y, that was generated for the scalar
9718 STMT_INFO, generate instructions to permute the vector elements of X and Y
9719 using permutation mask MASK_VEC, insert them at *GSI and return the
9720 permuted vector variable. */
9722 static tree
9726 {
9734 else
9738 /* Generate the permute statement. */
9743 }
9745 /* Hoist the definitions of all SSA uses on STMT_INFO out of the loop LOOP,
9746 inserting them on the loops preheader edge. Returns true if we
9747 were successful in doing so (and thus STMT_INFO can be moved then),
9748 otherwise returns false. HOIST_P indicates if we want to hoist the
9749 definitions of all SSA uses, it would be false when we are costing. */
9751 static bool
9753 {
9754 ssa_op_iter i;
9755 tree op;
9759 {
9763 {
9764 /* Make sure we don't need to recurse. While we could do
9765 so in simple cases when there are more complex use webs
9766 we don't have an easy way to preserve stmt order to fulfil
9767 dependencies within them. */
9768 tree op2;
9769 ssa_op_iter i2;
9773 {
9778 }
9780 }
9781 }
9790 {
9794 {
9798 }
9799 }
9802 }
9804 /* vectorizable_load.
9806 Check if STMT_INFO reads a non scalar data-ref (array/pointer/structure)
9807 that can be vectorized.
9808 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
9809 stmt to replace it, put it in VEC_STMT, and insert it at GSI.
9810 Return true if STMT_INFO is vectorizable in this way. */
9812 static bool
9817 {
9818 tree scalar_dest;
9825 tree elem_type;
9826 /* Avoid false positive uninitialized warning, see PR110652. */
9828 machine_mode mode;
9829 tree dummy;
9836 poly_uint64 group_gap_adj;
9842 stmt_vec_info first_stmt_info;
9850 poly_uint64 vf;
9851 tree aggr_type;
9852 gather_scatter_info gs_info;
9853 tree ref_type;
9870 {
9885 }
9886 else
9887 {
9902 mask_index = vect_slp_child_index_for_operand
9908 }
9914 {
9918 }
9919 else
9922 /* Multiple types in SLP are handled by creating the appropriate number of
9923 vectorized stmts for each SLP node. Hence, NCOPIES is always 1 in
9924 case of SLP. */
9927 else
9932 /* FORNOW. This restriction should be relaxed. */
9934 {
9939 }
9941 /* Invalidate assumptions made by dependence analysis when vectorization
9942 on the unrolled body effectively re-orders stmts. */
9947 {
9950 "cannot perform implicit CSE when unrolling "
9953 }
9958 /* FORNOW. In some cases can vectorize even if data-type not supported
9959 (e.g. - data copies). */
9961 {
9966 }
9968 /* Check if the load is a part of an interleaving chain. */
9970 {
9972 /* FORNOW */
9979 /* Refuse non-SLP vectorization of SLP-only groups. */
9981 {
9986 }
9988 /* Invalidate assumptions made by dependence analysis when vectorization
9989 on the unrolled body effectively re-orders stmts. */
9994 {
9997 "cannot perform implicit CSE when performing "
10000 }
10001 }
10002 else
10006 {
10010 {
10011 /* In BB vectorization we may not actually use a loaded vector
10012 accessing elements in excess of DR_GROUP_SIZE. */
10023 {
10026 "BB vectorization with gaps at the end of "
10029 }
10030 }
10036 {
10039 vect_location,
10042 }
10043 }
10045 vect_memory_access_type memory_access_type;
10048 poly_int64 poffset;
10049 internal_fn lanes_ifn;
10057 {
10059 {
10065 }
10068 {
10073 }
10077 {
10082 }
10083 }
10088 {
10090 && mask
10092 mask_vectype))
10093 {
10098 }
10108 mask);
10121 }
10131 /* Transform. */
10137 {
10139 /* If we have versioned for aliasing or the loop doesn't
10140 have any data dependencies that would preclude this,
10141 then we are sure this is a loop invariant load and
10142 thus we can insert it on the preheader edge.
10143 TODO: hoist_defs_of_uses should ideally be computed
10144 once at analysis time, remembered and used in the
10145 transform time. */
10147 && !nested_in_vect_loop
10150 {
10151 enum vect_cost_model_location cost_loc
10156 cost_loc);
10161 "vect_model_load_cost: inside_cost = %d, "
10165 }
10167 {
10177 tree vuse;
10180 else
10185 }
10186 /* These copies are all equivalent. */
10190 else
10191 {
10196 }
10201 else
10202 {
10206 }
10208 }
10212 {
10213 gimple_stmt_iterator incr_gsi;
10215 tree offvar;
10216 tree ivstep;
10217 tree running_off;
10220 /* Checked by get_load_store_type. */
10223 tree dr_offset;
10230 {
10233 }
10234 else
10235 {
10238 }
10241 {
10244 }
10245 else
10246 {
10248 cst_offset
10251 first_stmt_info));
10254 }
10257 {
10265 /* For a load with loop-invariant (but other than power-of-2)
10266 stride (i.e. not a grouped access) like so:
10268 for (i = 0; i < n; i += stride)
10269 ... = array[i];
10271 we generate a new induction variable and new accesses to
10272 form a new vector (or vectors, depending on ncopies):
10274 for (j = 0; ; j += VF*stride)
10275 tmp1 = array[j];
10276 tmp2 = array[j + stride];
10277 ...
10278 vectemp = {tmp1, tmp2, ...}
10279 */
10293 }
10303 {
10305 {
10306 /* First check if vec_init optab supports construction from vector
10307 elts directly. Otherwise avoid emitting a constructor of
10308 vector elements by performing the loads using an integer type
10309 of the same size, constructing a vector of those and then
10310 re-interpreting it as the original vector type. This avoids a
10311 huge runtime penalty due to the general inability to perform
10312 store forwarding from smaller stores to a larger load. */
10313 tree ptype;
10314 tree vtype
10319 {
10324 }
10325 }
10326 else
10327 {
10331 }
10333 }
10334 /* Load vector(1) scalar_type if it's 1 element-wise vectype. */
10339 {
10340 /* For SLP permutation support we need to load the whole group,
10341 not only the number of vector stmts the permutation result
10342 fits in. */
10344 {
10345 /* We don't yet generate SLP_TREE_LOAD_PERMUTATIONs for
10346 variable VF. */
10350 }
10351 else
10353 }
10355 unsigned HOST_WIDE_INT
10358 /* For costing some adjacent vector loads, we'd like to cost with
10359 the total number of them once instead of cost each one by one. */
10362 {
10367 {
10369 {
10370 /* For VMAT_ELEMENTWISE, just cost it as scalar_load to
10371 avoid ICE, see PR110776. */
10374 n_adjacent_loads++;
10375 else
10379 }
10393 {
10394 n_groups++;
10395 /* When doing SLP make sure to not load elements from
10396 the next vector iteration, those will not be accessed
10397 so just use the last element again. See PR107451. */
10399 {
10401 gimple *incr
10406 }
10408 }
10409 }
10412 {
10416 else
10417 {
10423 {
10424 new_stmt
10426 VIEW_CONVERT_EXPR,
10430 gsi);
10431 }
10432 }
10433 }
10436 {
10438 {
10441 else
10443 }
10444 else
10445 {
10449 }
10450 }
10451 }
10453 {
10456 {
10462 }
10463 else
10466 }
10469 {
10477 "vect_model_load_cost: inside_cost = %u, "
10479 inside_cost);
10480 }
10483 }
10491 {
10493 {
10496 }
10497 else
10498 {
10501 }
10502 /* For SLP vectorization we directly vectorize a subchain
10503 without permutation. */
10506 /* For BB vectorization always use the first stmt to base
10507 the data ref pointer on. */
10509 first_stmt_info_for_drptr
10512 /* Check if the chain of loads is already vectorized. */
10514 /* For SLP we would need to copy over SLP_TREE_VEC_DEFS.
10515 ??? But we can only do so if there is exactly one
10516 as we have no way to get at the rest. Leave the CSE
10517 opportunity alone.
10518 ??? With the group load eventually participating
10519 in multiple different permutations (having multiple
10520 slp nodes which refer to the same group) the CSE
10521 is even wrong code. See PR56270. */
10523 {
10526 }
10530 /* VEC_NUM is the number of vect stmts to be created for this group. */
10532 {
10534 /* If an SLP permutation is from N elements to N elements,
10535 and if one vector holds a whole number of N, we can load
10536 the inputs to the permutation in the same way as an
10537 unpermuted sequence. In other cases we need to load the
10538 whole group, not only the number of vector stmts the
10539 permutation result fits in. */
10544 {
10545 /* We don't yet generate such SLP_TREE_LOAD_PERMUTATIONs for
10546 variable VF; see vect_transform_slp_perm_load. */
10551 }
10552 else
10553 {
10555 group_gap_adj
10557 }
10558 }
10559 else
10563 }
10564 else
10565 {
10573 }
10576 vec_loop_masks *loop_masks
10580 vec_loop_lens *loop_lens
10585 /* The vect_transform_stmt and vect_analyze_stmt will go here but there
10586 are some difference here. We cannot enable both the lens and masks
10587 during transform but it is allowed during analysis.
10588 Shouldn't go with length-based approach if fully masked. */
10590 /* The cost_vec is NULL during transfrom. */
10593 /* Targets with store-lane instructions must not require explicit
10594 realignment. vect_supportable_dr_alignment always returns either
10595 dr_aligned or dr_unaligned_supported for masked operations. */
10597 && !mask
10602 /* In case the vectorization factor (VF) is bigger than the number
10603 of elements that we can fit in a vectype (nunits), we have to generate
10604 more than one vector stmt - i.e - we need to "unroll" the
10605 vector stmt by a factor VF/nunits. In doing so, we record a pointer
10606 from one copy of the vector stmt to the next, in the field
10607 STMT_VINFO_RELATED_STMT. This is necessary in order to allow following
10608 stages to find the correct vector defs to be used when vectorizing
10609 stmts that use the defs of the current stmt. The example below
10610 illustrates the vectorization process when VF=16 and nunits=4 (i.e., we
10611 need to create 4 vectorized stmts):
10613 before vectorization:
10614 RELATED_STMT VEC_STMT
10615 S1: x = memref - -
10616 S2: z = x + 1 - -
10618 step 1: vectorize stmt S1:
10619 We first create the vector stmt VS1_0, and, as usual, record a
10620 pointer to it in the STMT_VINFO_VEC_STMT of the scalar stmt S1.
10621 Next, we create the vector stmt VS1_1, and record a pointer to
10622 it in the STMT_VINFO_RELATED_STMT of the vector stmt VS1_0.
10623 Similarly, for VS1_2 and VS1_3. This is the resulting chain of
10624 stmts and pointers:
10625 RELATED_STMT VEC_STMT
10626 VS1_0: vx0 = memref0 VS1_1 -
10627 VS1_1: vx1 = memref1 VS1_2 -
10628 VS1_2: vx2 = memref2 VS1_3 -
10629 VS1_3: vx3 = memref3 - -
10630 S1: x = load - VS1_0
10631 S2: z = x + 1 - -
10632 */
10634 /* In case of interleaving (non-unit grouped access):
10636 S1: x2 = &base + 2
10637 S2: x0 = &base
10638 S3: x1 = &base + 1
10639 S4: x3 = &base + 3
10641 Vectorized loads are created in the order of memory accesses
10642 starting from the access of the first stmt of the chain:
10644 VS1: vx0 = &base
10645 VS2: vx1 = &base + vec_size*1
10646 VS3: vx3 = &base + vec_size*2
10647 VS4: vx4 = &base + vec_size*3
10649 Then permutation statements are generated:
10651 VS5: vx5 = VEC_PERM_EXPR < vx0, vx1, { 0, 2, ..., i*2 } >
10652 VS6: vx6 = VEC_PERM_EXPR < vx0, vx1, { 1, 3, ..., i*2+1 } >
10653 ...
10655 And they are put in STMT_VINFO_VEC_STMT of the corresponding scalar stmts
10656 (the order of the data-refs in the output of vect_permute_load_chain
10657 corresponds to the order of scalar stmts in the interleaving chain - see
10658 the documentation of vect_permute_load_chain()).
10659 The generation of permutation stmts and recording them in
10660 STMT_VINFO_VEC_STMT is done in vect_transform_grouped_load().
10662 In case of both multiple types and interleaving, the vector loads and
10663 permutation stmts above are created for every copy. The result vector
10664 stmts are put in STMT_VINFO_VEC_STMT for the first copy and in the
10665 corresponding STMT_VINFO_RELATED_STMT for the next copies. */
10667 /* If the data reference is aligned (dr_aligned) or potentially unaligned
10668 on a target that supports unaligned accesses (dr_unaligned_supported)
10669 we generate the following code:
10670 p = initial_addr;
10671 indx = 0;
10672 loop {
10673 p = p + indx * vectype_size;
10674 vec_dest = *(p);
10675 indx = indx + 1;
10676 }
10678 Otherwise, the data reference is potentially unaligned on a target that
10679 does not support unaligned accesses (dr_explicit_realign_optimized) -
10680 then generate the following code, in which the data in each iteration is
10681 obtained by two vector loads, one from the previous iteration, and one
10682 from the current iteration:
10683 p1 = initial_addr;
10684 msq_init = *(floor(p1))
10685 p2 = initial_addr + VS - 1;
10686 realignment_token = call target_builtin;
10687 indx = 0;
10688 loop {
10689 p2 = p2 + indx * vectype_size
10690 lsq = *(floor(p2))
10691 vec_dest = realign_load (msq, lsq, realignment_token)
10692 indx = indx + 1;
10693 msq = lsq;
10694 } */
10696 /* If the misalignment remains the same throughout the execution of the
10697 loop, we can create the init_addr and permutation mask at the loop
10698 preheader. Otherwise, it needs to be created inside the loop.
10699 This can only occur when vectorizing memory accesses in the inner-loop
10700 nested within an outer-loop that is being vectorized. */
10705 {
10708 }
10710 bool diff_first_stmt_info
10717 {
10718 /* If we have different first_stmt_info, we can't set up realignment
10719 here, since we can't guarantee first_stmt_info DR has been
10720 initialized yet, use first_stmt_info_for_drptr DR by bumping the
10721 distance from first_stmt_info DR instead as below. */
10723 {
10730 {
10733 size_one_node);
10735 }
10736 }
10737 }
10738 else
10742 offset = (offset
10746 tree bump;
10749 {
10752 }
10754 {
10759 }
10760 else
10761 {
10764 else
10768 }
10773 {
10777 else
10780 }
10784 {
10790 /* For costing some adjacent vector loads, we'd like to cost with
10791 the total number of them once instead of cost each one by one. */
10794 {
10796 {
10797 /* An IFN_LOAD_LANES will load all its vector results,
10798 regardless of which ones we actually need. Account
10799 for the cost of unused results. */
10801 {
10804 do
10805 {
10808 }
10811 {
10814 "vect_model_load_cost: %d "
10816 gaps);
10818 alignment_support_scheme,
10822 }
10823 }
10824 n_adjacent_loads++;
10826 }
10828 /* 1. Create the vector or array pointer update chain. */
10830 dataref_ptr
10834 else
10835 {
10839 }
10856 {
10860 else
10862 signed char biasval
10866 {
10869 }
10870 }
10874 {
10875 /* Emit:
10876 VEC_ARRAY = MASK_LEN_LOAD_LANES (DATAREF_PTR, ALIAS_PTR,
10877 VEC_MASK, LEN, BIAS). */
10883 }
10885 {
10886 /* Emit:
10887 VEC_ARRAY = MASK_LOAD_LANES (DATAREF_PTR, ALIAS_PTR,
10888 VEC_MASK). */
10893 final_mask);
10894 }
10895 else
10896 {
10897 /* Emit:
10898 VEC_ARRAY = LOAD_LANES (MEM_REF[...all elements...]). */
10901 }
10907 /* Extract each vector into an SSA_NAME. */
10909 {
10913 }
10915 /* Record the mapping between SSA_NAMEs and statements. */
10918 /* Record that VEC_ARRAY is now dead. */
10924 }
10927 {
10935 "vect_model_load_cost: inside_cost = %u, "
10938 }
10941 }
10944 {
10951 {
10952 /* 1. Create the vector or array pointer update chain. */
10954 {
10959 else
10960 dataref_ptr
10964 }
10966 {
10971 }
10975 {
10980 {
10984 final_mask
10995 }
10997 /* 2. Create the vector-load in the loop. */
11000 {
11002 {
11004 inside_cost
11008 }
11015 {
11017 final_len
11021 else
11022 final_len
11025 signed char biasval
11029 {
11032 }
11033 }
11037 call
11046 else
11053 }
11055 {
11056 /* The builtin decls path for gather is legacy, x86 only. */
11059 {
11061 inside_cost
11065 }
11066 poly_uint64 offset_nunits
11069 {
11070 new_stmt = vect_build_one_gather_load_call
11073 final_mask);
11075 }
11077 {
11078 /* We have a offset vector with half the number of
11079 lanes but the builtins will produce full vectype
11080 data with just the lower lanes filled. */
11081 new_stmt = vect_build_one_gather_load_call
11084 final_mask);
11090 /* now put upper half of final_mask in final_mask low. */
11092 && !SCALAR_INT_MODE_P
11094 {
11101 tree perm_mask = vect_gen_perm_mask_checked
11104 VEC_PERM_EXPR,
11105 final_mask,
11106 final_mask,
11107 perm_mask);
11112 }
11114 {
11116 VEC_UNPACK_HI_EXPR,
11117 final_mask);
11118 final_mask = make_ssa_name
11123 }
11125 new_stmt = vect_build_one_gather_load_call
11127 dataref_ptr,
11129 final_mask);
11135 /* compose low + high. */
11142 tree perm_mask
11145 VEC_PERM_EXPR,
11148 }
11150 {
11151 /* We have a offset vector with double the number of
11152 lanes. Select the low/high part accordingly. */
11155 {
11162 tree perm_mask = vect_gen_perm_mask_checked
11165 VEC_PERM_EXPR,
11166 vec_offset,
11167 vec_offset,
11168 perm_mask);
11173 }
11174 new_stmt = vect_build_one_gather_load_call
11178 }
11179 else
11181 }
11182 else
11183 {
11184 /* Emulated gather-scatter. */
11188 {
11189 /* For emulated gathers N offset vector element
11190 offset add is consumed by the load). */
11194 /* N scalar loads plus gathering them into a
11195 vector. */
11196 inside_cost
11199 inside_cost
11203 }
11204 unsigned HOST_WIDE_INT const_offset_nunits
11210 /* We support offset vectors with more elements
11211 than the data vector for now. */
11212 unsigned HOST_WIDE_INT factor
11215 unsigned elt_offset
11222 {
11225 tree idx
11230 scale);
11242 }
11247 }
11250 /* DATA_REF is null if we've already built the statement. */
11252 {
11255 }
11260 /* Store vector loads in the corresponding SLP_NODE. */
11263 }
11267 }
11274 "vect_model_load_cost: inside_cost = %u, "
11278 }
11282 /* For costing some adjacent vector loads, we'd like to cost with
11283 the total number of them once instead of cost each one by one. */
11286 {
11287 /* 1. Create the vector or array pointer update chain. */
11289 {
11290 bool simd_lane_access_p
11301 {
11304 }
11306 {
11307 dataref_ptr
11311 bump);
11312 /* Adjust the pointer by the difference to first_stmt. */
11313 data_reference_p ptrdr
11315 tree diff
11323 {
11327 alignment_support_scheme,
11330 }
11331 }
11332 else
11333 dataref_ptr
11335 at_loop,
11338 }
11340 {
11344 bump);
11345 else
11348 }
11355 {
11360 {
11374 }
11376 /* 2. Create the vector-load in the loop. */
11378 {
11381 {
11391 {
11392 align
11395 }
11396 else
11401 misalign);
11404 /* Compute IFN when LOOP_LENS or final_mask valid. */
11409 {
11410 opt_machine_mode new_ovmode
11413 unsigned factor
11418 }
11420 {
11425 }
11428 {
11430 {
11431 /* Pass VF value to 'len' argument of
11432 MASK_LEN_LOAD if LOOP_LENS is invalid. */
11434 }
11436 {
11437 /* Pass all ones value to 'mask' argument of
11438 MASK_LEN_LOAD if final_mask is invalid. */
11441 }
11442 }
11444 {
11445 signed char biasval
11449 }
11452 {
11459 bias);
11460 else
11468 /* Need conversion if it's wrapped with VnQI. */
11470 {
11473 tree var
11477 gsi);
11481 }
11482 }
11484 {
11488 final_mask);
11492 }
11493 else
11494 {
11498 unsigned int vect_align
11500 unsigned int scalar_dr_size
11502 /* If there's no peeling for gaps but we have a gap
11503 with slp loads then load the lower half of the
11504 vector only. See get_group_load_store_type for
11505 when we apply this optimization. */
11507 && loop_vinfo
11512 {
11513 tree half_vtype;
11514 new_vtype
11519 }
11520 /* Try to use a single smaller load when we are about
11521 to load excess elements compared to the unrolled
11522 scalar loop.
11523 ??? This should cover the above case as well. */
11526 {
11529 /* DR will be unused. */
11532 tree_to_poly_uint64
11534 /* Aligned access to excess elements is OK if
11535 at least one element is accessed in the
11536 scalar loop. */
11537 ;
11538 else
11539 {
11540 auto remain
11543 /* remain should now be > 0 and < nunits. */
11546 {
11547 tree ptype;
11548 new_vtype
11550 num,
11554 }
11555 /* Else use multiple loads or a masked load? */
11556 }
11557 }
11558 tree offset
11562 ;
11565 {
11566 poly_uint64 gap_offset
11571 }
11573 {
11574 data_ref
11577 ;
11578 else
11582 }
11586 {
11592 gsi);
11595 /* We've computed 'num' above to statically two
11596 or via constant_multiple_p. */
11597 unsigned num
11600 tree_to_poly_uint64
11605 {
11610 }
11611 else
11612 {
11617 }
11622 else
11623 {
11630 vec_dest,
11632 }
11633 }
11634 }
11636 }
11638 {
11648 dr_explicit_realign,
11653 else
11655 // For explicit realign the target alignment should be
11656 // known at compile time.
11657 unsigned HOST_WIDE_INT align
11664 data_ref
11678 bump);
11684 else
11688 data_ref
11691 }
11693 {
11698 else
11700 // We should only be doing this if we know the target
11701 // alignment at compile time.
11702 unsigned HOST_WIDE_INT align
11712 }
11715 }
11717 /* One common place to cost the above vect load for different
11718 alignment support schemes. */
11720 {
11721 /* For VMAT_CONTIGUOUS_PERMUTE if it's grouped load, we
11722 only need to take care of the first stmt, whose
11723 stmt_info is first_stmt_info, vec_num iterating on it
11724 will cover the cost for the remaining, it's consistent
11725 with transforming. For the prologue cost for realign,
11726 we only need to count it once for the whole group. */
11733 {
11734 /* Leave realign cases alone to keep them simple. */
11742 else
11743 n_adjacent_loads++;
11744 }
11745 }
11746 else
11747 {
11749 /* DATA_REF is null if we've already built the statement. */
11751 {
11754 }
11758 }
11760 /* 3. Handle explicit realignment if necessary/supported.
11761 Create in loop:
11762 vec_dest = realign_load (msq, lsq, realignment_token) */
11766 {
11778 {
11782 UNKNOWN_LOCATION);
11784 }
11785 }
11788 {
11792 else
11793 {
11798 }
11799 }
11801 /* Collect vector loads and later create their permutation in
11802 vect_transform_grouped_load (). */
11806 /* Store vector loads in the corresponding SLP_NODE. */
11810 /* With SLP permutation we load the gaps as well, without
11811 we need to skip the gaps after we manage to fully load
11812 all elements. group_gap_adj is DR_GROUP_SIZE here. */
11816 && !slp_perm
11818 {
11819 poly_wide_int bump_val
11828 }
11829 }
11830 /* Bump the vector pointer to account for a gap or for excess
11831 elements loaded for a permuted SLP load. */
11835 {
11836 poly_wide_int bump_val
11843 }
11849 {
11851 /* For SLP we know we've seen all possible uses of dr_chain so
11852 direct vect_transform_slp_perm_load to DCE the unused parts.
11853 ??? This is a hack to prevent compile-time issues as seen
11854 in PR101120 and friends. */
11856 {
11861 }
11862 else
11863 {
11868 }
11869 }
11870 else
11871 {
11873 {
11875 /* We assume that the cost of a single load-lanes instruction
11876 is equivalent to the cost of DR_GROUP_SIZE separate loads.
11877 If a grouped access is instead being provided by a
11878 load-and-permute operation, include the cost of the
11879 permutes. */
11881 {
11882 /* Uses an even and odd extract operations or shuffle
11883 operations for each needed permute. */
11891 "vect_model_load_cost:"
11893 group_size);
11894 }
11896 {
11900 }
11901 }
11904 }
11906 }
11911 {
11922 "vect_model_load_cost: inside_cost = %u, "
11925 }
11928 }
11930 /* Function vect_is_simple_cond.
11932 Input:
11933 LOOP - the loop that is being vectorized.
11934 COND - Condition that is checked for simple use.
11936 Output:
11937 *COMP_VECTYPE - the vector type for the comparison.
11938 *DTS - The def types for the arguments of the comparison
11940 Returns whether a COND can be vectorized. Checks whether
11941 condition operands are supportable using vec_is_simple_use. */
11943 static bool
11947 {
11950 slp_tree slp_op;
11952 /* Mask case. */
11955 {
11958 || !*comp_vectype
11962 }
11971 {
11975 }
11979 else
11983 {
11987 }
11991 else
12000 /* Invariant comparison. */
12002 {
12006 else
12007 {
12008 /* If we can widen the comparison to match vectype do so. */
12010 && !slp_node
12013 scalar_type = build_nonstandard_integer_type
12016 slp_node);
12017 }
12018 }
12021 }
12023 /* vectorizable_condition.
12025 Check if STMT_INFO is conditional modify expression that can be vectorized.
12026 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
12027 stmt using VEC_COND_EXPR to replace it, put it in VEC_STMT, and insert it
12028 at GSI.
12030 When STMT_INFO is vectorized as a nested cycle, for_reduction is true.
12032 Return true if STMT_INFO is vectorizable in this way. */
12034 static bool
12039 {
12047 tree vec_compare;
12048 tree new_temp;
12063 tree vec_cmp_type;
12069 /* Is vectorizable conditional operation? */
12081 bool for_reduction
12084 {
12092 }
12093 else
12094 {
12097 }
12103 {
12106 }
12107 else
12108 {
12111 }
12147 {
12150 }
12152 /* For conditional reductions, the "then" value needs to be the candidate
12153 value calculated by this iteration while the "else" value needs to be
12154 the result carried over from previous iterations. If the COND_EXPR
12155 is the other way around, we need to swap it. */
12158 {
12161 else
12162 {
12167 else
12168 {
12170 /* Make sure we don't accidentally use the old condition. */
12172 }
12173 }
12175 }
12178 {
12179 /* Boolean values may have another representation in vectors
12180 and therefore we prefer bit operations over comparison for
12181 them (which also works for scalar masks). We store opcodes
12182 to use in bitop1 and bitop2. Statement is vectorized as
12183 BITOP2 (rhs1 BITOP1 rhs2) or rhs1 BITOP2 (BITOP1 rhs2)
12184 depending on bitop1 and bitop2 arity. */
12186 {
12214 }
12216 }
12221 {
12226 }
12229 {
12231 {
12233 optab optab;
12240 {
12242 optab_default);
12245 }
12246 }
12250 /* Count one reduction-like operation per vector. */
12253 && (masked
12255 cond_code)
12257 ERROR_MARK))))
12261 && (!vect_maybe_update_slp_op_vectype
12264 && !vect_maybe_update_slp_op_vectype
12268 {
12273 }
12277 {
12279 {
12285 else
12289 }
12290 /* Extra inactive lanes should be safe for vect_nested_cycle. */
12292 {
12295 "conditional reduction prevents the use"
12298 }
12299 }
12305 }
12307 /* Transform. */
12309 /* Handle def. */
12316 /* See whether another part of the vectorized code applies a loop
12317 mask to the condition, or to its inverse. */
12322 {
12325 }
12327 {
12330 else
12331 {
12335 else
12336 {
12341 {
12345 }
12346 else
12347 {
12348 /* Try the inverse of the current mask. We check if the
12349 inverse mask is live and if so we generate a negate of
12350 the current mask such that we still honor NaNs. */
12354 {
12359 }
12360 }
12361 }
12362 }
12363 }
12365 /* Handle cond expr. */
12370 reduction_type != EXTRACT_LAST_REDUCTION
12372 else
12377 reduction_type != EXTRACT_LAST_REDUCTION
12380 /* Arguments are ready. Create the new vector stmt. */
12382 {
12392 else
12393 {
12396 {
12401 }
12402 else
12403 {
12408 vec_cond_rhs);
12409 else
12410 new_stmt
12412 vec_cond_rhs);
12418 {
12419 /* Instead of doing ~x ? y : z do x ? z : y. */
12422 }
12423 else
12424 {
12427 new_stmt
12429 else
12430 new_stmt
12435 }
12436 }
12437 }
12439 /* If we decided to apply a loop mask to the result of the vector
12440 comparison, AND the comparison with the mask now. Later passes
12441 should then be able to reuse the AND results between mulitple
12442 vector statements.
12444 For example:
12445 for (int i = 0; i < 100; ++i)
12446 x[i] = y[i] ? z[i] : 10;
12448 results in following optimized GIMPLE:
12450 mask__35.8_43 = vect__4.7_41 != { 0, ... };
12451 vec_mask_and_46 = loop_mask_40 & mask__35.8_43;
12452 _19 = &MEM[base: z_12(D), index: ivtmp_56, step: 4, offset: 0B];
12453 vect_iftmp.11_47 = .MASK_LOAD (_19, 4B, vec_mask_and_46);
12454 vect_iftmp.12_52 = VEC_COND_EXPR <vec_mask_and_46,
12455 vect_iftmp.11_47, { 10, ... }>;
12457 instead of using a masked and unmasked forms of
12458 vec != { 0, ... } (masked in the MASK_LOAD,
12459 unmasked in the VEC_COND_EXPR). */
12461 /* Force vec_compare to be an SSA_NAME rather than a comparison,
12462 in cases where that's necessary. */
12466 {
12468 {
12471 vec_compare);
12474 }
12477 {
12480 BIT_NOT_EXPR,
12481 vec_compare);
12484 }
12488 {
12490 {
12493 signed char biasval
12496 }
12497 else
12498 {
12501 }
12502 }
12504 {
12505 tree loop_mask
12509 gassign *g
12511 loop_mask);
12514 }
12515 }
12519 {
12523 new_stmt = gimple_build_call_internal
12526 else
12527 new_stmt = gimple_build_call_internal
12529 vec_then_clause);
12534 else
12535 {
12536 /* In this case we're moving the definition to later in the
12537 block. That doesn't matter because the only uses of the
12538 lhs are in phi statements. */
12542 }
12543 }
12544 else
12545 {
12550 }
12553 else
12555 }
12566 }
12568 /* Helper of vectorizable_comparison.
12570 Check if STMT_INFO is comparison expression CODE that can be vectorized.
12571 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
12572 comparison, put it in VEC_STMT, and insert it at GSI.
12574 Return true if STMT_INFO is vectorizable in this way. */
12576 static bool
12581 {
12585 tree new_temp;
12589 poly_uint64 nunits;
12596 tree mask_type;
12610 else
12634 /* Invariant comparison. */
12636 {
12639 else
12641 slp_node);
12644 }
12648 /* Can't compare mask and non-mask types. */
12653 /* Boolean values may have another representation in vectors
12654 and therefore we prefer bit operations over comparison for
12655 them (which also works for scalar masks). We store opcodes
12656 to use in bitop1 and bitop2. Statement is vectorized as
12657 BITOP2 (rhs1 BITOP1 rhs2) or
12658 rhs1 BITOP2 (BITOP1 rhs2)
12659 depending on bitop1 and bitop2 arity. */
12662 {
12664 {
12667 }
12669 {
12672 }
12674 {
12678 }
12680 {
12684 }
12685 else
12686 {
12690 }
12691 }
12694 {
12696 {
12699 }
12700 else
12701 {
12703 optab optab;
12710 {
12714 }
12715 }
12717 /* Put types on constant and invariant SLP children. */
12721 {
12726 }
12732 }
12734 /* Transform. */
12736 /* Handle def. */
12747 /* Arguments are ready. Create the new vector stmt. */
12749 {
12755 else
12758 {
12762 }
12763 else
12764 {
12767 else
12769 vec_rhs2);
12772 {
12776 else
12778 new_temp);
12780 }
12781 }
12784 else
12786 }
12795 }
12797 /* vectorizable_comparison.
12799 Check if STMT_INFO is comparison expression that can be vectorized.
12800 If VEC_STMT is also passed, vectorize STMT_INFO: create a vectorized
12801 comparison, put it in VEC_STMT, and insert it at GSI.
12803 Return true if STMT_INFO is vectorizable in this way. */
12805 static bool
12810 {
12833 }
12835 /* Check to see if the current early break given in STMT_INFO is valid for
12836 vectorization. */
12838 static bool
12842 {
12859 slp_tree slp_op0;
12860 tree op0;
12864 {
12869 }
12879 else
12885 /* Now build the new conditional. Pattern gimple_conds get dropped during
12886 codegen so we must replace the original insn. */
12889 /* When vectorizing we assume that if the branch edge is taken that we're
12890 exiting the loop. This is not however always the case as the compiler will
12891 rewrite conditions to always be a comparison against 0. To do this it
12892 sometimes flips the edges. This is fine for scalar, but for vector we
12893 then have to flip the test, as we're still assuming that if you take the
12894 branch edge that we found the exit condition. i.e. we need to know whether
12895 we are generating a `forall` or an `exist` condition. */
12906 {
12911 }
12913 /* Analyze only. */
12915 {
12917 {
12920 "can't vectorize early exit because the "
12921 "target doesn't support flag setting vector "
12924 }
12928 {
12931 "can't vectorize early exit because the "
12932 "target does not support boolean vector %s "
12935 vectype);
12937 }
12944 {
12946 OPTIMIZE_FOR_SPEED))
12948 else
12950 }
12954 }
12956 /* Tranform. */
12976 else
12977 {
12982 }
12984 /* Determine if we need to reduce the final value. */
12986 {
12987 /* We build the reductions in a way to maintain as much parallelism as
12988 possible. */
12991 /* Mask the statements as we queue them up. Normally we loop over
12992 vec_num, but since we inspect the exact results of vectorization
12993 we don't need to and instead can just use the stmts themselves. */
12996 {
12997 tree stmt_mask
12999 i);
13000 stmt_mask
13004 }
13005 else
13009 {
13017 }
13018 }
13019 else
13020 {
13023 {
13024 tree mask
13028 }
13029 }
13038 else
13045 }
13047 /* If SLP_NODE is nonnull, return true if vectorizable_live_operation
13048 can handle all live statements in the node. Otherwise return true
13049 if STMT_INFO is not live or if vectorizable_live_operation can handle it.
13050 VEC_STMT_P is as for vectorizable_live_operation. */
13052 static bool
13057 {
13060 {
13061 stmt_vec_info slp_stmt_info;
13064 {
13066 || (loop_vinfo
13074 }
13075 }
13085 }
13087 /* Make sure the statement is vectorizable. */
13089 opt_result
13094 {
13098 gimple_seq pattern_def_seq;
13106 "not vectorized:"
13113 {
13114 gimple_stmt_iterator si;
13117 {
13118 stmt_vec_info pattern_def_stmt_info
13122 {
13123 /* Analyze def stmt of STMT if it's a pattern stmt. */
13129 opt_result res
13132 cost_vec);
13135 }
13136 }
13137 }
13139 /* Skip stmts that do not need to be vectorized. In loops this is expected
13140 to include:
13141 - the COND_EXPR which is the loop exit condition
13142 - any LABEL_EXPRs in the loop
13143 - computations that are used only for array indexing or loop control.
13144 In basic blocks we only analyze statements that are a part of some SLP
13145 instance, therefore, all the statements are relevant.
13147 Pattern statement needs to be analyzed instead of the original statement
13148 if the original statement is not relevant. Otherwise, we analyze both
13149 statements. In basic blocks we are called from some SLP instance
13150 traversal, don't analyze pattern stmts instead, the pattern stmts
13151 already will be part of SLP instance. */
13156 {
13158 && pattern_stmt_info
13161 {
13162 /* Analyze PATTERN_STMT instead of the original stmt. */
13168 }
13169 else
13170 {
13175 }
13176 }
13179 && pattern_stmt_info
13182 {
13183 /* Analyze PATTERN_STMT too. */
13189 opt_result res
13194 }
13197 {
13222 }
13229 {
13235 }
13238 {
13243 }
13249 /* Prefer vectorizable_call over vectorizable_simd_clone_call so
13250 -mveclibabi= takes preference over library functions with
13251 the simd attribute. */
13254 cost_vec)
13271 cost_vec)
13277 cost_vec));
13278 else
13279 {
13285 cost_vec)
13291 cost_vec)
13299 cost_vec)
13302 cost_vec));
13304 }
13311 "not vectorized:"
13315 /* Stmts that are (also) "live" (i.e. - that are used out of the loop)
13316 need extra handling, except for vectorizable reductions. */
13324 "not vectorized:"
13329 }
13332 /* Function vect_transform_stmt.
13334 Create a vectorized stmt to replace STMT_INFO, and insert it at GSI. */
13336 bool
13340 {
13352 {
13364 NULL);
13376 NULL);
13388 NULL);
13394 && !slp_node
13397 /* In case of interleaving, the whole chain is vectorized when the
13398 last store in the chain is reached. Store stmts before the last
13399 one are skipped, and there vec_stmt_info shouldn't be freed
13400 meanwhile. */
13401 ;
13402 else
13403 {
13408 }
13470 {
13475 }
13477 }
13483 {
13484 /* Handle stmts whose DEF is used outside the loop-nest that is
13485 being vectorized. */
13489 }
13495 }
13498 /* Remove a group of stores (for SLP or interleaving), free their
13499 stmt_vec_info. */
13501 void
13503 {
13507 {
13510 /* Free the attached stmt_vec_info and remove the stmt. */
13513 }
13514 }
13516 /* If NUNITS is nonzero, return a vector type that contains NUNITS
13517 elements of type SCALAR_TYPE, or null if the target doesn't support
13518 such a type.
13520 If NUNITS is zero, return a vector type that contains elements of
13521 type SCALAR_TYPE, choosing whichever vector size the target prefers.
13523 If PREVAILING_MODE is VOIDmode, we have not yet chosen a vector mode
13524 for this vectorization region and want to "autodetect" the best choice.
13525 Otherwise, PREVAILING_MODE is a previously-chosen vector TYPE_MODE
13526 and we want the new type to be interoperable with it. PREVAILING_MODE
13527 in this case can be a scalar integer mode or a vector mode; when it
13528 is a vector mode, the function acts like a tree-level version of
13529 related_vector_mode. */
13531 tree
13534 {
13536 scalar_mode inner_mode;
13537 machine_mode simd_mode;
13538 tree vectype;
13549 /* Interoperability between modes requires one to be a constant multiple
13550 of the other, so that the number of vectors required for each operation
13551 is a compile-time constant. */
13559 /* For vector types of elements whose mode precision doesn't
13560 match their types precision we use a element type of mode
13561 precision. The vectorization routines will have to make sure
13562 they support the proper result truncation/extension.
13563 We also make sure to build vector types with INTEGER_TYPE
13564 component type only. */
13571 /* We shouldn't end up building VECTOR_TYPEs of non-scalar components.
13572 When the component mode passes the above test simply use a type
13573 corresponding to that mode. The theory is that any use that
13574 would cause problems with this will disable vectorization anyway. */
13579 /* We can't build a vector type of elements with alignment bigger than
13580 their size. */
13585 /* If we felt back to using the mode fail if there was
13586 no scalar type for it. */
13590 /* If no prevailing mode was supplied, use the mode the target prefers.
13591 Otherwise lookup a vector mode based on the prevailing mode. */
13593 {
13597 {
13598 /* Traditional behavior is not to take the integer mode
13599 literally, but simply to use it as a way of determining
13600 the vector size. It is up to mode_for_vector to decide
13601 what the TYPE_MODE should be.
13603 Note that nunits == 1 is allowed in order to support single
13604 element vector types. */
13608 }
13609 }
13613 {
13614 /* Fall back to using mode_for_vector, mostly in the hope of being
13615 able to use an integer mode. */
13622 }
13626 /* In cases where the mode was chosen by mode_for_vector, check that
13627 the target actually supports the chosen mode, or that it at least
13628 allows the vector mode to be replaced by a like-sized integer. */
13633 /* Re-attach the address-space qualifier if we canonicalized the scalar
13634 type. */
13636 return build_qualified_type
13640 }
13642 /* Function get_vectype_for_scalar_type.
13644 Returns the vector type corresponding to SCALAR_TYPE as supported
13645 by the target. If GROUP_SIZE is nonzero and we're performing BB
13646 vectorization, make sure that the number of elements in the vector
13647 is no bigger than GROUP_SIZE. */
13649 tree
13652 {
13653 /* For BB vectorization, we should always have a group size once we've
13654 constructed the SLP tree; the only valid uses of zero GROUP_SIZEs
13655 are tentative requests during things like early data reference
13656 analysis and pattern recognition. */
13659 else
13663 scalar_type);
13667 /* Register the natural choice of vector type, before the group size
13668 has been applied. */
13672 /* If the natural choice of vector type doesn't satisfy GROUP_SIZE,
13673 try again with an explicit number of elements. */
13675 && group_size
13677 {
13678 /* Start with the biggest number of units that fits within
13679 GROUP_SIZE and halve it until we find a valid vector type.
13680 Usually either the first attempt will succeed or all will
13681 fail (in the latter case because GROUP_SIZE is too small
13682 for the target), but it's possible that a target could have
13683 a hole between supported vector types.
13685 If GROUP_SIZE is not a power of 2, this has the effect of
13686 trying the largest power of 2 that fits within the group,
13687 even though the group is not a multiple of that vector size.
13688 The BB vectorizer will then try to carve up the group into
13689 smaller pieces. */
13691 do
13692 {
13696 }
13698 }
13701 }
13703 /* Return the vector type corresponding to SCALAR_TYPE as supported
13704 by the target. NODE, if nonnull, is the SLP tree node that will
13705 use the returned vector type. */
13707 tree
13709 {
13714 }
13716 /* Function get_mask_type_for_scalar_type.
13718 Returns the mask type corresponding to a result of comparison
13719 of vectors of specified SCALAR_TYPE as supported by target.
13720 If GROUP_SIZE is nonzero and we're performing BB vectorization,
13721 make sure that the number of elements in the vector is no bigger
13722 than GROUP_SIZE. */
13724 tree
13727 {
13734 }
13736 /* Function get_mask_type_for_scalar_type.
13738 Returns the mask type corresponding to a result of comparison
13739 of vectors of specified SCALAR_TYPE as supported by target.
13740 NODE, if nonnull, is the SLP tree node that will use the returned
13741 vector type. */
13743 tree
13745 slp_tree node)
13746 {
13753 }
13755 /* Function get_same_sized_vectype
13757 Returns a vector type corresponding to SCALAR_TYPE of size
13758 VECTOR_TYPE if supported by the target. */
13760 tree
13762 {
13766 poly_uint64 nunits;
13773 }
13775 /* Return true if replacing LOOP_VINFO->vector_mode with VECTOR_MODE
13776 would not change the chosen vector modes. */
13778 bool
13780 {
13787 }
13789 /* Function vect_is_simple_use.
13791 Input:
13792 VINFO - the vect info of the loop or basic block that is being vectorized.
13793 OPERAND - operand in the loop or bb.
13794 Output:
13795 DEF_STMT_INFO_OUT (optional) - information about the defining stmt in
13796 case OPERAND is an SSA_NAME that is defined in the vectorizable region
13797 DEF_STMT_OUT (optional) - the defining stmt in case OPERAND is an SSA_NAME;
13798 the definition could be anywhere in the function
13799 DT - the type of definition
13801 Returns whether a stmt with OPERAND can be vectorized.
13802 For loops, supportable operands are constants, loop invariants, and operands
13803 that are defined by the current iteration of the loop. Unsupportable
13804 operands are those that are defined by a previous iteration of the loop (as
13805 is the case in reduction/induction computations).
13806 For basic blocks, supportable operands are constants and bb invariants.
13807 For now, operands defined outside the basic block are not supported. */
13809 bool
13812 {
13820 {
13826 else
13828 }
13838 else
13839 {
13844 else
13845 {
13851 }
13854 }
13857 {
13860 {
13894 }
13895 }
13898 {
13903 }
13906 }
13908 /* Function vect_is_simple_use.
13910 Same as vect_is_simple_use but also determines the vector operand
13911 type of OPERAND and stores it to *VECTYPE. If the definition of
13912 OPERAND is vect_uninitialized_def, vect_constant_def or
13913 vect_external_def *VECTYPE will be set to NULL_TREE and the caller
13914 is responsible to compute the best suited vector type for the
13915 scalar operand. */
13917 bool
13921 {
13922 stmt_vec_info def_stmt_info;
13932 /* Now get a vector type if the def is internal, otherwise supply
13933 NULL_TREE and leave it up to the caller to figure out a proper
13934 type for the use stmt. */
13941 {
13947 }
13952 else
13956 }
13958 /* Function vect_is_simple_use.
13960 Same as vect_is_simple_use but determines the operand by operand
13961 position OPERAND from either STMT or SLP_NODE, filling in *OP
13962 and *SLP_DEF (when SLP_NODE is not NULL). */
13964 bool
13969 {
13971 {
13976 {
13979 }
13980 else
13981 {
13987 }
13988 }
13989 else
13990 {
13993 {
13996 {
13999 else
14001 }
14004 else
14006 }
14011 else
14014 }
14015 }
14017 /* If OP is not NULL and is external or constant update its vector
14018 type with VECTYPE. Returns true if successful or false if not,
14019 for example when conflicting vector types are present. */
14021 bool
14023 {
14028 /* For external defs refuse to produce VECTOR_BOOLEAN_TYPE_P, those
14029 should be handled by patters. Allow vect_constant_def for now. */
14035 }
14037 /* Function supportable_widening_operation
14039 Check whether an operation represented by the code CODE is a
14040 widening operation that is supported by the target platform in
14041 vector form (i.e., when operating on arguments of type VECTYPE_IN
14042 producing a result of type VECTYPE_OUT).
14044 Widening operations we currently support are NOP (CONVERT), FLOAT,
14045 FIX_TRUNC and WIDEN_MULT. This function checks if these operations
14046 are supported by the target platform either directly (via vector
14047 tree-codes), or via target builtins.
14049 Output:
14050 - CODE1 and CODE2 are codes of vector operations to be used when
14051 vectorizing the operation, if available.
14052 - MULTI_STEP_CVT determines the number of required intermediate steps in
14053 case of multi-step conversion (like char->short->int - in that case
14054 MULTI_STEP_CVT will be 1).
14055 - INTERM_TYPES contains the intermediate type required to perform the
14056 widening operation (short in the above example). */
14058 bool
14060 code_helper code,
14061 stmt_vec_info stmt_info,
14067 {
14070 machine_mode vec_mode;
14086 {
14088 /* Don't set c1 and c2 if code is not a tree_code. */
14092 /* The result of a vectorized widening operation usually requires
14093 two vectors (because the widened results do not fit into one vector).
14094 The generated vector results would normally be expected to be
14095 generated in the same order as in the original scalar computation,
14096 i.e. if 8 results are generated in each vector iteration, they are
14097 to be organized as follows:
14098 vect1: [res1,res2,res3,res4],
14099 vect2: [res5,res6,res7,res8].
14101 However, in the special case that the result of the widening
14102 operation is used in a reduction computation only, the order doesn't
14103 matter (because when vectorizing a reduction we change the order of
14104 the computation). Some targets can take advantage of this and
14105 generate more efficient code. For example, targets like Altivec,
14106 that support widen_mult using a sequence of {mult_even,mult_odd}
14107 generate the following vectors:
14108 vect1: [res1,res3,res5,res7],
14109 vect2: [res2,res4,res6,res8].
14111 When vectorizing outer-loops, we execute the inner-loop sequentially
14112 (each vectorized inner-loop iteration contributes to VF outer-loop
14113 iterations in parallel). We therefore don't allow to change the
14114 order of the computation in the inner-loop during outer-loop
14115 vectorization. */
14116 /* TODO: Another case in which order doesn't *really* matter is when we
14117 widen and then contract again, e.g. (short)((int)x * y >> 8).
14118 Normally, pack_trunc performs an even/odd permute, whereas the
14119 repack from an even/odd expansion would be an interleave, which
14120 would be significantly simpler for e.g. AVX2. */
14121 /* In any case, in order to avoid duplicating the code below, recurse
14122 on VEC_WIDEN_MULT_EVEN_EXPR. If it succeeds, all the return values
14123 are properly set up for the caller. If we fail, we'll continue with
14124 a VEC_WIDEN_MULT_LO/HI_EXPR check. */
14132 interm_types))
14133 {
14134 /* Elements in a vector with vect_used_by_reduction property cannot
14135 be reordered if the use chain with this property does not have the
14136 same operation. One such an example is s += a * b, where elements
14137 in a and b cannot be reordered. Here we check if the vector defined
14138 by STMT is only directly used in the reduction statement. */
14144 }
14160 /* Support the recursion induced just above. */
14170 CASE_CONVERT:
14187 }
14193 {
14194 /* The signedness is determined from output operand. */
14197 }
14203 {
14204 /* If the input and result modes are the same, a different optab
14205 is needed where we pass in the number of units in vectype. */
14208 }
14212 {
14213 /* If this is an internal fn then we must check whether the target
14214 supports either a low-high split or an even-odd split. */
14224 /* If we don't support low-high, then check for even-odd. */
14227 || !optab2
14229 {
14235 }
14236 }
14238 {
14240 {
14241 /* The signedness is determined from output operand. */
14244 }
14250 {
14251 /* If the input and result modes are the same, a different optab
14252 is needed where we pass in the number of units in vectype. */
14255 }
14256 else
14257 {
14260 }
14263 }
14275 {
14278 /* For scalar masks we may have different boolean
14279 vector types having the same QImode. Thus we
14280 add additional check for elements number. */
14284 }
14286 /* Check if it's a multi-step conversion that can be done using intermediate
14287 types. */
14295 /* We assume here that there will not be more than MAX_INTERM_CVT_STEPS
14296 intermediate steps in promotion sequence. We try
14297 MAX_INTERM_CVT_STEPS to get to NARROW_VECTYPE, and fail if we do
14298 not. */
14301 {
14304 intermediate_type
14307 {
14308 tree intermediate_element_type
14311 intermediate_type
14313 intermediate_mode);
14314 }
14315 else
14316 intermediate_type
14324 {
14325 /* If the input and result modes are the same, a different optab
14326 is needed where we pass in the number of units in vectype. */
14329 }
14330 else
14331 {
14334 }
14352 {
14358 }
14362 }
14366 }
14369 /* Function supportable_narrowing_operation
14371 Check whether an operation represented by the code CODE is a
14372 narrowing operation that is supported by the target platform in
14373 vector form (i.e., when operating on arguments of type VECTYPE_IN
14374 and producing a result of type VECTYPE_OUT).
14376 Narrowing operations we currently support are NOP (CONVERT), FIX_TRUNC
14377 and FLOAT. This function checks if these operations are supported by
14378 the target platform directly via vector tree-codes.
14380 Output:
14381 - CODE1 is the code of a vector operation to be used when
14382 vectorizing the operation, if available.
14383 - MULTI_STEP_CVT determines the number of required intermediate steps in
14384 case of multi-step conversion (like int->short->char - in that case
14385 MULTI_STEP_CVT will be 1).
14386 - INTERM_TYPES contains the intermediate type required to perform the
14387 narrowing operation (short in the above example). */
14389 bool
14394 {
14395 machine_mode vec_mode;
14412 {
14413 CASE_CONVERT:
14421 else
14427 /* The signedness is determined from output operand. */
14438 }
14450 {
14453 /* For scalar masks we may have different boolean
14454 vector types having the same QImode. Thus we
14455 add additional check for elements number. */
14459 }
14464 /* Check if it's a multi-step conversion that can be done using intermediate
14465 types. */
14470 else
14473 /* For multi-step FIX_TRUNC_EXPR prefer signed floating to integer
14474 conversion over unsigned, as unsigned FIX_TRUNC_EXPR is often more
14475 costly than signed. */
14477 {
14480 intermediate_type
14482 interm_optab
14488 {
14492 }
14493 }
14495 /* We assume here that there will not be more than MAX_INTERM_CVT_STEPS
14496 intermediate steps in promotion sequence. We try
14497 MAX_INTERM_CVT_STEPS to get to NARROW_VECTYPE, and fail if we do not. */
14500 {
14503 intermediate_type
14505 else
14506 intermediate_type
14514 else
14515 interm_optab
14517 optab_default);
14529 {
14535 }
14540 }
14544 }
14546 /* Generate and return a vector mask of MASK_TYPE such that
14547 mask[I] is true iff J + START_INDEX < END_INDEX for all J <= I.
14548 Add the statements to SEQ. */
14550 tree
14553 {
14557 OPTIMIZE_FOR_SPEED));
14561 tree tmp;
14564 else
14569 }
14571 /* Generate a vector mask of type MASK_TYPE for which index I is false iff
14572 J + START_INDEX < END_INDEX for all J <= I. Add the statements to SEQ. */
14574 tree
14576 tree end_index)
14577 {
14580 }
14582 /* Try to compute the vector types required to vectorize STMT_INFO,
14583 returning true on success and false if vectorization isn't possible.
14584 If GROUP_SIZE is nonzero and we're performing BB vectorization,
14585 take sure that the number of elements in the vectors is no bigger
14586 than GROUP_SIZE.
14588 On success:
14590 - Set *STMT_VECTYPE_OUT to:
14591 - NULL_TREE if the statement doesn't need to be vectorized;
14592 - the equivalent of STMT_VINFO_VECTYPE otherwise.
14594 - Set *NUNITS_VECTYPE_OUT to the vector type that contains the maximum
14595 number of units needed to vectorize STMT_INFO, or NULL_TREE if the
14596 statement does not help to determine the overall number of units. */
14598 opt_result
14603 {
14606 /* For BB vectorization, we should always have a group size once we've
14607 constructed the SLP tree; the only valid uses of zero GROUP_SIZEs
14608 are tentative requests during things like early data reference
14609 analysis and pattern recognition. */
14612 else
14619 /* Allow vector conditionals through here. */
14621 /* MASK_STORE has no lhs, but is ok. */
14623 {
14625 {
14626 /* Ignore calls with no lhs. These must be calls to
14627 #pragma omp simd functions, and what vectorization factor
14628 it really needs can't be determined until
14629 vectorizable_simd_clone_call. */
14634 }
14638 }
14640 tree vectype;
14643 {
14648 }
14650 {
14659 }
14660 else
14661 {
14662 /* If we got here with a gcond it means that the target had no available vector
14663 mode for the scalar type. We can't vectorize so abort. */
14666 "not vectorized:"
14668 scalar_type);
14674 else
14678 {
14681 "get vectype for scalar type (group size %d):"
14683 else
14686 }
14690 "not vectorized:"
14692 scalar_type);
14696 }
14701 stmt);
14705 /* Don't try to compute scalar types if the stmt produces a boolean
14706 vector; use the existing vector type instead. */
14709 {
14710 /* The number of units is set according to the smallest scalar
14711 type (or the largest vector size, but we only support one
14712 vector size per vectorization). */
14716 {
14720 scalar_type);
14722 group_size);
14726 scalar_type);
14729 nunits_vectype);
14730 }
14731 }
14736 "Not vectorized: Incompatible number "
14741 {
14745 }
14749 }
14751 /* Generate and return statement sequence that sets vector length LEN that is:
14753 min_of_start_and_end = min (START_INDEX, END_INDEX);
14754 left_len = END_INDEX - min_of_start_and_end;
14755 rhs = min (left_len, LEN_LIMIT);
14756 LEN = rhs;
14758 Note: the cost of the code generated by this function is modeled
14759 by vect_estimate_min_profitable_iters, so changes here may need
14760 corresponding changes there. */
14762 gimple_seq
14764 {
14776 }