1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
61 #include "tree-chkp.h"
66 /* If this is nonzero, we do not bother generating VOLATILE
67 around volatile memory references, and we are willing to
68 output indirect addresses. If cse is to follow, we reject
69 indirect addresses so a useful potential cse is generated;
70 if it is used only once, instruction combination will produce
71 the same indirect address eventually. */
74 static bool block_move_libcall_safe_for_call_parm (void);
75 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
76 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
);
78 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
79 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
80 static rtx_insn
*compress_float_constant (rtx
, rtx
);
81 static rtx
get_subtarget (rtx
);
82 static void store_constructor_field (rtx
, unsigned HOST_WIDE_INT
,
83 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
84 unsigned HOST_WIDE_INT
, machine_mode
,
85 tree
, int, alias_set_type
, bool);
86 static void store_constructor (tree
, rtx
, int, HOST_WIDE_INT
, bool);
87 static rtx
store_field (rtx
, HOST_WIDE_INT
, HOST_WIDE_INT
,
88 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
89 machine_mode
, tree
, alias_set_type
, bool, bool);
91 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
93 static int is_aligning_offset (const_tree
, const_tree
);
94 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
95 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
97 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
99 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
100 profile_probability
);
101 static rtx
const_vector_from_tree (tree
);
102 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
103 static tree
tree_expr_size (const_tree
);
104 static HOST_WIDE_INT
int_expr_size (tree
);
105 static void convert_mode_scalar (rtx
, rtx
, int);
108 /* This is run to set up which modes can be used
109 directly in memory and to initialize the block move optab. It is run
110 at the beginning of compilation and when the target is reinitialized. */
113 init_expr_target (void)
120 /* Try indexing by frame ptr and try by stack ptr.
121 It is known that on the Convex the stack ptr isn't a valid index.
122 With luck, one or the other is valid on any machine. */
123 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
124 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
126 /* A scratch register we can modify in-place below to avoid
127 useless RTL allocations. */
128 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
130 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
131 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
132 PATTERN (insn
) = pat
;
134 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
135 mode
= (machine_mode
) ((int) mode
+ 1))
139 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
140 PUT_MODE (mem
, mode
);
141 PUT_MODE (mem1
, mode
);
143 /* See if there is some register that can be used in this mode and
144 directly loaded or stored from memory. */
146 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
147 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
148 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
151 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
154 set_mode_and_regno (reg
, mode
, regno
);
157 SET_DEST (pat
) = reg
;
158 if (recog (pat
, insn
, &num_clobbers
) >= 0)
159 direct_load
[(int) mode
] = 1;
161 SET_SRC (pat
) = mem1
;
162 SET_DEST (pat
) = reg
;
163 if (recog (pat
, insn
, &num_clobbers
) >= 0)
164 direct_load
[(int) mode
] = 1;
167 SET_DEST (pat
) = mem
;
168 if (recog (pat
, insn
, &num_clobbers
) >= 0)
169 direct_store
[(int) mode
] = 1;
172 SET_DEST (pat
) = mem1
;
173 if (recog (pat
, insn
, &num_clobbers
) >= 0)
174 direct_store
[(int) mode
] = 1;
178 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
180 opt_scalar_float_mode mode_iter
;
181 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
183 scalar_float_mode mode
= mode_iter
.require ();
184 scalar_float_mode srcmode
;
185 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
189 ic
= can_extend_p (mode
, srcmode
, 0);
190 if (ic
== CODE_FOR_nothing
)
193 PUT_MODE (mem
, srcmode
);
195 if (insn_operand_matches (ic
, 1, mem
))
196 float_extend_from_mem
[mode
][srcmode
] = true;
201 /* This is run at the start of compiling a function. */
206 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
209 /* Copy data from FROM to TO, where the machine modes are not the same.
210 Both modes may be integer, or both may be floating, or both may be
212 UNSIGNEDP should be nonzero if FROM is an unsigned type.
213 This causes zero-extension instead of sign-extension. */
216 convert_move (rtx to
, rtx from
, int unsignedp
)
218 machine_mode to_mode
= GET_MODE (to
);
219 machine_mode from_mode
= GET_MODE (from
);
221 gcc_assert (to_mode
!= BLKmode
);
222 gcc_assert (from_mode
!= BLKmode
);
224 /* If the source and destination are already the same, then there's
229 /* If FROM is a SUBREG that indicates that we have already done at least
230 the required extension, strip it. We don't handle such SUBREGs as
233 scalar_int_mode to_int_mode
;
234 if (GET_CODE (from
) == SUBREG
235 && SUBREG_PROMOTED_VAR_P (from
)
236 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
237 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
238 >= GET_MODE_PRECISION (to_int_mode
))
239 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
240 from
= gen_lowpart (to_int_mode
, from
), from_mode
= to_int_mode
;
242 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
244 if (to_mode
== from_mode
245 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
247 emit_move_insn (to
, from
);
251 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
253 gcc_assert (GET_MODE_BITSIZE (from_mode
) == GET_MODE_BITSIZE (to_mode
));
255 if (VECTOR_MODE_P (to_mode
))
256 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
258 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
260 emit_move_insn (to
, from
);
264 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
266 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
267 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
271 convert_mode_scalar (to
, from
, unsignedp
);
274 /* Like convert_move, but deals only with scalar modes. */
277 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
281 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
282 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
283 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
287 gcc_assert (to_real
== from_real
);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
291 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
299 gcc_assert ((GET_MODE_PRECISION (from_mode
)
300 != GET_MODE_PRECISION (to_mode
))
301 || (DECIMAL_FLOAT_MODE_P (from_mode
)
302 != DECIMAL_FLOAT_MODE_P (to_mode
)));
304 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
305 /* Conversion between decimal float and binary float, same size. */
306 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
307 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
312 /* Try converting directly if the insn is supported. */
314 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
315 if (code
!= CODE_FOR_nothing
)
317 emit_unop_insn (code
, to
, from
,
318 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
322 /* Otherwise use a libcall. */
323 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall
);
329 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
331 insns
= get_insns ();
333 emit_libcall_block (insns
, to
, value
,
334 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
336 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
345 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
352 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
355 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
368 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
369 != CODE_FOR_nothing
);
371 if (full_mode
!= from_mode
)
372 from
= convert_to_mode (full_mode
, from
, unsignedp
);
373 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
377 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
382 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
383 enum insn_code icode
;
385 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
386 gcc_assert (icode
!= CODE_FOR_nothing
);
388 if (to_mode
== full_mode
)
390 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
394 new_from
= gen_reg_rtx (full_mode
);
395 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
397 /* else proceed to integer conversions below. */
398 from_mode
= full_mode
;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
411 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
412 expand_fixed_convert (to
, from
, 0, 0);
414 expand_fixed_convert (to
, from
, 0, 1);
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
422 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
429 scalar_mode lowpart_mode
;
430 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
432 /* Try converting directly if the insn is supported. */
433 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
441 from
= force_reg (from_mode
, from
);
442 emit_unop_insn (code
, to
, from
, equiv_code
);
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
447 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
448 != CODE_FOR_nothing
))
450 rtx word_to
= gen_reg_rtx (word_mode
);
453 if (reg_overlap_mentioned_p (to
, from
))
454 from
= force_reg (from_mode
, from
);
457 convert_move (word_to
, from
, unsignedp
);
458 emit_unop_insn (code
, to
, word_to
, equiv_code
);
462 /* No special multiword conversion insn; do it by hand. */
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
472 from
= force_reg (from_mode
, from
);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
476 lowpart_mode
= word_mode
;
478 lowpart_mode
= from_mode
;
480 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
482 lowpart
= gen_lowpart (lowpart_mode
, to
);
483 emit_move_insn (lowpart
, lowfrom
);
485 /* Compute the value to put in each remaining word. */
487 fill_value
= const0_rtx
;
489 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
490 LT
, lowfrom
, const0_rtx
,
491 lowpart_mode
, 0, -1);
493 /* Fill the remaining words. */
494 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
496 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
497 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
499 gcc_assert (subword
);
501 if (fill_value
!= subword
)
502 emit_move_insn (subword
, fill_value
);
505 insns
= get_insns ();
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
517 && ! MEM_VOLATILE_P (from
)
518 && direct_load
[(int) to_mode
]
519 && ! mode_dependent_address_p (XEXP (from
, 0),
520 MEM_ADDR_SPACE (from
)))
522 || GET_CODE (from
) == SUBREG
))
523 from
= force_reg (from_mode
, from
);
524 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
536 && ! MEM_VOLATILE_P (from
)
537 && direct_load
[(int) to_mode
]
538 && ! mode_dependent_address_p (XEXP (from
, 0),
539 MEM_ADDR_SPACE (from
)))
541 || GET_CODE (from
) == SUBREG
))
542 from
= force_reg (from_mode
, from
);
543 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
544 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
545 from
= copy_to_reg (from
);
546 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
553 /* Convert directly if that works. */
554 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
557 emit_unop_insn (code
, to
, from
, equiv_code
);
562 scalar_mode intermediate
;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter
;
568 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
570 scalar_mode intermediate
= intermediate_iter
.require ();
571 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
573 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
576 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
577 != CODE_FOR_nothing
))
579 convert_move (to
, convert_to_mode (intermediate
, from
,
580 unsignedp
), unsignedp
);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount
= (GET_MODE_PRECISION (to_mode
)
588 - GET_MODE_PRECISION (from_mode
));
589 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
590 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
592 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
595 emit_move_insn (to
, tmp
);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab
, to_mode
,
602 from_mode
) != CODE_FOR_nothing
)
604 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
618 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
619 emit_move_insn (to
, temp
);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
637 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
654 scalar_int_mode int_mode
;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x
) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x
)
661 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
663 >= GET_MODE_PRECISION (int_mode
))
664 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
665 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
667 if (GET_MODE (x
) != VOIDmode
)
668 oldmode
= GET_MODE (x
);
673 if (CONST_SCALAR_INT_P (x
)
674 && is_int_mode (mode
, &int_mode
))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
680 oldmode
= MAX_MODE_INT
;
681 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
682 GET_MODE_PRECISION (int_mode
),
683 unsignedp
? UNSIGNED
: SIGNED
);
684 return immed_wide_int_const (w
, int_mode
);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode
;
691 if (is_int_mode (mode
, &int_mode
)
692 && is_int_mode (oldmode
, &int_oldmode
)
693 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
694 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
696 && (!HARD_REGISTER_P (x
)
697 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
698 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
699 return gen_lowpart (int_mode
, x
);
701 /* Converting from integer constant into mode is always equivalent to an
703 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
705 gcc_assert (GET_MODE_BITSIZE (mode
) == GET_MODE_BITSIZE (oldmode
));
706 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
709 temp
= gen_reg_rtx (mode
);
710 convert_move (temp
, x
, unsignedp
);
714 /* Return the largest alignment we can use for doing a move (or store)
715 of MAX_PIECES. ALIGN is the largest alignment we could use. */
718 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
720 scalar_int_mode tmode
721 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
723 if (align
>= GET_MODE_ALIGNMENT (tmode
))
724 align
= GET_MODE_ALIGNMENT (tmode
);
727 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
728 opt_scalar_int_mode mode_iter
;
729 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
731 tmode
= mode_iter
.require ();
732 if (GET_MODE_SIZE (tmode
) > max_pieces
733 || targetm
.slow_unaligned_access (tmode
, align
))
738 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
744 /* Return the widest integer mode that is narrower than SIZE bytes. */
746 static scalar_int_mode
747 widest_int_mode_for_size (unsigned int size
)
749 scalar_int_mode result
= NARROWEST_INT_MODE
;
751 gcc_checking_assert (size
> 1);
753 opt_scalar_int_mode tmode
;
754 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
755 if (GET_MODE_SIZE (tmode
.require ()) < size
)
756 result
= tmode
.require ();
761 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
762 and should be performed piecewise. */
765 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
766 enum by_pieces_operation op
)
768 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
769 optimize_insn_for_speed_p ());
772 /* Determine whether the LEN bytes can be moved by using several move
773 instructions. Return nonzero if a call to move_by_pieces should
777 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
779 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
782 /* Return number of insns required to perform operation OP by pieces
783 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
785 unsigned HOST_WIDE_INT
786 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
787 unsigned int max_size
, by_pieces_operation op
)
789 unsigned HOST_WIDE_INT n_insns
= 0;
791 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
793 while (max_size
> 1 && l
> 0)
795 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
796 enum insn_code icode
;
798 unsigned int modesize
= GET_MODE_SIZE (mode
);
800 icode
= optab_handler (mov_optab
, mode
);
801 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
803 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
811 case COMPARE_BY_PIECES
:
812 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
813 int batch_ops
= 4 * batch
- 1;
814 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
815 n_insns
+= full
* batch_ops
;
816 if (n_pieces
% batch
!= 0)
829 /* Used when performing piecewise block operations, holds information
830 about one of the memory objects involved. The member functions
831 can be used to generate code for loading from the object and
832 updating the address when iterating. */
836 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
839 /* The address of the object. Can differ from that seen in the
840 MEM rtx if we copied the address to a register. */
842 /* Nonzero if the address on the object has an autoincrement already,
843 signifies whether that was an increment or decrement. */
844 signed char m_addr_inc
;
845 /* Nonzero if we intend to use autoinc without the address already
846 having autoinc form. We will insert add insns around each memory
847 reference, expecting later passes to form autoinc addressing modes.
848 The only supported options are predecrement and postincrement. */
849 signed char m_explicit_inc
;
850 /* True if we have either of the two possible cases of using
853 /* True if this is an address to be used for load operations rather
857 /* Optionally, a function to obtain constants for any given offset into
858 the objects, and data associated with it. */
859 by_pieces_constfn m_constfn
;
862 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
863 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
864 void increment_address (HOST_WIDE_INT
);
865 void maybe_predec (HOST_WIDE_INT
);
866 void maybe_postinc (HOST_WIDE_INT
);
867 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
874 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
875 true if the operation to be performed on this object is a load
876 rather than a store. For stores, OBJ can be NULL, in which case we
877 assume the operation is a stack push. For loads, the optional
878 CONSTFN and its associated CFNDATA can be used in place of the
881 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
883 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
889 rtx addr
= XEXP (obj
, 0);
890 rtx_code code
= GET_CODE (addr
);
892 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
893 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
896 m_addr_inc
= dec
? -1 : 1;
898 /* While we have always looked for these codes here, the code
899 implementing the memory operation has never handled them.
900 Support could be added later if necessary or beneficial. */
901 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
909 if (STACK_GROWS_DOWNWARD
)
915 gcc_assert (constfn
!= NULL
);
919 gcc_assert (is_load
);
922 /* Decide whether to use autoinc for an address involved in a memory op.
923 MODE is the mode of the accesses, REVERSE is true if we've decided to
924 perform the operation starting from the end, and LEN is the length of
925 the operation. Don't override an earlier decision to set m_auto. */
928 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
931 if (m_auto
|| m_obj
== NULL_RTX
)
934 bool use_predec
= (m_is_load
935 ? USE_LOAD_PRE_DECREMENT (mode
)
936 : USE_STORE_PRE_DECREMENT (mode
));
937 bool use_postinc
= (m_is_load
938 ? USE_LOAD_POST_INCREMENT (mode
)
939 : USE_STORE_POST_INCREMENT (mode
));
940 machine_mode addr_mode
= get_address_mode (m_obj
);
942 if (use_predec
&& reverse
)
944 m_addr
= copy_to_mode_reg (addr_mode
,
945 plus_constant (addr_mode
,
950 else if (use_postinc
&& !reverse
)
952 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
956 else if (CONSTANT_P (m_addr
))
957 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
960 /* Adjust the address to refer to the data at OFFSET in MODE. If we
961 are using autoincrement for this address, we don't add the offset,
962 but we still modify the MEM's properties. */
965 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
968 return m_constfn (m_cfndata
, offset
, mode
);
969 if (m_obj
== NULL_RTX
)
972 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
974 return adjust_address (m_obj
, mode
, offset
);
977 /* Emit an add instruction to increment the address by SIZE. */
980 pieces_addr::increment_address (HOST_WIDE_INT size
)
982 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
983 emit_insn (gen_add2_insn (m_addr
, amount
));
986 /* If we are supposed to decrement the address after each access, emit code
987 to do so now. Increment by SIZE (which has should have the correct sign
991 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
993 if (m_explicit_inc
>= 0)
995 gcc_assert (HAVE_PRE_DECREMENT
);
996 increment_address (size
);
999 /* If we are supposed to decrement the address after each access, emit code
1000 to do so now. Increment by SIZE. */
1003 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1005 if (m_explicit_inc
<= 0)
1007 gcc_assert (HAVE_POST_INCREMENT
);
1008 increment_address (size
);
1011 /* This structure is used by do_op_by_pieces to describe the operation
1014 class op_by_pieces_d
1017 pieces_addr m_to
, m_from
;
1018 unsigned HOST_WIDE_INT m_len
;
1019 HOST_WIDE_INT m_offset
;
1020 unsigned int m_align
;
1021 unsigned int m_max_size
;
1024 /* Virtual functions, overriden by derived classes for the specific
1026 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1027 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1028 virtual void finish_mode (machine_mode
)
1033 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1034 unsigned HOST_WIDE_INT
, unsigned int);
1038 /* The constructor for an op_by_pieces_d structure. We require two
1039 objects named TO and FROM, which are identified as loads or stores
1040 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1041 and its associated FROM_CFN_DATA can be used to replace loads with
1042 constant values. LEN describes the length of the operation. */
1044 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1045 rtx from
, bool from_load
,
1046 by_pieces_constfn from_cfn
,
1047 void *from_cfn_data
,
1048 unsigned HOST_WIDE_INT len
,
1050 : m_to (to
, to_load
, NULL
, NULL
),
1051 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1052 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1054 int toi
= m_to
.get_addr_inc ();
1055 int fromi
= m_from
.get_addr_inc ();
1056 if (toi
>= 0 && fromi
>= 0)
1058 else if (toi
<= 0 && fromi
<= 0)
1063 m_offset
= m_reverse
? len
: 0;
1064 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1065 from
? MEM_ALIGN (from
) : align
);
1067 /* If copying requires more than two move insns,
1068 copy addresses to registers (to make displacements shorter)
1069 and use post-increment if available. */
1070 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1072 /* Find the mode of the largest comparison. */
1073 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1075 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1076 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1079 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1083 /* This function contains the main loop used for expanding a block
1084 operation. First move what we can in the largest integer mode,
1085 then go to successively smaller modes. For every access, call
1086 GENFUN with the two operands and the EXTRA_DATA. */
1089 op_by_pieces_d::run ()
1091 while (m_max_size
> 1 && m_len
> 0)
1093 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1095 if (prepare_mode (mode
, m_align
))
1097 unsigned int size
= GET_MODE_SIZE (mode
);
1098 rtx to1
= NULL_RTX
, from1
;
1100 while (m_len
>= size
)
1105 to1
= m_to
.adjust (mode
, m_offset
);
1106 from1
= m_from
.adjust (mode
, m_offset
);
1108 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1109 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 generate (to1
, from1
, mode
);
1113 m_to
.maybe_postinc (size
);
1114 m_from
.maybe_postinc (size
);
1125 m_max_size
= GET_MODE_SIZE (mode
);
1128 /* The code above should have handled everything. */
1129 gcc_assert (!m_len
);
1132 /* Derived class from op_by_pieces_d, providing support for block move
1135 class move_by_pieces_d
: public op_by_pieces_d
1137 insn_gen_fn m_gen_fun
;
1138 void generate (rtx
, rtx
, machine_mode
);
1139 bool prepare_mode (machine_mode
, unsigned int);
1142 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1144 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1147 rtx
finish_endp (int);
1150 /* Return true if MODE can be used for a set of copies, given an
1151 alignment ALIGN. Prepare whatever data is necessary for later
1152 calls to generate. */
1155 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1157 insn_code icode
= optab_handler (mov_optab
, mode
);
1158 m_gen_fun
= GEN_FCN (icode
);
1159 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1162 /* A callback used when iterating for a compare_by_pieces_operation.
1163 OP0 and OP1 are the values that have been loaded and should be
1164 compared in MODE. If OP0 is NULL, this means we should generate a
1165 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1166 gen function that should be used to generate the mode. */
1169 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1170 machine_mode mode ATTRIBUTE_UNUSED
)
1172 #ifdef PUSH_ROUNDING
1173 if (op0
== NULL_RTX
)
1175 emit_single_push_insn (mode
, op1
, NULL
);
1179 emit_insn (m_gen_fun (op0
, op1
));
1182 /* Perform the final adjustment at the end of a string to obtain the
1183 correct return value for the block operation. If ENDP is 1 return
1184 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1185 end minus one byte ala stpcpy. */
1188 move_by_pieces_d::finish_endp (int endp
)
1190 gcc_assert (!m_reverse
);
1193 m_to
.maybe_postinc (-1);
1196 return m_to
.adjust (QImode
, m_offset
);
1199 /* Generate several move instructions to copy LEN bytes from block FROM to
1200 block TO. (These are MEM rtx's with BLKmode).
1202 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1203 used to push FROM to the stack.
1205 ALIGN is maximum stack alignment we can assume.
1207 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1208 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1212 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1213 unsigned int align
, int endp
)
1215 #ifndef PUSH_ROUNDING
1220 move_by_pieces_d
data (to
, from
, len
, align
);
1225 return data
.finish_endp (endp
);
1230 /* Derived class from op_by_pieces_d, providing support for block move
1233 class store_by_pieces_d
: public op_by_pieces_d
1235 insn_gen_fn m_gen_fun
;
1236 void generate (rtx
, rtx
, machine_mode
);
1237 bool prepare_mode (machine_mode
, unsigned int);
1240 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1241 unsigned HOST_WIDE_INT len
, unsigned int align
)
1242 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1245 rtx
finish_endp (int);
1248 /* Return true if MODE can be used for a set of stores, given an
1249 alignment ALIGN. Prepare whatever data is necessary for later
1250 calls to generate. */
1253 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1255 insn_code icode
= optab_handler (mov_optab
, mode
);
1256 m_gen_fun
= GEN_FCN (icode
);
1257 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1260 /* A callback used when iterating for a store_by_pieces_operation.
1261 OP0 and OP1 are the values that have been loaded and should be
1262 compared in MODE. If OP0 is NULL, this means we should generate a
1263 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1264 gen function that should be used to generate the mode. */
1267 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1269 emit_insn (m_gen_fun (op0
, op1
));
1272 /* Perform the final adjustment at the end of a string to obtain the
1273 correct return value for the block operation. If ENDP is 1 return
1274 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1275 end minus one byte ala stpcpy. */
1278 store_by_pieces_d::finish_endp (int endp
)
1280 gcc_assert (!m_reverse
);
1283 m_to
.maybe_postinc (-1);
1286 return m_to
.adjust (QImode
, m_offset
);
1289 /* Determine whether the LEN bytes generated by CONSTFUN can be
1290 stored to memory using several move instructions. CONSTFUNDATA is
1291 a pointer which will be passed as argument in every CONSTFUN call.
1292 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1293 a memset operation and false if it's a copy of a constant string.
1294 Return nonzero if a call to store_by_pieces should succeed. */
1297 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1298 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1299 void *constfundata
, unsigned int align
, bool memsetp
)
1301 unsigned HOST_WIDE_INT l
;
1302 unsigned int max_size
;
1303 HOST_WIDE_INT offset
= 0;
1304 enum insn_code icode
;
1306 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1307 rtx cst ATTRIBUTE_UNUSED
;
1312 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1316 optimize_insn_for_speed_p ()))
1319 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1321 /* We would first store what we can in the largest integer mode, then go to
1322 successively smaller modes. */
1325 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1329 max_size
= STORE_MAX_PIECES
+ 1;
1330 while (max_size
> 1 && l
> 0)
1332 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1334 icode
= optab_handler (mov_optab
, mode
);
1335 if (icode
!= CODE_FOR_nothing
1336 && align
>= GET_MODE_ALIGNMENT (mode
))
1338 unsigned int size
= GET_MODE_SIZE (mode
);
1345 cst
= (*constfun
) (constfundata
, offset
, mode
);
1346 if (!targetm
.legitimate_constant_p (mode
, cst
))
1356 max_size
= GET_MODE_SIZE (mode
);
1359 /* The code above should have handled everything. */
1366 /* Generate several move instructions to store LEN bytes generated by
1367 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1368 pointer which will be passed as argument in every CONSTFUN call.
1369 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1370 a memset operation and false if it's a copy of a constant string.
1371 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1372 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1376 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1377 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1378 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
1382 gcc_assert (endp
!= 2);
1386 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1388 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1389 optimize_insn_for_speed_p ()));
1391 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1395 return data
.finish_endp (endp
);
1400 /* Callback routine for clear_by_pieces.
1401 Return const0_rtx unconditionally. */
1404 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1409 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1410 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1413 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1418 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1422 /* Context used by compare_by_pieces_genfn. It stores the fail label
1423 to jump to in case of miscomparison, and for branch ratios greater than 1,
1424 it stores an accumulator and the current and maximum counts before
1425 emitting another branch. */
1427 class compare_by_pieces_d
: public op_by_pieces_d
1429 rtx_code_label
*m_fail_label
;
1431 int m_count
, m_batch
;
1433 void generate (rtx
, rtx
, machine_mode
);
1434 bool prepare_mode (machine_mode
, unsigned int);
1435 void finish_mode (machine_mode
);
1437 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1438 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1439 rtx_code_label
*fail_label
)
1440 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1442 m_fail_label
= fail_label
;
1446 /* A callback used when iterating for a compare_by_pieces_operation.
1447 OP0 and OP1 are the values that have been loaded and should be
1448 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1449 context structure. */
1452 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1456 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1457 true, OPTAB_LIB_WIDEN
);
1459 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1460 true, OPTAB_LIB_WIDEN
);
1461 m_accumulator
= temp
;
1463 if (++m_count
< m_batch
)
1467 op0
= m_accumulator
;
1469 m_accumulator
= NULL_RTX
;
1471 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1472 m_fail_label
, profile_probability::uninitialized ());
1475 /* Return true if MODE can be used for a set of moves and comparisons,
1476 given an alignment ALIGN. Prepare whatever data is necessary for
1477 later calls to generate. */
1480 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1482 insn_code icode
= optab_handler (mov_optab
, mode
);
1483 if (icode
== CODE_FOR_nothing
1484 || align
< GET_MODE_ALIGNMENT (mode
)
1485 || !can_compare_p (EQ
, mode
, ccp_jump
))
1487 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1490 m_accumulator
= NULL_RTX
;
1495 /* Called after expanding a series of comparisons in MODE. If we have
1496 accumulated results for which we haven't emitted a branch yet, do
1500 compare_by_pieces_d::finish_mode (machine_mode mode
)
1502 if (m_accumulator
!= NULL_RTX
)
1503 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1504 NULL_RTX
, NULL
, m_fail_label
,
1505 profile_probability::uninitialized ());
1508 /* Generate several move instructions to compare LEN bytes from blocks
1509 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1511 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1512 used to push FROM to the stack.
1514 ALIGN is maximum stack alignment we can assume.
1516 Optionally, the caller can pass a constfn and associated data in A1_CFN
1517 and A1_CFN_DATA. describing that the second operand being compared is a
1518 known constant and how to obtain its data. */
1521 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1522 rtx target
, unsigned int align
,
1523 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1525 rtx_code_label
*fail_label
= gen_label_rtx ();
1526 rtx_code_label
*end_label
= gen_label_rtx ();
1528 if (target
== NULL_RTX
1529 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1530 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1532 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1537 emit_move_insn (target
, const0_rtx
);
1538 emit_jump (end_label
);
1540 emit_label (fail_label
);
1541 emit_move_insn (target
, const1_rtx
);
1542 emit_label (end_label
);
1547 /* Emit code to move a block Y to a block X. This may be done with
1548 string-move instructions, with multiple scalar move instructions,
1549 or with a library call.
1551 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1552 SIZE is an rtx that says how long they are.
1553 ALIGN is the maximum alignment we can assume they have.
1554 METHOD describes what kind of copy this is, and what mechanisms may be used.
1555 MIN_SIZE is the minimal size of block to move
1556 MAX_SIZE is the maximal size of block to move, if it can not be represented
1557 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1559 Return the address of the new block, if memcpy is called and returns it,
1563 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1564 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1565 unsigned HOST_WIDE_INT min_size
,
1566 unsigned HOST_WIDE_INT max_size
,
1567 unsigned HOST_WIDE_INT probable_max_size
)
1574 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1579 case BLOCK_OP_NORMAL
:
1580 case BLOCK_OP_TAILCALL
:
1581 may_use_call
= true;
1584 case BLOCK_OP_CALL_PARM
:
1585 may_use_call
= block_move_libcall_safe_for_call_parm ();
1587 /* Make inhibit_defer_pop nonzero around the library call
1588 to force it to pop the arguments right away. */
1592 case BLOCK_OP_NO_LIBCALL
:
1593 may_use_call
= false;
1600 gcc_assert (MEM_P (x
) && MEM_P (y
));
1601 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1602 gcc_assert (align
>= BITS_PER_UNIT
);
1604 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1605 block copy is more efficient for other large modes, e.g. DCmode. */
1606 x
= adjust_address (x
, BLKmode
, 0);
1607 y
= adjust_address (y
, BLKmode
, 0);
1609 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1610 can be incorrect is coming from __builtin_memcpy. */
1611 if (CONST_INT_P (size
))
1613 x
= shallow_copy_rtx (x
);
1614 y
= shallow_copy_rtx (y
);
1615 set_mem_size (x
, INTVAL (size
));
1616 set_mem_size (y
, INTVAL (size
));
1619 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1620 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1621 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1622 expected_align
, expected_size
,
1623 min_size
, max_size
, probable_max_size
))
1625 else if (may_use_call
1626 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1627 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1629 /* Since x and y are passed to a libcall, mark the corresponding
1630 tree EXPR as addressable. */
1631 tree y_expr
= MEM_EXPR (y
);
1632 tree x_expr
= MEM_EXPR (x
);
1634 mark_addressable (y_expr
);
1636 mark_addressable (x_expr
);
1637 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1638 method
== BLOCK_OP_TAILCALL
);
1642 emit_block_move_via_loop (x
, y
, size
, align
);
1644 if (method
== BLOCK_OP_CALL_PARM
)
1651 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1653 unsigned HOST_WIDE_INT max
, min
= 0;
1654 if (GET_CODE (size
) == CONST_INT
)
1655 min
= max
= UINTVAL (size
);
1657 max
= GET_MODE_MASK (GET_MODE (size
));
1658 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1662 /* A subroutine of emit_block_move. Returns true if calling the
1663 block move libcall will not clobber any parameters which may have
1664 already been placed on the stack. */
1667 block_move_libcall_safe_for_call_parm (void)
1669 #if defined (REG_PARM_STACK_SPACE)
1673 /* If arguments are pushed on the stack, then they're safe. */
1677 /* If registers go on the stack anyway, any argument is sure to clobber
1678 an outgoing argument. */
1679 #if defined (REG_PARM_STACK_SPACE)
1680 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1681 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1682 depend on its argument. */
1684 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1685 && REG_PARM_STACK_SPACE (fn
) != 0)
1689 /* If any argument goes in memory, then it might clobber an outgoing
1692 CUMULATIVE_ARGS args_so_far_v
;
1693 cumulative_args_t args_so_far
;
1696 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1697 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1698 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1700 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1701 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1703 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1704 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1706 if (!tmp
|| !REG_P (tmp
))
1708 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1710 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1717 /* A subroutine of emit_block_move. Expand a movmem pattern;
1718 return true if successful. */
1721 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1722 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1723 unsigned HOST_WIDE_INT min_size
,
1724 unsigned HOST_WIDE_INT max_size
,
1725 unsigned HOST_WIDE_INT probable_max_size
)
1727 int save_volatile_ok
= volatile_ok
;
1729 if (expected_align
< align
)
1730 expected_align
= align
;
1731 if (expected_size
!= -1)
1733 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1734 expected_size
= probable_max_size
;
1735 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1736 expected_size
= min_size
;
1739 /* Since this is a move insn, we don't care about volatility. */
1742 /* Try the most limited insn first, because there's no point
1743 including more than one in the machine description unless
1744 the more limited one has some advantage. */
1746 opt_scalar_int_mode mode_iter
;
1747 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1749 scalar_int_mode mode
= mode_iter
.require ();
1750 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1752 if (code
!= CODE_FOR_nothing
1753 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1754 here because if SIZE is less than the mode mask, as it is
1755 returned by the macro, it will definitely be less than the
1756 actual mode mask. Since SIZE is within the Pmode address
1757 space, we limit MODE to Pmode. */
1758 && ((CONST_INT_P (size
)
1759 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1760 <= (GET_MODE_MASK (mode
) >> 1)))
1761 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1762 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1764 struct expand_operand ops
[9];
1767 /* ??? When called via emit_block_move_for_call, it'd be
1768 nice if there were some way to inform the backend, so
1769 that it doesn't fail the expansion because it thinks
1770 emitting the libcall would be more efficient. */
1771 nops
= insn_data
[(int) code
].n_generator_args
;
1772 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1774 create_fixed_operand (&ops
[0], x
);
1775 create_fixed_operand (&ops
[1], y
);
1776 /* The check above guarantees that this size conversion is valid. */
1777 create_convert_operand_to (&ops
[2], size
, mode
, true);
1778 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1781 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1782 create_integer_operand (&ops
[5], expected_size
);
1786 create_integer_operand (&ops
[6], min_size
);
1787 /* If we can not represent the maximal size,
1788 make parameter NULL. */
1789 if ((HOST_WIDE_INT
) max_size
!= -1)
1790 create_integer_operand (&ops
[7], max_size
);
1792 create_fixed_operand (&ops
[7], NULL
);
1796 /* If we can not represent the maximal size,
1797 make parameter NULL. */
1798 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1799 create_integer_operand (&ops
[8], probable_max_size
);
1801 create_fixed_operand (&ops
[8], NULL
);
1803 if (maybe_expand_insn (code
, nops
, ops
))
1805 volatile_ok
= save_volatile_ok
;
1811 volatile_ok
= save_volatile_ok
;
1815 /* A subroutine of emit_block_move. Copy the data via an explicit
1816 loop. This is used only when libcalls are forbidden. */
1817 /* ??? It'd be nice to copy in hunks larger than QImode. */
1820 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1821 unsigned int align ATTRIBUTE_UNUSED
)
1823 rtx_code_label
*cmp_label
, *top_label
;
1824 rtx iter
, x_addr
, y_addr
, tmp
;
1825 machine_mode x_addr_mode
= get_address_mode (x
);
1826 machine_mode y_addr_mode
= get_address_mode (y
);
1827 machine_mode iter_mode
;
1829 iter_mode
= GET_MODE (size
);
1830 if (iter_mode
== VOIDmode
)
1831 iter_mode
= word_mode
;
1833 top_label
= gen_label_rtx ();
1834 cmp_label
= gen_label_rtx ();
1835 iter
= gen_reg_rtx (iter_mode
);
1837 emit_move_insn (iter
, const0_rtx
);
1839 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1840 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1841 do_pending_stack_adjust ();
1843 emit_jump (cmp_label
);
1844 emit_label (top_label
);
1846 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1847 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1849 if (x_addr_mode
!= y_addr_mode
)
1850 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1851 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1853 x
= change_address (x
, QImode
, x_addr
);
1854 y
= change_address (y
, QImode
, y_addr
);
1856 emit_move_insn (x
, y
);
1858 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1859 true, OPTAB_LIB_WIDEN
);
1861 emit_move_insn (iter
, tmp
);
1863 emit_label (cmp_label
);
1865 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1867 profile_probability::guessed_always ()
1868 .apply_scale (9, 10));
1871 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1872 TAILCALL is true if this is a tail call. */
1875 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1876 rtx size
, bool tailcall
)
1878 rtx dst_addr
, src_addr
;
1879 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1880 machine_mode size_mode
;
1882 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1883 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1884 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1886 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1887 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1888 src_tree
= make_tree (ptr_type_node
, src_addr
);
1890 size_mode
= TYPE_MODE (sizetype
);
1891 size
= convert_to_mode (size_mode
, size
, 1);
1892 size
= copy_to_mode_reg (size_mode
, size
);
1893 size_tree
= make_tree (sizetype
, size
);
1895 /* It is incorrect to use the libcall calling conventions for calls to
1896 memcpy/memmove/memcmp because they can be provided by the user. */
1897 tree fn
= builtin_decl_implicit (fncode
);
1898 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1899 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1901 return expand_call (call_expr
, NULL_RTX
, false);
1904 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1905 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1906 otherwise return null. */
1909 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1910 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1911 HOST_WIDE_INT align
)
1913 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1915 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1918 struct expand_operand ops
[5];
1919 create_output_operand (&ops
[0], target
, insn_mode
);
1920 create_fixed_operand (&ops
[1], arg1_rtx
);
1921 create_fixed_operand (&ops
[2], arg2_rtx
);
1922 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1923 TYPE_UNSIGNED (arg3_type
));
1924 create_integer_operand (&ops
[4], align
);
1925 if (maybe_expand_insn (icode
, 5, ops
))
1926 return ops
[0].value
;
1930 /* Expand a block compare between X and Y with length LEN using the
1931 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1932 of the expression that was used to calculate the length. ALIGN
1933 gives the known minimum common alignment. */
1936 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1939 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1940 implementing memcmp because it will stop if it encounters two
1942 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1944 if (icode
== CODE_FOR_nothing
)
1947 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1950 /* Emit code to compare a block Y to a block X. This may be done with
1951 string-compare instructions, with multiple scalar instructions,
1952 or with a library call.
1954 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1955 they are. LEN_TYPE is the type of the expression that was used to
1958 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1959 value of a normal memcmp call, instead we can just compare for equality.
1960 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1963 Optionally, the caller can pass a constfn and associated data in Y_CFN
1964 and Y_CFN_DATA. describing that the second operand being compared is a
1965 known constant and how to obtain its data.
1966 Return the result of the comparison, or NULL_RTX if we failed to
1967 perform the operation. */
1970 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1971 bool equality_only
, by_pieces_constfn y_cfn
,
1976 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1979 gcc_assert (MEM_P (x
) && MEM_P (y
));
1980 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1981 gcc_assert (align
>= BITS_PER_UNIT
);
1983 x
= adjust_address (x
, BLKmode
, 0);
1984 y
= adjust_address (y
, BLKmode
, 0);
1987 && CONST_INT_P (len
)
1988 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1989 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
1992 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
1997 /* Copy all or part of a value X into registers starting at REGNO.
1998 The number of registers to be filled is NREGS. */
2001 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2006 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2007 x
= validize_mem (force_const_mem (mode
, x
));
2009 /* See if the machine can do this with a load multiple insn. */
2010 if (targetm
.have_load_multiple ())
2012 rtx_insn
*last
= get_last_insn ();
2013 rtx first
= gen_rtx_REG (word_mode
, regno
);
2014 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2021 delete_insns_since (last
);
2024 for (int i
= 0; i
< nregs
; i
++)
2025 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2026 operand_subword_force (x
, i
, mode
));
2029 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2030 The number of registers to be filled is NREGS. */
2033 move_block_from_reg (int regno
, rtx x
, int nregs
)
2038 /* See if the machine can do this with a store multiple insn. */
2039 if (targetm
.have_store_multiple ())
2041 rtx_insn
*last
= get_last_insn ();
2042 rtx first
= gen_rtx_REG (word_mode
, regno
);
2043 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2050 delete_insns_since (last
);
2053 for (int i
= 0; i
< nregs
; i
++)
2055 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2059 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2063 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2064 ORIG, where ORIG is a non-consecutive group of registers represented by
2065 a PARALLEL. The clone is identical to the original except in that the
2066 original set of registers is replaced by a new set of pseudo registers.
2067 The new set has the same modes as the original set. */
2070 gen_group_rtx (rtx orig
)
2075 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2077 length
= XVECLEN (orig
, 0);
2078 tmps
= XALLOCAVEC (rtx
, length
);
2080 /* Skip a NULL entry in first slot. */
2081 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2086 for (; i
< length
; i
++)
2088 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2089 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2091 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2094 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2097 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2098 except that values are placed in TMPS[i], and must later be moved
2099 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2102 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
, int ssize
)
2106 machine_mode m
= GET_MODE (orig_src
);
2108 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2111 && !SCALAR_INT_MODE_P (m
)
2112 && !MEM_P (orig_src
)
2113 && GET_CODE (orig_src
) != CONCAT
)
2115 scalar_int_mode imode
;
2116 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2118 src
= gen_reg_rtx (imode
);
2119 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2123 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2124 emit_move_insn (src
, orig_src
);
2126 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2130 /* Check for a NULL entry, used to indicate that the parameter goes
2131 both on the stack and in registers. */
2132 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2137 /* Process the pieces. */
2138 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2140 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2141 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (dst
, 0, i
), 1));
2142 unsigned int bytelen
= GET_MODE_SIZE (mode
);
2145 /* Handle trailing fragments that run over the size of the struct. */
2146 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2148 /* Arrange to shift the fragment to where it belongs.
2149 extract_bit_field loads to the lsb of the reg. */
2151 #ifdef BLOCK_REG_PADDING
2152 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2153 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2158 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2159 bytelen
= ssize
- bytepos
;
2160 gcc_assert (bytelen
> 0);
2163 /* If we won't be loading directly from memory, protect the real source
2164 from strange tricks we might play; but make sure that the source can
2165 be loaded directly into the destination. */
2167 if (!MEM_P (orig_src
)
2168 && (!CONSTANT_P (orig_src
)
2169 || (GET_MODE (orig_src
) != mode
2170 && GET_MODE (orig_src
) != VOIDmode
)))
2172 if (GET_MODE (orig_src
) == VOIDmode
)
2173 src
= gen_reg_rtx (mode
);
2175 src
= gen_reg_rtx (GET_MODE (orig_src
));
2177 emit_move_insn (src
, orig_src
);
2180 /* Optimize the access just a bit. */
2182 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2183 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2184 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
2185 && bytelen
== GET_MODE_SIZE (mode
))
2187 tmps
[i
] = gen_reg_rtx (mode
);
2188 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2190 else if (COMPLEX_MODE_P (mode
)
2191 && GET_MODE (src
) == mode
2192 && bytelen
== GET_MODE_SIZE (mode
))
2193 /* Let emit_move_complex do the bulk of the work. */
2195 else if (GET_CODE (src
) == CONCAT
)
2197 unsigned int slen
= GET_MODE_SIZE (GET_MODE (src
));
2198 unsigned int slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2199 unsigned int elt
= bytepos
/ slen0
;
2200 unsigned int subpos
= bytepos
% slen0
;
2202 if (subpos
+ bytelen
<= slen0
)
2204 /* The following assumes that the concatenated objects all
2205 have the same size. In this case, a simple calculation
2206 can be used to determine the object and the bit field
2208 tmps
[i
] = XEXP (src
, elt
);
2210 || subpos
+ bytelen
!= slen0
2211 || (!CONSTANT_P (tmps
[i
])
2212 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2213 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2214 subpos
* BITS_PER_UNIT
,
2215 1, NULL_RTX
, mode
, mode
, false,
2222 gcc_assert (!bytepos
);
2223 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2224 emit_move_insn (mem
, src
);
2225 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2226 0, 1, NULL_RTX
, mode
, mode
, false,
2230 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2231 SIMD register, which is currently broken. While we get GCC
2232 to emit proper RTL for these cases, let's dump to memory. */
2233 else if (VECTOR_MODE_P (GET_MODE (dst
))
2236 int slen
= GET_MODE_SIZE (GET_MODE (src
));
2239 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2240 emit_move_insn (mem
, src
);
2241 tmps
[i
] = adjust_address (mem
, mode
, (int) bytepos
);
2243 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2244 && XVECLEN (dst
, 0) > 1)
2245 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2246 else if (CONSTANT_P (src
))
2248 HOST_WIDE_INT len
= (HOST_WIDE_INT
) bytelen
;
2256 /* TODO: const_wide_int can have sizes other than this... */
2257 gcc_assert (2 * len
== ssize
);
2258 split_double (src
, &first
, &second
);
2265 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2268 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2269 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2270 mode
, mode
, false, NULL
);
2273 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2278 /* Emit code to move a block SRC of type TYPE to a block DST,
2279 where DST is non-consecutive registers represented by a PARALLEL.
2280 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2284 emit_group_load (rtx dst
, rtx src
, tree type
, int ssize
)
2289 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2290 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2292 /* Copy the extracted pieces into the proper (probable) hard regs. */
2293 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2295 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2298 emit_move_insn (d
, tmps
[i
]);
2302 /* Similar, but load SRC into new pseudos in a format that looks like
2303 PARALLEL. This can later be fed to emit_group_move to get things
2304 in the right place. */
2307 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, int ssize
)
2312 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2313 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2315 /* Convert the vector to look just like the original PARALLEL, except
2316 with the computed values. */
2317 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2319 rtx e
= XVECEXP (parallel
, 0, i
);
2320 rtx d
= XEXP (e
, 0);
2324 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2325 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2327 RTVEC_ELT (vec
, i
) = e
;
2330 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2333 /* Emit code to move a block SRC to block DST, where SRC and DST are
2334 non-consecutive groups of registers, each represented by a PARALLEL. */
2337 emit_group_move (rtx dst
, rtx src
)
2341 gcc_assert (GET_CODE (src
) == PARALLEL
2342 && GET_CODE (dst
) == PARALLEL
2343 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2345 /* Skip first entry if NULL. */
2346 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2347 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2348 XEXP (XVECEXP (src
, 0, i
), 0));
2351 /* Move a group of registers represented by a PARALLEL into pseudos. */
2354 emit_group_move_into_temps (rtx src
)
2356 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2359 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2361 rtx e
= XVECEXP (src
, 0, i
);
2362 rtx d
= XEXP (e
, 0);
2365 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2366 RTVEC_ELT (vec
, i
) = e
;
2369 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2372 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2373 where SRC is non-consecutive registers represented by a PARALLEL.
2374 SSIZE represents the total size of block ORIG_DST, or -1 if not
2378 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
, int ssize
)
2381 int start
, finish
, i
;
2382 machine_mode m
= GET_MODE (orig_dst
);
2384 gcc_assert (GET_CODE (src
) == PARALLEL
);
2386 if (!SCALAR_INT_MODE_P (m
)
2387 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2389 scalar_int_mode imode
;
2390 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2392 dst
= gen_reg_rtx (imode
);
2393 emit_group_store (dst
, src
, type
, ssize
);
2394 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2398 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2399 emit_group_store (dst
, src
, type
, ssize
);
2401 emit_move_insn (orig_dst
, dst
);
2405 /* Check for a NULL entry, used to indicate that the parameter goes
2406 both on the stack and in registers. */
2407 if (XEXP (XVECEXP (src
, 0, 0), 0))
2411 finish
= XVECLEN (src
, 0);
2413 tmps
= XALLOCAVEC (rtx
, finish
);
2415 /* Copy the (probable) hard regs into pseudos. */
2416 for (i
= start
; i
< finish
; i
++)
2418 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2419 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2421 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2422 emit_move_insn (tmps
[i
], reg
);
2428 /* If we won't be storing directly into memory, protect the real destination
2429 from strange tricks we might play. */
2431 if (GET_CODE (dst
) == PARALLEL
)
2435 /* We can get a PARALLEL dst if there is a conditional expression in
2436 a return statement. In that case, the dst and src are the same,
2437 so no action is necessary. */
2438 if (rtx_equal_p (dst
, src
))
2441 /* It is unclear if we can ever reach here, but we may as well handle
2442 it. Allocate a temporary, and split this into a store/load to/from
2444 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2445 emit_group_store (temp
, src
, type
, ssize
);
2446 emit_group_load (dst
, temp
, type
, ssize
);
2449 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2451 machine_mode outer
= GET_MODE (dst
);
2453 HOST_WIDE_INT bytepos
;
2457 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2458 dst
= gen_reg_rtx (outer
);
2460 /* Make life a bit easier for combine. */
2461 /* If the first element of the vector is the low part
2462 of the destination mode, use a paradoxical subreg to
2463 initialize the destination. */
2466 inner
= GET_MODE (tmps
[start
]);
2467 bytepos
= subreg_lowpart_offset (inner
, outer
);
2468 if (INTVAL (XEXP (XVECEXP (src
, 0, start
), 1)) == bytepos
)
2470 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2474 emit_move_insn (dst
, temp
);
2481 /* If the first element wasn't the low part, try the last. */
2483 && start
< finish
- 1)
2485 inner
= GET_MODE (tmps
[finish
- 1]);
2486 bytepos
= subreg_lowpart_offset (inner
, outer
);
2487 if (INTVAL (XEXP (XVECEXP (src
, 0, finish
- 1), 1)) == bytepos
)
2489 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2493 emit_move_insn (dst
, temp
);
2500 /* Otherwise, simply initialize the result to zero. */
2502 emit_move_insn (dst
, CONST0_RTX (outer
));
2505 /* Process the pieces. */
2506 for (i
= start
; i
< finish
; i
++)
2508 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (src
, 0, i
), 1));
2509 machine_mode mode
= GET_MODE (tmps
[i
]);
2510 unsigned int bytelen
= GET_MODE_SIZE (mode
);
2511 unsigned int adj_bytelen
;
2514 /* Handle trailing fragments that run over the size of the struct. */
2515 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2516 adj_bytelen
= ssize
- bytepos
;
2518 adj_bytelen
= bytelen
;
2520 if (GET_CODE (dst
) == CONCAT
)
2522 if (bytepos
+ adj_bytelen
2523 <= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
2524 dest
= XEXP (dst
, 0);
2525 else if (bytepos
>= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
2527 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2528 dest
= XEXP (dst
, 1);
2532 machine_mode dest_mode
= GET_MODE (dest
);
2533 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2535 gcc_assert (bytepos
== 0 && XVECLEN (src
, 0));
2537 if (GET_MODE_ALIGNMENT (dest_mode
)
2538 >= GET_MODE_ALIGNMENT (tmp_mode
))
2540 dest
= assign_stack_temp (dest_mode
,
2541 GET_MODE_SIZE (dest_mode
));
2542 emit_move_insn (adjust_address (dest
,
2550 dest
= assign_stack_temp (tmp_mode
,
2551 GET_MODE_SIZE (tmp_mode
));
2552 emit_move_insn (dest
, tmps
[i
]);
2553 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2559 /* Handle trailing fragments that run over the size of the struct. */
2560 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2562 /* store_bit_field always takes its value from the lsb.
2563 Move the fragment to the lsb if it's not already there. */
2565 #ifdef BLOCK_REG_PADDING
2566 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2567 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2573 int shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2574 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2578 /* Make sure not to write past the end of the struct. */
2579 store_bit_field (dest
,
2580 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2581 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2582 VOIDmode
, tmps
[i
], false);
2585 /* Optimize the access just a bit. */
2586 else if (MEM_P (dest
)
2587 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2588 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2589 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
2590 && bytelen
== GET_MODE_SIZE (mode
))
2591 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2594 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2595 0, 0, mode
, tmps
[i
], false);
2598 /* Copy from the pseudo into the (probable) hard reg. */
2599 if (orig_dst
!= dst
)
2600 emit_move_insn (orig_dst
, dst
);
2603 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2604 of the value stored in X. */
2607 maybe_emit_group_store (rtx x
, tree type
)
2609 machine_mode mode
= TYPE_MODE (type
);
2610 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2611 if (GET_CODE (x
) == PARALLEL
)
2613 rtx result
= gen_reg_rtx (mode
);
2614 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2620 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2622 This is used on targets that return BLKmode values in registers. */
2625 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2627 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2628 rtx src
= NULL
, dst
= NULL
;
2629 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2630 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2631 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2632 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2633 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2634 fixed_size_mode copy_mode
;
2636 /* BLKmode registers created in the back-end shouldn't have survived. */
2637 gcc_assert (mode
!= BLKmode
);
2639 /* If the structure doesn't take up a whole number of words, see whether
2640 SRCREG is padded on the left or on the right. If it's on the left,
2641 set PADDING_CORRECTION to the number of bits to skip.
2643 In most ABIs, the structure will be returned at the least end of
2644 the register, which translates to right padding on little-endian
2645 targets and left padding on big-endian targets. The opposite
2646 holds if the structure is returned at the most significant
2647 end of the register. */
2648 if (bytes
% UNITS_PER_WORD
!= 0
2649 && (targetm
.calls
.return_in_msb (type
)
2651 : BYTES_BIG_ENDIAN
))
2653 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2655 /* We can use a single move if we have an exact mode for the size. */
2656 else if (MEM_P (target
)
2657 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2658 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2659 && bytes
== GET_MODE_SIZE (mode
))
2661 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2665 /* And if we additionally have the same mode for a register. */
2666 else if (REG_P (target
)
2667 && GET_MODE (target
) == mode
2668 && bytes
== GET_MODE_SIZE (mode
))
2670 emit_move_insn (target
, srcreg
);
2674 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2675 into a new pseudo which is a full word. */
2676 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2678 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2682 /* Copy the structure BITSIZE bits at a time. If the target lives in
2683 memory, take care of not reading/writing past its end by selecting
2684 a copy mode suited to BITSIZE. This should always be possible given
2687 If the target lives in register, make sure not to select a copy mode
2688 larger than the mode of the register.
2690 We could probably emit more efficient code for machines which do not use
2691 strict alignment, but it doesn't seem worth the effort at the current
2694 copy_mode
= word_mode
;
2697 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2698 if (mem_mode
.exists ())
2699 copy_mode
= mem_mode
.require ();
2701 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2704 for (bitpos
= 0, xbitpos
= padding_correction
;
2705 bitpos
< bytes
* BITS_PER_UNIT
;
2706 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2708 /* We need a new source operand each time xbitpos is on a
2709 word boundary and when xbitpos == padding_correction
2710 (the first time through). */
2711 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2712 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2714 /* We need a new destination operand each time bitpos is on
2716 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2718 else if (bitpos
% BITS_PER_WORD
== 0)
2719 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2721 /* Use xbitpos for the source extraction (right justified) and
2722 bitpos for the destination store (left justified). */
2723 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2724 extract_bit_field (src
, bitsize
,
2725 xbitpos
% BITS_PER_WORD
, 1,
2726 NULL_RTX
, copy_mode
, copy_mode
,
2732 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2733 register if it contains any data, otherwise return null.
2735 This is used on targets that return BLKmode values in registers. */
2738 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2741 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2742 unsigned int bitsize
;
2743 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2744 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2745 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2746 fixed_size_mode dst_mode
;
2748 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2750 x
= expand_normal (src
);
2752 bytes
= int_size_in_bytes (TREE_TYPE (src
));
2756 /* If the structure doesn't take up a whole number of words, see
2757 whether the register value should be padded on the left or on
2758 the right. Set PADDING_CORRECTION to the number of padding
2759 bits needed on the left side.
2761 In most ABIs, the structure will be returned at the least end of
2762 the register, which translates to right padding on little-endian
2763 targets and left padding on big-endian targets. The opposite
2764 holds if the structure is returned at the most significant
2765 end of the register. */
2766 if (bytes
% UNITS_PER_WORD
!= 0
2767 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2769 : BYTES_BIG_ENDIAN
))
2770 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2773 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2774 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2775 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2777 /* Copy the structure BITSIZE bits at a time. */
2778 for (bitpos
= 0, xbitpos
= padding_correction
;
2779 bitpos
< bytes
* BITS_PER_UNIT
;
2780 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2782 /* We need a new destination pseudo each time xbitpos is
2783 on a word boundary and when xbitpos == padding_correction
2784 (the first time through). */
2785 if (xbitpos
% BITS_PER_WORD
== 0
2786 || xbitpos
== padding_correction
)
2788 /* Generate an appropriate register. */
2789 dst_word
= gen_reg_rtx (word_mode
);
2790 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2792 /* Clear the destination before we move anything into it. */
2793 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2796 /* We need a new source operand each time bitpos is on a word
2798 if (bitpos
% BITS_PER_WORD
== 0)
2799 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2801 /* Use bitpos for the source extraction (left justified) and
2802 xbitpos for the destination store (right justified). */
2803 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2805 extract_bit_field (src_word
, bitsize
,
2806 bitpos
% BITS_PER_WORD
, 1,
2807 NULL_RTX
, word_mode
, word_mode
,
2812 if (mode
== BLKmode
)
2814 /* Find the smallest integer mode large enough to hold the
2815 entire structure. */
2816 opt_scalar_int_mode mode_iter
;
2817 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2818 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2821 /* A suitable mode should have been found. */
2822 mode
= mode_iter
.require ();
2825 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2826 dst_mode
= word_mode
;
2829 dst
= gen_reg_rtx (dst_mode
);
2831 for (i
= 0; i
< n_regs
; i
++)
2832 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2834 if (mode
!= dst_mode
)
2835 dst
= gen_lowpart (mode
, dst
);
2840 /* Add a USE expression for REG to the (possibly empty) list pointed
2841 to by CALL_FUSAGE. REG must denote a hard register. */
2844 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2846 gcc_assert (REG_P (reg
));
2848 if (!HARD_REGISTER_P (reg
))
2852 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2855 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2856 to by CALL_FUSAGE. REG must denote a hard register. */
2859 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2861 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2864 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2867 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2868 starting at REGNO. All of these registers must be hard registers. */
2871 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2875 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2877 for (i
= 0; i
< nregs
; i
++)
2878 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2881 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2882 PARALLEL REGS. This is for calls that pass values in multiple
2883 non-contiguous locations. The Irix 6 ABI has examples of this. */
2886 use_group_regs (rtx
*call_fusage
, rtx regs
)
2890 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2892 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2894 /* A NULL entry means the parameter goes both on the stack and in
2895 registers. This can also be a MEM for targets that pass values
2896 partially on the stack and partially in registers. */
2897 if (reg
!= 0 && REG_P (reg
))
2898 use_reg (call_fusage
, reg
);
2902 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2903 assigment and the code of the expresion on the RHS is CODE. Return
2907 get_def_for_expr (tree name
, enum tree_code code
)
2911 if (TREE_CODE (name
) != SSA_NAME
)
2914 def_stmt
= get_gimple_for_ssa_name (name
);
2916 || gimple_assign_rhs_code (def_stmt
) != code
)
2922 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2923 assigment and the class of the expresion on the RHS is CLASS. Return
2927 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2931 if (TREE_CODE (name
) != SSA_NAME
)
2934 def_stmt
= get_gimple_for_ssa_name (name
);
2936 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2942 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2943 its length in bytes. */
2946 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2947 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2948 unsigned HOST_WIDE_INT min_size
,
2949 unsigned HOST_WIDE_INT max_size
,
2950 unsigned HOST_WIDE_INT probable_max_size
)
2952 machine_mode mode
= GET_MODE (object
);
2955 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2957 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2958 just move a zero. Otherwise, do this a piece at a time. */
2960 && CONST_INT_P (size
)
2961 && INTVAL (size
) == (HOST_WIDE_INT
) GET_MODE_SIZE (mode
))
2963 rtx zero
= CONST0_RTX (mode
);
2966 emit_move_insn (object
, zero
);
2970 if (COMPLEX_MODE_P (mode
))
2972 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
2975 write_complex_part (object
, zero
, 0);
2976 write_complex_part (object
, zero
, 1);
2982 if (size
== const0_rtx
)
2985 align
= MEM_ALIGN (object
);
2987 if (CONST_INT_P (size
)
2988 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
2990 optimize_insn_for_speed_p ()))
2991 clear_by_pieces (object
, INTVAL (size
), align
);
2992 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
2993 expected_align
, expected_size
,
2994 min_size
, max_size
, probable_max_size
))
2996 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
2997 return set_storage_via_libcall (object
, size
, const0_rtx
,
2998 method
== BLOCK_OP_TAILCALL
);
3006 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3008 unsigned HOST_WIDE_INT max
, min
= 0;
3009 if (GET_CODE (size
) == CONST_INT
)
3010 min
= max
= UINTVAL (size
);
3012 max
= GET_MODE_MASK (GET_MODE (size
));
3013 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3017 /* A subroutine of clear_storage. Expand a call to memset.
3018 Return the return value of memset, 0 otherwise. */
3021 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3023 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3024 machine_mode size_mode
;
3026 object
= copy_addr_to_reg (XEXP (object
, 0));
3027 object_tree
= make_tree (ptr_type_node
, object
);
3029 if (!CONST_INT_P (val
))
3030 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3031 val_tree
= make_tree (integer_type_node
, val
);
3033 size_mode
= TYPE_MODE (sizetype
);
3034 size
= convert_to_mode (size_mode
, size
, 1);
3035 size
= copy_to_mode_reg (size_mode
, size
);
3036 size_tree
= make_tree (sizetype
, size
);
3038 /* It is incorrect to use the libcall calling conventions for calls to
3039 memset because it can be provided by the user. */
3040 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3041 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3042 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3044 return expand_call (call_expr
, NULL_RTX
, false);
3047 /* Expand a setmem pattern; return true if successful. */
3050 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3051 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3052 unsigned HOST_WIDE_INT min_size
,
3053 unsigned HOST_WIDE_INT max_size
,
3054 unsigned HOST_WIDE_INT probable_max_size
)
3056 /* Try the most limited insn first, because there's no point
3057 including more than one in the machine description unless
3058 the more limited one has some advantage. */
3060 if (expected_align
< align
)
3061 expected_align
= align
;
3062 if (expected_size
!= -1)
3064 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3065 expected_size
= max_size
;
3066 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3067 expected_size
= min_size
;
3070 opt_scalar_int_mode mode_iter
;
3071 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3073 scalar_int_mode mode
= mode_iter
.require ();
3074 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3076 if (code
!= CODE_FOR_nothing
3077 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3078 here because if SIZE is less than the mode mask, as it is
3079 returned by the macro, it will definitely be less than the
3080 actual mode mask. Since SIZE is within the Pmode address
3081 space, we limit MODE to Pmode. */
3082 && ((CONST_INT_P (size
)
3083 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3084 <= (GET_MODE_MASK (mode
) >> 1)))
3085 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3086 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3088 struct expand_operand ops
[9];
3091 nops
= insn_data
[(int) code
].n_generator_args
;
3092 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3094 create_fixed_operand (&ops
[0], object
);
3095 /* The check above guarantees that this size conversion is valid. */
3096 create_convert_operand_to (&ops
[1], size
, mode
, true);
3097 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3098 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3101 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3102 create_integer_operand (&ops
[5], expected_size
);
3106 create_integer_operand (&ops
[6], min_size
);
3107 /* If we can not represent the maximal size,
3108 make parameter NULL. */
3109 if ((HOST_WIDE_INT
) max_size
!= -1)
3110 create_integer_operand (&ops
[7], max_size
);
3112 create_fixed_operand (&ops
[7], NULL
);
3116 /* If we can not represent the maximal size,
3117 make parameter NULL. */
3118 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3119 create_integer_operand (&ops
[8], probable_max_size
);
3121 create_fixed_operand (&ops
[8], NULL
);
3123 if (maybe_expand_insn (code
, nops
, ops
))
3132 /* Write to one of the components of the complex value CPLX. Write VAL to
3133 the real part if IMAG_P is false, and the imaginary part if its true. */
3136 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3142 if (GET_CODE (cplx
) == CONCAT
)
3144 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3148 cmode
= GET_MODE (cplx
);
3149 imode
= GET_MODE_INNER (cmode
);
3150 ibitsize
= GET_MODE_BITSIZE (imode
);
3152 /* For MEMs simplify_gen_subreg may generate an invalid new address
3153 because, e.g., the original address is considered mode-dependent
3154 by the target, which restricts simplify_subreg from invoking
3155 adjust_address_nv. Instead of preparing fallback support for an
3156 invalid address, we call adjust_address_nv directly. */
3159 emit_move_insn (adjust_address_nv (cplx
, imode
,
3160 imag_p
? GET_MODE_SIZE (imode
) : 0),
3165 /* If the sub-object is at least word sized, then we know that subregging
3166 will work. This special case is important, since store_bit_field
3167 wants to operate on integer modes, and there's rarely an OImode to
3168 correspond to TCmode. */
3169 if (ibitsize
>= BITS_PER_WORD
3170 /* For hard regs we have exact predicates. Assume we can split
3171 the original object if it spans an even number of hard regs.
3172 This special case is important for SCmode on 64-bit platforms
3173 where the natural size of floating-point regs is 32-bit. */
3175 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3176 && REG_NREGS (cplx
) % 2 == 0))
3178 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3179 imag_p
? GET_MODE_SIZE (imode
) : 0);
3182 emit_move_insn (part
, val
);
3186 /* simplify_gen_subreg may fail for sub-word MEMs. */
3187 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3190 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3194 /* Extract one of the components of the complex value CPLX. Extract the
3195 real part if IMAG_P is false, and the imaginary part if it's true. */
3198 read_complex_part (rtx cplx
, bool imag_p
)
3204 if (GET_CODE (cplx
) == CONCAT
)
3205 return XEXP (cplx
, imag_p
);
3207 cmode
= GET_MODE (cplx
);
3208 imode
= GET_MODE_INNER (cmode
);
3209 ibitsize
= GET_MODE_BITSIZE (imode
);
3211 /* Special case reads from complex constants that got spilled to memory. */
3212 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3214 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3215 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3217 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3218 if (CONSTANT_CLASS_P (part
))
3219 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3223 /* For MEMs simplify_gen_subreg may generate an invalid new address
3224 because, e.g., the original address is considered mode-dependent
3225 by the target, which restricts simplify_subreg from invoking
3226 adjust_address_nv. Instead of preparing fallback support for an
3227 invalid address, we call adjust_address_nv directly. */
3229 return adjust_address_nv (cplx
, imode
,
3230 imag_p
? GET_MODE_SIZE (imode
) : 0);
3232 /* If the sub-object is at least word sized, then we know that subregging
3233 will work. This special case is important, since extract_bit_field
3234 wants to operate on integer modes, and there's rarely an OImode to
3235 correspond to TCmode. */
3236 if (ibitsize
>= BITS_PER_WORD
3237 /* For hard regs we have exact predicates. Assume we can split
3238 the original object if it spans an even number of hard regs.
3239 This special case is important for SCmode on 64-bit platforms
3240 where the natural size of floating-point regs is 32-bit. */
3242 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3243 && REG_NREGS (cplx
) % 2 == 0))
3245 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3246 imag_p
? GET_MODE_SIZE (imode
) : 0);
3250 /* simplify_gen_subreg may fail for sub-word MEMs. */
3251 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3254 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3255 true, NULL_RTX
, imode
, imode
, false, NULL
);
3258 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3259 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3260 represented in NEW_MODE. If FORCE is true, this will never happen, as
3261 we'll force-create a SUBREG if needed. */
3264 emit_move_change_mode (machine_mode new_mode
,
3265 machine_mode old_mode
, rtx x
, bool force
)
3269 if (push_operand (x
, GET_MODE (x
)))
3271 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3272 MEM_COPY_ATTRIBUTES (ret
, x
);
3276 /* We don't have to worry about changing the address since the
3277 size in bytes is supposed to be the same. */
3278 if (reload_in_progress
)
3280 /* Copy the MEM to change the mode and move any
3281 substitutions from the old MEM to the new one. */
3282 ret
= adjust_address_nv (x
, new_mode
, 0);
3283 copy_replacements (x
, ret
);
3286 ret
= adjust_address (x
, new_mode
, 0);
3290 /* Note that we do want simplify_subreg's behavior of validating
3291 that the new mode is ok for a hard register. If we were to use
3292 simplify_gen_subreg, we would create the subreg, but would
3293 probably run into the target not being able to implement it. */
3294 /* Except, of course, when FORCE is true, when this is exactly what
3295 we want. Which is needed for CCmodes on some targets. */
3297 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3299 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3305 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3306 an integer mode of the same size as MODE. Returns the instruction
3307 emitted, or NULL if such a move could not be generated. */
3310 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3312 scalar_int_mode imode
;
3313 enum insn_code code
;
3315 /* There must exist a mode of the exact size we require. */
3316 if (!int_mode_for_mode (mode
).exists (&imode
))
3319 /* The target must support moves in this mode. */
3320 code
= optab_handler (mov_optab
, imode
);
3321 if (code
== CODE_FOR_nothing
)
3324 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3327 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3330 return emit_insn (GEN_FCN (code
) (x
, y
));
3333 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3334 Return an equivalent MEM that does not use an auto-increment. */
3337 emit_move_resolve_push (machine_mode mode
, rtx x
)
3339 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3340 HOST_WIDE_INT adjust
;
3343 adjust
= GET_MODE_SIZE (mode
);
3344 #ifdef PUSH_ROUNDING
3345 adjust
= PUSH_ROUNDING (adjust
);
3347 if (code
== PRE_DEC
|| code
== POST_DEC
)
3349 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3351 rtx expr
= XEXP (XEXP (x
, 0), 1);
3354 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3355 gcc_assert (CONST_INT_P (XEXP (expr
, 1)));
3356 val
= INTVAL (XEXP (expr
, 1));
3357 if (GET_CODE (expr
) == MINUS
)
3359 gcc_assert (adjust
== val
|| adjust
== -val
);
3363 /* Do not use anti_adjust_stack, since we don't want to update
3364 stack_pointer_delta. */
3365 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3366 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3367 0, OPTAB_LIB_WIDEN
);
3368 if (temp
!= stack_pointer_rtx
)
3369 emit_move_insn (stack_pointer_rtx
, temp
);
3376 temp
= stack_pointer_rtx
;
3381 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3387 return replace_equiv_address (x
, temp
);
3390 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3391 X is known to satisfy push_operand, and MODE is known to be complex.
3392 Returns the last instruction emitted. */
3395 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3397 scalar_mode submode
= GET_MODE_INNER (mode
);
3400 #ifdef PUSH_ROUNDING
3401 unsigned int submodesize
= GET_MODE_SIZE (submode
);
3403 /* In case we output to the stack, but the size is smaller than the
3404 machine can push exactly, we need to use move instructions. */
3405 if (PUSH_ROUNDING (submodesize
) != submodesize
)
3407 x
= emit_move_resolve_push (mode
, x
);
3408 return emit_move_insn (x
, y
);
3412 /* Note that the real part always precedes the imag part in memory
3413 regardless of machine's endianness. */
3414 switch (GET_CODE (XEXP (x
, 0)))
3428 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3429 read_complex_part (y
, imag_first
));
3430 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3431 read_complex_part (y
, !imag_first
));
3434 /* A subroutine of emit_move_complex. Perform the move from Y to X
3435 via two moves of the parts. Returns the last instruction emitted. */
3438 emit_move_complex_parts (rtx x
, rtx y
)
3440 /* Show the output dies here. This is necessary for SUBREGs
3441 of pseudos since we cannot track their lifetimes correctly;
3442 hard regs shouldn't appear here except as return values. */
3443 if (!reload_completed
&& !reload_in_progress
3444 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3447 write_complex_part (x
, read_complex_part (y
, false), false);
3448 write_complex_part (x
, read_complex_part (y
, true), true);
3450 return get_last_insn ();
3453 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3454 MODE is known to be complex. Returns the last instruction emitted. */
3457 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3461 /* Need to take special care for pushes, to maintain proper ordering
3462 of the data, and possibly extra padding. */
3463 if (push_operand (x
, mode
))
3464 return emit_move_complex_push (mode
, x
, y
);
3466 /* See if we can coerce the target into moving both values at once, except
3467 for floating point where we favor moving as parts if this is easy. */
3468 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3469 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3471 && HARD_REGISTER_P (x
)
3472 && REG_NREGS (x
) == 1)
3474 && HARD_REGISTER_P (y
)
3475 && REG_NREGS (y
) == 1))
3477 /* Not possible if the values are inherently not adjacent. */
3478 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3480 /* Is possible if both are registers (or subregs of registers). */
3481 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3483 /* If one of the operands is a memory, and alignment constraints
3484 are friendly enough, we may be able to do combined memory operations.
3485 We do not attempt this if Y is a constant because that combination is
3486 usually better with the by-parts thing below. */
3487 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3488 && (!STRICT_ALIGNMENT
3489 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3498 /* For memory to memory moves, optimal behavior can be had with the
3499 existing block move logic. */
3500 if (MEM_P (x
) && MEM_P (y
))
3502 emit_block_move (x
, y
, GEN_INT (GET_MODE_SIZE (mode
)),
3503 BLOCK_OP_NO_LIBCALL
);
3504 return get_last_insn ();
3507 ret
= emit_move_via_integer (mode
, x
, y
, true);
3512 return emit_move_complex_parts (x
, y
);
3515 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3516 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3519 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3523 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3526 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3527 if (code
!= CODE_FOR_nothing
)
3529 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3530 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3531 return emit_insn (GEN_FCN (code
) (x
, y
));
3535 /* Otherwise, find the MODE_INT mode of the same width. */
3536 ret
= emit_move_via_integer (mode
, x
, y
, false);
3537 gcc_assert (ret
!= NULL
);
3541 /* Return true if word I of OP lies entirely in the
3542 undefined bits of a paradoxical subreg. */
3545 undefined_operand_subword_p (const_rtx op
, int i
)
3547 if (GET_CODE (op
) != SUBREG
)
3549 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3550 HOST_WIDE_INT offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3551 return (offset
>= GET_MODE_SIZE (innermostmode
)
3552 || offset
<= -UNITS_PER_WORD
);
3555 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3556 MODE is any multi-word or full-word mode that lacks a move_insn
3557 pattern. Note that you will get better code if you define such
3558 patterns, even if they must turn into multiple assembler instructions. */
3561 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3563 rtx_insn
*last_insn
= 0;
3569 gcc_assert (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
);
3571 /* If X is a push on the stack, do the push now and replace
3572 X with a reference to the stack pointer. */
3573 if (push_operand (x
, mode
))
3574 x
= emit_move_resolve_push (mode
, x
);
3576 /* If we are in reload, see if either operand is a MEM whose address
3577 is scheduled for replacement. */
3578 if (reload_in_progress
&& MEM_P (x
)
3579 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3580 x
= replace_equiv_address_nv (x
, inner
);
3581 if (reload_in_progress
&& MEM_P (y
)
3582 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3583 y
= replace_equiv_address_nv (y
, inner
);
3587 need_clobber
= false;
3589 i
< (GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
;
3592 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3595 /* Do not generate code for a move if it would come entirely
3596 from the undefined bits of a paradoxical subreg. */
3597 if (undefined_operand_subword_p (y
, i
))
3600 ypart
= operand_subword (y
, i
, 1, mode
);
3602 /* If we can't get a part of Y, put Y into memory if it is a
3603 constant. Otherwise, force it into a register. Then we must
3604 be able to get a part of Y. */
3605 if (ypart
== 0 && CONSTANT_P (y
))
3607 y
= use_anchored_address (force_const_mem (mode
, y
));
3608 ypart
= operand_subword (y
, i
, 1, mode
);
3610 else if (ypart
== 0)
3611 ypart
= operand_subword_force (y
, i
, mode
);
3613 gcc_assert (xpart
&& ypart
);
3615 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3617 last_insn
= emit_move_insn (xpart
, ypart
);
3623 /* Show the output dies here. This is necessary for SUBREGs
3624 of pseudos since we cannot track their lifetimes correctly;
3625 hard regs shouldn't appear here except as return values.
3626 We never want to emit such a clobber after reload. */
3628 && ! (reload_in_progress
|| reload_completed
)
3629 && need_clobber
!= 0)
3637 /* Low level part of emit_move_insn.
3638 Called just like emit_move_insn, but assumes X and Y
3639 are basically valid. */
3642 emit_move_insn_1 (rtx x
, rtx y
)
3644 machine_mode mode
= GET_MODE (x
);
3645 enum insn_code code
;
3647 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3649 code
= optab_handler (mov_optab
, mode
);
3650 if (code
!= CODE_FOR_nothing
)
3651 return emit_insn (GEN_FCN (code
) (x
, y
));
3653 /* Expand complex moves by moving real part and imag part. */
3654 if (COMPLEX_MODE_P (mode
))
3655 return emit_move_complex (mode
, x
, y
);
3657 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3658 || ALL_FIXED_POINT_MODE_P (mode
))
3660 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3662 /* If we can't find an integer mode, use multi words. */
3666 return emit_move_multi_word (mode
, x
, y
);
3669 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3670 return emit_move_ccmode (mode
, x
, y
);
3672 /* Try using a move pattern for the corresponding integer mode. This is
3673 only safe when simplify_subreg can convert MODE constants into integer
3674 constants. At present, it can only do this reliably if the value
3675 fits within a HOST_WIDE_INT. */
3676 if (!CONSTANT_P (y
) || GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3678 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3682 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3687 return emit_move_multi_word (mode
, x
, y
);
3690 /* Generate code to copy Y into X.
3691 Both Y and X must have the same mode, except that
3692 Y can be a constant with VOIDmode.
3693 This mode cannot be BLKmode; use emit_block_move for that.
3695 Return the last instruction emitted. */
3698 emit_move_insn (rtx x
, rtx y
)
3700 machine_mode mode
= GET_MODE (x
);
3701 rtx y_cst
= NULL_RTX
;
3702 rtx_insn
*last_insn
;
3705 gcc_assert (mode
!= BLKmode
3706 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3711 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3712 && (last_insn
= compress_float_constant (x
, y
)))
3717 if (!targetm
.legitimate_constant_p (mode
, y
))
3719 y
= force_const_mem (mode
, y
);
3721 /* If the target's cannot_force_const_mem prevented the spill,
3722 assume that the target's move expanders will also take care
3723 of the non-legitimate constant. */
3727 y
= use_anchored_address (y
);
3731 /* If X or Y are memory references, verify that their addresses are valid
3734 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3736 && ! push_operand (x
, GET_MODE (x
))))
3737 x
= validize_mem (x
);
3740 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3741 MEM_ADDR_SPACE (y
)))
3742 y
= validize_mem (y
);
3744 gcc_assert (mode
!= BLKmode
);
3746 last_insn
= emit_move_insn_1 (x
, y
);
3748 if (y_cst
&& REG_P (x
)
3749 && (set
= single_set (last_insn
)) != NULL_RTX
3750 && SET_DEST (set
) == x
3751 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3752 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3757 /* Generate the body of an instruction to copy Y into X.
3758 It may be a list of insns, if one insn isn't enough. */
3761 gen_move_insn (rtx x
, rtx y
)
3766 emit_move_insn_1 (x
, y
);
3772 /* If Y is representable exactly in a narrower mode, and the target can
3773 perform the extension directly from constant or memory, then emit the
3774 move as an extension. */
3777 compress_float_constant (rtx x
, rtx y
)
3779 machine_mode dstmode
= GET_MODE (x
);
3780 machine_mode orig_srcmode
= GET_MODE (y
);
3781 machine_mode srcmode
;
3782 const REAL_VALUE_TYPE
*r
;
3783 int oldcost
, newcost
;
3784 bool speed
= optimize_insn_for_speed_p ();
3786 r
= CONST_DOUBLE_REAL_VALUE (y
);
3788 if (targetm
.legitimate_constant_p (dstmode
, y
))
3789 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3791 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3793 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3797 rtx_insn
*last_insn
;
3799 /* Skip if the target can't extend this way. */
3800 ic
= can_extend_p (dstmode
, srcmode
, 0);
3801 if (ic
== CODE_FOR_nothing
)
3804 /* Skip if the narrowed value isn't exact. */
3805 if (! exact_real_truncate (srcmode
, r
))
3808 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3810 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3812 /* Skip if the target needs extra instructions to perform
3814 if (!insn_operand_matches (ic
, 1, trunc_y
))
3816 /* This is valid, but may not be cheaper than the original. */
3817 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3819 if (oldcost
< newcost
)
3822 else if (float_extend_from_mem
[dstmode
][srcmode
])
3824 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3825 /* This is valid, but may not be cheaper than the original. */
3826 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3828 if (oldcost
< newcost
)
3830 trunc_y
= validize_mem (trunc_y
);
3835 /* For CSE's benefit, force the compressed constant pool entry
3836 into a new pseudo. This constant may be used in different modes,
3837 and if not, combine will put things back together for us. */
3838 trunc_y
= force_reg (srcmode
, trunc_y
);
3840 /* If x is a hard register, perform the extension into a pseudo,
3841 so that e.g. stack realignment code is aware of it. */
3843 if (REG_P (x
) && HARD_REGISTER_P (x
))
3844 target
= gen_reg_rtx (dstmode
);
3846 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3847 last_insn
= get_last_insn ();
3850 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3853 return emit_move_insn (x
, target
);
3860 /* Pushing data onto the stack. */
3862 /* Push a block of length SIZE (perhaps variable)
3863 and return an rtx to address the beginning of the block.
3864 The value may be virtual_outgoing_args_rtx.
3866 EXTRA is the number of bytes of padding to push in addition to SIZE.
3867 BELOW nonzero means this padding comes at low addresses;
3868 otherwise, the padding comes at high addresses. */
3871 push_block (rtx size
, int extra
, int below
)
3875 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3876 if (CONSTANT_P (size
))
3877 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3878 else if (REG_P (size
) && extra
== 0)
3879 anti_adjust_stack (size
);
3882 temp
= copy_to_mode_reg (Pmode
, size
);
3884 temp
= expand_binop (Pmode
, add_optab
, temp
,
3885 gen_int_mode (extra
, Pmode
),
3886 temp
, 0, OPTAB_LIB_WIDEN
);
3887 anti_adjust_stack (temp
);
3890 if (STACK_GROWS_DOWNWARD
)
3892 temp
= virtual_outgoing_args_rtx
;
3893 if (extra
!= 0 && below
)
3894 temp
= plus_constant (Pmode
, temp
, extra
);
3898 if (CONST_INT_P (size
))
3899 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3900 -INTVAL (size
) - (below
? 0 : extra
));
3901 else if (extra
!= 0 && !below
)
3902 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3903 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3906 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3907 negate_rtx (Pmode
, size
));
3910 return memory_address (NARROWEST_INT_MODE
, temp
);
3913 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3916 mem_autoinc_base (rtx mem
)
3920 rtx addr
= XEXP (mem
, 0);
3921 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3922 return XEXP (addr
, 0);
3927 /* A utility routine used here, in reload, and in try_split. The insns
3928 after PREV up to and including LAST are known to adjust the stack,
3929 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3930 placing notes as appropriate. PREV may be NULL, indicating the
3931 entire insn sequence prior to LAST should be scanned.
3933 The set of allowed stack pointer modifications is small:
3934 (1) One or more auto-inc style memory references (aka pushes),
3935 (2) One or more addition/subtraction with the SP as destination,
3936 (3) A single move insn with the SP as destination,
3937 (4) A call_pop insn,
3938 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3940 Insns in the sequence that do not modify the SP are ignored,
3941 except for noreturn calls.
3943 The return value is the amount of adjustment that can be trivially
3944 verified, via immediate operand or auto-inc. If the adjustment
3945 cannot be trivially extracted, the return value is INT_MIN. */
3948 find_args_size_adjust (rtx_insn
*insn
)
3953 pat
= PATTERN (insn
);
3956 /* Look for a call_pop pattern. */
3959 /* We have to allow non-call_pop patterns for the case
3960 of emit_single_push_insn of a TLS address. */
3961 if (GET_CODE (pat
) != PARALLEL
)
3964 /* All call_pop have a stack pointer adjust in the parallel.
3965 The call itself is always first, and the stack adjust is
3966 usually last, so search from the end. */
3967 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
3969 set
= XVECEXP (pat
, 0, i
);
3970 if (GET_CODE (set
) != SET
)
3972 dest
= SET_DEST (set
);
3973 if (dest
== stack_pointer_rtx
)
3976 /* We'd better have found the stack pointer adjust. */
3979 /* Fall through to process the extracted SET and DEST
3980 as if it was a standalone insn. */
3982 else if (GET_CODE (pat
) == SET
)
3984 else if ((set
= single_set (insn
)) != NULL
)
3986 else if (GET_CODE (pat
) == PARALLEL
)
3988 /* ??? Some older ports use a parallel with a stack adjust
3989 and a store for a PUSH_ROUNDING pattern, rather than a
3990 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3991 /* ??? See h8300 and m68k, pushqi1. */
3992 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
3994 set
= XVECEXP (pat
, 0, i
);
3995 if (GET_CODE (set
) != SET
)
3997 dest
= SET_DEST (set
);
3998 if (dest
== stack_pointer_rtx
)
4001 /* We do not expect an auto-inc of the sp in the parallel. */
4002 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4003 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4004 != stack_pointer_rtx
);
4012 dest
= SET_DEST (set
);
4014 /* Look for direct modifications of the stack pointer. */
4015 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4017 /* Look for a trivial adjustment, otherwise assume nothing. */
4018 /* Note that the SPU restore_stack_block pattern refers to
4019 the stack pointer in V4SImode. Consider that non-trivial. */
4020 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4021 && GET_CODE (SET_SRC (set
)) == PLUS
4022 && XEXP (SET_SRC (set
), 0) == stack_pointer_rtx
4023 && CONST_INT_P (XEXP (SET_SRC (set
), 1)))
4024 return INTVAL (XEXP (SET_SRC (set
), 1));
4025 /* ??? Reload can generate no-op moves, which will be cleaned
4026 up later. Recognize it and continue searching. */
4027 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4030 return HOST_WIDE_INT_MIN
;
4036 /* Otherwise only think about autoinc patterns. */
4037 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4040 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4041 != stack_pointer_rtx
);
4043 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4044 mem
= SET_SRC (set
);
4048 addr
= XEXP (mem
, 0);
4049 switch (GET_CODE (addr
))
4053 return GET_MODE_SIZE (GET_MODE (mem
));
4056 return -GET_MODE_SIZE (GET_MODE (mem
));
4059 addr
= XEXP (addr
, 1);
4060 gcc_assert (GET_CODE (addr
) == PLUS
);
4061 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4062 gcc_assert (CONST_INT_P (XEXP (addr
, 1)));
4063 return INTVAL (XEXP (addr
, 1));
4071 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
, int end_args_size
)
4073 int args_size
= end_args_size
;
4074 bool saw_unknown
= false;
4077 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4079 HOST_WIDE_INT this_delta
;
4081 if (!NONDEBUG_INSN_P (insn
))
4084 this_delta
= find_args_size_adjust (insn
);
4085 if (this_delta
== 0)
4088 || ACCUMULATE_OUTGOING_ARGS
4089 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4093 gcc_assert (!saw_unknown
);
4094 if (this_delta
== HOST_WIDE_INT_MIN
)
4097 add_reg_note (insn
, REG_ARGS_SIZE
, GEN_INT (args_size
));
4098 if (STACK_GROWS_DOWNWARD
)
4099 this_delta
= -(unsigned HOST_WIDE_INT
) this_delta
;
4101 args_size
-= this_delta
;
4104 return saw_unknown
? INT_MIN
: args_size
;
4107 #ifdef PUSH_ROUNDING
4108 /* Emit single push insn. */
4111 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4114 unsigned rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4116 enum insn_code icode
;
4118 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4119 /* If there is push pattern, use it. Otherwise try old way of throwing
4120 MEM representing push operation to move expander. */
4121 icode
= optab_handler (push_optab
, mode
);
4122 if (icode
!= CODE_FOR_nothing
)
4124 struct expand_operand ops
[1];
4126 create_input_operand (&ops
[0], x
, mode
);
4127 if (maybe_expand_insn (icode
, 1, ops
))
4130 if (GET_MODE_SIZE (mode
) == rounded_size
)
4131 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4132 /* If we are to pad downward, adjust the stack pointer first and
4133 then store X into the stack location using an offset. This is
4134 because emit_move_insn does not know how to pad; it does not have
4136 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4138 unsigned padding_size
= rounded_size
- GET_MODE_SIZE (mode
);
4139 HOST_WIDE_INT offset
;
4141 emit_move_insn (stack_pointer_rtx
,
4142 expand_binop (Pmode
,
4143 STACK_GROWS_DOWNWARD
? sub_optab
4146 gen_int_mode (rounded_size
, Pmode
),
4147 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4149 offset
= (HOST_WIDE_INT
) padding_size
;
4150 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4151 /* We have already decremented the stack pointer, so get the
4153 offset
+= (HOST_WIDE_INT
) rounded_size
;
4155 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4156 /* We have already incremented the stack pointer, so get the
4158 offset
-= (HOST_WIDE_INT
) rounded_size
;
4160 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4161 gen_int_mode (offset
, Pmode
));
4165 if (STACK_GROWS_DOWNWARD
)
4166 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4167 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4168 gen_int_mode (-(HOST_WIDE_INT
) rounded_size
,
4171 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4172 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4173 gen_int_mode (rounded_size
, Pmode
));
4175 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4178 dest
= gen_rtx_MEM (mode
, dest_addr
);
4182 set_mem_attributes (dest
, type
, 1);
4184 if (cfun
->tail_call_marked
)
4185 /* Function incoming arguments may overlap with sibling call
4186 outgoing arguments and we cannot allow reordering of reads
4187 from function arguments with stores to outgoing arguments
4188 of sibling calls. */
4189 set_mem_alias_set (dest
, 0);
4191 emit_move_insn (dest
, x
);
4194 /* Emit and annotate a single push insn. */
4197 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4199 int delta
, old_delta
= stack_pointer_delta
;
4200 rtx_insn
*prev
= get_last_insn ();
4203 emit_single_push_insn_1 (mode
, x
, type
);
4205 last
= get_last_insn ();
4207 /* Notice the common case where we emitted exactly one insn. */
4208 if (PREV_INSN (last
) == prev
)
4210 add_reg_note (last
, REG_ARGS_SIZE
, GEN_INT (stack_pointer_delta
));
4214 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4215 gcc_assert (delta
== INT_MIN
|| delta
== old_delta
);
4219 /* If reading SIZE bytes from X will end up reading from
4220 Y return the number of bytes that overlap. Return -1
4221 if there is no overlap or -2 if we can't determine
4222 (for example when X and Y have different base registers). */
4225 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4227 rtx tmp
= plus_constant (Pmode
, x
, size
);
4228 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4230 if (!CONST_INT_P (sub
))
4233 HOST_WIDE_INT val
= INTVAL (sub
);
4235 return IN_RANGE (val
, 1, size
) ? val
: -1;
4238 /* Generate code to push X onto the stack, assuming it has mode MODE and
4240 MODE is redundant except when X is a CONST_INT (since they don't
4242 SIZE is an rtx for the size of data to be copied (in bytes),
4243 needed only if X is BLKmode.
4244 Return true if successful. May return false if asked to push a
4245 partial argument during a sibcall optimization (as specified by
4246 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4249 ALIGN (in bits) is maximum alignment we can assume.
4251 If PARTIAL and REG are both nonzero, then copy that many of the first
4252 bytes of X into registers starting with REG, and push the rest of X.
4253 The amount of space pushed is decreased by PARTIAL bytes.
4254 REG must be a hard register in this case.
4255 If REG is zero but PARTIAL is not, take any all others actions for an
4256 argument partially in registers, but do not actually load any
4259 EXTRA is the amount in bytes of extra space to leave next to this arg.
4260 This is ignored if an argument block has already been allocated.
4262 On a machine that lacks real push insns, ARGS_ADDR is the address of
4263 the bottom of the argument block for this call. We use indexing off there
4264 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4265 argument block has not been preallocated.
4267 ARGS_SO_FAR is the size of args previously pushed for this call.
4269 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4270 for arguments passed in registers. If nonzero, it will be the number
4271 of bytes required. */
4274 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4275 unsigned int align
, int partial
, rtx reg
, int extra
,
4276 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4277 rtx alignment_pad
, bool sibcall_p
)
4280 pad_direction stack_direction
4281 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4283 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4284 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4285 Default is below for small data on big-endian machines; else above. */
4286 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4288 /* Invert direction if stack is post-decrement.
4290 if (STACK_PUSH_CODE
== POST_DEC
)
4291 if (where_pad
!= PAD_NONE
)
4292 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4296 int nregs
= partial
/ UNITS_PER_WORD
;
4297 rtx
*tmp_regs
= NULL
;
4298 int overlapping
= 0;
4301 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4303 /* Copy a block into the stack, entirely or partially. */
4310 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4311 used
= partial
- offset
;
4313 if (mode
!= BLKmode
)
4315 /* A value is to be stored in an insufficiently aligned
4316 stack slot; copy via a suitably aligned slot if
4318 size
= GEN_INT (GET_MODE_SIZE (mode
));
4319 if (!MEM_P (xinner
))
4321 temp
= assign_temp (type
, 1, 1);
4322 emit_move_insn (temp
, xinner
);
4329 /* USED is now the # of bytes we need not copy to the stack
4330 because registers will take care of them. */
4333 xinner
= adjust_address (xinner
, BLKmode
, used
);
4335 /* If the partial register-part of the arg counts in its stack size,
4336 skip the part of stack space corresponding to the registers.
4337 Otherwise, start copying to the beginning of the stack space,
4338 by setting SKIP to 0. */
4339 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4341 #ifdef PUSH_ROUNDING
4342 /* Do it with several push insns if that doesn't take lots of insns
4343 and if there is no difficulty with push insns that skip bytes
4344 on the stack for alignment purposes. */
4347 && CONST_INT_P (size
)
4349 && MEM_ALIGN (xinner
) >= align
4350 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4351 /* Here we avoid the case of a structure whose weak alignment
4352 forces many pushes of a small amount of data,
4353 and such small pushes do rounding that causes trouble. */
4354 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4355 || align
>= BIGGEST_ALIGNMENT
4356 || (PUSH_ROUNDING (align
/ BITS_PER_UNIT
)
4357 == (align
/ BITS_PER_UNIT
)))
4358 && (HOST_WIDE_INT
) PUSH_ROUNDING (INTVAL (size
)) == INTVAL (size
))
4360 /* Push padding now if padding above and stack grows down,
4361 or if padding below and stack grows up.
4362 But if space already allocated, this has already been done. */
4363 if (extra
&& args_addr
== 0
4364 && where_pad
!= PAD_NONE
&& where_pad
!= stack_direction
)
4365 anti_adjust_stack (GEN_INT (extra
));
4367 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4370 #endif /* PUSH_ROUNDING */
4374 /* Otherwise make space on the stack and copy the data
4375 to the address of that space. */
4377 /* Deduct words put into registers from the size we must copy. */
4380 if (CONST_INT_P (size
))
4381 size
= GEN_INT (INTVAL (size
) - used
);
4383 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4384 gen_int_mode (used
, GET_MODE (size
)),
4385 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4388 /* Get the address of the stack space.
4389 In this case, we do not deal with EXTRA separately.
4390 A single stack adjust will do. */
4393 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4396 else if (CONST_INT_P (args_so_far
))
4397 temp
= memory_address (BLKmode
,
4398 plus_constant (Pmode
, args_addr
,
4399 skip
+ INTVAL (args_so_far
)));
4401 temp
= memory_address (BLKmode
,
4402 plus_constant (Pmode
,
4403 gen_rtx_PLUS (Pmode
,
4408 if (!ACCUMULATE_OUTGOING_ARGS
)
4410 /* If the source is referenced relative to the stack pointer,
4411 copy it to another register to stabilize it. We do not need
4412 to do this if we know that we won't be changing sp. */
4414 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4415 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4416 temp
= copy_to_reg (temp
);
4419 target
= gen_rtx_MEM (BLKmode
, temp
);
4421 /* We do *not* set_mem_attributes here, because incoming arguments
4422 may overlap with sibling call outgoing arguments and we cannot
4423 allow reordering of reads from function arguments with stores
4424 to outgoing arguments of sibling calls. We do, however, want
4425 to record the alignment of the stack slot. */
4426 /* ALIGN may well be better aligned than TYPE, e.g. due to
4427 PARM_BOUNDARY. Assume the caller isn't lying. */
4428 set_mem_align (target
, align
);
4430 /* If part should go in registers and pushing to that part would
4431 overwrite some of the values that need to go into regs, load the
4432 overlapping values into temporary pseudos to be moved into the hard
4433 regs at the end after the stack pushing has completed.
4434 We cannot load them directly into the hard regs here because
4435 they can be clobbered by the block move expansions.
4438 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4439 && GET_CODE (reg
) != PARALLEL
)
4441 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4442 if (overlapping
> 0)
4444 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4445 overlapping
/= UNITS_PER_WORD
;
4447 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4449 for (int i
= 0; i
< overlapping
; i
++)
4450 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4452 for (int i
= 0; i
< overlapping
; i
++)
4453 emit_move_insn (tmp_regs
[i
],
4454 operand_subword_force (target
, i
, mode
));
4456 else if (overlapping
== -1)
4458 /* Could not determine whether there is overlap.
4459 Fail the sibcall. */
4467 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4470 else if (partial
> 0)
4472 /* Scalar partly in registers. */
4474 int size
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
;
4477 /* # bytes of start of argument
4478 that we must make space for but need not store. */
4479 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4480 int args_offset
= INTVAL (args_so_far
);
4483 /* Push padding now if padding above and stack grows down,
4484 or if padding below and stack grows up.
4485 But if space already allocated, this has already been done. */
4486 if (extra
&& args_addr
== 0
4487 && where_pad
!= PAD_NONE
&& where_pad
!= stack_direction
)
4488 anti_adjust_stack (GEN_INT (extra
));
4490 /* If we make space by pushing it, we might as well push
4491 the real data. Otherwise, we can leave OFFSET nonzero
4492 and leave the space uninitialized. */
4496 /* Now NOT_STACK gets the number of words that we don't need to
4497 allocate on the stack. Convert OFFSET to words too. */
4498 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4499 offset
/= UNITS_PER_WORD
;
4501 /* If the partial register-part of the arg counts in its stack size,
4502 skip the part of stack space corresponding to the registers.
4503 Otherwise, start copying to the beginning of the stack space,
4504 by setting SKIP to 0. */
4505 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4507 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4508 x
= validize_mem (force_const_mem (mode
, x
));
4510 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4511 SUBREGs of such registers are not allowed. */
4512 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4513 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4514 x
= copy_to_reg (x
);
4516 /* Loop over all the words allocated on the stack for this arg. */
4517 /* We can do it by words, because any scalar bigger than a word
4518 has a size a multiple of a word. */
4519 for (i
= size
- 1; i
>= not_stack
; i
--)
4520 if (i
>= not_stack
+ offset
)
4521 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4522 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4524 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4526 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4534 /* Push padding now if padding above and stack grows down,
4535 or if padding below and stack grows up.
4536 But if space already allocated, this has already been done. */
4537 if (extra
&& args_addr
== 0
4538 && where_pad
!= PAD_NONE
&& where_pad
!= stack_direction
)
4539 anti_adjust_stack (GEN_INT (extra
));
4541 #ifdef PUSH_ROUNDING
4542 if (args_addr
== 0 && PUSH_ARGS
)
4543 emit_single_push_insn (mode
, x
, type
);
4547 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4548 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4550 /* We do *not* set_mem_attributes here, because incoming arguments
4551 may overlap with sibling call outgoing arguments and we cannot
4552 allow reordering of reads from function arguments with stores
4553 to outgoing arguments of sibling calls. We do, however, want
4554 to record the alignment of the stack slot. */
4555 /* ALIGN may well be better aligned than TYPE, e.g. due to
4556 PARM_BOUNDARY. Assume the caller isn't lying. */
4557 set_mem_align (dest
, align
);
4559 emit_move_insn (dest
, x
);
4563 /* Move the partial arguments into the registers and any overlapping
4564 values that we moved into the pseudos in tmp_regs. */
4565 if (partial
> 0 && reg
!= 0)
4567 /* Handle calls that pass values in multiple non-contiguous locations.
4568 The Irix 6 ABI has examples of this. */
4569 if (GET_CODE (reg
) == PARALLEL
)
4570 emit_group_load (reg
, x
, type
, -1);
4573 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4574 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4576 for (int i
= 0; i
< overlapping
; i
++)
4577 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4578 + nregs
- overlapping
+ i
),
4584 if (extra
&& args_addr
== 0 && where_pad
== stack_direction
)
4585 anti_adjust_stack (GEN_INT (extra
));
4587 if (alignment_pad
&& args_addr
== 0)
4588 anti_adjust_stack (alignment_pad
);
4593 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4597 get_subtarget (rtx x
)
4601 /* Only registers can be subtargets. */
4603 /* Don't use hard regs to avoid extending their life. */
4604 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4608 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4609 FIELD is a bitfield. Returns true if the optimization was successful,
4610 and there's nothing else to do. */
4613 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize
,
4614 unsigned HOST_WIDE_INT bitpos
,
4615 unsigned HOST_WIDE_INT bitregion_start
,
4616 unsigned HOST_WIDE_INT bitregion_end
,
4617 machine_mode mode1
, rtx str_rtx
,
4618 tree to
, tree src
, bool reverse
)
4620 machine_mode str_mode
= GET_MODE (str_rtx
);
4621 unsigned int str_bitsize
= GET_MODE_BITSIZE (str_mode
);
4626 enum tree_code code
;
4628 if (mode1
!= VOIDmode
4629 || bitsize
>= BITS_PER_WORD
4630 || str_bitsize
> BITS_PER_WORD
4631 || TREE_SIDE_EFFECTS (to
)
4632 || TREE_THIS_VOLATILE (to
))
4636 if (TREE_CODE (src
) != SSA_NAME
)
4638 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4641 srcstmt
= get_gimple_for_ssa_name (src
);
4643 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4646 code
= gimple_assign_rhs_code (srcstmt
);
4648 op0
= gimple_assign_rhs1 (srcstmt
);
4650 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4651 to find its initialization. Hopefully the initialization will
4652 be from a bitfield load. */
4653 if (TREE_CODE (op0
) == SSA_NAME
)
4655 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4657 /* We want to eventually have OP0 be the same as TO, which
4658 should be a bitfield. */
4660 || !is_gimple_assign (op0stmt
)
4661 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4663 op0
= gimple_assign_rhs1 (op0stmt
);
4666 op1
= gimple_assign_rhs2 (srcstmt
);
4668 if (!operand_equal_p (to
, op0
, 0))
4671 if (MEM_P (str_rtx
))
4673 unsigned HOST_WIDE_INT offset1
;
4675 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4676 str_bitsize
= BITS_PER_WORD
;
4678 scalar_int_mode best_mode
;
4679 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4680 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4682 str_mode
= best_mode
;
4683 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4686 bitpos
%= str_bitsize
;
4687 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4688 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4690 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4693 gcc_assert (!reverse
);
4695 /* If the bit field covers the whole REG/MEM, store_field
4696 will likely generate better code. */
4697 if (bitsize
>= str_bitsize
)
4700 /* We can't handle fields split across multiple entities. */
4701 if (bitpos
+ bitsize
> str_bitsize
)
4704 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4705 bitpos
= str_bitsize
- bitpos
- bitsize
;
4711 /* For now, just optimize the case of the topmost bitfield
4712 where we don't need to do any masking and also
4713 1 bit bitfields where xor can be used.
4714 We might win by one instruction for the other bitfields
4715 too if insv/extv instructions aren't used, so that
4716 can be added later. */
4717 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4718 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4721 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4722 value
= convert_modes (str_mode
,
4723 TYPE_MODE (TREE_TYPE (op1
)), value
,
4724 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4726 /* We may be accessing data outside the field, which means
4727 we can alias adjacent data. */
4728 if (MEM_P (str_rtx
))
4730 str_rtx
= shallow_copy_rtx (str_rtx
);
4731 set_mem_alias_set (str_rtx
, 0);
4732 set_mem_expr (str_rtx
, 0);
4735 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4737 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4741 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4743 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4745 value
= flip_storage_order (str_mode
, value
);
4746 result
= expand_binop (str_mode
, binop
, str_rtx
,
4747 value
, str_rtx
, 1, OPTAB_WIDEN
);
4748 if (result
!= str_rtx
)
4749 emit_move_insn (str_rtx
, result
);
4754 if (TREE_CODE (op1
) != INTEGER_CST
)
4756 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4757 value
= convert_modes (str_mode
,
4758 TYPE_MODE (TREE_TYPE (op1
)), value
,
4759 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4761 /* We may be accessing data outside the field, which means
4762 we can alias adjacent data. */
4763 if (MEM_P (str_rtx
))
4765 str_rtx
= shallow_copy_rtx (str_rtx
);
4766 set_mem_alias_set (str_rtx
, 0);
4767 set_mem_expr (str_rtx
, 0);
4770 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4771 if (bitpos
+ bitsize
!= str_bitsize
)
4773 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4775 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4777 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4779 value
= flip_storage_order (str_mode
, value
);
4780 result
= expand_binop (str_mode
, binop
, str_rtx
,
4781 value
, str_rtx
, 1, OPTAB_WIDEN
);
4782 if (result
!= str_rtx
)
4783 emit_move_insn (str_rtx
, result
);
4793 /* In the C++ memory model, consecutive bit fields in a structure are
4794 considered one memory location.
4796 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4797 returns the bit range of consecutive bits in which this COMPONENT_REF
4798 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4799 and *OFFSET may be adjusted in the process.
4801 If the access does not need to be restricted, 0 is returned in both
4802 *BITSTART and *BITEND. */
4805 get_bit_range (unsigned HOST_WIDE_INT
*bitstart
,
4806 unsigned HOST_WIDE_INT
*bitend
,
4808 HOST_WIDE_INT
*bitpos
,
4811 HOST_WIDE_INT bitoffset
;
4814 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4816 field
= TREE_OPERAND (exp
, 1);
4817 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4818 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4819 need to limit the range we can access. */
4822 *bitstart
= *bitend
= 0;
4826 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4827 part of a larger bit field, then the representative does not serve any
4828 useful purpose. This can occur in Ada. */
4829 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4832 HOST_WIDE_INT rbitsize
, rbitpos
;
4834 int unsignedp
, reversep
, volatilep
= 0;
4835 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4836 &roffset
, &rmode
, &unsignedp
, &reversep
,
4838 if ((rbitpos
% BITS_PER_UNIT
) != 0)
4840 *bitstart
= *bitend
= 0;
4845 /* Compute the adjustment to bitpos from the offset of the field
4846 relative to the representative. DECL_FIELD_OFFSET of field and
4847 repr are the same by construction if they are not constants,
4848 see finish_bitfield_layout. */
4849 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field
))
4850 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr
)))
4851 bitoffset
= (tree_to_uhwi (DECL_FIELD_OFFSET (field
))
4852 - tree_to_uhwi (DECL_FIELD_OFFSET (repr
))) * BITS_PER_UNIT
;
4855 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4856 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4858 /* If the adjustment is larger than bitpos, we would have a negative bit
4859 position for the lower bound and this may wreak havoc later. Adjust
4860 offset and bitpos to make the lower bound non-negative in that case. */
4861 if (bitoffset
> *bitpos
)
4863 HOST_WIDE_INT adjust
= bitoffset
- *bitpos
;
4864 gcc_assert ((adjust
% BITS_PER_UNIT
) == 0);
4867 if (*offset
== NULL_TREE
)
4868 *offset
= size_int (-adjust
/ BITS_PER_UNIT
);
4871 = size_binop (MINUS_EXPR
, *offset
, size_int (adjust
/ BITS_PER_UNIT
));
4875 *bitstart
= *bitpos
- bitoffset
;
4877 *bitend
= *bitstart
+ tree_to_uhwi (DECL_SIZE (repr
)) - 1;
4880 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4881 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4882 DECL_RTL was not set yet, return NORTL. */
4885 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4887 if (TREE_CODE (addr
) != ADDR_EXPR
)
4890 tree base
= TREE_OPERAND (addr
, 0);
4893 || TREE_ADDRESSABLE (base
)
4894 || DECL_MODE (base
) == BLKmode
)
4897 if (!DECL_RTL_SET_P (base
))
4900 return (!MEM_P (DECL_RTL (base
)));
4903 /* Returns true if the MEM_REF REF refers to an object that does not
4904 reside in memory and has non-BLKmode. */
4907 mem_ref_refers_to_non_mem_p (tree ref
)
4909 tree base
= TREE_OPERAND (ref
, 0);
4910 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4913 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4914 is true, try generating a nontemporal store. */
4917 expand_assignment (tree to
, tree from
, bool nontemporal
)
4923 enum insn_code icode
;
4925 /* Don't crash if the lhs of the assignment was erroneous. */
4926 if (TREE_CODE (to
) == ERROR_MARK
)
4928 expand_normal (from
);
4932 /* Optimize away no-op moves without side-effects. */
4933 if (operand_equal_p (to
, from
, 0))
4936 /* Handle misaligned stores. */
4937 mode
= TYPE_MODE (TREE_TYPE (to
));
4938 if ((TREE_CODE (to
) == MEM_REF
4939 || TREE_CODE (to
) == TARGET_MEM_REF
)
4941 && !mem_ref_refers_to_non_mem_p (to
)
4942 && ((align
= get_object_alignment (to
))
4943 < GET_MODE_ALIGNMENT (mode
))
4944 && (((icode
= optab_handler (movmisalign_optab
, mode
))
4945 != CODE_FOR_nothing
)
4946 || targetm
.slow_unaligned_access (mode
, align
)))
4950 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
4951 reg
= force_not_mem (reg
);
4952 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4953 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
4954 reg
= flip_storage_order (mode
, reg
);
4956 if (icode
!= CODE_FOR_nothing
)
4958 struct expand_operand ops
[2];
4960 create_fixed_operand (&ops
[0], mem
);
4961 create_input_operand (&ops
[1], reg
, mode
);
4962 /* The movmisalign<mode> pattern cannot fail, else the assignment
4963 would silently be omitted. */
4964 expand_insn (icode
, 2, ops
);
4967 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
4972 /* Assignment of a structure component needs special treatment
4973 if the structure component's rtx is not simply a MEM.
4974 Assignment of an array element at a constant index, and assignment of
4975 an array element in an unaligned packed structure field, has the same
4976 problem. Same for (partially) storing into a non-memory object. */
4977 if (handled_component_p (to
)
4978 || (TREE_CODE (to
) == MEM_REF
4979 && (REF_REVERSE_STORAGE_ORDER (to
)
4980 || mem_ref_refers_to_non_mem_p (to
)))
4981 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
4984 HOST_WIDE_INT bitsize
, bitpos
;
4985 unsigned HOST_WIDE_INT bitregion_start
= 0;
4986 unsigned HOST_WIDE_INT bitregion_end
= 0;
4988 int unsignedp
, reversep
, volatilep
= 0;
4992 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
4993 &unsignedp
, &reversep
, &volatilep
);
4995 /* Make sure bitpos is not negative, it can wreak havoc later. */
4998 gcc_assert (offset
== NULL_TREE
);
4999 offset
= size_int (bitpos
>> LOG2_BITS_PER_UNIT
);
5000 bitpos
&= BITS_PER_UNIT
- 1;
5003 if (TREE_CODE (to
) == COMPONENT_REF
5004 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5005 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5006 /* The C++ memory model naturally applies to byte-aligned fields.
5007 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5008 BITSIZE are not byte-aligned, there is no need to limit the range
5009 we can access. This can occur with packed structures in Ada. */
5010 else if (bitsize
> 0
5011 && bitsize
% BITS_PER_UNIT
== 0
5012 && bitpos
% BITS_PER_UNIT
== 0)
5014 bitregion_start
= bitpos
;
5015 bitregion_end
= bitpos
+ bitsize
- 1;
5018 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5020 /* If the field has a mode, we want to access it in the
5021 field's mode, not the computed mode.
5022 If a MEM has VOIDmode (external with incomplete type),
5023 use BLKmode for it instead. */
5026 if (mode1
!= VOIDmode
)
5027 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5028 else if (GET_MODE (to_rtx
) == VOIDmode
)
5029 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5034 machine_mode address_mode
;
5037 if (!MEM_P (to_rtx
))
5039 /* We can get constant negative offsets into arrays with broken
5040 user code. Translate this to a trap instead of ICEing. */
5041 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5042 expand_builtin_trap ();
5043 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5046 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5047 address_mode
= get_address_mode (to_rtx
);
5048 if (GET_MODE (offset_rtx
) != address_mode
)
5050 /* We cannot be sure that the RTL in offset_rtx is valid outside
5051 of a memory address context, so force it into a register
5052 before attempting to convert it to the desired mode. */
5053 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5054 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5057 /* If we have an expression in OFFSET_RTX and a non-zero
5058 byte offset in BITPOS, adding the byte offset before the
5059 OFFSET_RTX results in better intermediate code, which makes
5060 later rtl optimization passes perform better.
5062 We prefer intermediate code like this:
5064 r124:DI=r123:DI+0x18
5069 r124:DI=r123:DI+0x10
5070 [r124:DI+0x8]=r121:DI
5072 This is only done for aligned data values, as these can
5073 be expected to result in single move instructions. */
5074 if (mode1
!= VOIDmode
5077 && (bitpos
% bitsize
) == 0
5078 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
5079 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5081 to_rtx
= adjust_address (to_rtx
, mode1
, bitpos
/ BITS_PER_UNIT
);
5082 bitregion_start
= 0;
5083 if (bitregion_end
>= (unsigned HOST_WIDE_INT
) bitpos
)
5084 bitregion_end
-= bitpos
;
5088 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5089 highest_pow2_factor_for_target (to
,
5093 /* No action is needed if the target is not a memory and the field
5094 lies completely outside that target. This can occur if the source
5095 code contains an out-of-bounds access to a small array. */
5097 && GET_MODE (to_rtx
) != BLKmode
5098 && (unsigned HOST_WIDE_INT
) bitpos
5099 >= GET_MODE_PRECISION (GET_MODE (to_rtx
)))
5101 expand_normal (from
);
5104 /* Handle expand_expr of a complex value returning a CONCAT. */
5105 else if (GET_CODE (to_rtx
) == CONCAT
)
5107 unsigned short mode_bitsize
= GET_MODE_BITSIZE (GET_MODE (to_rtx
));
5108 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from
)))
5110 && bitsize
== mode_bitsize
)
5111 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5112 else if (bitsize
== mode_bitsize
/ 2
5113 && (bitpos
== 0 || bitpos
== mode_bitsize
/ 2))
5114 result
= store_expr (from
, XEXP (to_rtx
, bitpos
!= 0), false,
5115 nontemporal
, reversep
);
5116 else if (bitpos
+ bitsize
<= mode_bitsize
/ 2)
5117 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5118 bitregion_start
, bitregion_end
,
5119 mode1
, from
, get_alias_set (to
),
5120 nontemporal
, reversep
);
5121 else if (bitpos
>= mode_bitsize
/ 2)
5122 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5123 bitpos
- mode_bitsize
/ 2,
5124 bitregion_start
, bitregion_end
,
5125 mode1
, from
, get_alias_set (to
),
5126 nontemporal
, reversep
);
5127 else if (bitpos
== 0 && bitsize
== mode_bitsize
)
5130 result
= expand_normal (from
);
5131 from_rtx
= simplify_gen_subreg (GET_MODE (to_rtx
), result
,
5132 TYPE_MODE (TREE_TYPE (from
)), 0);
5133 emit_move_insn (XEXP (to_rtx
, 0),
5134 read_complex_part (from_rtx
, false));
5135 emit_move_insn (XEXP (to_rtx
, 1),
5136 read_complex_part (from_rtx
, true));
5140 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5141 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5142 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5143 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5144 result
= store_field (temp
, bitsize
, bitpos
,
5145 bitregion_start
, bitregion_end
,
5146 mode1
, from
, get_alias_set (to
),
5147 nontemporal
, reversep
);
5148 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5149 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5156 /* If the field is at offset zero, we could have been given the
5157 DECL_RTX of the parent struct. Don't munge it. */
5158 to_rtx
= shallow_copy_rtx (to_rtx
);
5159 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5161 MEM_VOLATILE_P (to_rtx
) = 1;
5164 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5165 bitregion_start
, bitregion_end
,
5166 mode1
, to_rtx
, to
, from
,
5170 result
= store_field (to_rtx
, bitsize
, bitpos
,
5171 bitregion_start
, bitregion_end
,
5172 mode1
, from
, get_alias_set (to
),
5173 nontemporal
, reversep
);
5177 preserve_temp_slots (result
);
5182 /* If the rhs is a function call and its value is not an aggregate,
5183 call the function before we start to compute the lhs.
5184 This is needed for correct code for cases such as
5185 val = setjmp (buf) on machines where reference to val
5186 requires loading up part of an address in a separate insn.
5188 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5189 since it might be a promoted variable where the zero- or sign- extension
5190 needs to be done. Handling this in the normal way is safe because no
5191 computation is done before the call. The same is true for SSA names. */
5192 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5193 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5194 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5196 || TREE_CODE (to
) == PARM_DECL
5197 || TREE_CODE (to
) == RESULT_DECL
)
5198 && REG_P (DECL_RTL (to
)))
5199 || TREE_CODE (to
) == SSA_NAME
))
5205 value
= expand_normal (from
);
5207 /* Split value and bounds to store them separately. */
5208 chkp_split_slot (value
, &value
, &bounds
);
5211 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5213 /* Handle calls that return values in multiple non-contiguous locations.
5214 The Irix 6 ABI has examples of this. */
5215 if (GET_CODE (to_rtx
) == PARALLEL
)
5217 if (GET_CODE (value
) == PARALLEL
)
5218 emit_group_move (to_rtx
, value
);
5220 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5221 int_size_in_bytes (TREE_TYPE (from
)));
5223 else if (GET_CODE (value
) == PARALLEL
)
5224 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5225 int_size_in_bytes (TREE_TYPE (from
)));
5226 else if (GET_MODE (to_rtx
) == BLKmode
)
5228 /* Handle calls that return BLKmode values in registers. */
5230 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5232 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5236 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5237 value
= convert_memory_address_addr_space
5238 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5239 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5241 emit_move_insn (to_rtx
, value
);
5244 /* Store bounds if required. */
5246 && (BOUNDED_P (to
) || chkp_type_has_pointer (TREE_TYPE (to
))))
5248 gcc_assert (MEM_P (to_rtx
));
5249 chkp_emit_bounds_store (bounds
, value
, to_rtx
);
5252 preserve_temp_slots (to_rtx
);
5257 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5258 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5260 /* Don't move directly into a return register. */
5261 if (TREE_CODE (to
) == RESULT_DECL
5262 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5268 /* If the source is itself a return value, it still is in a pseudo at
5269 this point so we can move it back to the return register directly. */
5271 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5272 && TREE_CODE (from
) != CALL_EXPR
)
5273 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5275 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5277 /* Handle calls that return values in multiple non-contiguous locations.
5278 The Irix 6 ABI has examples of this. */
5279 if (GET_CODE (to_rtx
) == PARALLEL
)
5281 if (GET_CODE (temp
) == PARALLEL
)
5282 emit_group_move (to_rtx
, temp
);
5284 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5285 int_size_in_bytes (TREE_TYPE (from
)));
5288 emit_move_insn (to_rtx
, temp
);
5290 preserve_temp_slots (to_rtx
);
5295 /* In case we are returning the contents of an object which overlaps
5296 the place the value is being stored, use a safe function when copying
5297 a value through a pointer into a structure value return block. */
5298 if (TREE_CODE (to
) == RESULT_DECL
5299 && TREE_CODE (from
) == INDIRECT_REF
5300 && ADDR_SPACE_GENERIC_P
5301 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5302 && refs_may_alias_p (to
, from
)
5303 && cfun
->returns_struct
5304 && !cfun
->returns_pcc_struct
)
5309 size
= expr_size (from
);
5310 from_rtx
= expand_normal (from
);
5312 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5314 preserve_temp_slots (to_rtx
);
5319 /* Compute FROM and store the value in the rtx we got. */
5322 result
= store_expr_with_bounds (from
, to_rtx
, 0, nontemporal
, false, to
);
5323 preserve_temp_slots (result
);
5328 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5329 succeeded, false otherwise. */
5332 emit_storent_insn (rtx to
, rtx from
)
5334 struct expand_operand ops
[2];
5335 machine_mode mode
= GET_MODE (to
);
5336 enum insn_code code
= optab_handler (storent_optab
, mode
);
5338 if (code
== CODE_FOR_nothing
)
5341 create_fixed_operand (&ops
[0], to
);
5342 create_input_operand (&ops
[1], from
, mode
);
5343 return maybe_expand_insn (code
, 2, ops
);
5346 /* Generate code for computing expression EXP,
5347 and storing the value into TARGET.
5349 If the mode is BLKmode then we may return TARGET itself.
5350 It turns out that in BLKmode it doesn't cause a problem.
5351 because C has no operators that could combine two different
5352 assignments into the same BLKmode object with different values
5353 with no sequence point. Will other languages need this to
5356 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5357 stack, and block moves may need to be treated specially.
5359 If NONTEMPORAL is true, try using a nontemporal store instruction.
5361 If REVERSE is true, the store is to be done in reverse order.
5363 If BTARGET is not NULL then computed bounds of EXP are
5364 associated with BTARGET. */
5367 store_expr_with_bounds (tree exp
, rtx target
, int call_param_p
,
5368 bool nontemporal
, bool reverse
, tree btarget
)
5371 rtx alt_rtl
= NULL_RTX
;
5372 location_t loc
= curr_insn_location ();
5374 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5376 /* C++ can generate ?: expressions with a throw expression in one
5377 branch and an rvalue in the other. Here, we resolve attempts to
5378 store the throw expression's nonexistent result. */
5379 gcc_assert (!call_param_p
);
5380 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5383 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5385 /* Perform first part of compound expression, then assign from second
5387 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5388 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5389 return store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
,
5390 call_param_p
, nontemporal
, reverse
,
5393 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5395 /* For conditional expression, get safe form of the target. Then
5396 test the condition, doing the appropriate assignment on either
5397 side. This avoids the creation of unnecessary temporaries.
5398 For non-BLKmode, it is more efficient not to do this. */
5400 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5402 do_pending_stack_adjust ();
5404 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5405 profile_probability::uninitialized ());
5406 store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5407 nontemporal
, reverse
, btarget
);
5408 emit_jump_insn (targetm
.gen_jump (lab2
));
5411 store_expr_with_bounds (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5412 nontemporal
, reverse
, btarget
);
5418 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5419 /* If this is a scalar in a register that is stored in a wider mode
5420 than the declared mode, compute the result into its declared mode
5421 and then convert to the wider mode. Our value is the computed
5424 rtx inner_target
= 0;
5425 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5426 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5428 /* We can do the conversion inside EXP, which will often result
5429 in some optimizations. Do the conversion in two steps: first
5430 change the signedness, if needed, then the extend. But don't
5431 do this if the type of EXP is a subtype of something else
5432 since then the conversion might involve more than just
5433 converting modes. */
5434 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5435 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5436 && GET_MODE_PRECISION (outer_mode
)
5437 == TYPE_PRECISION (TREE_TYPE (exp
)))
5439 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5440 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5442 /* Some types, e.g. Fortran's logical*4, won't have a signed
5443 version, so use the mode instead. */
5445 = (signed_or_unsigned_type_for
5446 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5448 ntype
= lang_hooks
.types
.type_for_mode
5449 (TYPE_MODE (TREE_TYPE (exp
)),
5450 SUBREG_PROMOTED_SIGN (target
));
5452 exp
= fold_convert_loc (loc
, ntype
, exp
);
5455 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5456 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5459 inner_target
= SUBREG_REG (target
);
5462 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5463 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5465 /* Handle bounds returned by call. */
5466 if (TREE_CODE (exp
) == CALL_EXPR
)
5469 chkp_split_slot (temp
, &temp
, &bounds
);
5470 if (bounds
&& btarget
)
5472 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5473 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5474 chkp_set_rtl_bounds (btarget
, tmp
);
5478 /* If TEMP is a VOIDmode constant, use convert_modes to make
5479 sure that we properly convert it. */
5480 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5482 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5483 temp
, SUBREG_PROMOTED_SIGN (target
));
5484 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5485 SUBREG_PROMOTED_SIGN (target
));
5488 convert_move (SUBREG_REG (target
), temp
,
5489 SUBREG_PROMOTED_SIGN (target
));
5493 else if ((TREE_CODE (exp
) == STRING_CST
5494 || (TREE_CODE (exp
) == MEM_REF
5495 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5496 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5498 && integer_zerop (TREE_OPERAND (exp
, 1))))
5499 && !nontemporal
&& !call_param_p
5502 /* Optimize initialization of an array with a STRING_CST. */
5503 HOST_WIDE_INT exp_len
, str_copy_len
;
5505 tree str
= TREE_CODE (exp
) == STRING_CST
5506 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5508 exp_len
= int_expr_size (exp
);
5512 if (TREE_STRING_LENGTH (str
) <= 0)
5515 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5516 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5519 str_copy_len
= TREE_STRING_LENGTH (str
);
5520 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5521 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5523 str_copy_len
+= STORE_MAX_PIECES
- 1;
5524 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5526 str_copy_len
= MIN (str_copy_len
, exp_len
);
5527 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5528 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5529 MEM_ALIGN (target
), false))
5534 dest_mem
= store_by_pieces (dest_mem
,
5535 str_copy_len
, builtin_strncpy_read_str
,
5537 TREE_STRING_POINTER (str
)),
5538 MEM_ALIGN (target
), false,
5539 exp_len
> str_copy_len
? 1 : 0);
5540 if (exp_len
> str_copy_len
)
5541 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5542 GEN_INT (exp_len
- str_copy_len
),
5551 /* If we want to use a nontemporal or a reverse order store, force the
5552 value into a register first. */
5553 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5554 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5556 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5559 /* Handle bounds returned by call. */
5560 if (TREE_CODE (exp
) == CALL_EXPR
)
5563 chkp_split_slot (temp
, &temp
, &bounds
);
5564 if (bounds
&& btarget
)
5566 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5567 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5568 chkp_set_rtl_bounds (btarget
, tmp
);
5573 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5574 the same as that of TARGET, adjust the constant. This is needed, for
5575 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5576 only a word-sized value. */
5577 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5578 && TREE_CODE (exp
) != ERROR_MARK
5579 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5580 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5581 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5583 /* If value was not generated in the target, store it there.
5584 Convert the value to TARGET's type first if necessary and emit the
5585 pending incrementations that have been queued when expanding EXP.
5586 Note that we cannot emit the whole queue blindly because this will
5587 effectively disable the POST_INC optimization later.
5589 If TEMP and TARGET compare equal according to rtx_equal_p, but
5590 one or both of them are volatile memory refs, we have to distinguish
5592 - expand_expr has used TARGET. In this case, we must not generate
5593 another copy. This can be detected by TARGET being equal according
5595 - expand_expr has not used TARGET - that means that the source just
5596 happens to have the same RTX form. Since temp will have been created
5597 by expand_expr, it will compare unequal according to == .
5598 We must generate a copy in this case, to reach the correct number
5599 of volatile memory references. */
5601 if ((! rtx_equal_p (temp
, target
)
5602 || (temp
!= target
&& (side_effects_p (temp
)
5603 || side_effects_p (target
))))
5604 && TREE_CODE (exp
) != ERROR_MARK
5605 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5606 but TARGET is not valid memory reference, TEMP will differ
5607 from TARGET although it is really the same location. */
5609 && rtx_equal_p (alt_rtl
, target
)
5610 && !side_effects_p (alt_rtl
)
5611 && !side_effects_p (target
))
5612 /* If there's nothing to copy, don't bother. Don't call
5613 expr_size unless necessary, because some front-ends (C++)
5614 expr_size-hook must not be given objects that are not
5615 supposed to be bit-copied or bit-initialized. */
5616 && expr_size (exp
) != const0_rtx
)
5618 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5620 if (GET_MODE (target
) == BLKmode
)
5622 /* Handle calls that return BLKmode values in registers. */
5623 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5624 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5626 store_bit_field (target
,
5627 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5628 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5631 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5634 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5636 /* Handle copying a string constant into an array. The string
5637 constant may be shorter than the array. So copy just the string's
5638 actual length, and clear the rest. First get the size of the data
5639 type of the string, which is actually the size of the target. */
5640 rtx size
= expr_size (exp
);
5642 if (CONST_INT_P (size
)
5643 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5644 emit_block_move (target
, temp
, size
,
5646 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5649 machine_mode pointer_mode
5650 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5651 machine_mode address_mode
= get_address_mode (target
);
5653 /* Compute the size of the data to copy from the string. */
5655 = size_binop_loc (loc
, MIN_EXPR
,
5656 make_tree (sizetype
, size
),
5657 size_int (TREE_STRING_LENGTH (exp
)));
5659 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5661 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5662 rtx_code_label
*label
= 0;
5664 /* Copy that much. */
5665 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5666 TYPE_UNSIGNED (sizetype
));
5667 emit_block_move (target
, temp
, copy_size_rtx
,
5669 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5671 /* Figure out how much is left in TARGET that we have to clear.
5672 Do all calculations in pointer_mode. */
5673 if (CONST_INT_P (copy_size_rtx
))
5675 size
= plus_constant (address_mode
, size
,
5676 -INTVAL (copy_size_rtx
));
5677 target
= adjust_address (target
, BLKmode
,
5678 INTVAL (copy_size_rtx
));
5682 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5683 copy_size_rtx
, NULL_RTX
, 0,
5686 if (GET_MODE (copy_size_rtx
) != address_mode
)
5687 copy_size_rtx
= convert_to_mode (address_mode
,
5689 TYPE_UNSIGNED (sizetype
));
5691 target
= offset_address (target
, copy_size_rtx
,
5692 highest_pow2_factor (copy_size
));
5693 label
= gen_label_rtx ();
5694 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5695 GET_MODE (size
), 0, label
);
5698 if (size
!= const0_rtx
)
5699 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5705 /* Handle calls that return values in multiple non-contiguous locations.
5706 The Irix 6 ABI has examples of this. */
5707 else if (GET_CODE (target
) == PARALLEL
)
5709 if (GET_CODE (temp
) == PARALLEL
)
5710 emit_group_move (target
, temp
);
5712 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5713 int_size_in_bytes (TREE_TYPE (exp
)));
5715 else if (GET_CODE (temp
) == PARALLEL
)
5716 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5717 int_size_in_bytes (TREE_TYPE (exp
)));
5718 else if (GET_MODE (temp
) == BLKmode
)
5719 emit_block_move (target
, temp
, expr_size (exp
),
5721 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5722 /* If we emit a nontemporal store, there is nothing else to do. */
5723 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5728 temp
= flip_storage_order (GET_MODE (target
), temp
);
5729 temp
= force_operand (temp
, target
);
5731 emit_move_insn (target
, temp
);
5738 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5740 store_expr (tree exp
, rtx target
, int call_param_p
, bool nontemporal
,
5743 return store_expr_with_bounds (exp
, target
, call_param_p
, nontemporal
,
5747 /* Return true if field F of structure TYPE is a flexible array. */
5750 flexible_array_member_p (const_tree f
, const_tree type
)
5755 return (DECL_CHAIN (f
) == NULL
5756 && TREE_CODE (tf
) == ARRAY_TYPE
5758 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5759 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5760 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5761 && int_size_in_bytes (type
) >= 0);
5764 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5765 must have in order for it to completely initialize a value of type TYPE.
5766 Return -1 if the number isn't known.
5768 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5770 static HOST_WIDE_INT
5771 count_type_elements (const_tree type
, bool for_ctor_p
)
5773 switch (TREE_CODE (type
))
5779 nelts
= array_type_nelts (type
);
5780 if (nelts
&& tree_fits_uhwi_p (nelts
))
5782 unsigned HOST_WIDE_INT n
;
5784 n
= tree_to_uhwi (nelts
) + 1;
5785 if (n
== 0 || for_ctor_p
)
5788 return n
* count_type_elements (TREE_TYPE (type
), false);
5790 return for_ctor_p
? -1 : 1;
5795 unsigned HOST_WIDE_INT n
;
5799 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5800 if (TREE_CODE (f
) == FIELD_DECL
)
5803 n
+= count_type_elements (TREE_TYPE (f
), false);
5804 else if (!flexible_array_member_p (f
, type
))
5805 /* Don't count flexible arrays, which are not supposed
5806 to be initialized. */
5814 case QUAL_UNION_TYPE
:
5819 gcc_assert (!for_ctor_p
);
5820 /* Estimate the number of scalars in each field and pick the
5821 maximum. Other estimates would do instead; the idea is simply
5822 to make sure that the estimate is not sensitive to the ordering
5825 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5826 if (TREE_CODE (f
) == FIELD_DECL
)
5828 m
= count_type_elements (TREE_TYPE (f
), false);
5829 /* If the field doesn't span the whole union, add an extra
5830 scalar for the rest. */
5831 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5832 TYPE_SIZE (type
)) != 1)
5844 return TYPE_VECTOR_SUBPARTS (type
);
5848 case FIXED_POINT_TYPE
:
5853 case REFERENCE_TYPE
:
5869 /* Helper for categorize_ctor_elements. Identical interface. */
5872 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5873 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5875 unsigned HOST_WIDE_INT idx
;
5876 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5877 tree value
, purpose
, elt_type
;
5879 /* Whether CTOR is a valid constant initializer, in accordance with what
5880 initializer_constant_valid_p does. If inferred from the constructor
5881 elements, true until proven otherwise. */
5882 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5883 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5888 elt_type
= NULL_TREE
;
5890 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5892 HOST_WIDE_INT mult
= 1;
5894 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5896 tree lo_index
= TREE_OPERAND (purpose
, 0);
5897 tree hi_index
= TREE_OPERAND (purpose
, 1);
5899 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
5900 mult
= (tree_to_uhwi (hi_index
)
5901 - tree_to_uhwi (lo_index
) + 1);
5904 elt_type
= TREE_TYPE (value
);
5906 switch (TREE_CODE (value
))
5910 HOST_WIDE_INT nz
= 0, ic
= 0;
5912 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
5915 nz_elts
+= mult
* nz
;
5916 init_elts
+= mult
* ic
;
5918 if (const_from_elts_p
&& const_p
)
5919 const_p
= const_elt_p
;
5926 if (!initializer_zerop (value
))
5932 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
5933 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
5937 if (!initializer_zerop (TREE_REALPART (value
)))
5939 if (!initializer_zerop (TREE_IMAGPART (value
)))
5947 for (i
= 0; i
< VECTOR_CST_NELTS (value
); ++i
)
5949 tree v
= VECTOR_CST_ELT (value
, i
);
5950 if (!initializer_zerop (v
))
5959 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
5960 nz_elts
+= mult
* tc
;
5961 init_elts
+= mult
* tc
;
5963 if (const_from_elts_p
&& const_p
)
5965 = initializer_constant_valid_p (value
,
5967 TYPE_REVERSE_STORAGE_ORDER
5975 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
5976 num_fields
, elt_type
))
5977 *p_complete
= false;
5979 *p_nz_elts
+= nz_elts
;
5980 *p_init_elts
+= init_elts
;
5985 /* Examine CTOR to discover:
5986 * how many scalar fields are set to nonzero values,
5987 and place it in *P_NZ_ELTS;
5988 * how many scalar fields in total are in CTOR,
5989 and place it in *P_ELT_COUNT.
5990 * whether the constructor is complete -- in the sense that every
5991 meaningful byte is explicitly given a value --
5992 and place it in *P_COMPLETE.
5994 Return whether or not CTOR is a valid static constant initializer, the same
5995 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5998 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5999 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6005 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
6008 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6009 of which had type LAST_TYPE. Each element was itself a complete
6010 initializer, in the sense that every meaningful byte was explicitly
6011 given a value. Return true if the same is true for the constructor
6015 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6016 const_tree last_type
)
6018 if (TREE_CODE (type
) == UNION_TYPE
6019 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6024 gcc_assert (num_elts
== 1 && last_type
);
6026 /* ??? We could look at each element of the union, and find the
6027 largest element. Which would avoid comparing the size of the
6028 initialized element against any tail padding in the union.
6029 Doesn't seem worth the effort... */
6030 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6033 return count_type_elements (type
, true) == num_elts
;
6036 /* Return 1 if EXP contains mostly (3/4) zeros. */
6039 mostly_zeros_p (const_tree exp
)
6041 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6043 HOST_WIDE_INT nz_elts
, init_elts
;
6046 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6047 return !complete_p
|| nz_elts
< init_elts
/ 4;
6050 return initializer_zerop (exp
);
6053 /* Return 1 if EXP contains all zeros. */
6056 all_zeros_p (const_tree exp
)
6058 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6060 HOST_WIDE_INT nz_elts
, init_elts
;
6063 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6064 return nz_elts
== 0;
6067 return initializer_zerop (exp
);
6070 /* Helper function for store_constructor.
6071 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6072 CLEARED is as for store_constructor.
6073 ALIAS_SET is the alias set to use for any stores.
6074 If REVERSE is true, the store is to be done in reverse order.
6076 This provides a recursive shortcut back to store_constructor when it isn't
6077 necessary to go through store_field. This is so that we can pass through
6078 the cleared field to let store_constructor know that we may not have to
6079 clear a substructure if the outer structure has already been cleared. */
6082 store_constructor_field (rtx target
, unsigned HOST_WIDE_INT bitsize
,
6083 HOST_WIDE_INT bitpos
,
6084 unsigned HOST_WIDE_INT bitregion_start
,
6085 unsigned HOST_WIDE_INT bitregion_end
,
6087 tree exp
, int cleared
,
6088 alias_set_type alias_set
, bool reverse
)
6090 if (TREE_CODE (exp
) == CONSTRUCTOR
6091 /* We can only call store_constructor recursively if the size and
6092 bit position are on a byte boundary. */
6093 && bitpos
% BITS_PER_UNIT
== 0
6094 && (bitsize
> 0 && bitsize
% BITS_PER_UNIT
== 0)
6095 /* If we have a nonzero bitpos for a register target, then we just
6096 let store_field do the bitfield handling. This is unlikely to
6097 generate unnecessary clear instructions anyways. */
6098 && (bitpos
== 0 || MEM_P (target
)))
6102 = adjust_address (target
,
6103 GET_MODE (target
) == BLKmode
6105 % GET_MODE_ALIGNMENT (GET_MODE (target
)))
6106 ? BLKmode
: VOIDmode
, bitpos
/ BITS_PER_UNIT
);
6109 /* Update the alias set, if required. */
6110 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6111 && MEM_ALIAS_SET (target
) != 0)
6113 target
= copy_rtx (target
);
6114 set_mem_alias_set (target
, alias_set
);
6117 store_constructor (exp
, target
, cleared
, bitsize
/ BITS_PER_UNIT
,
6121 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6122 exp
, alias_set
, false, reverse
);
6126 /* Returns the number of FIELD_DECLs in TYPE. */
6129 fields_length (const_tree type
)
6131 tree t
= TYPE_FIELDS (type
);
6134 for (; t
; t
= DECL_CHAIN (t
))
6135 if (TREE_CODE (t
) == FIELD_DECL
)
6142 /* Store the value of constructor EXP into the rtx TARGET.
6143 TARGET is either a REG or a MEM; we know it cannot conflict, since
6144 safe_from_p has been called.
6145 CLEARED is true if TARGET is known to have been zero'd.
6146 SIZE is the number of bytes of TARGET we are allowed to modify: this
6147 may not be the same as the size of EXP if we are assigning to a field
6148 which has been packed to exclude padding bits.
6149 If REVERSE is true, the store is to be done in reverse order. */
6152 store_constructor (tree exp
, rtx target
, int cleared
, HOST_WIDE_INT size
,
6155 tree type
= TREE_TYPE (exp
);
6156 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6157 HOST_WIDE_INT bitregion_end
= size
> 0 ? size
* BITS_PER_UNIT
- 1 : 0;
6159 switch (TREE_CODE (type
))
6163 case QUAL_UNION_TYPE
:
6165 unsigned HOST_WIDE_INT idx
;
6168 /* The storage order is specified for every aggregate type. */
6169 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6171 /* If size is zero or the target is already cleared, do nothing. */
6172 if (size
== 0 || cleared
)
6174 /* We either clear the aggregate or indicate the value is dead. */
6175 else if ((TREE_CODE (type
) == UNION_TYPE
6176 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6177 && ! CONSTRUCTOR_ELTS (exp
))
6178 /* If the constructor is empty, clear the union. */
6180 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6184 /* If we are building a static constructor into a register,
6185 set the initial value as zero so we can fold the value into
6186 a constant. But if more than one register is involved,
6187 this probably loses. */
6188 else if (REG_P (target
) && TREE_STATIC (exp
)
6189 && GET_MODE_SIZE (GET_MODE (target
)) <= UNITS_PER_WORD
)
6191 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6195 /* If the constructor has fewer fields than the structure or
6196 if we are initializing the structure to mostly zeros, clear
6197 the whole structure first. Don't do this if TARGET is a
6198 register whose mode size isn't equal to SIZE since
6199 clear_storage can't handle this case. */
6201 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6202 || mostly_zeros_p (exp
))
6204 || ((HOST_WIDE_INT
) GET_MODE_SIZE (GET_MODE (target
))
6207 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6211 if (REG_P (target
) && !cleared
)
6212 emit_clobber (target
);
6214 /* Store each element of the constructor into the
6215 corresponding field of TARGET. */
6216 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6219 HOST_WIDE_INT bitsize
;
6220 HOST_WIDE_INT bitpos
= 0;
6222 rtx to_rtx
= target
;
6224 /* Just ignore missing fields. We cleared the whole
6225 structure, above, if any fields are missing. */
6229 if (cleared
&& initializer_zerop (value
))
6232 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6233 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6237 mode
= DECL_MODE (field
);
6238 if (DECL_BIT_FIELD (field
))
6241 offset
= DECL_FIELD_OFFSET (field
);
6242 if (tree_fits_shwi_p (offset
)
6243 && tree_fits_shwi_p (bit_position (field
)))
6245 bitpos
= int_bit_position (field
);
6251 /* If this initializes a field that is smaller than a
6252 word, at the start of a word, try to widen it to a full
6253 word. This special case allows us to output C++ member
6254 function initializations in a form that the optimizers
6256 if (WORD_REGISTER_OPERATIONS
6258 && bitsize
< BITS_PER_WORD
6259 && bitpos
% BITS_PER_WORD
== 0
6260 && GET_MODE_CLASS (mode
) == MODE_INT
6261 && TREE_CODE (value
) == INTEGER_CST
6263 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6265 tree type
= TREE_TYPE (value
);
6267 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6269 type
= lang_hooks
.types
.type_for_mode
6270 (word_mode
, TYPE_UNSIGNED (type
));
6271 value
= fold_convert (type
, value
);
6272 /* Make sure the bits beyond the original bitsize are zero
6273 so that we can correctly avoid extra zeroing stores in
6274 later constructor elements. */
6276 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6278 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6281 if (BYTES_BIG_ENDIAN
)
6283 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6284 build_int_cst (type
,
6285 BITS_PER_WORD
- bitsize
));
6286 bitsize
= BITS_PER_WORD
;
6290 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6291 && DECL_NONADDRESSABLE_P (field
))
6293 to_rtx
= copy_rtx (to_rtx
);
6294 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6297 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6298 0, bitregion_end
, mode
,
6300 get_alias_set (TREE_TYPE (field
)),
6308 unsigned HOST_WIDE_INT i
;
6311 tree elttype
= TREE_TYPE (type
);
6313 HOST_WIDE_INT minelt
= 0;
6314 HOST_WIDE_INT maxelt
= 0;
6316 /* The storage order is specified for every aggregate type. */
6317 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6319 domain
= TYPE_DOMAIN (type
);
6320 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6321 && TYPE_MAX_VALUE (domain
)
6322 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6323 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6325 /* If we have constant bounds for the range of the type, get them. */
6328 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6329 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6332 /* If the constructor has fewer elements than the array, clear
6333 the whole array first. Similarly if this is static
6334 constructor of a non-BLKmode object. */
6337 else if (REG_P (target
) && TREE_STATIC (exp
))
6341 unsigned HOST_WIDE_INT idx
;
6343 HOST_WIDE_INT count
= 0, zero_count
= 0;
6344 need_to_clear
= ! const_bounds_p
;
6346 /* This loop is a more accurate version of the loop in
6347 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6348 is also needed to check for missing elements. */
6349 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6351 HOST_WIDE_INT this_node_count
;
6356 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6358 tree lo_index
= TREE_OPERAND (index
, 0);
6359 tree hi_index
= TREE_OPERAND (index
, 1);
6361 if (! tree_fits_uhwi_p (lo_index
)
6362 || ! tree_fits_uhwi_p (hi_index
))
6368 this_node_count
= (tree_to_uhwi (hi_index
)
6369 - tree_to_uhwi (lo_index
) + 1);
6372 this_node_count
= 1;
6374 count
+= this_node_count
;
6375 if (mostly_zeros_p (value
))
6376 zero_count
+= this_node_count
;
6379 /* Clear the entire array first if there are any missing
6380 elements, or if the incidence of zero elements is >=
6383 && (count
< maxelt
- minelt
+ 1
6384 || 4 * zero_count
>= 3 * count
))
6388 if (need_to_clear
&& size
> 0)
6391 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6393 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6397 if (!cleared
&& REG_P (target
))
6398 /* Inform later passes that the old value is dead. */
6399 emit_clobber (target
);
6401 /* Store each element of the constructor into the
6402 corresponding element of TARGET, determined by counting the
6404 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6407 HOST_WIDE_INT bitsize
;
6408 HOST_WIDE_INT bitpos
;
6409 rtx xtarget
= target
;
6411 if (cleared
&& initializer_zerop (value
))
6414 mode
= TYPE_MODE (elttype
);
6415 if (mode
== BLKmode
)
6416 bitsize
= (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6417 ? tree_to_uhwi (TYPE_SIZE (elttype
))
6420 bitsize
= GET_MODE_BITSIZE (mode
);
6422 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6424 tree lo_index
= TREE_OPERAND (index
, 0);
6425 tree hi_index
= TREE_OPERAND (index
, 1);
6426 rtx index_r
, pos_rtx
;
6427 HOST_WIDE_INT lo
, hi
, count
;
6430 /* If the range is constant and "small", unroll the loop. */
6432 && tree_fits_shwi_p (lo_index
)
6433 && tree_fits_shwi_p (hi_index
)
6434 && (lo
= tree_to_shwi (lo_index
),
6435 hi
= tree_to_shwi (hi_index
),
6436 count
= hi
- lo
+ 1,
6439 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6440 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6443 lo
-= minelt
; hi
-= minelt
;
6444 for (; lo
<= hi
; lo
++)
6446 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6449 && !MEM_KEEP_ALIAS_SET_P (target
)
6450 && TREE_CODE (type
) == ARRAY_TYPE
6451 && TYPE_NONALIASED_COMPONENT (type
))
6453 target
= copy_rtx (target
);
6454 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6457 store_constructor_field
6458 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6459 mode
, value
, cleared
,
6460 get_alias_set (elttype
), reverse
);
6465 rtx_code_label
*loop_start
= gen_label_rtx ();
6466 rtx_code_label
*loop_end
= gen_label_rtx ();
6469 expand_normal (hi_index
);
6471 index
= build_decl (EXPR_LOCATION (exp
),
6472 VAR_DECL
, NULL_TREE
, domain
);
6473 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6474 SET_DECL_RTL (index
, index_r
);
6475 store_expr (lo_index
, index_r
, 0, false, reverse
);
6477 /* Build the head of the loop. */
6478 do_pending_stack_adjust ();
6479 emit_label (loop_start
);
6481 /* Assign value to element index. */
6483 fold_convert (ssizetype
,
6484 fold_build2 (MINUS_EXPR
,
6487 TYPE_MIN_VALUE (domain
)));
6490 size_binop (MULT_EXPR
, position
,
6491 fold_convert (ssizetype
,
6492 TYPE_SIZE_UNIT (elttype
)));
6494 pos_rtx
= expand_normal (position
);
6495 xtarget
= offset_address (target
, pos_rtx
,
6496 highest_pow2_factor (position
));
6497 xtarget
= adjust_address (xtarget
, mode
, 0);
6498 if (TREE_CODE (value
) == CONSTRUCTOR
)
6499 store_constructor (value
, xtarget
, cleared
,
6500 bitsize
/ BITS_PER_UNIT
, reverse
);
6502 store_expr (value
, xtarget
, 0, false, reverse
);
6504 /* Generate a conditional jump to exit the loop. */
6505 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6507 jumpif (exit_cond
, loop_end
,
6508 profile_probability::uninitialized ());
6510 /* Update the loop counter, and jump to the head of
6512 expand_assignment (index
,
6513 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6514 index
, integer_one_node
),
6517 emit_jump (loop_start
);
6519 /* Build the end of the loop. */
6520 emit_label (loop_end
);
6523 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6524 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6529 index
= ssize_int (1);
6532 index
= fold_convert (ssizetype
,
6533 fold_build2 (MINUS_EXPR
,
6536 TYPE_MIN_VALUE (domain
)));
6539 size_binop (MULT_EXPR
, index
,
6540 fold_convert (ssizetype
,
6541 TYPE_SIZE_UNIT (elttype
)));
6542 xtarget
= offset_address (target
,
6543 expand_normal (position
),
6544 highest_pow2_factor (position
));
6545 xtarget
= adjust_address (xtarget
, mode
, 0);
6546 store_expr (value
, xtarget
, 0, false, reverse
);
6551 bitpos
= ((tree_to_shwi (index
) - minelt
)
6552 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6554 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6556 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6557 && TREE_CODE (type
) == ARRAY_TYPE
6558 && TYPE_NONALIASED_COMPONENT (type
))
6560 target
= copy_rtx (target
);
6561 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6563 store_constructor_field (target
, bitsize
, bitpos
, 0,
6564 bitregion_end
, mode
, value
,
6565 cleared
, get_alias_set (elttype
),
6574 unsigned HOST_WIDE_INT idx
;
6575 constructor_elt
*ce
;
6578 int icode
= CODE_FOR_nothing
;
6579 tree elttype
= TREE_TYPE (type
);
6580 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6581 machine_mode eltmode
= TYPE_MODE (elttype
);
6582 HOST_WIDE_INT bitsize
;
6583 HOST_WIDE_INT bitpos
;
6584 rtvec vector
= NULL
;
6586 alias_set_type alias
;
6587 bool vec_vec_init_p
= false;
6589 gcc_assert (eltmode
!= BLKmode
);
6591 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6592 if (REG_P (target
) && VECTOR_MODE_P (GET_MODE (target
)))
6594 machine_mode mode
= GET_MODE (target
);
6595 machine_mode emode
= eltmode
;
6597 if (CONSTRUCTOR_NELTS (exp
)
6598 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6601 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6602 gcc_assert (CONSTRUCTOR_NELTS (exp
) * TYPE_VECTOR_SUBPARTS (etype
)
6604 emode
= TYPE_MODE (etype
);
6606 icode
= (int) convert_optab_handler (vec_init_optab
, mode
, emode
);
6607 if (icode
!= CODE_FOR_nothing
)
6609 unsigned int i
, n
= n_elts
;
6611 if (emode
!= eltmode
)
6613 n
= CONSTRUCTOR_NELTS (exp
);
6614 vec_vec_init_p
= true;
6616 vector
= rtvec_alloc (n
);
6617 for (i
= 0; i
< n
; i
++)
6618 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6622 /* If the constructor has fewer elements than the vector,
6623 clear the whole array first. Similarly if this is static
6624 constructor of a non-BLKmode object. */
6627 else if (REG_P (target
) && TREE_STATIC (exp
))
6631 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6634 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6636 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6638 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6639 TYPE_SIZE (elttype
)));
6641 count
+= n_elts_here
;
6642 if (mostly_zeros_p (value
))
6643 zero_count
+= n_elts_here
;
6646 /* Clear the entire vector first if there are any missing elements,
6647 or if the incidence of zero elements is >= 75%. */
6648 need_to_clear
= (count
< n_elts
|| 4 * zero_count
>= 3 * count
);
6651 if (need_to_clear
&& size
> 0 && !vector
)
6654 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6656 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6660 /* Inform later passes that the old value is dead. */
6661 if (!cleared
&& !vector
&& REG_P (target
))
6662 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6665 alias
= MEM_ALIAS_SET (target
);
6667 alias
= get_alias_set (elttype
);
6669 /* Store each element of the constructor into the corresponding
6670 element of TARGET, determined by counting the elements. */
6671 for (idx
= 0, i
= 0;
6672 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6673 idx
++, i
+= bitsize
/ elt_size
)
6675 HOST_WIDE_INT eltpos
;
6676 tree value
= ce
->value
;
6678 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6679 if (cleared
&& initializer_zerop (value
))
6683 eltpos
= tree_to_uhwi (ce
->index
);
6691 gcc_assert (ce
->index
== NULL_TREE
);
6692 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6696 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6697 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6701 machine_mode value_mode
6702 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6703 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6704 bitpos
= eltpos
* elt_size
;
6705 store_constructor_field (target
, bitsize
, bitpos
, 0,
6706 bitregion_end
, value_mode
,
6707 value
, cleared
, alias
, reverse
);
6712 emit_insn (GEN_FCN (icode
) (target
,
6713 gen_rtx_PARALLEL (GET_MODE (target
),
6723 /* Store the value of EXP (an expression tree)
6724 into a subfield of TARGET which has mode MODE and occupies
6725 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6726 If MODE is VOIDmode, it means that we are storing into a bit-field.
6728 BITREGION_START is bitpos of the first bitfield in this region.
6729 BITREGION_END is the bitpos of the ending bitfield in this region.
6730 These two fields are 0, if the C++ memory model does not apply,
6731 or we are not interested in keeping track of bitfield regions.
6733 Always return const0_rtx unless we have something particular to
6736 ALIAS_SET is the alias set for the destination. This value will
6737 (in general) be different from that for TARGET, since TARGET is a
6738 reference to the containing structure.
6740 If NONTEMPORAL is true, try generating a nontemporal store.
6742 If REVERSE is true, the store is to be done in reverse order. */
6745 store_field (rtx target
, HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitpos
,
6746 unsigned HOST_WIDE_INT bitregion_start
,
6747 unsigned HOST_WIDE_INT bitregion_end
,
6748 machine_mode mode
, tree exp
,
6749 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6751 if (TREE_CODE (exp
) == ERROR_MARK
)
6754 /* If we have nothing to store, do nothing unless the expression has
6755 side-effects. Don't do that for zero sized addressable lhs of
6758 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6759 || TREE_CODE (exp
) != CALL_EXPR
))
6760 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6762 if (GET_CODE (target
) == CONCAT
)
6764 /* We're storing into a struct containing a single __complex. */
6766 gcc_assert (!bitpos
);
6767 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6770 /* If the structure is in a register or if the component
6771 is a bit field, we cannot use addressing to access it.
6772 Use bit-field techniques or SUBREG to store in it. */
6774 if (mode
== VOIDmode
6775 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6776 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6777 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6779 || GET_CODE (target
) == SUBREG
6780 /* If the field isn't aligned enough to store as an ordinary memref,
6781 store it as a bit field. */
6783 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6784 || bitpos
% GET_MODE_ALIGNMENT (mode
))
6785 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6786 || (bitpos
% BITS_PER_UNIT
!= 0)))
6787 || (bitsize
>= 0 && mode
!= BLKmode
6788 && GET_MODE_BITSIZE (mode
) > bitsize
)
6789 /* If the RHS and field are a constant size and the size of the
6790 RHS isn't the same size as the bitfield, we must use bitfield
6793 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
6794 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)), bitsize
) != 0
6795 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6796 we will handle specially below. */
6797 && !(TREE_CODE (exp
) == CONSTRUCTOR
6798 && bitsize
% BITS_PER_UNIT
== 0)
6799 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6800 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6801 includes some extra padding. store_expr / expand_expr will in
6802 that case call get_inner_reference that will have the bitsize
6803 we check here and thus the block move will not clobber the
6804 padding that shouldn't be clobbered. In the future we could
6805 replace the TREE_ADDRESSABLE check with a check that
6806 get_base_address needs to live in memory. */
6807 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6808 || TREE_CODE (exp
) != COMPONENT_REF
6809 || TREE_CODE (DECL_SIZE (TREE_OPERAND (exp
, 1))) != INTEGER_CST
6810 || (bitsize
% BITS_PER_UNIT
!= 0)
6811 || (bitpos
% BITS_PER_UNIT
!= 0)
6812 || (compare_tree_int (DECL_SIZE (TREE_OPERAND (exp
, 1)), bitsize
)
6814 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6815 decl we must use bitfield operations. */
6817 && TREE_CODE (exp
) == MEM_REF
6818 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6819 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6820 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6821 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6826 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6827 implies a mask operation. If the precision is the same size as
6828 the field we're storing into, that mask is redundant. This is
6829 particularly common with bit field assignments generated by the
6831 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6834 tree type
= TREE_TYPE (exp
);
6835 if (INTEGRAL_TYPE_P (type
)
6836 && TYPE_PRECISION (type
) < GET_MODE_BITSIZE (TYPE_MODE (type
))
6837 && bitsize
== TYPE_PRECISION (type
))
6839 tree op
= gimple_assign_rhs1 (nop_def
);
6840 type
= TREE_TYPE (op
);
6841 if (INTEGRAL_TYPE_P (type
) && TYPE_PRECISION (type
) >= bitsize
)
6846 temp
= expand_normal (exp
);
6848 /* Handle calls that return values in multiple non-contiguous locations.
6849 The Irix 6 ABI has examples of this. */
6850 if (GET_CODE (temp
) == PARALLEL
)
6852 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6853 scalar_int_mode temp_mode
6854 = smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
6855 rtx temp_target
= gen_reg_rtx (temp_mode
);
6856 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6860 /* Handle calls that return BLKmode values in registers. */
6861 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6863 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
6864 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
6868 /* If the value has aggregate type and an integral mode then, if BITSIZE
6869 is narrower than this mode and this is for big-endian data, we first
6870 need to put the value into the low-order bits for store_bit_field,
6871 except when MODE is BLKmode and BITSIZE larger than the word size
6872 (see the handling of fields larger than a word in store_bit_field).
6873 Moreover, the field may be not aligned on a byte boundary; in this
6874 case, if it has reverse storage order, it needs to be accessed as a
6875 scalar field with reverse storage order and we must first put the
6876 value into target order. */
6877 scalar_int_mode temp_mode
;
6878 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
6879 && is_int_mode (GET_MODE (temp
), &temp_mode
))
6881 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
6883 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
6886 temp
= flip_storage_order (temp_mode
, temp
);
6889 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
6890 && !(mode
== BLKmode
&& bitsize
> BITS_PER_WORD
))
6891 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
6892 size
- bitsize
, NULL_RTX
, 1);
6895 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6896 if (mode
!= VOIDmode
&& mode
!= BLKmode
6897 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
6898 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
6900 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
6901 and BITPOS must be aligned on a byte boundary. If so, we simply do
6902 a block copy. Likewise for a BLKmode-like TARGET. */
6903 if (GET_MODE (temp
) == BLKmode
6904 && (GET_MODE (target
) == BLKmode
6906 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
6907 && (bitpos
% BITS_PER_UNIT
) == 0
6908 && (bitsize
% BITS_PER_UNIT
) == 0)))
6910 gcc_assert (MEM_P (target
) && MEM_P (temp
)
6911 && (bitpos
% BITS_PER_UNIT
) == 0);
6913 target
= adjust_address (target
, VOIDmode
, bitpos
/ BITS_PER_UNIT
);
6914 emit_block_move (target
, temp
,
6915 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
6922 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
6923 word size, we need to load the value (see again store_bit_field). */
6924 if (GET_MODE (temp
) == BLKmode
&& bitsize
<= BITS_PER_WORD
)
6926 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
6927 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
6928 temp_mode
, false, NULL
);
6931 /* Store the value in the bitfield. */
6932 store_bit_field (target
, bitsize
, bitpos
,
6933 bitregion_start
, bitregion_end
,
6934 mode
, temp
, reverse
);
6940 /* Now build a reference to just the desired component. */
6941 rtx to_rtx
= adjust_address (target
, mode
, bitpos
/ BITS_PER_UNIT
);
6943 if (to_rtx
== target
)
6944 to_rtx
= copy_rtx (to_rtx
);
6946 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
6947 set_mem_alias_set (to_rtx
, alias_set
);
6949 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
6950 into a target smaller than its type; handle that case now. */
6951 if (TREE_CODE (exp
) == CONSTRUCTOR
&& bitsize
>= 0)
6953 gcc_assert (bitsize
% BITS_PER_UNIT
== 0);
6954 store_constructor (exp
, to_rtx
, 0, bitsize
/ BITS_PER_UNIT
, reverse
);
6958 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
6962 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6963 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6964 codes and find the ultimate containing object, which we return.
6966 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6967 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
6968 storage order of the field.
6969 If the position of the field is variable, we store a tree
6970 giving the variable offset (in units) in *POFFSET.
6971 This offset is in addition to the bit position.
6972 If the position is not variable, we store 0 in *POFFSET.
6974 If any of the extraction expressions is volatile,
6975 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6977 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6978 Otherwise, it is a mode that can be used to access the field.
6980 If the field describes a variable-sized object, *PMODE is set to
6981 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6982 this case, but the address of the object can be found. */
6985 get_inner_reference (tree exp
, HOST_WIDE_INT
*pbitsize
,
6986 HOST_WIDE_INT
*pbitpos
, tree
*poffset
,
6987 machine_mode
*pmode
, int *punsignedp
,
6988 int *preversep
, int *pvolatilep
)
6991 machine_mode mode
= VOIDmode
;
6992 bool blkmode_bitfield
= false;
6993 tree offset
= size_zero_node
;
6994 offset_int bit_offset
= 0;
6996 /* First get the mode, signedness, storage order and size. We do this from
6997 just the outermost expression. */
6999 if (TREE_CODE (exp
) == COMPONENT_REF
)
7001 tree field
= TREE_OPERAND (exp
, 1);
7002 size_tree
= DECL_SIZE (field
);
7003 if (flag_strict_volatile_bitfields
> 0
7004 && TREE_THIS_VOLATILE (exp
)
7005 && DECL_BIT_FIELD_TYPE (field
)
7006 && DECL_MODE (field
) != BLKmode
)
7007 /* Volatile bitfields should be accessed in the mode of the
7008 field's type, not the mode computed based on the bit
7010 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7011 else if (!DECL_BIT_FIELD (field
))
7012 mode
= DECL_MODE (field
);
7013 else if (DECL_MODE (field
) == BLKmode
)
7014 blkmode_bitfield
= true;
7016 *punsignedp
= DECL_UNSIGNED (field
);
7018 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7020 size_tree
= TREE_OPERAND (exp
, 1);
7021 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7022 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7024 /* For vector types, with the correct size of access, use the mode of
7026 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7027 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7028 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7029 mode
= TYPE_MODE (TREE_TYPE (exp
));
7033 mode
= TYPE_MODE (TREE_TYPE (exp
));
7034 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7036 if (mode
== BLKmode
)
7037 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7039 *pbitsize
= GET_MODE_BITSIZE (mode
);
7044 if (! tree_fits_uhwi_p (size_tree
))
7045 mode
= BLKmode
, *pbitsize
= -1;
7047 *pbitsize
= tree_to_uhwi (size_tree
);
7050 *preversep
= reverse_storage_order_for_component_p (exp
);
7052 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7053 and find the ultimate containing object. */
7056 switch (TREE_CODE (exp
))
7059 bit_offset
+= wi::to_offset (TREE_OPERAND (exp
, 2));
7064 tree field
= TREE_OPERAND (exp
, 1);
7065 tree this_offset
= component_ref_field_offset (exp
);
7067 /* If this field hasn't been filled in yet, don't go past it.
7068 This should only happen when folding expressions made during
7069 type construction. */
7070 if (this_offset
== 0)
7073 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7074 bit_offset
+= wi::to_offset (DECL_FIELD_BIT_OFFSET (field
));
7076 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7081 case ARRAY_RANGE_REF
:
7083 tree index
= TREE_OPERAND (exp
, 1);
7084 tree low_bound
= array_ref_low_bound (exp
);
7085 tree unit_size
= array_ref_element_size (exp
);
7087 /* We assume all arrays have sizes that are a multiple of a byte.
7088 First subtract the lower bound, if any, in the type of the
7089 index, then convert to sizetype and multiply by the size of
7090 the array element. */
7091 if (! integer_zerop (low_bound
))
7092 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7095 offset
= size_binop (PLUS_EXPR
, offset
,
7096 size_binop (MULT_EXPR
,
7097 fold_convert (sizetype
, index
),
7106 bit_offset
+= *pbitsize
;
7109 case VIEW_CONVERT_EXPR
:
7113 /* Hand back the decl for MEM[&decl, off]. */
7114 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7116 tree off
= TREE_OPERAND (exp
, 1);
7117 if (!integer_zerop (off
))
7119 offset_int boff
, coff
= mem_ref_offset (exp
);
7120 boff
= coff
<< LOG2_BITS_PER_UNIT
;
7123 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7131 /* If any reference in the chain is volatile, the effect is volatile. */
7132 if (TREE_THIS_VOLATILE (exp
))
7135 exp
= TREE_OPERAND (exp
, 0);
7139 /* If OFFSET is constant, see if we can return the whole thing as a
7140 constant bit position. Make sure to handle overflow during
7142 if (TREE_CODE (offset
) == INTEGER_CST
)
7144 offset_int tem
= wi::sext (wi::to_offset (offset
),
7145 TYPE_PRECISION (sizetype
));
7146 tem
<<= LOG2_BITS_PER_UNIT
;
7148 if (wi::fits_shwi_p (tem
))
7150 *pbitpos
= tem
.to_shwi ();
7151 *poffset
= offset
= NULL_TREE
;
7155 /* Otherwise, split it up. */
7158 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7159 if (wi::neg_p (bit_offset
) || !wi::fits_shwi_p (bit_offset
))
7161 offset_int mask
= wi::mask
<offset_int
> (LOG2_BITS_PER_UNIT
, false);
7162 offset_int tem
= wi::bit_and_not (bit_offset
, mask
);
7163 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
7164 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
7166 tem
>>= LOG2_BITS_PER_UNIT
;
7167 offset
= size_binop (PLUS_EXPR
, offset
,
7168 wide_int_to_tree (sizetype
, tem
));
7171 *pbitpos
= bit_offset
.to_shwi ();
7175 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7176 if (mode
== VOIDmode
7178 && (*pbitpos
% BITS_PER_UNIT
) == 0
7179 && (*pbitsize
% BITS_PER_UNIT
) == 0)
7187 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7189 static unsigned HOST_WIDE_INT
7190 target_align (const_tree target
)
7192 /* We might have a chain of nested references with intermediate misaligning
7193 bitfields components, so need to recurse to find out. */
7195 unsigned HOST_WIDE_INT this_align
, outer_align
;
7197 switch (TREE_CODE (target
))
7203 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7204 outer_align
= target_align (TREE_OPERAND (target
, 0));
7205 return MIN (this_align
, outer_align
);
7208 case ARRAY_RANGE_REF
:
7209 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7210 outer_align
= target_align (TREE_OPERAND (target
, 0));
7211 return MIN (this_align
, outer_align
);
7214 case NON_LVALUE_EXPR
:
7215 case VIEW_CONVERT_EXPR
:
7216 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7217 outer_align
= target_align (TREE_OPERAND (target
, 0));
7218 return MAX (this_align
, outer_align
);
7221 return TYPE_ALIGN (TREE_TYPE (target
));
7226 /* Given an rtx VALUE that may contain additions and multiplications, return
7227 an equivalent value that just refers to a register, memory, or constant.
7228 This is done by generating instructions to perform the arithmetic and
7229 returning a pseudo-register containing the value.
7231 The returned value may be a REG, SUBREG, MEM or constant. */
7234 force_operand (rtx value
, rtx target
)
7237 /* Use subtarget as the target for operand 0 of a binary operation. */
7238 rtx subtarget
= get_subtarget (target
);
7239 enum rtx_code code
= GET_CODE (value
);
7241 /* Check for subreg applied to an expression produced by loop optimizer. */
7243 && !REG_P (SUBREG_REG (value
))
7244 && !MEM_P (SUBREG_REG (value
)))
7247 = simplify_gen_subreg (GET_MODE (value
),
7248 force_reg (GET_MODE (SUBREG_REG (value
)),
7249 force_operand (SUBREG_REG (value
),
7251 GET_MODE (SUBREG_REG (value
)),
7252 SUBREG_BYTE (value
));
7253 code
= GET_CODE (value
);
7256 /* Check for a PIC address load. */
7257 if ((code
== PLUS
|| code
== MINUS
)
7258 && XEXP (value
, 0) == pic_offset_table_rtx
7259 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7260 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7261 || GET_CODE (XEXP (value
, 1)) == CONST
))
7264 subtarget
= gen_reg_rtx (GET_MODE (value
));
7265 emit_move_insn (subtarget
, value
);
7269 if (ARITHMETIC_P (value
))
7271 op2
= XEXP (value
, 1);
7272 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7274 if (code
== MINUS
&& CONST_INT_P (op2
))
7277 op2
= negate_rtx (GET_MODE (value
), op2
);
7280 /* Check for an addition with OP2 a constant integer and our first
7281 operand a PLUS of a virtual register and something else. In that
7282 case, we want to emit the sum of the virtual register and the
7283 constant first and then add the other value. This allows virtual
7284 register instantiation to simply modify the constant rather than
7285 creating another one around this addition. */
7286 if (code
== PLUS
&& CONST_INT_P (op2
)
7287 && GET_CODE (XEXP (value
, 0)) == PLUS
7288 && REG_P (XEXP (XEXP (value
, 0), 0))
7289 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7290 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7292 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7293 XEXP (XEXP (value
, 0), 0), op2
,
7294 subtarget
, 0, OPTAB_LIB_WIDEN
);
7295 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7296 force_operand (XEXP (XEXP (value
,
7298 target
, 0, OPTAB_LIB_WIDEN
);
7301 op1
= force_operand (XEXP (value
, 0), subtarget
);
7302 op2
= force_operand (op2
, NULL_RTX
);
7306 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7308 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7309 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7310 target
, 1, OPTAB_LIB_WIDEN
);
7312 return expand_divmod (0,
7313 FLOAT_MODE_P (GET_MODE (value
))
7314 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7315 GET_MODE (value
), op1
, op2
, target
, 0);
7317 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7320 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7323 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7326 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7327 target
, 0, OPTAB_LIB_WIDEN
);
7329 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7330 target
, 1, OPTAB_LIB_WIDEN
);
7333 if (UNARY_P (value
))
7336 target
= gen_reg_rtx (GET_MODE (value
));
7337 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7344 case FLOAT_TRUNCATE
:
7345 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7350 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7354 case UNSIGNED_FLOAT
:
7355 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7359 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7363 #ifdef INSN_SCHEDULING
7364 /* On machines that have insn scheduling, we want all memory reference to be
7365 explicit, so we need to deal with such paradoxical SUBREGs. */
7366 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7368 = simplify_gen_subreg (GET_MODE (value
),
7369 force_reg (GET_MODE (SUBREG_REG (value
)),
7370 force_operand (SUBREG_REG (value
),
7372 GET_MODE (SUBREG_REG (value
)),
7373 SUBREG_BYTE (value
));
7379 /* Subroutine of expand_expr: return nonzero iff there is no way that
7380 EXP can reference X, which is being modified. TOP_P is nonzero if this
7381 call is going to be used to determine whether we need a temporary
7382 for EXP, as opposed to a recursive call to this function.
7384 It is always safe for this routine to return zero since it merely
7385 searches for optimization opportunities. */
7388 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7394 /* If EXP has varying size, we MUST use a target since we currently
7395 have no way of allocating temporaries of variable size
7396 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7397 So we assume here that something at a higher level has prevented a
7398 clash. This is somewhat bogus, but the best we can do. Only
7399 do this when X is BLKmode and when we are at the top level. */
7400 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7401 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7402 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7403 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7404 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7406 && GET_MODE (x
) == BLKmode
)
7407 /* If X is in the outgoing argument area, it is always safe. */
7409 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7410 || (GET_CODE (XEXP (x
, 0)) == PLUS
7411 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7414 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7415 find the underlying pseudo. */
7416 if (GET_CODE (x
) == SUBREG
)
7419 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7423 /* Now look at our tree code and possibly recurse. */
7424 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7426 case tcc_declaration
:
7427 exp_rtl
= DECL_RTL_IF_SET (exp
);
7433 case tcc_exceptional
:
7434 if (TREE_CODE (exp
) == TREE_LIST
)
7438 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7440 exp
= TREE_CHAIN (exp
);
7443 if (TREE_CODE (exp
) != TREE_LIST
)
7444 return safe_from_p (x
, exp
, 0);
7447 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7449 constructor_elt
*ce
;
7450 unsigned HOST_WIDE_INT idx
;
7452 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7453 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7454 || !safe_from_p (x
, ce
->value
, 0))
7458 else if (TREE_CODE (exp
) == ERROR_MARK
)
7459 return 1; /* An already-visited SAVE_EXPR? */
7464 /* The only case we look at here is the DECL_INITIAL inside a
7466 return (TREE_CODE (exp
) != DECL_EXPR
7467 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7468 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7469 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7472 case tcc_comparison
:
7473 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7478 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7480 case tcc_expression
:
7483 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7484 the expression. If it is set, we conflict iff we are that rtx or
7485 both are in memory. Otherwise, we check all operands of the
7486 expression recursively. */
7488 switch (TREE_CODE (exp
))
7491 /* If the operand is static or we are static, we can't conflict.
7492 Likewise if we don't conflict with the operand at all. */
7493 if (staticp (TREE_OPERAND (exp
, 0))
7494 || TREE_STATIC (exp
)
7495 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7498 /* Otherwise, the only way this can conflict is if we are taking
7499 the address of a DECL a that address if part of X, which is
7501 exp
= TREE_OPERAND (exp
, 0);
7504 if (!DECL_RTL_SET_P (exp
)
7505 || !MEM_P (DECL_RTL (exp
)))
7508 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7514 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7515 get_alias_set (exp
)))
7520 /* Assume that the call will clobber all hard registers and
7522 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7527 case WITH_CLEANUP_EXPR
:
7528 case CLEANUP_POINT_EXPR
:
7529 /* Lowered by gimplify.c. */
7533 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7539 /* If we have an rtx, we do not need to scan our operands. */
7543 nops
= TREE_OPERAND_LENGTH (exp
);
7544 for (i
= 0; i
< nops
; i
++)
7545 if (TREE_OPERAND (exp
, i
) != 0
7546 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7552 /* Should never get a type here. */
7556 /* If we have an rtl, find any enclosed object. Then see if we conflict
7560 if (GET_CODE (exp_rtl
) == SUBREG
)
7562 exp_rtl
= SUBREG_REG (exp_rtl
);
7564 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7568 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7569 are memory and they conflict. */
7570 return ! (rtx_equal_p (x
, exp_rtl
)
7571 || (MEM_P (x
) && MEM_P (exp_rtl
)
7572 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7575 /* If we reach here, it is safe. */
7580 /* Return the highest power of two that EXP is known to be a multiple of.
7581 This is used in updating alignment of MEMs in array references. */
7583 unsigned HOST_WIDE_INT
7584 highest_pow2_factor (const_tree exp
)
7586 unsigned HOST_WIDE_INT ret
;
7587 int trailing_zeros
= tree_ctz (exp
);
7588 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7589 return BIGGEST_ALIGNMENT
;
7590 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7591 if (ret
> BIGGEST_ALIGNMENT
)
7592 return BIGGEST_ALIGNMENT
;
7596 /* Similar, except that the alignment requirements of TARGET are
7597 taken into account. Assume it is at least as aligned as its
7598 type, unless it is a COMPONENT_REF in which case the layout of
7599 the structure gives the alignment. */
7601 static unsigned HOST_WIDE_INT
7602 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7604 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7605 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7607 return MAX (factor
, talign
);
7610 /* Convert the tree comparison code TCODE to the rtl one where the
7611 signedness is UNSIGNEDP. */
7613 static enum rtx_code
7614 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7626 code
= unsignedp
? LTU
: LT
;
7629 code
= unsignedp
? LEU
: LE
;
7632 code
= unsignedp
? GTU
: GT
;
7635 code
= unsignedp
? GEU
: GE
;
7637 case UNORDERED_EXPR
:
7668 /* Subroutine of expand_expr. Expand the two operands of a binary
7669 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7670 The value may be stored in TARGET if TARGET is nonzero. The
7671 MODIFIER argument is as documented by expand_expr. */
7674 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7675 enum expand_modifier modifier
)
7677 if (! safe_from_p (target
, exp1
, 1))
7679 if (operand_equal_p (exp0
, exp1
, 0))
7681 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7682 *op1
= copy_rtx (*op0
);
7686 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7687 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7692 /* Return a MEM that contains constant EXP. DEFER is as for
7693 output_constant_def and MODIFIER is as for expand_expr. */
7696 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7700 mem
= output_constant_def (exp
, defer
);
7701 if (modifier
!= EXPAND_INITIALIZER
)
7702 mem
= use_anchored_address (mem
);
7706 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7707 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7710 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7711 enum expand_modifier modifier
, addr_space_t as
)
7713 rtx result
, subtarget
;
7715 HOST_WIDE_INT bitsize
, bitpos
;
7716 int unsignedp
, reversep
, volatilep
= 0;
7719 /* If we are taking the address of a constant and are at the top level,
7720 we have to use output_constant_def since we can't call force_const_mem
7722 /* ??? This should be considered a front-end bug. We should not be
7723 generating ADDR_EXPR of something that isn't an LVALUE. The only
7724 exception here is STRING_CST. */
7725 if (CONSTANT_CLASS_P (exp
))
7727 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7728 if (modifier
< EXPAND_SUM
)
7729 result
= force_operand (result
, target
);
7733 /* Everything must be something allowed by is_gimple_addressable. */
7734 switch (TREE_CODE (exp
))
7737 /* This case will happen via recursion for &a->b. */
7738 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7742 tree tem
= TREE_OPERAND (exp
, 0);
7743 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7744 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7745 return expand_expr (tem
, target
, tmode
, modifier
);
7749 /* Expand the initializer like constants above. */
7750 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7752 if (modifier
< EXPAND_SUM
)
7753 result
= force_operand (result
, target
);
7757 /* The real part of the complex number is always first, therefore
7758 the address is the same as the address of the parent object. */
7761 inner
= TREE_OPERAND (exp
, 0);
7765 /* The imaginary part of the complex number is always second.
7766 The expression is therefore always offset by the size of the
7769 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7770 inner
= TREE_OPERAND (exp
, 0);
7773 case COMPOUND_LITERAL_EXPR
:
7774 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7775 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7776 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7777 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7778 the initializers aren't gimplified. */
7779 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7780 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7781 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7782 target
, tmode
, modifier
, as
);
7785 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7786 expand_expr, as that can have various side effects; LABEL_DECLs for
7787 example, may not have their DECL_RTL set yet. Expand the rtl of
7788 CONSTRUCTORs too, which should yield a memory reference for the
7789 constructor's contents. Assume language specific tree nodes can
7790 be expanded in some interesting way. */
7791 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7793 || TREE_CODE (exp
) == CONSTRUCTOR
7794 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7796 result
= expand_expr (exp
, target
, tmode
,
7797 modifier
== EXPAND_INITIALIZER
7798 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7800 /* If the DECL isn't in memory, then the DECL wasn't properly
7801 marked TREE_ADDRESSABLE, which will be either a front-end
7802 or a tree optimizer bug. */
7804 gcc_assert (MEM_P (result
));
7805 result
= XEXP (result
, 0);
7807 /* ??? Is this needed anymore? */
7809 TREE_USED (exp
) = 1;
7811 if (modifier
!= EXPAND_INITIALIZER
7812 && modifier
!= EXPAND_CONST_ADDRESS
7813 && modifier
!= EXPAND_SUM
)
7814 result
= force_operand (result
, target
);
7818 /* Pass FALSE as the last argument to get_inner_reference although
7819 we are expanding to RTL. The rationale is that we know how to
7820 handle "aligning nodes" here: we can just bypass them because
7821 they won't change the final object whose address will be returned
7822 (they actually exist only for that purpose). */
7823 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7824 &unsignedp
, &reversep
, &volatilep
);
7828 /* We must have made progress. */
7829 gcc_assert (inner
!= exp
);
7831 subtarget
= offset
|| bitpos
? NULL_RTX
: target
;
7832 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7833 inner alignment, force the inner to be sufficiently aligned. */
7834 if (CONSTANT_CLASS_P (inner
)
7835 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7837 inner
= copy_node (inner
);
7838 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7839 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7840 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7842 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7848 if (modifier
!= EXPAND_NORMAL
)
7849 result
= force_operand (result
, NULL
);
7850 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7851 modifier
== EXPAND_INITIALIZER
7852 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7854 /* expand_expr is allowed to return an object in a mode other
7855 than TMODE. If it did, we need to convert. */
7856 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
7857 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
7858 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
7859 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7860 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
7862 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
7863 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
7866 subtarget
= bitpos
? NULL_RTX
: target
;
7867 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
7868 1, OPTAB_LIB_WIDEN
);
7874 /* Someone beforehand should have rejected taking the address
7875 of such an object. */
7876 gcc_assert ((bitpos
% BITS_PER_UNIT
) == 0);
7878 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7879 result
= plus_constant (tmode
, result
, bitpos
/ BITS_PER_UNIT
);
7880 if (modifier
< EXPAND_SUM
)
7881 result
= force_operand (result
, target
);
7887 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7888 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7891 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
7892 enum expand_modifier modifier
)
7894 addr_space_t as
= ADDR_SPACE_GENERIC
;
7895 scalar_int_mode address_mode
= Pmode
;
7896 scalar_int_mode pointer_mode
= ptr_mode
;
7900 /* Target mode of VOIDmode says "whatever's natural". */
7901 if (tmode
== VOIDmode
)
7902 tmode
= TYPE_MODE (TREE_TYPE (exp
));
7904 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
7906 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
7907 address_mode
= targetm
.addr_space
.address_mode (as
);
7908 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
7911 /* We can get called with some Weird Things if the user does silliness
7912 like "(short) &a". In that case, convert_memory_address won't do
7913 the right thing, so ignore the given target mode. */
7914 scalar_int_mode new_tmode
= (tmode
== pointer_mode
7918 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
7919 new_tmode
, modifier
, as
);
7921 /* Despite expand_expr claims concerning ignoring TMODE when not
7922 strictly convenient, stuff breaks if we don't honor it. Note
7923 that combined with the above, we only do this for pointer modes. */
7924 rmode
= GET_MODE (result
);
7925 if (rmode
== VOIDmode
)
7927 if (rmode
!= new_tmode
)
7928 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
7933 /* Generate code for computing CONSTRUCTOR EXP.
7934 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7935 is TRUE, instead of creating a temporary variable in memory
7936 NULL is returned and the caller needs to handle it differently. */
7939 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
7940 bool avoid_temp_mem
)
7942 tree type
= TREE_TYPE (exp
);
7943 machine_mode mode
= TYPE_MODE (type
);
7945 /* Try to avoid creating a temporary at all. This is possible
7946 if all of the initializer is zero.
7947 FIXME: try to handle all [0..255] initializers we can handle
7949 if (TREE_STATIC (exp
)
7950 && !TREE_ADDRESSABLE (exp
)
7951 && target
!= 0 && mode
== BLKmode
7952 && all_zeros_p (exp
))
7954 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
7958 /* All elts simple constants => refer to a constant in memory. But
7959 if this is a non-BLKmode mode, let it store a field at a time
7960 since that should make a CONST_INT, CONST_WIDE_INT or
7961 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7962 use, it is best to store directly into the target unless the type
7963 is large enough that memcpy will be used. If we are making an
7964 initializer and all operands are constant, put it in memory as
7967 FIXME: Avoid trying to fill vector constructors piece-meal.
7968 Output them with output_constant_def below unless we're sure
7969 they're zeros. This should go away when vector initializers
7970 are treated like VECTOR_CST instead of arrays. */
7971 if ((TREE_STATIC (exp
)
7972 && ((mode
== BLKmode
7973 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
7974 || TREE_ADDRESSABLE (exp
)
7975 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
7976 && (! can_move_by_pieces
7977 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
7979 && ! mostly_zeros_p (exp
))))
7980 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
7981 && TREE_CONSTANT (exp
)))
7988 constructor
= expand_expr_constant (exp
, 1, modifier
);
7990 if (modifier
!= EXPAND_CONST_ADDRESS
7991 && modifier
!= EXPAND_INITIALIZER
7992 && modifier
!= EXPAND_SUM
)
7993 constructor
= validize_mem (constructor
);
7998 /* Handle calls that pass values in multiple non-contiguous
7999 locations. The Irix 6 ABI has examples of this. */
8000 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8001 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8006 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8009 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8014 /* expand_expr: generate code for computing expression EXP.
8015 An rtx for the computed value is returned. The value is never null.
8016 In the case of a void EXP, const0_rtx is returned.
8018 The value may be stored in TARGET if TARGET is nonzero.
8019 TARGET is just a suggestion; callers must assume that
8020 the rtx returned may not be the same as TARGET.
8022 If TARGET is CONST0_RTX, it means that the value will be ignored.
8024 If TMODE is not VOIDmode, it suggests generating the
8025 result in mode TMODE. But this is done only when convenient.
8026 Otherwise, TMODE is ignored and the value generated in its natural mode.
8027 TMODE is just a suggestion; callers must assume that
8028 the rtx returned may not have mode TMODE.
8030 Note that TARGET may have neither TMODE nor MODE. In that case, it
8031 probably will not be used.
8033 If MODIFIER is EXPAND_SUM then when EXP is an addition
8034 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8035 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8036 products as above, or REG or MEM, or constant.
8037 Ordinarily in such cases we would output mul or add instructions
8038 and then return a pseudo reg containing the sum.
8040 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8041 it also marks a label as absolutely required (it can't be dead).
8042 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8043 This is used for outputting expressions used in initializers.
8045 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8046 with a constant address even if that address is not normally legitimate.
8047 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8049 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8050 a call parameter. Such targets require special care as we haven't yet
8051 marked TARGET so that it's safe from being trashed by libcalls. We
8052 don't want to use TARGET for anything but the final result;
8053 Intermediate values must go elsewhere. Additionally, calls to
8054 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8056 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8057 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8058 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8059 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8062 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8063 In this case, we don't adjust a returned MEM rtx that wouldn't be
8064 sufficiently aligned for its mode; instead, it's up to the caller
8065 to deal with it afterwards. This is used to make sure that unaligned
8066 base objects for which out-of-bounds accesses are supported, for
8067 example record types with trailing arrays, aren't realigned behind
8068 the back of the caller.
8069 The normal operating mode is to pass FALSE for this parameter. */
8072 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8073 enum expand_modifier modifier
, rtx
*alt_rtl
,
8074 bool inner_reference_p
)
8078 /* Handle ERROR_MARK before anybody tries to access its type. */
8079 if (TREE_CODE (exp
) == ERROR_MARK
8080 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8082 ret
= CONST0_RTX (tmode
);
8083 return ret
? ret
: const0_rtx
;
8086 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8091 /* Try to expand the conditional expression which is represented by
8092 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8093 return the rtl reg which represents the result. Otherwise return
8097 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8098 tree treeop1 ATTRIBUTE_UNUSED
,
8099 tree treeop2 ATTRIBUTE_UNUSED
)
8102 rtx op00
, op01
, op1
, op2
;
8103 enum rtx_code comparison_code
;
8104 machine_mode comparison_mode
;
8107 tree type
= TREE_TYPE (treeop1
);
8108 int unsignedp
= TYPE_UNSIGNED (type
);
8109 machine_mode mode
= TYPE_MODE (type
);
8110 machine_mode orig_mode
= mode
;
8111 static bool expanding_cond_expr_using_cmove
= false;
8113 /* Conditional move expansion can end up TERing two operands which,
8114 when recursively hitting conditional expressions can result in
8115 exponential behavior if the cmove expansion ultimatively fails.
8116 It's hardly profitable to TER a cmove into a cmove so avoid doing
8117 that by failing early if we end up recursing. */
8118 if (expanding_cond_expr_using_cmove
)
8121 /* If we cannot do a conditional move on the mode, try doing it
8122 with the promoted mode. */
8123 if (!can_conditionally_move_p (mode
))
8125 mode
= promote_mode (type
, mode
, &unsignedp
);
8126 if (!can_conditionally_move_p (mode
))
8128 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8131 temp
= assign_temp (type
, 0, 1);
8133 expanding_cond_expr_using_cmove
= true;
8135 expand_operands (treeop1
, treeop2
,
8136 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8138 if (TREE_CODE (treeop0
) == SSA_NAME
8139 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8141 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8142 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8143 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8144 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8145 comparison_mode
= TYPE_MODE (type
);
8146 unsignedp
= TYPE_UNSIGNED (type
);
8147 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8149 else if (COMPARISON_CLASS_P (treeop0
))
8151 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8152 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8153 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8154 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8155 unsignedp
= TYPE_UNSIGNED (type
);
8156 comparison_mode
= TYPE_MODE (type
);
8157 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8161 op00
= expand_normal (treeop0
);
8163 comparison_code
= NE
;
8164 comparison_mode
= GET_MODE (op00
);
8165 if (comparison_mode
== VOIDmode
)
8166 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8168 expanding_cond_expr_using_cmove
= false;
8170 if (GET_MODE (op1
) != mode
)
8171 op1
= gen_lowpart (mode
, op1
);
8173 if (GET_MODE (op2
) != mode
)
8174 op2
= gen_lowpart (mode
, op2
);
8176 /* Try to emit the conditional move. */
8177 insn
= emit_conditional_move (temp
, comparison_code
,
8178 op00
, op01
, comparison_mode
,
8182 /* If we could do the conditional move, emit the sequence,
8186 rtx_insn
*seq
= get_insns ();
8189 return convert_modes (orig_mode
, mode
, temp
, 0);
8192 /* Otherwise discard the sequence and fall back to code with
8199 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8200 enum expand_modifier modifier
)
8202 rtx op0
, op1
, op2
, temp
;
8203 rtx_code_label
*lab
;
8207 scalar_int_mode int_mode
;
8208 enum tree_code code
= ops
->code
;
8210 rtx subtarget
, original_target
;
8212 bool reduce_bit_field
;
8213 location_t loc
= ops
->location
;
8214 tree treeop0
, treeop1
, treeop2
;
8215 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8216 ? reduce_to_bit_field_precision ((expr), \
8222 mode
= TYPE_MODE (type
);
8223 unsignedp
= TYPE_UNSIGNED (type
);
8229 /* We should be called only on simple (binary or unary) expressions,
8230 exactly those that are valid in gimple expressions that aren't
8231 GIMPLE_SINGLE_RHS (or invalid). */
8232 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8233 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8234 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8236 ignore
= (target
== const0_rtx
8237 || ((CONVERT_EXPR_CODE_P (code
)
8238 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8239 && TREE_CODE (type
) == VOID_TYPE
));
8241 /* We should be called only if we need the result. */
8242 gcc_assert (!ignore
);
8244 /* An operation in what may be a bit-field type needs the
8245 result to be reduced to the precision of the bit-field type,
8246 which is narrower than that of the type's mode. */
8247 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8248 && !type_has_mode_precision_p (type
));
8250 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8253 /* Use subtarget as the target for operand 0 of a binary operation. */
8254 subtarget
= get_subtarget (target
);
8255 original_target
= target
;
8259 case NON_LVALUE_EXPR
:
8262 if (treeop0
== error_mark_node
)
8265 if (TREE_CODE (type
) == UNION_TYPE
)
8267 tree valtype
= TREE_TYPE (treeop0
);
8269 /* If both input and output are BLKmode, this conversion isn't doing
8270 anything except possibly changing memory attribute. */
8271 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8273 rtx result
= expand_expr (treeop0
, target
, tmode
,
8276 result
= copy_rtx (result
);
8277 set_mem_attributes (result
, type
, 0);
8283 if (TYPE_MODE (type
) != BLKmode
)
8284 target
= gen_reg_rtx (TYPE_MODE (type
));
8286 target
= assign_temp (type
, 1, 1);
8290 /* Store data into beginning of memory target. */
8291 store_expr (treeop0
,
8292 adjust_address (target
, TYPE_MODE (valtype
), 0),
8293 modifier
== EXPAND_STACK_PARM
,
8294 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8298 gcc_assert (REG_P (target
)
8299 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8301 /* Store this field into a union of the proper type. */
8302 store_field (target
,
8303 MIN ((int_size_in_bytes (TREE_TYPE
8306 (HOST_WIDE_INT
) GET_MODE_BITSIZE (mode
)),
8307 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8311 /* Return the entire union. */
8315 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8317 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8320 /* If the signedness of the conversion differs and OP0 is
8321 a promoted SUBREG, clear that indication since we now
8322 have to do the proper extension. */
8323 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8324 && GET_CODE (op0
) == SUBREG
)
8325 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8327 return REDUCE_BIT_FIELD (op0
);
8330 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8331 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8332 if (GET_MODE (op0
) == mode
)
8335 /* If OP0 is a constant, just convert it into the proper mode. */
8336 else if (CONSTANT_P (op0
))
8338 tree inner_type
= TREE_TYPE (treeop0
);
8339 machine_mode inner_mode
= GET_MODE (op0
);
8341 if (inner_mode
== VOIDmode
)
8342 inner_mode
= TYPE_MODE (inner_type
);
8344 if (modifier
== EXPAND_INITIALIZER
)
8345 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8347 op0
= convert_modes (mode
, inner_mode
, op0
,
8348 TYPE_UNSIGNED (inner_type
));
8351 else if (modifier
== EXPAND_INITIALIZER
)
8352 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8353 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8355 else if (target
== 0)
8356 op0
= convert_to_mode (mode
, op0
,
8357 TYPE_UNSIGNED (TREE_TYPE
8361 convert_move (target
, op0
,
8362 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8366 return REDUCE_BIT_FIELD (op0
);
8368 case ADDR_SPACE_CONVERT_EXPR
:
8370 tree treeop0_type
= TREE_TYPE (treeop0
);
8372 gcc_assert (POINTER_TYPE_P (type
));
8373 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8375 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8376 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8378 /* Conversions between pointers to the same address space should
8379 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8380 gcc_assert (as_to
!= as_from
);
8382 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8384 /* Ask target code to handle conversion between pointers
8385 to overlapping address spaces. */
8386 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8387 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8389 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8393 /* For disjoint address spaces, converting anything but a null
8394 pointer invokes undefined behavior. We truncate or extend the
8395 value as if we'd converted via integers, which handles 0 as
8396 required, and all others as the programmer likely expects. */
8397 #ifndef POINTERS_EXTEND_UNSIGNED
8398 const int POINTERS_EXTEND_UNSIGNED
= 1;
8400 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8401 op0
, POINTERS_EXTEND_UNSIGNED
);
8407 case POINTER_PLUS_EXPR
:
8408 /* Even though the sizetype mode and the pointer's mode can be different
8409 expand is able to handle this correctly and get the correct result out
8410 of the PLUS_EXPR code. */
8411 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8412 if sizetype precision is smaller than pointer precision. */
8413 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8414 treeop1
= fold_convert_loc (loc
, type
,
8415 fold_convert_loc (loc
, ssizetype
,
8417 /* If sizetype precision is larger than pointer precision, truncate the
8418 offset to have matching modes. */
8419 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8420 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8424 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8425 something else, make sure we add the register to the constant and
8426 then to the other thing. This case can occur during strength
8427 reduction and doing it this way will produce better code if the
8428 frame pointer or argument pointer is eliminated.
8430 fold-const.c will ensure that the constant is always in the inner
8431 PLUS_EXPR, so the only case we need to do anything about is if
8432 sp, ap, or fp is our second argument, in which case we must swap
8433 the innermost first argument and our second argument. */
8435 if (TREE_CODE (treeop0
) == PLUS_EXPR
8436 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8438 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8439 || DECL_RTL (treeop1
) == stack_pointer_rtx
8440 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8445 /* If the result is to be ptr_mode and we are adding an integer to
8446 something, we might be forming a constant. So try to use
8447 plus_constant. If it produces a sum and we can't accept it,
8448 use force_operand. This allows P = &ARR[const] to generate
8449 efficient code on machines where a SYMBOL_REF is not a valid
8452 If this is an EXPAND_SUM call, always return the sum. */
8453 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8454 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8456 if (modifier
== EXPAND_STACK_PARM
)
8458 if (TREE_CODE (treeop0
) == INTEGER_CST
8459 && HWI_COMPUTABLE_MODE_P (mode
)
8460 && TREE_CONSTANT (treeop1
))
8464 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8466 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8468 /* Use wi::shwi to ensure that the constant is
8469 truncated according to the mode of OP1, then sign extended
8470 to a HOST_WIDE_INT. Using the constant directly can result
8471 in non-canonical RTL in a 64x32 cross compile. */
8472 wc
= TREE_INT_CST_LOW (treeop0
);
8474 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8475 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8476 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8477 op1
= force_operand (op1
, target
);
8478 return REDUCE_BIT_FIELD (op1
);
8481 else if (TREE_CODE (treeop1
) == INTEGER_CST
8482 && HWI_COMPUTABLE_MODE_P (mode
)
8483 && TREE_CONSTANT (treeop0
))
8487 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8489 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8490 (modifier
== EXPAND_INITIALIZER
8491 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8492 if (! CONSTANT_P (op0
))
8494 op1
= expand_expr (treeop1
, NULL_RTX
,
8495 VOIDmode
, modifier
);
8496 /* Return a PLUS if modifier says it's OK. */
8497 if (modifier
== EXPAND_SUM
8498 || modifier
== EXPAND_INITIALIZER
)
8499 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8502 /* Use wi::shwi to ensure that the constant is
8503 truncated according to the mode of OP1, then sign extended
8504 to a HOST_WIDE_INT. Using the constant directly can result
8505 in non-canonical RTL in a 64x32 cross compile. */
8506 wc
= TREE_INT_CST_LOW (treeop1
);
8508 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8509 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8510 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8511 op0
= force_operand (op0
, target
);
8512 return REDUCE_BIT_FIELD (op0
);
8516 /* Use TER to expand pointer addition of a negated value
8517 as pointer subtraction. */
8518 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8519 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8520 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8521 && TREE_CODE (treeop1
) == SSA_NAME
8522 && TYPE_MODE (TREE_TYPE (treeop0
))
8523 == TYPE_MODE (TREE_TYPE (treeop1
)))
8525 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8528 treeop1
= gimple_assign_rhs1 (def
);
8534 /* No sense saving up arithmetic to be done
8535 if it's all in the wrong mode to form part of an address.
8536 And force_operand won't know whether to sign-extend or
8538 if (modifier
!= EXPAND_INITIALIZER
8539 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8541 expand_operands (treeop0
, treeop1
,
8542 subtarget
, &op0
, &op1
, modifier
);
8543 if (op0
== const0_rtx
)
8545 if (op1
== const0_rtx
)
8550 expand_operands (treeop0
, treeop1
,
8551 subtarget
, &op0
, &op1
, modifier
);
8552 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8556 /* For initializers, we are allowed to return a MINUS of two
8557 symbolic constants. Here we handle all cases when both operands
8559 /* Handle difference of two symbolic constants,
8560 for the sake of an initializer. */
8561 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8562 && really_constant_p (treeop0
)
8563 && really_constant_p (treeop1
))
8565 expand_operands (treeop0
, treeop1
,
8566 NULL_RTX
, &op0
, &op1
, modifier
);
8567 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8570 /* No sense saving up arithmetic to be done
8571 if it's all in the wrong mode to form part of an address.
8572 And force_operand won't know whether to sign-extend or
8574 if (modifier
!= EXPAND_INITIALIZER
8575 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8578 expand_operands (treeop0
, treeop1
,
8579 subtarget
, &op0
, &op1
, modifier
);
8581 /* Convert A - const to A + (-const). */
8582 if (CONST_INT_P (op1
))
8584 op1
= negate_rtx (mode
, op1
);
8585 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8590 case WIDEN_MULT_PLUS_EXPR
:
8591 case WIDEN_MULT_MINUS_EXPR
:
8592 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8593 op2
= expand_normal (treeop2
);
8594 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8598 case WIDEN_MULT_EXPR
:
8599 /* If first operand is constant, swap them.
8600 Thus the following special case checks need only
8601 check the second operand. */
8602 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8603 std::swap (treeop0
, treeop1
);
8605 /* First, check if we have a multiplication of one signed and one
8606 unsigned operand. */
8607 if (TREE_CODE (treeop1
) != INTEGER_CST
8608 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8609 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8611 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8612 this_optab
= usmul_widen_optab
;
8613 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8614 != CODE_FOR_nothing
)
8616 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8617 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8620 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8622 /* op0 and op1 might still be constant, despite the above
8623 != INTEGER_CST check. Handle it. */
8624 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8626 op0
= convert_modes (innermode
, mode
, op0
, true);
8627 op1
= convert_modes (innermode
, mode
, op1
, false);
8628 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8629 target
, unsignedp
));
8634 /* Check for a multiplication with matching signedness. */
8635 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8636 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8637 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8638 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8640 tree op0type
= TREE_TYPE (treeop0
);
8641 machine_mode innermode
= TYPE_MODE (op0type
);
8642 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8643 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8644 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8646 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8648 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8649 != CODE_FOR_nothing
)
8651 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8653 /* op0 and op1 might still be constant, despite the above
8654 != INTEGER_CST check. Handle it. */
8655 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8658 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8660 = convert_modes (innermode
, mode
, op1
,
8661 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8662 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8666 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8667 unsignedp
, this_optab
);
8668 return REDUCE_BIT_FIELD (temp
);
8670 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8672 && innermode
== word_mode
)
8675 op0
= expand_normal (treeop0
);
8676 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8677 op1
= convert_modes (word_mode
, mode
,
8678 expand_normal (treeop1
),
8679 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8681 op1
= expand_normal (treeop1
);
8682 /* op0 and op1 might still be constant, despite the above
8683 != INTEGER_CST check. Handle it. */
8684 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8685 goto widen_mult_const
;
8686 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8687 unsignedp
, OPTAB_LIB_WIDEN
);
8688 hipart
= gen_highpart (word_mode
, temp
);
8689 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8693 emit_move_insn (hipart
, htem
);
8694 return REDUCE_BIT_FIELD (temp
);
8698 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8699 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8700 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8701 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8705 optab opt
= fma_optab
;
8706 gimple
*def0
, *def2
;
8708 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8710 if (optab_handler (fma_optab
, mode
) == CODE_FOR_nothing
)
8712 tree fn
= mathfn_built_in (TREE_TYPE (treeop0
), BUILT_IN_FMA
);
8715 gcc_assert (fn
!= NULL_TREE
);
8716 call_expr
= build_call_expr (fn
, 3, treeop0
, treeop1
, treeop2
);
8717 return expand_builtin (call_expr
, target
, subtarget
, mode
, false);
8720 def0
= get_def_for_expr (treeop0
, NEGATE_EXPR
);
8721 /* The multiplication is commutative - look at its 2nd operand
8722 if the first isn't fed by a negate. */
8725 def0
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8726 /* Swap operands if the 2nd operand is fed by a negate. */
8728 std::swap (treeop0
, treeop1
);
8730 def2
= get_def_for_expr (treeop2
, NEGATE_EXPR
);
8735 && optab_handler (fnms_optab
, mode
) != CODE_FOR_nothing
)
8738 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8739 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8742 && optab_handler (fnma_optab
, mode
) != CODE_FOR_nothing
)
8745 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8748 && optab_handler (fms_optab
, mode
) != CODE_FOR_nothing
)
8751 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8755 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
, EXPAND_NORMAL
);
8757 op2
= expand_normal (treeop2
);
8758 op1
= expand_normal (treeop1
);
8760 return expand_ternary_op (TYPE_MODE (type
), opt
,
8761 op0
, op1
, op2
, target
, 0);
8765 /* If this is a fixed-point operation, then we cannot use the code
8766 below because "expand_mult" doesn't support sat/no-sat fixed-point
8768 if (ALL_FIXED_POINT_MODE_P (mode
))
8771 /* If first operand is constant, swap them.
8772 Thus the following special case checks need only
8773 check the second operand. */
8774 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8775 std::swap (treeop0
, treeop1
);
8777 /* Attempt to return something suitable for generating an
8778 indexed address, for machines that support that. */
8780 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8781 && tree_fits_shwi_p (treeop1
))
8783 tree exp1
= treeop1
;
8785 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8789 op0
= force_operand (op0
, NULL_RTX
);
8791 op0
= copy_to_mode_reg (mode
, op0
);
8793 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8794 gen_int_mode (tree_to_shwi (exp1
),
8795 TYPE_MODE (TREE_TYPE (exp1
)))));
8798 if (modifier
== EXPAND_STACK_PARM
)
8801 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8802 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8804 case TRUNC_MOD_EXPR
:
8805 case FLOOR_MOD_EXPR
:
8807 case ROUND_MOD_EXPR
:
8809 case TRUNC_DIV_EXPR
:
8810 case FLOOR_DIV_EXPR
:
8812 case ROUND_DIV_EXPR
:
8813 case EXACT_DIV_EXPR
:
8815 /* If this is a fixed-point operation, then we cannot use the code
8816 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8818 if (ALL_FIXED_POINT_MODE_P (mode
))
8821 if (modifier
== EXPAND_STACK_PARM
)
8823 /* Possible optimization: compute the dividend with EXPAND_SUM
8824 then if the divisor is constant can optimize the case
8825 where some terms of the dividend have coeffs divisible by it. */
8826 expand_operands (treeop0
, treeop1
,
8827 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8828 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8829 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8830 if (SCALAR_INT_MODE_P (mode
)
8832 && get_range_pos_neg (treeop0
) == 1
8833 && get_range_pos_neg (treeop1
) == 1)
8835 /* If both arguments are known to be positive when interpreted
8836 as signed, we can expand it as both signed and unsigned
8837 division or modulo. Choose the cheaper sequence in that case. */
8838 bool speed_p
= optimize_insn_for_speed_p ();
8839 do_pending_stack_adjust ();
8841 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8842 rtx_insn
*uns_insns
= get_insns ();
8845 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8846 rtx_insn
*sgn_insns
= get_insns ();
8848 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8849 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8851 /* If costs are the same then use as tie breaker the other
8853 if (uns_cost
== sgn_cost
)
8855 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8856 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
8859 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
8861 emit_insn (uns_insns
);
8864 emit_insn (sgn_insns
);
8867 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
8872 case MULT_HIGHPART_EXPR
:
8873 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8874 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
8878 case FIXED_CONVERT_EXPR
:
8879 op0
= expand_normal (treeop0
);
8880 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8881 target
= gen_reg_rtx (mode
);
8883 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
8884 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8885 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
8886 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
8888 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
8891 case FIX_TRUNC_EXPR
:
8892 op0
= expand_normal (treeop0
);
8893 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8894 target
= gen_reg_rtx (mode
);
8895 expand_fix (target
, op0
, unsignedp
);
8899 op0
= expand_normal (treeop0
);
8900 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8901 target
= gen_reg_rtx (mode
);
8902 /* expand_float can't figure out what to do if FROM has VOIDmode.
8903 So give it the correct mode. With -O, cse will optimize this. */
8904 if (GET_MODE (op0
) == VOIDmode
)
8905 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
8907 expand_float (target
, op0
,
8908 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8912 op0
= expand_expr (treeop0
, subtarget
,
8913 VOIDmode
, EXPAND_NORMAL
);
8914 if (modifier
== EXPAND_STACK_PARM
)
8916 temp
= expand_unop (mode
,
8917 optab_for_tree_code (NEGATE_EXPR
, type
,
8921 return REDUCE_BIT_FIELD (temp
);
8924 op0
= expand_expr (treeop0
, subtarget
,
8925 VOIDmode
, EXPAND_NORMAL
);
8926 if (modifier
== EXPAND_STACK_PARM
)
8929 /* ABS_EXPR is not valid for complex arguments. */
8930 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
8931 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
8933 /* Unsigned abs is simply the operand. Testing here means we don't
8934 risk generating incorrect code below. */
8935 if (TYPE_UNSIGNED (type
))
8938 return expand_abs (mode
, op0
, target
, unsignedp
,
8939 safe_from_p (target
, treeop0
, 1));
8943 target
= original_target
;
8945 || modifier
== EXPAND_STACK_PARM
8946 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
8947 || GET_MODE (target
) != mode
8949 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
8950 target
= gen_reg_rtx (mode
);
8951 expand_operands (treeop0
, treeop1
,
8952 target
, &op0
, &op1
, EXPAND_NORMAL
);
8954 /* First try to do it with a special MIN or MAX instruction.
8955 If that does not win, use a conditional jump to select the proper
8957 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
8958 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
8963 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
8964 and similarly for MAX <x, y>. */
8965 if (VECTOR_TYPE_P (type
))
8967 tree t0
= make_tree (type
, op0
);
8968 tree t1
= make_tree (type
, op1
);
8969 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
8971 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
8975 /* At this point, a MEM target is no longer useful; we will get better
8978 if (! REG_P (target
))
8979 target
= gen_reg_rtx (mode
);
8981 /* If op1 was placed in target, swap op0 and op1. */
8982 if (target
!= op0
&& target
== op1
)
8983 std::swap (op0
, op1
);
8985 /* We generate better code and avoid problems with op1 mentioning
8986 target by forcing op1 into a pseudo if it isn't a constant. */
8987 if (! CONSTANT_P (op1
))
8988 op1
= force_reg (mode
, op1
);
8991 enum rtx_code comparison_code
;
8994 if (code
== MAX_EXPR
)
8995 comparison_code
= unsignedp
? GEU
: GE
;
8997 comparison_code
= unsignedp
? LEU
: LE
;
8999 /* Canonicalize to comparisons against 0. */
9000 if (op1
== const1_rtx
)
9002 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9003 or (a != 0 ? a : 1) for unsigned.
9004 For MIN we are safe converting (a <= 1 ? a : 1)
9005 into (a <= 0 ? a : 1) */
9006 cmpop1
= const0_rtx
;
9007 if (code
== MAX_EXPR
)
9008 comparison_code
= unsignedp
? NE
: GT
;
9010 if (op1
== constm1_rtx
&& !unsignedp
)
9012 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9013 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9014 cmpop1
= const0_rtx
;
9015 if (code
== MIN_EXPR
)
9016 comparison_code
= LT
;
9019 /* Use a conditional move if possible. */
9020 if (can_conditionally_move_p (mode
))
9026 /* Try to emit the conditional move. */
9027 insn
= emit_conditional_move (target
, comparison_code
,
9032 /* If we could do the conditional move, emit the sequence,
9036 rtx_insn
*seq
= get_insns ();
9042 /* Otherwise discard the sequence and fall back to code with
9048 emit_move_insn (target
, op0
);
9050 lab
= gen_label_rtx ();
9051 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9052 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9053 profile_probability::uninitialized ());
9055 emit_move_insn (target
, op1
);
9060 op0
= expand_expr (treeop0
, subtarget
,
9061 VOIDmode
, EXPAND_NORMAL
);
9062 if (modifier
== EXPAND_STACK_PARM
)
9064 /* In case we have to reduce the result to bitfield precision
9065 for unsigned bitfield expand this as XOR with a proper constant
9067 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9069 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9070 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9071 false, GET_MODE_PRECISION (int_mode
));
9073 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9074 immed_wide_int_const (mask
, int_mode
),
9075 target
, 1, OPTAB_LIB_WIDEN
);
9078 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9082 /* ??? Can optimize bitwise operations with one arg constant.
9083 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9084 and (a bitwise1 b) bitwise2 b (etc)
9085 but that is probably not worth while. */
9094 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9095 || type_has_mode_precision_p (type
));
9101 /* If this is a fixed-point operation, then we cannot use the code
9102 below because "expand_shift" doesn't support sat/no-sat fixed-point
9104 if (ALL_FIXED_POINT_MODE_P (mode
))
9107 if (! safe_from_p (subtarget
, treeop1
, 1))
9109 if (modifier
== EXPAND_STACK_PARM
)
9111 op0
= expand_expr (treeop0
, subtarget
,
9112 VOIDmode
, EXPAND_NORMAL
);
9114 /* Left shift optimization when shifting across word_size boundary.
9116 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9117 there isn't native instruction to support this wide mode
9118 left shift. Given below scenario:
9120 Type A = (Type) B << C
9123 | dest_high | dest_low |
9127 If the shift amount C caused we shift B to across the word
9128 size boundary, i.e part of B shifted into high half of
9129 destination register, and part of B remains in the low
9130 half, then GCC will use the following left shift expand
9133 1. Initialize dest_low to B.
9134 2. Initialize every bit of dest_high to the sign bit of B.
9135 3. Logic left shift dest_low by C bit to finalize dest_low.
9136 The value of dest_low before this shift is kept in a temp D.
9137 4. Logic left shift dest_high by C.
9138 5. Logic right shift D by (word_size - C).
9139 6. Or the result of 4 and 5 to finalize dest_high.
9141 While, by checking gimple statements, if operand B is
9142 coming from signed extension, then we can simplify above
9145 1. dest_high = src_low >> (word_size - C).
9146 2. dest_low = src_low << C.
9148 We can use one arithmetic right shift to finish all the
9149 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9150 needed from 6 into 2.
9152 The case is similar for zero extension, except that we
9153 initialize dest_high to zero rather than copies of the sign
9154 bit from B. Furthermore, we need to use a logical right shift
9157 The choice of sign-extension versus zero-extension is
9158 determined entirely by whether or not B is signed and is
9159 independent of the current setting of unsignedp. */
9162 if (code
== LSHIFT_EXPR
9165 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9167 && TREE_CONSTANT (treeop1
)
9168 && TREE_CODE (treeop0
) == SSA_NAME
)
9170 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9171 if (is_gimple_assign (def
)
9172 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9174 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9175 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9177 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9178 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9179 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9180 >= GET_MODE_BITSIZE (word_mode
)))
9182 rtx_insn
*seq
, *seq_old
;
9183 unsigned int high_off
= subreg_highpart_offset (word_mode
,
9185 bool extend_unsigned
9186 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9187 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9188 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9189 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9190 int_mode
, high_off
);
9191 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9192 - TREE_INT_CST_LOW (treeop1
));
9193 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9196 /* dest_high = src_low >> (word_size - C). */
9197 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9200 if (temp
!= dest_high
)
9201 emit_move_insn (dest_high
, temp
);
9203 /* dest_low = src_low << C. */
9204 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9205 treeop1
, dest_low
, unsignedp
);
9206 if (temp
!= dest_low
)
9207 emit_move_insn (dest_low
, temp
);
9213 if (have_insn_for (ASHIFT
, int_mode
))
9215 bool speed_p
= optimize_insn_for_speed_p ();
9217 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9222 seq_old
= get_insns ();
9224 if (seq_cost (seq
, speed_p
)
9225 >= seq_cost (seq_old
, speed_p
))
9236 if (temp
== NULL_RTX
)
9237 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9239 if (code
== LSHIFT_EXPR
)
9240 temp
= REDUCE_BIT_FIELD (temp
);
9244 /* Could determine the answer when only additive constants differ. Also,
9245 the addition of one can be handled by changing the condition. */
9252 case UNORDERED_EXPR
:
9261 temp
= do_store_flag (ops
,
9262 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9263 tmode
!= VOIDmode
? tmode
: mode
);
9267 /* Use a compare and a jump for BLKmode comparisons, or for function
9268 type comparisons is have_canonicalize_funcptr_for_compare. */
9271 || modifier
== EXPAND_STACK_PARM
9272 || ! safe_from_p (target
, treeop0
, 1)
9273 || ! safe_from_p (target
, treeop1
, 1)
9274 /* Make sure we don't have a hard reg (such as function's return
9275 value) live across basic blocks, if not optimizing. */
9276 || (!optimize
&& REG_P (target
)
9277 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9278 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9280 emit_move_insn (target
, const0_rtx
);
9282 rtx_code_label
*lab1
= gen_label_rtx ();
9283 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9284 profile_probability::uninitialized ());
9286 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9287 emit_move_insn (target
, constm1_rtx
);
9289 emit_move_insn (target
, const1_rtx
);
9295 /* Get the rtx code of the operands. */
9296 op0
= expand_normal (treeop0
);
9297 op1
= expand_normal (treeop1
);
9300 target
= gen_reg_rtx (TYPE_MODE (type
));
9302 /* If target overlaps with op1, then either we need to force
9303 op1 into a pseudo (if target also overlaps with op0),
9304 or write the complex parts in reverse order. */
9305 switch (GET_CODE (target
))
9308 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9310 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9312 complex_expr_force_op1
:
9313 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9314 emit_move_insn (temp
, op1
);
9318 complex_expr_swap_order
:
9319 /* Move the imaginary (op1) and real (op0) parts to their
9321 write_complex_part (target
, op1
, true);
9322 write_complex_part (target
, op0
, false);
9328 temp
= adjust_address_nv (target
,
9329 GET_MODE_INNER (GET_MODE (target
)), 0);
9330 if (reg_overlap_mentioned_p (temp
, op1
))
9332 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9333 temp
= adjust_address_nv (target
, imode
,
9334 GET_MODE_SIZE (imode
));
9335 if (reg_overlap_mentioned_p (temp
, op0
))
9336 goto complex_expr_force_op1
;
9337 goto complex_expr_swap_order
;
9341 if (reg_overlap_mentioned_p (target
, op1
))
9343 if (reg_overlap_mentioned_p (target
, op0
))
9344 goto complex_expr_force_op1
;
9345 goto complex_expr_swap_order
;
9350 /* Move the real (op0) and imaginary (op1) parts to their location. */
9351 write_complex_part (target
, op0
, false);
9352 write_complex_part (target
, op1
, true);
9356 case WIDEN_SUM_EXPR
:
9358 tree oprnd0
= treeop0
;
9359 tree oprnd1
= treeop1
;
9361 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9362 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9367 case REDUC_MAX_EXPR
:
9368 case REDUC_MIN_EXPR
:
9369 case REDUC_PLUS_EXPR
:
9371 op0
= expand_normal (treeop0
);
9372 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9373 machine_mode vec_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9375 struct expand_operand ops
[2];
9376 enum insn_code icode
= optab_handler (this_optab
, vec_mode
);
9378 create_output_operand (&ops
[0], target
, mode
);
9379 create_input_operand (&ops
[1], op0
, vec_mode
);
9380 expand_insn (icode
, 2, ops
);
9381 target
= ops
[0].value
;
9382 if (GET_MODE (target
) != mode
)
9383 return gen_lowpart (tmode
, target
);
9387 case VEC_UNPACK_HI_EXPR
:
9388 case VEC_UNPACK_LO_EXPR
:
9390 op0
= expand_normal (treeop0
);
9391 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9397 case VEC_UNPACK_FLOAT_HI_EXPR
:
9398 case VEC_UNPACK_FLOAT_LO_EXPR
:
9400 op0
= expand_normal (treeop0
);
9401 /* The signedness is determined from input operand. */
9402 temp
= expand_widen_pattern_expr
9403 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9404 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9410 case VEC_WIDEN_MULT_HI_EXPR
:
9411 case VEC_WIDEN_MULT_LO_EXPR
:
9412 case VEC_WIDEN_MULT_EVEN_EXPR
:
9413 case VEC_WIDEN_MULT_ODD_EXPR
:
9414 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9415 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9416 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9417 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9419 gcc_assert (target
);
9422 case VEC_PACK_TRUNC_EXPR
:
9423 case VEC_PACK_SAT_EXPR
:
9424 case VEC_PACK_FIX_TRUNC_EXPR
:
9425 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9429 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9430 op2
= expand_normal (treeop2
);
9432 /* Careful here: if the target doesn't support integral vector modes,
9433 a constant selection vector could wind up smooshed into a normal
9434 integral constant. */
9435 if (CONSTANT_P (op2
) && !VECTOR_MODE_P (GET_MODE (op2
)))
9437 tree sel_type
= TREE_TYPE (treeop2
);
9439 = mode_for_vector (SCALAR_TYPE_MODE (TREE_TYPE (sel_type
)),
9440 TYPE_VECTOR_SUBPARTS (sel_type
)).require ();
9441 gcc_assert (GET_MODE_CLASS (vmode
) == MODE_VECTOR_INT
);
9442 op2
= simplify_subreg (vmode
, op2
, TYPE_MODE (sel_type
), 0);
9443 gcc_assert (op2
&& GET_CODE (op2
) == CONST_VECTOR
);
9446 gcc_assert (GET_MODE_CLASS (GET_MODE (op2
)) == MODE_VECTOR_INT
);
9448 temp
= expand_vec_perm (mode
, op0
, op1
, op2
, target
);
9454 tree oprnd0
= treeop0
;
9455 tree oprnd1
= treeop1
;
9456 tree oprnd2
= treeop2
;
9459 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9460 op2
= expand_normal (oprnd2
);
9461 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9468 tree oprnd0
= treeop0
;
9469 tree oprnd1
= treeop1
;
9470 tree oprnd2
= treeop2
;
9473 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9474 op2
= expand_normal (oprnd2
);
9475 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9480 case REALIGN_LOAD_EXPR
:
9482 tree oprnd0
= treeop0
;
9483 tree oprnd1
= treeop1
;
9484 tree oprnd2
= treeop2
;
9487 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9488 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9489 op2
= expand_normal (oprnd2
);
9490 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9498 /* A COND_EXPR with its type being VOID_TYPE represents a
9499 conditional jump and is handled in
9500 expand_gimple_cond_expr. */
9501 gcc_assert (!VOID_TYPE_P (type
));
9503 /* Note that COND_EXPRs whose type is a structure or union
9504 are required to be constructed to contain assignments of
9505 a temporary variable, so that we can evaluate them here
9506 for side effect only. If type is void, we must do likewise. */
9508 gcc_assert (!TREE_ADDRESSABLE (type
)
9510 && TREE_TYPE (treeop1
) != void_type_node
9511 && TREE_TYPE (treeop2
) != void_type_node
);
9513 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9517 /* If we are not to produce a result, we have no target. Otherwise,
9518 if a target was specified use it; it will not be used as an
9519 intermediate target unless it is safe. If no target, use a
9522 if (modifier
!= EXPAND_STACK_PARM
9524 && safe_from_p (original_target
, treeop0
, 1)
9525 && GET_MODE (original_target
) == mode
9526 && !MEM_P (original_target
))
9527 temp
= original_target
;
9529 temp
= assign_temp (type
, 0, 1);
9531 do_pending_stack_adjust ();
9533 rtx_code_label
*lab0
= gen_label_rtx ();
9534 rtx_code_label
*lab1
= gen_label_rtx ();
9535 jumpifnot (treeop0
, lab0
,
9536 profile_probability::uninitialized ());
9537 store_expr (treeop1
, temp
,
9538 modifier
== EXPAND_STACK_PARM
,
9541 emit_jump_insn (targetm
.gen_jump (lab1
));
9544 store_expr (treeop2
, temp
,
9545 modifier
== EXPAND_STACK_PARM
,
9554 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9557 case BIT_INSERT_EXPR
:
9559 unsigned bitpos
= tree_to_uhwi (treeop2
);
9561 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9562 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9564 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9565 rtx op0
= expand_normal (treeop0
);
9566 rtx op1
= expand_normal (treeop1
);
9567 rtx dst
= gen_reg_rtx (mode
);
9568 emit_move_insn (dst
, op0
);
9569 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9570 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9578 /* Here to do an ordinary binary operator. */
9580 expand_operands (treeop0
, treeop1
,
9581 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9583 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9585 if (modifier
== EXPAND_STACK_PARM
)
9587 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9588 unsignedp
, OPTAB_LIB_WIDEN
);
9590 /* Bitwise operations do not need bitfield reduction as we expect their
9591 operands being properly truncated. */
9592 if (code
== BIT_XOR_EXPR
9593 || code
== BIT_AND_EXPR
9594 || code
== BIT_IOR_EXPR
)
9596 return REDUCE_BIT_FIELD (temp
);
9598 #undef REDUCE_BIT_FIELD
9601 /* Return TRUE if expression STMT is suitable for replacement.
9602 Never consider memory loads as replaceable, because those don't ever lead
9603 into constant expressions. */
9606 stmt_is_replaceable_p (gimple
*stmt
)
9608 if (ssa_is_replaceable_p (stmt
))
9610 /* Don't move around loads. */
9611 if (!gimple_assign_single_p (stmt
)
9612 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9619 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9620 enum expand_modifier modifier
, rtx
*alt_rtl
,
9621 bool inner_reference_p
)
9623 rtx op0
, op1
, temp
, decl_rtl
;
9626 machine_mode mode
, dmode
;
9627 enum tree_code code
= TREE_CODE (exp
);
9628 rtx subtarget
, original_target
;
9631 bool reduce_bit_field
;
9632 location_t loc
= EXPR_LOCATION (exp
);
9633 struct separate_ops ops
;
9634 tree treeop0
, treeop1
, treeop2
;
9635 tree ssa_name
= NULL_TREE
;
9638 type
= TREE_TYPE (exp
);
9639 mode
= TYPE_MODE (type
);
9640 unsignedp
= TYPE_UNSIGNED (type
);
9642 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9643 if (!VL_EXP_CLASS_P (exp
))
9644 switch (TREE_CODE_LENGTH (code
))
9647 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9648 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9649 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9659 ignore
= (target
== const0_rtx
9660 || ((CONVERT_EXPR_CODE_P (code
)
9661 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9662 && TREE_CODE (type
) == VOID_TYPE
));
9664 /* An operation in what may be a bit-field type needs the
9665 result to be reduced to the precision of the bit-field type,
9666 which is narrower than that of the type's mode. */
9667 reduce_bit_field
= (!ignore
9668 && INTEGRAL_TYPE_P (type
)
9669 && !type_has_mode_precision_p (type
));
9671 /* If we are going to ignore this result, we need only do something
9672 if there is a side-effect somewhere in the expression. If there
9673 is, short-circuit the most common cases here. Note that we must
9674 not call expand_expr with anything but const0_rtx in case this
9675 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9679 if (! TREE_SIDE_EFFECTS (exp
))
9682 /* Ensure we reference a volatile object even if value is ignored, but
9683 don't do this if all we are doing is taking its address. */
9684 if (TREE_THIS_VOLATILE (exp
)
9685 && TREE_CODE (exp
) != FUNCTION_DECL
9686 && mode
!= VOIDmode
&& mode
!= BLKmode
9687 && modifier
!= EXPAND_CONST_ADDRESS
)
9689 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9695 if (TREE_CODE_CLASS (code
) == tcc_unary
9696 || code
== BIT_FIELD_REF
9697 || code
== COMPONENT_REF
9698 || code
== INDIRECT_REF
)
9699 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9702 else if (TREE_CODE_CLASS (code
) == tcc_binary
9703 || TREE_CODE_CLASS (code
) == tcc_comparison
9704 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9706 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9707 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9714 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9717 /* Use subtarget as the target for operand 0 of a binary operation. */
9718 subtarget
= get_subtarget (target
);
9719 original_target
= target
;
9725 tree function
= decl_function_context (exp
);
9727 temp
= label_rtx (exp
);
9728 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9730 if (function
!= current_function_decl
9732 LABEL_REF_NONLOCAL_P (temp
) = 1;
9734 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9739 /* ??? ivopts calls expander, without any preparation from
9740 out-of-ssa. So fake instructions as if this was an access to the
9741 base variable. This unnecessarily allocates a pseudo, see how we can
9742 reuse it, if partition base vars have it set already. */
9743 if (!currently_expanding_to_rtl
)
9745 tree var
= SSA_NAME_VAR (exp
);
9746 if (var
&& DECL_RTL_SET_P (var
))
9747 return DECL_RTL (var
);
9748 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9749 LAST_VIRTUAL_REGISTER
+ 1);
9752 g
= get_gimple_for_ssa_name (exp
);
9753 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9755 && modifier
== EXPAND_INITIALIZER
9756 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9757 && (optimize
|| !SSA_NAME_VAR (exp
)
9758 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9759 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9760 g
= SSA_NAME_DEF_STMT (exp
);
9764 location_t saved_loc
= curr_insn_location ();
9765 location_t loc
= gimple_location (g
);
9766 if (loc
!= UNKNOWN_LOCATION
)
9767 set_curr_insn_location (loc
);
9768 ops
.code
= gimple_assign_rhs_code (g
);
9769 switch (get_gimple_rhs_class (ops
.code
))
9771 case GIMPLE_TERNARY_RHS
:
9772 ops
.op2
= gimple_assign_rhs3 (g
);
9774 case GIMPLE_BINARY_RHS
:
9775 ops
.op1
= gimple_assign_rhs2 (g
);
9777 /* Try to expand conditonal compare. */
9778 if (targetm
.gen_ccmp_first
)
9780 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9781 r
= expand_ccmp_expr (g
, mode
);
9786 case GIMPLE_UNARY_RHS
:
9787 ops
.op0
= gimple_assign_rhs1 (g
);
9788 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9790 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9792 case GIMPLE_SINGLE_RHS
:
9794 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9795 tmode
, modifier
, alt_rtl
,
9802 set_curr_insn_location (saved_loc
);
9803 if (REG_P (r
) && !REG_EXPR (r
))
9804 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9809 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9810 exp
= SSA_NAME_VAR (ssa_name
);
9811 goto expand_decl_rtl
;
9815 /* If a static var's type was incomplete when the decl was written,
9816 but the type is complete now, lay out the decl now. */
9817 if (DECL_SIZE (exp
) == 0
9818 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9819 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9820 layout_decl (exp
, 0);
9826 decl_rtl
= DECL_RTL (exp
);
9828 gcc_assert (decl_rtl
);
9830 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9831 settings for VECTOR_TYPE_P that might switch for the function. */
9832 if (currently_expanding_to_rtl
9833 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9834 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9835 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9837 decl_rtl
= copy_rtx (decl_rtl
);
9839 /* Record writes to register variables. */
9840 if (modifier
== EXPAND_WRITE
9842 && HARD_REGISTER_P (decl_rtl
))
9843 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9844 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9846 /* Ensure variable marked as used even if it doesn't go through
9847 a parser. If it hasn't be used yet, write out an external
9850 TREE_USED (exp
) = 1;
9852 /* Show we haven't gotten RTL for this yet. */
9855 /* Variables inherited from containing functions should have
9856 been lowered by this point. */
9858 context
= decl_function_context (exp
);
9860 || SCOPE_FILE_SCOPE_P (context
)
9861 || context
== current_function_decl
9862 || TREE_STATIC (exp
)
9863 || DECL_EXTERNAL (exp
)
9864 /* ??? C++ creates functions that are not TREE_STATIC. */
9865 || TREE_CODE (exp
) == FUNCTION_DECL
);
9867 /* This is the case of an array whose size is to be determined
9868 from its initializer, while the initializer is still being parsed.
9869 ??? We aren't parsing while expanding anymore. */
9871 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
9872 temp
= validize_mem (decl_rtl
);
9874 /* If DECL_RTL is memory, we are in the normal case and the
9875 address is not valid, get the address into a register. */
9877 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
9880 *alt_rtl
= decl_rtl
;
9881 decl_rtl
= use_anchored_address (decl_rtl
);
9882 if (modifier
!= EXPAND_CONST_ADDRESS
9883 && modifier
!= EXPAND_SUM
9884 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
9885 : GET_MODE (decl_rtl
),
9887 MEM_ADDR_SPACE (decl_rtl
)))
9888 temp
= replace_equiv_address (decl_rtl
,
9889 copy_rtx (XEXP (decl_rtl
, 0)));
9892 /* If we got something, return it. But first, set the alignment
9893 if the address is a register. */
9896 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
9897 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
9903 dmode
= DECL_MODE (exp
);
9905 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
9907 /* If the mode of DECL_RTL does not match that of the decl,
9908 there are two cases: we are dealing with a BLKmode value
9909 that is returned in a register, or we are dealing with
9910 a promoted value. In the latter case, return a SUBREG
9911 of the wanted mode, but mark it so that we know that it
9912 was already extended. */
9913 if (REG_P (decl_rtl
)
9915 && GET_MODE (decl_rtl
) != dmode
)
9919 /* Get the signedness to be used for this variable. Ensure we get
9920 the same mode we got when the variable was declared. */
9921 if (code
!= SSA_NAME
)
9922 pmode
= promote_decl_mode (exp
, &unsignedp
);
9923 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
9924 && gimple_code (g
) == GIMPLE_CALL
9925 && !gimple_call_internal_p (g
))
9926 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
9927 gimple_call_fntype (g
),
9930 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
9931 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
9933 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
9934 SUBREG_PROMOTED_VAR_P (temp
) = 1;
9935 SUBREG_PROMOTED_SET (temp
, unsignedp
);
9943 /* Given that TYPE_PRECISION (type) is not always equal to
9944 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9945 the former to the latter according to the signedness of the
9947 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
9948 temp
= immed_wide_int_const
9949 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
9955 tree tmp
= NULL_TREE
;
9956 if (GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
9957 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
9958 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FRACT
9959 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UFRACT
9960 || GET_MODE_CLASS (mode
) == MODE_VECTOR_ACCUM
9961 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UACCUM
)
9962 return const_vector_from_tree (exp
);
9963 scalar_int_mode int_mode
;
9964 if (is_int_mode (mode
, &int_mode
))
9966 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
9967 return const_scalar_mask_from_tree (int_mode
, exp
);
9971 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
9973 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
9974 type_for_mode
, exp
);
9979 vec
<constructor_elt
, va_gc
> *v
;
9981 vec_alloc (v
, VECTOR_CST_NELTS (exp
));
9982 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
9983 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
9984 tmp
= build_constructor (type
, v
);
9986 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
9991 if (modifier
== EXPAND_WRITE
)
9993 /* Writing into CONST_DECL is always invalid, but handle it
9995 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
9996 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
9997 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
9999 op0
= memory_address_addr_space (mode
, op0
, as
);
10000 temp
= gen_rtx_MEM (mode
, op0
);
10001 set_mem_addr_space (temp
, as
);
10004 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10007 /* If optimized, generate immediate CONST_DOUBLE
10008 which will be turned into memory by reload if necessary.
10010 We used to force a register so that loop.c could see it. But
10011 this does not allow gen_* patterns to perform optimizations with
10012 the constants. It also produces two insns in cases like "x = 1.0;".
10013 On most machines, floating-point constants are not permitted in
10014 many insns, so we'd end up copying it to a register in any case.
10016 Now, we do the copying in expand_binop, if appropriate. */
10017 return const_double_from_real_value (TREE_REAL_CST (exp
),
10018 TYPE_MODE (TREE_TYPE (exp
)));
10021 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10022 TYPE_MODE (TREE_TYPE (exp
)));
10025 /* Handle evaluating a complex constant in a CONCAT target. */
10026 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10028 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10031 rtarg
= XEXP (original_target
, 0);
10032 itarg
= XEXP (original_target
, 1);
10034 /* Move the real and imaginary parts separately. */
10035 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10036 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10039 emit_move_insn (rtarg
, op0
);
10041 emit_move_insn (itarg
, op1
);
10043 return original_target
;
10049 temp
= expand_expr_constant (exp
, 1, modifier
);
10051 /* temp contains a constant address.
10052 On RISC machines where a constant address isn't valid,
10053 make some insns to get that address into a register. */
10054 if (modifier
!= EXPAND_CONST_ADDRESS
10055 && modifier
!= EXPAND_INITIALIZER
10056 && modifier
!= EXPAND_SUM
10057 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10058 MEM_ADDR_SPACE (temp
)))
10059 return replace_equiv_address (temp
,
10060 copy_rtx (XEXP (temp
, 0)));
10065 tree val
= treeop0
;
10066 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10067 inner_reference_p
);
10069 if (!SAVE_EXPR_RESOLVED_P (exp
))
10071 /* We can indeed still hit this case, typically via builtin
10072 expanders calling save_expr immediately before expanding
10073 something. Assume this means that we only have to deal
10074 with non-BLKmode values. */
10075 gcc_assert (GET_MODE (ret
) != BLKmode
);
10077 val
= build_decl (curr_insn_location (),
10078 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10079 DECL_ARTIFICIAL (val
) = 1;
10080 DECL_IGNORED_P (val
) = 1;
10082 TREE_OPERAND (exp
, 0) = treeop0
;
10083 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10085 if (!CONSTANT_P (ret
))
10086 ret
= copy_to_reg (ret
);
10087 SET_DECL_RTL (val
, ret
);
10095 /* If we don't need the result, just ensure we evaluate any
10099 unsigned HOST_WIDE_INT idx
;
10102 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10103 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10108 return expand_constructor (exp
, target
, modifier
, false);
10110 case TARGET_MEM_REF
:
10113 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10114 enum insn_code icode
;
10115 unsigned int align
;
10117 op0
= addr_for_mem_ref (exp
, as
, true);
10118 op0
= memory_address_addr_space (mode
, op0
, as
);
10119 temp
= gen_rtx_MEM (mode
, op0
);
10120 set_mem_attributes (temp
, exp
, 0);
10121 set_mem_addr_space (temp
, as
);
10122 align
= get_object_alignment (exp
);
10123 if (modifier
!= EXPAND_WRITE
10124 && modifier
!= EXPAND_MEMORY
10126 && align
< GET_MODE_ALIGNMENT (mode
)
10127 /* If the target does not have special handling for unaligned
10128 loads of mode then it can use regular moves for them. */
10129 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10130 != CODE_FOR_nothing
))
10132 struct expand_operand ops
[2];
10134 /* We've already validated the memory, and we're creating a
10135 new pseudo destination. The predicates really can't fail,
10136 nor can the generator. */
10137 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10138 create_fixed_operand (&ops
[1], temp
);
10139 expand_insn (icode
, 2, ops
);
10140 temp
= ops
[0].value
;
10147 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10149 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10150 machine_mode address_mode
;
10151 tree base
= TREE_OPERAND (exp
, 0);
10153 enum insn_code icode
;
10155 /* Handle expansion of non-aliased memory with non-BLKmode. That
10156 might end up in a register. */
10157 if (mem_ref_refers_to_non_mem_p (exp
))
10159 HOST_WIDE_INT offset
= mem_ref_offset (exp
).to_short_addr ();
10160 base
= TREE_OPERAND (base
, 0);
10163 && tree_fits_uhwi_p (TYPE_SIZE (type
))
10164 && (GET_MODE_BITSIZE (DECL_MODE (base
))
10165 == tree_to_uhwi (TYPE_SIZE (type
))))
10166 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10167 target
, tmode
, modifier
);
10168 if (TYPE_MODE (type
) == BLKmode
)
10170 temp
= assign_stack_temp (DECL_MODE (base
),
10171 GET_MODE_SIZE (DECL_MODE (base
)));
10172 store_expr (base
, temp
, 0, false, false);
10173 temp
= adjust_address (temp
, BLKmode
, offset
);
10174 set_mem_size (temp
, int_size_in_bytes (type
));
10177 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10178 bitsize_int (offset
* BITS_PER_UNIT
));
10179 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10180 return expand_expr (exp
, target
, tmode
, modifier
);
10182 address_mode
= targetm
.addr_space
.address_mode (as
);
10183 base
= TREE_OPERAND (exp
, 0);
10184 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10186 tree mask
= gimple_assign_rhs2 (def_stmt
);
10187 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10188 gimple_assign_rhs1 (def_stmt
), mask
);
10189 TREE_OPERAND (exp
, 0) = base
;
10191 align
= get_object_alignment (exp
);
10192 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10193 op0
= memory_address_addr_space (mode
, op0
, as
);
10194 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10196 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10197 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10198 op0
= memory_address_addr_space (mode
, op0
, as
);
10200 temp
= gen_rtx_MEM (mode
, op0
);
10201 set_mem_attributes (temp
, exp
, 0);
10202 set_mem_addr_space (temp
, as
);
10203 if (TREE_THIS_VOLATILE (exp
))
10204 MEM_VOLATILE_P (temp
) = 1;
10205 if (modifier
!= EXPAND_WRITE
10206 && modifier
!= EXPAND_MEMORY
10207 && !inner_reference_p
10209 && align
< GET_MODE_ALIGNMENT (mode
))
10211 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10212 != CODE_FOR_nothing
)
10214 struct expand_operand ops
[2];
10216 /* We've already validated the memory, and we're creating a
10217 new pseudo destination. The predicates really can't fail,
10218 nor can the generator. */
10219 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10220 create_fixed_operand (&ops
[1], temp
);
10221 expand_insn (icode
, 2, ops
);
10222 temp
= ops
[0].value
;
10224 else if (targetm
.slow_unaligned_access (mode
, align
))
10225 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10226 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10227 (modifier
== EXPAND_STACK_PARM
10228 ? NULL_RTX
: target
),
10229 mode
, mode
, false, alt_rtl
);
10232 && modifier
!= EXPAND_MEMORY
10233 && modifier
!= EXPAND_WRITE
)
10234 temp
= flip_storage_order (mode
, temp
);
10241 tree array
= treeop0
;
10242 tree index
= treeop1
;
10245 /* Fold an expression like: "foo"[2].
10246 This is not done in fold so it won't happen inside &.
10247 Don't fold if this is for wide characters since it's too
10248 difficult to do correctly and this is a very rare case. */
10250 if (modifier
!= EXPAND_CONST_ADDRESS
10251 && modifier
!= EXPAND_INITIALIZER
10252 && modifier
!= EXPAND_MEMORY
)
10254 tree t
= fold_read_from_constant_string (exp
);
10257 return expand_expr (t
, target
, tmode
, modifier
);
10260 /* If this is a constant index into a constant array,
10261 just get the value from the array. Handle both the cases when
10262 we have an explicit constructor and when our operand is a variable
10263 that was declared const. */
10265 if (modifier
!= EXPAND_CONST_ADDRESS
10266 && modifier
!= EXPAND_INITIALIZER
10267 && modifier
!= EXPAND_MEMORY
10268 && TREE_CODE (array
) == CONSTRUCTOR
10269 && ! TREE_SIDE_EFFECTS (array
)
10270 && TREE_CODE (index
) == INTEGER_CST
)
10272 unsigned HOST_WIDE_INT ix
;
10275 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10277 if (tree_int_cst_equal (field
, index
))
10279 if (!TREE_SIDE_EFFECTS (value
))
10280 return expand_expr (fold (value
), target
, tmode
, modifier
);
10285 else if (optimize
>= 1
10286 && modifier
!= EXPAND_CONST_ADDRESS
10287 && modifier
!= EXPAND_INITIALIZER
10288 && modifier
!= EXPAND_MEMORY
10289 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10290 && TREE_CODE (index
) == INTEGER_CST
10291 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10292 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10294 if (init
== NULL_TREE
)
10296 tree value
= build_zero_cst (type
);
10297 if (TREE_CODE (value
) == CONSTRUCTOR
)
10299 /* If VALUE is a CONSTRUCTOR, this optimization is only
10300 useful if this doesn't store the CONSTRUCTOR into
10301 memory. If it does, it is more efficient to just
10302 load the data from the array directly. */
10303 rtx ret
= expand_constructor (value
, target
,
10305 if (ret
== NULL_RTX
)
10310 return expand_expr (value
, target
, tmode
, modifier
);
10312 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10314 unsigned HOST_WIDE_INT ix
;
10317 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10319 if (tree_int_cst_equal (field
, index
))
10321 if (TREE_SIDE_EFFECTS (value
))
10324 if (TREE_CODE (value
) == CONSTRUCTOR
)
10326 /* If VALUE is a CONSTRUCTOR, this
10327 optimization is only useful if
10328 this doesn't store the CONSTRUCTOR
10329 into memory. If it does, it is more
10330 efficient to just load the data from
10331 the array directly. */
10332 rtx ret
= expand_constructor (value
, target
,
10334 if (ret
== NULL_RTX
)
10339 expand_expr (fold (value
), target
, tmode
, modifier
);
10342 else if (TREE_CODE (init
) == STRING_CST
)
10344 tree low_bound
= array_ref_low_bound (exp
);
10345 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10347 /* Optimize the special case of a zero lower bound.
10349 We convert the lower bound to sizetype to avoid problems
10350 with constant folding. E.g. suppose the lower bound is
10351 1 and its mode is QI. Without the conversion
10352 (ARRAY + (INDEX - (unsigned char)1))
10354 (ARRAY + (-(unsigned char)1) + INDEX)
10356 (ARRAY + 255 + INDEX). Oops! */
10357 if (!integer_zerop (low_bound
))
10358 index1
= size_diffop_loc (loc
, index1
,
10359 fold_convert_loc (loc
, sizetype
,
10362 if (tree_fits_uhwi_p (index1
)
10363 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10365 tree type
= TREE_TYPE (TREE_TYPE (init
));
10366 scalar_int_mode mode
;
10368 if (is_int_mode (TYPE_MODE (type
), &mode
)
10369 && GET_MODE_SIZE (mode
) == 1)
10370 return gen_int_mode (TREE_STRING_POINTER (init
)
10371 [TREE_INT_CST_LOW (index1
)],
10377 goto normal_inner_ref
;
10379 case COMPONENT_REF
:
10380 /* If the operand is a CONSTRUCTOR, we can just extract the
10381 appropriate field if it is present. */
10382 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10384 unsigned HOST_WIDE_INT idx
;
10386 scalar_int_mode field_mode
;
10388 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10390 if (field
== treeop1
10391 /* We can normally use the value of the field in the
10392 CONSTRUCTOR. However, if this is a bitfield in
10393 an integral mode that we can fit in a HOST_WIDE_INT,
10394 we must mask only the number of bits in the bitfield,
10395 since this is done implicitly by the constructor. If
10396 the bitfield does not meet either of those conditions,
10397 we can't do this optimization. */
10398 && (! DECL_BIT_FIELD (field
)
10399 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10400 && (GET_MODE_PRECISION (field_mode
)
10401 <= HOST_BITS_PER_WIDE_INT
))))
10403 if (DECL_BIT_FIELD (field
)
10404 && modifier
== EXPAND_STACK_PARM
)
10406 op0
= expand_expr (value
, target
, tmode
, modifier
);
10407 if (DECL_BIT_FIELD (field
))
10409 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10410 scalar_int_mode imode
10411 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10413 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10415 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10417 op0
= expand_and (imode
, op0
, op1
, target
);
10421 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10423 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10425 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10433 goto normal_inner_ref
;
10435 case BIT_FIELD_REF
:
10436 case ARRAY_RANGE_REF
:
10439 machine_mode mode1
, mode2
;
10440 HOST_WIDE_INT bitsize
, bitpos
;
10442 int reversep
, volatilep
= 0, must_force_mem
;
10444 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10445 &unsignedp
, &reversep
, &volatilep
);
10446 rtx orig_op0
, memloc
;
10447 bool clear_mem_expr
= false;
10449 /* If we got back the original object, something is wrong. Perhaps
10450 we are evaluating an expression too early. In any event, don't
10451 infinitely recurse. */
10452 gcc_assert (tem
!= exp
);
10454 /* If TEM's type is a union of variable size, pass TARGET to the inner
10455 computation, since it will need a temporary and TARGET is known
10456 to have to do. This occurs in unchecked conversion in Ada. */
10458 = expand_expr_real (tem
,
10459 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10460 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10461 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10463 && modifier
!= EXPAND_STACK_PARM
10464 ? target
: NULL_RTX
),
10466 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10469 /* If the field has a mode, we want to access it in the
10470 field's mode, not the computed mode.
10471 If a MEM has VOIDmode (external with incomplete type),
10472 use BLKmode for it instead. */
10475 if (mode1
!= VOIDmode
)
10476 op0
= adjust_address (op0
, mode1
, 0);
10477 else if (GET_MODE (op0
) == VOIDmode
)
10478 op0
= adjust_address (op0
, BLKmode
, 0);
10482 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10484 /* If we have either an offset, a BLKmode result, or a reference
10485 outside the underlying object, we must force it to memory.
10486 Such a case can occur in Ada if we have unchecked conversion
10487 of an expression from a scalar type to an aggregate type or
10488 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10489 passed a partially uninitialized object or a view-conversion
10490 to a larger size. */
10491 must_force_mem
= (offset
10492 || mode1
== BLKmode
10493 || bitpos
+ bitsize
> GET_MODE_BITSIZE (mode2
));
10495 /* Handle CONCAT first. */
10496 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10499 && bitsize
== GET_MODE_BITSIZE (GET_MODE (op0
))
10500 && COMPLEX_MODE_P (mode1
)
10501 && COMPLEX_MODE_P (GET_MODE (op0
))
10502 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10503 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10506 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10507 if (mode1
!= GET_MODE (op0
))
10510 for (int i
= 0; i
< 2; i
++)
10512 rtx op
= read_complex_part (op0
, i
!= 0);
10513 if (GET_CODE (op
) == SUBREG
)
10514 op
= force_reg (GET_MODE (op
), op
);
10515 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10521 if (!REG_P (op
) && !MEM_P (op
))
10522 op
= force_reg (GET_MODE (op
), op
);
10523 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10527 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10532 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
10535 op0
= XEXP (op0
, 0);
10536 mode2
= GET_MODE (op0
);
10538 else if (bitpos
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
10539 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1)))
10543 op0
= XEXP (op0
, 1);
10545 mode2
= GET_MODE (op0
);
10548 /* Otherwise force into memory. */
10549 must_force_mem
= 1;
10552 /* If this is a constant, put it in a register if it is a legitimate
10553 constant and we don't need a memory reference. */
10554 if (CONSTANT_P (op0
)
10555 && mode2
!= BLKmode
10556 && targetm
.legitimate_constant_p (mode2
, op0
)
10557 && !must_force_mem
)
10558 op0
= force_reg (mode2
, op0
);
10560 /* Otherwise, if this is a constant, try to force it to the constant
10561 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10562 is a legitimate constant. */
10563 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10564 op0
= validize_mem (memloc
);
10566 /* Otherwise, if this is a constant or the object is not in memory
10567 and need be, put it there. */
10568 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10570 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10571 emit_move_insn (memloc
, op0
);
10573 clear_mem_expr
= true;
10578 machine_mode address_mode
;
10579 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10582 gcc_assert (MEM_P (op0
));
10584 address_mode
= get_address_mode (op0
);
10585 if (GET_MODE (offset_rtx
) != address_mode
)
10587 /* We cannot be sure that the RTL in offset_rtx is valid outside
10588 of a memory address context, so force it into a register
10589 before attempting to convert it to the desired mode. */
10590 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10591 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10594 /* See the comment in expand_assignment for the rationale. */
10595 if (mode1
!= VOIDmode
10598 && (bitpos
% bitsize
) == 0
10599 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
10600 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10602 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10606 op0
= offset_address (op0
, offset_rtx
,
10607 highest_pow2_factor (offset
));
10610 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10611 record its alignment as BIGGEST_ALIGNMENT. */
10612 if (MEM_P (op0
) && bitpos
== 0 && offset
!= 0
10613 && is_aligning_offset (offset
, tem
))
10614 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10616 /* Don't forget about volatility even if this is a bitfield. */
10617 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10619 if (op0
== orig_op0
)
10620 op0
= copy_rtx (op0
);
10622 MEM_VOLATILE_P (op0
) = 1;
10625 /* In cases where an aligned union has an unaligned object
10626 as a field, we might be extracting a BLKmode value from
10627 an integer-mode (e.g., SImode) object. Handle this case
10628 by doing the extract into an object as wide as the field
10629 (which we know to be the width of a basic mode), then
10630 storing into memory, and changing the mode to BLKmode. */
10631 if (mode1
== VOIDmode
10632 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10633 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10634 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10635 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10636 && modifier
!= EXPAND_CONST_ADDRESS
10637 && modifier
!= EXPAND_INITIALIZER
10638 && modifier
!= EXPAND_MEMORY
)
10639 /* If the bitfield is volatile and the bitsize
10640 is narrower than the access size of the bitfield,
10641 we need to extract bitfields from the access. */
10642 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10643 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10644 && mode1
!= BLKmode
10645 && bitsize
< GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
)
10646 /* If the field isn't aligned enough to fetch as a memref,
10647 fetch it as a bit field. */
10648 || (mode1
!= BLKmode
10650 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10651 || (bitpos
% GET_MODE_ALIGNMENT (mode1
) != 0)
10652 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10653 || (bitpos
% GET_MODE_ALIGNMENT (mode
) != 0))
10654 && modifier
!= EXPAND_MEMORY
10655 && ((modifier
== EXPAND_CONST_ADDRESS
10656 || modifier
== EXPAND_INITIALIZER
)
10658 : targetm
.slow_unaligned_access (mode1
,
10660 || (bitpos
% BITS_PER_UNIT
!= 0)))
10661 /* If the type and the field are a constant size and the
10662 size of the type isn't the same size as the bitfield,
10663 we must use bitfield operations. */
10665 && TYPE_SIZE (TREE_TYPE (exp
))
10666 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
10667 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)),
10670 machine_mode ext_mode
= mode
;
10672 if (ext_mode
== BLKmode
10673 && ! (target
!= 0 && MEM_P (op0
)
10675 && bitpos
% BITS_PER_UNIT
== 0))
10676 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10678 if (ext_mode
== BLKmode
)
10681 target
= assign_temp (type
, 1, 1);
10683 /* ??? Unlike the similar test a few lines below, this one is
10684 very likely obsolete. */
10688 /* In this case, BITPOS must start at a byte boundary and
10689 TARGET, if specified, must be a MEM. */
10690 gcc_assert (MEM_P (op0
)
10691 && (!target
|| MEM_P (target
))
10692 && !(bitpos
% BITS_PER_UNIT
));
10694 emit_block_move (target
,
10695 adjust_address (op0
, VOIDmode
,
10696 bitpos
/ BITS_PER_UNIT
),
10697 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
10699 (modifier
== EXPAND_STACK_PARM
10700 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10705 /* If we have nothing to extract, the result will be 0 for targets
10706 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10707 return 0 for the sake of consistency, as reading a zero-sized
10708 bitfield is valid in Ada and the value is fully specified. */
10712 op0
= validize_mem (op0
);
10714 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10715 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10717 /* If the result has a record type and the extraction is done in
10718 an integral mode, then the field may be not aligned on a byte
10719 boundary; in this case, if it has reverse storage order, it
10720 needs to be extracted as a scalar field with reverse storage
10721 order and put back into memory order afterwards. */
10722 if (TREE_CODE (type
) == RECORD_TYPE
10723 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10724 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10726 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10727 (modifier
== EXPAND_STACK_PARM
10728 ? NULL_RTX
: target
),
10729 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10731 /* If the result has a record type and the mode of OP0 is an
10732 integral mode then, if BITSIZE is narrower than this mode
10733 and this is for big-endian data, we must put the field
10734 into the high-order bits. And we must also put it back
10735 into memory order if it has been previously reversed. */
10736 scalar_int_mode op0_mode
;
10737 if (TREE_CODE (type
) == RECORD_TYPE
10738 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10740 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10743 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10744 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10745 size
- bitsize
, op0
, 1);
10748 op0
= flip_storage_order (op0_mode
, op0
);
10751 /* If the result type is BLKmode, store the data into a temporary
10752 of the appropriate type, but with the mode corresponding to the
10753 mode for the data we have (op0's mode). */
10754 if (mode
== BLKmode
)
10757 = assign_stack_temp_for_type (ext_mode
,
10758 GET_MODE_BITSIZE (ext_mode
),
10760 emit_move_insn (new_rtx
, op0
);
10761 op0
= copy_rtx (new_rtx
);
10762 PUT_MODE (op0
, BLKmode
);
10768 /* If the result is BLKmode, use that to access the object
10770 if (mode
== BLKmode
)
10773 /* Get a reference to just this component. */
10774 if (modifier
== EXPAND_CONST_ADDRESS
10775 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10776 op0
= adjust_address_nv (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10778 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10780 if (op0
== orig_op0
)
10781 op0
= copy_rtx (op0
);
10783 /* Don't set memory attributes if the base expression is
10784 SSA_NAME that got expanded as a MEM. In that case, we should
10785 just honor its original memory attributes. */
10786 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10787 set_mem_attributes (op0
, exp
, 0);
10789 if (REG_P (XEXP (op0
, 0)))
10790 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10792 /* If op0 is a temporary because the original expressions was forced
10793 to memory, clear MEM_EXPR so that the original expression cannot
10794 be marked as addressable through MEM_EXPR of the temporary. */
10795 if (clear_mem_expr
)
10796 set_mem_expr (op0
, NULL_TREE
);
10798 MEM_VOLATILE_P (op0
) |= volatilep
;
10801 && modifier
!= EXPAND_MEMORY
10802 && modifier
!= EXPAND_WRITE
)
10803 op0
= flip_storage_order (mode1
, op0
);
10805 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10806 || modifier
== EXPAND_CONST_ADDRESS
10807 || modifier
== EXPAND_INITIALIZER
)
10811 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10813 convert_move (target
, op0
, unsignedp
);
10818 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10821 /* All valid uses of __builtin_va_arg_pack () are removed during
10823 if (CALL_EXPR_VA_ARG_PACK (exp
))
10824 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10826 tree fndecl
= get_callee_fndecl (exp
), attr
;
10829 && (attr
= lookup_attribute ("error",
10830 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10831 error ("%Kcall to %qs declared with attribute error: %s",
10832 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10833 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10835 && (attr
= lookup_attribute ("warning",
10836 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10837 warning_at (tree_nonartificial_location (exp
),
10838 0, "%Kcall to %qs declared with attribute warning: %s",
10839 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10840 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10842 /* Check for a built-in function. */
10843 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10845 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10846 if (CALL_WITH_BOUNDS_P (exp
))
10847 return expand_builtin_with_bounds (exp
, target
, subtarget
,
10850 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10853 return expand_call (exp
, target
, ignore
);
10855 case VIEW_CONVERT_EXPR
:
10858 /* If we are converting to BLKmode, try to avoid an intermediate
10859 temporary by fetching an inner memory reference. */
10860 if (mode
== BLKmode
10861 && TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
10862 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
10863 && handled_component_p (treeop0
))
10865 machine_mode mode1
;
10866 HOST_WIDE_INT bitsize
, bitpos
;
10868 int unsignedp
, reversep
, volatilep
= 0;
10870 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
10871 &unsignedp
, &reversep
, &volatilep
);
10874 /* ??? We should work harder and deal with non-zero offsets. */
10876 && (bitpos
% BITS_PER_UNIT
) == 0
10879 && compare_tree_int (TYPE_SIZE (type
), bitsize
) == 0)
10881 /* See the normal_inner_ref case for the rationale. */
10883 = expand_expr_real (tem
,
10884 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10885 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10887 && modifier
!= EXPAND_STACK_PARM
10888 ? target
: NULL_RTX
),
10890 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10893 if (MEM_P (orig_op0
))
10897 /* Get a reference to just this component. */
10898 if (modifier
== EXPAND_CONST_ADDRESS
10899 || modifier
== EXPAND_SUM
10900 || modifier
== EXPAND_INITIALIZER
)
10901 op0
= adjust_address_nv (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10903 op0
= adjust_address (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10905 if (op0
== orig_op0
)
10906 op0
= copy_rtx (op0
);
10908 set_mem_attributes (op0
, treeop0
, 0);
10909 if (REG_P (XEXP (op0
, 0)))
10910 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10912 MEM_VOLATILE_P (op0
) |= volatilep
;
10918 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
10919 NULL
, inner_reference_p
);
10921 /* If the input and output modes are both the same, we are done. */
10922 if (mode
== GET_MODE (op0
))
10924 /* If neither mode is BLKmode, and both modes are the same size
10925 then we can use gen_lowpart. */
10926 else if (mode
!= BLKmode
&& GET_MODE (op0
) != BLKmode
10927 && (GET_MODE_PRECISION (mode
)
10928 == GET_MODE_PRECISION (GET_MODE (op0
)))
10929 && !COMPLEX_MODE_P (GET_MODE (op0
)))
10931 if (GET_CODE (op0
) == SUBREG
)
10932 op0
= force_reg (GET_MODE (op0
), op0
);
10933 temp
= gen_lowpart_common (mode
, op0
);
10938 if (!REG_P (op0
) && !MEM_P (op0
))
10939 op0
= force_reg (GET_MODE (op0
), op0
);
10940 op0
= gen_lowpart (mode
, op0
);
10943 /* If both types are integral, convert from one mode to the other. */
10944 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
10945 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
10946 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
10947 /* If the output type is a bit-field type, do an extraction. */
10948 else if (reduce_bit_field
)
10949 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
10950 TYPE_UNSIGNED (type
), NULL_RTX
,
10951 mode
, mode
, false, NULL
);
10952 /* As a last resort, spill op0 to memory, and reload it in a
10954 else if (!MEM_P (op0
))
10956 /* If the operand is not a MEM, force it into memory. Since we
10957 are going to be changing the mode of the MEM, don't call
10958 force_const_mem for constants because we don't allow pool
10959 constants to change mode. */
10960 tree inner_type
= TREE_TYPE (treeop0
);
10962 gcc_assert (!TREE_ADDRESSABLE (exp
));
10964 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
10966 = assign_stack_temp_for_type
10967 (TYPE_MODE (inner_type
),
10968 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
10970 emit_move_insn (target
, op0
);
10974 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10975 output type is such that the operand is known to be aligned, indicate
10976 that it is. Otherwise, we need only be concerned about alignment for
10977 non-BLKmode results. */
10980 enum insn_code icode
;
10982 if (modifier
!= EXPAND_WRITE
10983 && modifier
!= EXPAND_MEMORY
10984 && !inner_reference_p
10986 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
10988 /* If the target does have special handling for unaligned
10989 loads of mode then use them. */
10990 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10991 != CODE_FOR_nothing
)
10995 op0
= adjust_address (op0
, mode
, 0);
10996 /* We've already validated the memory, and we're creating a
10997 new pseudo destination. The predicates really can't
10999 reg
= gen_reg_rtx (mode
);
11001 /* Nor can the insn generator. */
11002 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11006 else if (STRICT_ALIGNMENT
)
11008 tree inner_type
= TREE_TYPE (treeop0
);
11009 HOST_WIDE_INT temp_size
11010 = MAX (int_size_in_bytes (inner_type
),
11011 (HOST_WIDE_INT
) GET_MODE_SIZE (mode
));
11013 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11014 rtx new_with_op0_mode
11015 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11017 gcc_assert (!TREE_ADDRESSABLE (exp
));
11019 if (GET_MODE (op0
) == BLKmode
)
11020 emit_block_move (new_with_op0_mode
, op0
,
11021 GEN_INT (GET_MODE_SIZE (mode
)),
11022 (modifier
== EXPAND_STACK_PARM
11023 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11025 emit_move_insn (new_with_op0_mode
, op0
);
11031 op0
= adjust_address (op0
, mode
, 0);
11038 tree lhs
= treeop0
;
11039 tree rhs
= treeop1
;
11040 gcc_assert (ignore
);
11042 /* Check for |= or &= of a bitfield of size one into another bitfield
11043 of size 1. In this case, (unless we need the result of the
11044 assignment) we can do this more efficiently with a
11045 test followed by an assignment, if necessary.
11047 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11048 things change so we do, this code should be enhanced to
11050 if (TREE_CODE (lhs
) == COMPONENT_REF
11051 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11052 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11053 && TREE_OPERAND (rhs
, 0) == lhs
11054 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11055 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11056 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11058 rtx_code_label
*label
= gen_label_rtx ();
11059 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11060 do_jump (TREE_OPERAND (rhs
, 1),
11063 profile_probability::uninitialized ());
11064 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11066 do_pending_stack_adjust ();
11067 emit_label (label
);
11071 expand_assignment (lhs
, rhs
, false);
11076 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11078 case REALPART_EXPR
:
11079 op0
= expand_normal (treeop0
);
11080 return read_complex_part (op0
, false);
11082 case IMAGPART_EXPR
:
11083 op0
= expand_normal (treeop0
);
11084 return read_complex_part (op0
, true);
11091 /* Expanded in cfgexpand.c. */
11092 gcc_unreachable ();
11094 case TRY_CATCH_EXPR
:
11096 case EH_FILTER_EXPR
:
11097 case TRY_FINALLY_EXPR
:
11098 /* Lowered by tree-eh.c. */
11099 gcc_unreachable ();
11101 case WITH_CLEANUP_EXPR
:
11102 case CLEANUP_POINT_EXPR
:
11104 case CASE_LABEL_EXPR
:
11109 case COMPOUND_EXPR
:
11110 case PREINCREMENT_EXPR
:
11111 case PREDECREMENT_EXPR
:
11112 case POSTINCREMENT_EXPR
:
11113 case POSTDECREMENT_EXPR
:
11116 case COMPOUND_LITERAL_EXPR
:
11117 /* Lowered by gimplify.c. */
11118 gcc_unreachable ();
11121 /* Function descriptors are not valid except for as
11122 initialization constants, and should not be expanded. */
11123 gcc_unreachable ();
11125 case WITH_SIZE_EXPR
:
11126 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11127 have pulled out the size to use in whatever context it needed. */
11128 return expand_expr_real (treeop0
, original_target
, tmode
,
11129 modifier
, alt_rtl
, inner_reference_p
);
11132 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11136 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11137 signedness of TYPE), possibly returning the result in TARGET.
11138 TYPE is known to be a partial integer type. */
11140 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11142 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11143 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11145 /* For constant values, reduce using build_int_cst_type. */
11146 if (CONST_INT_P (exp
))
11148 HOST_WIDE_INT value
= INTVAL (exp
);
11149 tree t
= build_int_cst_type (type
, value
);
11150 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11152 else if (TYPE_UNSIGNED (type
))
11154 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11155 rtx mask
= immed_wide_int_const
11156 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11157 return expand_and (mode
, exp
, mask
, target
);
11161 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11162 int count
= GET_MODE_PRECISION (mode
) - prec
;
11163 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11164 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11168 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11169 when applied to the address of EXP produces an address known to be
11170 aligned more than BIGGEST_ALIGNMENT. */
11173 is_aligning_offset (const_tree offset
, const_tree exp
)
11175 /* Strip off any conversions. */
11176 while (CONVERT_EXPR_P (offset
))
11177 offset
= TREE_OPERAND (offset
, 0);
11179 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11180 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11181 if (TREE_CODE (offset
) != BIT_AND_EXPR
11182 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11183 || compare_tree_int (TREE_OPERAND (offset
, 1),
11184 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11185 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11188 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11189 It must be NEGATE_EXPR. Then strip any more conversions. */
11190 offset
= TREE_OPERAND (offset
, 0);
11191 while (CONVERT_EXPR_P (offset
))
11192 offset
= TREE_OPERAND (offset
, 0);
11194 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11197 offset
= TREE_OPERAND (offset
, 0);
11198 while (CONVERT_EXPR_P (offset
))
11199 offset
= TREE_OPERAND (offset
, 0);
11201 /* This must now be the address of EXP. */
11202 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11205 /* Return the tree node if an ARG corresponds to a string constant or zero
11206 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11207 in bytes within the string that ARG is accessing. The type of the
11208 offset will be `sizetype'. */
11211 string_constant (tree arg
, tree
*ptr_offset
)
11213 tree array
, offset
, lower_bound
;
11216 if (TREE_CODE (arg
) == ADDR_EXPR
)
11218 if (TREE_CODE (TREE_OPERAND (arg
, 0)) == STRING_CST
)
11220 *ptr_offset
= size_zero_node
;
11221 return TREE_OPERAND (arg
, 0);
11223 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == VAR_DECL
)
11225 array
= TREE_OPERAND (arg
, 0);
11226 offset
= size_zero_node
;
11228 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == ARRAY_REF
)
11230 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11231 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11232 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11235 /* Check if the array has a nonzero lower bound. */
11236 lower_bound
= array_ref_low_bound (TREE_OPERAND (arg
, 0));
11237 if (!integer_zerop (lower_bound
))
11239 /* If the offset and base aren't both constants, return 0. */
11240 if (TREE_CODE (lower_bound
) != INTEGER_CST
)
11242 if (TREE_CODE (offset
) != INTEGER_CST
)
11244 /* Adjust offset by the lower bound. */
11245 offset
= size_diffop (fold_convert (sizetype
, offset
),
11246 fold_convert (sizetype
, lower_bound
));
11249 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == MEM_REF
)
11251 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11252 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11253 if (TREE_CODE (array
) != ADDR_EXPR
)
11255 array
= TREE_OPERAND (array
, 0);
11256 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11262 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11264 tree arg0
= TREE_OPERAND (arg
, 0);
11265 tree arg1
= TREE_OPERAND (arg
, 1);
11270 if (TREE_CODE (arg0
) == ADDR_EXPR
11271 && (TREE_CODE (TREE_OPERAND (arg0
, 0)) == STRING_CST
11272 || TREE_CODE (TREE_OPERAND (arg0
, 0)) == VAR_DECL
))
11274 array
= TREE_OPERAND (arg0
, 0);
11277 else if (TREE_CODE (arg1
) == ADDR_EXPR
11278 && (TREE_CODE (TREE_OPERAND (arg1
, 0)) == STRING_CST
11279 || TREE_CODE (TREE_OPERAND (arg1
, 0)) == VAR_DECL
))
11281 array
= TREE_OPERAND (arg1
, 0);
11290 if (TREE_CODE (array
) == STRING_CST
)
11292 *ptr_offset
= fold_convert (sizetype
, offset
);
11295 else if (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
11298 tree init
= ctor_for_folding (array
);
11300 /* Variables initialized to string literals can be handled too. */
11301 if (init
== error_mark_node
11303 || TREE_CODE (init
) != STRING_CST
)
11306 /* Avoid const char foo[4] = "abcde"; */
11307 if (DECL_SIZE_UNIT (array
) == NULL_TREE
11308 || TREE_CODE (DECL_SIZE_UNIT (array
)) != INTEGER_CST
11309 || (length
= TREE_STRING_LENGTH (init
)) <= 0
11310 || compare_tree_int (DECL_SIZE_UNIT (array
), length
) < 0)
11313 /* If variable is bigger than the string literal, OFFSET must be constant
11314 and inside of the bounds of the string literal. */
11315 offset
= fold_convert (sizetype
, offset
);
11316 if (compare_tree_int (DECL_SIZE_UNIT (array
), length
) > 0
11317 && (! tree_fits_uhwi_p (offset
)
11318 || compare_tree_int (offset
, length
) >= 0))
11321 *ptr_offset
= offset
;
11328 /* Generate code to calculate OPS, and exploded expression
11329 using a store-flag instruction and return an rtx for the result.
11330 OPS reflects a comparison.
11332 If TARGET is nonzero, store the result there if convenient.
11334 Return zero if there is no suitable set-flag instruction
11335 available on this machine.
11337 Once expand_expr has been called on the arguments of the comparison,
11338 we are committed to doing the store flag, since it is not safe to
11339 re-evaluate the expression. We emit the store-flag insn by calling
11340 emit_store_flag, but only expand the arguments if we have a reason
11341 to believe that emit_store_flag will be successful. If we think that
11342 it will, but it isn't, we have to simulate the store-flag with a
11343 set/jump/set sequence. */
11346 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11348 enum rtx_code code
;
11349 tree arg0
, arg1
, type
;
11350 machine_mode operand_mode
;
11353 rtx subtarget
= target
;
11354 location_t loc
= ops
->location
;
11359 /* Don't crash if the comparison was erroneous. */
11360 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11363 type
= TREE_TYPE (arg0
);
11364 operand_mode
= TYPE_MODE (type
);
11365 unsignedp
= TYPE_UNSIGNED (type
);
11367 /* We won't bother with BLKmode store-flag operations because it would mean
11368 passing a lot of information to emit_store_flag. */
11369 if (operand_mode
== BLKmode
)
11372 /* We won't bother with store-flag operations involving function pointers
11373 when function pointers must be canonicalized before comparisons. */
11374 if (targetm
.have_canonicalize_funcptr_for_compare ()
11375 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11376 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11378 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11379 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11380 == FUNCTION_TYPE
))))
11386 /* For vector typed comparisons emit code to generate the desired
11387 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11388 expander for this. */
11389 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11391 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11392 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11393 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
11394 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11397 tree if_true
= constant_boolean_node (true, ops
->type
);
11398 tree if_false
= constant_boolean_node (false, ops
->type
);
11399 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11404 /* Get the rtx comparison code to use. We know that EXP is a comparison
11405 operation of some type. Some comparisons against 1 and -1 can be
11406 converted to comparisons with zero. Do so here so that the tests
11407 below will be aware that we have a comparison with zero. These
11408 tests will not catch constants in the first operand, but constants
11409 are rarely passed as the first operand. */
11420 if (integer_onep (arg1
))
11421 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11423 code
= unsignedp
? LTU
: LT
;
11426 if (! unsignedp
&& integer_all_onesp (arg1
))
11427 arg1
= integer_zero_node
, code
= LT
;
11429 code
= unsignedp
? LEU
: LE
;
11432 if (! unsignedp
&& integer_all_onesp (arg1
))
11433 arg1
= integer_zero_node
, code
= GE
;
11435 code
= unsignedp
? GTU
: GT
;
11438 if (integer_onep (arg1
))
11439 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11441 code
= unsignedp
? GEU
: GE
;
11444 case UNORDERED_EXPR
:
11470 gcc_unreachable ();
11473 /* Put a constant second. */
11474 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11475 || TREE_CODE (arg0
) == FIXED_CST
)
11477 std::swap (arg0
, arg1
);
11478 code
= swap_condition (code
);
11481 /* If this is an equality or inequality test of a single bit, we can
11482 do this by shifting the bit being tested to the low-order bit and
11483 masking the result with the constant 1. If the condition was EQ,
11484 we xor it with 1. This does not require an scc insn and is faster
11485 than an scc insn even if we have it.
11487 The code to make this transformation was moved into fold_single_bit_test,
11488 so we just call into the folder and expand its result. */
11490 if ((code
== NE
|| code
== EQ
)
11491 && integer_zerop (arg1
)
11492 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
11494 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
11496 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
11498 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
11499 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
11500 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
11501 gimple_assign_rhs1 (srcstmt
),
11502 gimple_assign_rhs2 (srcstmt
));
11503 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
11505 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
11509 if (! get_subtarget (target
)
11510 || GET_MODE (subtarget
) != operand_mode
)
11513 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11516 target
= gen_reg_rtx (mode
);
11518 /* Try a cstore if possible. */
11519 return emit_store_flag_force (target
, code
, op0
, op1
,
11520 operand_mode
, unsignedp
,
11521 (TYPE_PRECISION (ops
->type
) == 1
11522 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
11525 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11526 0 otherwise (i.e. if there is no casesi instruction).
11528 DEFAULT_PROBABILITY is the probability of jumping to the default
11531 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
11532 rtx table_label
, rtx default_label
, rtx fallback_label
,
11533 profile_probability default_probability
)
11535 struct expand_operand ops
[5];
11536 scalar_int_mode index_mode
= SImode
;
11537 rtx op1
, op2
, index
;
11539 if (! targetm
.have_casesi ())
11542 /* The index must be some form of integer. Convert it to SImode. */
11543 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
11544 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
11546 rtx rangertx
= expand_normal (range
);
11548 /* We must handle the endpoints in the original mode. */
11549 index_expr
= build2 (MINUS_EXPR
, index_type
,
11550 index_expr
, minval
);
11551 minval
= integer_zero_node
;
11552 index
= expand_normal (index_expr
);
11554 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
11555 omode
, 1, default_label
,
11556 default_probability
);
11557 /* Now we can safely truncate. */
11558 index
= convert_to_mode (index_mode
, index
, 0);
11562 if (omode
!= index_mode
)
11564 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
11565 index_expr
= fold_convert (index_type
, index_expr
);
11568 index
= expand_normal (index_expr
);
11571 do_pending_stack_adjust ();
11573 op1
= expand_normal (minval
);
11574 op2
= expand_normal (range
);
11576 create_input_operand (&ops
[0], index
, index_mode
);
11577 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
11578 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
11579 create_fixed_operand (&ops
[3], table_label
);
11580 create_fixed_operand (&ops
[4], (default_label
11582 : fallback_label
));
11583 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
11587 /* Attempt to generate a tablejump instruction; same concept. */
11588 /* Subroutine of the next function.
11590 INDEX is the value being switched on, with the lowest value
11591 in the table already subtracted.
11592 MODE is its expected mode (needed if INDEX is constant).
11593 RANGE is the length of the jump table.
11594 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11596 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11597 index value is out of range.
11598 DEFAULT_PROBABILITY is the probability of jumping to
11599 the default label. */
11602 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
11603 rtx default_label
, profile_probability default_probability
)
11607 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
11608 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11610 /* Do an unsigned comparison (in the proper mode) between the index
11611 expression and the value which represents the length of the range.
11612 Since we just finished subtracting the lower bound of the range
11613 from the index expression, this comparison allows us to simultaneously
11614 check that the original index expression value is both greater than
11615 or equal to the minimum value of the range and less than or equal to
11616 the maximum value of the range. */
11619 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11620 default_label
, default_probability
);
11623 /* If index is in range, it must fit in Pmode.
11624 Convert to Pmode so we can index with it. */
11626 index
= convert_to_mode (Pmode
, index
, 1);
11628 /* Don't let a MEM slip through, because then INDEX that comes
11629 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11630 and break_out_memory_refs will go to work on it and mess it up. */
11631 #ifdef PIC_CASE_VECTOR_ADDRESS
11632 if (flag_pic
&& !REG_P (index
))
11633 index
= copy_to_mode_reg (Pmode
, index
);
11636 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11637 GET_MODE_SIZE, because this indicates how large insns are. The other
11638 uses should all be Pmode, because they are addresses. This code
11639 could fail if addresses and insns are not the same size. */
11640 index
= simplify_gen_binary (MULT
, Pmode
, index
,
11641 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
11643 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
11644 gen_rtx_LABEL_REF (Pmode
, table_label
));
11646 #ifdef PIC_CASE_VECTOR_ADDRESS
11648 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11651 index
= memory_address (CASE_VECTOR_MODE
, index
);
11652 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11653 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11654 convert_move (temp
, vector
, 0);
11656 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
11658 /* If we are generating PIC code or if the table is PC-relative, the
11659 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11660 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11665 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11666 rtx table_label
, rtx default_label
,
11667 profile_probability default_probability
)
11671 if (! targetm
.have_tablejump ())
11674 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11675 fold_convert (index_type
, index_expr
),
11676 fold_convert (index_type
, minval
));
11677 index
= expand_normal (index_expr
);
11678 do_pending_stack_adjust ();
11680 do_tablejump (index
, TYPE_MODE (index_type
),
11681 convert_modes (TYPE_MODE (index_type
),
11682 TYPE_MODE (TREE_TYPE (range
)),
11683 expand_normal (range
),
11684 TYPE_UNSIGNED (TREE_TYPE (range
))),
11685 table_label
, default_label
, default_probability
);
11689 /* Return a CONST_VECTOR rtx representing vector mask for
11690 a VECTOR_CST of booleans. */
11692 const_vector_mask_from_tree (tree exp
)
11697 machine_mode inner
, mode
;
11699 mode
= TYPE_MODE (TREE_TYPE (exp
));
11700 units
= VECTOR_CST_NELTS (exp
);
11701 inner
= GET_MODE_INNER (mode
);
11703 v
= rtvec_alloc (units
);
11705 for (i
= 0; i
< units
; ++i
)
11707 elt
= VECTOR_CST_ELT (exp
, i
);
11709 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11710 if (integer_zerop (elt
))
11711 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
11712 else if (integer_onep (elt
)
11713 || integer_minus_onep (elt
))
11714 RTVEC_ELT (v
, i
) = CONSTM1_RTX (inner
);
11716 gcc_unreachable ();
11719 return gen_rtx_CONST_VECTOR (mode
, v
);
11722 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11723 Return a constant scalar rtx of mode MODE in which bit X is set if element
11724 X of EXP is nonzero. */
11726 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
11728 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
11732 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11734 elt
= VECTOR_CST_ELT (exp
, i
);
11735 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11736 if (integer_all_onesp (elt
))
11737 res
= wi::set_bit (res
, i
);
11739 gcc_assert (integer_zerop (elt
));
11742 return immed_wide_int_const (res
, mode
);
11745 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11747 const_vector_from_tree (tree exp
)
11752 machine_mode inner
, mode
;
11754 mode
= TYPE_MODE (TREE_TYPE (exp
));
11756 if (initializer_zerop (exp
))
11757 return CONST0_RTX (mode
);
11759 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
11760 return const_vector_mask_from_tree (exp
);
11762 units
= VECTOR_CST_NELTS (exp
);
11763 inner
= GET_MODE_INNER (mode
);
11765 v
= rtvec_alloc (units
);
11767 for (i
= 0; i
< units
; ++i
)
11769 elt
= VECTOR_CST_ELT (exp
, i
);
11771 if (TREE_CODE (elt
) == REAL_CST
)
11772 RTVEC_ELT (v
, i
) = const_double_from_real_value (TREE_REAL_CST (elt
),
11774 else if (TREE_CODE (elt
) == FIXED_CST
)
11775 RTVEC_ELT (v
, i
) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11778 RTVEC_ELT (v
, i
) = immed_wide_int_const (wi::to_wide (elt
), inner
);
11781 return gen_rtx_CONST_VECTOR (mode
, v
);
11784 /* Build a decl for a personality function given a language prefix. */
11787 build_personality_function (const char *lang
)
11789 const char *unwind_and_version
;
11793 switch (targetm_common
.except_unwind_info (&global_options
))
11798 unwind_and_version
= "_sj0";
11802 unwind_and_version
= "_v0";
11805 unwind_and_version
= "_seh0";
11808 gcc_unreachable ();
11811 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11813 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11814 long_long_unsigned_type_node
,
11815 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11816 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11817 get_identifier (name
), type
);
11818 DECL_ARTIFICIAL (decl
) = 1;
11819 DECL_EXTERNAL (decl
) = 1;
11820 TREE_PUBLIC (decl
) = 1;
11822 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11823 are the flags assigned by targetm.encode_section_info. */
11824 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11829 /* Extracts the personality function of DECL and returns the corresponding
11833 get_personality_function (tree decl
)
11835 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11836 enum eh_personality_kind pk
;
11838 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11839 if (pk
== eh_personality_none
)
11843 && pk
== eh_personality_any
)
11844 personality
= lang_hooks
.eh_personality ();
11846 if (pk
== eh_personality_lang
)
11847 gcc_assert (personality
!= NULL_TREE
);
11849 return XEXP (DECL_RTL (personality
), 0);
11852 /* Returns a tree for the size of EXP in bytes. */
11855 tree_expr_size (const_tree exp
)
11858 && DECL_SIZE_UNIT (exp
) != 0)
11859 return DECL_SIZE_UNIT (exp
);
11861 return size_in_bytes (TREE_TYPE (exp
));
11864 /* Return an rtx for the size in bytes of the value of EXP. */
11867 expr_size (tree exp
)
11871 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11872 size
= TREE_OPERAND (exp
, 1);
11875 size
= tree_expr_size (exp
);
11877 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
11880 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
11883 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11884 if the size can vary or is larger than an integer. */
11886 static HOST_WIDE_INT
11887 int_expr_size (tree exp
)
11891 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11892 size
= TREE_OPERAND (exp
, 1);
11895 size
= tree_expr_size (exp
);
11899 if (size
== 0 || !tree_fits_shwi_p (size
))
11902 return tree_to_shwi (size
);