Replace occurances of "GNU CC" with "GCC" and reformat as appropriate.
[official-gcc.git] / gcc / config / arm / netbsd.h
blobd7e6837a25453b09ecbfb7cc3d44bbc497172379
1 /* NetBSD/arm a.out version.
2 Copyright (C) 1993, 1994, 1997, 1998, 2003 Free Software Foundation, Inc.
3 Contributed by Mark Brinicombe (amb@physig.ph.kcl.ac.uk)
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 2, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Run-time Target Specification. */
23 #undef TARGET_VERSION
24 #define TARGET_VERSION fputs (" (ARM/NetBSD)", stderr);
26 /* This is used in ASM_FILE_START. */
27 #undef ARM_OS_NAME
28 #define ARM_OS_NAME "NetBSD"
30 /* Unsigned chars produces much better code than signed. */
31 #define DEFAULT_SIGNED_CHAR 0
33 /* Since we always use GAS as our assembler we support stabs. */
34 #define DBX_DEBUGGING_INFO 1
36 /*#undef ASM_DECLARE_FUNCTION_NAME*/
38 /* ARM6 family default cpu. */
39 #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
41 /* Default is to use APCS-32 mode. */
42 #undef TARGET_DEFAULT
43 #define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_FRAME)
45 /* Some defines for CPP.
46 arm32 is the NetBSD port name, so we always define arm32 and __arm32__. */
47 #define TARGET_OS_CPP_BUILTINS() \
48 do { \
49 NETBSD_OS_CPP_BUILTINS_AOUT(); \
50 builtin_define_std ("arm32"); \
51 builtin_define_std ("unix"); \
52 builtin_define_std ("riscbsd"); \
53 } while (0)
55 #undef SUBTARGET_EXTRA_SPECS
56 #define SUBTARGET_EXTRA_SPECS \
57 { "netbsd_cpp_spec", NETBSD_CPP_SPEC }, \
58 { "netbsd_link_spec", NETBSD_LINK_SPEC_AOUT },
60 #undef CPP_SPEC
61 #define CPP_SPEC "\
62 %(cpp_cpu_arch) %(cpp_apcs_pc) %(cpp_float) %(cpp_endian) %(netbsd_cpp_spec) \
65 /* Because TARGET_DEFAULT sets ARM_FLAG_APCS_32 */
66 #undef CPP_APCS_PC_DEFAULT_SPEC
67 #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
69 /* Because TARGET_DEFAULT sets ARM_FLAG_SOFT_FLOAT */
70 #undef CPP_FLOAT_DEFAULT_SPEC
71 #define CPP_FLOAT_DEFAULT_SPEC "-D__SOFTFP__"
73 /* Pass -X to the linker so that it will strip symbols starting with 'L' */
74 #undef LINK_SPEC
75 #define LINK_SPEC "-X %(netbsd_link_spec)"
77 #undef SIZE_TYPE
78 #define SIZE_TYPE "unsigned int"
80 #undef PTRDIFF_TYPE
81 #define PTRDIFF_TYPE "int"
83 #define HANDLE_SYSV_PRAGMA 1
85 /* We don't have any limit on the length as out debugger is GDB. */
86 #undef DBX_CONTIN_LENGTH
88 /* NetBSD does its profiling differently to the Acorn compiler. We
89 don't need a word following the mcount call; and to skip it
90 requires either an assembly stub or use of fomit-frame-pointer when
91 compiling the profiling functions. Since we break Acorn CC
92 compatibility below a little more won't hurt. */
94 #undef ARM_FUNCTION_PROFILER
95 #define ARM_FUNCTION_PROFILER(STREAM,LABELNO) \
96 { \
97 fprintf(STREAM, "\tmov\t%sip, %slr\n", REGISTER_PREFIX, REGISTER_PREFIX); \
98 fprintf(STREAM, "\tbl\tmcount\n"); \
101 /* On the ARM `@' introduces a comment, so we must use something else
102 for .type directives. */
103 #undef TYPE_OPERAND_FMT
104 #define TYPE_OPERAND_FMT "%%%s"
106 /* NetBSD uses the old PCC style aggregate returning conventions. */
107 #undef DEFAULT_PCC_STRUCT_RETURN
108 #define DEFAULT_PCC_STRUCT_RETURN 1
110 /* Although not normally relevant (since by default, all aggregates
111 are returned in memory) compiling some parts of libc requires
112 non-APCS style struct returns. */
113 #undef RETURN_IN_MEMORY
115 /* VERY BIG NOTE : Change of structure alignment for RiscBSD.
116 There are consequences you should be aware of...
118 Normally GCC/arm uses a structure alignment of 32 for compatibility
119 with armcc. This means that structures are padded to a word
120 boundary. However this causes problems with bugged NetBSD kernel
121 code (possibly userland code as well - I have not checked every
122 binary). The nature of this bugged code is to rely on sizeof()
123 returning the correct size of various structures rounded to the
124 nearest byte (SCSI and ether code are two examples, the vm system
125 is another). This code breaks when the structure alignment is 32
126 as sizeof() will report a word=rounded size. By changing the
127 structure alignment to 8. GCC will conform to what is expected by
128 NetBSD.
130 This has several side effects that should be considered.
131 1. Structures will only be aligned to the size of the largest member.
132 i.e. structures containing only bytes will be byte aligned.
133 structures containing shorts will be half word aligned.
134 structures containing ints will be word aligned.
136 This means structures should be padded to a word boundary if
137 alignment of 32 is required for byte structures etc.
139 2. A potential performance penalty may exist if strings are no longer
140 word aligned. GCC will not be able to use word load/stores to copy
141 short strings.
143 This modification is not encouraged but with the present state of the
144 NetBSD source tree it is currently the only solution that meets the
145 requirements. */
146 #undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
147 #define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
149 /* Emit code to set up a trampoline and synchronize the caches. */
150 #undef INITIALIZE_TRAMPOLINE
151 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
153 emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
154 (CXT)); \
155 emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
156 (FNADDR)); \
157 emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
158 0, VOIDmode, 2, TRAMP, Pmode, \
159 plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \
162 /* Clear the instruction cache from `BEG' to `END'. This makes a
163 call to the ARM32_SYNC_ICACHE architecture specific syscall. */
164 #define CLEAR_INSN_CACHE(BEG, END) \
166 extern int sysarch(int number, void *args); \
167 struct { \
168 unsigned int addr; \
169 int len; \
170 } s; \
171 s.addr = (unsigned int)(BEG); \
172 s.len = (END) - (BEG); \
173 (void)sysarch(0, &s); \