gcc/config/i386/pmmintrin.h

   1 /* Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008
   2    Free Software Foundation, Inc.
   3
   4    This file is part of GCC.
   5
   6    GCC is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2, or (at your option)
   9    any later version.
  10
  11    GCC is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with GCC; see the file COPYING.  If not, write to
  18    the Free Software Foundation, 51 Franklin Street, Fifth Floor,
  19    Boston, MA 02110-1301, USA.  */
  20
  21 /* As a special exception, if you include this header file into source
  22    files compiled by GCC, this header file does not by itself cause
  23    the resulting executable to be covered by the GNU General Public
  24    License.  This exception does not however invalidate any other
  25    reasons why the executable file might be covered by the GNU General
  26    Public License.  */
  27
  28 /* Implemented from the specification included in the Intel C++ Compiler
  29    User Guide and Reference, version 9.0.  */
  30
  31 #ifndef _PMMINTRIN_H_INCLUDED
  32 #define _PMMINTRIN_H_INCLUDED
  33
  34 #ifndef __SSE3__
  35 # error "SSE3 instruction set not enabled"
  36 #else
  37
  38 /* We need definitions from the SSE2 and SSE header files*/
  39 #include <emmintrin.h>
  40
  41 /* Additional bits in the MXCSR.  */
  42 #define _MM_DENORMALS_ZERO_MASK         0x0040
  43 #define _MM_DENORMALS_ZERO_ON           0x0040
  44 #define _MM_DENORMALS_ZERO_OFF          0x0000
  45
  46 #define _MM_SET_DENORMALS_ZERO_MODE(mode) \
  47   _mm_setcsr ((_mm_getcsr () & ~_MM_DENORMALS_ZERO_MASK) | (mode))
  48 #define _MM_GET_DENORMALS_ZERO_MODE() \
  49   (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
  50
  51 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  52 _mm_addsub_ps (__m128 __X, __m128 __Y)
  53 {
  54   return (__m128) __builtin_ia32_addsubps ((__v4sf)__X, (__v4sf)__Y);
  55 }
  56
  57 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  58 _mm_hadd_ps (__m128 __X, __m128 __Y)
  59 {
  60   return (__m128) __builtin_ia32_haddps ((__v4sf)__X, (__v4sf)__Y);
  61 }
  62
  63 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  64 _mm_hsub_ps (__m128 __X, __m128 __Y)
  65 {
  66   return (__m128) __builtin_ia32_hsubps ((__v4sf)__X, (__v4sf)__Y);
  67 }
  68
  69 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  70 _mm_movehdup_ps (__m128 __X)
  71 {
  72   return (__m128) __builtin_ia32_movshdup ((__v4sf)__X);
  73 }
  74
  75 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  76 _mm_moveldup_ps (__m128 __X)
  77 {
  78   return (__m128) __builtin_ia32_movsldup ((__v4sf)__X);
  79 }
  80
  81 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  82 _mm_addsub_pd (__m128d __X, __m128d __Y)
  83 {
  84   return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
  85 }
  86
  87 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  88 _mm_hadd_pd (__m128d __X, __m128d __Y)
  89 {
  90   return (__m128d) __builtin_ia32_haddpd ((__v2df)__X, (__v2df)__Y);
  91 }
  92
  93 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  94 _mm_hsub_pd (__m128d __X, __m128d __Y)
  95 {
  96   return (__m128d) __builtin_ia32_hsubpd ((__v2df)__X, (__v2df)__Y);
  97 }
  98
  99 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 100 _mm_loaddup_pd (double const *__P)
 101 {
 102   return _mm_load1_pd (__P);
 103 }
 104
 105 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 106 _mm_movedup_pd (__m128d __X)
 107 {
 108   return _mm_shuffle_pd (__X, __X, _MM_SHUFFLE2 (0,0));
 109 }
 110
 111 extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 112 _mm_lddqu_si128 (__m128i const *__P)
 113 {
 114   return (__m128i) __builtin_ia32_lddqu ((char const *)__P);
 115 }
 116
 117 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 118 _mm_monitor (void const * __P, unsigned int __E, unsigned int __H)
 119 {
 120   __builtin_ia32_monitor (__P, __E, __H);
 121 }
 122
 123 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 124 _mm_mwait (unsigned int __E, unsigned int __H)
 125 {
 126   __builtin_ia32_mwait (__E, __H);
 127 }
 128
 129 #endif /* __SSE3__ */
 130
 131 #endif /* _PMMINTRIN_H_INCLUDED */