old-autovect-branch/gcc/testsuite/gcc.misc-tests/arm-isr.c

   1 extern void abort ();
   2 extern void exit (int);
   3
   4 #ifndef __thumb__
   5 /* There used to be a couple of bugs in the ARM's prologue and epilogue
   6    generation for ISR routines.  The wrong epilogue instruction would be
   7    generated to restore the IP register if it had to be pushed onto the
   8    stack, and the wrong offset was being computed for local variables if
   9    r0 - r3 had to be saved.  This tests for both of these cases.  */
  10
  11 int z = 9;
  12
  13 int
  14 bar (void)
  15 {
  16   return z;
  17 }
  18
  19 int
  20 foo (int a, int b, int c, int d, int e, int f, int g, int h)
  21 {
  22   volatile int i = (a + b) - (g + h) + bar ();
  23   volatile int j = (e + f) - (c + d);
  24
  25   return a + b + c + d + e + f + g + h + i + j;
  26 }
  27
  28 int foo1 (int a, int b, int c, int d, int e, int f, int g, int h) __attribute__ ((interrupt ("IRQ")));
  29
  30 int
  31 foo1 (int a, int b, int c, int d, int e, int f, int g, int h)
  32 {
  33   volatile int i = (a + b) - (g + h) + bar ();
  34   volatile int j = (e + f) - (c + d);
  35
  36   return a + b + c + d + e + f + g + h + i + j;
  37 }
  38 #endif
  39
  40 int
  41 main (void)
  42 {
  43 #ifndef __thumb__
  44   if (foo (1, 2, 3, 4, 5, 6, 7, 8) != 32)
  45     abort ();
  46
  47   if (foo1 (1, 2, 3, 4, 5, 6, 7, 8) != 32)
  48     abort ();
  49 #endif
  50   exit (0);
  51 }