1 /* Compute cover class of the allocnos and their hard register costs.
2 Copyright (C) 2006, 2007
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
25 #include "coretypes.h"
27 #include "hard-reg-set.h"
32 #include "basic-block.h"
34 #include "addresses.h"
35 #include "insn-config.h"
42 /* The file contains code is analogous to one in regclass but the code
43 works on the allocno basis. */
47 static void record_reg_classes (int, int, rtx
*, enum machine_mode
*,
48 const char **, rtx
, struct costs
**,
50 static inline int ok_for_index_p_nonstrict (rtx
);
51 static inline int ok_for_base_p_nonstrict (rtx
, enum machine_mode
,
52 enum rtx_code
, enum rtx_code
);
53 static void record_address_regs (enum machine_mode
, rtx x
, int,
54 enum rtx_code
, enum rtx_code
, int scale
);
55 static void record_operand_costs (rtx
, struct costs
**, enum reg_class
*);
56 static rtx
scan_one_insn (rtx
);
57 static void print_costs (FILE *);
58 static void process_bb_node_for_costs (loop_tree_node_t
);
59 static void find_allocno_class_costs (void);
60 static void process_bb_node_for_hard_reg_moves (loop_tree_node_t
);
61 static void setup_allocno_cover_class_and_costs (void);
62 static void free_ira_costs (void);
64 #ifdef FORBIDDEN_INC_DEC_CLASSES
65 /* Indexed by n, is nonzero if (REG n) is used in an auto-inc or
67 static char *in_inc_dec
;
70 /* The `costs' struct records the cost of using a hard register of
71 each class and of using memory for each allocno. We use this data
72 to set up register and costs. */
76 /* Costs for important register classes start here. */
80 /* Initialized once. It is a size of the allocated struct costs. */
81 static int max_struct_costs_size
;
83 /* Allocated and initialized once, and used to initialize cost values
85 static struct costs
*init_cost
;
87 /* Allocated once, and used for temporary purposes. */
88 static struct costs
*temp_costs
;
90 /* Allocated once, and used for the cost calculation. */
91 static struct costs
*op_costs
[MAX_RECOG_OPERANDS
];
92 static struct costs
*this_op_costs
[MAX_RECOG_OPERANDS
];
94 /* Record the initial and accumulated cost of each class for each
96 static struct costs
*total_costs
;
98 /* Classes used for cost calculation. */
99 static enum reg_class
*cost_classes
;
101 /* The size of the previous array. */
102 static int cost_classes_num
;
104 /* The array containing order numbers of cost classes. */
105 static int cost_class_nums
[N_REG_CLASSES
];
107 /* It is the current size of struct costs. */
108 static int struct_costs_size
;
110 /* Return pointer to structure containing costs of allocno with given
112 #define COSTS_OF_ALLOCNO(arr, num) \
113 ((struct costs *) ((char *) (arr) + (num) * struct_costs_size))
115 /* Record register class preferences of each allocno. */
116 static enum reg_class
*allocno_pref
;
118 /* Allocated buffers for allocno_pref. */
119 static enum reg_class
*allocno_pref_buffer
;
121 /* Frequency of executions of the current insn. */
122 static int frequency
;
124 /* Compute the cost of loading X into (if TO_P is nonzero) or from (if
125 TO_P is zero) a register of class CLASS in mode MODE. X must not
126 be a pseudo register. */
128 copy_cost (rtx x
, enum machine_mode mode
, enum reg_class
class, int to_p
,
129 secondary_reload_info
*prev_sri
)
131 secondary_reload_info sri
;
132 enum reg_class secondary_class
= NO_REGS
;
134 /* If X is a SCRATCH, there is actually nothing to move since we are
135 assuming optimal allocation. */
136 if (GET_CODE (x
) == SCRATCH
)
139 /* Get the class we will actually use for a reload. */
140 class = PREFERRED_RELOAD_CLASS (x
, class);
142 /* If we need a secondary reload for an intermediate, the cost is
143 that to load the input into the intermediate register, then to
145 sri
.prev_sri
= prev_sri
;
147 secondary_class
= targetm
.secondary_reload (to_p
, x
, class, mode
, &sri
);
149 if (register_move_cost
[mode
] == NULL
)
150 init_register_move_cost (mode
);
152 if (secondary_class
!= NO_REGS
)
153 return (move_cost
[mode
] [secondary_class
] [class]
155 + copy_cost (x
, mode
, secondary_class
, to_p
, &sri
));
157 /* For memory, use the memory move cost, for (hard) registers, use
158 the cost to move between the register classes, and use 2 for
159 everything else (constants). */
160 if (MEM_P (x
) || class == NO_REGS
)
161 return sri
.extra_cost
+ memory_move_cost
[mode
] [class] [to_p
!= 0];
165 + move_cost
[mode
] [REGNO_REG_CLASS (REGNO (x
))] [class]);
167 /* If this is a constant, we may eventually want to call rtx_cost
169 return sri
.extra_cost
+ COSTS_N_INSNS (1);
174 /* Record the cost of using memory or registers of various classes for
175 the operands in INSN.
177 N_ALTS is the number of alternatives.
178 N_OPS is the number of operands.
179 OPS is an array of the operands.
180 MODES are the modes of the operands, in case any are VOIDmode.
181 CONSTRAINTS are the constraints to use for the operands. This array
182 is modified by this procedure.
184 This procedure works alternative by alternative. For each
185 alternative we assume that we will be able to allocate all allocnos
186 to their ideal register class and calculate the cost of using that
187 alternative. Then we compute for each operand that is a
188 pseudo-register, the cost of having the allocno allocated to each
189 register class and using it in that alternative. To this cost is
190 added the cost of the alternative.
192 The cost of each class for this insn is its lowest cost among all
195 record_reg_classes (int n_alts
, int n_ops
, rtx
*ops
,
196 enum machine_mode
*modes
, const char **constraints
,
197 rtx insn
, struct costs
**op_costs
,
198 enum reg_class
*allocno_pref
)
204 /* Process each alternative, each time minimizing an operand's cost
205 with the cost for each operand in that alternative. */
206 for (alt
= 0; alt
< n_alts
; alt
++)
208 enum reg_class classes
[MAX_RECOG_OPERANDS
];
209 int allows_mem
[MAX_RECOG_OPERANDS
];
214 for (i
= 0; i
< n_ops
; i
++)
217 const char *p
= constraints
[i
];
219 enum machine_mode mode
= modes
[i
];
223 /* Initially show we know nothing about the register class. */
224 classes
[i
] = NO_REGS
;
227 /* If this operand has no constraints at all, we can
228 conclude nothing about it since anything is valid. */
231 if (REG_P (op
) && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
232 memset (this_op_costs
[i
], 0, struct_costs_size
);
236 /* If this alternative is only relevant when this operand
237 matches a previous operand, we do different things
238 depending on whether this operand is a allocno-reg or not.
239 We must process any modifiers for the operand before we
240 can make this test. */
241 while (*p
== '%' || *p
== '=' || *p
== '+' || *p
== '&')
244 if (p
[0] >= '0' && p
[0] <= '0' + i
&& (p
[1] == ',' || p
[1] == 0))
246 /* Copy class and whether memory is allowed from the
247 matching alternative. Then perform any needed cost
248 computations and/or adjustments. */
250 classes
[i
] = classes
[j
];
251 allows_mem
[i
] = allows_mem
[j
];
253 if (! REG_P (op
) || REGNO (op
) < FIRST_PSEUDO_REGISTER
)
255 /* If this matches the other operand, we have no
256 added cost and we win. */
257 if (rtx_equal_p (ops
[j
], op
))
259 /* If we can put the other operand into a register,
260 add to the cost of this alternative the cost to
261 copy this operand to the register used for the
263 else if (classes
[j
] != NO_REGS
)
265 alt_cost
+= copy_cost (op
, mode
, classes
[j
], 1, NULL
);
269 else if (! REG_P (ops
[j
])
270 || REGNO (ops
[j
]) < FIRST_PSEUDO_REGISTER
)
272 /* This op is a allocno but the one it matches is
275 /* If we can't put the other operand into a
276 register, this alternative can't be used. */
278 if (classes
[j
] == NO_REGS
)
280 /* Otherwise, add to the cost of this alternative
281 the cost to copy the other operand to the
282 register used for this operand. */
285 += copy_cost (ops
[j
], mode
, classes
[j
], 1, NULL
);
289 /* The costs of this operand are not the same as the
290 other operand since move costs are not symmetric.
291 Moreover, if we cannot tie them, this alternative
292 needs to do a copy, which is one instruction. */
293 struct costs
*pp
= this_op_costs
[i
];
295 if (register_move_cost
[mode
] == NULL
)
296 init_register_move_cost (mode
);
298 for (k
= 0; k
< cost_classes_num
; k
++)
300 class = cost_classes
[k
];
302 = ((recog_data
.operand_type
[i
] != OP_OUT
303 ? register_may_move_in_cost
[mode
]
304 [class] [classes
[i
]] : 0)
305 + (recog_data
.operand_type
[i
] != OP_IN
306 ? register_may_move_out_cost
[mode
]
307 [classes
[i
]] [class] : 0));
310 /* If the alternative actually allows memory, make
311 things a bit cheaper since we won't need an extra
314 = ((recog_data
.operand_type
[i
] != OP_IN
315 ? memory_move_cost
[mode
] [classes
[i
]] [0]
317 + (recog_data
.operand_type
[i
] != OP_OUT
318 ? memory_move_cost
[mode
] [classes
[i
]] [1]
319 : 0) - allows_mem
[i
]);
321 /* If we have assigned a class to this allocno in our
322 first pass, add a cost to this alternative
323 corresponding to what we would add if this allocno
324 were not in the appropriate class. We could use
325 cover class here but it is less accurate
329 enum reg_class pref_class
330 = allocno_pref
[ALLOCNO_NUM
331 (ira_curr_regno_allocno_map
334 if (pref_class
== NO_REGS
)
336 += ((recog_data
.operand_type
[i
] != OP_IN
337 ? memory_move_cost
[mode
] [classes
[i
]] [0]
339 + (recog_data
.operand_type
[i
] != OP_OUT
340 ? memory_move_cost
[mode
] [classes
[i
]] [1]
342 else if (reg_class_intersect
343 [pref_class
] [classes
[i
]] == NO_REGS
)
345 += (register_move_cost
346 [mode
] [pref_class
] [classes
[i
]]);
348 if (REGNO (ops
[i
]) != REGNO (ops
[j
])
349 && ! find_reg_note (insn
, REG_DEAD
, op
))
352 /* This is in place of ordinary cost computation for
353 this operand, so skip to the end of the
354 alternative (should be just one character). */
355 while (*p
&& *p
++ != ',')
363 /* Scan all the constraint letters. See if the operand
364 matches any of the constraints. Collect the valid
365 register classes and see if this operand accepts
374 /* Ignore the next letter for this pass. */
380 case '!': case '#': case '&':
381 case '0': case '1': case '2': case '3': case '4':
382 case '5': case '6': case '7': case '8': case '9':
387 win
= address_operand (op
, GET_MODE (op
));
388 /* We know this operand is an address, so we want it
389 to be allocated to a register that can be the
390 base of an address, i.e. BASE_REG_CLASS. */
392 = reg_class_union
[classes
[i
]]
393 [base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
)];
396 case 'm': case 'o': case 'V':
397 /* It doesn't seem worth distinguishing between
398 offsettable and non-offsettable addresses
407 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
408 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
414 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
415 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
421 if (GET_CODE (op
) == CONST_DOUBLE
422 || (GET_CODE (op
) == CONST_VECTOR
423 && (GET_MODE_CLASS (GET_MODE (op
))
424 == MODE_VECTOR_FLOAT
)))
430 if (GET_CODE (op
) == CONST_DOUBLE
431 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op
, c
, p
))
436 if (GET_CODE (op
) == CONST_INT
437 || (GET_CODE (op
) == CONST_DOUBLE
438 && GET_MODE (op
) == VOIDmode
))
443 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
)))
448 if (GET_CODE (op
) == CONST_INT
449 || (GET_CODE (op
) == CONST_DOUBLE
450 && GET_MODE (op
) == VOIDmode
))
462 if (GET_CODE (op
) == CONST_INT
463 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op
), c
, p
))
474 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))))
478 classes
[i
] = reg_class_union
[classes
[i
]] [GENERAL_REGS
];
482 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) != NO_REGS
)
483 classes
[i
] = reg_class_union
[classes
[i
]]
484 [REG_CLASS_FROM_CONSTRAINT (c
, p
)];
485 #ifdef EXTRA_CONSTRAINT_STR
486 else if (EXTRA_CONSTRAINT_STR (op
, c
, p
))
489 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
491 /* Every MEM can be reloaded to fit. */
496 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
498 /* Every address can be reloaded to fit. */
500 if (address_operand (op
, GET_MODE (op
)))
502 /* We know this operand is an address, so we
503 want it to be allocated to a register that
504 can be the base of an address,
505 i.e. BASE_REG_CLASS. */
507 = reg_class_union
[classes
[i
]]
508 [base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
)];
513 p
+= CONSTRAINT_LEN (c
, p
);
520 /* How we account for this operand now depends on whether it
521 is a pseudo register or not. If it is, we first check if
522 any register classes are valid. If not, we ignore this
523 alternative, since we want to assume that all allocnos get
524 allocated for register preferencing. If some register
525 class is valid, compute the costs of moving the allocno
527 if (REG_P (op
) && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
529 if (classes
[i
] == NO_REGS
)
531 /* We must always fail if the operand is a REG, but
532 we did not find a suitable class.
534 Otherwise we may perform an uninitialized read
535 from this_op_costs after the `continue' statement
541 struct costs
*pp
= this_op_costs
[i
];
543 if (register_move_cost
[mode
] == NULL
)
544 init_register_move_cost (mode
);
546 for (k
= 0; k
< cost_classes_num
; k
++)
548 class = cost_classes
[k
];
550 = ((recog_data
.operand_type
[i
] != OP_OUT
551 ? register_may_move_in_cost
[mode
]
552 [class] [classes
[i
]] : 0)
553 + (recog_data
.operand_type
[i
] != OP_IN
554 ? register_may_move_out_cost
[mode
]
555 [classes
[i
]] [class] : 0));
558 /* If the alternative actually allows memory, make
559 things a bit cheaper since we won't need an extra
562 = ((recog_data
.operand_type
[i
] != OP_IN
563 ? memory_move_cost
[mode
] [classes
[i
]] [0]
565 + (recog_data
.operand_type
[i
] != OP_OUT
566 ? memory_move_cost
[mode
] [classes
[i
]] [1]
567 : 0) - allows_mem
[i
]);
569 /* If we have assigned a class to this allocno in our
570 first pass, add a cost to this alternative
571 corresponding to what we would add if this allocno
572 were not in the appropriate class. We could use
573 cover class here but it is less accurate
577 enum reg_class pref_class
578 = allocno_pref
[ALLOCNO_NUM
579 (ira_curr_regno_allocno_map
582 if (pref_class
== NO_REGS
)
584 += ((recog_data
.operand_type
[i
] != OP_IN
585 ? memory_move_cost
[mode
] [classes
[i
]] [0]
587 + (recog_data
.operand_type
[i
] != OP_OUT
588 ? memory_move_cost
[mode
] [classes
[i
]] [1]
590 else if (reg_class_intersect
591 [pref_class
] [classes
[i
]] == NO_REGS
)
593 += (register_move_cost
594 [mode
] [pref_class
] [classes
[i
]]);
599 /* Otherwise, if this alternative wins, either because we
600 have already determined that or if we have a hard
601 register of the proper class, there is no cost for this
603 else if (win
|| (REG_P (op
)
604 && reg_fits_class_p (op
, classes
[i
],
608 /* If registers are valid, the cost of this alternative
609 includes copying the object to and/or from a
611 else if (classes
[i
] != NO_REGS
)
613 if (recog_data
.operand_type
[i
] != OP_OUT
)
614 alt_cost
+= copy_cost (op
, mode
, classes
[i
], 1, NULL
);
616 if (recog_data
.operand_type
[i
] != OP_IN
)
617 alt_cost
+= copy_cost (op
, mode
, classes
[i
], 0, NULL
);
619 /* The only other way this alternative can be used is if
620 this is a constant that could be placed into memory. */
621 else if (CONSTANT_P (op
) && (allows_addr
|| allows_mem
[i
]))
622 alt_cost
+= memory_move_cost
[mode
] [classes
[i
]] [1];
630 /* Finally, update the costs with the information we've
631 calculated about this alternative. */
632 for (i
= 0; i
< n_ops
; i
++)
634 && REGNO (ops
[i
]) >= FIRST_PSEUDO_REGISTER
)
636 struct costs
*pp
= op_costs
[i
], *qq
= this_op_costs
[i
];
637 int scale
= 1 + (recog_data
.operand_type
[i
] == OP_INOUT
);
639 pp
->mem_cost
= MIN (pp
->mem_cost
,
640 (qq
->mem_cost
+ alt_cost
) * scale
);
642 for (k
= 0; k
< cost_classes_num
; k
++)
643 pp
->cost
[k
] = MIN (pp
->cost
[k
],
644 (qq
->cost
[k
] + alt_cost
) * scale
);
648 /* If this insn is a single set copying operand 1 to operand 0 and
649 one operand is a allocno with the other a hard reg or a allocno
650 that prefers a register that is in its own register class then we
651 may want to adjust the cost of that register class to -1.
653 Avoid the adjustment if the source does not die to avoid
654 stressing of register allocator by preferrencing two colliding
655 registers into single class.
657 Also avoid the adjustment if a copy between registers of the
658 class is expensive (ten times the cost of a default copy is
659 considered arbitrarily expensive). This avoids losing when the
660 preferred class is very expensive as the source of a copy
662 if ((set
= single_set (insn
)) != 0
663 && ops
[0] == SET_DEST (set
) && ops
[1] == SET_SRC (set
)
664 && REG_P (ops
[0]) && REG_P (ops
[1])
665 && find_regno_note (insn
, REG_DEAD
, REGNO (ops
[1])))
666 for (i
= 0; i
<= 1; i
++)
667 if (REGNO (ops
[i
]) >= FIRST_PSEUDO_REGISTER
)
669 unsigned int regno
= REGNO (ops
[!i
]);
670 enum machine_mode mode
= GET_MODE (ops
[!i
]);
674 if (regno
>= FIRST_PSEUDO_REGISTER
&& allocno_pref
!= 0)
678 /* We could use cover class here but it is less accurate
681 = allocno_pref
[ALLOCNO_NUM (ira_curr_regno_allocno_map
685 && (reg_class_size
[pref
]
686 == (unsigned) CLASS_MAX_NREGS (pref
, mode
))
687 && register_move_cost
[mode
] [pref
] [pref
] < 10 * 2)
688 op_costs
[i
]->cost
[cost_class_nums
[pref
]] = -1;
690 else if (regno
< FIRST_PSEUDO_REGISTER
)
691 for (k
= 0; k
< cost_classes_num
; k
++)
693 class = cost_classes
[k
];
694 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
695 && (reg_class_size
[class]
696 == (unsigned) CLASS_MAX_NREGS (class, mode
)))
698 if (reg_class_size
[class] == 1)
699 op_costs
[i
]->cost
[k
] = -1;
703 nr
< (unsigned) hard_regno_nregs
[regno
] [mode
];
705 if (! TEST_HARD_REG_BIT (reg_class_contents
[class],
709 if (nr
== (unsigned) hard_regno_nregs
[regno
] [mode
])
710 op_costs
[i
]->cost
[k
] = -1;
719 /* Wrapper around REGNO_OK_FOR_INDEX_P, to allow pseudo registers. */
721 ok_for_index_p_nonstrict (rtx reg
)
723 unsigned regno
= REGNO (reg
);
725 return regno
>= FIRST_PSEUDO_REGISTER
|| REGNO_OK_FOR_INDEX_P (regno
);
728 /* A version of regno_ok_for_base_p for use during regclass, when all
729 allocnos should count as OK. Arguments as for
730 regno_ok_for_base_p. */
732 ok_for_base_p_nonstrict (rtx reg
, enum machine_mode mode
,
733 enum rtx_code outer_code
, enum rtx_code index_code
)
735 unsigned regno
= REGNO (reg
);
737 if (regno
>= FIRST_PSEUDO_REGISTER
)
739 return ok_for_base_p_1 (regno
, mode
, outer_code
, index_code
);
742 /* Record the pseudo registers we must reload into hard registers in a
743 subexpression of a memory address, X.
745 If CONTEXT is 0, we are looking at the base part of an address,
746 otherwise we are looking at the index part.
748 MODE is the mode of the memory reference; OUTER_CODE and INDEX_CODE
749 give the context that the rtx appears in. These three arguments
750 are passed down to base_reg_class.
752 SCALE is twice the amount to multiply the cost by (it is twice so
753 we can represent half-cost adjustments). */
755 record_address_regs (enum machine_mode mode
, rtx x
, int context
,
756 enum rtx_code outer_code
, enum rtx_code index_code
,
759 enum rtx_code code
= GET_CODE (x
);
760 enum reg_class
class;
763 class = INDEX_REG_CLASS
;
765 class = base_reg_class (mode
, outer_code
, index_code
);
778 /* When we have an address that is a sum, we must determine
779 whether registers are "base" or "index" regs. If there is a
780 sum of two registers, we must choose one to be the "base".
781 Luckily, we can use the REG_POINTER to make a good choice
782 most of the time. We only need to do this on machines that
783 can have two registers in an address and where the base and
784 index register classes are different.
786 ??? This code used to set REGNO_POINTER_FLAG in some cases,
787 but that seems bogus since it should only be set when we are
788 sure the register is being used as a pointer. */
790 rtx arg0
= XEXP (x
, 0);
791 rtx arg1
= XEXP (x
, 1);
792 enum rtx_code code0
= GET_CODE (arg0
);
793 enum rtx_code code1
= GET_CODE (arg1
);
795 /* Look inside subregs. */
797 arg0
= SUBREG_REG (arg0
), code0
= GET_CODE (arg0
);
799 arg1
= SUBREG_REG (arg1
), code1
= GET_CODE (arg1
);
801 /* If this machine only allows one register per address, it
802 must be in the first operand. */
803 if (MAX_REGS_PER_ADDRESS
== 1)
804 record_address_regs (mode
, arg0
, 0, PLUS
, code1
, scale
);
806 /* If index and base registers are the same on this machine,
807 just record registers in any non-constant operands. We
808 assume here, as well as in the tests below, that all
809 addresses are in canonical form. */
810 else if (INDEX_REG_CLASS
== base_reg_class (VOIDmode
, PLUS
, SCRATCH
))
812 record_address_regs (mode
, arg0
, context
, PLUS
, code1
, scale
);
813 if (! CONSTANT_P (arg1
))
814 record_address_regs (mode
, arg1
, context
, PLUS
, code0
, scale
);
817 /* If the second operand is a constant integer, it doesn't
818 change what class the first operand must be. */
819 else if (code1
== CONST_INT
|| code1
== CONST_DOUBLE
)
820 record_address_regs (mode
, arg0
, context
, PLUS
, code1
, scale
);
821 /* If the second operand is a symbolic constant, the first
822 operand must be an index register. */
823 else if (code1
== SYMBOL_REF
|| code1
== CONST
|| code1
== LABEL_REF
)
824 record_address_regs (mode
, arg0
, 1, PLUS
, code1
, scale
);
825 /* If both operands are registers but one is already a hard
826 register of index or reg-base class, give the other the
827 class that the hard register is not. */
828 else if (code0
== REG
&& code1
== REG
829 && REGNO (arg0
) < FIRST_PSEUDO_REGISTER
830 && (ok_for_base_p_nonstrict (arg0
, mode
, PLUS
, REG
)
831 || ok_for_index_p_nonstrict (arg0
)))
832 record_address_regs (mode
, arg1
,
833 ok_for_base_p_nonstrict (arg0
, mode
, PLUS
, REG
)
836 else if (code0
== REG
&& code1
== REG
837 && REGNO (arg1
) < FIRST_PSEUDO_REGISTER
838 && (ok_for_base_p_nonstrict (arg1
, mode
, PLUS
, REG
)
839 || ok_for_index_p_nonstrict (arg1
)))
840 record_address_regs (mode
, arg0
,
841 ok_for_base_p_nonstrict (arg1
, mode
, PLUS
, REG
)
844 /* If one operand is known to be a pointer, it must be the
845 base with the other operand the index. Likewise if the
846 other operand is a MULT. */
847 else if ((code0
== REG
&& REG_POINTER (arg0
)) || code1
== MULT
)
849 record_address_regs (mode
, arg0
, 0, PLUS
, code1
, scale
);
850 record_address_regs (mode
, arg1
, 1, PLUS
, code0
, scale
);
852 else if ((code1
== REG
&& REG_POINTER (arg1
)) || code0
== MULT
)
854 record_address_regs (mode
, arg0
, 1, PLUS
, code1
, scale
);
855 record_address_regs (mode
, arg1
, 0, PLUS
, code0
, scale
);
857 /* Otherwise, count equal chances that each might be a base or
858 index register. This case should be rare. */
861 record_address_regs (mode
, arg0
, 0, PLUS
, code1
, scale
/ 2);
862 record_address_regs (mode
, arg0
, 1, PLUS
, code1
, scale
/ 2);
863 record_address_regs (mode
, arg1
, 0, PLUS
, code0
, scale
/ 2);
864 record_address_regs (mode
, arg1
, 1, PLUS
, code0
, scale
/ 2);
869 /* Double the importance of a allocno that is incremented or
870 decremented, since it would take two extra insns if it ends
871 up in the wrong place. */
874 record_address_regs (mode
, XEXP (x
, 0), 0, code
,
875 GET_CODE (XEXP (XEXP (x
, 1), 1)), 2 * scale
);
876 if (REG_P (XEXP (XEXP (x
, 1), 1)))
877 record_address_regs (mode
, XEXP (XEXP (x
, 1), 1), 1, code
, REG
,
885 /* Double the importance of a allocno that is incremented or
886 decremented, since it would take two extra insns if it ends
887 up in the wrong place. If the operand is a pseudo-register,
888 show it is being used in an INC_DEC context. */
889 #ifdef FORBIDDEN_INC_DEC_CLASSES
890 if (REG_P (XEXP (x
, 0))
891 && REGNO (XEXP (x
, 0)) >= FIRST_PSEUDO_REGISTER
)
892 in_inc_dec
[ALLOCNO_NUM (ira_curr_regno_allocno_map
893 [REGNO (XEXP (x
, 0))])] = 1;
895 record_address_regs (mode
, XEXP (x
, 0), 0, code
, SCRATCH
, 2 * scale
);
903 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
906 pp
= COSTS_OF_ALLOCNO (total_costs
,
907 ALLOCNO_NUM (ira_curr_regno_allocno_map
909 pp
->mem_cost
+= (memory_move_cost
[Pmode
] [class] [1] * scale
) / 2;
910 if (register_move_cost
[Pmode
] == NULL
)
911 init_register_move_cost (Pmode
);
912 for (k
= 0; k
< cost_classes_num
; k
++)
914 i
= cost_classes
[k
];
915 pp
->cost
[k
] += (register_may_move_in_cost
[Pmode
] [i
] [class]
923 const char *fmt
= GET_RTX_FORMAT (code
);
925 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
927 record_address_regs (mode
, XEXP (x
, i
), context
, code
, SCRATCH
,
935 /* Calculate the costs of insn operands. */
937 record_operand_costs (rtx insn
, struct costs
**op_costs
,
938 enum reg_class
*allocno_pref
)
940 const char *constraints
[MAX_RECOG_OPERANDS
];
941 enum machine_mode modes
[MAX_RECOG_OPERANDS
];
944 for (i
= 0; i
< recog_data
.n_operands
; i
++)
946 constraints
[i
] = recog_data
.constraints
[i
];
947 modes
[i
] = recog_data
.operand_mode
[i
];
950 /* If we get here, we are set up to record the costs of all the
951 operands for this insn. Start by initializing the costs. Then
952 handle any address registers. Finally record the desired classes
953 for any allocnos, doing it twice if some pair of operands are
955 for (i
= 0; i
< recog_data
.n_operands
; i
++)
957 memmove (op_costs
[i
], init_cost
, struct_costs_size
);
959 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
)
960 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
962 if (MEM_P (recog_data
.operand
[i
]))
963 record_address_regs (GET_MODE (recog_data
.operand
[i
]),
964 XEXP (recog_data
.operand
[i
], 0),
965 0, MEM
, SCRATCH
, frequency
* 2);
966 else if (constraints
[i
] [0] == 'p'
967 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
] [0],
969 record_address_regs (VOIDmode
, recog_data
.operand
[i
], 0, ADDRESS
,
970 SCRATCH
, frequency
* 2);
973 /* Check for commutative in a separate loop so everything will have
974 been initialized. We must do this even if one operand is a
975 constant--see addsi3 in m68k.md. */
976 for (i
= 0; i
< (int) recog_data
.n_operands
- 1; i
++)
977 if (constraints
[i
] [0] == '%')
979 const char *xconstraints
[MAX_RECOG_OPERANDS
];
982 /* Handle commutative operands by swapping the constraints.
983 We assume the modes are the same. */
984 for (j
= 0; j
< recog_data
.n_operands
; j
++)
985 xconstraints
[j
] = constraints
[j
];
987 xconstraints
[i
] = constraints
[i
+1];
988 xconstraints
[i
+1] = constraints
[i
];
989 record_reg_classes (recog_data
.n_alternatives
, recog_data
.n_operands
,
990 recog_data
.operand
, modes
,
991 xconstraints
, insn
, op_costs
, allocno_pref
);
993 record_reg_classes (recog_data
.n_alternatives
, recog_data
.n_operands
,
994 recog_data
.operand
, modes
,
995 constraints
, insn
, op_costs
, allocno_pref
);
1000 /* Process one insn INSN. Scan it and record each time it would save
1001 code to put a certain allocnos in a certain class. Return the last
1002 insn processed, so that the scan can be continued from there. */
1004 scan_one_insn (rtx insn
)
1006 enum rtx_code pat_code
;
1013 pat_code
= GET_CODE (PATTERN (insn
));
1014 if (pat_code
== USE
|| pat_code
== CLOBBER
|| pat_code
== ASM_INPUT
1015 || pat_code
== ADDR_VEC
|| pat_code
== ADDR_DIFF_VEC
)
1018 set
= single_set (insn
);
1019 extract_insn (insn
);
1021 /* If this insn loads a parameter from its stack slot, then it
1022 represents a savings, rather than a cost, if the parameter is
1023 stored in memory. Record this fact. */
1024 if (set
!= 0 && REG_P (SET_DEST (set
)) && MEM_P (SET_SRC (set
))
1025 && (note
= find_reg_note (insn
, REG_EQUIV
, NULL_RTX
)) != NULL_RTX
1026 && MEM_P (XEXP (note
, 0)))
1028 COSTS_OF_ALLOCNO (total_costs
,
1029 ALLOCNO_NUM (ira_curr_regno_allocno_map
1030 [REGNO (SET_DEST (set
))]))->mem_cost
1031 -= (memory_move_cost
[GET_MODE (SET_DEST (set
))] [GENERAL_REGS
] [1]
1033 record_address_regs (GET_MODE (SET_SRC (set
)), XEXP (SET_SRC (set
), 0),
1034 0, MEM
, SCRATCH
, frequency
* 2);
1038 record_operand_costs (insn
, op_costs
, allocno_pref
);
1040 /* Now add the cost for each operand to the total costs for its
1042 for (i
= 0; i
< recog_data
.n_operands
; i
++)
1043 if (REG_P (recog_data
.operand
[i
])
1044 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
1046 int regno
= REGNO (recog_data
.operand
[i
]);
1048 = COSTS_OF_ALLOCNO (total_costs
,
1049 ALLOCNO_NUM (ira_curr_regno_allocno_map
1051 struct costs
*q
= op_costs
[i
];
1053 p
->mem_cost
+= q
->mem_cost
* frequency
;
1054 for (k
= 0; k
< cost_classes_num
; k
++)
1055 p
->cost
[k
] += q
->cost
[k
] * frequency
;
1063 /* Dump allocnos costs. */
1065 print_costs (FILE *f
)
1070 for (i
= 0; i
< allocnos_num
; i
++)
1074 allocno_t a
= allocnos
[i
];
1075 int regno
= ALLOCNO_REGNO (a
);
1077 fprintf (f
, " a%d(r%d,", i
, regno
);
1078 if ((bb
= ALLOCNO_LOOP_TREE_NODE (a
)->bb
) != NULL
)
1079 fprintf (f
, "b%d", bb
->index
);
1081 fprintf (f
, "l%d", ALLOCNO_LOOP_TREE_NODE (a
)->loop
->num
);
1082 fprintf (f
, ") costs:");
1083 for (k
= 0; k
< cost_classes_num
; k
++)
1085 class = cost_classes
[k
];
1086 if (contains_reg_of_mode
[class] [PSEUDO_REGNO_MODE (regno
)]
1087 #ifdef FORBIDDEN_INC_DEC_CLASSES
1088 && (! in_inc_dec
[i
] || ! forbidden_inc_dec_class
[class])
1090 #ifdef CANNOT_CHANGE_MODE_CLASS
1091 && ! invalid_mode_change_p (i
, (enum reg_class
) class,
1092 PSEUDO_REGNO_MODE (regno
))
1095 fprintf (f
, " %s:%d", reg_class_names
[class],
1096 COSTS_OF_ALLOCNO (total_costs
, i
)->cost
[k
]);
1098 fprintf (f
, " MEM:%i\n", COSTS_OF_ALLOCNO (total_costs
, i
)->mem_cost
);
1102 /* The function traverses basic blocks represented by LOOP_TREE_NODE
1103 to find the costs of the allocnos. */
1105 process_bb_node_for_costs (loop_tree_node_t loop_tree_node
)
1110 bb
= loop_tree_node
->bb
;
1113 frequency
= REG_FREQ_FROM_BB (bb
);
1116 FOR_BB_INSNS (bb
, insn
)
1117 insn
= scan_one_insn (insn
);
1120 /* Entry function to find costs of each class for pesudos and their
1123 find_allocno_class_costs (void)
1130 #ifdef FORBIDDEN_INC_DEC_CLASSES
1131 in_inc_dec
= ira_allocate (sizeof (char) * allocnos_num
);
1132 #endif /* FORBIDDEN_INC_DEC_CLASSES */
1134 allocno_pref
= NULL
;
1135 /* Normally we scan the insns once and determine the best class to
1136 use for each allocno. However, if -fexpensive_optimizations are
1137 on, we do so twice, the second time using the tentative best
1138 classes to guide the selection. */
1139 for (pass
= 0; pass
<= flag_expensive_optimizations
; pass
++)
1141 if (internal_flag_ira_verbose
> 0 && ira_dump_file
)
1142 fprintf (ira_dump_file
, "\nPass %i for finding allocno costs\n\n",
1144 if (pass
!= flag_expensive_optimizations
)
1146 for (cost_classes_num
= 0;
1147 cost_classes_num
< reg_class_cover_size
;
1150 cost_classes
[cost_classes_num
]
1151 = reg_class_cover
[cost_classes_num
];
1152 cost_class_nums
[cost_classes
[cost_classes_num
]]
1156 = sizeof (struct costs
) + sizeof (int) * (cost_classes_num
- 1);
1160 for (cost_classes_num
= 0;
1161 cost_classes_num
< important_classes_num
;
1164 cost_classes
[cost_classes_num
]
1165 = important_classes
[cost_classes_num
];
1166 cost_class_nums
[cost_classes
[cost_classes_num
]]
1170 = sizeof (struct costs
) + sizeof (int) * (cost_classes_num
- 1);
1172 /* Zero out our accumulation of the cost of each class for each
1174 memset (total_costs
, 0, allocnos_num
* struct_costs_size
);
1175 #ifdef FORBIDDEN_INC_DEC_CLASSES
1176 memset (in_inc_dec
, 0, allocnos_num
* sizeof (char));
1179 /* Scan the instructions and record each time it would save code
1180 to put a certain allocno in a certain class. */
1181 traverse_loop_tree (FALSE
, ira_loop_tree_root
,
1182 process_bb_node_for_costs
, NULL
);
1184 /* Now for each allocno look at how desirable each class is and
1185 find which class is preferred. */
1187 allocno_pref
= allocno_pref_buffer
;
1189 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
1191 allocno_t a
, father_a
;
1192 int class, a_num
, father_a_num
;
1193 loop_tree_node_t father
;
1195 enum reg_class best
, common_class
;
1196 #ifdef FORBIDDEN_INC_DEC_CLASSES
1197 int inc_dec_p
= FALSE
;
1200 if (regno_allocno_map
[i
] == NULL
)
1202 memset (temp_costs
, 0, struct_costs_size
);
1203 for (a
= regno_allocno_map
[i
];
1205 a
= ALLOCNO_NEXT_REGNO_ALLOCNO (a
))
1207 a_num
= ALLOCNO_NUM (a
);
1208 if ((flag_ira_algorithm
== IRA_ALGORITHM_REGIONAL
1209 || flag_ira_algorithm
== IRA_ALGORITHM_MIXED
)
1210 && (father
= ALLOCNO_LOOP_TREE_NODE (a
)->father
) != NULL
1211 && (father_a
= father
->regno_allocno_map
[i
]) != NULL
)
1213 father_a_num
= ALLOCNO_NUM (father_a
);
1214 for (k
= 0; k
< cost_classes_num
; k
++)
1215 COSTS_OF_ALLOCNO (total_costs
, father_a_num
)->cost
[k
]
1216 += COSTS_OF_ALLOCNO (total_costs
, a_num
)->cost
[k
];
1217 COSTS_OF_ALLOCNO (total_costs
, father_a_num
)->mem_cost
1218 += COSTS_OF_ALLOCNO (total_costs
, a_num
)->mem_cost
;
1220 for (k
= 0; k
< cost_classes_num
; k
++)
1221 temp_costs
->cost
[k
]
1222 += COSTS_OF_ALLOCNO (total_costs
, a_num
)->cost
[k
];
1223 temp_costs
->mem_cost
1224 += COSTS_OF_ALLOCNO (total_costs
, a_num
)->mem_cost
;
1225 #ifdef FORBIDDEN_INC_DEC_CLASSES
1226 if (in_inc_dec
[a_num
])
1230 best_cost
= (1 << (HOST_BITS_PER_INT
- 2)) - 1;
1232 for (k
= 0; k
< cost_classes_num
; k
++)
1234 class = cost_classes
[k
];
1235 /* Ignore classes that are too small for this operand or
1236 invalid for an operand that was auto-incremented. */
1237 if (! contains_reg_of_mode
[class] [PSEUDO_REGNO_MODE (i
)]
1238 #ifdef FORBIDDEN_INC_DEC_CLASSES
1239 || (inc_dec_p
&& forbidden_inc_dec_class
[class])
1241 #ifdef CANNOT_CHANGE_MODE_CLASS
1242 || invalid_mode_change_p (i
, (enum reg_class
) class,
1243 PSEUDO_REGNO_MODE (i
))
1247 else if (temp_costs
->cost
[k
] < best_cost
)
1249 best_cost
= temp_costs
->cost
[k
];
1250 best
= (enum reg_class
) class;
1252 else if (temp_costs
->cost
[k
] == best_cost
)
1253 best
= reg_class_union
[best
] [class];
1255 if (best_cost
> temp_costs
->mem_cost
)
1256 common_class
= NO_REGS
;
1259 common_class
= best
;
1260 if (class_subset_p
[best
] [class_translate
[best
]])
1261 common_class
= class_translate
[best
];
1263 for (a
= regno_allocno_map
[i
];
1265 a
= ALLOCNO_NEXT_REGNO_ALLOCNO (a
))
1267 a_num
= ALLOCNO_NUM (a
);
1268 if (common_class
== NO_REGS
)
1272 /* Finding best class which is cover class for the
1274 best_cost
= (1 << (HOST_BITS_PER_INT
- 2)) - 1;
1276 for (k
= 0; k
< cost_classes_num
; k
++)
1278 class = cost_classes
[k
];
1279 if (! class_subset_p
[class] [common_class
])
1281 /* Ignore classes that are too small for this
1282 operand or invalid for an operand that was
1283 auto-incremented. */
1284 if (! contains_reg_of_mode
[class] [PSEUDO_REGNO_MODE
1286 #ifdef FORBIDDEN_INC_DEC_CLASSES
1287 || (inc_dec_p
&& forbidden_inc_dec_class
[class])
1289 #ifdef CANNOT_CHANGE_MODE_CLASS
1290 || invalid_mode_change_p (i
, (enum reg_class
) class,
1291 PSEUDO_REGNO_MODE (i
))
1295 else if (COSTS_OF_ALLOCNO (total_costs
, a_num
)->cost
[k
]
1299 = COSTS_OF_ALLOCNO (total_costs
, a_num
)->cost
[k
];
1300 best
= (enum reg_class
) class;
1302 else if (COSTS_OF_ALLOCNO (total_costs
, a_num
)->cost
[k
]
1304 best
= reg_class_union
[best
] [class];
1307 if (internal_flag_ira_verbose
> 2 && ira_dump_file
!= NULL
1308 && (pass
== 0 || allocno_pref
[a_num
] != best
))
1310 fprintf (ira_dump_file
, " a%d (r%d,", a_num
, i
);
1311 if ((bb
= ALLOCNO_LOOP_TREE_NODE (a
)->bb
) != NULL
)
1312 fprintf (ira_dump_file
, "b%d", bb
->index
);
1314 fprintf (ira_dump_file
, "l%d",
1315 ALLOCNO_LOOP_TREE_NODE (a
)->loop
->num
);
1316 fprintf (ira_dump_file
, ") best %s, cover %s\n",
1317 reg_class_names
[best
],
1318 reg_class_names
[class_translate
[best
]]);
1320 allocno_pref
[a_num
] = best
;
1324 if (internal_flag_ira_verbose
> 4 && ira_dump_file
)
1326 print_costs (ira_dump_file
);
1327 fprintf (ira_dump_file
,"\n");
1331 #ifdef FORBIDDEN_INC_DEC_CLASSES
1332 ira_free (in_inc_dec
);
1338 /* Process moves involving hard regs to modify allocno hard register
1339 costs. We can do this only after determining allocno cover class.
1340 If a hard register forms a register class, than moves with the hard
1341 register are already taken into account slightly in class costs for
1344 process_bb_node_for_hard_reg_moves (loop_tree_node_t loop_tree_node
)
1346 int i
, freq
, cost
, src_regno
, dst_regno
, hard_regno
, to_p
, hard_regs_num
;
1348 enum reg_class
class, hard_reg_class
;
1349 enum machine_mode mode
;
1351 rtx insn
, set
, src
, dst
;
1353 bb
= loop_tree_node
->bb
;
1356 freq
= REG_FREQ_FROM_BB (bb
);
1359 FOR_BB_INSNS (bb
, insn
)
1361 if (! INSN_P (insn
))
1363 set
= single_set (insn
);
1364 if (set
== NULL_RTX
)
1366 dst
= SET_DEST (set
);
1367 src
= SET_SRC (set
);
1368 if (! REG_P (dst
) || ! REG_P (src
))
1370 dst_regno
= REGNO (dst
);
1371 src_regno
= REGNO (src
);
1372 if (dst_regno
>= FIRST_PSEUDO_REGISTER
1373 && src_regno
< FIRST_PSEUDO_REGISTER
)
1375 hard_regno
= src_regno
;
1377 a
= ira_curr_regno_allocno_map
[dst_regno
];
1379 else if (src_regno
>= FIRST_PSEUDO_REGISTER
1380 && dst_regno
< FIRST_PSEUDO_REGISTER
)
1382 hard_regno
= dst_regno
;
1384 a
= ira_curr_regno_allocno_map
[src_regno
];
1388 class = ALLOCNO_COVER_CLASS (a
);
1389 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], hard_regno
))
1391 i
= class_hard_reg_index
[class] [hard_regno
];
1394 mode
= ALLOCNO_MODE (a
);
1395 hard_reg_class
= REGNO_REG_CLASS (hard_regno
);
1396 cost
= (to_p
? register_move_cost
[mode
] [hard_reg_class
] [class]
1397 : register_move_cost
[mode
] [class] [hard_reg_class
]) * freq
;
1398 hard_regs_num
= class_hard_regs_num
[class];
1399 allocate_and_set_costs (&ALLOCNO_HARD_REG_COSTS (a
), hard_regs_num
,
1400 ALLOCNO_COVER_CLASS_COST (a
));
1401 allocate_and_set_costs (&ALLOCNO_CONFLICT_HARD_REG_COSTS (a
),
1403 ALLOCNO_HARD_REG_COSTS (a
) [i
] -= cost
;
1404 ALLOCNO_CONFLICT_HARD_REG_COSTS (a
) [i
] -= cost
;
1405 ALLOCNO_COVER_CLASS_COST (a
) = MIN (ALLOCNO_COVER_CLASS_COST (a
),
1406 ALLOCNO_HARD_REG_COSTS (a
) [i
]);
1407 if (flag_ira_algorithm
== IRA_ALGORITHM_REGIONAL
1408 || flag_ira_algorithm
== IRA_ALGORITHM_MIXED
)
1410 loop_tree_node_t father
;
1411 int regno
= ALLOCNO_REGNO (a
);
1415 if ((father
= ALLOCNO_LOOP_TREE_NODE (a
)->father
) == NULL
)
1417 if ((a
= father
->regno_allocno_map
[regno
]) == NULL
)
1419 hard_regs_num
= class_hard_regs_num
[ALLOCNO_COVER_CLASS (a
)];
1420 allocate_and_set_costs
1421 (&ALLOCNO_HARD_REG_COSTS (a
), hard_regs_num
,
1422 ALLOCNO_COVER_CLASS_COST (a
));
1423 allocate_and_set_costs (&ALLOCNO_CONFLICT_HARD_REG_COSTS (a
),
1425 ALLOCNO_HARD_REG_COSTS (a
) [i
] -= cost
;
1426 ALLOCNO_CONFLICT_HARD_REG_COSTS (a
) [i
] -= cost
;
1427 ALLOCNO_COVER_CLASS_COST (a
)
1428 = MIN (ALLOCNO_COVER_CLASS_COST (a
),
1429 ALLOCNO_HARD_REG_COSTS (a
) [i
]);
1435 /* After we find hard register and memory costs for allocnos, define
1436 its cover class and modify hard register cost because insns moving
1437 allocno to/from hard registers. */
1439 setup_allocno_cover_class_and_costs (void)
1443 enum reg_class cover_class
, class;
1444 enum machine_mode mode
;
1447 for (i
= 0; i
< allocnos_num
; i
++)
1450 mode
= ALLOCNO_MODE (a
);
1451 cover_class
= class_translate
[allocno_pref
[i
]];
1452 ira_assert (allocno_pref
[i
] == NO_REGS
|| cover_class
!= NO_REGS
);
1453 ALLOCNO_MEMORY_COST (a
) = ALLOCNO_UPDATED_MEMORY_COST (a
)
1454 = COSTS_OF_ALLOCNO (total_costs
, i
)->mem_cost
;
1455 ALLOCNO_COVER_CLASS (a
) = cover_class
;
1456 ALLOCNO_BEST_CLASS (a
) = allocno_pref
[i
];
1457 if (cover_class
== NO_REGS
)
1459 ALLOCNO_AVAILABLE_REGS_NUM (a
) = available_class_regs
[cover_class
];
1460 ALLOCNO_COVER_CLASS_COST (a
)
1461 = (COSTS_OF_ALLOCNO (total_costs
, i
)
1462 ->cost
[cost_class_nums
[allocno_pref
[i
]]]);
1463 if (ALLOCNO_COVER_CLASS (a
) != allocno_pref
[i
])
1465 n
= class_hard_regs_num
[cover_class
];
1466 ALLOCNO_HARD_REG_COSTS (a
)
1467 = reg_costs
= ira_allocate (n
* sizeof (int));
1468 for (j
= n
- 1; j
>= 0; j
--)
1470 regno
= class_hard_regs
[cover_class
] [j
];
1471 class = REGNO_REG_CLASS (regno
);
1472 reg_costs
[j
] = (COSTS_OF_ALLOCNO (total_costs
, i
)
1473 ->cost
[cost_class_nums
[class]]);
1477 traverse_loop_tree (FALSE
, ira_loop_tree_root
,
1478 process_bb_node_for_hard_reg_moves
, NULL
);
1483 /* Function called once during compiler work. It sets up init_cost
1484 whose values don't depend on the compiled function. */
1486 init_ira_costs_once (void)
1491 for (i
= 0; i
< MAX_RECOG_OPERANDS
; i
++)
1493 op_costs
[i
] = NULL
;
1494 this_op_costs
[i
] = NULL
;
1497 cost_classes
= NULL
;
1500 /* The function frees different cost vectors. */
1502 free_ira_costs (void)
1506 if (init_cost
!= NULL
)
1509 for (i
= 0; i
< MAX_RECOG_OPERANDS
; i
++)
1511 if (op_costs
[i
] != NULL
)
1512 free (op_costs
[i
]);
1513 if (this_op_costs
[i
] != NULL
)
1514 free (this_op_costs
[i
]);
1515 op_costs
[i
] = this_op_costs
[i
] = NULL
;
1517 if (temp_costs
!= NULL
)
1520 if (cost_classes
!= NULL
)
1521 free (cost_classes
);
1522 cost_classes
= NULL
;
1525 /* The function called every time when register related information is
1528 init_ira_costs (void)
1533 max_struct_costs_size
1534 = sizeof (struct costs
) + sizeof (int) * (important_classes_num
- 1);
1535 /* Don't use ira_allocate because vectors live through several IRA calls. */
1536 init_cost
= xmalloc (max_struct_costs_size
);
1537 init_cost
->mem_cost
= 10000;
1538 for (i
= 0; i
< important_classes_num
; i
++)
1539 init_cost
->cost
[i
] = 10000;
1540 for (i
= 0; i
< MAX_RECOG_OPERANDS
; i
++)
1542 op_costs
[i
] = xmalloc (max_struct_costs_size
);
1543 this_op_costs
[i
] = xmalloc (max_struct_costs_size
);
1545 temp_costs
= xmalloc (max_struct_costs_size
);
1546 cost_classes
= xmalloc (sizeof (enum reg_class
) * important_classes_num
);
1549 /* Function called once at the end of compiler work. */
1551 finish_ira_costs_once (void)
1558 /* Entry function which defines cover class, memory and hard register
1559 costs for each allocno. */
1563 total_costs
= ira_allocate (max_struct_costs_size
* allocnos_num
);
1564 allocno_pref_buffer
= ira_allocate (sizeof (enum reg_class
) * allocnos_num
);
1565 find_allocno_class_costs ();
1566 setup_allocno_cover_class_and_costs ();
1567 ira_free (allocno_pref_buffer
);
1568 ira_free (total_costs
);
1573 /* This function changes hard register costs for allocnos which lives
1574 trough function calls. The function is called only when we found
1575 all intersected calls during building allocno conflicts. */
1577 tune_allocno_costs_and_cover_classes (void)
1579 int i
, j
, k
, n
, regno
, freq
;
1580 int cost
, min_cost
, *reg_costs
;
1581 enum reg_class cover_class
, class;
1582 enum machine_mode mode
;
1584 rtx call
, *allocno_calls
;
1585 HARD_REG_SET clobbered_regs
;
1587 for (i
= 0; i
< allocnos_num
; i
++)
1590 cover_class
= ALLOCNO_COVER_CLASS (a
);
1591 if (cover_class
== NO_REGS
)
1593 mode
= ALLOCNO_MODE (a
);
1594 n
= class_hard_regs_num
[cover_class
];
1596 if (ALLOCNO_CALLS_CROSSED_NUM (a
) != 0)
1598 allocate_and_set_costs
1599 (&ALLOCNO_HARD_REG_COSTS (a
), n
, ALLOCNO_COVER_CLASS_COST (a
));
1600 reg_costs
= ALLOCNO_HARD_REG_COSTS (a
);
1601 for (j
= n
- 1; j
>= 0; j
--)
1603 regno
= class_hard_regs
[cover_class
] [j
];
1604 class = REGNO_REG_CLASS (regno
);
1606 if (! flag_ira_ipra
)
1608 /* ??? If only part is call clobbered. */
1609 if (! hard_reg_not_in_set_p (regno
, mode
, call_used_reg_set
))
1611 cost
+= (ALLOCNO_CALL_FREQ (a
)
1612 * (memory_move_cost
[mode
] [class] [0]
1613 + memory_move_cost
[mode
] [class] [1]));
1619 = (VEC_address (rtx
, regno_calls
[ALLOCNO_REGNO (a
)])
1620 + ALLOCNO_CALLS_CROSSED_START (a
));
1621 ira_assert (allocno_calls
!= NULL
);
1622 for (k
= ALLOCNO_CALLS_CROSSED_NUM (a
) - 1; k
>= 0; k
--)
1624 call
= allocno_calls
[k
];
1625 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (call
));
1628 get_call_invalidated_used_regs (call
, &clobbered_regs
,
1630 /* ??? If only part is call clobbered. */
1631 if (! hard_reg_not_in_set_p (regno
, mode
, clobbered_regs
))
1633 += freq
* (memory_move_cost
[mode
] [class] [0]
1634 + memory_move_cost
[mode
] [class] [1]);
1637 #ifdef IRA_HARD_REGNO_ADD_COST_MULTIPLIER
1638 cost
+= ((memory_move_cost
[mode
] [class] [0]
1639 + memory_move_cost
[mode
] [class] [1])
1641 * IRA_HARD_REGNO_ADD_COST_MULTIPLIER (regno
) / 2);
1643 reg_costs
[j
] += cost
;
1644 if (min_cost
> reg_costs
[j
])
1645 min_cost
= reg_costs
[j
];
1648 if (min_cost
!= INT_MAX
)
1649 ALLOCNO_COVER_CLASS_COST (a
) = min_cost
;