[Patch AArch64 1/3] Enable CRC by default for armv8.1-a
[official-gcc.git] / gcc / lra-int.h
blob8ba0bacd7741ef53a3542934132c02e093d04edf
1 /* Local Register Allocator (LRA) intercommunication header file.
2 Copyright (C) 2010-2016 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #ifndef GCC_LRA_INT_H
22 #define GCC_LRA_INT_H
24 #define lra_assert(c) gcc_checking_assert (c)
26 /* The parameter used to prevent infinite reloading for an insn. Each
27 insn operands might require a reload and, if it is a memory, its
28 base and index registers might require a reload too. */
29 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
31 typedef struct lra_live_range *lra_live_range_t;
33 /* The structure describes program points where a given pseudo lives.
34 The live ranges can be used to find conflicts with other pseudos.
35 If the live ranges of two pseudos are intersected, the pseudos are
36 in conflict. */
37 struct lra_live_range
39 /* Pseudo regno whose live range is described by given
40 structure. */
41 int regno;
42 /* Program point range. */
43 int start, finish;
44 /* Next structure describing program points where the pseudo
45 lives. */
46 lra_live_range_t next;
47 /* Pointer to structures with the same start. */
48 lra_live_range_t start_next;
51 typedef struct lra_copy *lra_copy_t;
53 /* Copy between pseudos which affects assigning hard registers. */
54 struct lra_copy
56 /* True if regno1 is the destination of the copy. */
57 bool regno1_dest_p;
58 /* Execution frequency of the copy. */
59 int freq;
60 /* Pseudos connected by the copy. REGNO1 < REGNO2. */
61 int regno1, regno2;
62 /* Next copy with correspondingly REGNO1 and REGNO2. */
63 lra_copy_t regno1_next, regno2_next;
66 /* Common info about a register (pseudo or hard register). */
67 struct lra_reg
69 /* Bitmap of UIDs of insns (including debug insns) referring the
70 reg. */
71 bitmap_head insn_bitmap;
72 /* The following fields are defined only for pseudos. */
73 /* Hard registers with which the pseudo conflicts. */
74 HARD_REG_SET conflict_hard_regs;
75 /* Call used registers with which the pseudo conflicts, taking into account
76 the registers used by functions called from calls which cross the
77 pseudo. */
78 HARD_REG_SET actual_call_used_reg_set;
79 /* We assign hard registers to reload pseudos which can occur in few
80 places. So two hard register preferences are enough for them.
81 The following fields define the preferred hard registers. If
82 there are no such hard registers the first field value is
83 negative. If there is only one preferred hard register, the 2nd
84 field is negative. */
85 int preferred_hard_regno1, preferred_hard_regno2;
86 /* Profits to use the corresponding preferred hard registers. If
87 the both hard registers defined, the first hard register has not
88 less profit than the second one. */
89 int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
90 #ifdef STACK_REGS
91 /* True if the pseudo should not be assigned to a stack register. */
92 bool no_stack_p;
93 #endif
94 /* True if the pseudo crosses a call. It is setup in lra-lives.c
95 and used to check that the pseudo crossing a call did not get a
96 call used hard register. */
97 bool call_p;
98 /* Number of references and execution frequencies of the register in
99 *non-debug* insns. */
100 int nrefs, freq;
101 int last_reload;
102 /* Regno used to undo the inheritance. It can be non-zero only
103 between couple of inheritance and undo inheritance passes. */
104 int restore_regno;
105 /* Value holding by register. If the pseudos have the same value
106 they do not conflict. */
107 int val;
108 /* Offset from relative eliminate register to pesudo reg. */
109 int offset;
110 /* These members are set up in lra-lives.c and updated in
111 lra-coalesce.c. */
112 /* The biggest size mode in which each pseudo reg is referred in
113 whole function (possibly via subreg). */
114 machine_mode biggest_mode;
115 /* Live ranges of the pseudo. */
116 lra_live_range_t live_ranges;
117 /* This member is set up in lra-lives.c for subsequent
118 assignments. */
119 lra_copy_t copies;
122 /* References to the common info about each register. */
123 extern struct lra_reg *lra_reg_info;
125 /* Static info about each insn operand (common for all insns with the
126 same ICODE). Warning: if the structure definition is changed, the
127 initializer for debug_operand_data in lra.c should be changed
128 too. */
129 struct lra_operand_data
131 /* The machine description constraint string of the operand. */
132 const char *constraint;
133 /* It is taken only from machine description (which is different
134 from recog_data.operand_mode) and can be of VOIDmode. */
135 ENUM_BITFIELD(machine_mode) mode : 16;
136 /* The type of the operand (in/out/inout). */
137 ENUM_BITFIELD (op_type) type : 8;
138 /* Through if accessed through STRICT_LOW. */
139 unsigned int strict_low : 1;
140 /* True if the operand is an operator. */
141 unsigned int is_operator : 1;
142 /* True if there is an early clobber alternative for this operand.
143 This field is set up every time when corresponding
144 operand_alternative in lra_static_insn_data is set up. */
145 unsigned int early_clobber : 1;
146 /* True if the operand is an address. */
147 unsigned int is_address : 1;
150 /* Info about register occurrence in an insn. */
151 struct lra_insn_reg
153 /* The biggest mode through which the insn refers to the register
154 occurrence (remember the register can be accessed through a
155 subreg in the insn). */
156 ENUM_BITFIELD(machine_mode) biggest_mode : 16;
157 /* The type of the corresponding operand which is the register. */
158 ENUM_BITFIELD (op_type) type : 8;
159 /* True if the reg is accessed through a subreg and the subreg is
160 just a part of the register. */
161 unsigned int subreg_p : 1;
162 /* True if there is an early clobber alternative for this
163 operand. */
164 unsigned int early_clobber : 1;
165 /* The corresponding regno of the register. */
166 int regno;
167 /* Next reg info of the same insn. */
168 struct lra_insn_reg *next;
171 /* Static part (common info for insns with the same ICODE) of LRA
172 internal insn info. It exists in at most one exemplar for each
173 non-negative ICODE. There is only one exception. Each asm insn has
174 own structure. Warning: if the structure definition is changed,
175 the initializer for debug_insn_static_data in lra.c should be
176 changed too. */
177 struct lra_static_insn_data
179 /* Static info about each insn operand. */
180 struct lra_operand_data *operand;
181 /* Each duplication refers to the number of the corresponding
182 operand which is duplicated. */
183 int *dup_num;
184 /* The number of an operand marked as commutative, -1 otherwise. */
185 int commutative;
186 /* Number of operands, duplications, and alternatives of the
187 insn. */
188 char n_operands;
189 char n_dups;
190 char n_alternatives;
191 /* Insns in machine description (or clobbers in asm) may contain
192 explicit hard regs which are not operands. The following list
193 describes such hard registers. */
194 struct lra_insn_reg *hard_regs;
195 /* Array [n_alternatives][n_operand] of static constraint info for
196 given operand in given alternative. This info can be changed if
197 the target reg info is changed. */
198 const struct operand_alternative *operand_alternative;
201 /* LRA internal info about an insn (LRA internal insn
202 representation). */
203 struct lra_insn_recog_data
205 /* The insn code. */
206 int icode;
207 /* The alternative should be used for the insn, -1 if invalid, or we
208 should try to use any alternative, or the insn is a debug
209 insn. */
210 int used_insn_alternative;
211 /* SP offset before the insn relative to one at the func start. */
212 HOST_WIDE_INT sp_offset;
213 /* The insn itself. */
214 rtx_insn *insn;
215 /* Common data for insns with the same ICODE. Asm insns (their
216 ICODE is negative) do not share such structures. */
217 struct lra_static_insn_data *insn_static_data;
218 /* Two arrays of size correspondingly equal to the operand and the
219 duplication numbers: */
220 rtx **operand_loc; /* The operand locations, NULL if no operands. */
221 rtx **dup_loc; /* The dup locations, NULL if no dups. */
222 /* Number of hard registers implicitly used/clobbered in given call
223 insn. The value can be NULL or points to array of the hard
224 register numbers ending with a negative value. To differ
225 clobbered and used hard regs, clobbered hard regs are incremented
226 by FIRST_PSEUDO_REGISTER. */
227 int *arg_hard_regs;
228 /* Cached value of get_preferred_alternatives. */
229 alternative_mask preferred_alternatives;
230 /* The following member value is always NULL for a debug insn. */
231 struct lra_insn_reg *regs;
234 typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
236 /* Whether the clobber is used temporary in LRA. */
237 #define LRA_TEMP_CLOBBER_P(x) \
238 (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
240 /* Cost factor for each additional reload and maximal cost reject for
241 insn reloads. One might ask about such strange numbers. Their
242 values occurred historically from former reload pass. */
243 #define LRA_LOSER_COST_FACTOR 6
244 #define LRA_MAX_REJECT 600
246 /* Maximum allowed number of assignment pass iterations after the
247 latest spill pass when any former reload pseudo was spilled. It is
248 for preventing LRA cycling in a bug case. */
249 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
251 /* The maximal number of inheritance/split passes in LRA. It should
252 be more 1 in order to perform caller saves transformations and much
253 less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
254 as permitted constraint passes in some complicated cases. The
255 first inheritance/split pass has a biggest impact on generated code
256 quality. Each subsequent affects generated code in less degree.
257 For example, the 3rd pass does not change generated SPEC2000 code
258 at all on x86-64. */
259 #define LRA_MAX_INHERITANCE_PASSES 2
261 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
262 || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
263 #error wrong LRA_MAX_INHERITANCE_PASSES value
264 #endif
266 /* Analogous macro to the above one but for rematerialization. */
267 #define LRA_MAX_REMATERIALIZATION_PASSES 2
269 #if LRA_MAX_REMATERIALIZATION_PASSES <= 0 \
270 || LRA_MAX_REMATERIALIZATION_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
271 #error wrong LRA_MAX_REMATERIALIZATION_PASSES value
272 #endif
274 /* lra.c: */
276 extern FILE *lra_dump_file;
278 extern bool lra_reg_spill_p;
280 extern HARD_REG_SET lra_no_alloc_regs;
282 extern int lra_insn_recog_data_len;
283 extern lra_insn_recog_data_t *lra_insn_recog_data;
285 extern int lra_curr_reload_num;
287 extern void lra_dump_bitmap_with_title (const char *, bitmap, int);
288 extern void lra_push_insn (rtx_insn *);
289 extern void lra_push_insn_by_uid (unsigned int);
290 extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
291 extern rtx_insn *lra_pop_insn (void);
292 extern unsigned int lra_insn_stack_length (void);
294 extern rtx lra_create_new_reg_with_unique_value (machine_mode, rtx,
295 enum reg_class, const char *);
296 extern void lra_set_regno_unique_value (int);
297 extern void lra_invalidate_insn_data (rtx_insn *);
298 extern void lra_set_insn_deleted (rtx_insn *);
299 extern void lra_delete_dead_insn (rtx_insn *);
300 extern void lra_emit_add (rtx, rtx, rtx);
301 extern void lra_emit_move (rtx, rtx);
302 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
304 extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
305 const char *);
307 extern bool lra_substitute_pseudo (rtx *, int, rtx, bool);
308 extern bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx, bool);
310 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
311 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
312 extern void lra_set_used_insn_alternative (rtx_insn *, int);
313 extern void lra_set_used_insn_alternative_by_uid (int, int);
315 extern void lra_invalidate_insn_regno_info (rtx_insn *);
316 extern void lra_update_insn_regno_info (rtx_insn *);
317 extern struct lra_insn_reg *lra_get_insn_regs (int);
319 extern void lra_free_copies (void);
320 extern void lra_create_copy (int, int, int);
321 extern lra_copy_t lra_get_copy (int);
322 extern bool lra_former_scratch_p (int);
323 extern bool lra_former_scratch_operand_p (rtx_insn *, int);
324 extern void lra_register_new_scratch_op (rtx_insn *, int);
326 extern int lra_new_regno_start;
327 extern int lra_constraint_new_regno_start;
328 extern int lra_bad_spill_regno_start;
329 extern bitmap_head lra_inheritance_pseudos;
330 extern bitmap_head lra_split_regs;
331 extern bitmap_head lra_subreg_reload_pseudos;
332 extern bitmap_head lra_optional_reload_pseudos;
334 /* lra-constraints.c: */
336 extern void lra_init_equiv (void);
337 extern int lra_constraint_offset (int, machine_mode);
339 extern int lra_constraint_iter;
340 extern bool lra_risky_transformations_p;
341 extern int lra_inheritance_iter;
342 extern int lra_undo_inheritance_iter;
343 extern bool lra_constrain_insn (rtx_insn *);
344 extern bool lra_constraints (bool);
345 extern void lra_constraints_init (void);
346 extern void lra_constraints_finish (void);
347 extern void lra_inheritance (void);
348 extern bool lra_undo_inheritance (void);
350 /* lra-lives.c: */
352 extern int lra_live_max_point;
353 extern int *lra_point_freq;
355 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
357 extern int lra_live_range_iter;
358 extern void lra_create_live_ranges (bool, bool);
359 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
360 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
361 lra_live_range_t);
362 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
363 lra_live_range_t);
364 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
365 extern void debug (lra_live_range &ref);
366 extern void debug (lra_live_range *ptr);
367 extern void lra_debug_live_range_list (lra_live_range_t);
368 extern void lra_debug_pseudo_live_ranges (int);
369 extern void lra_debug_live_ranges (void);
370 extern void lra_clear_live_ranges (void);
371 extern void lra_live_ranges_init (void);
372 extern void lra_live_ranges_finish (void);
373 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
375 /* lra-assigns.c: */
377 extern int lra_assignment_iter;
378 extern int lra_assignment_iter_after_spill;
379 extern void lra_setup_reg_renumber (int, int, bool);
380 extern bool lra_assign (void);
383 /* lra-coalesce.c: */
385 extern int lra_coalesce_iter;
386 extern bool lra_coalesce (void);
388 /* lra-spills.c: */
390 extern bool lra_need_for_spills_p (void);
391 extern void lra_spill (void);
392 extern void lra_final_code_change (void);
394 /* lra-remat.c: */
396 extern int lra_rematerialization_iter;
397 extern bool lra_remat (void);
399 /* lra-elimination.c: */
401 extern void lra_debug_elim_table (void);
402 extern int lra_get_elimination_hard_regno (int);
403 extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode,
404 bool, bool, HOST_WIDE_INT, bool);
405 extern void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, HOST_WIDE_INT);
406 extern void lra_eliminate (bool, bool);
408 extern void lra_eliminate_reg_if_possible (rtx *);
412 /* Return the hard register which given pseudo REGNO assigned to.
413 Negative value means that the register got memory or we don't know
414 allocation yet. */
415 static inline int
416 lra_get_regno_hard_regno (int regno)
418 resize_reg_info ();
419 return reg_renumber[regno];
422 /* Change class of pseudo REGNO to NEW_CLASS. Print info about it
423 using TITLE. Output a new line if NL_P. */
424 static void inline
425 lra_change_class (int regno, enum reg_class new_class,
426 const char *title, bool nl_p)
428 lra_assert (regno >= FIRST_PSEUDO_REGISTER);
429 if (lra_dump_file != NULL)
430 fprintf (lra_dump_file, "%s class %s for r%d",
431 title, reg_class_names[new_class], regno);
432 setup_reg_classes (regno, new_class, NO_REGS, new_class);
433 if (lra_dump_file != NULL && nl_p)
434 fprintf (lra_dump_file, "\n");
437 /* Update insn operands which are duplication of NOP operand. The
438 insn is represented by its LRA internal representation ID. */
439 static inline void
440 lra_update_dup (lra_insn_recog_data_t id, int nop)
442 int i;
443 struct lra_static_insn_data *static_id = id->insn_static_data;
445 for (i = 0; i < static_id->n_dups; i++)
446 if (static_id->dup_num[i] == nop)
447 *id->dup_loc[i] = *id->operand_loc[nop];
450 /* Process operator duplications in insn with ID. We do it after the
451 operands processing. Generally speaking, we could do this probably
452 simultaneously with operands processing because a common practice
453 is to enumerate the operators after their operands. */
454 static inline void
455 lra_update_operator_dups (lra_insn_recog_data_t id)
457 int i;
458 struct lra_static_insn_data *static_id = id->insn_static_data;
460 for (i = 0; i < static_id->n_dups; i++)
462 int ndup = static_id->dup_num[i];
464 if (static_id->operand[ndup].is_operator)
465 *id->dup_loc[i] = *id->operand_loc[ndup];
469 /* Return info about INSN. Set up the info if it is not done yet. */
470 static inline lra_insn_recog_data_t
471 lra_get_insn_recog_data (rtx_insn *insn)
473 lra_insn_recog_data_t data;
474 unsigned int uid = INSN_UID (insn);
476 if (lra_insn_recog_data_len > (int) uid
477 && (data = lra_insn_recog_data[uid]) != NULL)
479 /* Check that we did not change insn without updating the insn
480 info. */
481 lra_assert (data->insn == insn
482 && (INSN_CODE (insn) < 0
483 || data->icode == INSN_CODE (insn)));
484 return data;
486 return lra_set_insn_recog_data (insn);
489 /* Update offset from pseudos with VAL by INCR. */
490 static inline void
491 lra_update_reg_val_offset (int val, int incr)
493 int i;
495 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
497 if (lra_reg_info[i].val == val)
498 lra_reg_info[i].offset += incr;
502 /* Return true if register content is equal to VAL with OFFSET. */
503 static inline bool
504 lra_reg_val_equal_p (int regno, int val, int offset)
506 if (lra_reg_info[regno].val == val
507 && lra_reg_info[regno].offset == offset)
508 return true;
510 return false;
513 /* Assign value of register FROM to TO. */
514 static inline void
515 lra_assign_reg_val (int from, int to)
517 lra_reg_info[to].val = lra_reg_info[from].val;
518 lra_reg_info[to].offset = lra_reg_info[from].offset;
521 #endif /* GCC_LRA_INT_H */