gcc/config/iq2000/iq2000.h

   1 /* Definitions of target machine for GNU compiler.
   2    Vitesse IQ2000 processors
   3    Copyright (C) 2003 Free Software Foundation, Inc.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 2, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING.  If not, write to the Free
  19    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  20    02111-1307, USA.  */
  21
  22 /* Driver configuration.  */
  23
  24 #undef  SWITCH_TAKES_ARG
  25 #define SWITCH_TAKES_ARG(CHAR)                                          \
  26   (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
  27
  28 /* The svr4.h LIB_SPEC with -leval and --*group tacked on */
  29 #undef  LIB_SPEC
  30 #define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -leval -lgcc --end-group}}"
  31
  32 #undef STARTFILE_SPEC
  33 #undef ENDFILE_SPEC
  34
  35 \f
  36 /* Run-time target specifications.  */
  37
  38 #define TARGET_CPU_CPP_BUILTINS()               \
  39   do                                            \
  40     {                                           \
  41       builtin_define ("__iq2000__");            \
  42       builtin_assert ("cpu=iq2000");            \
  43       builtin_assert ("machine=iq2000");        \
  44     }                                           \
  45   while (0)
  46
  47 extern int      target_flags;
  48
  49 #define MASK_GPOPT         0x00000008   /* Optimize for global pointer.  */
  50 #define MASK_EMBEDDED_DATA 0x00008000   /* Reduce RAM usage, not fast code.  */
  51 #define MASK_UNINIT_CONST_IN_RODATA \
  52                            0x00800000   /* Store uninitialized
  53                                            consts in rodata.  */
  54
  55 /* Macros used in the machine description to test the flags.  */
  56
  57 #define TARGET_STATS            0
  58
  59 /* For embedded systems, optimize for reduced RAM space instead of for
  60    fastest code.  */
  61 #define TARGET_EMBEDDED_DATA    (target_flags & MASK_EMBEDDED_DATA)
  62
  63 #define TARGET_DEBUG_MODE       (target_flags & 0)
  64 #define TARGET_DEBUG_A_MODE     (target_flags & 0)
  65 #define TARGET_DEBUG_B_MODE     (target_flags & 0)
  66 #define TARGET_DEBUG_C_MODE     (target_flags & 0)
  67 #define TARGET_DEBUG_D_MODE     (target_flags & 0)
  68
  69 #define TARGET_SWITCHES                                                 \
  70 {                                                                       \
  71   {"no-crt0",          0,                                               \
  72      N_("No default crt0.o") },                                         \
  73   {"gpopt",               MASK_GPOPT,                                   \
  74      N_("Use GP relative sdata/sbss sections")},                        \
  75   {"no-gpopt",           -MASK_GPOPT,                                   \
  76      N_("Don't use GP relative sdata/sbss sections")},                  \
  77   {"embedded-data",       MASK_EMBEDDED_DATA,                           \
  78      N_("Use ROM instead of RAM")},                                     \
  79   {"no-embedded-data",   -MASK_EMBEDDED_DATA,                           \
  80      N_("Don't use ROM instead of RAM")},                               \
  81   {"uninit-const-in-rodata", MASK_UNINIT_CONST_IN_RODATA,               \
  82      N_("Put uninitialized constants in ROM (needs -membedded-data)")}, \
  83   {"no-uninit-const-in-rodata", -MASK_UNINIT_CONST_IN_RODATA,           \
  84      N_("Don't put uninitialized constants in ROM")},                   \
  85   {"",                    (TARGET_DEFAULT                               \
  86                            | TARGET_CPU_DEFAULT),                       \
  87      NULL},                                                             \
  88 }
  89
  90 /* Default target_flags if no switches are specified.  */
  91
  92 #define TARGET_DEFAULT 0
  93
  94 #ifndef TARGET_CPU_DEFAULT
  95 #define TARGET_CPU_DEFAULT 0
  96 #endif
  97
  98 #ifndef IQ2000_ISA_DEFAULT
  99 #define IQ2000_ISA_DEFAULT 1
 100 #endif
 101
 102 #define TARGET_OPTIONS                                                  \
 103 {                                                                       \
 104   SUBTARGET_TARGET_OPTIONS                                              \
 105   { "cpu=",     & iq2000_cpu_string,                                    \
 106       N_("Specify CPU for scheduling purposes")},                       \
 107   { "arch=",    & iq2000_arch_string,                                   \
 108       N_("Specify CPU for code generation purposes")},                  \
 109 }
 110
 111 /* This is meant to be redefined in the host dependent files.  */
 112 #define SUBTARGET_TARGET_OPTIONS
 113
 114 #define IQ2000_VERSION "[1.0]"
 115
 116 #ifndef MACHINE_TYPE
 117 #define MACHINE_TYPE "IQ2000"
 118 #endif
 119
 120 #ifndef TARGET_VERSION_INTERNAL
 121 #define TARGET_VERSION_INTERNAL(STREAM)                                 \
 122   fprintf (STREAM, " %s %s", IQ2000_VERSION, MACHINE_TYPE)
 123 #endif
 124
 125 #ifndef TARGET_VERSION
 126 #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
 127 #endif
 128
 129 #define OVERRIDE_OPTIONS override_options ()
 130
 131 #define CAN_DEBUG_WITHOUT_FP
 132 \f
 133 /* Storage Layout.  */
 134
 135 #define BITS_BIG_ENDIAN                 0
 136 #define BYTES_BIG_ENDIAN                1
 137 #define WORDS_BIG_ENDIAN                1
 138 #define LIBGCC2_WORDS_BIG_ENDIAN        1
 139 #define BITS_PER_WORD                   32
 140 #define MAX_BITS_PER_WORD               64
 141 #define UNITS_PER_WORD                  4
 142 #define MIN_UNITS_PER_WORD              4
 143 #define POINTER_SIZE                    32
 144
 145 /* Define this macro if it is advisable to hold scalars in registers
 146    in a wider mode than that declared by the program.  In such cases,
 147    the value is constrained to be within the bounds of the declared
 148    type, but kept valid in the wider mode.  The signedness of the
 149    extension may differ from that of the type.
 150
 151    We promote any value smaller than SImode up to SImode.  */
 152
 153 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
 154   if (GET_MODE_CLASS (MODE) == MODE_INT         \
 155       && GET_MODE_SIZE (MODE) < 4)              \
 156     (MODE) = SImode;
 157
 158 #define PROMOTE_FUNCTION_ARGS
 159
 160 #define PROMOTE_FUNCTION_RETURN
 161
 162 #define PARM_BOUNDARY 32
 163
 164 #define STACK_BOUNDARY 64
 165
 166 #define FUNCTION_BOUNDARY 32
 167
 168 #define BIGGEST_ALIGNMENT 64
 169
 170 #undef  DATA_ALIGNMENT
 171 #define DATA_ALIGNMENT(TYPE, ALIGN)                                     \
 172   ((((ALIGN) < BITS_PER_WORD)                                           \
 173     && (TREE_CODE (TYPE) == ARRAY_TYPE                                  \
 174         || TREE_CODE (TYPE) == UNION_TYPE                               \
 175         || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
 176
 177 #define CONSTANT_ALIGNMENT(EXP, ALIGN)                                  \
 178   ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)   \
 179    && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
 180
 181 #define EMPTY_FIELD_BOUNDARY 32
 182
 183 #define STRUCTURE_SIZE_BOUNDARY 8
 184
 185 #define STRICT_ALIGNMENT 1
 186
 187 #define PCC_BITFIELD_TYPE_MATTERS 1
 188
 189 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
 190
 191 \f
 192 /* Layout of Source Language Data Types.  */
 193
 194 #define INT_TYPE_SIZE           32
 195 #define SHORT_TYPE_SIZE         16
 196 #define LONG_TYPE_SIZE          32
 197 #define LONG_LONG_TYPE_SIZE     64
 198 #define CHAR_TYPE_SIZE          BITS_PER_UNIT
 199 #define FLOAT_TYPE_SIZE         32
 200 #define DOUBLE_TYPE_SIZE        64
 201 #define LONG_DOUBLE_TYPE_SIZE   64
 202 #define DEFAULT_SIGNED_CHAR     1
 203 #define MAX_WCHAR_TYPE_SIZE     32
 204
 205 \f
 206 /* Register Basics.  */
 207
 208 /* On the IQ2000, we have 32 integer registers.  */
 209 #define FIRST_PSEUDO_REGISTER 33
 210
 211 #define FIXED_REGISTERS                                                 \
 212 {                                                                       \
 213   1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 214   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1                     \
 215 }
 216
 217 #define CALL_USED_REGISTERS                                             \
 218 {                                                                       \
 219   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,                       \
 220   0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1                     \
 221 }
 222
 223 \f
 224 /* Order of allocation of registers.  */
 225
 226 #define REG_ALLOC_ORDER                                                 \
 227 {  0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,       \
 228   16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31        \
 229 }
 230
 231 \f
 232 /* How Values Fit in Registers.  */
 233
 234 #define HARD_REGNO_NREGS(REGNO, MODE)   \
 235   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 236
 237 #define HARD_REGNO_MODE_OK(REGNO, MODE)                         \
 238  ((REGNO_REG_CLASS (REGNO) == GR_REGS)                          \
 239   ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4             \
 240   : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)
 241
 242 #define MODES_TIEABLE_P(MODE1, MODE2)                           \
 243   ((GET_MODE_CLASS (MODE1) == MODE_FLOAT ||                     \
 244     GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)               \
 245    == (GET_MODE_CLASS (MODE2) == MODE_FLOAT ||                  \
 246        GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
 247
 248 #define AVOID_CCMODE_COPIES
 249
 250 \f
 251 /* Register Classes.  */
 252
 253 enum reg_class
 254 {
 255   NO_REGS,                      /* No registers in set.  */
 256   GR_REGS,                      /* Integer registers.  */
 257   ALL_REGS,                     /* All registers.  */
 258   LIM_REG_CLASSES               /* Max value + 1.  */
 259 };
 260
 261 #define GENERAL_REGS GR_REGS
 262
 263 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 264
 265 #define REG_CLASS_NAMES                                         \
 266 {                                                               \
 267   "NO_REGS",                                                    \
 268   "GR_REGS",                                                    \
 269   "ALL_REGS"                                                    \
 270 }
 271
 272 #define REG_CLASS_CONTENTS                                      \
 273 {                                                               \
 274   { 0x00000000, 0x00000000 },   /* No registers,  */            \
 275   { 0xffffffff, 0x00000000 },   /* Integer registers.  */       \
 276   { 0xffffffff, 0x00000001 }    /* All registers.  */           \
 277 }
 278
 279 #define REGNO_REG_CLASS(REGNO) \
 280 ((REGNO) <= GP_REG_LAST + 1 ? GR_REGS : NO_REGS)
 281
 282 #define BASE_REG_CLASS  (GR_REGS)
 283
 284 #define INDEX_REG_CLASS NO_REGS
 285
 286 #define REG_CLASS_FROM_LETTER(C) \
 287   ((C) == 'd' ? GR_REGS :        \
 288    (C) == 'b' ? ALL_REGS :       \
 289    (C) == 'y' ? GR_REGS :        \
 290    NO_REGS)
 291
 292 #define REGNO_OK_FOR_INDEX_P(regno)     0
 293
 294 #define PREFERRED_RELOAD_CLASS(X,CLASS)                         \
 295   ((CLASS) != ALL_REGS                                          \
 296    ? (CLASS)                                                    \
 297    : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT              \
 298        || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT)  \
 299       ? (GR_REGS)                                               \
 300       : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT             \
 301           || GET_MODE (X) == VOIDmode)                          \
 302          ? (GR_REGS)                                            \
 303          : (CLASS))))
 304
 305 #define SMALL_REGISTER_CLASSES 0
 306
 307 #define CLASS_MAX_NREGS(CLASS, MODE)    \
 308   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 309
 310 /* For IQ2000:
 311
 312    `I'  is used for the range of constants an arithmetic insn can
 313         actually contain (16 bits signed integers).
 314
 315    `J'  is used for the range which is just zero (ie, $r0).
 316
 317    `K'  is used for the range of constants a logical insn can actually
 318         contain (16 bit zero-extended integers).
 319
 320    `L'  is used for the range of constants that be loaded with lui
 321         (ie, the bottom 16 bits are zero).
 322
 323    `M'  is used for the range of constants that take two words to load
 324         (ie, not matched by `I', `K', and `L').
 325
 326    `N'  is used for constants 0xffffnnnn or 0xnnnnffff
 327
 328    `O'  is a 5 bit zero-extended integer.  */
 329
 330 #define CONST_OK_FOR_LETTER_P(VALUE, C)                                 \
 331   ((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \
 332    : (C) == 'J' ? ((VALUE) == 0)                                        \
 333    : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000)          \
 334    : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0                          \
 335                    && (((VALUE) & ~2147483647) == 0                     \
 336                        || ((VALUE) & ~2147483647) == ~2147483647))      \
 337    : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0)                       \
 338                    && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)          \
 339                    && (((VALUE) & 0x0000ffff) != 0                      \
 340                        || (((VALUE) & ~2147483647) != 0                 \
 341                            && ((VALUE) & ~2147483647) != ~2147483647))) \
 342    : (C) == 'N' ? ((((VALUE) & 0xffff) == 0xffff)                       \
 343                    || (((VALUE) & 0xffff0000) == 0xffff0000))           \
 344    : (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x20) < 0x40)    \
 345    : 0)
 346
 347 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)                          \
 348   ((C) == 'G'                                                           \
 349    && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
 350
 351 /* `R' is for memory references which take 1 word for the instruction.  */
 352
 353 #define EXTRA_CONSTRAINT(OP,CODE)                                       \
 354   (((CODE) == 'R')        ? simple_memory_operand (OP, GET_MODE (OP))   \
 355    : FALSE)
 356
 357 \f
 358 /* Basic Stack Layout.  */
 359
 360 #define STACK_GROWS_DOWNWARD
 361
 362 /* #define FRAME_GROWS_DOWNWARD */
 363
 364 #define STARTING_FRAME_OFFSET                                           \
 365   (current_function_outgoing_args_size)
 366
 367 /* Use the default value zero.  */
 368 /* #define STACK_POINTER_OFFSET 0 */
 369
 370 #define FIRST_PARM_OFFSET(FNDECL) 0
 371
 372 /* The return address for the current frame is in r31 if this is a leaf
 373    function.  Otherwise, it is on the stack.  It is at a variable offset
 374    from sp/fp/ap, so we define a fake hard register rap which is a
 375    pointer to the return address on the stack.  This always gets eliminated
 376    during reload to be either the frame pointer or the stack pointer plus
 377    an offset.  */
 378
 379 #define RETURN_ADDR_RTX(count, frame)                                   \
 380   (((count) == 0)                                                       \
 381    ? (leaf_function_p ()                                                \
 382       ? gen_rtx_REG (Pmode, GP_REG_FIRST + 31)                          \
 383       : gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode,                         \
 384                                          RETURN_ADDRESS_POINTER_REGNUM))) \
 385     : (rtx) 0)
 386
 387 /* Before the prologue, RA lives in r31.  */
 388 #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31)
 389
 390 \f
 391 /* Register That Address the Stack Frame.  */
 392
 393 #define STACK_POINTER_REGNUM            (GP_REG_FIRST + 29)
 394 #define FRAME_POINTER_REGNUM            (GP_REG_FIRST + 1)
 395 #define HARD_FRAME_POINTER_REGNUM       (GP_REG_FIRST + 27)
 396 #define ARG_POINTER_REGNUM              GP_REG_FIRST
 397 #define RETURN_ADDRESS_POINTER_REGNUM   RAP_REG_NUM
 398 #define STATIC_CHAIN_REGNUM             (GP_REG_FIRST + 2)
 399
 400 \f
 401 /* Eliminating the Frame Pointer and the Arg Pointer.  */
 402
 403 #define FRAME_POINTER_REQUIRED 0
 404
 405 #define ELIMINABLE_REGS                                                 \
 406 {{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},                         \
 407  { ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},                    \
 408  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},                \
 409  { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},           \
 410  { RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 31},                   \
 411  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 412  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 413
 414
 415 /* We can always eliminate to the frame pointer.  We can eliminate to the
 416    stack pointer unless a frame pointer is needed.  */
 417
 418 #define CAN_ELIMINATE(FROM, TO)                                         \
 419   (((FROM) == RETURN_ADDRESS_POINTER_REGNUM && (! leaf_function_p ()    \
 420    || (TO == GP_REG_FIRST + 31 && leaf_function_p)))                    \
 421   || ((FROM) != RETURN_ADDRESS_POINTER_REGNUM                           \
 422    && ((TO) == HARD_FRAME_POINTER_REGNUM                                \
 423    || ((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed))))
 424
 425 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                     \
 426         (OFFSET) = iq2000_initial_elimination_offset ((FROM), (TO))
 427 \f
 428 /* Passing Function Arguments on the Stack.  */
 429
 430 #define PROMOTE_PROTOTYPES 1
 431
 432 /* #define PUSH_ROUNDING(BYTES) 0 */
 433
 434 #define ACCUMULATE_OUTGOING_ARGS 1
 435
 436 #define REG_PARM_STACK_SPACE(FNDECL) 0
 437
 438 #define OUTGOING_REG_PARM_STACK_SPACE
 439
 440 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
 441
 442 \f
 443 /* Function Arguments in Registers.  */
 444
 445 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
 446   function_arg (& CUM, MODE, TYPE, NAMED)
 447
 448 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
 449   function_arg_partial_nregs (& CUM, MODE, TYPE, NAMED)
 450
 451 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED)          \
 452   function_arg_pass_by_reference (& CUM, MODE, TYPE, NAMED)
 453
 454 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED)              \
 455   ((NAMED) && FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED))
 456
 457 #define MAX_ARGS_IN_REGISTERS 8
 458
 459 typedef struct iq2000_args
 460 {
 461   int gp_reg_found;             /* Whether a gp register was found yet.  */
 462   unsigned int arg_number;      /* Argument number.  */
 463   unsigned int arg_words;       /* # total words the arguments take.  */
 464   unsigned int fp_arg_words;    /* # words for FP args (IQ2000_EABI only).  */
 465   int last_arg_fp;              /* Nonzero if last arg was FP (EABI only).  */
 466   int fp_code;                  /* Mode of FP arguments.  */
 467   unsigned int num_adjusts;     /* Number of adjustments made.  */
 468                                 /* Adjustments made to args pass in regs.  */
 469   struct rtx_def * adjust[MAX_ARGS_IN_REGISTERS * 2];
 470 } CUMULATIVE_ARGS;
 471
 472 /* Initialize a variable CUM of type CUMULATIVE_ARGS
 473    for a call to a function whose data type is FNTYPE.
 474    For a library call, FNTYPE is 0.  */
 475 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT)               \
 476   init_cumulative_args (& CUM, FNTYPE, LIBNAME)                         \
 477
 478 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 479   function_arg_advance (& CUM, MODE, TYPE, NAMED)
 480
 481 #define FUNCTION_ARG_PADDING(MODE, TYPE)                                \
 482   (! BYTES_BIG_ENDIAN                                                   \
 483    ? upward                                                             \
 484    : (((MODE) == BLKmode                                                \
 485        ? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST         \
 486           && int_size_in_bytes (TYPE) < (PARM_BOUNDARY / BITS_PER_UNIT))\
 487        : (GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY                       \
 488           && (GET_MODE_CLASS (MODE) == MODE_INT)))                      \
 489       ? downward : upward))
 490
 491 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE)                               \
 492   (((TYPE) != 0)                                                        \
 493         ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY)                          \
 494                 ? PARM_BOUNDARY                                         \
 495                 : TYPE_ALIGN(TYPE))                                     \
 496         : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY)                  \
 497                 ? PARM_BOUNDARY                                         \
 498                 : GET_MODE_ALIGNMENT(MODE)))
 499
 500 #define FUNCTION_ARG_REGNO_P(N)                                         \
 501   (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
 502
 503 \f
 504 /* How Scalar Function Values are Returned.  */
 505
 506 #define FUNCTION_VALUE(VALTYPE, FUNC)   iq2000_function_value (VALTYPE, FUNC)
 507
 508 #define LIBCALL_VALUE(MODE)                                             \
 509   gen_rtx (REG,                                                         \
 510            ((GET_MODE_CLASS (MODE) != MODE_INT                          \
 511              || GET_MODE_SIZE (MODE) >= 4)                              \
 512             ? (MODE)                                                    \
 513             : SImode),                                                  \
 514            GP_RETURN)
 515
 516 /* On the IQ2000, R2 and R3 are the only register thus used.  */
 517
 518 #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN)
 519
 520 \f
 521 /* How Large Values are Returned.  */
 522
 523 #define RETURN_IN_MEMORY(TYPE)                                           \
 524   (((int_size_in_bytes (TYPE)                                            \
 525        > (2 * UNITS_PER_WORD))                                           \
 526       || (int_size_in_bytes (TYPE) == -1)))
 527
 528 #define DEFAULT_PCC_STRUCT_RETURN 0
 529
 530 #define STRUCT_VALUE 0
 531
 532 \f
 533 /* Function Entry and Exit.  */
 534
 535 #define EXIT_IGNORE_STACK 1
 536
 537 \f
 538 /* Generating Code for Profiling.  */
 539
 540 #define FUNCTION_PROFILER(FILE, LABELNO)                                \
 541 {                                                                       \
 542   fprintf (FILE, "\t.set\tnoreorder\n");                                \
 543   fprintf (FILE, "\t.set\tnoat\n");                                     \
 544   fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n",    \
 545            reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]);  \
 546   fprintf (FILE, "\tjal\t_mcount\n");                                   \
 547   fprintf (FILE,                                                        \
 548            "\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from  stack\n",    \
 549            "subu",                                                      \
 550            reg_names[STACK_POINTER_REGNUM],                             \
 551            reg_names[STACK_POINTER_REGNUM],                             \
 552            Pmode == DImode ? 16 : 8);                                   \
 553   fprintf (FILE, "\t.set\treorder\n");                                  \
 554   fprintf (FILE, "\t.set\tat\n");                                       \
 555 }
 556
 557 \f
 558 /* Implementing the Varargs Macros.  */
 559
 560 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL)       \
 561   iq2000_setup_incoming_varargs (CUM,MODE,TYPE,&PRETEND_SIZE,NO_RTL);
 562
 563 #define STRICT_ARGUMENT_NAMING  1
 564
 565 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
 566   iq2000_va_start (valist, nextarg)
 567
 568 /* Implement `va_arg'.  */
 569 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
 570   iq2000_va_arg (valist, type)
 571
 572 \f
 573 /* Trampolines for Nested Functions.  */
 574
 575 /* A C statement to output, on the stream FILE, assembler code for a
 576    block of data that contains the constant parts of a trampoline.
 577    This code should not include a label--the label is taken care of
 578    automatically.  */
 579
 580 #define TRAMPOLINE_TEMPLATE(STREAM)                                      \
 581 {                                                                        \
 582   fprintf (STREAM, "\t.word\t0x03e00821\t\t# move   $1,$31\n");         \
 583   fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n");         \
 584   fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n");                   \
 585   if (Pmode == DImode)                                                  \
 586     {                                                                   \
 587       fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld     $3,20($31)\n"); \
 588       fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld     $2,28($31)\n"); \
 589     }                                                                   \
 590   else                                                                  \
 591     {                                                                   \
 592       fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw     $3,20($31)\n"); \
 593       fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw     $2,24($31)\n"); \
 594     }                                                                   \
 595   fprintf (STREAM, "\t.word\t0x0060c821\t\t# move   $25,$3 (abicalls)\n"); \
 596   fprintf (STREAM, "\t.word\t0x00600008\t\t# jr     $3\n");             \
 597   fprintf (STREAM, "\t.word\t0x0020f821\t\t# move   $31,$1\n");         \
 598   fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
 599   fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
 600 }
 601
 602 #define TRAMPOLINE_SIZE (40)
 603
 604 #define TRAMPOLINE_ALIGNMENT 32
 605
 606 #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN)                            \
 607 {                                                                           \
 608   rtx addr = ADDR;                                                          \
 609     emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 32)), FUNC); \
 610     emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 36)), CHAIN);\
 611 }
 612
 613 \f
 614 /* Addressing Modes.  */
 615
 616 #define CONSTANT_ADDRESS_P(X)                                           \
 617   (   (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF          \
 618     || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH                \
 619     || (GET_CODE (X) == CONST)))
 620
 621 #define MAX_REGS_PER_ADDRESS 1
 622
 623 #ifdef REG_OK_STRICT
 624 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)         \
 625   {                                                     \
 626     if (iq2000_legitimate_address_p (MODE, X, 1))       \
 627       goto ADDR;                                        \
 628   }
 629 #else
 630 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)         \
 631   {                                                     \
 632     if (iq2000_legitimate_address_p (MODE, X, 0))       \
 633       goto ADDR;                                        \
 634   }
 635 #endif
 636
 637 #define REG_OK_FOR_INDEX_P(X) 0
 638
 639
 640 /* For the IQ2000, transform:
 641
 642         memory(X + <large int>)
 643    into:
 644         Y = <large int> & ~0x7fff;
 645         Z = X + Y
 646         memory (Z + (<large int> & 0x7fff));
 647 */
 648
 649 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)                             \
 650 {                                                                       \
 651   rtx xinsn = (X);                                                      \
 652                                                                         \
 653   if (TARGET_DEBUG_B_MODE)                                              \
 654     {                                                                   \
 655       GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n");                  \
 656       GO_DEBUG_RTX (xinsn);                                             \
 657     }                                                                   \
 658                                                                         \
 659   if (iq2000_check_split (X, MODE))             \
 660     {                                                                   \
 661       X = gen_rtx_LO_SUM (Pmode,                                        \
 662                           copy_to_mode_reg (Pmode,                      \
 663                                             gen_rtx (HIGH, Pmode, X)),  \
 664                           X);                                           \
 665       goto WIN;                                                         \
 666     }                                                                   \
 667                                                                         \
 668   if (GET_CODE (xinsn) == PLUS)                                         \
 669     {                                                                   \
 670       rtx xplus0 = XEXP (xinsn, 0);                                     \
 671       rtx xplus1 = XEXP (xinsn, 1);                                     \
 672       enum rtx_code code0 = GET_CODE (xplus0);                          \
 673       enum rtx_code code1 = GET_CODE (xplus1);                          \
 674                                                                         \
 675       if (code0 != REG && code1 == REG)                                 \
 676         {                                                               \
 677           xplus0 = XEXP (xinsn, 1);                                     \
 678           xplus1 = XEXP (xinsn, 0);                                     \
 679           code0 = GET_CODE (xplus0);                                    \
 680           code1 = GET_CODE (xplus1);                                    \
 681         }                                                               \
 682                                                                         \
 683       if (code0 == REG && REG_MODE_OK_FOR_BASE_P (xplus0, MODE)         \
 684           && code1 == CONST_INT && !SMALL_INT (xplus1))                 \
 685         {                                                               \
 686           rtx int_reg = gen_reg_rtx (Pmode);                            \
 687           rtx ptr_reg = gen_reg_rtx (Pmode);                            \
 688                                                                         \
 689           emit_move_insn (int_reg,                                      \
 690                           GEN_INT (INTVAL (xplus1) & ~ 0x7fff));        \
 691                                                                         \
 692           emit_insn (gen_rtx_SET (VOIDmode,                             \
 693                                   ptr_reg,                              \
 694                                   gen_rtx_PLUS (Pmode, xplus0, int_reg))); \
 695                                                                         \
 696           X = plus_constant (ptr_reg, INTVAL (xplus1) & 0x7fff);        \
 697           goto WIN;                                                     \
 698         }                                                               \
 699     }                                                                   \
 700                                                                         \
 701   if (TARGET_DEBUG_B_MODE)                                              \
 702     GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n");                  \
 703 }
 704
 705 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
 706
 707 #define LEGITIMATE_CONSTANT_P(X) (1)
 708
 709 \f
 710 /* Describing Relative Costs of Operations.  */
 711
 712 #define REGISTER_MOVE_COST(MODE, FROM, TO)      2
 713
 714 #define MEMORY_MOVE_COST(MODE,CLASS,TO_P)       \
 715   (TO_P ? 2 : 16)
 716
 717 #define BRANCH_COST 2
 718
 719 #define SLOW_BYTE_ACCESS 1
 720
 721 #define NO_FUNCTION_CSE 1
 722
 723 #define NO_RECURSIVE_FUNCTION_CSE 1
 724
 725 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST)                            \
 726   if (REG_NOTE_KIND (LINK) != 0)                                        \
 727     (COST) = 0; /* Anti or output dependence.  */
 728
 729 \f
 730 /* Dividing the output into sections.  */
 731
 732 #define TEXT_SECTION_ASM_OP     "\t.text"       /* Instructions.  */
 733
 734 #define DATA_SECTION_ASM_OP     "\t.data"       /* Large data.  */
 735
 736 \f
 737 /* The Overall Framework of an Assembler File.  */
 738
 739 #define ASM_COMMENT_START " #"
 740
 741 #define ASM_APP_ON "#APP\n"
 742
 743 #define ASM_APP_OFF "#NO_APP\n"
 744
 745 \f
 746 /* Output and Generation of Labels.  */
 747
 748 #undef ASM_GENERATE_INTERNAL_LABEL
 749 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)                   \
 750   sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))
 751
 752 #define GLOBAL_ASM_OP "\t.globl\t"
 753
 754 \f
 755 /* Output of Assembler Instructions.  */
 756
 757 #define REGISTER_NAMES                                                  \
 758 {                                                                       \
 759  "%0",   "%1",   "%2",   "%3",   "%4",   "%5",   "%6",   "%7",          \
 760  "%8",   "%9",   "%10",  "%11",  "%12",  "%13",  "%14",  "%15",         \
 761  "%16",  "%17",  "%18",  "%19",  "%20",  "%21",  "%22",  "%23",         \
 762  "%24",  "%25",  "%26",  "%27",  "%28",  "%29",  "%30",  "%31",  "%rap" \
 763 };
 764
 765 #define ADDITIONAL_REGISTER_NAMES                                       \
 766 {                                                                       \
 767   { "%0",        0 + GP_REG_FIRST },                                    \
 768   { "%1",        1 + GP_REG_FIRST },                                    \
 769   { "%2",        2 + GP_REG_FIRST },                                    \
 770   { "%3",        3 + GP_REG_FIRST },                                    \
 771   { "%4",        4 + GP_REG_FIRST },                                    \
 772   { "%5",        5 + GP_REG_FIRST },                                    \
 773   { "%6",        6 + GP_REG_FIRST },                                    \
 774   { "%7",        7 + GP_REG_FIRST },                                    \
 775   { "%8",        8 + GP_REG_FIRST },                                    \
 776   { "%9",        9 + GP_REG_FIRST },                                    \
 777   { "%10",      10 + GP_REG_FIRST },                                    \
 778   { "%11",      11 + GP_REG_FIRST },                                    \
 779   { "%12",      12 + GP_REG_FIRST },                                    \
 780   { "%13",      13 + GP_REG_FIRST },                                    \
 781   { "%14",      14 + GP_REG_FIRST },                                    \
 782   { "%15",      15 + GP_REG_FIRST },                                    \
 783   { "%16",      16 + GP_REG_FIRST },                                    \
 784   { "%17",      17 + GP_REG_FIRST },                                    \
 785   { "%18",      18 + GP_REG_FIRST },                                    \
 786   { "%19",      19 + GP_REG_FIRST },                                    \
 787   { "%20",      20 + GP_REG_FIRST },                                    \
 788   { "%21",      21 + GP_REG_FIRST },                                    \
 789   { "%22",      22 + GP_REG_FIRST },                                    \
 790   { "%23",      23 + GP_REG_FIRST },                                    \
 791   { "%24",      24 + GP_REG_FIRST },                                    \
 792   { "%25",      25 + GP_REG_FIRST },                                    \
 793   { "%26",      26 + GP_REG_FIRST },                                    \
 794   { "%27",      27 + GP_REG_FIRST },                                    \
 795   { "%28",      28 + GP_REG_FIRST },                                    \
 796   { "%29",      29 + GP_REG_FIRST },                                    \
 797   { "%30",      27 + GP_REG_FIRST },                                    \
 798   { "%31",      31 + GP_REG_FIRST },                                    \
 799   { "%rap",     32 + GP_REG_FIRST },                                    \
 800 }
 801
 802 /* Check if the current insn needs a nop in front of it
 803    because of load delays, and also update the delay slot statistics.  */
 804
 805 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)                      \
 806   final_prescan_insn (INSN, OPVEC, NOPERANDS)
 807
 808 /* See iq2000.c for the IQ2000 specific codes.  */
 809 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 810
 811 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) iq2000_print_operand_punct[CODE]
 812
 813 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 814
 815 #define DBR_OUTPUT_SEQEND(STREAM)                                       \
 816 do                                                                      \
 817   {                                                                     \
 818     fputs ("\n", STREAM);                                               \
 819   }                                                                     \
 820 while (0)
 821
 822 #define LOCAL_LABEL_PREFIX      "$"
 823
 824 #define USER_LABEL_PREFIX       ""
 825
 826 \f
 827 /* Output of dispatch tables.  */
 828
 829 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
 830   do                                                                    \
 831     {                                                                   \
 832       fprintf (STREAM, "\t%s\t%sL%d\n",                                 \
 833                Pmode == DImode ? ".dword" : ".word",                    \
 834                LOCAL_LABEL_PREFIX, VALUE);                              \
 835     }                                                                   \
 836   while (0)
 837
 838 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
 839   fprintf (STREAM, "\t%s\t%sL%d\n",                                     \
 840            Pmode == DImode ? ".dword" : ".word",                        \
 841            LOCAL_LABEL_PREFIX,                                          \
 842            VALUE)
 843
 844 \f
 845 /* Assembler Commands for Alignment.  */
 846
 847 #undef ASM_OUTPUT_SKIP
 848 #define ASM_OUTPUT_SKIP(STREAM,SIZE)                                    \
 849   fprintf (STREAM, "\t.space\t%u\n", (SIZE))
 850
 851 #define ASM_OUTPUT_ALIGN(STREAM,LOG)                                    \
 852   if ((LOG) != 0)                                                       \
 853     fprintf (STREAM, "\t.balign %d\n", 1<<(LOG))
 854
 855 \f
 856 /* Macros Affecting all Debug Formats.  */
 857
 858 #define DEBUGGER_AUTO_OFFSET(X)  \
 859   iq2000_debugger_offset (X, (HOST_WIDE_INT) 0)
 860
 861 #define DEBUGGER_ARG_OFFSET(OFFSET, X)  \
 862   iq2000_debugger_offset (X, (HOST_WIDE_INT) OFFSET)
 863
 864 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
 865
 866 #define DWARF2_DEBUGGING_INFO 1
 867
 868 \f
 869 /* Miscellaneous Parameters.  */
 870
 871 #define PREDICATE_CODES                                                 \
 872   {"uns_arith_operand",         { REG, CONST_INT, SUBREG }},            \
 873   {"arith_operand",             { REG, CONST_INT, SUBREG }},            \
 874   {"small_int",                 { CONST_INT }},                         \
 875   {"large_int",                 { CONST_INT }},                         \
 876   {"reg_or_0_operand",          { REG, CONST_INT, CONST_DOUBLE, SUBREG }}, \
 877   {"simple_memory_operand",     { MEM, SUBREG }},                       \
 878   {"equality_op",               { EQ, NE }},                            \
 879   {"cmp_op",                    { EQ, NE, GT, GE, GTU, GEU, LT, LE,     \
 880                                   LTU, LEU }},                          \
 881   {"pc_or_label_operand",       { PC, LABEL_REF }},                     \
 882   {"call_insn_operand",         { CONST_INT, CONST, SYMBOL_REF, REG}},  \
 883   {"move_operand",              { CONST_INT, CONST_DOUBLE, CONST,       \
 884                                   SYMBOL_REF, LABEL_REF, SUBREG,        \
 885                                   REG, MEM}},                           \
 886   {"power_of_2_operand",        { CONST_INT }},
 887
 888 #define CASE_VECTOR_MODE SImode
 889
 890 #define CASE_VECTOR_PC_RELATIVE 0
 891
 892 #define WORD_REGISTER_OPERATIONS
 893
 894 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
 895
 896 #define MOVE_MAX 4
 897
 898 #define MAX_MOVE_MAX 8
 899
 900 #define SHIFT_COUNT_TRUNCATED 1
 901
 902 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 903
 904 #define STORE_FLAG_VALUE 1
 905
 906 #define Pmode SImode
 907
 908 #define FUNCTION_MODE SImode
 909
 910 /* Standard GCC variables that we reference.  */
 911
 912 extern char     call_used_regs[];
 913
 914 /* IQ2000 external variables defined in iq2000.c.  */
 915
 916 /* Comparison type.  */
 917 enum cmp_type
 918 {
 919   CMP_SI,                               /* Compare four byte integers.  */
 920   CMP_DI,                               /* Compare eight byte integers.  */
 921   CMP_SF,                               /* Compare single precision floats.  */
 922   CMP_DF,                               /* Compare double precision floats.  */
 923   CMP_MAX                               /* Max comparison type.  */
 924 };
 925
 926 /* Types of delay slot.  */
 927 enum delay_type
 928 {
 929   DELAY_NONE,                           /* No delay slot.  */
 930   DELAY_LOAD,                           /* Load from memory delay.  */
 931   DELAY_FCMP                            /* Delay after doing c.<xx>.{d,s}.  */
 932 };
 933
 934 /* Which processor to schedule for.  */
 935
 936 enum processor_type
 937 {
 938   PROCESSOR_DEFAULT,
 939   PROCESSOR_IQ2000,
 940   PROCESSOR_IQ10
 941 };
 942
 943 /* Recast the cpu class to be the cpu attribute.  */
 944 #define iq2000_cpu_attr ((enum attr_cpu) iq2000_tune)
 945
 946 /* Functions to change what output section we are using.  */
 947 extern void             rdata_section (void);
 948 extern void             sdata_section (void);
 949 extern void             sbss_section  (void);
 950
 951 #define BITMASK_UPPER16 ((unsigned long) 0xffff << 16)  /* 0xffff0000 */
 952 #define BITMASK_LOWER16 ((unsigned long) 0xffff)        /* 0x0000ffff */
 953
 954 \f
 955 #define GENERATE_BRANCHLIKELY  (ISA_HAS_BRANCHLIKELY)
 956
 957 /* Macros to decide whether certain features are available or not,
 958    depending on the instruction set architecture level.  */
 959
 960 #define BRANCH_LIKELY_P()       GENERATE_BRANCHLIKELY
 961
 962 /* ISA has branch likely instructions.  */
 963 #define ISA_HAS_BRANCHLIKELY    (iq2000_isa == 1)
 964
 965 \f
 966 #undef ASM_SPEC
 967 #define ASM_SPEC "%{march=iq2000: -m2000} %{march=iq10: -m10} %{!march=*: -m2000}"
 968
 969 \f
 970 /* The mapping from gcc register number to DWARF 2 CFA column number.
 971    This mapping does not allow for tracking register 0, since
 972    register 0 is fixed.  */
 973 #define DWARF_FRAME_REGNUM(REG)                         \
 974   (REG == GP_REG_FIRST + 31 ? DWARF_FRAME_RETURN_COLUMN : REG)
 975
 976 /* The DWARF 2 CFA column which tracks the return address.  */
 977 #define DWARF_FRAME_RETURN_COLUMN ( GP_REG_FIRST + 26)
 978
 979 /* Describe how we implement __builtin_eh_return.  */
 980 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + GP_ARG_FIRST : INVALID_REGNUM)
 981
 982 /* The EH_RETURN_STACKADJ_RTX macro returns RTL which describes the
 983    location used to store the amount to adjust the stack.  This is
 984    usually a register that is available from end of the function's body
 985    to the end of the epilogue. Thus, this cannot be a register used as a
 986    temporary by the epilogue.
 987
 988    This must be an integer register.  */
 989 #define EH_RETURN_STACKADJ_REGNO        3
 990 #define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, EH_RETURN_STACKADJ_REGNO)
 991
 992 /* The EH_RETURN_HANDLER_RTX macro returns RTL which describes the
 993    location used to store the address the processor should jump to
 994    catch exception.  This is usually a registers that is available from
 995    end of the function's body to the end of the epilogue. Thus, this
 996    cannot be a register used as a temporary by the epilogue.
 997
 998    This must be an address register.  */
 999 #define EH_RETURN_HANDLER_REGNO         26
1000 #define EH_RETURN_HANDLER_RTX           \
1001         gen_rtx_REG (Pmode, EH_RETURN_HANDLER_REGNO)
1002
1003 /* Offsets recorded in opcodes are a multiple of this alignment factor.  */
1004 #define DWARF_CIE_DATA_ALIGNMENT 4
1005
1006 /* For IQ2000, width of a floating point register.  */
1007 #define UNITS_PER_FPREG 4
1008
1009 /* Force right-alignment for small varargs in 32 bit little_endian mode */
1010
1011 #define PAD_VARARGS_DOWN !BYTES_BIG_ENDIAN
1012
1013 /* Internal macros to classify a register number as to whether it's a
1014    general purpose register, a floating point register, a
1015    multiply/divide register, or a status register.  */
1016
1017 #define GP_REG_FIRST 0
1018 #define GP_REG_LAST  31
1019 #define GP_REG_NUM   (GP_REG_LAST - GP_REG_FIRST + 1)
1020
1021 #define RAP_REG_NUM   32
1022 #define AT_REGNUM       (GP_REG_FIRST + 1)
1023
1024 #define GP_REG_P(REGNO) \
1025   ((unsigned int) ((int) (REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1026
1027 /* IQ2000 registers used in prologue/epilogue code when the stack frame
1028    is larger than 32K bytes.  These registers must come from the
1029    scratch register set, and not used for passing and returning
1030    arguments and any other information used in the calling sequence.  */
1031
1032 #define IQ2000_TEMP1_REGNUM (GP_REG_FIRST + 12)
1033 #define IQ2000_TEMP2_REGNUM (GP_REG_FIRST + 13)
1034
1035 /* This macro is used later on in the file.  */
1036 #define GR_REG_CLASS_P(CLASS)                                           \
1037   ((CLASS) == GR_REGS)
1038
1039 #define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1040 #define SMALL_INT_UNSIGNED(X) ((unsigned HOST_WIDE_INT) (INTVAL (X)) < 0x10000)
1041
1042 /* Certain machines have the property that some registers cannot be
1043    copied to some other registers without using memory.  Define this
1044    macro on those machines to be a C expression that is nonzero if
1045    objects of mode MODE in registers of CLASS1 can only be copied to
1046    registers of class CLASS2 by storing a register of CLASS1 into
1047    memory and loading that memory location into a register of CLASS2.
1048
1049    Do not define this macro if its value would always be zero.  */
1050
1051 /* Return the maximum number of consecutive registers
1052    needed to represent mode MODE in a register of class CLASS.  */
1053
1054 #define CLASS_UNITS(mode, size)                                         \
1055   ((GET_MODE_SIZE (mode) + (size) - 1) / (size))
1056
1057 /* If defined, gives a class of registers that cannot be used as the
1058    operand of a SUBREG that changes the mode of the object illegally.  */
1059
1060 #define CLASS_CANNOT_CHANGE_MODE 0
1061
1062 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE.  */
1063
1064 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
1065   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
1066
1067 /* Make sure 4 words are always allocated on the stack.  */
1068
1069 #ifndef STACK_ARGS_ADJUST
1070 #define STACK_ARGS_ADJUST(SIZE)                                         \
1071   {                                                                     \
1072     if (SIZE.constant < 4 * UNITS_PER_WORD)                             \
1073       SIZE.constant = 4 * UNITS_PER_WORD;                               \
1074   }
1075 #endif
1076
1077 \f
1078 /* Symbolic macros for the registers used to return integer and floating
1079    point values.  */
1080
1081 #define GP_RETURN (GP_REG_FIRST + 2)
1082
1083 /* Symbolic macros for the first/last argument registers.  */
1084
1085 #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1086 #define GP_ARG_LAST  (GP_REG_FIRST + 11)
1087
1088 #define MAX_ARGS_IN_REGISTERS   8
1089
1090 \f
1091 /* Tell prologue and epilogue if register REGNO should be saved / restored.  */
1092
1093 #define MUST_SAVE_REGISTER(regno) \
1094  ((regs_ever_live[regno] && !call_used_regs[regno])                     \
1095   || (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)       \
1096   || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
1097
1098 /* ALIGN FRAMES on double word boundaries */
1099 #ifndef IQ2000_STACK_ALIGN
1100 #define IQ2000_STACK_ALIGN(LOC) (((LOC) + 7) & ~7)
1101 #endif
1102
1103 \f
1104 /* These assume that REGNO is a hard or pseudo reg number.
1105    They give nonzero only if REGNO is a hard reg of the suitable class
1106    or a pseudo reg currently allocated to a suitable hard reg.
1107    These definitions are NOT overridden anywhere.  */
1108
1109 #define BASE_REG_P(regno, mode)                                 \
1110   (GP_REG_P (regno))
1111
1112 #define GP_REG_OR_PSEUDO_STRICT_P(regno, mode)                              \
1113   BASE_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno], \
1114              (mode))
1115
1116 #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno, mode) \
1117   (((regno) >= FIRST_PSEUDO_REGISTER) || (BASE_REG_P ((regno), (mode))))
1118
1119 #define REGNO_MODE_OK_FOR_BASE_P(regno, mode) \
1120   GP_REG_OR_PSEUDO_STRICT_P ((regno), (mode))
1121
1122 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1123    and check its validity for a certain class.
1124    We have two alternate definitions for each of them.
1125    The usual definition accepts all pseudo regs; the other rejects them all.
1126    The symbol REG_OK_STRICT causes the latter definition to be used.
1127
1128    Most source files want to accept pseudo regs in the hope that
1129    they will get allocated to the class that the insn wants them to be in.
1130    Some source files that are used after register allocation
1131    need to be strict.  */
1132
1133 #ifndef REG_OK_STRICT
1134 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
1135   iq2000_reg_mode_ok_for_base_p (X, MODE, 0)
1136 #else
1137 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
1138   iq2000_reg_mode_ok_for_base_p (X, MODE, 1)
1139 #endif
1140
1141 #if 1
1142 #define GO_PRINTF(x)    fprintf (stderr, (x))
1143 #define GO_PRINTF2(x,y) fprintf (stderr, (x), (y))
1144 #define GO_DEBUG_RTX(x) debug_rtx (x)
1145
1146 #else
1147 #define GO_PRINTF(x)
1148 #define GO_PRINTF2(x,y)
1149 #define GO_DEBUG_RTX(x)
1150 #endif
1151
1152 /* If defined, modifies the length assigned to instruction INSN as a
1153    function of the context in which it is used.  LENGTH is an lvalue
1154    that contains the initially computed length of the insn and should
1155    be updated with the correct length of the insn.  */
1156 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1157   ((LENGTH) = iq2000_adjust_insn_length ((INSN), (LENGTH)))
1158
1159 \f
1160 /* A list of predicates that do special things with modes, and so
1161    should not elicit warnings for VOIDmode match_operand.  */
1162
1163 #define SPECIAL_MODE_PREDICATES \
1164   "pc_or_label_operand",
1165
1166 \f
1167
1168
1169 /* How to tell the debugger about changes of source files.  */
1170
1171 #ifndef SET_FILE_NUMBER
1172 #define SET_FILE_NUMBER() ++ num_source_filenames
1173 #endif
1174
1175 /* This is how to output a note the debugger telling it the line number
1176    to which the following sequence of instructions corresponds.  */
1177
1178 #ifndef LABEL_AFTER_LOC
1179 #define LABEL_AFTER_LOC(STREAM)
1180 #endif
1181
1182 \f
1183 /* Default to -G 8 */
1184 #ifndef IQ2000_DEFAULT_GVALUE
1185 #define IQ2000_DEFAULT_GVALUE 8
1186 #endif
1187
1188 #define SDATA_SECTION_ASM_OP    "\t.sdata"      /* Small data.  */
1189
1190 \f
1191 /* See iq2000_expand_prologue's use of loadgp for when this should be
1192    true.  */
1193
1194 #define DONT_ACCESS_GBLS_AFTER_EPILOGUE 0
1195 \f
1196 /* List of all IQ2000 punctuation characters used by print_operand.  */
1197 extern char iq2000_print_operand_punct[256];
1198
1199 /* The target cpu for optimization and scheduling.  */
1200 extern enum processor_type iq2000_tune;
1201
1202 /* Which instruction set architecture to use.  */
1203 extern int iq2000_isa;
1204
1205 /* Cached operands, and operator to compare for use in set/branch/trap
1206    on condition codes.  */
1207 extern rtx branch_cmp[2];
1208
1209 /* What type of branch to use.  */
1210 extern enum cmp_type branch_type;
1211
1212 /* Strings to hold which cpu and instruction set architecture to use.  */
1213 extern const char * iq2000_cpu_string;    /* For -mcpu=<xxx>.  */
1214 extern const char * iq2000_arch_string;   /* For -march=<xxx>.  */
1215
1216
1217
1218 enum iq2000_builtins
1219 {
1220   IQ2000_BUILTIN_ADO16,
1221   IQ2000_BUILTIN_CFC0,
1222   IQ2000_BUILTIN_CFC1,
1223   IQ2000_BUILTIN_CFC2,
1224   IQ2000_BUILTIN_CFC3,
1225   IQ2000_BUILTIN_CHKHDR,
1226   IQ2000_BUILTIN_CTC0,
1227   IQ2000_BUILTIN_CTC1,
1228   IQ2000_BUILTIN_CTC2,
1229   IQ2000_BUILTIN_CTC3,
1230   IQ2000_BUILTIN_LU,
1231   IQ2000_BUILTIN_LUC32L,
1232   IQ2000_BUILTIN_LUC64,
1233   IQ2000_BUILTIN_LUC64L,
1234   IQ2000_BUILTIN_LUK,
1235   IQ2000_BUILTIN_LULCK,
1236   IQ2000_BUILTIN_LUM32,
1237   IQ2000_BUILTIN_LUM32L,
1238   IQ2000_BUILTIN_LUM64,
1239   IQ2000_BUILTIN_LUM64L,
1240   IQ2000_BUILTIN_LUR,
1241   IQ2000_BUILTIN_LURL,
1242   IQ2000_BUILTIN_MFC0,
1243   IQ2000_BUILTIN_MFC1,
1244   IQ2000_BUILTIN_MFC2,
1245   IQ2000_BUILTIN_MFC3,
1246   IQ2000_BUILTIN_MRGB,
1247   IQ2000_BUILTIN_MTC0,
1248   IQ2000_BUILTIN_MTC1,
1249   IQ2000_BUILTIN_MTC2,
1250   IQ2000_BUILTIN_MTC3,
1251   IQ2000_BUILTIN_PKRL,
1252   IQ2000_BUILTIN_RAM,
1253   IQ2000_BUILTIN_RB,
1254   IQ2000_BUILTIN_RX,
1255   IQ2000_BUILTIN_SRRD,
1256   IQ2000_BUILTIN_SRRDL,
1257   IQ2000_BUILTIN_SRULC,
1258   IQ2000_BUILTIN_SRULCK,
1259   IQ2000_BUILTIN_SRWR,
1260   IQ2000_BUILTIN_SRWRU,
1261   IQ2000_BUILTIN_TRAPQF,
1262   IQ2000_BUILTIN_TRAPQFL,
1263   IQ2000_BUILTIN_TRAPQN,
1264   IQ2000_BUILTIN_TRAPQNE,
1265   IQ2000_BUILTIN_TRAPRE,
1266   IQ2000_BUILTIN_TRAPREL,
1267   IQ2000_BUILTIN_WB,
1268   IQ2000_BUILTIN_WBR,
1269   IQ2000_BUILTIN_WBU,
1270   IQ2000_BUILTIN_WX,
1271   IQ2000_BUILTIN_SYSCALL
1272 };