boehm-gc/include/private/gc_locks.h

   1 /*
   2  * Copyright 1988, 1989 Hans-J. Boehm, Alan J. Demers
   3  * Copyright (c) 1991-1994 by Xerox Corporation.  All rights reserved.
   4  * Copyright (c) 1996-1999 by Silicon Graphics.  All rights reserved.
   5  * Copyright (c) 1999 by Hewlett-Packard Company. All rights reserved.
   6  *
   7  *
   8  * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
   9  * OR IMPLIED.  ANY USE IS AT YOUR OWN RISK.
  10  *
  11  * Permission is hereby granted to use or copy this program
  12  * for any purpose,  provided the above notices are retained on all copies.
  13  * Permission to modify the code and to distribute modified code is granted,
  14  * provided the above notices are retained, and a notice that the code was
  15  * modified is included with the above copyright notice.
  16  */
  17
  18 #ifndef GC_LOCKS_H
  19 #define GC_LOCKS_H
  20
  21 /*
  22  * Mutual exclusion between allocator/collector routines.
  23  * Needed if there is more than one allocator thread.
  24  * FASTLOCK() is assumed to try to acquire the lock in a cheap and
  25  * dirty way that is acceptable for a few instructions, e.g. by
  26  * inhibiting preemption.  This is assumed to have succeeded only
  27  * if a subsequent call to FASTLOCK_SUCCEEDED() returns TRUE.
  28  * FASTUNLOCK() is called whether or not FASTLOCK_SUCCEEDED().
  29  * If signals cannot be tolerated with the FASTLOCK held, then
  30  * FASTLOCK should disable signals.  The code executed under
  31  * FASTLOCK is otherwise immune to interruption, provided it is
  32  * not restarted.
  33  * DCL_LOCK_STATE declares any local variables needed by LOCK and UNLOCK
  34  * and/or DISABLE_SIGNALS and ENABLE_SIGNALS and/or FASTLOCK.
  35  * (There is currently no equivalent for FASTLOCK.)
  36  *
  37  * In the PARALLEL_MARK case, we also need to define a number of
  38  * other inline finctions here:
  39  *   GC_bool GC_compare_and_exchange( volatile GC_word *addr,
  40  *                                    GC_word old, GC_word new )
  41  *   GC_word GC_atomic_add( volatile GC_word *addr, GC_word how_much )
  42  *   void GC_memory_barrier( )
  43  *
  44  */
  45 # ifdef THREADS
  46    void GC_noop1 GC_PROTO((word));
  47 #  ifdef PCR_OBSOLETE   /* Faster, but broken with multiple lwp's       */
  48 #    include  "th/PCR_Th.h"
  49 #    include  "th/PCR_ThCrSec.h"
  50      extern struct PCR_Th_MLRep GC_allocate_ml;
  51 #    define DCL_LOCK_STATE  PCR_sigset_t GC_old_sig_mask
  52 #    define LOCK() PCR_Th_ML_Acquire(&GC_allocate_ml)
  53 #    define UNLOCK() PCR_Th_ML_Release(&GC_allocate_ml)
  54 #    define UNLOCK() PCR_Th_ML_Release(&GC_allocate_ml)
  55 #    define FASTLOCK() PCR_ThCrSec_EnterSys()
  56      /* Here we cheat (a lot): */
  57 #        define FASTLOCK_SUCCEEDED() (*(int *)(&GC_allocate_ml) == 0)
  58                 /* TRUE if nobody currently holds the lock */
  59 #    define FASTUNLOCK() PCR_ThCrSec_ExitSys()
  60 #  endif
  61 #  ifdef PCR
  62 #    include <base/PCR_Base.h>
  63 #    include <th/PCR_Th.h>
  64      extern PCR_Th_ML GC_allocate_ml;
  65 #    define DCL_LOCK_STATE \
  66          PCR_ERes GC_fastLockRes; PCR_sigset_t GC_old_sig_mask
  67 #    define LOCK() PCR_Th_ML_Acquire(&GC_allocate_ml)
  68 #    define UNLOCK() PCR_Th_ML_Release(&GC_allocate_ml)
  69 #    define FASTLOCK() (GC_fastLockRes = PCR_Th_ML_Try(&GC_allocate_ml))
  70 #    define FASTLOCK_SUCCEEDED() (GC_fastLockRes == PCR_ERes_okay)
  71 #    define FASTUNLOCK()  {\
  72         if( FASTLOCK_SUCCEEDED() ) PCR_Th_ML_Release(&GC_allocate_ml); }
  73 #  endif
  74 #  ifdef SRC_M3
  75      extern GC_word RT0u__inCritical;
  76 #    define LOCK() RT0u__inCritical++
  77 #    define UNLOCK() RT0u__inCritical--
  78 #  endif
  79 #  ifdef GC_SOLARIS_THREADS
  80 #    include <thread.h>
  81 #    include <signal.h>
  82      extern mutex_t GC_allocate_ml;
  83 #    define LOCK() mutex_lock(&GC_allocate_ml);
  84 #    define UNLOCK() mutex_unlock(&GC_allocate_ml);
  85 #  endif
  86
  87 /* Try to define GC_TEST_AND_SET and a matching GC_CLEAR for spin lock  */
  88 /* acquisition and release.  We need this for correct operation of the  */
  89 /* incremental GC.                                                      */
  90 #  ifdef __GNUC__
  91 #    if defined(I386)
  92        inline static int GC_test_and_set(volatile unsigned int *addr) {
  93           int oldval;
  94           /* Note: the "xchg" instruction does not need a "lock" prefix */
  95           __asm__ __volatile__("xchgl %0, %1"
  96                 : "=r"(oldval), "=m"(*(addr))
  97                 : "0"(1), "m"(*(addr)) : "memory");
  98           return oldval;
  99        }
 100 #      define GC_TEST_AND_SET_DEFINED
 101 #    endif
 102 #    if defined(IA64)
 103 #     include <ia64intrin.h>
 104        inline static int GC_test_and_set(volatile unsigned int *addr) {
 105           return __sync_lock_test_and_set(addr, 1);
 106        }
 107 #      define GC_TEST_AND_SET_DEFINED
 108        inline static void GC_clear(volatile unsigned int *addr) {
 109           *addr = 0;
 110        }
 111 #      define GC_CLEAR_DEFINED
 112 #    endif
 113 #    ifdef SPARC
 114        inline static int GC_test_and_set(volatile unsigned int *addr) {
 115          int oldval;
 116
 117          __asm__ __volatile__("ldstub %1,%0"
 118          : "=r"(oldval), "=m"(*addr)
 119          : "m"(*addr) : "memory");
 120          return oldval;
 121        }
 122 #      define GC_TEST_AND_SET_DEFINED
 123 #    endif
 124 #    ifdef M68K
 125        /* Contributed by Tony Mantler.  I'm not sure how well it was    */
 126        /* tested.                                                       */
 127        inline static int GC_test_and_set(volatile unsigned int *addr) {
 128           char oldval; /* this must be no longer than 8 bits */
 129
 130           /* The return value is semi-phony. */
 131           /* 'tas' sets bit 7 while the return */
 132           /* value pretends bit 0 was set */
 133           __asm__ __volatile__(
 134                  "tas %1@; sne %0; negb %0"
 135                  : "=d" (oldval)
 136                  : "a" (addr) : "memory");
 137           return oldval;
 138        }
 139 #      define GC_TEST_AND_SET_DEFINED
 140 #    endif
 141 #    if defined(POWERPC)
 142         inline static int GC_test_and_set(volatile unsigned int *addr) {
 143           int oldval;
 144           int temp = 1; /* locked value */
 145
 146           __asm__ __volatile__(
 147                "1:\tlwarx %0,0,%3\n"   /* load and reserve               */
 148                "\tcmpwi %0, 0\n"       /* if load is                     */
 149                "\tbne 2f\n"            /*   non-zero, return already set */
 150                "\tstwcx. %2,0,%1\n"    /* else store conditional         */
 151                "\tbne- 1b\n"           /* retry if lost reservation      */
 152                "\tsync\n"              /* import barrier                 */
 153                "2:\t\n"                /* oldval is zero if we set       */
 154               : "=&r"(oldval), "=p"(addr)
 155               : "r"(temp), "1"(addr)
 156               : "cr0","memory");
 157           return oldval;
 158         }
 159 #       define GC_TEST_AND_SET_DEFINED
 160         inline static void GC_clear(volatile unsigned int *addr) {
 161           __asm__ __volatile__("eieio" : : : "memory");
 162           *(addr) = 0;
 163         }
 164 #       define GC_CLEAR_DEFINED
 165 #    endif
 166 #    if defined(ALPHA)
 167         inline static int GC_test_and_set(volatile unsigned int * addr)
 168         {
 169           unsigned long oldvalue;
 170           unsigned long temp;
 171
 172           __asm__ __volatile__(
 173                              "1:     ldl_l %0,%1\n"
 174                              "       and %0,%3,%2\n"
 175                              "       bne %2,2f\n"
 176                              "       xor %0,%3,%0\n"
 177                              "       stl_c %0,%1\n"
 178 #       ifdef __ELF__
 179                              "       beq %0,3f\n"
 180 #       else
 181                              "       beq %0,1b\n"
 182 #       endif
 183                              "       mb\n"
 184                              "2:\n"
 185 #       ifdef __ELF__
 186                              ".section .text2,\"ax\"\n"
 187                              "3:     br 1b\n"
 188                              ".previous"
 189 #       endif
 190                              :"=&r" (temp), "=m" (*addr), "=&r" (oldvalue)
 191                              :"Ir" (1), "m" (*addr)
 192                              :"memory");
 193
 194           return oldvalue;
 195         }
 196 #       define GC_TEST_AND_SET_DEFINED
 197         inline static void GC_clear(volatile unsigned int *addr) {
 198           __asm__ __volatile__("mb" : : : "memory");
 199           *(addr) = 0;
 200         }
 201 #       define GC_CLEAR_DEFINED
 202 #    endif /* ALPHA */
 203 #    ifdef ARM32
 204         inline static int GC_test_and_set(volatile unsigned int *addr) {
 205           int oldval;
 206           /* SWP on ARM is very similar to XCHG on x86.  Doesn't lock the
 207            * bus because there are no SMP ARM machines.  If/when there are,
 208            * this code will likely need to be updated. */
 209           /* See linuxthreads/sysdeps/arm/pt-machine.h in glibc-2.1 */
 210           __asm__ __volatile__("swp %0, %1, [%2]"
 211                              : "=r"(oldval)
 212                              : "r"(1), "r"(addr)
 213                              : "memory");
 214           return oldval;
 215         }
 216 #       define GC_TEST_AND_SET_DEFINED
 217 #    endif /* ARM32 */
 218 #    ifdef S390
 219        inline static int GC_test_and_set(volatile unsigned int *addr) {
 220          int ret;
 221          __asm__ __volatile__ (
 222           "     l     %0,0(%2)\n"
 223           "0:   cs    %0,%1,0(%2)\n"
 224           "     jl    0b"
 225           : "=&d" (ret)
 226           : "d" (1), "a" (addr)
 227           : "cc", "memory");
 228          return ret;
 229        }
 230 #    endif
 231 #  endif /* __GNUC__ */
 232 #  if (defined(ALPHA) && !defined(__GNUC__))
 233 #    ifndef OSF1
 234         --> We currently assume that if gcc is not used, we are
 235         --> running under Tru64.
 236 #    endif
 237 #    include <machine/builtins.h>
 238 #    include <c_asm.h>
 239 #    define GC_test_and_set(addr) __ATOMIC_EXCH_LONG(addr, 1)
 240 #    define GC_TEST_AND_SET_DEFINED
 241 #    define GC_clear(addr) { asm("mb"); *(volatile unsigned *)addr = 0; }
 242 #    define GC_CLEAR_DEFINED
 243 #  endif
 244 #  if defined(MSWIN32)
 245 #    define GC_test_and_set(addr) InterlockedExchange((LPLONG)addr,1)
 246 #    define GC_TEST_AND_SET_DEFINED
 247 #  endif
 248 #  ifdef MIPS
 249 #    ifdef LINUX
 250 #      include <sys/tas.h>
 251 #      define GC_test_and_set(addr) _test_and_set((int *) addr,1)
 252 #      define GC_TEST_AND_SET_DEFINED
 253 #    elif __mips < 3 || !(defined (_ABIN32) || defined(_ABI64)) \
 254         || !defined(_COMPILER_VERSION) || _COMPILER_VERSION < 700
 255 #        ifdef __GNUC__
 256 #          define GC_test_and_set(addr) _test_and_set((void *)addr,1)
 257 #        else
 258 #          define GC_test_and_set(addr) test_and_set((void *)addr,1)
 259 #        endif
 260 #    else
 261 #        define GC_test_and_set(addr) __test_and_set32((void *)addr,1)
 262 #        define GC_clear(addr) __lock_release(addr);
 263 #        define GC_CLEAR_DEFINED
 264 #    endif
 265 #    define GC_TEST_AND_SET_DEFINED
 266 #  endif /* MIPS */
 267 #  if defined(_AIX)
 268 #    include <sys/atomic_op.h>
 269 #    if (defined(_POWER) || defined(_POWERPC))
 270 #      if defined(__GNUC__)
 271          inline static void GC_memsync() {
 272            __asm__ __volatile__ ("sync" : : : "memory");
 273          }
 274 #      else
 275 #        ifndef inline
 276 #          define inline __inline
 277 #        endif
 278 #        pragma mc_func GC_memsync { \
 279            "7c0004ac" /* sync (same opcode used for dcs)*/ \
 280          }
 281 #      endif
 282 #    else
 283 #    error dont know how to memsync
 284 #    endif
 285      inline static int GC_test_and_set(volatile unsigned int * addr) {
 286           int oldvalue = 0;
 287           if (compare_and_swap((void *)addr, &oldvalue, 1)) {
 288             GC_memsync();
 289             return 0;
 290           } else return 1;
 291      }
 292 #    define GC_TEST_AND_SET_DEFINED
 293      inline static void GC_clear(volatile unsigned int *addr) {
 294           GC_memsync();
 295           *(addr) = 0;
 296      }
 297 #    define GC_CLEAR_DEFINED
 298
 299 #  endif
 300 #  if 0 /* defined(HP_PA) */
 301      /* The official recommendation seems to be to not use ldcw from    */
 302      /* user mode.  Since multithreaded incremental collection doesn't  */
 303      /* work anyway on HP_PA, this shouldn't be a major loss.           */
 304
 305      /* "set" means 0 and "clear" means 1 here.         */
 306 #    define GC_test_and_set(addr) !GC_test_and_clear(addr);
 307 #    define GC_TEST_AND_SET_DEFINED
 308 #    define GC_clear(addr) GC_noop1((word)(addr)); *(volatile unsigned int *)addr = 1;
 309         /* The above needs a memory barrier! */
 310 #    define GC_CLEAR_DEFINED
 311 #  endif
 312 #  if defined(GC_TEST_AND_SET_DEFINED) && !defined(GC_CLEAR_DEFINED)
 313 #    ifdef __GNUC__
 314        inline static void GC_clear(volatile unsigned int *addr) {
 315          /* Try to discourage gcc from moving anything past this. */
 316          __asm__ __volatile__(" " : : : "memory");
 317          *(addr) = 0;
 318        }
 319 #    else
 320             /* The function call in the following should prevent the    */
 321             /* compiler from moving assignments to below the UNLOCK.    */
 322 #      define GC_clear(addr) GC_noop1((word)(addr)); \
 323                              *((volatile unsigned int *)(addr)) = 0;
 324 #    endif
 325 #    define GC_CLEAR_DEFINED
 326 #  endif /* !GC_CLEAR_DEFINED */
 327
 328 #  if !defined(GC_TEST_AND_SET_DEFINED)
 329 #    define USE_PTHREAD_LOCKS
 330 #  endif
 331
 332 #  if defined(GC_PTHREADS) && !defined(GC_SOLARIS_THREADS) \
 333       && !defined(GC_IRIX_THREADS) && !defined(GC_WIN32_THREADS)
 334 #    define NO_THREAD (pthread_t)(-1)
 335 #    include <pthread.h>
 336 #    if defined(PARALLEL_MARK)
 337       /* We need compare-and-swap to update mark bits, where it's       */
 338       /* performance critical.  If USE_MARK_BYTES is defined, it is     */
 339       /* no longer needed for this purpose.  However we use it in       */
 340       /* either case to implement atomic fetch-and-add, though that's   */
 341       /* less performance critical, and could perhaps be done with      */
 342       /* a lock.                                                        */
 343 #     if defined(GENERIC_COMPARE_AND_SWAP)
 344         /* Probably not useful, except for debugging.   */
 345         /* We do use GENERIC_COMPARE_AND_SWAP on PA_RISC, but we        */
 346         /* minimize its use.                                            */
 347         extern pthread_mutex_t GC_compare_and_swap_lock;
 348
 349         /* Note that if GC_word updates are not atomic, a concurrent    */
 350         /* reader should acquire GC_compare_and_swap_lock.  On          */
 351         /* currently supported platforms, such updates are atomic.      */
 352         extern GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 353                                                GC_word old, GC_word new_val);
 354 #     endif /* GENERIC_COMPARE_AND_SWAP */
 355 #     if defined(I386)
 356 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 357          /* Returns TRUE if the comparison succeeded. */
 358          inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 359                                                        GC_word old,
 360                                                        GC_word new_val)
 361          {
 362            char result;
 363            __asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1"
 364                 : "+m"(*(addr)), "=r"(result)
 365                 : "r" (new_val), "a"(old) : "memory");
 366            return (GC_bool) result;
 367          }
 368 #      endif /* !GENERIC_COMPARE_AND_SWAP */
 369        inline static void GC_memory_barrier()
 370        {
 371          /* We believe the processor ensures at least processor */
 372          /* consistent ordering.  Thus a compiler barrier       */
 373          /* should suffice.                                     */
 374          __asm__ __volatile__("" : : : "memory");
 375        }
 376 #     endif /* I386 */
 377
 378 #     if defined(POWERPC)
 379 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 380         /* Returns TRUE if the comparison succeeded. */
 381         inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 382             GC_word old, GC_word new_val)
 383         {
 384             int result, dummy;
 385             __asm__ __volatile__(
 386                 "1:\tlwarx %0,0,%5\n"
 387                   "\tcmpw %0,%4\n"
 388                   "\tbne  2f\n"
 389                   "\tstwcx. %3,0,%2\n"
 390                   "\tbne- 1b\n"
 391                   "\tsync\n"
 392                   "\tli %1, 1\n"
 393                   "\tb 3f\n"
 394                 "2:\tli %1, 0\n"
 395                 "3:\t\n"
 396                 :  "=&r" (dummy), "=r" (result), "=p" (addr)
 397                 :  "r" (new_val), "r" (old), "2"(addr)
 398                 : "cr0","memory");
 399             return (GC_bool) result;
 400         }
 401 #      endif /* !GENERIC_COMPARE_AND_SWAP */
 402         inline static void GC_memory_barrier()
 403         {
 404             __asm__ __volatile__("sync" : : : "memory");
 405         }
 406 #     endif /* POWERPC */
 407
 408 #     if defined(IA64)
 409 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 410          inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 411                                                        GC_word old,
 412                                                        GC_word new_val)
 413          {
 414            return __sync_bool_compare_and_swap (addr, old, new_val);
 415          }
 416 #      endif /* !GENERIC_COMPARE_AND_SWAP */
 417 #      if 0
 418         /* Shouldn't be needed; we use volatile stores instead. */
 419         inline static void GC_memory_barrier()
 420         {
 421           __sync_synchronize ();
 422         }
 423 #      endif /* 0 */
 424 #     endif /* IA64 */
 425 #     if defined(ALPHA)
 426 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 427 #        if defined(__GNUC__)
 428            inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 429                                                          GC_word old, GC_word new_val)
 430            {
 431              unsigned long was_equal;
 432              unsigned long temp;
 433
 434              __asm__ __volatile__(
 435                              "1:     ldq_l %0,%1\n"
 436                              "       cmpeq %0,%4,%2\n"
 437                              "       mov %3,%0\n"
 438                              "       beq %2,2f\n"
 439                              "       stq_c %0,%1\n"
 440                              "       beq %0,1b\n"
 441                              "2:\n"
 442                              "       mb\n"
 443                              :"=&r" (temp), "=m" (*addr), "=&r" (was_equal)
 444                              : "r" (new_val), "Ir" (old)
 445                              :"memory");
 446              return was_equal;
 447            }
 448 #        else /* !__GNUC__ */
 449            inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 450                                                          GC_word old, GC_word new_val)
 451           {
 452             return __CMP_STORE_QUAD(addr, old, new_val, addr);
 453           }
 454 #        endif /* !__GNUC__ */
 455 #      endif /* !GENERIC_COMPARE_AND_SWAP */
 456 #      ifdef __GNUC__
 457          inline static void GC_memory_barrier()
 458          {
 459            __asm__ __volatile__("mb" : : : "memory");
 460          }
 461 #      else
 462 #        define GC_memory_barrier() asm("mb")
 463 #      endif /* !__GNUC__ */
 464 #     endif /* ALPHA */
 465 #     if defined(S390)
 466 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 467          inline static GC_bool GC_compare_and_exchange(volatile C_word *addr,
 468                                          GC_word old, GC_word new_val)
 469          {
 470            int retval;
 471            __asm__ __volatile__ (
 472 #            ifndef __s390x__
 473                "     cs  %1,%2,0(%3)\n"
 474 #            else
 475                "     csg %1,%2,0(%3)\n"
 476 #            endif
 477              "     ipm %0\n"
 478              "     srl %0,28\n"
 479              : "=&d" (retval), "+d" (old)
 480              : "d" (new_val), "a" (addr)
 481              : "cc", "memory");
 482            return retval == 0;
 483          }
 484 #      endif
 485 #     endif
 486 #     if !defined(GENERIC_COMPARE_AND_SWAP)
 487         /* Returns the original value of *addr. */
 488         inline static GC_word GC_atomic_add(volatile GC_word *addr,
 489                                             GC_word how_much)
 490         {
 491           GC_word old;
 492           do {
 493             old = *addr;
 494           } while (!GC_compare_and_exchange(addr, old, old+how_much));
 495           return old;
 496         }
 497 #     else /* GENERIC_COMPARE_AND_SWAP */
 498         /* So long as a GC_word can be atomically updated, it should    */
 499         /* be OK to read *addr without a lock.                          */
 500         extern GC_word GC_atomic_add(volatile GC_word *addr, GC_word how_much);
 501 #     endif /* GENERIC_COMPARE_AND_SWAP */
 502
 503 #    endif /* PARALLEL_MARK */
 504
 505 #    if !defined(THREAD_LOCAL_ALLOC) && !defined(USE_PTHREAD_LOCKS)
 506       /* In the THREAD_LOCAL_ALLOC case, the allocation lock tends to   */
 507       /* be held for long periods, if it is held at all.  Thus spinning */
 508       /* and sleeping for fixed periods are likely to result in         */
 509       /* significant wasted time.  We thus rely mostly on queued locks. */
 510 #     define USE_SPIN_LOCK
 511       extern volatile unsigned int GC_allocate_lock;
 512       extern void GC_lock(void);
 513         /* Allocation lock holder.  Only set if acquired by client through */
 514         /* GC_call_with_alloc_lock.                                        */
 515 #     ifdef GC_ASSERTIONS
 516 #        define LOCK() \
 517                 { if (GC_test_and_set(&GC_allocate_lock)) GC_lock(); \
 518                   SET_LOCK_HOLDER(); }
 519 #        define UNLOCK() \
 520                 { GC_ASSERT(I_HOLD_LOCK()); UNSET_LOCK_HOLDER(); \
 521                   GC_clear(&GC_allocate_lock); }
 522 #     else
 523 #        define LOCK() \
 524                 { if (GC_test_and_set(&GC_allocate_lock)) GC_lock(); }
 525 #        define UNLOCK() \
 526                 GC_clear(&GC_allocate_lock)
 527 #     endif /* !GC_ASSERTIONS */
 528 #     if 0
 529         /* Another alternative for OSF1 might be:               */
 530 #       include <sys/mman.h>
 531         extern msemaphore GC_allocate_semaphore;
 532 #       define LOCK() { if (msem_lock(&GC_allocate_semaphore, MSEM_IF_NOWAIT) \
 533                             != 0) GC_lock(); else GC_allocate_lock = 1; }
 534         /* The following is INCORRECT, since the memory model is too weak. */
 535         /* Is this true?  Presumably msem_unlock has the right semantics?  */
 536         /*              - HB                                               */
 537 #       define UNLOCK() { GC_allocate_lock = 0; \
 538                           msem_unlock(&GC_allocate_semaphore, 0); }
 539 #     endif /* 0 */
 540 #    else /* THREAD_LOCAL_ALLOC  || USE_PTHREAD_LOCKS */
 541 #      ifndef USE_PTHREAD_LOCKS
 542 #        define USE_PTHREAD_LOCKS
 543 #      endif
 544 #    endif /* THREAD_LOCAL_ALLOC */
 545 #   ifdef USE_PTHREAD_LOCKS
 546 #      include <pthread.h>
 547        extern pthread_mutex_t GC_allocate_ml;
 548 #      ifdef GC_ASSERTIONS
 549 #        define LOCK() \
 550                 { GC_lock(); \
 551                   SET_LOCK_HOLDER(); }
 552 #        define UNLOCK() \
 553                 { GC_ASSERT(I_HOLD_LOCK()); UNSET_LOCK_HOLDER(); \
 554                   pthread_mutex_unlock(&GC_allocate_ml); }
 555 #      else /* !GC_ASSERTIONS */
 556 #        if defined(NO_PTHREAD_TRYLOCK)
 557 #          define LOCK() GC_lock();
 558 #        else /* !defined(NO_PTHREAD_TRYLOCK) */
 559 #        define LOCK() \
 560            { if (0 != pthread_mutex_trylock(&GC_allocate_ml)) GC_lock(); }
 561 #        endif
 562 #        define UNLOCK() pthread_mutex_unlock(&GC_allocate_ml)
 563 #      endif /* !GC_ASSERTIONS */
 564 #   endif /* USE_PTHREAD_LOCKS */
 565 #   define SET_LOCK_HOLDER() GC_lock_holder = pthread_self()
 566 #   define UNSET_LOCK_HOLDER() GC_lock_holder = NO_THREAD
 567 #   define I_HOLD_LOCK() (pthread_equal(GC_lock_holder, pthread_self()))
 568     extern VOLATILE GC_bool GC_collecting;
 569 #   define ENTER_GC() GC_collecting = 1;
 570 #   define EXIT_GC() GC_collecting = 0;
 571     extern void GC_lock(void);
 572     extern pthread_t GC_lock_holder;
 573 #   ifdef GC_ASSERTIONS
 574       extern pthread_t GC_mark_lock_holder;
 575 #   endif
 576 #  endif /* GC_PTHREADS with linux_threads.c implementation */
 577 #  if defined(GC_IRIX_THREADS)
 578 #    include <pthread.h>
 579      /* This probably should never be included, but I can't test        */
 580      /* on Irix anymore.                                                */
 581 #    include <mutex.h>
 582
 583      extern volatile unsigned int GC_allocate_lock;
 584         /* This is not a mutex because mutexes that obey the (optional)         */
 585         /* POSIX scheduling rules are subject to convoys in high contention     */
 586         /* applications.  This is basically a spin lock.                        */
 587      extern pthread_t GC_lock_holder;
 588      extern void GC_lock(void);
 589         /* Allocation lock holder.  Only set if acquired by client through */
 590         /* GC_call_with_alloc_lock.                                        */
 591 #    define SET_LOCK_HOLDER() GC_lock_holder = pthread_self()
 592 #    define NO_THREAD (pthread_t)(-1)
 593 #    define UNSET_LOCK_HOLDER() GC_lock_holder = NO_THREAD
 594 #    define I_HOLD_LOCK() (pthread_equal(GC_lock_holder, pthread_self()))
 595 #    define LOCK() { if (GC_test_and_set(&GC_allocate_lock)) GC_lock(); }
 596 #    define UNLOCK() GC_clear(&GC_allocate_lock);
 597      extern VOLATILE GC_bool GC_collecting;
 598 #    define ENTER_GC() \
 599                 { \
 600                     GC_collecting = 1; \
 601                 }
 602 #    define EXIT_GC() GC_collecting = 0;
 603 #  endif /* GC_IRIX_THREADS */
 604 #  if defined(GC_WIN32_THREADS)
 605 #    if defined(GC_PTHREADS)
 606 #      include <pthread.h>
 607        extern pthread_mutex_t GC_allocate_ml;
 608 #      define LOCK()   pthread_mutex_lock(&GC_allocate_ml)
 609 #      define UNLOCK() pthread_mutex_unlock(&GC_allocate_ml)
 610 #    else
 611 #      include <windows.h>
 612        GC_API CRITICAL_SECTION GC_allocate_ml;
 613 #      define LOCK() EnterCriticalSection(&GC_allocate_ml);
 614 #      define UNLOCK() LeaveCriticalSection(&GC_allocate_ml);
 615 #    endif
 616 #  endif
 617 #  ifndef SET_LOCK_HOLDER
 618 #      define SET_LOCK_HOLDER()
 619 #      define UNSET_LOCK_HOLDER()
 620 #      define I_HOLD_LOCK() FALSE
 621                 /* Used on platforms were locks can be reacquired,      */
 622                 /* so it doesn't matter if we lie.                      */
 623 #  endif
 624 # else /* !THREADS */
 625 #    define LOCK()
 626 #    define UNLOCK()
 627 # endif /* !THREADS */
 628 # ifndef SET_LOCK_HOLDER
 629 #   define SET_LOCK_HOLDER()
 630 #   define UNSET_LOCK_HOLDER()
 631 #   define I_HOLD_LOCK() FALSE
 632                 /* Used on platforms were locks can be reacquired,      */
 633                 /* so it doesn't matter if we lie.                      */
 634 # endif
 635 # ifndef ENTER_GC
 636 #   define ENTER_GC()
 637 #   define EXIT_GC()
 638 # endif
 639
 640 # ifndef DCL_LOCK_STATE
 641 #   define DCL_LOCK_STATE
 642 # endif
 643 # ifndef FASTLOCK
 644 #   define FASTLOCK() LOCK()
 645 #   define FASTLOCK_SUCCEEDED() TRUE
 646 #   define FASTUNLOCK() UNLOCK()
 647 # endif
 648
 649 #endif /* GC_LOCKS_H */