1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2019 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
);
79 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
80 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
81 static rtx_insn
*compress_float_constant (rtx
, rtx
);
82 static rtx
get_subtarget (rtx
);
83 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
84 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
85 machine_mode
, tree
, alias_set_type
, bool, bool);
87 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
89 static int is_aligning_offset (const_tree
, const_tree
);
90 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
91 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
93 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
95 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
97 static rtx
const_vector_from_tree (tree
);
98 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
99 static tree
tree_expr_size (const_tree
);
100 static HOST_WIDE_INT
int_expr_size (tree
);
101 static void convert_mode_scalar (rtx
, rtx
, int);
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
109 init_expr_target (void)
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
120 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
126 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
127 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
128 PATTERN (insn
) = pat
;
130 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
131 mode
= (machine_mode
) ((int) mode
+ 1))
135 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
136 PUT_MODE (mem
, mode
);
137 PUT_MODE (mem1
, mode
);
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
142 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
143 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
144 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
147 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
150 set_mode_and_regno (reg
, mode
, regno
);
153 SET_DEST (pat
) = reg
;
154 if (recog (pat
, insn
, &num_clobbers
) >= 0)
155 direct_load
[(int) mode
] = 1;
157 SET_SRC (pat
) = mem1
;
158 SET_DEST (pat
) = reg
;
159 if (recog (pat
, insn
, &num_clobbers
) >= 0)
160 direct_load
[(int) mode
] = 1;
163 SET_DEST (pat
) = mem
;
164 if (recog (pat
, insn
, &num_clobbers
) >= 0)
165 direct_store
[(int) mode
] = 1;
168 SET_DEST (pat
) = mem1
;
169 if (recog (pat
, insn
, &num_clobbers
) >= 0)
170 direct_store
[(int) mode
] = 1;
174 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
176 opt_scalar_float_mode mode_iter
;
177 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
179 scalar_float_mode mode
= mode_iter
.require ();
180 scalar_float_mode srcmode
;
181 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
185 ic
= can_extend_p (mode
, srcmode
, 0);
186 if (ic
== CODE_FOR_nothing
)
189 PUT_MODE (mem
, srcmode
);
191 if (insn_operand_matches (ic
, 1, mem
))
192 float_extend_from_mem
[mode
][srcmode
] = true;
197 /* This is run at the start of compiling a function. */
202 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
212 convert_move (rtx to
, rtx from
, int unsignedp
)
214 machine_mode to_mode
= GET_MODE (to
);
215 machine_mode from_mode
= GET_MODE (from
);
217 gcc_assert (to_mode
!= BLKmode
);
218 gcc_assert (from_mode
!= BLKmode
);
220 /* If the source and destination are already the same, then there's
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
229 scalar_int_mode to_int_mode
;
230 if (GET_CODE (from
) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from
)
232 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
234 >= GET_MODE_PRECISION (to_int_mode
))
235 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
237 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
238 from_mode
= to_int_mode
;
241 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
243 if (to_mode
== from_mode
244 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
246 emit_move_insn (to
, from
);
250 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
252 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
253 GET_MODE_BITSIZE (to_mode
)));
255 if (VECTOR_MODE_P (to_mode
))
256 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
258 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
260 emit_move_insn (to
, from
);
264 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
266 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
267 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
271 convert_mode_scalar (to
, from
, unsignedp
);
274 /* Like convert_move, but deals only with scalar modes. */
277 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
281 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
282 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
283 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
287 gcc_assert (to_real
== from_real
);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
291 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
299 gcc_assert ((GET_MODE_PRECISION (from_mode
)
300 != GET_MODE_PRECISION (to_mode
))
301 || (DECIMAL_FLOAT_MODE_P (from_mode
)
302 != DECIMAL_FLOAT_MODE_P (to_mode
)));
304 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
305 /* Conversion between decimal float and binary float, same size. */
306 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
307 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
312 /* Try converting directly if the insn is supported. */
314 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
315 if (code
!= CODE_FOR_nothing
)
317 emit_unop_insn (code
, to
, from
,
318 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
322 /* Otherwise use a libcall. */
323 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall
);
329 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
331 insns
= get_insns ();
333 emit_libcall_block (insns
, to
, value
,
334 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
336 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
345 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
352 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
355 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
368 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
369 != CODE_FOR_nothing
);
371 if (full_mode
!= from_mode
)
372 from
= convert_to_mode (full_mode
, from
, unsignedp
);
373 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
377 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
382 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
383 enum insn_code icode
;
385 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
386 gcc_assert (icode
!= CODE_FOR_nothing
);
388 if (to_mode
== full_mode
)
390 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
394 new_from
= gen_reg_rtx (full_mode
);
395 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
397 /* else proceed to integer conversions below. */
398 from_mode
= full_mode
;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
411 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
412 expand_fixed_convert (to
, from
, 0, 0);
414 expand_fixed_convert (to
, from
, 0, 1);
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
422 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
429 scalar_mode lowpart_mode
;
430 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
432 /* Try converting directly if the insn is supported. */
433 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
441 from
= force_reg (from_mode
, from
);
442 emit_unop_insn (code
, to
, from
, equiv_code
);
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
447 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
448 != CODE_FOR_nothing
))
450 rtx word_to
= gen_reg_rtx (word_mode
);
453 if (reg_overlap_mentioned_p (to
, from
))
454 from
= force_reg (from_mode
, from
);
457 convert_move (word_to
, from
, unsignedp
);
458 emit_unop_insn (code
, to
, word_to
, equiv_code
);
462 /* No special multiword conversion insn; do it by hand. */
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
472 from
= force_reg (from_mode
, from
);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
476 lowpart_mode
= word_mode
;
478 lowpart_mode
= from_mode
;
480 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
482 lowpart
= gen_lowpart (lowpart_mode
, to
);
483 emit_move_insn (lowpart
, lowfrom
);
485 /* Compute the value to put in each remaining word. */
487 fill_value
= const0_rtx
;
489 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
490 LT
, lowfrom
, const0_rtx
,
491 lowpart_mode
, 0, -1);
493 /* Fill the remaining words. */
494 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
496 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
497 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
499 gcc_assert (subword
);
501 if (fill_value
!= subword
)
502 emit_move_insn (subword
, fill_value
);
505 insns
= get_insns ();
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
517 && ! MEM_VOLATILE_P (from
)
518 && direct_load
[(int) to_mode
]
519 && ! mode_dependent_address_p (XEXP (from
, 0),
520 MEM_ADDR_SPACE (from
)))
522 || GET_CODE (from
) == SUBREG
))
523 from
= force_reg (from_mode
, from
);
524 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
536 && ! MEM_VOLATILE_P (from
)
537 && direct_load
[(int) to_mode
]
538 && ! mode_dependent_address_p (XEXP (from
, 0),
539 MEM_ADDR_SPACE (from
)))
541 || GET_CODE (from
) == SUBREG
))
542 from
= force_reg (from_mode
, from
);
543 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
544 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
545 from
= copy_to_reg (from
);
546 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
553 /* Convert directly if that works. */
554 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
557 emit_unop_insn (code
, to
, from
, equiv_code
);
562 scalar_mode intermediate
;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter
;
568 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
570 scalar_mode intermediate
= intermediate_iter
.require ();
571 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
573 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
576 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
577 != CODE_FOR_nothing
))
579 convert_move (to
, convert_to_mode (intermediate
, from
,
580 unsignedp
), unsignedp
);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount
= (GET_MODE_PRECISION (to_mode
)
588 - GET_MODE_PRECISION (from_mode
));
589 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
590 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
592 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
595 emit_move_insn (to
, tmp
);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab
, to_mode
,
602 from_mode
) != CODE_FOR_nothing
)
604 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
618 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
619 emit_move_insn (to
, temp
);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
637 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
654 scalar_int_mode int_mode
;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x
) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x
)
661 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
663 >= GET_MODE_PRECISION (int_mode
))
664 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
665 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
667 if (GET_MODE (x
) != VOIDmode
)
668 oldmode
= GET_MODE (x
);
673 if (CONST_SCALAR_INT_P (x
)
674 && is_int_mode (mode
, &int_mode
))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
680 oldmode
= MAX_MODE_INT
;
681 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
682 GET_MODE_PRECISION (int_mode
),
683 unsignedp
? UNSIGNED
: SIGNED
);
684 return immed_wide_int_const (w
, int_mode
);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode
;
691 if (is_int_mode (mode
, &int_mode
)
692 && is_int_mode (oldmode
, &int_oldmode
)
693 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
694 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
695 || CONST_POLY_INT_P (x
)
697 && (!HARD_REGISTER_P (x
)
698 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
699 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
700 return gen_lowpart (int_mode
, x
);
702 /* Converting from integer constant into mode is always equivalent to an
704 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
706 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
707 GET_MODE_BITSIZE (oldmode
)));
708 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
711 temp
= gen_reg_rtx (mode
);
712 convert_move (temp
, x
, unsignedp
);
716 /* Return the largest alignment we can use for doing a move (or store)
717 of MAX_PIECES. ALIGN is the largest alignment we could use. */
720 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
722 scalar_int_mode tmode
723 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
725 if (align
>= GET_MODE_ALIGNMENT (tmode
))
726 align
= GET_MODE_ALIGNMENT (tmode
);
729 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
730 opt_scalar_int_mode mode_iter
;
731 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
733 tmode
= mode_iter
.require ();
734 if (GET_MODE_SIZE (tmode
) > max_pieces
735 || targetm
.slow_unaligned_access (tmode
, align
))
740 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
746 /* Return the widest integer mode that is narrower than SIZE bytes. */
748 static scalar_int_mode
749 widest_int_mode_for_size (unsigned int size
)
751 scalar_int_mode result
= NARROWEST_INT_MODE
;
753 gcc_checking_assert (size
> 1);
755 opt_scalar_int_mode tmode
;
756 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
757 if (GET_MODE_SIZE (tmode
.require ()) < size
)
758 result
= tmode
.require ();
763 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
764 and should be performed piecewise. */
767 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
768 enum by_pieces_operation op
)
770 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
771 optimize_insn_for_speed_p ());
774 /* Determine whether the LEN bytes can be moved by using several move
775 instructions. Return nonzero if a call to move_by_pieces should
779 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
781 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
784 /* Return number of insns required to perform operation OP by pieces
785 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
787 unsigned HOST_WIDE_INT
788 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
789 unsigned int max_size
, by_pieces_operation op
)
791 unsigned HOST_WIDE_INT n_insns
= 0;
793 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
795 while (max_size
> 1 && l
> 0)
797 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
798 enum insn_code icode
;
800 unsigned int modesize
= GET_MODE_SIZE (mode
);
802 icode
= optab_handler (mov_optab
, mode
);
803 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
805 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
813 case COMPARE_BY_PIECES
:
814 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
815 int batch_ops
= 4 * batch
- 1;
816 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
817 n_insns
+= full
* batch_ops
;
818 if (n_pieces
% batch
!= 0)
831 /* Used when performing piecewise block operations, holds information
832 about one of the memory objects involved. The member functions
833 can be used to generate code for loading from the object and
834 updating the address when iterating. */
838 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
841 /* The address of the object. Can differ from that seen in the
842 MEM rtx if we copied the address to a register. */
844 /* Nonzero if the address on the object has an autoincrement already,
845 signifies whether that was an increment or decrement. */
846 signed char m_addr_inc
;
847 /* Nonzero if we intend to use autoinc without the address already
848 having autoinc form. We will insert add insns around each memory
849 reference, expecting later passes to form autoinc addressing modes.
850 The only supported options are predecrement and postincrement. */
851 signed char m_explicit_inc
;
852 /* True if we have either of the two possible cases of using
855 /* True if this is an address to be used for load operations rather
859 /* Optionally, a function to obtain constants for any given offset into
860 the objects, and data associated with it. */
861 by_pieces_constfn m_constfn
;
864 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
865 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
866 void increment_address (HOST_WIDE_INT
);
867 void maybe_predec (HOST_WIDE_INT
);
868 void maybe_postinc (HOST_WIDE_INT
);
869 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
876 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
877 true if the operation to be performed on this object is a load
878 rather than a store. For stores, OBJ can be NULL, in which case we
879 assume the operation is a stack push. For loads, the optional
880 CONSTFN and its associated CFNDATA can be used in place of the
883 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
885 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
891 rtx addr
= XEXP (obj
, 0);
892 rtx_code code
= GET_CODE (addr
);
894 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
895 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
898 m_addr_inc
= dec
? -1 : 1;
900 /* While we have always looked for these codes here, the code
901 implementing the memory operation has never handled them.
902 Support could be added later if necessary or beneficial. */
903 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
911 if (STACK_GROWS_DOWNWARD
)
917 gcc_assert (constfn
!= NULL
);
921 gcc_assert (is_load
);
924 /* Decide whether to use autoinc for an address involved in a memory op.
925 MODE is the mode of the accesses, REVERSE is true if we've decided to
926 perform the operation starting from the end, and LEN is the length of
927 the operation. Don't override an earlier decision to set m_auto. */
930 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
933 if (m_auto
|| m_obj
== NULL_RTX
)
936 bool use_predec
= (m_is_load
937 ? USE_LOAD_PRE_DECREMENT (mode
)
938 : USE_STORE_PRE_DECREMENT (mode
));
939 bool use_postinc
= (m_is_load
940 ? USE_LOAD_POST_INCREMENT (mode
)
941 : USE_STORE_POST_INCREMENT (mode
));
942 machine_mode addr_mode
= get_address_mode (m_obj
);
944 if (use_predec
&& reverse
)
946 m_addr
= copy_to_mode_reg (addr_mode
,
947 plus_constant (addr_mode
,
952 else if (use_postinc
&& !reverse
)
954 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
958 else if (CONSTANT_P (m_addr
))
959 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
962 /* Adjust the address to refer to the data at OFFSET in MODE. If we
963 are using autoincrement for this address, we don't add the offset,
964 but we still modify the MEM's properties. */
967 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
970 return m_constfn (m_cfndata
, offset
, mode
);
971 if (m_obj
== NULL_RTX
)
974 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
976 return adjust_address (m_obj
, mode
, offset
);
979 /* Emit an add instruction to increment the address by SIZE. */
982 pieces_addr::increment_address (HOST_WIDE_INT size
)
984 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
985 emit_insn (gen_add2_insn (m_addr
, amount
));
988 /* If we are supposed to decrement the address after each access, emit code
989 to do so now. Increment by SIZE (which has should have the correct sign
993 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
995 if (m_explicit_inc
>= 0)
997 gcc_assert (HAVE_PRE_DECREMENT
);
998 increment_address (size
);
1001 /* If we are supposed to decrement the address after each access, emit code
1002 to do so now. Increment by SIZE. */
1005 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1007 if (m_explicit_inc
<= 0)
1009 gcc_assert (HAVE_POST_INCREMENT
);
1010 increment_address (size
);
1013 /* This structure is used by do_op_by_pieces to describe the operation
1016 class op_by_pieces_d
1019 pieces_addr m_to
, m_from
;
1020 unsigned HOST_WIDE_INT m_len
;
1021 HOST_WIDE_INT m_offset
;
1022 unsigned int m_align
;
1023 unsigned int m_max_size
;
1026 /* Virtual functions, overriden by derived classes for the specific
1028 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1029 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1030 virtual void finish_mode (machine_mode
)
1035 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1036 unsigned HOST_WIDE_INT
, unsigned int);
1040 /* The constructor for an op_by_pieces_d structure. We require two
1041 objects named TO and FROM, which are identified as loads or stores
1042 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1043 and its associated FROM_CFN_DATA can be used to replace loads with
1044 constant values. LEN describes the length of the operation. */
1046 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1047 rtx from
, bool from_load
,
1048 by_pieces_constfn from_cfn
,
1049 void *from_cfn_data
,
1050 unsigned HOST_WIDE_INT len
,
1052 : m_to (to
, to_load
, NULL
, NULL
),
1053 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1054 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1056 int toi
= m_to
.get_addr_inc ();
1057 int fromi
= m_from
.get_addr_inc ();
1058 if (toi
>= 0 && fromi
>= 0)
1060 else if (toi
<= 0 && fromi
<= 0)
1065 m_offset
= m_reverse
? len
: 0;
1066 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1067 from
? MEM_ALIGN (from
) : align
);
1069 /* If copying requires more than two move insns,
1070 copy addresses to registers (to make displacements shorter)
1071 and use post-increment if available. */
1072 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1074 /* Find the mode of the largest comparison. */
1075 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1077 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1078 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1081 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1085 /* This function contains the main loop used for expanding a block
1086 operation. First move what we can in the largest integer mode,
1087 then go to successively smaller modes. For every access, call
1088 GENFUN with the two operands and the EXTRA_DATA. */
1091 op_by_pieces_d::run ()
1093 while (m_max_size
> 1 && m_len
> 0)
1095 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1097 if (prepare_mode (mode
, m_align
))
1099 unsigned int size
= GET_MODE_SIZE (mode
);
1100 rtx to1
= NULL_RTX
, from1
;
1102 while (m_len
>= size
)
1107 to1
= m_to
.adjust (mode
, m_offset
);
1108 from1
= m_from
.adjust (mode
, m_offset
);
1110 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1113 generate (to1
, from1
, mode
);
1115 m_to
.maybe_postinc (size
);
1116 m_from
.maybe_postinc (size
);
1127 m_max_size
= GET_MODE_SIZE (mode
);
1130 /* The code above should have handled everything. */
1131 gcc_assert (!m_len
);
1134 /* Derived class from op_by_pieces_d, providing support for block move
1137 class move_by_pieces_d
: public op_by_pieces_d
1139 insn_gen_fn m_gen_fun
;
1140 void generate (rtx
, rtx
, machine_mode
);
1141 bool prepare_mode (machine_mode
, unsigned int);
1144 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1146 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1149 rtx
finish_retmode (memop_ret
);
1152 /* Return true if MODE can be used for a set of copies, given an
1153 alignment ALIGN. Prepare whatever data is necessary for later
1154 calls to generate. */
1157 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1159 insn_code icode
= optab_handler (mov_optab
, mode
);
1160 m_gen_fun
= GEN_FCN (icode
);
1161 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1164 /* A callback used when iterating for a compare_by_pieces_operation.
1165 OP0 and OP1 are the values that have been loaded and should be
1166 compared in MODE. If OP0 is NULL, this means we should generate a
1167 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1168 gen function that should be used to generate the mode. */
1171 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1172 machine_mode mode ATTRIBUTE_UNUSED
)
1174 #ifdef PUSH_ROUNDING
1175 if (op0
== NULL_RTX
)
1177 emit_single_push_insn (mode
, op1
, NULL
);
1181 emit_insn (m_gen_fun (op0
, op1
));
1184 /* Perform the final adjustment at the end of a string to obtain the
1185 correct return value for the block operation.
1186 Return value is based on RETMODE argument. */
1189 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1191 gcc_assert (!m_reverse
);
1192 if (retmode
== RETURN_END_MINUS_ONE
)
1194 m_to
.maybe_postinc (-1);
1197 return m_to
.adjust (QImode
, m_offset
);
1200 /* Generate several move instructions to copy LEN bytes from block FROM to
1201 block TO. (These are MEM rtx's with BLKmode).
1203 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1204 used to push FROM to the stack.
1206 ALIGN is maximum stack alignment we can assume.
1208 Return value is based on RETMODE argument. */
1211 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1212 unsigned int align
, memop_ret retmode
)
1214 #ifndef PUSH_ROUNDING
1219 move_by_pieces_d
data (to
, from
, len
, align
);
1223 if (retmode
!= RETURN_BEGIN
)
1224 return data
.finish_retmode (retmode
);
1229 /* Derived class from op_by_pieces_d, providing support for block move
1232 class store_by_pieces_d
: public op_by_pieces_d
1234 insn_gen_fn m_gen_fun
;
1235 void generate (rtx
, rtx
, machine_mode
);
1236 bool prepare_mode (machine_mode
, unsigned int);
1239 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1240 unsigned HOST_WIDE_INT len
, unsigned int align
)
1241 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1244 rtx
finish_retmode (memop_ret
);
1247 /* Return true if MODE can be used for a set of stores, given an
1248 alignment ALIGN. Prepare whatever data is necessary for later
1249 calls to generate. */
1252 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1254 insn_code icode
= optab_handler (mov_optab
, mode
);
1255 m_gen_fun
= GEN_FCN (icode
);
1256 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1259 /* A callback used when iterating for a store_by_pieces_operation.
1260 OP0 and OP1 are the values that have been loaded and should be
1261 compared in MODE. If OP0 is NULL, this means we should generate a
1262 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1263 gen function that should be used to generate the mode. */
1266 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1268 emit_insn (m_gen_fun (op0
, op1
));
1271 /* Perform the final adjustment at the end of a string to obtain the
1272 correct return value for the block operation.
1273 Return value is based on RETMODE argument. */
1276 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1278 gcc_assert (!m_reverse
);
1279 if (retmode
== RETURN_END_MINUS_ONE
)
1281 m_to
.maybe_postinc (-1);
1284 return m_to
.adjust (QImode
, m_offset
);
1287 /* Determine whether the LEN bytes generated by CONSTFUN can be
1288 stored to memory using several move instructions. CONSTFUNDATA is
1289 a pointer which will be passed as argument in every CONSTFUN call.
1290 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1291 a memset operation and false if it's a copy of a constant string.
1292 Return nonzero if a call to store_by_pieces should succeed. */
1295 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1296 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1297 void *constfundata
, unsigned int align
, bool memsetp
)
1299 unsigned HOST_WIDE_INT l
;
1300 unsigned int max_size
;
1301 HOST_WIDE_INT offset
= 0;
1302 enum insn_code icode
;
1304 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1305 rtx cst ATTRIBUTE_UNUSED
;
1310 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1314 optimize_insn_for_speed_p ()))
1317 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1319 /* We would first store what we can in the largest integer mode, then go to
1320 successively smaller modes. */
1323 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1327 max_size
= STORE_MAX_PIECES
+ 1;
1328 while (max_size
> 1 && l
> 0)
1330 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1332 icode
= optab_handler (mov_optab
, mode
);
1333 if (icode
!= CODE_FOR_nothing
1334 && align
>= GET_MODE_ALIGNMENT (mode
))
1336 unsigned int size
= GET_MODE_SIZE (mode
);
1343 cst
= (*constfun
) (constfundata
, offset
, mode
);
1344 if (!targetm
.legitimate_constant_p (mode
, cst
))
1354 max_size
= GET_MODE_SIZE (mode
);
1357 /* The code above should have handled everything. */
1364 /* Generate several move instructions to store LEN bytes generated by
1365 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1366 pointer which will be passed as argument in every CONSTFUN call.
1367 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1368 a memset operation and false if it's a copy of a constant string.
1369 Return value is based on RETMODE argument. */
1372 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1373 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1374 void *constfundata
, unsigned int align
, bool memsetp
,
1379 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1383 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1385 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1386 optimize_insn_for_speed_p ()));
1388 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1391 if (retmode
!= RETURN_BEGIN
)
1392 return data
.finish_retmode (retmode
);
1397 /* Callback routine for clear_by_pieces.
1398 Return const0_rtx unconditionally. */
1401 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1406 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1407 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1410 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1415 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1419 /* Context used by compare_by_pieces_genfn. It stores the fail label
1420 to jump to in case of miscomparison, and for branch ratios greater than 1,
1421 it stores an accumulator and the current and maximum counts before
1422 emitting another branch. */
1424 class compare_by_pieces_d
: public op_by_pieces_d
1426 rtx_code_label
*m_fail_label
;
1428 int m_count
, m_batch
;
1430 void generate (rtx
, rtx
, machine_mode
);
1431 bool prepare_mode (machine_mode
, unsigned int);
1432 void finish_mode (machine_mode
);
1434 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1435 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1436 rtx_code_label
*fail_label
)
1437 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1439 m_fail_label
= fail_label
;
1443 /* A callback used when iterating for a compare_by_pieces_operation.
1444 OP0 and OP1 are the values that have been loaded and should be
1445 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1446 context structure. */
1449 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1453 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1454 true, OPTAB_LIB_WIDEN
);
1456 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1457 true, OPTAB_LIB_WIDEN
);
1458 m_accumulator
= temp
;
1460 if (++m_count
< m_batch
)
1464 op0
= m_accumulator
;
1466 m_accumulator
= NULL_RTX
;
1468 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1469 m_fail_label
, profile_probability::uninitialized ());
1472 /* Return true if MODE can be used for a set of moves and comparisons,
1473 given an alignment ALIGN. Prepare whatever data is necessary for
1474 later calls to generate. */
1477 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1479 insn_code icode
= optab_handler (mov_optab
, mode
);
1480 if (icode
== CODE_FOR_nothing
1481 || align
< GET_MODE_ALIGNMENT (mode
)
1482 || !can_compare_p (EQ
, mode
, ccp_jump
))
1484 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1487 m_accumulator
= NULL_RTX
;
1492 /* Called after expanding a series of comparisons in MODE. If we have
1493 accumulated results for which we haven't emitted a branch yet, do
1497 compare_by_pieces_d::finish_mode (machine_mode mode
)
1499 if (m_accumulator
!= NULL_RTX
)
1500 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1501 NULL_RTX
, NULL
, m_fail_label
,
1502 profile_probability::uninitialized ());
1505 /* Generate several move instructions to compare LEN bytes from blocks
1506 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1508 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1509 used to push FROM to the stack.
1511 ALIGN is maximum stack alignment we can assume.
1513 Optionally, the caller can pass a constfn and associated data in A1_CFN
1514 and A1_CFN_DATA. describing that the second operand being compared is a
1515 known constant and how to obtain its data. */
1518 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1519 rtx target
, unsigned int align
,
1520 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1522 rtx_code_label
*fail_label
= gen_label_rtx ();
1523 rtx_code_label
*end_label
= gen_label_rtx ();
1525 if (target
== NULL_RTX
1526 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1527 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1529 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1534 emit_move_insn (target
, const0_rtx
);
1535 emit_jump (end_label
);
1537 emit_label (fail_label
);
1538 emit_move_insn (target
, const1_rtx
);
1539 emit_label (end_label
);
1544 /* Emit code to move a block Y to a block X. This may be done with
1545 string-move instructions, with multiple scalar move instructions,
1546 or with a library call.
1548 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1549 SIZE is an rtx that says how long they are.
1550 ALIGN is the maximum alignment we can assume they have.
1551 METHOD describes what kind of copy this is, and what mechanisms may be used.
1552 MIN_SIZE is the minimal size of block to move
1553 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1554 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1556 Return the address of the new block, if memcpy is called and returns it,
1560 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1561 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1562 unsigned HOST_WIDE_INT min_size
,
1563 unsigned HOST_WIDE_INT max_size
,
1564 unsigned HOST_WIDE_INT probable_max_size
)
1571 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1576 case BLOCK_OP_NORMAL
:
1577 case BLOCK_OP_TAILCALL
:
1581 case BLOCK_OP_CALL_PARM
:
1582 may_use_call
= block_move_libcall_safe_for_call_parm ();
1584 /* Make inhibit_defer_pop nonzero around the library call
1585 to force it to pop the arguments right away. */
1589 case BLOCK_OP_NO_LIBCALL
:
1593 case BLOCK_OP_NO_LIBCALL_RET
:
1601 gcc_assert (MEM_P (x
) && MEM_P (y
));
1602 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1603 gcc_assert (align
>= BITS_PER_UNIT
);
1605 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1606 block copy is more efficient for other large modes, e.g. DCmode. */
1607 x
= adjust_address (x
, BLKmode
, 0);
1608 y
= adjust_address (y
, BLKmode
, 0);
1610 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1611 can be incorrect is coming from __builtin_memcpy. */
1612 poly_int64 const_size
;
1613 if (poly_int_rtx_p (size
, &const_size
))
1615 x
= shallow_copy_rtx (x
);
1616 y
= shallow_copy_rtx (y
);
1617 set_mem_size (x
, const_size
);
1618 set_mem_size (y
, const_size
);
1621 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1622 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
1623 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1624 expected_align
, expected_size
,
1625 min_size
, max_size
, probable_max_size
))
1627 else if (may_use_call
1628 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1629 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1631 if (may_use_call
< 0)
1634 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1635 method
== BLOCK_OP_TAILCALL
);
1639 emit_block_move_via_loop (x
, y
, size
, align
);
1641 if (method
== BLOCK_OP_CALL_PARM
)
1648 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1650 unsigned HOST_WIDE_INT max
, min
= 0;
1651 if (GET_CODE (size
) == CONST_INT
)
1652 min
= max
= UINTVAL (size
);
1654 max
= GET_MODE_MASK (GET_MODE (size
));
1655 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1659 /* A subroutine of emit_block_move. Returns true if calling the
1660 block move libcall will not clobber any parameters which may have
1661 already been placed on the stack. */
1664 block_move_libcall_safe_for_call_parm (void)
1666 #if defined (REG_PARM_STACK_SPACE)
1670 /* If arguments are pushed on the stack, then they're safe. */
1674 /* If registers go on the stack anyway, any argument is sure to clobber
1675 an outgoing argument. */
1676 #if defined (REG_PARM_STACK_SPACE)
1677 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1678 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1679 depend on its argument. */
1681 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1682 && REG_PARM_STACK_SPACE (fn
) != 0)
1686 /* If any argument goes in memory, then it might clobber an outgoing
1689 CUMULATIVE_ARGS args_so_far_v
;
1690 cumulative_args_t args_so_far
;
1693 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1694 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1695 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1697 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1698 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1700 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1701 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1703 if (!tmp
|| !REG_P (tmp
))
1705 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1707 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1714 /* A subroutine of emit_block_move. Expand a movmem pattern;
1715 return true if successful. */
1718 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1719 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1720 unsigned HOST_WIDE_INT min_size
,
1721 unsigned HOST_WIDE_INT max_size
,
1722 unsigned HOST_WIDE_INT probable_max_size
)
1724 int save_volatile_ok
= volatile_ok
;
1726 if (expected_align
< align
)
1727 expected_align
= align
;
1728 if (expected_size
!= -1)
1730 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1731 expected_size
= probable_max_size
;
1732 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1733 expected_size
= min_size
;
1736 /* Since this is a move insn, we don't care about volatility. */
1739 /* Try the most limited insn first, because there's no point
1740 including more than one in the machine description unless
1741 the more limited one has some advantage. */
1743 opt_scalar_int_mode mode_iter
;
1744 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1746 scalar_int_mode mode
= mode_iter
.require ();
1747 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1749 if (code
!= CODE_FOR_nothing
1750 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1751 here because if SIZE is less than the mode mask, as it is
1752 returned by the macro, it will definitely be less than the
1753 actual mode mask. Since SIZE is within the Pmode address
1754 space, we limit MODE to Pmode. */
1755 && ((CONST_INT_P (size
)
1756 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1757 <= (GET_MODE_MASK (mode
) >> 1)))
1758 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1759 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1761 struct expand_operand ops
[9];
1764 /* ??? When called via emit_block_move_for_call, it'd be
1765 nice if there were some way to inform the backend, so
1766 that it doesn't fail the expansion because it thinks
1767 emitting the libcall would be more efficient. */
1768 nops
= insn_data
[(int) code
].n_generator_args
;
1769 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1771 create_fixed_operand (&ops
[0], x
);
1772 create_fixed_operand (&ops
[1], y
);
1773 /* The check above guarantees that this size conversion is valid. */
1774 create_convert_operand_to (&ops
[2], size
, mode
, true);
1775 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1778 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1779 create_integer_operand (&ops
[5], expected_size
);
1783 create_integer_operand (&ops
[6], min_size
);
1784 /* If we cannot represent the maximal size,
1785 make parameter NULL. */
1786 if ((HOST_WIDE_INT
) max_size
!= -1)
1787 create_integer_operand (&ops
[7], max_size
);
1789 create_fixed_operand (&ops
[7], NULL
);
1793 /* If we cannot represent the maximal size,
1794 make parameter NULL. */
1795 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1796 create_integer_operand (&ops
[8], probable_max_size
);
1798 create_fixed_operand (&ops
[8], NULL
);
1800 if (maybe_expand_insn (code
, nops
, ops
))
1802 volatile_ok
= save_volatile_ok
;
1808 volatile_ok
= save_volatile_ok
;
1812 /* A subroutine of emit_block_move. Copy the data via an explicit
1813 loop. This is used only when libcalls are forbidden. */
1814 /* ??? It'd be nice to copy in hunks larger than QImode. */
1817 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1818 unsigned int align ATTRIBUTE_UNUSED
)
1820 rtx_code_label
*cmp_label
, *top_label
;
1821 rtx iter
, x_addr
, y_addr
, tmp
;
1822 machine_mode x_addr_mode
= get_address_mode (x
);
1823 machine_mode y_addr_mode
= get_address_mode (y
);
1824 machine_mode iter_mode
;
1826 iter_mode
= GET_MODE (size
);
1827 if (iter_mode
== VOIDmode
)
1828 iter_mode
= word_mode
;
1830 top_label
= gen_label_rtx ();
1831 cmp_label
= gen_label_rtx ();
1832 iter
= gen_reg_rtx (iter_mode
);
1834 emit_move_insn (iter
, const0_rtx
);
1836 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1837 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1838 do_pending_stack_adjust ();
1840 emit_jump (cmp_label
);
1841 emit_label (top_label
);
1843 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1844 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1846 if (x_addr_mode
!= y_addr_mode
)
1847 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1848 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1850 x
= change_address (x
, QImode
, x_addr
);
1851 y
= change_address (y
, QImode
, y_addr
);
1853 emit_move_insn (x
, y
);
1855 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1856 true, OPTAB_LIB_WIDEN
);
1858 emit_move_insn (iter
, tmp
);
1860 emit_label (cmp_label
);
1862 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1864 profile_probability::guessed_always ()
1865 .apply_scale (9, 10));
1868 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1869 TAILCALL is true if this is a tail call. */
1872 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1873 rtx size
, bool tailcall
)
1875 rtx dst_addr
, src_addr
;
1876 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1877 machine_mode size_mode
;
1879 /* Since dst and src are passed to a libcall, mark the corresponding
1880 tree EXPR as addressable. */
1881 tree dst_expr
= MEM_EXPR (dst
);
1882 tree src_expr
= MEM_EXPR (src
);
1884 mark_addressable (dst_expr
);
1886 mark_addressable (src_expr
);
1888 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1889 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1890 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1892 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1893 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1894 src_tree
= make_tree (ptr_type_node
, src_addr
);
1896 size_mode
= TYPE_MODE (sizetype
);
1897 size
= convert_to_mode (size_mode
, size
, 1);
1898 size
= copy_to_mode_reg (size_mode
, size
);
1899 size_tree
= make_tree (sizetype
, size
);
1901 /* It is incorrect to use the libcall calling conventions for calls to
1902 memcpy/memmove/memcmp because they can be provided by the user. */
1903 tree fn
= builtin_decl_implicit (fncode
);
1904 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1905 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1907 return expand_call (call_expr
, NULL_RTX
, false);
1910 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1911 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1912 otherwise return null. */
1915 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1916 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1917 HOST_WIDE_INT align
)
1919 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1921 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1924 struct expand_operand ops
[5];
1925 create_output_operand (&ops
[0], target
, insn_mode
);
1926 create_fixed_operand (&ops
[1], arg1_rtx
);
1927 create_fixed_operand (&ops
[2], arg2_rtx
);
1928 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1929 TYPE_UNSIGNED (arg3_type
));
1930 create_integer_operand (&ops
[4], align
);
1931 if (maybe_expand_insn (icode
, 5, ops
))
1932 return ops
[0].value
;
1936 /* Expand a block compare between X and Y with length LEN using the
1937 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1938 of the expression that was used to calculate the length. ALIGN
1939 gives the known minimum common alignment. */
1942 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1945 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1946 implementing memcmp because it will stop if it encounters two
1948 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1950 if (icode
== CODE_FOR_nothing
)
1953 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1956 /* Emit code to compare a block Y to a block X. This may be done with
1957 string-compare instructions, with multiple scalar instructions,
1958 or with a library call.
1960 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1961 they are. LEN_TYPE is the type of the expression that was used to
1964 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1965 value of a normal memcmp call, instead we can just compare for equality.
1966 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1969 Optionally, the caller can pass a constfn and associated data in Y_CFN
1970 and Y_CFN_DATA. describing that the second operand being compared is a
1971 known constant and how to obtain its data.
1972 Return the result of the comparison, or NULL_RTX if we failed to
1973 perform the operation. */
1976 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1977 bool equality_only
, by_pieces_constfn y_cfn
,
1982 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1985 gcc_assert (MEM_P (x
) && MEM_P (y
));
1986 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1987 gcc_assert (align
>= BITS_PER_UNIT
);
1989 x
= adjust_address (x
, BLKmode
, 0);
1990 y
= adjust_address (y
, BLKmode
, 0);
1993 && CONST_INT_P (len
)
1994 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1995 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
1998 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2003 /* Copy all or part of a value X into registers starting at REGNO.
2004 The number of registers to be filled is NREGS. */
2007 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2012 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2013 x
= validize_mem (force_const_mem (mode
, x
));
2015 /* See if the machine can do this with a load multiple insn. */
2016 if (targetm
.have_load_multiple ())
2018 rtx_insn
*last
= get_last_insn ();
2019 rtx first
= gen_rtx_REG (word_mode
, regno
);
2020 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2027 delete_insns_since (last
);
2030 for (int i
= 0; i
< nregs
; i
++)
2031 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2032 operand_subword_force (x
, i
, mode
));
2035 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2036 The number of registers to be filled is NREGS. */
2039 move_block_from_reg (int regno
, rtx x
, int nregs
)
2044 /* See if the machine can do this with a store multiple insn. */
2045 if (targetm
.have_store_multiple ())
2047 rtx_insn
*last
= get_last_insn ();
2048 rtx first
= gen_rtx_REG (word_mode
, regno
);
2049 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2056 delete_insns_since (last
);
2059 for (int i
= 0; i
< nregs
; i
++)
2061 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2065 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2069 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2070 ORIG, where ORIG is a non-consecutive group of registers represented by
2071 a PARALLEL. The clone is identical to the original except in that the
2072 original set of registers is replaced by a new set of pseudo registers.
2073 The new set has the same modes as the original set. */
2076 gen_group_rtx (rtx orig
)
2081 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2083 length
= XVECLEN (orig
, 0);
2084 tmps
= XALLOCAVEC (rtx
, length
);
2086 /* Skip a NULL entry in first slot. */
2087 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2092 for (; i
< length
; i
++)
2094 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2095 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2097 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2100 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2103 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2104 except that values are placed in TMPS[i], and must later be moved
2105 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2108 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2113 machine_mode m
= GET_MODE (orig_src
);
2115 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2118 && !SCALAR_INT_MODE_P (m
)
2119 && !MEM_P (orig_src
)
2120 && GET_CODE (orig_src
) != CONCAT
)
2122 scalar_int_mode imode
;
2123 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2125 src
= gen_reg_rtx (imode
);
2126 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2130 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2131 emit_move_insn (src
, orig_src
);
2133 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2137 /* Check for a NULL entry, used to indicate that the parameter goes
2138 both on the stack and in registers. */
2139 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2144 /* Process the pieces. */
2145 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2147 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2148 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2149 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2150 poly_int64 shift
= 0;
2152 /* Handle trailing fragments that run over the size of the struct.
2153 It's the target's responsibility to make sure that the fragment
2154 cannot be strictly smaller in some cases and strictly larger
2156 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2157 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2159 /* Arrange to shift the fragment to where it belongs.
2160 extract_bit_field loads to the lsb of the reg. */
2162 #ifdef BLOCK_REG_PADDING
2163 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2164 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2169 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2170 bytelen
= ssize
- bytepos
;
2171 gcc_assert (maybe_gt (bytelen
, 0));
2174 /* If we won't be loading directly from memory, protect the real source
2175 from strange tricks we might play; but make sure that the source can
2176 be loaded directly into the destination. */
2178 if (!MEM_P (orig_src
)
2179 && (!CONSTANT_P (orig_src
)
2180 || (GET_MODE (orig_src
) != mode
2181 && GET_MODE (orig_src
) != VOIDmode
)))
2183 if (GET_MODE (orig_src
) == VOIDmode
)
2184 src
= gen_reg_rtx (mode
);
2186 src
= gen_reg_rtx (GET_MODE (orig_src
));
2188 emit_move_insn (src
, orig_src
);
2191 /* Optimize the access just a bit. */
2193 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2194 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2195 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2196 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2198 tmps
[i
] = gen_reg_rtx (mode
);
2199 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2201 else if (COMPLEX_MODE_P (mode
)
2202 && GET_MODE (src
) == mode
2203 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2204 /* Let emit_move_complex do the bulk of the work. */
2206 else if (GET_CODE (src
) == CONCAT
)
2208 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2209 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2213 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2214 && known_le (subpos
+ bytelen
, slen0
))
2216 /* The following assumes that the concatenated objects all
2217 have the same size. In this case, a simple calculation
2218 can be used to determine the object and the bit field
2220 tmps
[i
] = XEXP (src
, elt
);
2221 if (maybe_ne (subpos
, 0)
2222 || maybe_ne (subpos
+ bytelen
, slen0
)
2223 || (!CONSTANT_P (tmps
[i
])
2224 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2225 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2226 subpos
* BITS_PER_UNIT
,
2227 1, NULL_RTX
, mode
, mode
, false,
2234 gcc_assert (known_eq (bytepos
, 0));
2235 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2236 emit_move_insn (mem
, src
);
2237 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2238 0, 1, NULL_RTX
, mode
, mode
, false,
2242 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2243 SIMD register, which is currently broken. While we get GCC
2244 to emit proper RTL for these cases, let's dump to memory. */
2245 else if (VECTOR_MODE_P (GET_MODE (dst
))
2248 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2251 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2252 emit_move_insn (mem
, src
);
2253 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2255 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2256 && XVECLEN (dst
, 0) > 1)
2257 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2258 else if (CONSTANT_P (src
))
2260 if (known_eq (bytelen
, ssize
))
2266 /* TODO: const_wide_int can have sizes other than this... */
2267 gcc_assert (known_eq (2 * bytelen
, ssize
));
2268 split_double (src
, &first
, &second
);
2275 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2278 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2279 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2280 mode
, mode
, false, NULL
);
2282 if (maybe_ne (shift
, 0))
2283 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2288 /* Emit code to move a block SRC of type TYPE to a block DST,
2289 where DST is non-consecutive registers represented by a PARALLEL.
2290 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2294 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2299 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2300 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2302 /* Copy the extracted pieces into the proper (probable) hard regs. */
2303 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2305 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2308 emit_move_insn (d
, tmps
[i
]);
2312 /* Similar, but load SRC into new pseudos in a format that looks like
2313 PARALLEL. This can later be fed to emit_group_move to get things
2314 in the right place. */
2317 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2322 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2323 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2325 /* Convert the vector to look just like the original PARALLEL, except
2326 with the computed values. */
2327 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2329 rtx e
= XVECEXP (parallel
, 0, i
);
2330 rtx d
= XEXP (e
, 0);
2334 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2335 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2337 RTVEC_ELT (vec
, i
) = e
;
2340 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2343 /* Emit code to move a block SRC to block DST, where SRC and DST are
2344 non-consecutive groups of registers, each represented by a PARALLEL. */
2347 emit_group_move (rtx dst
, rtx src
)
2351 gcc_assert (GET_CODE (src
) == PARALLEL
2352 && GET_CODE (dst
) == PARALLEL
2353 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2355 /* Skip first entry if NULL. */
2356 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2357 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2358 XEXP (XVECEXP (src
, 0, i
), 0));
2361 /* Move a group of registers represented by a PARALLEL into pseudos. */
2364 emit_group_move_into_temps (rtx src
)
2366 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2369 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2371 rtx e
= XVECEXP (src
, 0, i
);
2372 rtx d
= XEXP (e
, 0);
2375 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2376 RTVEC_ELT (vec
, i
) = e
;
2379 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2382 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2383 where SRC is non-consecutive registers represented by a PARALLEL.
2384 SSIZE represents the total size of block ORIG_DST, or -1 if not
2388 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2392 int start
, finish
, i
;
2393 machine_mode m
= GET_MODE (orig_dst
);
2395 gcc_assert (GET_CODE (src
) == PARALLEL
);
2397 if (!SCALAR_INT_MODE_P (m
)
2398 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2400 scalar_int_mode imode
;
2401 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2403 dst
= gen_reg_rtx (imode
);
2404 emit_group_store (dst
, src
, type
, ssize
);
2405 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2409 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2410 emit_group_store (dst
, src
, type
, ssize
);
2412 emit_move_insn (orig_dst
, dst
);
2416 /* Check for a NULL entry, used to indicate that the parameter goes
2417 both on the stack and in registers. */
2418 if (XEXP (XVECEXP (src
, 0, 0), 0))
2422 finish
= XVECLEN (src
, 0);
2424 tmps
= XALLOCAVEC (rtx
, finish
);
2426 /* Copy the (probable) hard regs into pseudos. */
2427 for (i
= start
; i
< finish
; i
++)
2429 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2430 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2432 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2433 emit_move_insn (tmps
[i
], reg
);
2439 /* If we won't be storing directly into memory, protect the real destination
2440 from strange tricks we might play. */
2442 if (GET_CODE (dst
) == PARALLEL
)
2446 /* We can get a PARALLEL dst if there is a conditional expression in
2447 a return statement. In that case, the dst and src are the same,
2448 so no action is necessary. */
2449 if (rtx_equal_p (dst
, src
))
2452 /* It is unclear if we can ever reach here, but we may as well handle
2453 it. Allocate a temporary, and split this into a store/load to/from
2455 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2456 emit_group_store (temp
, src
, type
, ssize
);
2457 emit_group_load (dst
, temp
, type
, ssize
);
2460 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2462 machine_mode outer
= GET_MODE (dst
);
2468 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2469 dst
= gen_reg_rtx (outer
);
2471 /* Make life a bit easier for combine. */
2472 /* If the first element of the vector is the low part
2473 of the destination mode, use a paradoxical subreg to
2474 initialize the destination. */
2477 inner
= GET_MODE (tmps
[start
]);
2478 bytepos
= subreg_lowpart_offset (inner
, outer
);
2479 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2482 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2486 emit_move_insn (dst
, temp
);
2493 /* If the first element wasn't the low part, try the last. */
2495 && start
< finish
- 1)
2497 inner
= GET_MODE (tmps
[finish
- 1]);
2498 bytepos
= subreg_lowpart_offset (inner
, outer
);
2499 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2503 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2507 emit_move_insn (dst
, temp
);
2514 /* Otherwise, simply initialize the result to zero. */
2516 emit_move_insn (dst
, CONST0_RTX (outer
));
2519 /* Process the pieces. */
2520 for (i
= start
; i
< finish
; i
++)
2522 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2523 machine_mode mode
= GET_MODE (tmps
[i
]);
2524 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2525 poly_uint64 adj_bytelen
;
2528 /* Handle trailing fragments that run over the size of the struct.
2529 It's the target's responsibility to make sure that the fragment
2530 cannot be strictly smaller in some cases and strictly larger
2532 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2533 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2534 adj_bytelen
= ssize
- bytepos
;
2536 adj_bytelen
= bytelen
;
2538 if (GET_CODE (dst
) == CONCAT
)
2540 if (known_le (bytepos
+ adj_bytelen
,
2541 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2542 dest
= XEXP (dst
, 0);
2543 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2545 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2546 dest
= XEXP (dst
, 1);
2550 machine_mode dest_mode
= GET_MODE (dest
);
2551 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2553 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2555 if (GET_MODE_ALIGNMENT (dest_mode
)
2556 >= GET_MODE_ALIGNMENT (tmp_mode
))
2558 dest
= assign_stack_temp (dest_mode
,
2559 GET_MODE_SIZE (dest_mode
));
2560 emit_move_insn (adjust_address (dest
,
2568 dest
= assign_stack_temp (tmp_mode
,
2569 GET_MODE_SIZE (tmp_mode
));
2570 emit_move_insn (dest
, tmps
[i
]);
2571 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2577 /* Handle trailing fragments that run over the size of the struct. */
2578 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2580 /* store_bit_field always takes its value from the lsb.
2581 Move the fragment to the lsb if it's not already there. */
2583 #ifdef BLOCK_REG_PADDING
2584 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2585 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2591 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2592 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2596 /* Make sure not to write past the end of the struct. */
2597 store_bit_field (dest
,
2598 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2599 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2600 VOIDmode
, tmps
[i
], false);
2603 /* Optimize the access just a bit. */
2604 else if (MEM_P (dest
)
2605 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2606 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2607 && multiple_p (bytepos
* BITS_PER_UNIT
,
2608 GET_MODE_ALIGNMENT (mode
))
2609 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2610 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2613 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2614 0, 0, mode
, tmps
[i
], false);
2617 /* Copy from the pseudo into the (probable) hard reg. */
2618 if (orig_dst
!= dst
)
2619 emit_move_insn (orig_dst
, dst
);
2622 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2623 of the value stored in X. */
2626 maybe_emit_group_store (rtx x
, tree type
)
2628 machine_mode mode
= TYPE_MODE (type
);
2629 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2630 if (GET_CODE (x
) == PARALLEL
)
2632 rtx result
= gen_reg_rtx (mode
);
2633 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2639 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2641 This is used on targets that return BLKmode values in registers. */
2644 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2646 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2647 rtx src
= NULL
, dst
= NULL
;
2648 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2649 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2650 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2651 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2652 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2653 fixed_size_mode copy_mode
;
2655 /* BLKmode registers created in the back-end shouldn't have survived. */
2656 gcc_assert (mode
!= BLKmode
);
2658 /* If the structure doesn't take up a whole number of words, see whether
2659 SRCREG is padded on the left or on the right. If it's on the left,
2660 set PADDING_CORRECTION to the number of bits to skip.
2662 In most ABIs, the structure will be returned at the least end of
2663 the register, which translates to right padding on little-endian
2664 targets and left padding on big-endian targets. The opposite
2665 holds if the structure is returned at the most significant
2666 end of the register. */
2667 if (bytes
% UNITS_PER_WORD
!= 0
2668 && (targetm
.calls
.return_in_msb (type
)
2670 : BYTES_BIG_ENDIAN
))
2672 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2674 /* We can use a single move if we have an exact mode for the size. */
2675 else if (MEM_P (target
)
2676 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2677 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2678 && bytes
== GET_MODE_SIZE (mode
))
2680 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2684 /* And if we additionally have the same mode for a register. */
2685 else if (REG_P (target
)
2686 && GET_MODE (target
) == mode
2687 && bytes
== GET_MODE_SIZE (mode
))
2689 emit_move_insn (target
, srcreg
);
2693 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2694 into a new pseudo which is a full word. */
2695 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2697 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2701 /* Copy the structure BITSIZE bits at a time. If the target lives in
2702 memory, take care of not reading/writing past its end by selecting
2703 a copy mode suited to BITSIZE. This should always be possible given
2706 If the target lives in register, make sure not to select a copy mode
2707 larger than the mode of the register.
2709 We could probably emit more efficient code for machines which do not use
2710 strict alignment, but it doesn't seem worth the effort at the current
2713 copy_mode
= word_mode
;
2716 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2717 if (mem_mode
.exists ())
2718 copy_mode
= mem_mode
.require ();
2720 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2723 for (bitpos
= 0, xbitpos
= padding_correction
;
2724 bitpos
< bytes
* BITS_PER_UNIT
;
2725 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2727 /* We need a new source operand each time xbitpos is on a
2728 word boundary and when xbitpos == padding_correction
2729 (the first time through). */
2730 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2731 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2733 /* We need a new destination operand each time bitpos is on
2735 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2737 else if (bitpos
% BITS_PER_WORD
== 0)
2738 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2740 /* Use xbitpos for the source extraction (right justified) and
2741 bitpos for the destination store (left justified). */
2742 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2743 extract_bit_field (src
, bitsize
,
2744 xbitpos
% BITS_PER_WORD
, 1,
2745 NULL_RTX
, copy_mode
, copy_mode
,
2751 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2752 register if it contains any data, otherwise return null.
2754 This is used on targets that return BLKmode values in registers. */
2757 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2760 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2761 unsigned int bitsize
;
2762 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2763 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2764 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2765 fixed_size_mode dst_mode
;
2766 scalar_int_mode min_mode
;
2768 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2770 x
= expand_normal (src
);
2772 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2776 /* If the structure doesn't take up a whole number of words, see
2777 whether the register value should be padded on the left or on
2778 the right. Set PADDING_CORRECTION to the number of padding
2779 bits needed on the left side.
2781 In most ABIs, the structure will be returned at the least end of
2782 the register, which translates to right padding on little-endian
2783 targets and left padding on big-endian targets. The opposite
2784 holds if the structure is returned at the most significant
2785 end of the register. */
2786 if (bytes
% UNITS_PER_WORD
!= 0
2787 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2789 : BYTES_BIG_ENDIAN
))
2790 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2793 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2794 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2795 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2796 min_mode
= smallest_int_mode_for_size (bitsize
);
2798 /* Copy the structure BITSIZE bits at a time. */
2799 for (bitpos
= 0, xbitpos
= padding_correction
;
2800 bitpos
< bytes
* BITS_PER_UNIT
;
2801 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2803 /* We need a new destination pseudo each time xbitpos is
2804 on a word boundary and when xbitpos == padding_correction
2805 (the first time through). */
2806 if (xbitpos
% BITS_PER_WORD
== 0
2807 || xbitpos
== padding_correction
)
2809 /* Generate an appropriate register. */
2810 dst_word
= gen_reg_rtx (word_mode
);
2811 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2813 /* Clear the destination before we move anything into it. */
2814 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2817 /* Find the largest integer mode that can be used to copy all or as
2818 many bits as possible of the structure if the target supports larger
2819 copies. There are too many corner cases here w.r.t to alignments on
2820 the read/writes. So if there is any padding just use single byte
2822 opt_scalar_int_mode mode_iter
;
2823 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2825 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2827 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2828 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2829 && msize
<= BITS_PER_WORD
)
2836 /* We need a new source operand each time bitpos is on a word
2838 if (bitpos
% BITS_PER_WORD
== 0)
2839 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2841 /* Use bitpos for the source extraction (left justified) and
2842 xbitpos for the destination store (right justified). */
2843 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2845 extract_bit_field (src_word
, bitsize
,
2846 bitpos
% BITS_PER_WORD
, 1,
2847 NULL_RTX
, word_mode
, word_mode
,
2852 if (mode
== BLKmode
)
2854 /* Find the smallest integer mode large enough to hold the
2855 entire structure. */
2856 opt_scalar_int_mode mode_iter
;
2857 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2858 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2861 /* A suitable mode should have been found. */
2862 mode
= mode_iter
.require ();
2865 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2866 dst_mode
= word_mode
;
2869 dst
= gen_reg_rtx (dst_mode
);
2871 for (i
= 0; i
< n_regs
; i
++)
2872 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2874 if (mode
!= dst_mode
)
2875 dst
= gen_lowpart (mode
, dst
);
2880 /* Add a USE expression for REG to the (possibly empty) list pointed
2881 to by CALL_FUSAGE. REG must denote a hard register. */
2884 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2886 gcc_assert (REG_P (reg
));
2888 if (!HARD_REGISTER_P (reg
))
2892 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2895 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2896 to by CALL_FUSAGE. REG must denote a hard register. */
2899 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2901 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2904 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2907 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2908 starting at REGNO. All of these registers must be hard registers. */
2911 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2915 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2917 for (i
= 0; i
< nregs
; i
++)
2918 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2921 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2922 PARALLEL REGS. This is for calls that pass values in multiple
2923 non-contiguous locations. The Irix 6 ABI has examples of this. */
2926 use_group_regs (rtx
*call_fusage
, rtx regs
)
2930 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2932 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2934 /* A NULL entry means the parameter goes both on the stack and in
2935 registers. This can also be a MEM for targets that pass values
2936 partially on the stack and partially in registers. */
2937 if (reg
!= 0 && REG_P (reg
))
2938 use_reg (call_fusage
, reg
);
2942 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2943 assigment and the code of the expresion on the RHS is CODE. Return
2947 get_def_for_expr (tree name
, enum tree_code code
)
2951 if (TREE_CODE (name
) != SSA_NAME
)
2954 def_stmt
= get_gimple_for_ssa_name (name
);
2956 || gimple_assign_rhs_code (def_stmt
) != code
)
2962 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2963 assigment and the class of the expresion on the RHS is CLASS. Return
2967 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2971 if (TREE_CODE (name
) != SSA_NAME
)
2974 def_stmt
= get_gimple_for_ssa_name (name
);
2976 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2982 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2983 its length in bytes. */
2986 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2987 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2988 unsigned HOST_WIDE_INT min_size
,
2989 unsigned HOST_WIDE_INT max_size
,
2990 unsigned HOST_WIDE_INT probable_max_size
)
2992 machine_mode mode
= GET_MODE (object
);
2995 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2997 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2998 just move a zero. Otherwise, do this a piece at a time. */
2999 poly_int64 size_val
;
3001 && poly_int_rtx_p (size
, &size_val
)
3002 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3004 rtx zero
= CONST0_RTX (mode
);
3007 emit_move_insn (object
, zero
);
3011 if (COMPLEX_MODE_P (mode
))
3013 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3016 write_complex_part (object
, zero
, 0);
3017 write_complex_part (object
, zero
, 1);
3023 if (size
== const0_rtx
)
3026 align
= MEM_ALIGN (object
);
3028 if (CONST_INT_P (size
)
3029 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3031 optimize_insn_for_speed_p ()))
3032 clear_by_pieces (object
, INTVAL (size
), align
);
3033 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3034 expected_align
, expected_size
,
3035 min_size
, max_size
, probable_max_size
))
3037 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3038 return set_storage_via_libcall (object
, size
, const0_rtx
,
3039 method
== BLOCK_OP_TAILCALL
);
3047 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3049 unsigned HOST_WIDE_INT max
, min
= 0;
3050 if (GET_CODE (size
) == CONST_INT
)
3051 min
= max
= UINTVAL (size
);
3053 max
= GET_MODE_MASK (GET_MODE (size
));
3054 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3058 /* A subroutine of clear_storage. Expand a call to memset.
3059 Return the return value of memset, 0 otherwise. */
3062 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3064 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3065 machine_mode size_mode
;
3067 object
= copy_addr_to_reg (XEXP (object
, 0));
3068 object_tree
= make_tree (ptr_type_node
, object
);
3070 if (!CONST_INT_P (val
))
3071 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3072 val_tree
= make_tree (integer_type_node
, val
);
3074 size_mode
= TYPE_MODE (sizetype
);
3075 size
= convert_to_mode (size_mode
, size
, 1);
3076 size
= copy_to_mode_reg (size_mode
, size
);
3077 size_tree
= make_tree (sizetype
, size
);
3079 /* It is incorrect to use the libcall calling conventions for calls to
3080 memset because it can be provided by the user. */
3081 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3082 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3083 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3085 return expand_call (call_expr
, NULL_RTX
, false);
3088 /* Expand a setmem pattern; return true if successful. */
3091 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3092 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3093 unsigned HOST_WIDE_INT min_size
,
3094 unsigned HOST_WIDE_INT max_size
,
3095 unsigned HOST_WIDE_INT probable_max_size
)
3097 /* Try the most limited insn first, because there's no point
3098 including more than one in the machine description unless
3099 the more limited one has some advantage. */
3101 if (expected_align
< align
)
3102 expected_align
= align
;
3103 if (expected_size
!= -1)
3105 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3106 expected_size
= max_size
;
3107 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3108 expected_size
= min_size
;
3111 opt_scalar_int_mode mode_iter
;
3112 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3114 scalar_int_mode mode
= mode_iter
.require ();
3115 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3117 if (code
!= CODE_FOR_nothing
3118 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3119 here because if SIZE is less than the mode mask, as it is
3120 returned by the macro, it will definitely be less than the
3121 actual mode mask. Since SIZE is within the Pmode address
3122 space, we limit MODE to Pmode. */
3123 && ((CONST_INT_P (size
)
3124 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3125 <= (GET_MODE_MASK (mode
) >> 1)))
3126 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3127 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3129 struct expand_operand ops
[9];
3132 nops
= insn_data
[(int) code
].n_generator_args
;
3133 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3135 create_fixed_operand (&ops
[0], object
);
3136 /* The check above guarantees that this size conversion is valid. */
3137 create_convert_operand_to (&ops
[1], size
, mode
, true);
3138 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3139 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3142 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3143 create_integer_operand (&ops
[5], expected_size
);
3147 create_integer_operand (&ops
[6], min_size
);
3148 /* If we cannot represent the maximal size,
3149 make parameter NULL. */
3150 if ((HOST_WIDE_INT
) max_size
!= -1)
3151 create_integer_operand (&ops
[7], max_size
);
3153 create_fixed_operand (&ops
[7], NULL
);
3157 /* If we cannot represent the maximal size,
3158 make parameter NULL. */
3159 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3160 create_integer_operand (&ops
[8], probable_max_size
);
3162 create_fixed_operand (&ops
[8], NULL
);
3164 if (maybe_expand_insn (code
, nops
, ops
))
3173 /* Write to one of the components of the complex value CPLX. Write VAL to
3174 the real part if IMAG_P is false, and the imaginary part if its true. */
3177 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3183 if (GET_CODE (cplx
) == CONCAT
)
3185 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3189 cmode
= GET_MODE (cplx
);
3190 imode
= GET_MODE_INNER (cmode
);
3191 ibitsize
= GET_MODE_BITSIZE (imode
);
3193 /* For MEMs simplify_gen_subreg may generate an invalid new address
3194 because, e.g., the original address is considered mode-dependent
3195 by the target, which restricts simplify_subreg from invoking
3196 adjust_address_nv. Instead of preparing fallback support for an
3197 invalid address, we call adjust_address_nv directly. */
3200 emit_move_insn (adjust_address_nv (cplx
, imode
,
3201 imag_p
? GET_MODE_SIZE (imode
) : 0),
3206 /* If the sub-object is at least word sized, then we know that subregging
3207 will work. This special case is important, since store_bit_field
3208 wants to operate on integer modes, and there's rarely an OImode to
3209 correspond to TCmode. */
3210 if (ibitsize
>= BITS_PER_WORD
3211 /* For hard regs we have exact predicates. Assume we can split
3212 the original object if it spans an even number of hard regs.
3213 This special case is important for SCmode on 64-bit platforms
3214 where the natural size of floating-point regs is 32-bit. */
3216 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3217 && REG_NREGS (cplx
) % 2 == 0))
3219 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3220 imag_p
? GET_MODE_SIZE (imode
) : 0);
3223 emit_move_insn (part
, val
);
3227 /* simplify_gen_subreg may fail for sub-word MEMs. */
3228 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3231 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3235 /* Extract one of the components of the complex value CPLX. Extract the
3236 real part if IMAG_P is false, and the imaginary part if it's true. */
3239 read_complex_part (rtx cplx
, bool imag_p
)
3245 if (GET_CODE (cplx
) == CONCAT
)
3246 return XEXP (cplx
, imag_p
);
3248 cmode
= GET_MODE (cplx
);
3249 imode
= GET_MODE_INNER (cmode
);
3250 ibitsize
= GET_MODE_BITSIZE (imode
);
3252 /* Special case reads from complex constants that got spilled to memory. */
3253 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3255 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3256 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3258 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3259 if (CONSTANT_CLASS_P (part
))
3260 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3264 /* For MEMs simplify_gen_subreg may generate an invalid new address
3265 because, e.g., the original address is considered mode-dependent
3266 by the target, which restricts simplify_subreg from invoking
3267 adjust_address_nv. Instead of preparing fallback support for an
3268 invalid address, we call adjust_address_nv directly. */
3270 return adjust_address_nv (cplx
, imode
,
3271 imag_p
? GET_MODE_SIZE (imode
) : 0);
3273 /* If the sub-object is at least word sized, then we know that subregging
3274 will work. This special case is important, since extract_bit_field
3275 wants to operate on integer modes, and there's rarely an OImode to
3276 correspond to TCmode. */
3277 if (ibitsize
>= BITS_PER_WORD
3278 /* For hard regs we have exact predicates. Assume we can split
3279 the original object if it spans an even number of hard regs.
3280 This special case is important for SCmode on 64-bit platforms
3281 where the natural size of floating-point regs is 32-bit. */
3283 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3284 && REG_NREGS (cplx
) % 2 == 0))
3286 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3287 imag_p
? GET_MODE_SIZE (imode
) : 0);
3291 /* simplify_gen_subreg may fail for sub-word MEMs. */
3292 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3295 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3296 true, NULL_RTX
, imode
, imode
, false, NULL
);
3299 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3300 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3301 represented in NEW_MODE. If FORCE is true, this will never happen, as
3302 we'll force-create a SUBREG if needed. */
3305 emit_move_change_mode (machine_mode new_mode
,
3306 machine_mode old_mode
, rtx x
, bool force
)
3310 if (push_operand (x
, GET_MODE (x
)))
3312 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3313 MEM_COPY_ATTRIBUTES (ret
, x
);
3317 /* We don't have to worry about changing the address since the
3318 size in bytes is supposed to be the same. */
3319 if (reload_in_progress
)
3321 /* Copy the MEM to change the mode and move any
3322 substitutions from the old MEM to the new one. */
3323 ret
= adjust_address_nv (x
, new_mode
, 0);
3324 copy_replacements (x
, ret
);
3327 ret
= adjust_address (x
, new_mode
, 0);
3331 /* Note that we do want simplify_subreg's behavior of validating
3332 that the new mode is ok for a hard register. If we were to use
3333 simplify_gen_subreg, we would create the subreg, but would
3334 probably run into the target not being able to implement it. */
3335 /* Except, of course, when FORCE is true, when this is exactly what
3336 we want. Which is needed for CCmodes on some targets. */
3338 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3340 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3346 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3347 an integer mode of the same size as MODE. Returns the instruction
3348 emitted, or NULL if such a move could not be generated. */
3351 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3353 scalar_int_mode imode
;
3354 enum insn_code code
;
3356 /* There must exist a mode of the exact size we require. */
3357 if (!int_mode_for_mode (mode
).exists (&imode
))
3360 /* The target must support moves in this mode. */
3361 code
= optab_handler (mov_optab
, imode
);
3362 if (code
== CODE_FOR_nothing
)
3365 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3368 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3371 return emit_insn (GEN_FCN (code
) (x
, y
));
3374 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3375 Return an equivalent MEM that does not use an auto-increment. */
3378 emit_move_resolve_push (machine_mode mode
, rtx x
)
3380 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3383 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3384 #ifdef PUSH_ROUNDING
3385 adjust
= PUSH_ROUNDING (adjust
);
3387 if (code
== PRE_DEC
|| code
== POST_DEC
)
3389 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3391 rtx expr
= XEXP (XEXP (x
, 0), 1);
3393 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3394 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3395 if (GET_CODE (expr
) == MINUS
)
3397 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3401 /* Do not use anti_adjust_stack, since we don't want to update
3402 stack_pointer_delta. */
3403 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3404 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3405 0, OPTAB_LIB_WIDEN
);
3406 if (temp
!= stack_pointer_rtx
)
3407 emit_move_insn (stack_pointer_rtx
, temp
);
3414 temp
= stack_pointer_rtx
;
3419 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3425 return replace_equiv_address (x
, temp
);
3428 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3429 X is known to satisfy push_operand, and MODE is known to be complex.
3430 Returns the last instruction emitted. */
3433 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3435 scalar_mode submode
= GET_MODE_INNER (mode
);
3438 #ifdef PUSH_ROUNDING
3439 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3441 /* In case we output to the stack, but the size is smaller than the
3442 machine can push exactly, we need to use move instructions. */
3443 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3445 x
= emit_move_resolve_push (mode
, x
);
3446 return emit_move_insn (x
, y
);
3450 /* Note that the real part always precedes the imag part in memory
3451 regardless of machine's endianness. */
3452 switch (GET_CODE (XEXP (x
, 0)))
3466 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3467 read_complex_part (y
, imag_first
));
3468 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3469 read_complex_part (y
, !imag_first
));
3472 /* A subroutine of emit_move_complex. Perform the move from Y to X
3473 via two moves of the parts. Returns the last instruction emitted. */
3476 emit_move_complex_parts (rtx x
, rtx y
)
3478 /* Show the output dies here. This is necessary for SUBREGs
3479 of pseudos since we cannot track their lifetimes correctly;
3480 hard regs shouldn't appear here except as return values. */
3481 if (!reload_completed
&& !reload_in_progress
3482 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3485 write_complex_part (x
, read_complex_part (y
, false), false);
3486 write_complex_part (x
, read_complex_part (y
, true), true);
3488 return get_last_insn ();
3491 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3492 MODE is known to be complex. Returns the last instruction emitted. */
3495 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3499 /* Need to take special care for pushes, to maintain proper ordering
3500 of the data, and possibly extra padding. */
3501 if (push_operand (x
, mode
))
3502 return emit_move_complex_push (mode
, x
, y
);
3504 /* See if we can coerce the target into moving both values at once, except
3505 for floating point where we favor moving as parts if this is easy. */
3506 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3507 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3509 && HARD_REGISTER_P (x
)
3510 && REG_NREGS (x
) == 1)
3512 && HARD_REGISTER_P (y
)
3513 && REG_NREGS (y
) == 1))
3515 /* Not possible if the values are inherently not adjacent. */
3516 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3518 /* Is possible if both are registers (or subregs of registers). */
3519 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3521 /* If one of the operands is a memory, and alignment constraints
3522 are friendly enough, we may be able to do combined memory operations.
3523 We do not attempt this if Y is a constant because that combination is
3524 usually better with the by-parts thing below. */
3525 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3526 && (!STRICT_ALIGNMENT
3527 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3536 /* For memory to memory moves, optimal behavior can be had with the
3537 existing block move logic. */
3538 if (MEM_P (x
) && MEM_P (y
))
3540 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3541 BLOCK_OP_NO_LIBCALL
);
3542 return get_last_insn ();
3545 ret
= emit_move_via_integer (mode
, x
, y
, true);
3550 return emit_move_complex_parts (x
, y
);
3553 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3554 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3557 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3561 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3564 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3565 if (code
!= CODE_FOR_nothing
)
3567 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3568 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3569 return emit_insn (GEN_FCN (code
) (x
, y
));
3573 /* Otherwise, find the MODE_INT mode of the same width. */
3574 ret
= emit_move_via_integer (mode
, x
, y
, false);
3575 gcc_assert (ret
!= NULL
);
3579 /* Return true if word I of OP lies entirely in the
3580 undefined bits of a paradoxical subreg. */
3583 undefined_operand_subword_p (const_rtx op
, int i
)
3585 if (GET_CODE (op
) != SUBREG
)
3587 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3588 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3589 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3590 || known_le (offset
, -UNITS_PER_WORD
));
3593 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3594 MODE is any multi-word or full-word mode that lacks a move_insn
3595 pattern. Note that you will get better code if you define such
3596 patterns, even if they must turn into multiple assembler instructions. */
3599 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3601 rtx_insn
*last_insn
= 0;
3607 /* This function can only handle cases where the number of words is
3608 known at compile time. */
3609 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3610 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3612 /* If X is a push on the stack, do the push now and replace
3613 X with a reference to the stack pointer. */
3614 if (push_operand (x
, mode
))
3615 x
= emit_move_resolve_push (mode
, x
);
3617 /* If we are in reload, see if either operand is a MEM whose address
3618 is scheduled for replacement. */
3619 if (reload_in_progress
&& MEM_P (x
)
3620 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3621 x
= replace_equiv_address_nv (x
, inner
);
3622 if (reload_in_progress
&& MEM_P (y
)
3623 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3624 y
= replace_equiv_address_nv (y
, inner
);
3628 need_clobber
= false;
3629 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3631 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3634 /* Do not generate code for a move if it would come entirely
3635 from the undefined bits of a paradoxical subreg. */
3636 if (undefined_operand_subword_p (y
, i
))
3639 ypart
= operand_subword (y
, i
, 1, mode
);
3641 /* If we can't get a part of Y, put Y into memory if it is a
3642 constant. Otherwise, force it into a register. Then we must
3643 be able to get a part of Y. */
3644 if (ypart
== 0 && CONSTANT_P (y
))
3646 y
= use_anchored_address (force_const_mem (mode
, y
));
3647 ypart
= operand_subword (y
, i
, 1, mode
);
3649 else if (ypart
== 0)
3650 ypart
= operand_subword_force (y
, i
, mode
);
3652 gcc_assert (xpart
&& ypart
);
3654 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3656 last_insn
= emit_move_insn (xpart
, ypart
);
3662 /* Show the output dies here. This is necessary for SUBREGs
3663 of pseudos since we cannot track their lifetimes correctly;
3664 hard regs shouldn't appear here except as return values.
3665 We never want to emit such a clobber after reload. */
3667 && ! (reload_in_progress
|| reload_completed
)
3668 && need_clobber
!= 0)
3676 /* Low level part of emit_move_insn.
3677 Called just like emit_move_insn, but assumes X and Y
3678 are basically valid. */
3681 emit_move_insn_1 (rtx x
, rtx y
)
3683 machine_mode mode
= GET_MODE (x
);
3684 enum insn_code code
;
3686 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3688 code
= optab_handler (mov_optab
, mode
);
3689 if (code
!= CODE_FOR_nothing
)
3690 return emit_insn (GEN_FCN (code
) (x
, y
));
3692 /* Expand complex moves by moving real part and imag part. */
3693 if (COMPLEX_MODE_P (mode
))
3694 return emit_move_complex (mode
, x
, y
);
3696 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3697 || ALL_FIXED_POINT_MODE_P (mode
))
3699 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3701 /* If we can't find an integer mode, use multi words. */
3705 return emit_move_multi_word (mode
, x
, y
);
3708 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3709 return emit_move_ccmode (mode
, x
, y
);
3711 /* Try using a move pattern for the corresponding integer mode. This is
3712 only safe when simplify_subreg can convert MODE constants into integer
3713 constants. At present, it can only do this reliably if the value
3714 fits within a HOST_WIDE_INT. */
3716 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3718 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3722 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3727 return emit_move_multi_word (mode
, x
, y
);
3730 /* Generate code to copy Y into X.
3731 Both Y and X must have the same mode, except that
3732 Y can be a constant with VOIDmode.
3733 This mode cannot be BLKmode; use emit_block_move for that.
3735 Return the last instruction emitted. */
3738 emit_move_insn (rtx x
, rtx y
)
3740 machine_mode mode
= GET_MODE (x
);
3741 rtx y_cst
= NULL_RTX
;
3742 rtx_insn
*last_insn
;
3745 gcc_assert (mode
!= BLKmode
3746 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3751 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3752 && (last_insn
= compress_float_constant (x
, y
)))
3757 if (!targetm
.legitimate_constant_p (mode
, y
))
3759 y
= force_const_mem (mode
, y
);
3761 /* If the target's cannot_force_const_mem prevented the spill,
3762 assume that the target's move expanders will also take care
3763 of the non-legitimate constant. */
3767 y
= use_anchored_address (y
);
3771 /* If X or Y are memory references, verify that their addresses are valid
3774 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3776 && ! push_operand (x
, GET_MODE (x
))))
3777 x
= validize_mem (x
);
3780 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3781 MEM_ADDR_SPACE (y
)))
3782 y
= validize_mem (y
);
3784 gcc_assert (mode
!= BLKmode
);
3786 last_insn
= emit_move_insn_1 (x
, y
);
3788 if (y_cst
&& REG_P (x
)
3789 && (set
= single_set (last_insn
)) != NULL_RTX
3790 && SET_DEST (set
) == x
3791 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3792 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3797 /* Generate the body of an instruction to copy Y into X.
3798 It may be a list of insns, if one insn isn't enough. */
3801 gen_move_insn (rtx x
, rtx y
)
3806 emit_move_insn_1 (x
, y
);
3812 /* If Y is representable exactly in a narrower mode, and the target can
3813 perform the extension directly from constant or memory, then emit the
3814 move as an extension. */
3817 compress_float_constant (rtx x
, rtx y
)
3819 machine_mode dstmode
= GET_MODE (x
);
3820 machine_mode orig_srcmode
= GET_MODE (y
);
3821 machine_mode srcmode
;
3822 const REAL_VALUE_TYPE
*r
;
3823 int oldcost
, newcost
;
3824 bool speed
= optimize_insn_for_speed_p ();
3826 r
= CONST_DOUBLE_REAL_VALUE (y
);
3828 if (targetm
.legitimate_constant_p (dstmode
, y
))
3829 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3831 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3833 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3837 rtx_insn
*last_insn
;
3839 /* Skip if the target can't extend this way. */
3840 ic
= can_extend_p (dstmode
, srcmode
, 0);
3841 if (ic
== CODE_FOR_nothing
)
3844 /* Skip if the narrowed value isn't exact. */
3845 if (! exact_real_truncate (srcmode
, r
))
3848 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3850 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3852 /* Skip if the target needs extra instructions to perform
3854 if (!insn_operand_matches (ic
, 1, trunc_y
))
3856 /* This is valid, but may not be cheaper than the original. */
3857 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3859 if (oldcost
< newcost
)
3862 else if (float_extend_from_mem
[dstmode
][srcmode
])
3864 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3865 /* This is valid, but may not be cheaper than the original. */
3866 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3868 if (oldcost
< newcost
)
3870 trunc_y
= validize_mem (trunc_y
);
3875 /* For CSE's benefit, force the compressed constant pool entry
3876 into a new pseudo. This constant may be used in different modes,
3877 and if not, combine will put things back together for us. */
3878 trunc_y
= force_reg (srcmode
, trunc_y
);
3880 /* If x is a hard register, perform the extension into a pseudo,
3881 so that e.g. stack realignment code is aware of it. */
3883 if (REG_P (x
) && HARD_REGISTER_P (x
))
3884 target
= gen_reg_rtx (dstmode
);
3886 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3887 last_insn
= get_last_insn ();
3890 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3893 return emit_move_insn (x
, target
);
3900 /* Pushing data onto the stack. */
3902 /* Push a block of length SIZE (perhaps variable)
3903 and return an rtx to address the beginning of the block.
3904 The value may be virtual_outgoing_args_rtx.
3906 EXTRA is the number of bytes of padding to push in addition to SIZE.
3907 BELOW nonzero means this padding comes at low addresses;
3908 otherwise, the padding comes at high addresses. */
3911 push_block (rtx size
, poly_int64 extra
, int below
)
3915 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3916 if (CONSTANT_P (size
))
3917 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3918 else if (REG_P (size
) && known_eq (extra
, 0))
3919 anti_adjust_stack (size
);
3922 temp
= copy_to_mode_reg (Pmode
, size
);
3923 if (maybe_ne (extra
, 0))
3924 temp
= expand_binop (Pmode
, add_optab
, temp
,
3925 gen_int_mode (extra
, Pmode
),
3926 temp
, 0, OPTAB_LIB_WIDEN
);
3927 anti_adjust_stack (temp
);
3930 if (STACK_GROWS_DOWNWARD
)
3932 temp
= virtual_outgoing_args_rtx
;
3933 if (maybe_ne (extra
, 0) && below
)
3934 temp
= plus_constant (Pmode
, temp
, extra
);
3939 if (poly_int_rtx_p (size
, &csize
))
3940 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3941 -csize
- (below
? 0 : extra
));
3942 else if (maybe_ne (extra
, 0) && !below
)
3943 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3944 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3947 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3948 negate_rtx (Pmode
, size
));
3951 return memory_address (NARROWEST_INT_MODE
, temp
);
3954 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3957 mem_autoinc_base (rtx mem
)
3961 rtx addr
= XEXP (mem
, 0);
3962 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3963 return XEXP (addr
, 0);
3968 /* A utility routine used here, in reload, and in try_split. The insns
3969 after PREV up to and including LAST are known to adjust the stack,
3970 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3971 placing notes as appropriate. PREV may be NULL, indicating the
3972 entire insn sequence prior to LAST should be scanned.
3974 The set of allowed stack pointer modifications is small:
3975 (1) One or more auto-inc style memory references (aka pushes),
3976 (2) One or more addition/subtraction with the SP as destination,
3977 (3) A single move insn with the SP as destination,
3978 (4) A call_pop insn,
3979 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3981 Insns in the sequence that do not modify the SP are ignored,
3982 except for noreturn calls.
3984 The return value is the amount of adjustment that can be trivially
3985 verified, via immediate operand or auto-inc. If the adjustment
3986 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3989 find_args_size_adjust (rtx_insn
*insn
)
3994 pat
= PATTERN (insn
);
3997 /* Look for a call_pop pattern. */
4000 /* We have to allow non-call_pop patterns for the case
4001 of emit_single_push_insn of a TLS address. */
4002 if (GET_CODE (pat
) != PARALLEL
)
4005 /* All call_pop have a stack pointer adjust in the parallel.
4006 The call itself is always first, and the stack adjust is
4007 usually last, so search from the end. */
4008 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4010 set
= XVECEXP (pat
, 0, i
);
4011 if (GET_CODE (set
) != SET
)
4013 dest
= SET_DEST (set
);
4014 if (dest
== stack_pointer_rtx
)
4017 /* We'd better have found the stack pointer adjust. */
4020 /* Fall through to process the extracted SET and DEST
4021 as if it was a standalone insn. */
4023 else if (GET_CODE (pat
) == SET
)
4025 else if ((set
= single_set (insn
)) != NULL
)
4027 else if (GET_CODE (pat
) == PARALLEL
)
4029 /* ??? Some older ports use a parallel with a stack adjust
4030 and a store for a PUSH_ROUNDING pattern, rather than a
4031 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4032 /* ??? See h8300 and m68k, pushqi1. */
4033 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4035 set
= XVECEXP (pat
, 0, i
);
4036 if (GET_CODE (set
) != SET
)
4038 dest
= SET_DEST (set
);
4039 if (dest
== stack_pointer_rtx
)
4042 /* We do not expect an auto-inc of the sp in the parallel. */
4043 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4044 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4045 != stack_pointer_rtx
);
4053 dest
= SET_DEST (set
);
4055 /* Look for direct modifications of the stack pointer. */
4056 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4058 /* Look for a trivial adjustment, otherwise assume nothing. */
4059 /* Note that the SPU restore_stack_block pattern refers to
4060 the stack pointer in V4SImode. Consider that non-trivial. */
4062 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4063 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4065 /* ??? Reload can generate no-op moves, which will be cleaned
4066 up later. Recognize it and continue searching. */
4067 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4070 return HOST_WIDE_INT_MIN
;
4076 /* Otherwise only think about autoinc patterns. */
4077 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4080 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4081 != stack_pointer_rtx
);
4083 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4084 mem
= SET_SRC (set
);
4088 addr
= XEXP (mem
, 0);
4089 switch (GET_CODE (addr
))
4093 return GET_MODE_SIZE (GET_MODE (mem
));
4096 return -GET_MODE_SIZE (GET_MODE (mem
));
4099 addr
= XEXP (addr
, 1);
4100 gcc_assert (GET_CODE (addr
) == PLUS
);
4101 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4102 return rtx_to_poly_int64 (XEXP (addr
, 1));
4110 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4111 poly_int64 end_args_size
)
4113 poly_int64 args_size
= end_args_size
;
4114 bool saw_unknown
= false;
4117 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4119 if (!NONDEBUG_INSN_P (insn
))
4122 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4123 a call argument containing a TLS address that itself requires
4124 a call to __tls_get_addr. The handling of stack_pointer_delta
4125 in emit_single_push_insn is supposed to ensure that any such
4126 notes are already correct. */
4127 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4128 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4130 poly_int64 this_delta
= find_args_size_adjust (insn
);
4131 if (known_eq (this_delta
, 0))
4134 || ACCUMULATE_OUTGOING_ARGS
4135 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4139 gcc_assert (!saw_unknown
);
4140 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4144 add_args_size_note (insn
, args_size
);
4145 if (STACK_GROWS_DOWNWARD
)
4146 this_delta
= -poly_uint64 (this_delta
);
4149 args_size
= HOST_WIDE_INT_MIN
;
4151 args_size
-= this_delta
;
4157 #ifdef PUSH_ROUNDING
4158 /* Emit single push insn. */
4161 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4164 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4166 enum insn_code icode
;
4168 /* If there is push pattern, use it. Otherwise try old way of throwing
4169 MEM representing push operation to move expander. */
4170 icode
= optab_handler (push_optab
, mode
);
4171 if (icode
!= CODE_FOR_nothing
)
4173 struct expand_operand ops
[1];
4175 create_input_operand (&ops
[0], x
, mode
);
4176 if (maybe_expand_insn (icode
, 1, ops
))
4179 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4180 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4181 /* If we are to pad downward, adjust the stack pointer first and
4182 then store X into the stack location using an offset. This is
4183 because emit_move_insn does not know how to pad; it does not have
4185 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4187 emit_move_insn (stack_pointer_rtx
,
4188 expand_binop (Pmode
,
4189 STACK_GROWS_DOWNWARD
? sub_optab
4192 gen_int_mode (rounded_size
, Pmode
),
4193 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4195 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4196 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4197 /* We have already decremented the stack pointer, so get the
4199 offset
+= rounded_size
;
4201 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4202 /* We have already incremented the stack pointer, so get the
4204 offset
-= rounded_size
;
4206 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4210 if (STACK_GROWS_DOWNWARD
)
4211 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4212 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4214 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4215 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4217 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4220 dest
= gen_rtx_MEM (mode
, dest_addr
);
4224 set_mem_attributes (dest
, type
, 1);
4226 if (cfun
->tail_call_marked
)
4227 /* Function incoming arguments may overlap with sibling call
4228 outgoing arguments and we cannot allow reordering of reads
4229 from function arguments with stores to outgoing arguments
4230 of sibling calls. */
4231 set_mem_alias_set (dest
, 0);
4233 emit_move_insn (dest
, x
);
4236 /* Emit and annotate a single push insn. */
4239 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4241 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4242 rtx_insn
*prev
= get_last_insn ();
4245 emit_single_push_insn_1 (mode
, x
, type
);
4247 /* Adjust stack_pointer_delta to describe the situation after the push
4248 we just performed. Note that we must do this after the push rather
4249 than before the push in case calculating X needs pushes and pops of
4250 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4251 for such pushes and pops must not include the effect of the future
4253 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4255 last
= get_last_insn ();
4257 /* Notice the common case where we emitted exactly one insn. */
4258 if (PREV_INSN (last
) == prev
)
4260 add_args_size_note (last
, stack_pointer_delta
);
4264 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4265 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4266 || known_eq (delta
, old_delta
));
4270 /* If reading SIZE bytes from X will end up reading from
4271 Y return the number of bytes that overlap. Return -1
4272 if there is no overlap or -2 if we can't determine
4273 (for example when X and Y have different base registers). */
4276 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4278 rtx tmp
= plus_constant (Pmode
, x
, size
);
4279 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4281 if (!CONST_INT_P (sub
))
4284 HOST_WIDE_INT val
= INTVAL (sub
);
4286 return IN_RANGE (val
, 1, size
) ? val
: -1;
4289 /* Generate code to push X onto the stack, assuming it has mode MODE and
4291 MODE is redundant except when X is a CONST_INT (since they don't
4293 SIZE is an rtx for the size of data to be copied (in bytes),
4294 needed only if X is BLKmode.
4295 Return true if successful. May return false if asked to push a
4296 partial argument during a sibcall optimization (as specified by
4297 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4300 ALIGN (in bits) is maximum alignment we can assume.
4302 If PARTIAL and REG are both nonzero, then copy that many of the first
4303 bytes of X into registers starting with REG, and push the rest of X.
4304 The amount of space pushed is decreased by PARTIAL bytes.
4305 REG must be a hard register in this case.
4306 If REG is zero but PARTIAL is not, take any all others actions for an
4307 argument partially in registers, but do not actually load any
4310 EXTRA is the amount in bytes of extra space to leave next to this arg.
4311 This is ignored if an argument block has already been allocated.
4313 On a machine that lacks real push insns, ARGS_ADDR is the address of
4314 the bottom of the argument block for this call. We use indexing off there
4315 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4316 argument block has not been preallocated.
4318 ARGS_SO_FAR is the size of args previously pushed for this call.
4320 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4321 for arguments passed in registers. If nonzero, it will be the number
4322 of bytes required. */
4325 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4326 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4327 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4328 rtx alignment_pad
, bool sibcall_p
)
4331 pad_direction stack_direction
4332 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4334 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4335 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4336 Default is below for small data on big-endian machines; else above. */
4337 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4339 /* Invert direction if stack is post-decrement.
4341 if (STACK_PUSH_CODE
== POST_DEC
)
4342 if (where_pad
!= PAD_NONE
)
4343 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4347 int nregs
= partial
/ UNITS_PER_WORD
;
4348 rtx
*tmp_regs
= NULL
;
4349 int overlapping
= 0;
4352 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4354 /* Copy a block into the stack, entirely or partially. */
4361 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4362 used
= partial
- offset
;
4364 if (mode
!= BLKmode
)
4366 /* A value is to be stored in an insufficiently aligned
4367 stack slot; copy via a suitably aligned slot if
4369 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4370 if (!MEM_P (xinner
))
4372 temp
= assign_temp (type
, 1, 1);
4373 emit_move_insn (temp
, xinner
);
4380 /* USED is now the # of bytes we need not copy to the stack
4381 because registers will take care of them. */
4384 xinner
= adjust_address (xinner
, BLKmode
, used
);
4386 /* If the partial register-part of the arg counts in its stack size,
4387 skip the part of stack space corresponding to the registers.
4388 Otherwise, start copying to the beginning of the stack space,
4389 by setting SKIP to 0. */
4390 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4392 #ifdef PUSH_ROUNDING
4393 /* Do it with several push insns if that doesn't take lots of insns
4394 and if there is no difficulty with push insns that skip bytes
4395 on the stack for alignment purposes. */
4398 && CONST_INT_P (size
)
4400 && MEM_ALIGN (xinner
) >= align
4401 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4402 /* Here we avoid the case of a structure whose weak alignment
4403 forces many pushes of a small amount of data,
4404 and such small pushes do rounding that causes trouble. */
4405 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4406 || align
>= BIGGEST_ALIGNMENT
4407 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4408 align
/ BITS_PER_UNIT
))
4409 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4411 /* Push padding now if padding above and stack grows down,
4412 or if padding below and stack grows up.
4413 But if space already allocated, this has already been done. */
4414 if (maybe_ne (extra
, 0)
4416 && where_pad
!= PAD_NONE
4417 && where_pad
!= stack_direction
)
4418 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4420 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4424 #endif /* PUSH_ROUNDING */
4428 /* Otherwise make space on the stack and copy the data
4429 to the address of that space. */
4431 /* Deduct words put into registers from the size we must copy. */
4434 if (CONST_INT_P (size
))
4435 size
= GEN_INT (INTVAL (size
) - used
);
4437 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4438 gen_int_mode (used
, GET_MODE (size
)),
4439 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4442 /* Get the address of the stack space.
4443 In this case, we do not deal with EXTRA separately.
4444 A single stack adjust will do. */
4448 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4451 else if (poly_int_rtx_p (args_so_far
, &offset
))
4452 temp
= memory_address (BLKmode
,
4453 plus_constant (Pmode
, args_addr
,
4456 temp
= memory_address (BLKmode
,
4457 plus_constant (Pmode
,
4458 gen_rtx_PLUS (Pmode
,
4463 if (!ACCUMULATE_OUTGOING_ARGS
)
4465 /* If the source is referenced relative to the stack pointer,
4466 copy it to another register to stabilize it. We do not need
4467 to do this if we know that we won't be changing sp. */
4469 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4470 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4471 temp
= copy_to_reg (temp
);
4474 target
= gen_rtx_MEM (BLKmode
, temp
);
4476 /* We do *not* set_mem_attributes here, because incoming arguments
4477 may overlap with sibling call outgoing arguments and we cannot
4478 allow reordering of reads from function arguments with stores
4479 to outgoing arguments of sibling calls. We do, however, want
4480 to record the alignment of the stack slot. */
4481 /* ALIGN may well be better aligned than TYPE, e.g. due to
4482 PARM_BOUNDARY. Assume the caller isn't lying. */
4483 set_mem_align (target
, align
);
4485 /* If part should go in registers and pushing to that part would
4486 overwrite some of the values that need to go into regs, load the
4487 overlapping values into temporary pseudos to be moved into the hard
4488 regs at the end after the stack pushing has completed.
4489 We cannot load them directly into the hard regs here because
4490 they can be clobbered by the block move expansions.
4493 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4494 && GET_CODE (reg
) != PARALLEL
)
4496 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4497 if (overlapping
> 0)
4499 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4500 overlapping
/= UNITS_PER_WORD
;
4502 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4504 for (int i
= 0; i
< overlapping
; i
++)
4505 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4507 for (int i
= 0; i
< overlapping
; i
++)
4508 emit_move_insn (tmp_regs
[i
],
4509 operand_subword_force (target
, i
, mode
));
4511 else if (overlapping
== -1)
4513 /* Could not determine whether there is overlap.
4514 Fail the sibcall. */
4522 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4525 else if (partial
> 0)
4527 /* Scalar partly in registers. This case is only supported
4528 for fixed-wdth modes. */
4529 int size
= GET_MODE_SIZE (mode
).to_constant ();
4530 size
/= UNITS_PER_WORD
;
4533 /* # bytes of start of argument
4534 that we must make space for but need not store. */
4535 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4536 int args_offset
= INTVAL (args_so_far
);
4539 /* Push padding now if padding above and stack grows down,
4540 or if padding below and stack grows up.
4541 But if space already allocated, this has already been done. */
4542 if (maybe_ne (extra
, 0)
4544 && where_pad
!= PAD_NONE
4545 && where_pad
!= stack_direction
)
4546 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4548 /* If we make space by pushing it, we might as well push
4549 the real data. Otherwise, we can leave OFFSET nonzero
4550 and leave the space uninitialized. */
4554 /* Now NOT_STACK gets the number of words that we don't need to
4555 allocate on the stack. Convert OFFSET to words too. */
4556 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4557 offset
/= UNITS_PER_WORD
;
4559 /* If the partial register-part of the arg counts in its stack size,
4560 skip the part of stack space corresponding to the registers.
4561 Otherwise, start copying to the beginning of the stack space,
4562 by setting SKIP to 0. */
4563 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4565 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4566 x
= validize_mem (force_const_mem (mode
, x
));
4568 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4569 SUBREGs of such registers are not allowed. */
4570 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4571 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4572 x
= copy_to_reg (x
);
4574 /* Loop over all the words allocated on the stack for this arg. */
4575 /* We can do it by words, because any scalar bigger than a word
4576 has a size a multiple of a word. */
4577 for (i
= size
- 1; i
>= not_stack
; i
--)
4578 if (i
>= not_stack
+ offset
)
4579 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4580 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4582 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4584 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4592 /* Push padding now if padding above and stack grows down,
4593 or if padding below and stack grows up.
4594 But if space already allocated, this has already been done. */
4595 if (maybe_ne (extra
, 0)
4597 && where_pad
!= PAD_NONE
4598 && where_pad
!= stack_direction
)
4599 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4601 #ifdef PUSH_ROUNDING
4602 if (args_addr
== 0 && PUSH_ARGS
)
4603 emit_single_push_insn (mode
, x
, type
);
4607 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4608 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4610 /* We do *not* set_mem_attributes here, because incoming arguments
4611 may overlap with sibling call outgoing arguments and we cannot
4612 allow reordering of reads from function arguments with stores
4613 to outgoing arguments of sibling calls. We do, however, want
4614 to record the alignment of the stack slot. */
4615 /* ALIGN may well be better aligned than TYPE, e.g. due to
4616 PARM_BOUNDARY. Assume the caller isn't lying. */
4617 set_mem_align (dest
, align
);
4619 emit_move_insn (dest
, x
);
4623 /* Move the partial arguments into the registers and any overlapping
4624 values that we moved into the pseudos in tmp_regs. */
4625 if (partial
> 0 && reg
!= 0)
4627 /* Handle calls that pass values in multiple non-contiguous locations.
4628 The Irix 6 ABI has examples of this. */
4629 if (GET_CODE (reg
) == PARALLEL
)
4630 emit_group_load (reg
, x
, type
, -1);
4633 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4634 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4636 for (int i
= 0; i
< overlapping
; i
++)
4637 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4638 + nregs
- overlapping
+ i
),
4644 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4645 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4647 if (alignment_pad
&& args_addr
== 0)
4648 anti_adjust_stack (alignment_pad
);
4653 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4657 get_subtarget (rtx x
)
4661 /* Only registers can be subtargets. */
4663 /* Don't use hard regs to avoid extending their life. */
4664 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4668 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4669 FIELD is a bitfield. Returns true if the optimization was successful,
4670 and there's nothing else to do. */
4673 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4674 poly_uint64 pbitpos
,
4675 poly_uint64 pbitregion_start
,
4676 poly_uint64 pbitregion_end
,
4677 machine_mode mode1
, rtx str_rtx
,
4678 tree to
, tree src
, bool reverse
)
4680 /* str_mode is not guaranteed to be a scalar type. */
4681 machine_mode str_mode
= GET_MODE (str_rtx
);
4682 unsigned int str_bitsize
;
4687 enum tree_code code
;
4689 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4690 if (mode1
!= VOIDmode
4691 || !pbitsize
.is_constant (&bitsize
)
4692 || !pbitpos
.is_constant (&bitpos
)
4693 || !pbitregion_start
.is_constant (&bitregion_start
)
4694 || !pbitregion_end
.is_constant (&bitregion_end
)
4695 || bitsize
>= BITS_PER_WORD
4696 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4697 || str_bitsize
> BITS_PER_WORD
4698 || TREE_SIDE_EFFECTS (to
)
4699 || TREE_THIS_VOLATILE (to
))
4703 if (TREE_CODE (src
) != SSA_NAME
)
4705 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4708 srcstmt
= get_gimple_for_ssa_name (src
);
4710 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4713 code
= gimple_assign_rhs_code (srcstmt
);
4715 op0
= gimple_assign_rhs1 (srcstmt
);
4717 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4718 to find its initialization. Hopefully the initialization will
4719 be from a bitfield load. */
4720 if (TREE_CODE (op0
) == SSA_NAME
)
4722 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4724 /* We want to eventually have OP0 be the same as TO, which
4725 should be a bitfield. */
4727 || !is_gimple_assign (op0stmt
)
4728 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4730 op0
= gimple_assign_rhs1 (op0stmt
);
4733 op1
= gimple_assign_rhs2 (srcstmt
);
4735 if (!operand_equal_p (to
, op0
, 0))
4738 if (MEM_P (str_rtx
))
4740 unsigned HOST_WIDE_INT offset1
;
4742 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4743 str_bitsize
= BITS_PER_WORD
;
4745 scalar_int_mode best_mode
;
4746 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4747 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4749 str_mode
= best_mode
;
4750 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4753 bitpos
%= str_bitsize
;
4754 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4755 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4757 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4760 /* If the bit field covers the whole REG/MEM, store_field
4761 will likely generate better code. */
4762 if (bitsize
>= str_bitsize
)
4765 /* We can't handle fields split across multiple entities. */
4766 if (bitpos
+ bitsize
> str_bitsize
)
4769 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4770 bitpos
= str_bitsize
- bitpos
- bitsize
;
4776 /* For now, just optimize the case of the topmost bitfield
4777 where we don't need to do any masking and also
4778 1 bit bitfields where xor can be used.
4779 We might win by one instruction for the other bitfields
4780 too if insv/extv instructions aren't used, so that
4781 can be added later. */
4782 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4783 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4786 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4787 value
= convert_modes (str_mode
,
4788 TYPE_MODE (TREE_TYPE (op1
)), value
,
4789 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4791 /* We may be accessing data outside the field, which means
4792 we can alias adjacent data. */
4793 if (MEM_P (str_rtx
))
4795 str_rtx
= shallow_copy_rtx (str_rtx
);
4796 set_mem_alias_set (str_rtx
, 0);
4797 set_mem_expr (str_rtx
, 0);
4800 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4802 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4806 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4808 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4810 value
= flip_storage_order (str_mode
, value
);
4811 result
= expand_binop (str_mode
, binop
, str_rtx
,
4812 value
, str_rtx
, 1, OPTAB_WIDEN
);
4813 if (result
!= str_rtx
)
4814 emit_move_insn (str_rtx
, result
);
4819 if (TREE_CODE (op1
) != INTEGER_CST
)
4821 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4822 value
= convert_modes (str_mode
,
4823 TYPE_MODE (TREE_TYPE (op1
)), value
,
4824 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4826 /* We may be accessing data outside the field, which means
4827 we can alias adjacent data. */
4828 if (MEM_P (str_rtx
))
4830 str_rtx
= shallow_copy_rtx (str_rtx
);
4831 set_mem_alias_set (str_rtx
, 0);
4832 set_mem_expr (str_rtx
, 0);
4835 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4836 if (bitpos
+ bitsize
!= str_bitsize
)
4838 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4840 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4842 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4844 value
= flip_storage_order (str_mode
, value
);
4845 result
= expand_binop (str_mode
, binop
, str_rtx
,
4846 value
, str_rtx
, 1, OPTAB_WIDEN
);
4847 if (result
!= str_rtx
)
4848 emit_move_insn (str_rtx
, result
);
4858 /* In the C++ memory model, consecutive bit fields in a structure are
4859 considered one memory location.
4861 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4862 returns the bit range of consecutive bits in which this COMPONENT_REF
4863 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4864 and *OFFSET may be adjusted in the process.
4866 If the access does not need to be restricted, 0 is returned in both
4867 *BITSTART and *BITEND. */
4870 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4871 poly_int64_pod
*bitpos
, tree
*offset
)
4873 poly_int64 bitoffset
;
4876 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4878 field
= TREE_OPERAND (exp
, 1);
4879 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4880 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4881 need to limit the range we can access. */
4884 *bitstart
= *bitend
= 0;
4888 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4889 part of a larger bit field, then the representative does not serve any
4890 useful purpose. This can occur in Ada. */
4891 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4894 poly_int64 rbitsize
, rbitpos
;
4896 int unsignedp
, reversep
, volatilep
= 0;
4897 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4898 &roffset
, &rmode
, &unsignedp
, &reversep
,
4900 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4902 *bitstart
= *bitend
= 0;
4907 /* Compute the adjustment to bitpos from the offset of the field
4908 relative to the representative. DECL_FIELD_OFFSET of field and
4909 repr are the same by construction if they are not constants,
4910 see finish_bitfield_layout. */
4911 poly_uint64 field_offset
, repr_offset
;
4912 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4913 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4914 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4917 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4918 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4920 /* If the adjustment is larger than bitpos, we would have a negative bit
4921 position for the lower bound and this may wreak havoc later. Adjust
4922 offset and bitpos to make the lower bound non-negative in that case. */
4923 if (maybe_gt (bitoffset
, *bitpos
))
4925 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4926 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4928 *bitpos
+= adjust_bits
;
4929 if (*offset
== NULL_TREE
)
4930 *offset
= size_int (-adjust_bytes
);
4932 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4936 *bitstart
= *bitpos
- bitoffset
;
4938 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
4941 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4942 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4943 DECL_RTL was not set yet, return NORTL. */
4946 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4948 if (TREE_CODE (addr
) != ADDR_EXPR
)
4951 tree base
= TREE_OPERAND (addr
, 0);
4954 || TREE_ADDRESSABLE (base
)
4955 || DECL_MODE (base
) == BLKmode
)
4958 if (!DECL_RTL_SET_P (base
))
4961 return (!MEM_P (DECL_RTL (base
)));
4964 /* Returns true if the MEM_REF REF refers to an object that does not
4965 reside in memory and has non-BLKmode. */
4968 mem_ref_refers_to_non_mem_p (tree ref
)
4970 tree base
= TREE_OPERAND (ref
, 0);
4971 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4974 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4975 is true, try generating a nontemporal store. */
4978 expand_assignment (tree to
, tree from
, bool nontemporal
)
4984 enum insn_code icode
;
4986 /* Don't crash if the lhs of the assignment was erroneous. */
4987 if (TREE_CODE (to
) == ERROR_MARK
)
4989 expand_normal (from
);
4993 /* Optimize away no-op moves without side-effects. */
4994 if (operand_equal_p (to
, from
, 0))
4997 /* Handle misaligned stores. */
4998 mode
= TYPE_MODE (TREE_TYPE (to
));
4999 if ((TREE_CODE (to
) == MEM_REF
5000 || TREE_CODE (to
) == TARGET_MEM_REF
)
5002 && !mem_ref_refers_to_non_mem_p (to
)
5003 && ((align
= get_object_alignment (to
))
5004 < GET_MODE_ALIGNMENT (mode
))
5005 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5006 != CODE_FOR_nothing
)
5007 || targetm
.slow_unaligned_access (mode
, align
)))
5011 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5012 reg
= force_not_mem (reg
);
5013 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5014 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5015 reg
= flip_storage_order (mode
, reg
);
5017 if (icode
!= CODE_FOR_nothing
)
5019 struct expand_operand ops
[2];
5021 create_fixed_operand (&ops
[0], mem
);
5022 create_input_operand (&ops
[1], reg
, mode
);
5023 /* The movmisalign<mode> pattern cannot fail, else the assignment
5024 would silently be omitted. */
5025 expand_insn (icode
, 2, ops
);
5028 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5033 /* Assignment of a structure component needs special treatment
5034 if the structure component's rtx is not simply a MEM.
5035 Assignment of an array element at a constant index, and assignment of
5036 an array element in an unaligned packed structure field, has the same
5037 problem. Same for (partially) storing into a non-memory object. */
5038 if (handled_component_p (to
)
5039 || (TREE_CODE (to
) == MEM_REF
5040 && (REF_REVERSE_STORAGE_ORDER (to
)
5041 || mem_ref_refers_to_non_mem_p (to
)))
5042 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5045 poly_int64 bitsize
, bitpos
;
5046 poly_uint64 bitregion_start
= 0;
5047 poly_uint64 bitregion_end
= 0;
5049 int unsignedp
, reversep
, volatilep
= 0;
5053 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5054 &unsignedp
, &reversep
, &volatilep
);
5056 /* Make sure bitpos is not negative, it can wreak havoc later. */
5057 if (maybe_lt (bitpos
, 0))
5059 gcc_assert (offset
== NULL_TREE
);
5060 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5061 bitpos
= num_trailing_bits (bitpos
);
5064 if (TREE_CODE (to
) == COMPONENT_REF
5065 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5066 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5067 /* The C++ memory model naturally applies to byte-aligned fields.
5068 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5069 BITSIZE are not byte-aligned, there is no need to limit the range
5070 we can access. This can occur with packed structures in Ada. */
5071 else if (maybe_gt (bitsize
, 0)
5072 && multiple_p (bitsize
, BITS_PER_UNIT
)
5073 && multiple_p (bitpos
, BITS_PER_UNIT
))
5075 bitregion_start
= bitpos
;
5076 bitregion_end
= bitpos
+ bitsize
- 1;
5079 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5081 /* If the field has a mode, we want to access it in the
5082 field's mode, not the computed mode.
5083 If a MEM has VOIDmode (external with incomplete type),
5084 use BLKmode for it instead. */
5087 if (mode1
!= VOIDmode
)
5088 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5089 else if (GET_MODE (to_rtx
) == VOIDmode
)
5090 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5095 machine_mode address_mode
;
5098 if (!MEM_P (to_rtx
))
5100 /* We can get constant negative offsets into arrays with broken
5101 user code. Translate this to a trap instead of ICEing. */
5102 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5103 expand_builtin_trap ();
5104 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5107 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5108 address_mode
= get_address_mode (to_rtx
);
5109 if (GET_MODE (offset_rtx
) != address_mode
)
5111 /* We cannot be sure that the RTL in offset_rtx is valid outside
5112 of a memory address context, so force it into a register
5113 before attempting to convert it to the desired mode. */
5114 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5115 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5118 /* If we have an expression in OFFSET_RTX and a non-zero
5119 byte offset in BITPOS, adding the byte offset before the
5120 OFFSET_RTX results in better intermediate code, which makes
5121 later rtl optimization passes perform better.
5123 We prefer intermediate code like this:
5125 r124:DI=r123:DI+0x18
5130 r124:DI=r123:DI+0x10
5131 [r124:DI+0x8]=r121:DI
5133 This is only done for aligned data values, as these can
5134 be expected to result in single move instructions. */
5136 if (mode1
!= VOIDmode
5137 && maybe_ne (bitpos
, 0)
5138 && maybe_gt (bitsize
, 0)
5139 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5140 && multiple_p (bitpos
, bitsize
)
5141 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5142 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5144 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5145 bitregion_start
= 0;
5146 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5147 bitregion_end
-= bitpos
;
5151 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5152 highest_pow2_factor_for_target (to
,
5156 /* No action is needed if the target is not a memory and the field
5157 lies completely outside that target. This can occur if the source
5158 code contains an out-of-bounds access to a small array. */
5160 && GET_MODE (to_rtx
) != BLKmode
5161 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5163 expand_normal (from
);
5166 /* Handle expand_expr of a complex value returning a CONCAT. */
5167 else if (GET_CODE (to_rtx
) == CONCAT
)
5169 machine_mode to_mode
= GET_MODE (to_rtx
);
5170 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5171 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5172 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5173 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5174 && known_eq (bitpos
, 0)
5175 && known_eq (bitsize
, mode_bitsize
))
5176 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5177 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5178 && known_eq (bitsize
, inner_bitsize
)
5179 && (known_eq (bitpos
, 0)
5180 || known_eq (bitpos
, inner_bitsize
)))
5181 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5182 false, nontemporal
, reversep
);
5183 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5184 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5185 bitregion_start
, bitregion_end
,
5186 mode1
, from
, get_alias_set (to
),
5187 nontemporal
, reversep
);
5188 else if (known_ge (bitpos
, inner_bitsize
))
5189 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5190 bitpos
- inner_bitsize
,
5191 bitregion_start
, bitregion_end
,
5192 mode1
, from
, get_alias_set (to
),
5193 nontemporal
, reversep
);
5194 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5196 result
= expand_normal (from
);
5197 if (GET_CODE (result
) == CONCAT
)
5199 to_mode
= GET_MODE_INNER (to_mode
);
5200 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5202 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5205 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5207 if (!from_real
|| !from_imag
)
5208 goto concat_store_slow
;
5209 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5210 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5216 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
5219 = simplify_gen_subreg (to_mode
, result
,
5220 TYPE_MODE (TREE_TYPE (from
)), 0);
5223 emit_move_insn (XEXP (to_rtx
, 0),
5224 read_complex_part (from_rtx
, false));
5225 emit_move_insn (XEXP (to_rtx
, 1),
5226 read_complex_part (from_rtx
, true));
5230 machine_mode to_mode
5231 = GET_MODE_INNER (GET_MODE (to_rtx
));
5233 = simplify_gen_subreg (to_mode
, result
,
5234 TYPE_MODE (TREE_TYPE (from
)),
5237 = simplify_gen_subreg (to_mode
, result
,
5238 TYPE_MODE (TREE_TYPE (from
)),
5239 GET_MODE_SIZE (to_mode
));
5240 if (!from_real
|| !from_imag
)
5241 goto concat_store_slow
;
5242 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5243 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5250 rtx temp
= assign_stack_temp (to_mode
,
5251 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5252 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5253 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5254 result
= store_field (temp
, bitsize
, bitpos
,
5255 bitregion_start
, bitregion_end
,
5256 mode1
, from
, get_alias_set (to
),
5257 nontemporal
, reversep
);
5258 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5259 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5262 /* For calls to functions returning variable length structures, if TO_RTX
5263 is not a MEM, go through a MEM because we must not create temporaries
5265 else if (!MEM_P (to_rtx
)
5266 && TREE_CODE (from
) == CALL_EXPR
5267 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5268 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5270 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5271 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5272 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5273 bitregion_end
, mode1
, from
, get_alias_set (to
),
5274 nontemporal
, reversep
);
5275 emit_move_insn (to_rtx
, temp
);
5281 /* If the field is at offset zero, we could have been given the
5282 DECL_RTX of the parent struct. Don't munge it. */
5283 to_rtx
= shallow_copy_rtx (to_rtx
);
5284 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5286 MEM_VOLATILE_P (to_rtx
) = 1;
5289 gcc_checking_assert (known_ge (bitpos
, 0));
5290 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5291 bitregion_start
, bitregion_end
,
5292 mode1
, to_rtx
, to
, from
,
5296 result
= store_field (to_rtx
, bitsize
, bitpos
,
5297 bitregion_start
, bitregion_end
,
5298 mode1
, from
, get_alias_set (to
),
5299 nontemporal
, reversep
);
5303 preserve_temp_slots (result
);
5308 /* If the rhs is a function call and its value is not an aggregate,
5309 call the function before we start to compute the lhs.
5310 This is needed for correct code for cases such as
5311 val = setjmp (buf) on machines where reference to val
5312 requires loading up part of an address in a separate insn.
5314 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5315 since it might be a promoted variable where the zero- or sign- extension
5316 needs to be done. Handling this in the normal way is safe because no
5317 computation is done before the call. The same is true for SSA names. */
5318 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5319 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5320 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5322 || TREE_CODE (to
) == PARM_DECL
5323 || TREE_CODE (to
) == RESULT_DECL
)
5324 && REG_P (DECL_RTL (to
)))
5325 || TREE_CODE (to
) == SSA_NAME
))
5330 value
= expand_normal (from
);
5333 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5335 /* Handle calls that return values in multiple non-contiguous locations.
5336 The Irix 6 ABI has examples of this. */
5337 if (GET_CODE (to_rtx
) == PARALLEL
)
5339 if (GET_CODE (value
) == PARALLEL
)
5340 emit_group_move (to_rtx
, value
);
5342 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5343 int_size_in_bytes (TREE_TYPE (from
)));
5345 else if (GET_CODE (value
) == PARALLEL
)
5346 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5347 int_size_in_bytes (TREE_TYPE (from
)));
5348 else if (GET_MODE (to_rtx
) == BLKmode
)
5350 /* Handle calls that return BLKmode values in registers. */
5352 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5354 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5358 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5359 value
= convert_memory_address_addr_space
5360 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5361 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5363 emit_move_insn (to_rtx
, value
);
5366 preserve_temp_slots (to_rtx
);
5371 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5372 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5374 /* Don't move directly into a return register. */
5375 if (TREE_CODE (to
) == RESULT_DECL
5376 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5382 /* If the source is itself a return value, it still is in a pseudo at
5383 this point so we can move it back to the return register directly. */
5385 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5386 && TREE_CODE (from
) != CALL_EXPR
)
5387 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5389 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5391 /* Handle calls that return values in multiple non-contiguous locations.
5392 The Irix 6 ABI has examples of this. */
5393 if (GET_CODE (to_rtx
) == PARALLEL
)
5395 if (GET_CODE (temp
) == PARALLEL
)
5396 emit_group_move (to_rtx
, temp
);
5398 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5399 int_size_in_bytes (TREE_TYPE (from
)));
5402 emit_move_insn (to_rtx
, temp
);
5404 preserve_temp_slots (to_rtx
);
5409 /* In case we are returning the contents of an object which overlaps
5410 the place the value is being stored, use a safe function when copying
5411 a value through a pointer into a structure value return block. */
5412 if (TREE_CODE (to
) == RESULT_DECL
5413 && TREE_CODE (from
) == INDIRECT_REF
5414 && ADDR_SPACE_GENERIC_P
5415 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5416 && refs_may_alias_p (to
, from
)
5417 && cfun
->returns_struct
5418 && !cfun
->returns_pcc_struct
)
5423 size
= expr_size (from
);
5424 from_rtx
= expand_normal (from
);
5426 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5428 preserve_temp_slots (to_rtx
);
5433 /* Compute FROM and store the value in the rtx we got. */
5436 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5437 preserve_temp_slots (result
);
5442 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5443 succeeded, false otherwise. */
5446 emit_storent_insn (rtx to
, rtx from
)
5448 struct expand_operand ops
[2];
5449 machine_mode mode
= GET_MODE (to
);
5450 enum insn_code code
= optab_handler (storent_optab
, mode
);
5452 if (code
== CODE_FOR_nothing
)
5455 create_fixed_operand (&ops
[0], to
);
5456 create_input_operand (&ops
[1], from
, mode
);
5457 return maybe_expand_insn (code
, 2, ops
);
5460 /* Helper function for store_expr storing of STRING_CST. */
5463 string_cst_read_str (void *data
, HOST_WIDE_INT offset
, scalar_int_mode mode
)
5465 tree str
= (tree
) data
;
5467 gcc_assert (offset
>= 0);
5468 if (offset
>= TREE_STRING_LENGTH (str
))
5471 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
5472 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
5474 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
5475 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
5476 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
5477 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
5478 return c_readstr (p
, mode
, false);
5481 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
5484 /* Generate code for computing expression EXP,
5485 and storing the value into TARGET.
5487 If the mode is BLKmode then we may return TARGET itself.
5488 It turns out that in BLKmode it doesn't cause a problem.
5489 because C has no operators that could combine two different
5490 assignments into the same BLKmode object with different values
5491 with no sequence point. Will other languages need this to
5494 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5495 stack, and block moves may need to be treated specially.
5497 If NONTEMPORAL is true, try using a nontemporal store instruction.
5499 If REVERSE is true, the store is to be done in reverse order. */
5502 store_expr (tree exp
, rtx target
, int call_param_p
,
5503 bool nontemporal
, bool reverse
)
5506 rtx alt_rtl
= NULL_RTX
;
5507 location_t loc
= curr_insn_location ();
5509 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5511 /* C++ can generate ?: expressions with a throw expression in one
5512 branch and an rvalue in the other. Here, we resolve attempts to
5513 store the throw expression's nonexistent result. */
5514 gcc_assert (!call_param_p
);
5515 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5518 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5520 /* Perform first part of compound expression, then assign from second
5522 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5523 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5524 return store_expr (TREE_OPERAND (exp
, 1), target
,
5525 call_param_p
, nontemporal
, reverse
);
5527 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5529 /* For conditional expression, get safe form of the target. Then
5530 test the condition, doing the appropriate assignment on either
5531 side. This avoids the creation of unnecessary temporaries.
5532 For non-BLKmode, it is more efficient not to do this. */
5534 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5536 do_pending_stack_adjust ();
5538 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5539 profile_probability::uninitialized ());
5540 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5541 nontemporal
, reverse
);
5542 emit_jump_insn (targetm
.gen_jump (lab2
));
5545 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5546 nontemporal
, reverse
);
5552 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5553 /* If this is a scalar in a register that is stored in a wider mode
5554 than the declared mode, compute the result into its declared mode
5555 and then convert to the wider mode. Our value is the computed
5558 rtx inner_target
= 0;
5559 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5560 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5562 /* We can do the conversion inside EXP, which will often result
5563 in some optimizations. Do the conversion in two steps: first
5564 change the signedness, if needed, then the extend. But don't
5565 do this if the type of EXP is a subtype of something else
5566 since then the conversion might involve more than just
5567 converting modes. */
5568 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5569 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5570 && GET_MODE_PRECISION (outer_mode
)
5571 == TYPE_PRECISION (TREE_TYPE (exp
)))
5573 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5574 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5576 /* Some types, e.g. Fortran's logical*4, won't have a signed
5577 version, so use the mode instead. */
5579 = (signed_or_unsigned_type_for
5580 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5582 ntype
= lang_hooks
.types
.type_for_mode
5583 (TYPE_MODE (TREE_TYPE (exp
)),
5584 SUBREG_PROMOTED_SIGN (target
));
5586 exp
= fold_convert_loc (loc
, ntype
, exp
);
5589 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5590 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5593 inner_target
= SUBREG_REG (target
);
5596 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5597 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5600 /* If TEMP is a VOIDmode constant, use convert_modes to make
5601 sure that we properly convert it. */
5602 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5604 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5605 temp
, SUBREG_PROMOTED_SIGN (target
));
5606 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5607 SUBREG_PROMOTED_SIGN (target
));
5610 convert_move (SUBREG_REG (target
), temp
,
5611 SUBREG_PROMOTED_SIGN (target
));
5615 else if ((TREE_CODE (exp
) == STRING_CST
5616 || (TREE_CODE (exp
) == MEM_REF
5617 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5618 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5620 && integer_zerop (TREE_OPERAND (exp
, 1))))
5621 && !nontemporal
&& !call_param_p
5624 /* Optimize initialization of an array with a STRING_CST. */
5625 HOST_WIDE_INT exp_len
, str_copy_len
;
5627 tree str
= TREE_CODE (exp
) == STRING_CST
5628 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5630 exp_len
= int_expr_size (exp
);
5634 if (TREE_STRING_LENGTH (str
) <= 0)
5637 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
5638 MEM_ALIGN (target
), false))
5640 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
5641 MEM_ALIGN (target
), false, RETURN_BEGIN
);
5645 str_copy_len
= TREE_STRING_LENGTH (str
);
5646 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
5648 str_copy_len
+= STORE_MAX_PIECES
- 1;
5649 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5651 if (str_copy_len
>= exp_len
)
5654 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
5655 (void *) str
, MEM_ALIGN (target
), false))
5658 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
5659 (void *) str
, MEM_ALIGN (target
), false,
5661 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
5662 exp_len
- str_copy_len
),
5663 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
5671 /* If we want to use a nontemporal or a reverse order store, force the
5672 value into a register first. */
5673 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5674 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5676 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5680 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5681 the same as that of TARGET, adjust the constant. This is needed, for
5682 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5683 only a word-sized value. */
5684 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5685 && TREE_CODE (exp
) != ERROR_MARK
5686 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5688 if (GET_MODE_CLASS (GET_MODE (target
))
5689 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5690 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5691 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5693 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5694 TYPE_MODE (TREE_TYPE (exp
)), 0);
5698 if (GET_MODE (temp
) == VOIDmode
)
5699 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5700 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5703 /* If value was not generated in the target, store it there.
5704 Convert the value to TARGET's type first if necessary and emit the
5705 pending incrementations that have been queued when expanding EXP.
5706 Note that we cannot emit the whole queue blindly because this will
5707 effectively disable the POST_INC optimization later.
5709 If TEMP and TARGET compare equal according to rtx_equal_p, but
5710 one or both of them are volatile memory refs, we have to distinguish
5712 - expand_expr has used TARGET. In this case, we must not generate
5713 another copy. This can be detected by TARGET being equal according
5715 - expand_expr has not used TARGET - that means that the source just
5716 happens to have the same RTX form. Since temp will have been created
5717 by expand_expr, it will compare unequal according to == .
5718 We must generate a copy in this case, to reach the correct number
5719 of volatile memory references. */
5721 if ((! rtx_equal_p (temp
, target
)
5722 || (temp
!= target
&& (side_effects_p (temp
)
5723 || side_effects_p (target
))))
5724 && TREE_CODE (exp
) != ERROR_MARK
5725 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5726 but TARGET is not valid memory reference, TEMP will differ
5727 from TARGET although it is really the same location. */
5729 && rtx_equal_p (alt_rtl
, target
)
5730 && !side_effects_p (alt_rtl
)
5731 && !side_effects_p (target
))
5732 /* If there's nothing to copy, don't bother. Don't call
5733 expr_size unless necessary, because some front-ends (C++)
5734 expr_size-hook must not be given objects that are not
5735 supposed to be bit-copied or bit-initialized. */
5736 && expr_size (exp
) != const0_rtx
)
5738 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5740 if (GET_MODE (target
) == BLKmode
)
5742 /* Handle calls that return BLKmode values in registers. */
5743 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5744 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5746 store_bit_field (target
,
5747 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5748 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5751 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5754 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5756 /* Handle copying a string constant into an array. The string
5757 constant may be shorter than the array. So copy just the string's
5758 actual length, and clear the rest. First get the size of the data
5759 type of the string, which is actually the size of the target. */
5760 rtx size
= expr_size (exp
);
5762 if (CONST_INT_P (size
)
5763 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5764 emit_block_move (target
, temp
, size
,
5766 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5769 machine_mode pointer_mode
5770 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5771 machine_mode address_mode
= get_address_mode (target
);
5773 /* Compute the size of the data to copy from the string. */
5775 = size_binop_loc (loc
, MIN_EXPR
,
5776 make_tree (sizetype
, size
),
5777 size_int (TREE_STRING_LENGTH (exp
)));
5779 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5781 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5782 rtx_code_label
*label
= 0;
5784 /* Copy that much. */
5785 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5786 TYPE_UNSIGNED (sizetype
));
5787 emit_block_move (target
, temp
, copy_size_rtx
,
5789 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5791 /* Figure out how much is left in TARGET that we have to clear.
5792 Do all calculations in pointer_mode. */
5793 poly_int64 const_copy_size
;
5794 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
5796 size
= plus_constant (address_mode
, size
, -const_copy_size
);
5797 target
= adjust_address (target
, BLKmode
, const_copy_size
);
5801 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5802 copy_size_rtx
, NULL_RTX
, 0,
5805 if (GET_MODE (copy_size_rtx
) != address_mode
)
5806 copy_size_rtx
= convert_to_mode (address_mode
,
5808 TYPE_UNSIGNED (sizetype
));
5810 target
= offset_address (target
, copy_size_rtx
,
5811 highest_pow2_factor (copy_size
));
5812 label
= gen_label_rtx ();
5813 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5814 GET_MODE (size
), 0, label
);
5817 if (size
!= const0_rtx
)
5818 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5824 /* Handle calls that return values in multiple non-contiguous locations.
5825 The Irix 6 ABI has examples of this. */
5826 else if (GET_CODE (target
) == PARALLEL
)
5828 if (GET_CODE (temp
) == PARALLEL
)
5829 emit_group_move (target
, temp
);
5831 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5832 int_size_in_bytes (TREE_TYPE (exp
)));
5834 else if (GET_CODE (temp
) == PARALLEL
)
5835 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5836 int_size_in_bytes (TREE_TYPE (exp
)));
5837 else if (GET_MODE (temp
) == BLKmode
)
5838 emit_block_move (target
, temp
, expr_size (exp
),
5840 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5841 /* If we emit a nontemporal store, there is nothing else to do. */
5842 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5847 temp
= flip_storage_order (GET_MODE (target
), temp
);
5848 temp
= force_operand (temp
, target
);
5850 emit_move_insn (target
, temp
);
5857 /* Return true if field F of structure TYPE is a flexible array. */
5860 flexible_array_member_p (const_tree f
, const_tree type
)
5865 return (DECL_CHAIN (f
) == NULL
5866 && TREE_CODE (tf
) == ARRAY_TYPE
5868 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5869 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5870 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5871 && int_size_in_bytes (type
) >= 0);
5874 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5875 must have in order for it to completely initialize a value of type TYPE.
5876 Return -1 if the number isn't known.
5878 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5880 static HOST_WIDE_INT
5881 count_type_elements (const_tree type
, bool for_ctor_p
)
5883 switch (TREE_CODE (type
))
5889 nelts
= array_type_nelts (type
);
5890 if (nelts
&& tree_fits_uhwi_p (nelts
))
5892 unsigned HOST_WIDE_INT n
;
5894 n
= tree_to_uhwi (nelts
) + 1;
5895 if (n
== 0 || for_ctor_p
)
5898 return n
* count_type_elements (TREE_TYPE (type
), false);
5900 return for_ctor_p
? -1 : 1;
5905 unsigned HOST_WIDE_INT n
;
5909 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5910 if (TREE_CODE (f
) == FIELD_DECL
)
5913 n
+= count_type_elements (TREE_TYPE (f
), false);
5914 else if (!flexible_array_member_p (f
, type
))
5915 /* Don't count flexible arrays, which are not supposed
5916 to be initialized. */
5924 case QUAL_UNION_TYPE
:
5929 gcc_assert (!for_ctor_p
);
5930 /* Estimate the number of scalars in each field and pick the
5931 maximum. Other estimates would do instead; the idea is simply
5932 to make sure that the estimate is not sensitive to the ordering
5935 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5936 if (TREE_CODE (f
) == FIELD_DECL
)
5938 m
= count_type_elements (TREE_TYPE (f
), false);
5939 /* If the field doesn't span the whole union, add an extra
5940 scalar for the rest. */
5941 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5942 TYPE_SIZE (type
)) != 1)
5955 unsigned HOST_WIDE_INT nelts
;
5956 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
5964 case FIXED_POINT_TYPE
:
5969 case REFERENCE_TYPE
:
5985 /* Helper for categorize_ctor_elements. Identical interface. */
5988 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5989 HOST_WIDE_INT
*p_unique_nz_elts
,
5990 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5992 unsigned HOST_WIDE_INT idx
;
5993 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
5994 tree value
, purpose
, elt_type
;
5996 /* Whether CTOR is a valid constant initializer, in accordance with what
5997 initializer_constant_valid_p does. If inferred from the constructor
5998 elements, true until proven otherwise. */
5999 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
6000 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6006 elt_type
= NULL_TREE
;
6008 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6010 HOST_WIDE_INT mult
= 1;
6012 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6014 tree lo_index
= TREE_OPERAND (purpose
, 0);
6015 tree hi_index
= TREE_OPERAND (purpose
, 1);
6017 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6018 mult
= (tree_to_uhwi (hi_index
)
6019 - tree_to_uhwi (lo_index
) + 1);
6022 elt_type
= TREE_TYPE (value
);
6024 switch (TREE_CODE (value
))
6028 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6030 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6033 nz_elts
+= mult
* nz
;
6034 unique_nz_elts
+= unz
;
6035 init_elts
+= mult
* ic
;
6037 if (const_from_elts_p
&& const_p
)
6038 const_p
= const_elt_p
;
6045 if (!initializer_zerop (value
))
6054 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6055 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6056 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6060 if (!initializer_zerop (TREE_REALPART (value
)))
6065 if (!initializer_zerop (TREE_IMAGPART (value
)))
6070 init_elts
+= 2 * mult
;
6075 /* We can only construct constant-length vectors using
6077 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6078 for (unsigned int i
= 0; i
< nunits
; ++i
)
6080 tree v
= VECTOR_CST_ELT (value
, i
);
6081 if (!initializer_zerop (v
))
6093 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6094 nz_elts
+= mult
* tc
;
6095 unique_nz_elts
+= tc
;
6096 init_elts
+= mult
* tc
;
6098 if (const_from_elts_p
&& const_p
)
6100 = initializer_constant_valid_p (value
,
6102 TYPE_REVERSE_STORAGE_ORDER
6110 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6111 num_fields
, elt_type
))
6112 *p_complete
= false;
6114 *p_nz_elts
+= nz_elts
;
6115 *p_unique_nz_elts
+= unique_nz_elts
;
6116 *p_init_elts
+= init_elts
;
6121 /* Examine CTOR to discover:
6122 * how many scalar fields are set to nonzero values,
6123 and place it in *P_NZ_ELTS;
6124 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6125 high - low + 1 (this can be useful for callers to determine ctors
6126 that could be cheaply initialized with - perhaps nested - loops
6127 compared to copied from huge read-only data),
6128 and place it in *P_UNIQUE_NZ_ELTS;
6129 * how many scalar fields in total are in CTOR,
6130 and place it in *P_ELT_COUNT.
6131 * whether the constructor is complete -- in the sense that every
6132 meaningful byte is explicitly given a value --
6133 and place it in *P_COMPLETE.
6135 Return whether or not CTOR is a valid static constant initializer, the same
6136 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6139 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6140 HOST_WIDE_INT
*p_unique_nz_elts
,
6141 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6144 *p_unique_nz_elts
= 0;
6148 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6149 p_init_elts
, p_complete
);
6152 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6153 of which had type LAST_TYPE. Each element was itself a complete
6154 initializer, in the sense that every meaningful byte was explicitly
6155 given a value. Return true if the same is true for the constructor
6159 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6160 const_tree last_type
)
6162 if (TREE_CODE (type
) == UNION_TYPE
6163 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6168 gcc_assert (num_elts
== 1 && last_type
);
6170 /* ??? We could look at each element of the union, and find the
6171 largest element. Which would avoid comparing the size of the
6172 initialized element against any tail padding in the union.
6173 Doesn't seem worth the effort... */
6174 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6177 return count_type_elements (type
, true) == num_elts
;
6180 /* Return 1 if EXP contains mostly (3/4) zeros. */
6183 mostly_zeros_p (const_tree exp
)
6185 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6187 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6190 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6192 return !complete_p
|| nz_elts
< init_elts
/ 4;
6195 return initializer_zerop (exp
);
6198 /* Return 1 if EXP contains all zeros. */
6201 all_zeros_p (const_tree exp
)
6203 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6205 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6208 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6210 return nz_elts
== 0;
6213 return initializer_zerop (exp
);
6216 /* Helper function for store_constructor.
6217 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6218 CLEARED is as for store_constructor.
6219 ALIAS_SET is the alias set to use for any stores.
6220 If REVERSE is true, the store is to be done in reverse order.
6222 This provides a recursive shortcut back to store_constructor when it isn't
6223 necessary to go through store_field. This is so that we can pass through
6224 the cleared field to let store_constructor know that we may not have to
6225 clear a substructure if the outer structure has already been cleared. */
6228 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6229 poly_uint64 bitregion_start
,
6230 poly_uint64 bitregion_end
,
6232 tree exp
, int cleared
,
6233 alias_set_type alias_set
, bool reverse
)
6236 poly_uint64 bytesize
;
6237 if (TREE_CODE (exp
) == CONSTRUCTOR
6238 /* We can only call store_constructor recursively if the size and
6239 bit position are on a byte boundary. */
6240 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6241 && maybe_ne (bitsize
, 0U)
6242 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6243 /* If we have a nonzero bitpos for a register target, then we just
6244 let store_field do the bitfield handling. This is unlikely to
6245 generate unnecessary clear instructions anyways. */
6246 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6250 machine_mode target_mode
= GET_MODE (target
);
6251 if (target_mode
!= BLKmode
6252 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6253 target_mode
= BLKmode
;
6254 target
= adjust_address (target
, target_mode
, bytepos
);
6258 /* Update the alias set, if required. */
6259 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6260 && MEM_ALIAS_SET (target
) != 0)
6262 target
= copy_rtx (target
);
6263 set_mem_alias_set (target
, alias_set
);
6266 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6269 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6270 exp
, alias_set
, false, reverse
);
6274 /* Returns the number of FIELD_DECLs in TYPE. */
6277 fields_length (const_tree type
)
6279 tree t
= TYPE_FIELDS (type
);
6282 for (; t
; t
= DECL_CHAIN (t
))
6283 if (TREE_CODE (t
) == FIELD_DECL
)
6290 /* Store the value of constructor EXP into the rtx TARGET.
6291 TARGET is either a REG or a MEM; we know it cannot conflict, since
6292 safe_from_p has been called.
6293 CLEARED is true if TARGET is known to have been zero'd.
6294 SIZE is the number of bytes of TARGET we are allowed to modify: this
6295 may not be the same as the size of EXP if we are assigning to a field
6296 which has been packed to exclude padding bits.
6297 If REVERSE is true, the store is to be done in reverse order. */
6300 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6303 tree type
= TREE_TYPE (exp
);
6304 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6305 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6307 switch (TREE_CODE (type
))
6311 case QUAL_UNION_TYPE
:
6313 unsigned HOST_WIDE_INT idx
;
6316 /* The storage order is specified for every aggregate type. */
6317 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6319 /* If size is zero or the target is already cleared, do nothing. */
6320 if (known_eq (size
, 0) || cleared
)
6322 /* We either clear the aggregate or indicate the value is dead. */
6323 else if ((TREE_CODE (type
) == UNION_TYPE
6324 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6325 && ! CONSTRUCTOR_ELTS (exp
))
6326 /* If the constructor is empty, clear the union. */
6328 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6332 /* If we are building a static constructor into a register,
6333 set the initial value as zero so we can fold the value into
6334 a constant. But if more than one register is involved,
6335 this probably loses. */
6336 else if (REG_P (target
) && TREE_STATIC (exp
)
6337 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6338 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6340 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6344 /* If the constructor has fewer fields than the structure or
6345 if we are initializing the structure to mostly zeros, clear
6346 the whole structure first. Don't do this if TARGET is a
6347 register whose mode size isn't equal to SIZE since
6348 clear_storage can't handle this case. */
6349 else if (known_size_p (size
)
6350 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6351 || mostly_zeros_p (exp
))
6353 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6355 clear_storage (target
, gen_int_mode (size
, Pmode
),
6360 if (REG_P (target
) && !cleared
)
6361 emit_clobber (target
);
6363 /* Store each element of the constructor into the
6364 corresponding field of TARGET. */
6365 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6368 HOST_WIDE_INT bitsize
;
6369 HOST_WIDE_INT bitpos
= 0;
6371 rtx to_rtx
= target
;
6373 /* Just ignore missing fields. We cleared the whole
6374 structure, above, if any fields are missing. */
6378 if (cleared
&& initializer_zerop (value
))
6381 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6382 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6386 mode
= DECL_MODE (field
);
6387 if (DECL_BIT_FIELD (field
))
6390 offset
= DECL_FIELD_OFFSET (field
);
6391 if (tree_fits_shwi_p (offset
)
6392 && tree_fits_shwi_p (bit_position (field
)))
6394 bitpos
= int_bit_position (field
);
6400 /* If this initializes a field that is smaller than a
6401 word, at the start of a word, try to widen it to a full
6402 word. This special case allows us to output C++ member
6403 function initializations in a form that the optimizers
6405 if (WORD_REGISTER_OPERATIONS
6407 && bitsize
< BITS_PER_WORD
6408 && bitpos
% BITS_PER_WORD
== 0
6409 && GET_MODE_CLASS (mode
) == MODE_INT
6410 && TREE_CODE (value
) == INTEGER_CST
6412 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6414 tree type
= TREE_TYPE (value
);
6416 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6418 type
= lang_hooks
.types
.type_for_mode
6419 (word_mode
, TYPE_UNSIGNED (type
));
6420 value
= fold_convert (type
, value
);
6421 /* Make sure the bits beyond the original bitsize are zero
6422 so that we can correctly avoid extra zeroing stores in
6423 later constructor elements. */
6425 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6427 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6430 if (BYTES_BIG_ENDIAN
)
6432 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6433 build_int_cst (type
,
6434 BITS_PER_WORD
- bitsize
));
6435 bitsize
= BITS_PER_WORD
;
6439 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6440 && DECL_NONADDRESSABLE_P (field
))
6442 to_rtx
= copy_rtx (to_rtx
);
6443 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6446 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6447 0, bitregion_end
, mode
,
6449 get_alias_set (TREE_TYPE (field
)),
6457 unsigned HOST_WIDE_INT i
;
6460 tree elttype
= TREE_TYPE (type
);
6462 HOST_WIDE_INT minelt
= 0;
6463 HOST_WIDE_INT maxelt
= 0;
6465 /* The storage order is specified for every aggregate type. */
6466 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6468 domain
= TYPE_DOMAIN (type
);
6469 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6470 && TYPE_MAX_VALUE (domain
)
6471 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6472 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6474 /* If we have constant bounds for the range of the type, get them. */
6477 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6478 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6481 /* If the constructor has fewer elements than the array, clear
6482 the whole array first. Similarly if this is static
6483 constructor of a non-BLKmode object. */
6486 else if (REG_P (target
) && TREE_STATIC (exp
))
6490 unsigned HOST_WIDE_INT idx
;
6492 HOST_WIDE_INT count
= 0, zero_count
= 0;
6493 need_to_clear
= ! const_bounds_p
;
6495 /* This loop is a more accurate version of the loop in
6496 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6497 is also needed to check for missing elements. */
6498 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6500 HOST_WIDE_INT this_node_count
;
6505 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6507 tree lo_index
= TREE_OPERAND (index
, 0);
6508 tree hi_index
= TREE_OPERAND (index
, 1);
6510 if (! tree_fits_uhwi_p (lo_index
)
6511 || ! tree_fits_uhwi_p (hi_index
))
6517 this_node_count
= (tree_to_uhwi (hi_index
)
6518 - tree_to_uhwi (lo_index
) + 1);
6521 this_node_count
= 1;
6523 count
+= this_node_count
;
6524 if (mostly_zeros_p (value
))
6525 zero_count
+= this_node_count
;
6528 /* Clear the entire array first if there are any missing
6529 elements, or if the incidence of zero elements is >=
6532 && (count
< maxelt
- minelt
+ 1
6533 || 4 * zero_count
>= 3 * count
))
6537 if (need_to_clear
&& maybe_gt (size
, 0))
6540 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6542 clear_storage (target
, gen_int_mode (size
, Pmode
),
6547 if (!cleared
&& REG_P (target
))
6548 /* Inform later passes that the old value is dead. */
6549 emit_clobber (target
);
6551 /* Store each element of the constructor into the
6552 corresponding element of TARGET, determined by counting the
6554 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6558 HOST_WIDE_INT bitpos
;
6559 rtx xtarget
= target
;
6561 if (cleared
&& initializer_zerop (value
))
6564 mode
= TYPE_MODE (elttype
);
6565 if (mode
!= BLKmode
)
6566 bitsize
= GET_MODE_BITSIZE (mode
);
6567 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6570 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6572 tree lo_index
= TREE_OPERAND (index
, 0);
6573 tree hi_index
= TREE_OPERAND (index
, 1);
6574 rtx index_r
, pos_rtx
;
6575 HOST_WIDE_INT lo
, hi
, count
;
6578 /* If the range is constant and "small", unroll the loop. */
6580 && tree_fits_shwi_p (lo_index
)
6581 && tree_fits_shwi_p (hi_index
)
6582 && (lo
= tree_to_shwi (lo_index
),
6583 hi
= tree_to_shwi (hi_index
),
6584 count
= hi
- lo
+ 1,
6587 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6588 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6591 lo
-= minelt
; hi
-= minelt
;
6592 for (; lo
<= hi
; lo
++)
6594 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6597 && !MEM_KEEP_ALIAS_SET_P (target
)
6598 && TREE_CODE (type
) == ARRAY_TYPE
6599 && TYPE_NONALIASED_COMPONENT (type
))
6601 target
= copy_rtx (target
);
6602 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6605 store_constructor_field
6606 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6607 mode
, value
, cleared
,
6608 get_alias_set (elttype
), reverse
);
6613 rtx_code_label
*loop_start
= gen_label_rtx ();
6614 rtx_code_label
*loop_end
= gen_label_rtx ();
6617 expand_normal (hi_index
);
6619 index
= build_decl (EXPR_LOCATION (exp
),
6620 VAR_DECL
, NULL_TREE
, domain
);
6621 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6622 SET_DECL_RTL (index
, index_r
);
6623 store_expr (lo_index
, index_r
, 0, false, reverse
);
6625 /* Build the head of the loop. */
6626 do_pending_stack_adjust ();
6627 emit_label (loop_start
);
6629 /* Assign value to element index. */
6631 fold_convert (ssizetype
,
6632 fold_build2 (MINUS_EXPR
,
6635 TYPE_MIN_VALUE (domain
)));
6638 size_binop (MULT_EXPR
, position
,
6639 fold_convert (ssizetype
,
6640 TYPE_SIZE_UNIT (elttype
)));
6642 pos_rtx
= expand_normal (position
);
6643 xtarget
= offset_address (target
, pos_rtx
,
6644 highest_pow2_factor (position
));
6645 xtarget
= adjust_address (xtarget
, mode
, 0);
6646 if (TREE_CODE (value
) == CONSTRUCTOR
)
6647 store_constructor (value
, xtarget
, cleared
,
6648 exact_div (bitsize
, BITS_PER_UNIT
),
6651 store_expr (value
, xtarget
, 0, false, reverse
);
6653 /* Generate a conditional jump to exit the loop. */
6654 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6656 jumpif (exit_cond
, loop_end
,
6657 profile_probability::uninitialized ());
6659 /* Update the loop counter, and jump to the head of
6661 expand_assignment (index
,
6662 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6663 index
, integer_one_node
),
6666 emit_jump (loop_start
);
6668 /* Build the end of the loop. */
6669 emit_label (loop_end
);
6672 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6673 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6678 index
= ssize_int (1);
6681 index
= fold_convert (ssizetype
,
6682 fold_build2 (MINUS_EXPR
,
6685 TYPE_MIN_VALUE (domain
)));
6688 size_binop (MULT_EXPR
, index
,
6689 fold_convert (ssizetype
,
6690 TYPE_SIZE_UNIT (elttype
)));
6691 xtarget
= offset_address (target
,
6692 expand_normal (position
),
6693 highest_pow2_factor (position
));
6694 xtarget
= adjust_address (xtarget
, mode
, 0);
6695 store_expr (value
, xtarget
, 0, false, reverse
);
6700 bitpos
= ((tree_to_shwi (index
) - minelt
)
6701 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6703 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6705 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6706 && TREE_CODE (type
) == ARRAY_TYPE
6707 && TYPE_NONALIASED_COMPONENT (type
))
6709 target
= copy_rtx (target
);
6710 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6712 store_constructor_field (target
, bitsize
, bitpos
, 0,
6713 bitregion_end
, mode
, value
,
6714 cleared
, get_alias_set (elttype
),
6723 unsigned HOST_WIDE_INT idx
;
6724 constructor_elt
*ce
;
6727 insn_code icode
= CODE_FOR_nothing
;
6729 tree elttype
= TREE_TYPE (type
);
6730 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6731 machine_mode eltmode
= TYPE_MODE (elttype
);
6732 HOST_WIDE_INT bitsize
;
6733 HOST_WIDE_INT bitpos
;
6734 rtvec vector
= NULL
;
6736 unsigned HOST_WIDE_INT const_n_elts
;
6737 alias_set_type alias
;
6738 bool vec_vec_init_p
= false;
6739 machine_mode mode
= GET_MODE (target
);
6741 gcc_assert (eltmode
!= BLKmode
);
6743 /* Try using vec_duplicate_optab for uniform vectors. */
6744 if (!TREE_SIDE_EFFECTS (exp
)
6745 && VECTOR_MODE_P (mode
)
6746 && eltmode
== GET_MODE_INNER (mode
)
6747 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6748 != CODE_FOR_nothing
)
6749 && (elt
= uniform_vector_p (exp
)))
6751 struct expand_operand ops
[2];
6752 create_output_operand (&ops
[0], target
, mode
);
6753 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6754 expand_insn (icode
, 2, ops
);
6755 if (!rtx_equal_p (target
, ops
[0].value
))
6756 emit_move_insn (target
, ops
[0].value
);
6760 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6762 && VECTOR_MODE_P (mode
)
6763 && n_elts
.is_constant (&const_n_elts
))
6765 machine_mode emode
= eltmode
;
6767 if (CONSTRUCTOR_NELTS (exp
)
6768 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6771 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6772 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6773 * TYPE_VECTOR_SUBPARTS (etype
),
6775 emode
= TYPE_MODE (etype
);
6777 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6778 if (icode
!= CODE_FOR_nothing
)
6780 unsigned int i
, n
= const_n_elts
;
6782 if (emode
!= eltmode
)
6784 n
= CONSTRUCTOR_NELTS (exp
);
6785 vec_vec_init_p
= true;
6787 vector
= rtvec_alloc (n
);
6788 for (i
= 0; i
< n
; i
++)
6789 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6793 /* If the constructor has fewer elements than the vector,
6794 clear the whole array first. Similarly if this is static
6795 constructor of a non-BLKmode object. */
6798 else if (REG_P (target
) && TREE_STATIC (exp
))
6802 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6805 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6807 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6809 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6810 TYPE_SIZE (elttype
)));
6812 count
+= n_elts_here
;
6813 if (mostly_zeros_p (value
))
6814 zero_count
+= n_elts_here
;
6817 /* Clear the entire vector first if there are any missing elements,
6818 or if the incidence of zero elements is >= 75%. */
6819 need_to_clear
= (maybe_lt (count
, n_elts
)
6820 || 4 * zero_count
>= 3 * count
);
6823 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6826 emit_move_insn (target
, CONST0_RTX (mode
));
6828 clear_storage (target
, gen_int_mode (size
, Pmode
),
6833 /* Inform later passes that the old value is dead. */
6834 if (!cleared
&& !vector
&& REG_P (target
))
6835 emit_move_insn (target
, CONST0_RTX (mode
));
6838 alias
= MEM_ALIAS_SET (target
);
6840 alias
= get_alias_set (elttype
);
6842 /* Store each element of the constructor into the corresponding
6843 element of TARGET, determined by counting the elements. */
6844 for (idx
= 0, i
= 0;
6845 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6846 idx
++, i
+= bitsize
/ elt_size
)
6848 HOST_WIDE_INT eltpos
;
6849 tree value
= ce
->value
;
6851 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6852 if (cleared
&& initializer_zerop (value
))
6856 eltpos
= tree_to_uhwi (ce
->index
);
6864 gcc_assert (ce
->index
== NULL_TREE
);
6865 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6869 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6870 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6874 machine_mode value_mode
6875 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6876 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6877 bitpos
= eltpos
* elt_size
;
6878 store_constructor_field (target
, bitsize
, bitpos
, 0,
6879 bitregion_end
, value_mode
,
6880 value
, cleared
, alias
, reverse
);
6885 emit_insn (GEN_FCN (icode
) (target
,
6886 gen_rtx_PARALLEL (mode
, vector
)));
6895 /* Store the value of EXP (an expression tree)
6896 into a subfield of TARGET which has mode MODE and occupies
6897 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6898 If MODE is VOIDmode, it means that we are storing into a bit-field.
6900 BITREGION_START is bitpos of the first bitfield in this region.
6901 BITREGION_END is the bitpos of the ending bitfield in this region.
6902 These two fields are 0, if the C++ memory model does not apply,
6903 or we are not interested in keeping track of bitfield regions.
6905 Always return const0_rtx unless we have something particular to
6908 ALIAS_SET is the alias set for the destination. This value will
6909 (in general) be different from that for TARGET, since TARGET is a
6910 reference to the containing structure.
6912 If NONTEMPORAL is true, try generating a nontemporal store.
6914 If REVERSE is true, the store is to be done in reverse order. */
6917 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6918 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6919 machine_mode mode
, tree exp
,
6920 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6922 if (TREE_CODE (exp
) == ERROR_MARK
)
6925 /* If we have nothing to store, do nothing unless the expression has
6926 side-effects. Don't do that for zero sized addressable lhs of
6928 if (known_eq (bitsize
, 0)
6929 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6930 || TREE_CODE (exp
) != CALL_EXPR
))
6931 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6933 if (GET_CODE (target
) == CONCAT
)
6935 /* We're storing into a struct containing a single __complex. */
6937 gcc_assert (known_eq (bitpos
, 0));
6938 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6941 /* If the structure is in a register or if the component
6942 is a bit field, we cannot use addressing to access it.
6943 Use bit-field techniques or SUBREG to store in it. */
6945 poly_int64 decl_bitsize
;
6946 if (mode
== VOIDmode
6947 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6948 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6949 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6951 || GET_CODE (target
) == SUBREG
6952 /* If the field isn't aligned enough to store as an ordinary memref,
6953 store it as a bit field. */
6955 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6956 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
6957 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6958 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
6959 || (known_size_p (bitsize
)
6961 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
6962 /* If the RHS and field are a constant size and the size of the
6963 RHS isn't the same size as the bitfield, we must use bitfield
6965 || (known_size_p (bitsize
)
6966 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
6967 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
6969 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6970 we will handle specially below. */
6971 && !(TREE_CODE (exp
) == CONSTRUCTOR
6972 && multiple_p (bitsize
, BITS_PER_UNIT
))
6973 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6974 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6975 includes some extra padding. store_expr / expand_expr will in
6976 that case call get_inner_reference that will have the bitsize
6977 we check here and thus the block move will not clobber the
6978 padding that shouldn't be clobbered. In the future we could
6979 replace the TREE_ADDRESSABLE check with a check that
6980 get_base_address needs to live in memory. */
6981 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6982 || TREE_CODE (exp
) != COMPONENT_REF
6983 || !multiple_p (bitsize
, BITS_PER_UNIT
)
6984 || !multiple_p (bitpos
, BITS_PER_UNIT
)
6985 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
6987 || maybe_ne (decl_bitsize
, bitsize
)))
6988 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6989 decl we must use bitfield operations. */
6990 || (known_size_p (bitsize
)
6991 && TREE_CODE (exp
) == MEM_REF
6992 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6993 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6994 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6995 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
7000 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7001 implies a mask operation. If the precision is the same size as
7002 the field we're storing into, that mask is redundant. This is
7003 particularly common with bit field assignments generated by the
7005 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7008 tree type
= TREE_TYPE (exp
);
7009 if (INTEGRAL_TYPE_P (type
)
7010 && maybe_ne (TYPE_PRECISION (type
),
7011 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7012 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7014 tree op
= gimple_assign_rhs1 (nop_def
);
7015 type
= TREE_TYPE (op
);
7016 if (INTEGRAL_TYPE_P (type
)
7017 && known_ge (TYPE_PRECISION (type
), bitsize
))
7022 temp
= expand_normal (exp
);
7024 /* We don't support variable-sized BLKmode bitfields, since our
7025 handling of BLKmode is bound up with the ability to break
7026 things into words. */
7027 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7029 /* Handle calls that return values in multiple non-contiguous locations.
7030 The Irix 6 ABI has examples of this. */
7031 if (GET_CODE (temp
) == PARALLEL
)
7033 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7034 machine_mode temp_mode
= GET_MODE (temp
);
7035 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7036 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7037 rtx temp_target
= gen_reg_rtx (temp_mode
);
7038 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7042 /* Handle calls that return BLKmode values in registers. */
7043 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7045 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7046 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7050 /* If the value has aggregate type and an integral mode then, if BITSIZE
7051 is narrower than this mode and this is for big-endian data, we first
7052 need to put the value into the low-order bits for store_bit_field,
7053 except when MODE is BLKmode and BITSIZE larger than the word size
7054 (see the handling of fields larger than a word in store_bit_field).
7055 Moreover, the field may be not aligned on a byte boundary; in this
7056 case, if it has reverse storage order, it needs to be accessed as a
7057 scalar field with reverse storage order and we must first put the
7058 value into target order. */
7059 scalar_int_mode temp_mode
;
7060 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7061 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7063 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7065 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7068 temp
= flip_storage_order (temp_mode
, temp
);
7070 gcc_checking_assert (known_le (bitsize
, size
));
7071 if (maybe_lt (bitsize
, size
)
7072 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7073 /* Use of to_constant for BLKmode was checked above. */
7074 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7075 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7076 size
- bitsize
, NULL_RTX
, 1);
7079 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7080 if (mode
!= VOIDmode
&& mode
!= BLKmode
7081 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7082 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7084 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7085 and BITPOS must be aligned on a byte boundary. If so, we simply do
7086 a block copy. Likewise for a BLKmode-like TARGET. */
7087 if (GET_MODE (temp
) == BLKmode
7088 && (GET_MODE (target
) == BLKmode
7090 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7091 && multiple_p (bitpos
, BITS_PER_UNIT
)
7092 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7094 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7095 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7096 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7098 target
= adjust_address (target
, VOIDmode
, bytepos
);
7099 emit_block_move (target
, temp
,
7100 gen_int_mode (bytesize
, Pmode
),
7106 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7107 word size, we need to load the value (see again store_bit_field). */
7108 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7110 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
7111 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7112 temp_mode
, false, NULL
);
7115 /* Store the value in the bitfield. */
7116 gcc_checking_assert (known_ge (bitpos
, 0));
7117 store_bit_field (target
, bitsize
, bitpos
,
7118 bitregion_start
, bitregion_end
,
7119 mode
, temp
, reverse
);
7125 /* Now build a reference to just the desired component. */
7126 rtx to_rtx
= adjust_address (target
, mode
,
7127 exact_div (bitpos
, BITS_PER_UNIT
));
7129 if (to_rtx
== target
)
7130 to_rtx
= copy_rtx (to_rtx
);
7132 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7133 set_mem_alias_set (to_rtx
, alias_set
);
7135 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7136 into a target smaller than its type; handle that case now. */
7137 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7139 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7140 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7144 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7148 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7149 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7150 codes and find the ultimate containing object, which we return.
7152 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7153 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7154 storage order of the field.
7155 If the position of the field is variable, we store a tree
7156 giving the variable offset (in units) in *POFFSET.
7157 This offset is in addition to the bit position.
7158 If the position is not variable, we store 0 in *POFFSET.
7160 If any of the extraction expressions is volatile,
7161 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7163 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7164 Otherwise, it is a mode that can be used to access the field.
7166 If the field describes a variable-sized object, *PMODE is set to
7167 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7168 this case, but the address of the object can be found. */
7171 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7172 poly_int64_pod
*pbitpos
, tree
*poffset
,
7173 machine_mode
*pmode
, int *punsignedp
,
7174 int *preversep
, int *pvolatilep
)
7177 machine_mode mode
= VOIDmode
;
7178 bool blkmode_bitfield
= false;
7179 tree offset
= size_zero_node
;
7180 poly_offset_int bit_offset
= 0;
7182 /* First get the mode, signedness, storage order and size. We do this from
7183 just the outermost expression. */
7185 if (TREE_CODE (exp
) == COMPONENT_REF
)
7187 tree field
= TREE_OPERAND (exp
, 1);
7188 size_tree
= DECL_SIZE (field
);
7189 if (flag_strict_volatile_bitfields
> 0
7190 && TREE_THIS_VOLATILE (exp
)
7191 && DECL_BIT_FIELD_TYPE (field
)
7192 && DECL_MODE (field
) != BLKmode
)
7193 /* Volatile bitfields should be accessed in the mode of the
7194 field's type, not the mode computed based on the bit
7196 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7197 else if (!DECL_BIT_FIELD (field
))
7199 mode
= DECL_MODE (field
);
7200 /* For vector fields re-check the target flags, as DECL_MODE
7201 could have been set with different target flags than
7202 the current function has. */
7204 && VECTOR_TYPE_P (TREE_TYPE (field
))
7205 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7206 mode
= TYPE_MODE (TREE_TYPE (field
));
7208 else if (DECL_MODE (field
) == BLKmode
)
7209 blkmode_bitfield
= true;
7211 *punsignedp
= DECL_UNSIGNED (field
);
7213 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7215 size_tree
= TREE_OPERAND (exp
, 1);
7216 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7217 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7219 /* For vector types, with the correct size of access, use the mode of
7221 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7222 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7223 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7224 mode
= TYPE_MODE (TREE_TYPE (exp
));
7228 mode
= TYPE_MODE (TREE_TYPE (exp
));
7229 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7231 if (mode
== BLKmode
)
7232 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7234 *pbitsize
= GET_MODE_BITSIZE (mode
);
7239 if (! tree_fits_uhwi_p (size_tree
))
7240 mode
= BLKmode
, *pbitsize
= -1;
7242 *pbitsize
= tree_to_uhwi (size_tree
);
7245 *preversep
= reverse_storage_order_for_component_p (exp
);
7247 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7248 and find the ultimate containing object. */
7251 switch (TREE_CODE (exp
))
7254 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7259 tree field
= TREE_OPERAND (exp
, 1);
7260 tree this_offset
= component_ref_field_offset (exp
);
7262 /* If this field hasn't been filled in yet, don't go past it.
7263 This should only happen when folding expressions made during
7264 type construction. */
7265 if (this_offset
== 0)
7268 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7269 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7271 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7276 case ARRAY_RANGE_REF
:
7278 tree index
= TREE_OPERAND (exp
, 1);
7279 tree low_bound
= array_ref_low_bound (exp
);
7280 tree unit_size
= array_ref_element_size (exp
);
7282 /* We assume all arrays have sizes that are a multiple of a byte.
7283 First subtract the lower bound, if any, in the type of the
7284 index, then convert to sizetype and multiply by the size of
7285 the array element. */
7286 if (! integer_zerop (low_bound
))
7287 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7290 offset
= size_binop (PLUS_EXPR
, offset
,
7291 size_binop (MULT_EXPR
,
7292 fold_convert (sizetype
, index
),
7301 bit_offset
+= *pbitsize
;
7304 case VIEW_CONVERT_EXPR
:
7308 /* Hand back the decl for MEM[&decl, off]. */
7309 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7311 tree off
= TREE_OPERAND (exp
, 1);
7312 if (!integer_zerop (off
))
7314 poly_offset_int boff
= mem_ref_offset (exp
);
7315 boff
<<= LOG2_BITS_PER_UNIT
;
7318 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7326 /* If any reference in the chain is volatile, the effect is volatile. */
7327 if (TREE_THIS_VOLATILE (exp
))
7330 exp
= TREE_OPERAND (exp
, 0);
7334 /* If OFFSET is constant, see if we can return the whole thing as a
7335 constant bit position. Make sure to handle overflow during
7337 if (poly_int_tree_p (offset
))
7339 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7340 TYPE_PRECISION (sizetype
));
7341 tem
<<= LOG2_BITS_PER_UNIT
;
7343 if (tem
.to_shwi (pbitpos
))
7344 *poffset
= offset
= NULL_TREE
;
7347 /* Otherwise, split it up. */
7350 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7351 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7353 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7354 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7355 offset
= size_binop (PLUS_EXPR
, offset
,
7356 build_int_cst (sizetype
, bytes
.force_shwi ()));
7362 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7363 if (mode
== VOIDmode
7365 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7366 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7374 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7376 static unsigned HOST_WIDE_INT
7377 target_align (const_tree target
)
7379 /* We might have a chain of nested references with intermediate misaligning
7380 bitfields components, so need to recurse to find out. */
7382 unsigned HOST_WIDE_INT this_align
, outer_align
;
7384 switch (TREE_CODE (target
))
7390 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7391 outer_align
= target_align (TREE_OPERAND (target
, 0));
7392 return MIN (this_align
, outer_align
);
7395 case ARRAY_RANGE_REF
:
7396 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7397 outer_align
= target_align (TREE_OPERAND (target
, 0));
7398 return MIN (this_align
, outer_align
);
7401 case NON_LVALUE_EXPR
:
7402 case VIEW_CONVERT_EXPR
:
7403 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7404 outer_align
= target_align (TREE_OPERAND (target
, 0));
7405 return MAX (this_align
, outer_align
);
7408 return TYPE_ALIGN (TREE_TYPE (target
));
7413 /* Given an rtx VALUE that may contain additions and multiplications, return
7414 an equivalent value that just refers to a register, memory, or constant.
7415 This is done by generating instructions to perform the arithmetic and
7416 returning a pseudo-register containing the value.
7418 The returned value may be a REG, SUBREG, MEM or constant. */
7421 force_operand (rtx value
, rtx target
)
7424 /* Use subtarget as the target for operand 0 of a binary operation. */
7425 rtx subtarget
= get_subtarget (target
);
7426 enum rtx_code code
= GET_CODE (value
);
7428 /* Check for subreg applied to an expression produced by loop optimizer. */
7430 && !REG_P (SUBREG_REG (value
))
7431 && !MEM_P (SUBREG_REG (value
)))
7434 = simplify_gen_subreg (GET_MODE (value
),
7435 force_reg (GET_MODE (SUBREG_REG (value
)),
7436 force_operand (SUBREG_REG (value
),
7438 GET_MODE (SUBREG_REG (value
)),
7439 SUBREG_BYTE (value
));
7440 code
= GET_CODE (value
);
7443 /* Check for a PIC address load. */
7444 if ((code
== PLUS
|| code
== MINUS
)
7445 && XEXP (value
, 0) == pic_offset_table_rtx
7446 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7447 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7448 || GET_CODE (XEXP (value
, 1)) == CONST
))
7451 subtarget
= gen_reg_rtx (GET_MODE (value
));
7452 emit_move_insn (subtarget
, value
);
7456 if (ARITHMETIC_P (value
))
7458 op2
= XEXP (value
, 1);
7459 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7461 if (code
== MINUS
&& CONST_INT_P (op2
))
7464 op2
= negate_rtx (GET_MODE (value
), op2
);
7467 /* Check for an addition with OP2 a constant integer and our first
7468 operand a PLUS of a virtual register and something else. In that
7469 case, we want to emit the sum of the virtual register and the
7470 constant first and then add the other value. This allows virtual
7471 register instantiation to simply modify the constant rather than
7472 creating another one around this addition. */
7473 if (code
== PLUS
&& CONST_INT_P (op2
)
7474 && GET_CODE (XEXP (value
, 0)) == PLUS
7475 && REG_P (XEXP (XEXP (value
, 0), 0))
7476 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7477 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7479 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7480 XEXP (XEXP (value
, 0), 0), op2
,
7481 subtarget
, 0, OPTAB_LIB_WIDEN
);
7482 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7483 force_operand (XEXP (XEXP (value
,
7485 target
, 0, OPTAB_LIB_WIDEN
);
7488 op1
= force_operand (XEXP (value
, 0), subtarget
);
7489 op2
= force_operand (op2
, NULL_RTX
);
7493 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7495 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7496 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7497 target
, 1, OPTAB_LIB_WIDEN
);
7499 return expand_divmod (0,
7500 FLOAT_MODE_P (GET_MODE (value
))
7501 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7502 GET_MODE (value
), op1
, op2
, target
, 0);
7504 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7507 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7510 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7513 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7514 target
, 0, OPTAB_LIB_WIDEN
);
7516 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7517 target
, 1, OPTAB_LIB_WIDEN
);
7520 if (UNARY_P (value
))
7523 target
= gen_reg_rtx (GET_MODE (value
));
7524 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7531 case FLOAT_TRUNCATE
:
7532 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7537 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7541 case UNSIGNED_FLOAT
:
7542 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7546 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7550 #ifdef INSN_SCHEDULING
7551 /* On machines that have insn scheduling, we want all memory reference to be
7552 explicit, so we need to deal with such paradoxical SUBREGs. */
7553 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7555 = simplify_gen_subreg (GET_MODE (value
),
7556 force_reg (GET_MODE (SUBREG_REG (value
)),
7557 force_operand (SUBREG_REG (value
),
7559 GET_MODE (SUBREG_REG (value
)),
7560 SUBREG_BYTE (value
));
7566 /* Subroutine of expand_expr: return nonzero iff there is no way that
7567 EXP can reference X, which is being modified. TOP_P is nonzero if this
7568 call is going to be used to determine whether we need a temporary
7569 for EXP, as opposed to a recursive call to this function.
7571 It is always safe for this routine to return zero since it merely
7572 searches for optimization opportunities. */
7575 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7581 /* If EXP has varying size, we MUST use a target since we currently
7582 have no way of allocating temporaries of variable size
7583 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7584 So we assume here that something at a higher level has prevented a
7585 clash. This is somewhat bogus, but the best we can do. Only
7586 do this when X is BLKmode and when we are at the top level. */
7587 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7588 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7589 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7590 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7591 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7593 && GET_MODE (x
) == BLKmode
)
7594 /* If X is in the outgoing argument area, it is always safe. */
7596 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7597 || (GET_CODE (XEXP (x
, 0)) == PLUS
7598 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7601 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7602 find the underlying pseudo. */
7603 if (GET_CODE (x
) == SUBREG
)
7606 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7610 /* Now look at our tree code and possibly recurse. */
7611 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7613 case tcc_declaration
:
7614 exp_rtl
= DECL_RTL_IF_SET (exp
);
7620 case tcc_exceptional
:
7621 if (TREE_CODE (exp
) == TREE_LIST
)
7625 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7627 exp
= TREE_CHAIN (exp
);
7630 if (TREE_CODE (exp
) != TREE_LIST
)
7631 return safe_from_p (x
, exp
, 0);
7634 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7636 constructor_elt
*ce
;
7637 unsigned HOST_WIDE_INT idx
;
7639 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7640 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7641 || !safe_from_p (x
, ce
->value
, 0))
7645 else if (TREE_CODE (exp
) == ERROR_MARK
)
7646 return 1; /* An already-visited SAVE_EXPR? */
7651 /* The only case we look at here is the DECL_INITIAL inside a
7653 return (TREE_CODE (exp
) != DECL_EXPR
7654 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7655 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7656 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7659 case tcc_comparison
:
7660 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7665 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7667 case tcc_expression
:
7670 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7671 the expression. If it is set, we conflict iff we are that rtx or
7672 both are in memory. Otherwise, we check all operands of the
7673 expression recursively. */
7675 switch (TREE_CODE (exp
))
7678 /* If the operand is static or we are static, we can't conflict.
7679 Likewise if we don't conflict with the operand at all. */
7680 if (staticp (TREE_OPERAND (exp
, 0))
7681 || TREE_STATIC (exp
)
7682 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7685 /* Otherwise, the only way this can conflict is if we are taking
7686 the address of a DECL a that address if part of X, which is
7688 exp
= TREE_OPERAND (exp
, 0);
7691 if (!DECL_RTL_SET_P (exp
)
7692 || !MEM_P (DECL_RTL (exp
)))
7695 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7701 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7702 get_alias_set (exp
)))
7707 /* Assume that the call will clobber all hard registers and
7709 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7714 case WITH_CLEANUP_EXPR
:
7715 case CLEANUP_POINT_EXPR
:
7716 /* Lowered by gimplify.c. */
7720 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7726 /* If we have an rtx, we do not need to scan our operands. */
7730 nops
= TREE_OPERAND_LENGTH (exp
);
7731 for (i
= 0; i
< nops
; i
++)
7732 if (TREE_OPERAND (exp
, i
) != 0
7733 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7739 /* Should never get a type here. */
7743 /* If we have an rtl, find any enclosed object. Then see if we conflict
7747 if (GET_CODE (exp_rtl
) == SUBREG
)
7749 exp_rtl
= SUBREG_REG (exp_rtl
);
7751 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7755 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7756 are memory and they conflict. */
7757 return ! (rtx_equal_p (x
, exp_rtl
)
7758 || (MEM_P (x
) && MEM_P (exp_rtl
)
7759 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7762 /* If we reach here, it is safe. */
7767 /* Return the highest power of two that EXP is known to be a multiple of.
7768 This is used in updating alignment of MEMs in array references. */
7770 unsigned HOST_WIDE_INT
7771 highest_pow2_factor (const_tree exp
)
7773 unsigned HOST_WIDE_INT ret
;
7774 int trailing_zeros
= tree_ctz (exp
);
7775 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7776 return BIGGEST_ALIGNMENT
;
7777 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7778 if (ret
> BIGGEST_ALIGNMENT
)
7779 return BIGGEST_ALIGNMENT
;
7783 /* Similar, except that the alignment requirements of TARGET are
7784 taken into account. Assume it is at least as aligned as its
7785 type, unless it is a COMPONENT_REF in which case the layout of
7786 the structure gives the alignment. */
7788 static unsigned HOST_WIDE_INT
7789 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7791 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7792 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7794 return MAX (factor
, talign
);
7797 /* Convert the tree comparison code TCODE to the rtl one where the
7798 signedness is UNSIGNEDP. */
7800 static enum rtx_code
7801 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7813 code
= unsignedp
? LTU
: LT
;
7816 code
= unsignedp
? LEU
: LE
;
7819 code
= unsignedp
? GTU
: GT
;
7822 code
= unsignedp
? GEU
: GE
;
7824 case UNORDERED_EXPR
:
7855 /* Subroutine of expand_expr. Expand the two operands of a binary
7856 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7857 The value may be stored in TARGET if TARGET is nonzero. The
7858 MODIFIER argument is as documented by expand_expr. */
7861 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7862 enum expand_modifier modifier
)
7864 if (! safe_from_p (target
, exp1
, 1))
7866 if (operand_equal_p (exp0
, exp1
, 0))
7868 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7869 *op1
= copy_rtx (*op0
);
7873 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7874 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7879 /* Return a MEM that contains constant EXP. DEFER is as for
7880 output_constant_def and MODIFIER is as for expand_expr. */
7883 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7887 mem
= output_constant_def (exp
, defer
);
7888 if (modifier
!= EXPAND_INITIALIZER
)
7889 mem
= use_anchored_address (mem
);
7893 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7894 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7897 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7898 enum expand_modifier modifier
, addr_space_t as
)
7900 rtx result
, subtarget
;
7902 poly_int64 bitsize
, bitpos
;
7903 int unsignedp
, reversep
, volatilep
= 0;
7906 /* If we are taking the address of a constant and are at the top level,
7907 we have to use output_constant_def since we can't call force_const_mem
7909 /* ??? This should be considered a front-end bug. We should not be
7910 generating ADDR_EXPR of something that isn't an LVALUE. The only
7911 exception here is STRING_CST. */
7912 if (CONSTANT_CLASS_P (exp
))
7914 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7915 if (modifier
< EXPAND_SUM
)
7916 result
= force_operand (result
, target
);
7920 /* Everything must be something allowed by is_gimple_addressable. */
7921 switch (TREE_CODE (exp
))
7924 /* This case will happen via recursion for &a->b. */
7925 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7929 tree tem
= TREE_OPERAND (exp
, 0);
7930 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7931 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7932 return expand_expr (tem
, target
, tmode
, modifier
);
7935 case TARGET_MEM_REF
:
7936 return addr_for_mem_ref (exp
, as
, true);
7939 /* Expand the initializer like constants above. */
7940 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7942 if (modifier
< EXPAND_SUM
)
7943 result
= force_operand (result
, target
);
7947 /* The real part of the complex number is always first, therefore
7948 the address is the same as the address of the parent object. */
7951 inner
= TREE_OPERAND (exp
, 0);
7955 /* The imaginary part of the complex number is always second.
7956 The expression is therefore always offset by the size of the
7959 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7960 inner
= TREE_OPERAND (exp
, 0);
7963 case COMPOUND_LITERAL_EXPR
:
7964 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7965 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7966 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7967 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7968 the initializers aren't gimplified. */
7969 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7970 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7971 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7972 target
, tmode
, modifier
, as
);
7975 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7976 expand_expr, as that can have various side effects; LABEL_DECLs for
7977 example, may not have their DECL_RTL set yet. Expand the rtl of
7978 CONSTRUCTORs too, which should yield a memory reference for the
7979 constructor's contents. Assume language specific tree nodes can
7980 be expanded in some interesting way. */
7981 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7983 || TREE_CODE (exp
) == CONSTRUCTOR
7984 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7986 result
= expand_expr (exp
, target
, tmode
,
7987 modifier
== EXPAND_INITIALIZER
7988 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7990 /* If the DECL isn't in memory, then the DECL wasn't properly
7991 marked TREE_ADDRESSABLE, which will be either a front-end
7992 or a tree optimizer bug. */
7994 gcc_assert (MEM_P (result
));
7995 result
= XEXP (result
, 0);
7997 /* ??? Is this needed anymore? */
7999 TREE_USED (exp
) = 1;
8001 if (modifier
!= EXPAND_INITIALIZER
8002 && modifier
!= EXPAND_CONST_ADDRESS
8003 && modifier
!= EXPAND_SUM
)
8004 result
= force_operand (result
, target
);
8008 /* Pass FALSE as the last argument to get_inner_reference although
8009 we are expanding to RTL. The rationale is that we know how to
8010 handle "aligning nodes" here: we can just bypass them because
8011 they won't change the final object whose address will be returned
8012 (they actually exist only for that purpose). */
8013 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8014 &unsignedp
, &reversep
, &volatilep
);
8018 /* We must have made progress. */
8019 gcc_assert (inner
!= exp
);
8021 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8022 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8023 inner alignment, force the inner to be sufficiently aligned. */
8024 if (CONSTANT_CLASS_P (inner
)
8025 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8027 inner
= copy_node (inner
);
8028 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8029 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8030 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8032 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8038 if (modifier
!= EXPAND_NORMAL
)
8039 result
= force_operand (result
, NULL
);
8040 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8041 modifier
== EXPAND_INITIALIZER
8042 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8044 /* expand_expr is allowed to return an object in a mode other
8045 than TMODE. If it did, we need to convert. */
8046 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8047 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8048 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8049 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8050 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8052 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8053 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8056 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8057 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8058 1, OPTAB_LIB_WIDEN
);
8062 if (maybe_ne (bitpos
, 0))
8064 /* Someone beforehand should have rejected taking the address
8065 of an object that isn't byte-aligned. */
8066 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8067 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8068 result
= plus_constant (tmode
, result
, bytepos
);
8069 if (modifier
< EXPAND_SUM
)
8070 result
= force_operand (result
, target
);
8076 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8077 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8080 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8081 enum expand_modifier modifier
)
8083 addr_space_t as
= ADDR_SPACE_GENERIC
;
8084 scalar_int_mode address_mode
= Pmode
;
8085 scalar_int_mode pointer_mode
= ptr_mode
;
8089 /* Target mode of VOIDmode says "whatever's natural". */
8090 if (tmode
== VOIDmode
)
8091 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8093 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8095 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8096 address_mode
= targetm
.addr_space
.address_mode (as
);
8097 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8100 /* We can get called with some Weird Things if the user does silliness
8101 like "(short) &a". In that case, convert_memory_address won't do
8102 the right thing, so ignore the given target mode. */
8103 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8107 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8108 new_tmode
, modifier
, as
);
8110 /* Despite expand_expr claims concerning ignoring TMODE when not
8111 strictly convenient, stuff breaks if we don't honor it. Note
8112 that combined with the above, we only do this for pointer modes. */
8113 rmode
= GET_MODE (result
);
8114 if (rmode
== VOIDmode
)
8116 if (rmode
!= new_tmode
)
8117 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8122 /* Generate code for computing CONSTRUCTOR EXP.
8123 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8124 is TRUE, instead of creating a temporary variable in memory
8125 NULL is returned and the caller needs to handle it differently. */
8128 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8129 bool avoid_temp_mem
)
8131 tree type
= TREE_TYPE (exp
);
8132 machine_mode mode
= TYPE_MODE (type
);
8134 /* Try to avoid creating a temporary at all. This is possible
8135 if all of the initializer is zero.
8136 FIXME: try to handle all [0..255] initializers we can handle
8138 if (TREE_STATIC (exp
)
8139 && !TREE_ADDRESSABLE (exp
)
8140 && target
!= 0 && mode
== BLKmode
8141 && all_zeros_p (exp
))
8143 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8147 /* All elts simple constants => refer to a constant in memory. But
8148 if this is a non-BLKmode mode, let it store a field at a time
8149 since that should make a CONST_INT, CONST_WIDE_INT or
8150 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8151 use, it is best to store directly into the target unless the type
8152 is large enough that memcpy will be used. If we are making an
8153 initializer and all operands are constant, put it in memory as
8156 FIXME: Avoid trying to fill vector constructors piece-meal.
8157 Output them with output_constant_def below unless we're sure
8158 they're zeros. This should go away when vector initializers
8159 are treated like VECTOR_CST instead of arrays. */
8160 if ((TREE_STATIC (exp
)
8161 && ((mode
== BLKmode
8162 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8163 || TREE_ADDRESSABLE (exp
)
8164 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8165 && (! can_move_by_pieces
8166 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8168 && ! mostly_zeros_p (exp
))))
8169 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8170 && TREE_CONSTANT (exp
)))
8177 constructor
= expand_expr_constant (exp
, 1, modifier
);
8179 if (modifier
!= EXPAND_CONST_ADDRESS
8180 && modifier
!= EXPAND_INITIALIZER
8181 && modifier
!= EXPAND_SUM
)
8182 constructor
= validize_mem (constructor
);
8187 /* Handle calls that pass values in multiple non-contiguous
8188 locations. The Irix 6 ABI has examples of this. */
8189 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8190 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8195 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8198 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8203 /* expand_expr: generate code for computing expression EXP.
8204 An rtx for the computed value is returned. The value is never null.
8205 In the case of a void EXP, const0_rtx is returned.
8207 The value may be stored in TARGET if TARGET is nonzero.
8208 TARGET is just a suggestion; callers must assume that
8209 the rtx returned may not be the same as TARGET.
8211 If TARGET is CONST0_RTX, it means that the value will be ignored.
8213 If TMODE is not VOIDmode, it suggests generating the
8214 result in mode TMODE. But this is done only when convenient.
8215 Otherwise, TMODE is ignored and the value generated in its natural mode.
8216 TMODE is just a suggestion; callers must assume that
8217 the rtx returned may not have mode TMODE.
8219 Note that TARGET may have neither TMODE nor MODE. In that case, it
8220 probably will not be used.
8222 If MODIFIER is EXPAND_SUM then when EXP is an addition
8223 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8224 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8225 products as above, or REG or MEM, or constant.
8226 Ordinarily in such cases we would output mul or add instructions
8227 and then return a pseudo reg containing the sum.
8229 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8230 it also marks a label as absolutely required (it can't be dead).
8231 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8232 This is used for outputting expressions used in initializers.
8234 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8235 with a constant address even if that address is not normally legitimate.
8236 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8238 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8239 a call parameter. Such targets require special care as we haven't yet
8240 marked TARGET so that it's safe from being trashed by libcalls. We
8241 don't want to use TARGET for anything but the final result;
8242 Intermediate values must go elsewhere. Additionally, calls to
8243 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8245 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8246 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8247 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8248 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8251 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8252 In this case, we don't adjust a returned MEM rtx that wouldn't be
8253 sufficiently aligned for its mode; instead, it's up to the caller
8254 to deal with it afterwards. This is used to make sure that unaligned
8255 base objects for which out-of-bounds accesses are supported, for
8256 example record types with trailing arrays, aren't realigned behind
8257 the back of the caller.
8258 The normal operating mode is to pass FALSE for this parameter. */
8261 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8262 enum expand_modifier modifier
, rtx
*alt_rtl
,
8263 bool inner_reference_p
)
8267 /* Handle ERROR_MARK before anybody tries to access its type. */
8268 if (TREE_CODE (exp
) == ERROR_MARK
8269 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8271 ret
= CONST0_RTX (tmode
);
8272 return ret
? ret
: const0_rtx
;
8275 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8280 /* Try to expand the conditional expression which is represented by
8281 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8282 return the rtl reg which represents the result. Otherwise return
8286 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8287 tree treeop1 ATTRIBUTE_UNUSED
,
8288 tree treeop2 ATTRIBUTE_UNUSED
)
8291 rtx op00
, op01
, op1
, op2
;
8292 enum rtx_code comparison_code
;
8293 machine_mode comparison_mode
;
8296 tree type
= TREE_TYPE (treeop1
);
8297 int unsignedp
= TYPE_UNSIGNED (type
);
8298 machine_mode mode
= TYPE_MODE (type
);
8299 machine_mode orig_mode
= mode
;
8300 static bool expanding_cond_expr_using_cmove
= false;
8302 /* Conditional move expansion can end up TERing two operands which,
8303 when recursively hitting conditional expressions can result in
8304 exponential behavior if the cmove expansion ultimatively fails.
8305 It's hardly profitable to TER a cmove into a cmove so avoid doing
8306 that by failing early if we end up recursing. */
8307 if (expanding_cond_expr_using_cmove
)
8310 /* If we cannot do a conditional move on the mode, try doing it
8311 with the promoted mode. */
8312 if (!can_conditionally_move_p (mode
))
8314 mode
= promote_mode (type
, mode
, &unsignedp
);
8315 if (!can_conditionally_move_p (mode
))
8317 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8320 temp
= assign_temp (type
, 0, 1);
8322 expanding_cond_expr_using_cmove
= true;
8324 expand_operands (treeop1
, treeop2
,
8325 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8327 if (TREE_CODE (treeop0
) == SSA_NAME
8328 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8330 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8331 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8332 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8333 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8334 comparison_mode
= TYPE_MODE (type
);
8335 unsignedp
= TYPE_UNSIGNED (type
);
8336 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8338 else if (COMPARISON_CLASS_P (treeop0
))
8340 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8341 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8342 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8343 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8344 unsignedp
= TYPE_UNSIGNED (type
);
8345 comparison_mode
= TYPE_MODE (type
);
8346 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8350 op00
= expand_normal (treeop0
);
8352 comparison_code
= NE
;
8353 comparison_mode
= GET_MODE (op00
);
8354 if (comparison_mode
== VOIDmode
)
8355 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8357 expanding_cond_expr_using_cmove
= false;
8359 if (GET_MODE (op1
) != mode
)
8360 op1
= gen_lowpart (mode
, op1
);
8362 if (GET_MODE (op2
) != mode
)
8363 op2
= gen_lowpart (mode
, op2
);
8365 /* Try to emit the conditional move. */
8366 insn
= emit_conditional_move (temp
, comparison_code
,
8367 op00
, op01
, comparison_mode
,
8371 /* If we could do the conditional move, emit the sequence,
8375 rtx_insn
*seq
= get_insns ();
8378 return convert_modes (orig_mode
, mode
, temp
, 0);
8381 /* Otherwise discard the sequence and fall back to code with
8388 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8389 enum expand_modifier modifier
)
8391 rtx op0
, op1
, op2
, temp
;
8392 rtx_code_label
*lab
;
8396 scalar_int_mode int_mode
;
8397 enum tree_code code
= ops
->code
;
8399 rtx subtarget
, original_target
;
8401 bool reduce_bit_field
;
8402 location_t loc
= ops
->location
;
8403 tree treeop0
, treeop1
, treeop2
;
8404 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8405 ? reduce_to_bit_field_precision ((expr), \
8411 mode
= TYPE_MODE (type
);
8412 unsignedp
= TYPE_UNSIGNED (type
);
8418 /* We should be called only on simple (binary or unary) expressions,
8419 exactly those that are valid in gimple expressions that aren't
8420 GIMPLE_SINGLE_RHS (or invalid). */
8421 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8422 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8423 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8425 ignore
= (target
== const0_rtx
8426 || ((CONVERT_EXPR_CODE_P (code
)
8427 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8428 && TREE_CODE (type
) == VOID_TYPE
));
8430 /* We should be called only if we need the result. */
8431 gcc_assert (!ignore
);
8433 /* An operation in what may be a bit-field type needs the
8434 result to be reduced to the precision of the bit-field type,
8435 which is narrower than that of the type's mode. */
8436 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8437 && !type_has_mode_precision_p (type
));
8439 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8442 /* Use subtarget as the target for operand 0 of a binary operation. */
8443 subtarget
= get_subtarget (target
);
8444 original_target
= target
;
8448 case NON_LVALUE_EXPR
:
8451 if (treeop0
== error_mark_node
)
8454 if (TREE_CODE (type
) == UNION_TYPE
)
8456 tree valtype
= TREE_TYPE (treeop0
);
8458 /* If both input and output are BLKmode, this conversion isn't doing
8459 anything except possibly changing memory attribute. */
8460 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8462 rtx result
= expand_expr (treeop0
, target
, tmode
,
8465 result
= copy_rtx (result
);
8466 set_mem_attributes (result
, type
, 0);
8472 if (TYPE_MODE (type
) != BLKmode
)
8473 target
= gen_reg_rtx (TYPE_MODE (type
));
8475 target
= assign_temp (type
, 1, 1);
8479 /* Store data into beginning of memory target. */
8480 store_expr (treeop0
,
8481 adjust_address (target
, TYPE_MODE (valtype
), 0),
8482 modifier
== EXPAND_STACK_PARM
,
8483 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8487 gcc_assert (REG_P (target
)
8488 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8490 /* Store this field into a union of the proper type. */
8491 poly_uint64 op0_size
8492 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8493 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8494 store_field (target
,
8495 /* The conversion must be constructed so that
8496 we know at compile time how many bits
8498 ordered_min (op0_size
, union_size
),
8499 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8503 /* Return the entire union. */
8507 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8509 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8512 /* If the signedness of the conversion differs and OP0 is
8513 a promoted SUBREG, clear that indication since we now
8514 have to do the proper extension. */
8515 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8516 && GET_CODE (op0
) == SUBREG
)
8517 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8519 return REDUCE_BIT_FIELD (op0
);
8522 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8523 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8524 if (GET_MODE (op0
) == mode
)
8527 /* If OP0 is a constant, just convert it into the proper mode. */
8528 else if (CONSTANT_P (op0
))
8530 tree inner_type
= TREE_TYPE (treeop0
);
8531 machine_mode inner_mode
= GET_MODE (op0
);
8533 if (inner_mode
== VOIDmode
)
8534 inner_mode
= TYPE_MODE (inner_type
);
8536 if (modifier
== EXPAND_INITIALIZER
)
8537 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8539 op0
= convert_modes (mode
, inner_mode
, op0
,
8540 TYPE_UNSIGNED (inner_type
));
8543 else if (modifier
== EXPAND_INITIALIZER
)
8544 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8545 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8547 else if (target
== 0)
8548 op0
= convert_to_mode (mode
, op0
,
8549 TYPE_UNSIGNED (TREE_TYPE
8553 convert_move (target
, op0
,
8554 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8558 return REDUCE_BIT_FIELD (op0
);
8560 case ADDR_SPACE_CONVERT_EXPR
:
8562 tree treeop0_type
= TREE_TYPE (treeop0
);
8564 gcc_assert (POINTER_TYPE_P (type
));
8565 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8567 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8568 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8570 /* Conversions between pointers to the same address space should
8571 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8572 gcc_assert (as_to
!= as_from
);
8574 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8576 /* Ask target code to handle conversion between pointers
8577 to overlapping address spaces. */
8578 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8579 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8581 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8585 /* For disjoint address spaces, converting anything but a null
8586 pointer invokes undefined behavior. We truncate or extend the
8587 value as if we'd converted via integers, which handles 0 as
8588 required, and all others as the programmer likely expects. */
8589 #ifndef POINTERS_EXTEND_UNSIGNED
8590 const int POINTERS_EXTEND_UNSIGNED
= 1;
8592 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8593 op0
, POINTERS_EXTEND_UNSIGNED
);
8599 case POINTER_PLUS_EXPR
:
8600 /* Even though the sizetype mode and the pointer's mode can be different
8601 expand is able to handle this correctly and get the correct result out
8602 of the PLUS_EXPR code. */
8603 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8604 if sizetype precision is smaller than pointer precision. */
8605 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8606 treeop1
= fold_convert_loc (loc
, type
,
8607 fold_convert_loc (loc
, ssizetype
,
8609 /* If sizetype precision is larger than pointer precision, truncate the
8610 offset to have matching modes. */
8611 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8612 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8616 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8617 something else, make sure we add the register to the constant and
8618 then to the other thing. This case can occur during strength
8619 reduction and doing it this way will produce better code if the
8620 frame pointer or argument pointer is eliminated.
8622 fold-const.c will ensure that the constant is always in the inner
8623 PLUS_EXPR, so the only case we need to do anything about is if
8624 sp, ap, or fp is our second argument, in which case we must swap
8625 the innermost first argument and our second argument. */
8627 if (TREE_CODE (treeop0
) == PLUS_EXPR
8628 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8630 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8631 || DECL_RTL (treeop1
) == stack_pointer_rtx
8632 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8637 /* If the result is to be ptr_mode and we are adding an integer to
8638 something, we might be forming a constant. So try to use
8639 plus_constant. If it produces a sum and we can't accept it,
8640 use force_operand. This allows P = &ARR[const] to generate
8641 efficient code on machines where a SYMBOL_REF is not a valid
8644 If this is an EXPAND_SUM call, always return the sum. */
8645 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8646 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8648 if (modifier
== EXPAND_STACK_PARM
)
8650 if (TREE_CODE (treeop0
) == INTEGER_CST
8651 && HWI_COMPUTABLE_MODE_P (mode
)
8652 && TREE_CONSTANT (treeop1
))
8656 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8658 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8660 /* Use wi::shwi to ensure that the constant is
8661 truncated according to the mode of OP1, then sign extended
8662 to a HOST_WIDE_INT. Using the constant directly can result
8663 in non-canonical RTL in a 64x32 cross compile. */
8664 wc
= TREE_INT_CST_LOW (treeop0
);
8666 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8667 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8668 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8669 op1
= force_operand (op1
, target
);
8670 return REDUCE_BIT_FIELD (op1
);
8673 else if (TREE_CODE (treeop1
) == INTEGER_CST
8674 && HWI_COMPUTABLE_MODE_P (mode
)
8675 && TREE_CONSTANT (treeop0
))
8679 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8681 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8682 (modifier
== EXPAND_INITIALIZER
8683 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8684 if (! CONSTANT_P (op0
))
8686 op1
= expand_expr (treeop1
, NULL_RTX
,
8687 VOIDmode
, modifier
);
8688 /* Return a PLUS if modifier says it's OK. */
8689 if (modifier
== EXPAND_SUM
8690 || modifier
== EXPAND_INITIALIZER
)
8691 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8694 /* Use wi::shwi to ensure that the constant is
8695 truncated according to the mode of OP1, then sign extended
8696 to a HOST_WIDE_INT. Using the constant directly can result
8697 in non-canonical RTL in a 64x32 cross compile. */
8698 wc
= TREE_INT_CST_LOW (treeop1
);
8700 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8701 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8702 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8703 op0
= force_operand (op0
, target
);
8704 return REDUCE_BIT_FIELD (op0
);
8708 /* Use TER to expand pointer addition of a negated value
8709 as pointer subtraction. */
8710 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8711 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8712 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8713 && TREE_CODE (treeop1
) == SSA_NAME
8714 && TYPE_MODE (TREE_TYPE (treeop0
))
8715 == TYPE_MODE (TREE_TYPE (treeop1
)))
8717 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8720 treeop1
= gimple_assign_rhs1 (def
);
8726 /* No sense saving up arithmetic to be done
8727 if it's all in the wrong mode to form part of an address.
8728 And force_operand won't know whether to sign-extend or
8730 if (modifier
!= EXPAND_INITIALIZER
8731 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8733 expand_operands (treeop0
, treeop1
,
8734 subtarget
, &op0
, &op1
, modifier
);
8735 if (op0
== const0_rtx
)
8737 if (op1
== const0_rtx
)
8742 expand_operands (treeop0
, treeop1
,
8743 subtarget
, &op0
, &op1
, modifier
);
8744 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8747 case POINTER_DIFF_EXPR
:
8749 /* For initializers, we are allowed to return a MINUS of two
8750 symbolic constants. Here we handle all cases when both operands
8752 /* Handle difference of two symbolic constants,
8753 for the sake of an initializer. */
8754 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8755 && really_constant_p (treeop0
)
8756 && really_constant_p (treeop1
))
8758 expand_operands (treeop0
, treeop1
,
8759 NULL_RTX
, &op0
, &op1
, modifier
);
8760 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8763 /* No sense saving up arithmetic to be done
8764 if it's all in the wrong mode to form part of an address.
8765 And force_operand won't know whether to sign-extend or
8767 if (modifier
!= EXPAND_INITIALIZER
8768 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8771 expand_operands (treeop0
, treeop1
,
8772 subtarget
, &op0
, &op1
, modifier
);
8774 /* Convert A - const to A + (-const). */
8775 if (CONST_INT_P (op1
))
8777 op1
= negate_rtx (mode
, op1
);
8778 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8783 case WIDEN_MULT_PLUS_EXPR
:
8784 case WIDEN_MULT_MINUS_EXPR
:
8785 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8786 op2
= expand_normal (treeop2
);
8787 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8791 case WIDEN_MULT_EXPR
:
8792 /* If first operand is constant, swap them.
8793 Thus the following special case checks need only
8794 check the second operand. */
8795 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8796 std::swap (treeop0
, treeop1
);
8798 /* First, check if we have a multiplication of one signed and one
8799 unsigned operand. */
8800 if (TREE_CODE (treeop1
) != INTEGER_CST
8801 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8802 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8804 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8805 this_optab
= usmul_widen_optab
;
8806 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8807 != CODE_FOR_nothing
)
8809 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8810 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8813 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8815 /* op0 and op1 might still be constant, despite the above
8816 != INTEGER_CST check. Handle it. */
8817 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8819 op0
= convert_modes (mode
, innermode
, op0
, true);
8820 op1
= convert_modes (mode
, innermode
, op1
, false);
8821 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8822 target
, unsignedp
));
8827 /* Check for a multiplication with matching signedness. */
8828 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8829 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8830 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8831 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8833 tree op0type
= TREE_TYPE (treeop0
);
8834 machine_mode innermode
= TYPE_MODE (op0type
);
8835 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8836 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8837 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8839 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8841 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8842 != CODE_FOR_nothing
)
8844 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8846 /* op0 and op1 might still be constant, despite the above
8847 != INTEGER_CST check. Handle it. */
8848 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8851 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
8853 = convert_modes (mode
, innermode
, op1
,
8854 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8855 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8859 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8860 unsignedp
, this_optab
);
8861 return REDUCE_BIT_FIELD (temp
);
8863 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8865 && innermode
== word_mode
)
8868 op0
= expand_normal (treeop0
);
8869 op1
= expand_normal (treeop1
);
8870 /* op0 and op1 might be constants, despite the above
8871 != INTEGER_CST check. Handle it. */
8872 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8873 goto widen_mult_const
;
8874 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8875 op1
= convert_modes (mode
, word_mode
, op1
,
8876 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8877 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8878 unsignedp
, OPTAB_LIB_WIDEN
);
8879 hipart
= gen_highpart (word_mode
, temp
);
8880 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8884 emit_move_insn (hipart
, htem
);
8885 return REDUCE_BIT_FIELD (temp
);
8889 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8890 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8891 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8892 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8895 /* If this is a fixed-point operation, then we cannot use the code
8896 below because "expand_mult" doesn't support sat/no-sat fixed-point
8898 if (ALL_FIXED_POINT_MODE_P (mode
))
8901 /* If first operand is constant, swap them.
8902 Thus the following special case checks need only
8903 check the second operand. */
8904 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8905 std::swap (treeop0
, treeop1
);
8907 /* Attempt to return something suitable for generating an
8908 indexed address, for machines that support that. */
8910 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8911 && tree_fits_shwi_p (treeop1
))
8913 tree exp1
= treeop1
;
8915 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8919 op0
= force_operand (op0
, NULL_RTX
);
8921 op0
= copy_to_mode_reg (mode
, op0
);
8923 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8924 gen_int_mode (tree_to_shwi (exp1
),
8925 TYPE_MODE (TREE_TYPE (exp1
)))));
8928 if (modifier
== EXPAND_STACK_PARM
)
8931 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8932 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8934 case TRUNC_MOD_EXPR
:
8935 case FLOOR_MOD_EXPR
:
8937 case ROUND_MOD_EXPR
:
8939 case TRUNC_DIV_EXPR
:
8940 case FLOOR_DIV_EXPR
:
8942 case ROUND_DIV_EXPR
:
8943 case EXACT_DIV_EXPR
:
8945 /* If this is a fixed-point operation, then we cannot use the code
8946 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8948 if (ALL_FIXED_POINT_MODE_P (mode
))
8951 if (modifier
== EXPAND_STACK_PARM
)
8953 /* Possible optimization: compute the dividend with EXPAND_SUM
8954 then if the divisor is constant can optimize the case
8955 where some terms of the dividend have coeffs divisible by it. */
8956 expand_operands (treeop0
, treeop1
,
8957 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8958 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8959 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8960 if (SCALAR_INT_MODE_P (mode
)
8962 && get_range_pos_neg (treeop0
) == 1
8963 && get_range_pos_neg (treeop1
) == 1)
8965 /* If both arguments are known to be positive when interpreted
8966 as signed, we can expand it as both signed and unsigned
8967 division or modulo. Choose the cheaper sequence in that case. */
8968 bool speed_p
= optimize_insn_for_speed_p ();
8969 do_pending_stack_adjust ();
8971 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8972 rtx_insn
*uns_insns
= get_insns ();
8975 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8976 rtx_insn
*sgn_insns
= get_insns ();
8978 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8979 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8981 /* If costs are the same then use as tie breaker the other
8983 if (uns_cost
== sgn_cost
)
8985 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8986 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
8989 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
8991 emit_insn (uns_insns
);
8994 emit_insn (sgn_insns
);
8997 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9002 case MULT_HIGHPART_EXPR
:
9003 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9004 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9008 case FIXED_CONVERT_EXPR
:
9009 op0
= expand_normal (treeop0
);
9010 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9011 target
= gen_reg_rtx (mode
);
9013 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9014 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9015 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9016 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9018 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9021 case FIX_TRUNC_EXPR
:
9022 op0
= expand_normal (treeop0
);
9023 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9024 target
= gen_reg_rtx (mode
);
9025 expand_fix (target
, op0
, unsignedp
);
9029 op0
= expand_normal (treeop0
);
9030 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9031 target
= gen_reg_rtx (mode
);
9032 /* expand_float can't figure out what to do if FROM has VOIDmode.
9033 So give it the correct mode. With -O, cse will optimize this. */
9034 if (GET_MODE (op0
) == VOIDmode
)
9035 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9037 expand_float (target
, op0
,
9038 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9042 op0
= expand_expr (treeop0
, subtarget
,
9043 VOIDmode
, EXPAND_NORMAL
);
9044 if (modifier
== EXPAND_STACK_PARM
)
9046 temp
= expand_unop (mode
,
9047 optab_for_tree_code (NEGATE_EXPR
, type
,
9051 return REDUCE_BIT_FIELD (temp
);
9055 op0
= expand_expr (treeop0
, subtarget
,
9056 VOIDmode
, EXPAND_NORMAL
);
9057 if (modifier
== EXPAND_STACK_PARM
)
9060 /* ABS_EXPR is not valid for complex arguments. */
9061 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9062 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9064 /* Unsigned abs is simply the operand. Testing here means we don't
9065 risk generating incorrect code below. */
9066 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9069 return expand_abs (mode
, op0
, target
, unsignedp
,
9070 safe_from_p (target
, treeop0
, 1));
9074 target
= original_target
;
9076 || modifier
== EXPAND_STACK_PARM
9077 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9078 || GET_MODE (target
) != mode
9080 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9081 target
= gen_reg_rtx (mode
);
9082 expand_operands (treeop0
, treeop1
,
9083 target
, &op0
, &op1
, EXPAND_NORMAL
);
9085 /* First try to do it with a special MIN or MAX instruction.
9086 If that does not win, use a conditional jump to select the proper
9088 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9089 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9094 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9095 and similarly for MAX <x, y>. */
9096 if (VECTOR_TYPE_P (type
))
9098 tree t0
= make_tree (type
, op0
);
9099 tree t1
= make_tree (type
, op1
);
9100 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9102 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9106 /* At this point, a MEM target is no longer useful; we will get better
9109 if (! REG_P (target
))
9110 target
= gen_reg_rtx (mode
);
9112 /* If op1 was placed in target, swap op0 and op1. */
9113 if (target
!= op0
&& target
== op1
)
9114 std::swap (op0
, op1
);
9116 /* We generate better code and avoid problems with op1 mentioning
9117 target by forcing op1 into a pseudo if it isn't a constant. */
9118 if (! CONSTANT_P (op1
))
9119 op1
= force_reg (mode
, op1
);
9122 enum rtx_code comparison_code
;
9125 if (code
== MAX_EXPR
)
9126 comparison_code
= unsignedp
? GEU
: GE
;
9128 comparison_code
= unsignedp
? LEU
: LE
;
9130 /* Canonicalize to comparisons against 0. */
9131 if (op1
== const1_rtx
)
9133 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9134 or (a != 0 ? a : 1) for unsigned.
9135 For MIN we are safe converting (a <= 1 ? a : 1)
9136 into (a <= 0 ? a : 1) */
9137 cmpop1
= const0_rtx
;
9138 if (code
== MAX_EXPR
)
9139 comparison_code
= unsignedp
? NE
: GT
;
9141 if (op1
== constm1_rtx
&& !unsignedp
)
9143 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9144 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9145 cmpop1
= const0_rtx
;
9146 if (code
== MIN_EXPR
)
9147 comparison_code
= LT
;
9150 /* Use a conditional move if possible. */
9151 if (can_conditionally_move_p (mode
))
9157 /* Try to emit the conditional move. */
9158 insn
= emit_conditional_move (target
, comparison_code
,
9163 /* If we could do the conditional move, emit the sequence,
9167 rtx_insn
*seq
= get_insns ();
9173 /* Otherwise discard the sequence and fall back to code with
9179 emit_move_insn (target
, op0
);
9181 lab
= gen_label_rtx ();
9182 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9183 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9184 profile_probability::uninitialized ());
9186 emit_move_insn (target
, op1
);
9191 op0
= expand_expr (treeop0
, subtarget
,
9192 VOIDmode
, EXPAND_NORMAL
);
9193 if (modifier
== EXPAND_STACK_PARM
)
9195 /* In case we have to reduce the result to bitfield precision
9196 for unsigned bitfield expand this as XOR with a proper constant
9198 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9200 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9201 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9202 false, GET_MODE_PRECISION (int_mode
));
9204 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9205 immed_wide_int_const (mask
, int_mode
),
9206 target
, 1, OPTAB_LIB_WIDEN
);
9209 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9213 /* ??? Can optimize bitwise operations with one arg constant.
9214 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9215 and (a bitwise1 b) bitwise2 b (etc)
9216 but that is probably not worth while. */
9225 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9226 || type_has_mode_precision_p (type
));
9232 /* If this is a fixed-point operation, then we cannot use the code
9233 below because "expand_shift" doesn't support sat/no-sat fixed-point
9235 if (ALL_FIXED_POINT_MODE_P (mode
))
9238 if (! safe_from_p (subtarget
, treeop1
, 1))
9240 if (modifier
== EXPAND_STACK_PARM
)
9242 op0
= expand_expr (treeop0
, subtarget
,
9243 VOIDmode
, EXPAND_NORMAL
);
9245 /* Left shift optimization when shifting across word_size boundary.
9247 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9248 there isn't native instruction to support this wide mode
9249 left shift. Given below scenario:
9251 Type A = (Type) B << C
9254 | dest_high | dest_low |
9258 If the shift amount C caused we shift B to across the word
9259 size boundary, i.e part of B shifted into high half of
9260 destination register, and part of B remains in the low
9261 half, then GCC will use the following left shift expand
9264 1. Initialize dest_low to B.
9265 2. Initialize every bit of dest_high to the sign bit of B.
9266 3. Logic left shift dest_low by C bit to finalize dest_low.
9267 The value of dest_low before this shift is kept in a temp D.
9268 4. Logic left shift dest_high by C.
9269 5. Logic right shift D by (word_size - C).
9270 6. Or the result of 4 and 5 to finalize dest_high.
9272 While, by checking gimple statements, if operand B is
9273 coming from signed extension, then we can simplify above
9276 1. dest_high = src_low >> (word_size - C).
9277 2. dest_low = src_low << C.
9279 We can use one arithmetic right shift to finish all the
9280 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9281 needed from 6 into 2.
9283 The case is similar for zero extension, except that we
9284 initialize dest_high to zero rather than copies of the sign
9285 bit from B. Furthermore, we need to use a logical right shift
9288 The choice of sign-extension versus zero-extension is
9289 determined entirely by whether or not B is signed and is
9290 independent of the current setting of unsignedp. */
9293 if (code
== LSHIFT_EXPR
9296 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9298 && TREE_CONSTANT (treeop1
)
9299 && TREE_CODE (treeop0
) == SSA_NAME
)
9301 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9302 if (is_gimple_assign (def
)
9303 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9305 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9306 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9308 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9309 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9310 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9311 >= GET_MODE_BITSIZE (word_mode
)))
9313 rtx_insn
*seq
, *seq_old
;
9314 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9316 bool extend_unsigned
9317 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9318 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9319 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9320 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9321 int_mode
, high_off
);
9322 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9323 - TREE_INT_CST_LOW (treeop1
));
9324 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9327 /* dest_high = src_low >> (word_size - C). */
9328 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9331 if (temp
!= dest_high
)
9332 emit_move_insn (dest_high
, temp
);
9334 /* dest_low = src_low << C. */
9335 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9336 treeop1
, dest_low
, unsignedp
);
9337 if (temp
!= dest_low
)
9338 emit_move_insn (dest_low
, temp
);
9344 if (have_insn_for (ASHIFT
, int_mode
))
9346 bool speed_p
= optimize_insn_for_speed_p ();
9348 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9353 seq_old
= get_insns ();
9355 if (seq_cost (seq
, speed_p
)
9356 >= seq_cost (seq_old
, speed_p
))
9367 if (temp
== NULL_RTX
)
9368 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9370 if (code
== LSHIFT_EXPR
)
9371 temp
= REDUCE_BIT_FIELD (temp
);
9375 /* Could determine the answer when only additive constants differ. Also,
9376 the addition of one can be handled by changing the condition. */
9383 case UNORDERED_EXPR
:
9392 temp
= do_store_flag (ops
,
9393 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9394 tmode
!= VOIDmode
? tmode
: mode
);
9398 /* Use a compare and a jump for BLKmode comparisons, or for function
9399 type comparisons is have_canonicalize_funcptr_for_compare. */
9402 || modifier
== EXPAND_STACK_PARM
9403 || ! safe_from_p (target
, treeop0
, 1)
9404 || ! safe_from_p (target
, treeop1
, 1)
9405 /* Make sure we don't have a hard reg (such as function's return
9406 value) live across basic blocks, if not optimizing. */
9407 || (!optimize
&& REG_P (target
)
9408 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9409 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9411 emit_move_insn (target
, const0_rtx
);
9413 rtx_code_label
*lab1
= gen_label_rtx ();
9414 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9415 profile_probability::uninitialized ());
9417 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9418 emit_move_insn (target
, constm1_rtx
);
9420 emit_move_insn (target
, const1_rtx
);
9426 /* Get the rtx code of the operands. */
9427 op0
= expand_normal (treeop0
);
9428 op1
= expand_normal (treeop1
);
9431 target
= gen_reg_rtx (TYPE_MODE (type
));
9433 /* If target overlaps with op1, then either we need to force
9434 op1 into a pseudo (if target also overlaps with op0),
9435 or write the complex parts in reverse order. */
9436 switch (GET_CODE (target
))
9439 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9441 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9443 complex_expr_force_op1
:
9444 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9445 emit_move_insn (temp
, op1
);
9449 complex_expr_swap_order
:
9450 /* Move the imaginary (op1) and real (op0) parts to their
9452 write_complex_part (target
, op1
, true);
9453 write_complex_part (target
, op0
, false);
9459 temp
= adjust_address_nv (target
,
9460 GET_MODE_INNER (GET_MODE (target
)), 0);
9461 if (reg_overlap_mentioned_p (temp
, op1
))
9463 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9464 temp
= adjust_address_nv (target
, imode
,
9465 GET_MODE_SIZE (imode
));
9466 if (reg_overlap_mentioned_p (temp
, op0
))
9467 goto complex_expr_force_op1
;
9468 goto complex_expr_swap_order
;
9472 if (reg_overlap_mentioned_p (target
, op1
))
9474 if (reg_overlap_mentioned_p (target
, op0
))
9475 goto complex_expr_force_op1
;
9476 goto complex_expr_swap_order
;
9481 /* Move the real (op0) and imaginary (op1) parts to their location. */
9482 write_complex_part (target
, op0
, false);
9483 write_complex_part (target
, op1
, true);
9487 case WIDEN_SUM_EXPR
:
9489 tree oprnd0
= treeop0
;
9490 tree oprnd1
= treeop1
;
9492 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9493 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9498 case VEC_UNPACK_HI_EXPR
:
9499 case VEC_UNPACK_LO_EXPR
:
9500 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9501 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9503 op0
= expand_normal (treeop0
);
9504 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9510 case VEC_UNPACK_FLOAT_HI_EXPR
:
9511 case VEC_UNPACK_FLOAT_LO_EXPR
:
9513 op0
= expand_normal (treeop0
);
9514 /* The signedness is determined from input operand. */
9515 temp
= expand_widen_pattern_expr
9516 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9517 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9523 case VEC_WIDEN_MULT_HI_EXPR
:
9524 case VEC_WIDEN_MULT_LO_EXPR
:
9525 case VEC_WIDEN_MULT_EVEN_EXPR
:
9526 case VEC_WIDEN_MULT_ODD_EXPR
:
9527 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9528 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9529 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9530 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9532 gcc_assert (target
);
9535 case VEC_PACK_SAT_EXPR
:
9536 case VEC_PACK_FIX_TRUNC_EXPR
:
9537 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9540 case VEC_PACK_TRUNC_EXPR
:
9541 if (VECTOR_BOOLEAN_TYPE_P (type
)
9542 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
9543 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
9544 && SCALAR_INT_MODE_P (mode
))
9546 struct expand_operand eops
[4];
9547 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
9548 expand_operands (treeop0
, treeop1
,
9549 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9550 this_optab
= vec_pack_sbool_trunc_optab
;
9551 enum insn_code icode
= optab_handler (this_optab
, imode
);
9552 create_output_operand (&eops
[0], target
, mode
);
9553 create_convert_operand_from (&eops
[1], op0
, imode
, false);
9554 create_convert_operand_from (&eops
[2], op1
, imode
, false);
9555 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
9556 create_input_operand (&eops
[3], temp
, imode
);
9557 expand_insn (icode
, 4, eops
);
9558 return eops
[0].value
;
9560 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9563 case VEC_PACK_FLOAT_EXPR
:
9564 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9565 expand_operands (treeop0
, treeop1
,
9566 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9567 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9569 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9570 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9572 gcc_assert (target
);
9577 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9578 vec_perm_builder sel
;
9579 if (TREE_CODE (treeop2
) == VECTOR_CST
9580 && tree_to_vec_perm_builder (&sel
, treeop2
))
9582 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9583 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9588 op2
= expand_normal (treeop2
);
9589 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9597 tree oprnd0
= treeop0
;
9598 tree oprnd1
= treeop1
;
9599 tree oprnd2
= treeop2
;
9602 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9603 op2
= expand_normal (oprnd2
);
9604 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9611 tree oprnd0
= treeop0
;
9612 tree oprnd1
= treeop1
;
9613 tree oprnd2
= treeop2
;
9616 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9617 op2
= expand_normal (oprnd2
);
9618 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9623 case REALIGN_LOAD_EXPR
:
9625 tree oprnd0
= treeop0
;
9626 tree oprnd1
= treeop1
;
9627 tree oprnd2
= treeop2
;
9630 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9631 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9632 op2
= expand_normal (oprnd2
);
9633 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9641 /* A COND_EXPR with its type being VOID_TYPE represents a
9642 conditional jump and is handled in
9643 expand_gimple_cond_expr. */
9644 gcc_assert (!VOID_TYPE_P (type
));
9646 /* Note that COND_EXPRs whose type is a structure or union
9647 are required to be constructed to contain assignments of
9648 a temporary variable, so that we can evaluate them here
9649 for side effect only. If type is void, we must do likewise. */
9651 gcc_assert (!TREE_ADDRESSABLE (type
)
9653 && TREE_TYPE (treeop1
) != void_type_node
9654 && TREE_TYPE (treeop2
) != void_type_node
);
9656 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9660 /* If we are not to produce a result, we have no target. Otherwise,
9661 if a target was specified use it; it will not be used as an
9662 intermediate target unless it is safe. If no target, use a
9665 if (modifier
!= EXPAND_STACK_PARM
9667 && safe_from_p (original_target
, treeop0
, 1)
9668 && GET_MODE (original_target
) == mode
9669 && !MEM_P (original_target
))
9670 temp
= original_target
;
9672 temp
= assign_temp (type
, 0, 1);
9674 do_pending_stack_adjust ();
9676 rtx_code_label
*lab0
= gen_label_rtx ();
9677 rtx_code_label
*lab1
= gen_label_rtx ();
9678 jumpifnot (treeop0
, lab0
,
9679 profile_probability::uninitialized ());
9680 store_expr (treeop1
, temp
,
9681 modifier
== EXPAND_STACK_PARM
,
9684 emit_jump_insn (targetm
.gen_jump (lab1
));
9687 store_expr (treeop2
, temp
,
9688 modifier
== EXPAND_STACK_PARM
,
9697 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9700 case VEC_DUPLICATE_EXPR
:
9701 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9702 target
= expand_vector_broadcast (mode
, op0
);
9703 gcc_assert (target
);
9706 case VEC_SERIES_EXPR
:
9707 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9708 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9710 case BIT_INSERT_EXPR
:
9712 unsigned bitpos
= tree_to_uhwi (treeop2
);
9714 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9715 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9717 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9718 rtx op0
= expand_normal (treeop0
);
9719 rtx op1
= expand_normal (treeop1
);
9720 rtx dst
= gen_reg_rtx (mode
);
9721 emit_move_insn (dst
, op0
);
9722 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9723 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9731 /* Here to do an ordinary binary operator. */
9733 expand_operands (treeop0
, treeop1
,
9734 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9736 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9738 if (modifier
== EXPAND_STACK_PARM
)
9740 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9741 unsignedp
, OPTAB_LIB_WIDEN
);
9743 /* Bitwise operations do not need bitfield reduction as we expect their
9744 operands being properly truncated. */
9745 if (code
== BIT_XOR_EXPR
9746 || code
== BIT_AND_EXPR
9747 || code
== BIT_IOR_EXPR
)
9749 return REDUCE_BIT_FIELD (temp
);
9751 #undef REDUCE_BIT_FIELD
9754 /* Return TRUE if expression STMT is suitable for replacement.
9755 Never consider memory loads as replaceable, because those don't ever lead
9756 into constant expressions. */
9759 stmt_is_replaceable_p (gimple
*stmt
)
9761 if (ssa_is_replaceable_p (stmt
))
9763 /* Don't move around loads. */
9764 if (!gimple_assign_single_p (stmt
)
9765 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9772 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9773 enum expand_modifier modifier
, rtx
*alt_rtl
,
9774 bool inner_reference_p
)
9776 rtx op0
, op1
, temp
, decl_rtl
;
9779 machine_mode mode
, dmode
;
9780 enum tree_code code
= TREE_CODE (exp
);
9781 rtx subtarget
, original_target
;
9784 bool reduce_bit_field
;
9785 location_t loc
= EXPR_LOCATION (exp
);
9786 struct separate_ops ops
;
9787 tree treeop0
, treeop1
, treeop2
;
9788 tree ssa_name
= NULL_TREE
;
9791 type
= TREE_TYPE (exp
);
9792 mode
= TYPE_MODE (type
);
9793 unsignedp
= TYPE_UNSIGNED (type
);
9795 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9796 if (!VL_EXP_CLASS_P (exp
))
9797 switch (TREE_CODE_LENGTH (code
))
9800 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9801 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9802 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9812 ignore
= (target
== const0_rtx
9813 || ((CONVERT_EXPR_CODE_P (code
)
9814 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9815 && TREE_CODE (type
) == VOID_TYPE
));
9817 /* An operation in what may be a bit-field type needs the
9818 result to be reduced to the precision of the bit-field type,
9819 which is narrower than that of the type's mode. */
9820 reduce_bit_field
= (!ignore
9821 && INTEGRAL_TYPE_P (type
)
9822 && !type_has_mode_precision_p (type
));
9824 /* If we are going to ignore this result, we need only do something
9825 if there is a side-effect somewhere in the expression. If there
9826 is, short-circuit the most common cases here. Note that we must
9827 not call expand_expr with anything but const0_rtx in case this
9828 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9832 if (! TREE_SIDE_EFFECTS (exp
))
9835 /* Ensure we reference a volatile object even if value is ignored, but
9836 don't do this if all we are doing is taking its address. */
9837 if (TREE_THIS_VOLATILE (exp
)
9838 && TREE_CODE (exp
) != FUNCTION_DECL
9839 && mode
!= VOIDmode
&& mode
!= BLKmode
9840 && modifier
!= EXPAND_CONST_ADDRESS
)
9842 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9848 if (TREE_CODE_CLASS (code
) == tcc_unary
9849 || code
== BIT_FIELD_REF
9850 || code
== COMPONENT_REF
9851 || code
== INDIRECT_REF
)
9852 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9855 else if (TREE_CODE_CLASS (code
) == tcc_binary
9856 || TREE_CODE_CLASS (code
) == tcc_comparison
9857 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9859 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9860 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9867 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9870 /* Use subtarget as the target for operand 0 of a binary operation. */
9871 subtarget
= get_subtarget (target
);
9872 original_target
= target
;
9878 tree function
= decl_function_context (exp
);
9880 temp
= label_rtx (exp
);
9881 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9883 if (function
!= current_function_decl
9885 LABEL_REF_NONLOCAL_P (temp
) = 1;
9887 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9892 /* ??? ivopts calls expander, without any preparation from
9893 out-of-ssa. So fake instructions as if this was an access to the
9894 base variable. This unnecessarily allocates a pseudo, see how we can
9895 reuse it, if partition base vars have it set already. */
9896 if (!currently_expanding_to_rtl
)
9898 tree var
= SSA_NAME_VAR (exp
);
9899 if (var
&& DECL_RTL_SET_P (var
))
9900 return DECL_RTL (var
);
9901 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9902 LAST_VIRTUAL_REGISTER
+ 1);
9905 g
= get_gimple_for_ssa_name (exp
);
9906 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9908 && modifier
== EXPAND_INITIALIZER
9909 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9910 && (optimize
|| !SSA_NAME_VAR (exp
)
9911 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9912 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9913 g
= SSA_NAME_DEF_STMT (exp
);
9917 location_t saved_loc
= curr_insn_location ();
9918 location_t loc
= gimple_location (g
);
9919 if (loc
!= UNKNOWN_LOCATION
)
9920 set_curr_insn_location (loc
);
9921 ops
.code
= gimple_assign_rhs_code (g
);
9922 switch (get_gimple_rhs_class (ops
.code
))
9924 case GIMPLE_TERNARY_RHS
:
9925 ops
.op2
= gimple_assign_rhs3 (g
);
9927 case GIMPLE_BINARY_RHS
:
9928 ops
.op1
= gimple_assign_rhs2 (g
);
9930 /* Try to expand conditonal compare. */
9931 if (targetm
.gen_ccmp_first
)
9933 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9934 r
= expand_ccmp_expr (g
, mode
);
9939 case GIMPLE_UNARY_RHS
:
9940 ops
.op0
= gimple_assign_rhs1 (g
);
9941 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9943 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9945 case GIMPLE_SINGLE_RHS
:
9947 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9948 tmode
, modifier
, alt_rtl
,
9955 set_curr_insn_location (saved_loc
);
9956 if (REG_P (r
) && !REG_EXPR (r
))
9957 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9962 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9963 exp
= SSA_NAME_VAR (ssa_name
);
9964 goto expand_decl_rtl
;
9968 /* If a static var's type was incomplete when the decl was written,
9969 but the type is complete now, lay out the decl now. */
9970 if (DECL_SIZE (exp
) == 0
9971 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9972 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9973 layout_decl (exp
, 0);
9979 decl_rtl
= DECL_RTL (exp
);
9981 gcc_assert (decl_rtl
);
9983 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9984 settings for VECTOR_TYPE_P that might switch for the function. */
9985 if (currently_expanding_to_rtl
9986 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9987 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9988 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9990 decl_rtl
= copy_rtx (decl_rtl
);
9992 /* Record writes to register variables. */
9993 if (modifier
== EXPAND_WRITE
9995 && HARD_REGISTER_P (decl_rtl
))
9996 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9997 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9999 /* Ensure variable marked as used even if it doesn't go through
10000 a parser. If it hasn't be used yet, write out an external
10003 TREE_USED (exp
) = 1;
10005 /* Show we haven't gotten RTL for this yet. */
10008 /* Variables inherited from containing functions should have
10009 been lowered by this point. */
10011 context
= decl_function_context (exp
);
10013 || SCOPE_FILE_SCOPE_P (context
)
10014 || context
== current_function_decl
10015 || TREE_STATIC (exp
)
10016 || DECL_EXTERNAL (exp
)
10017 /* ??? C++ creates functions that are not TREE_STATIC. */
10018 || TREE_CODE (exp
) == FUNCTION_DECL
);
10020 /* This is the case of an array whose size is to be determined
10021 from its initializer, while the initializer is still being parsed.
10022 ??? We aren't parsing while expanding anymore. */
10024 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10025 temp
= validize_mem (decl_rtl
);
10027 /* If DECL_RTL is memory, we are in the normal case and the
10028 address is not valid, get the address into a register. */
10030 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10033 *alt_rtl
= decl_rtl
;
10034 decl_rtl
= use_anchored_address (decl_rtl
);
10035 if (modifier
!= EXPAND_CONST_ADDRESS
10036 && modifier
!= EXPAND_SUM
10037 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10038 : GET_MODE (decl_rtl
),
10039 XEXP (decl_rtl
, 0),
10040 MEM_ADDR_SPACE (decl_rtl
)))
10041 temp
= replace_equiv_address (decl_rtl
,
10042 copy_rtx (XEXP (decl_rtl
, 0)));
10045 /* If we got something, return it. But first, set the alignment
10046 if the address is a register. */
10049 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10050 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10056 dmode
= DECL_MODE (exp
);
10058 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10060 /* If the mode of DECL_RTL does not match that of the decl,
10061 there are two cases: we are dealing with a BLKmode value
10062 that is returned in a register, or we are dealing with
10063 a promoted value. In the latter case, return a SUBREG
10064 of the wanted mode, but mark it so that we know that it
10065 was already extended. */
10066 if (REG_P (decl_rtl
)
10067 && dmode
!= BLKmode
10068 && GET_MODE (decl_rtl
) != dmode
)
10070 machine_mode pmode
;
10072 /* Get the signedness to be used for this variable. Ensure we get
10073 the same mode we got when the variable was declared. */
10074 if (code
!= SSA_NAME
)
10075 pmode
= promote_decl_mode (exp
, &unsignedp
);
10076 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10077 && gimple_code (g
) == GIMPLE_CALL
10078 && !gimple_call_internal_p (g
))
10079 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10080 gimple_call_fntype (g
),
10083 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10084 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10086 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10087 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10088 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10096 /* Given that TYPE_PRECISION (type) is not always equal to
10097 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10098 the former to the latter according to the signedness of the
10100 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
10101 temp
= immed_wide_int_const
10102 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
10108 tree tmp
= NULL_TREE
;
10109 if (VECTOR_MODE_P (mode
))
10110 return const_vector_from_tree (exp
);
10111 scalar_int_mode int_mode
;
10112 if (is_int_mode (mode
, &int_mode
))
10114 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10115 return const_scalar_mask_from_tree (int_mode
, exp
);
10119 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10121 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10122 type_for_mode
, exp
);
10127 vec
<constructor_elt
, va_gc
> *v
;
10128 /* Constructors need to be fixed-length. FIXME. */
10129 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10130 vec_alloc (v
, nunits
);
10131 for (unsigned int i
= 0; i
< nunits
; ++i
)
10132 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10133 tmp
= build_constructor (type
, v
);
10135 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10140 if (modifier
== EXPAND_WRITE
)
10142 /* Writing into CONST_DECL is always invalid, but handle it
10144 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10145 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10146 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10147 EXPAND_NORMAL
, as
);
10148 op0
= memory_address_addr_space (mode
, op0
, as
);
10149 temp
= gen_rtx_MEM (mode
, op0
);
10150 set_mem_addr_space (temp
, as
);
10153 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10156 /* If optimized, generate immediate CONST_DOUBLE
10157 which will be turned into memory by reload if necessary.
10159 We used to force a register so that loop.c could see it. But
10160 this does not allow gen_* patterns to perform optimizations with
10161 the constants. It also produces two insns in cases like "x = 1.0;".
10162 On most machines, floating-point constants are not permitted in
10163 many insns, so we'd end up copying it to a register in any case.
10165 Now, we do the copying in expand_binop, if appropriate. */
10166 return const_double_from_real_value (TREE_REAL_CST (exp
),
10167 TYPE_MODE (TREE_TYPE (exp
)));
10170 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10171 TYPE_MODE (TREE_TYPE (exp
)));
10174 /* Handle evaluating a complex constant in a CONCAT target. */
10175 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10177 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10180 rtarg
= XEXP (original_target
, 0);
10181 itarg
= XEXP (original_target
, 1);
10183 /* Move the real and imaginary parts separately. */
10184 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10185 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10188 emit_move_insn (rtarg
, op0
);
10190 emit_move_insn (itarg
, op1
);
10192 return original_target
;
10198 temp
= expand_expr_constant (exp
, 1, modifier
);
10200 /* temp contains a constant address.
10201 On RISC machines where a constant address isn't valid,
10202 make some insns to get that address into a register. */
10203 if (modifier
!= EXPAND_CONST_ADDRESS
10204 && modifier
!= EXPAND_INITIALIZER
10205 && modifier
!= EXPAND_SUM
10206 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10207 MEM_ADDR_SPACE (temp
)))
10208 return replace_equiv_address (temp
,
10209 copy_rtx (XEXP (temp
, 0)));
10213 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10217 tree val
= treeop0
;
10218 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10219 inner_reference_p
);
10221 if (!SAVE_EXPR_RESOLVED_P (exp
))
10223 /* We can indeed still hit this case, typically via builtin
10224 expanders calling save_expr immediately before expanding
10225 something. Assume this means that we only have to deal
10226 with non-BLKmode values. */
10227 gcc_assert (GET_MODE (ret
) != BLKmode
);
10229 val
= build_decl (curr_insn_location (),
10230 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10231 DECL_ARTIFICIAL (val
) = 1;
10232 DECL_IGNORED_P (val
) = 1;
10234 TREE_OPERAND (exp
, 0) = treeop0
;
10235 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10237 if (!CONSTANT_P (ret
))
10238 ret
= copy_to_reg (ret
);
10239 SET_DECL_RTL (val
, ret
);
10247 /* If we don't need the result, just ensure we evaluate any
10251 unsigned HOST_WIDE_INT idx
;
10254 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10255 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10260 return expand_constructor (exp
, target
, modifier
, false);
10262 case TARGET_MEM_REF
:
10265 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10266 enum insn_code icode
;
10267 unsigned int align
;
10269 op0
= addr_for_mem_ref (exp
, as
, true);
10270 op0
= memory_address_addr_space (mode
, op0
, as
);
10271 temp
= gen_rtx_MEM (mode
, op0
);
10272 set_mem_attributes (temp
, exp
, 0);
10273 set_mem_addr_space (temp
, as
);
10274 align
= get_object_alignment (exp
);
10275 if (modifier
!= EXPAND_WRITE
10276 && modifier
!= EXPAND_MEMORY
10278 && align
< GET_MODE_ALIGNMENT (mode
)
10279 /* If the target does not have special handling for unaligned
10280 loads of mode then it can use regular moves for them. */
10281 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10282 != CODE_FOR_nothing
))
10284 struct expand_operand ops
[2];
10286 /* We've already validated the memory, and we're creating a
10287 new pseudo destination. The predicates really can't fail,
10288 nor can the generator. */
10289 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10290 create_fixed_operand (&ops
[1], temp
);
10291 expand_insn (icode
, 2, ops
);
10292 temp
= ops
[0].value
;
10299 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10301 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10302 machine_mode address_mode
;
10303 tree base
= TREE_OPERAND (exp
, 0);
10305 enum insn_code icode
;
10307 /* Handle expansion of non-aliased memory with non-BLKmode. That
10308 might end up in a register. */
10309 if (mem_ref_refers_to_non_mem_p (exp
))
10311 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10312 base
= TREE_OPERAND (base
, 0);
10313 poly_uint64 type_size
;
10314 if (known_eq (offset
, 0)
10316 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10317 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10318 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10319 target
, tmode
, modifier
);
10320 if (TYPE_MODE (type
) == BLKmode
)
10322 temp
= assign_stack_temp (DECL_MODE (base
),
10323 GET_MODE_SIZE (DECL_MODE (base
)));
10324 store_expr (base
, temp
, 0, false, false);
10325 temp
= adjust_address (temp
, BLKmode
, offset
);
10326 set_mem_size (temp
, int_size_in_bytes (type
));
10329 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10330 bitsize_int (offset
* BITS_PER_UNIT
));
10331 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10332 return expand_expr (exp
, target
, tmode
, modifier
);
10334 address_mode
= targetm
.addr_space
.address_mode (as
);
10335 base
= TREE_OPERAND (exp
, 0);
10336 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10338 tree mask
= gimple_assign_rhs2 (def_stmt
);
10339 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10340 gimple_assign_rhs1 (def_stmt
), mask
);
10341 TREE_OPERAND (exp
, 0) = base
;
10343 align
= get_object_alignment (exp
);
10344 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10345 op0
= memory_address_addr_space (mode
, op0
, as
);
10346 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10348 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10349 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10350 op0
= memory_address_addr_space (mode
, op0
, as
);
10352 temp
= gen_rtx_MEM (mode
, op0
);
10353 set_mem_attributes (temp
, exp
, 0);
10354 set_mem_addr_space (temp
, as
);
10355 if (TREE_THIS_VOLATILE (exp
))
10356 MEM_VOLATILE_P (temp
) = 1;
10357 if (modifier
!= EXPAND_WRITE
10358 && modifier
!= EXPAND_MEMORY
10359 && !inner_reference_p
10361 && align
< GET_MODE_ALIGNMENT (mode
))
10363 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10364 != CODE_FOR_nothing
)
10366 struct expand_operand ops
[2];
10368 /* We've already validated the memory, and we're creating a
10369 new pseudo destination. The predicates really can't fail,
10370 nor can the generator. */
10371 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10372 create_fixed_operand (&ops
[1], temp
);
10373 expand_insn (icode
, 2, ops
);
10374 temp
= ops
[0].value
;
10376 else if (targetm
.slow_unaligned_access (mode
, align
))
10377 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10378 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10379 (modifier
== EXPAND_STACK_PARM
10380 ? NULL_RTX
: target
),
10381 mode
, mode
, false, alt_rtl
);
10384 && modifier
!= EXPAND_MEMORY
10385 && modifier
!= EXPAND_WRITE
)
10386 temp
= flip_storage_order (mode
, temp
);
10393 tree array
= treeop0
;
10394 tree index
= treeop1
;
10397 /* Fold an expression like: "foo"[2].
10398 This is not done in fold so it won't happen inside &.
10399 Don't fold if this is for wide characters since it's too
10400 difficult to do correctly and this is a very rare case. */
10402 if (modifier
!= EXPAND_CONST_ADDRESS
10403 && modifier
!= EXPAND_INITIALIZER
10404 && modifier
!= EXPAND_MEMORY
)
10406 tree t
= fold_read_from_constant_string (exp
);
10409 return expand_expr (t
, target
, tmode
, modifier
);
10412 /* If this is a constant index into a constant array,
10413 just get the value from the array. Handle both the cases when
10414 we have an explicit constructor and when our operand is a variable
10415 that was declared const. */
10417 if (modifier
!= EXPAND_CONST_ADDRESS
10418 && modifier
!= EXPAND_INITIALIZER
10419 && modifier
!= EXPAND_MEMORY
10420 && TREE_CODE (array
) == CONSTRUCTOR
10421 && ! TREE_SIDE_EFFECTS (array
)
10422 && TREE_CODE (index
) == INTEGER_CST
)
10424 unsigned HOST_WIDE_INT ix
;
10427 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10429 if (tree_int_cst_equal (field
, index
))
10431 if (!TREE_SIDE_EFFECTS (value
))
10432 return expand_expr (fold (value
), target
, tmode
, modifier
);
10437 else if (optimize
>= 1
10438 && modifier
!= EXPAND_CONST_ADDRESS
10439 && modifier
!= EXPAND_INITIALIZER
10440 && modifier
!= EXPAND_MEMORY
10441 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10442 && TREE_CODE (index
) == INTEGER_CST
10443 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10444 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10446 if (init
== NULL_TREE
)
10448 tree value
= build_zero_cst (type
);
10449 if (TREE_CODE (value
) == CONSTRUCTOR
)
10451 /* If VALUE is a CONSTRUCTOR, this optimization is only
10452 useful if this doesn't store the CONSTRUCTOR into
10453 memory. If it does, it is more efficient to just
10454 load the data from the array directly. */
10455 rtx ret
= expand_constructor (value
, target
,
10457 if (ret
== NULL_RTX
)
10462 return expand_expr (value
, target
, tmode
, modifier
);
10464 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10466 unsigned HOST_WIDE_INT ix
;
10469 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10471 if (tree_int_cst_equal (field
, index
))
10473 if (TREE_SIDE_EFFECTS (value
))
10476 if (TREE_CODE (value
) == CONSTRUCTOR
)
10478 /* If VALUE is a CONSTRUCTOR, this
10479 optimization is only useful if
10480 this doesn't store the CONSTRUCTOR
10481 into memory. If it does, it is more
10482 efficient to just load the data from
10483 the array directly. */
10484 rtx ret
= expand_constructor (value
, target
,
10486 if (ret
== NULL_RTX
)
10491 expand_expr (fold (value
), target
, tmode
, modifier
);
10494 else if (TREE_CODE (init
) == STRING_CST
)
10496 tree low_bound
= array_ref_low_bound (exp
);
10497 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10499 /* Optimize the special case of a zero lower bound.
10501 We convert the lower bound to sizetype to avoid problems
10502 with constant folding. E.g. suppose the lower bound is
10503 1 and its mode is QI. Without the conversion
10504 (ARRAY + (INDEX - (unsigned char)1))
10506 (ARRAY + (-(unsigned char)1) + INDEX)
10508 (ARRAY + 255 + INDEX). Oops! */
10509 if (!integer_zerop (low_bound
))
10510 index1
= size_diffop_loc (loc
, index1
,
10511 fold_convert_loc (loc
, sizetype
,
10514 if (tree_fits_uhwi_p (index1
)
10515 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10517 tree type
= TREE_TYPE (TREE_TYPE (init
));
10518 scalar_int_mode mode
;
10520 if (is_int_mode (TYPE_MODE (type
), &mode
)
10521 && GET_MODE_SIZE (mode
) == 1)
10522 return gen_int_mode (TREE_STRING_POINTER (init
)
10523 [TREE_INT_CST_LOW (index1
)],
10529 goto normal_inner_ref
;
10531 case COMPONENT_REF
:
10532 /* If the operand is a CONSTRUCTOR, we can just extract the
10533 appropriate field if it is present. */
10534 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10536 unsigned HOST_WIDE_INT idx
;
10538 scalar_int_mode field_mode
;
10540 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10542 if (field
== treeop1
10543 /* We can normally use the value of the field in the
10544 CONSTRUCTOR. However, if this is a bitfield in
10545 an integral mode that we can fit in a HOST_WIDE_INT,
10546 we must mask only the number of bits in the bitfield,
10547 since this is done implicitly by the constructor. If
10548 the bitfield does not meet either of those conditions,
10549 we can't do this optimization. */
10550 && (! DECL_BIT_FIELD (field
)
10551 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10552 && (GET_MODE_PRECISION (field_mode
)
10553 <= HOST_BITS_PER_WIDE_INT
))))
10555 if (DECL_BIT_FIELD (field
)
10556 && modifier
== EXPAND_STACK_PARM
)
10558 op0
= expand_expr (value
, target
, tmode
, modifier
);
10559 if (DECL_BIT_FIELD (field
))
10561 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10562 scalar_int_mode imode
10563 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10565 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10567 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10569 op0
= expand_and (imode
, op0
, op1
, target
);
10573 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10575 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10577 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10585 goto normal_inner_ref
;
10587 case BIT_FIELD_REF
:
10588 case ARRAY_RANGE_REF
:
10591 machine_mode mode1
, mode2
;
10592 poly_int64 bitsize
, bitpos
, bytepos
;
10594 int reversep
, volatilep
= 0, must_force_mem
;
10596 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10597 &unsignedp
, &reversep
, &volatilep
);
10598 rtx orig_op0
, memloc
;
10599 bool clear_mem_expr
= false;
10601 /* If we got back the original object, something is wrong. Perhaps
10602 we are evaluating an expression too early. In any event, don't
10603 infinitely recurse. */
10604 gcc_assert (tem
!= exp
);
10606 /* If TEM's type is a union of variable size, pass TARGET to the inner
10607 computation, since it will need a temporary and TARGET is known
10608 to have to do. This occurs in unchecked conversion in Ada. */
10610 = expand_expr_real (tem
,
10611 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10612 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10613 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10615 && modifier
!= EXPAND_STACK_PARM
10616 ? target
: NULL_RTX
),
10618 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10621 /* If the field has a mode, we want to access it in the
10622 field's mode, not the computed mode.
10623 If a MEM has VOIDmode (external with incomplete type),
10624 use BLKmode for it instead. */
10627 if (mode1
!= VOIDmode
)
10628 op0
= adjust_address (op0
, mode1
, 0);
10629 else if (GET_MODE (op0
) == VOIDmode
)
10630 op0
= adjust_address (op0
, BLKmode
, 0);
10634 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10636 /* Make sure bitpos is not negative, it can wreak havoc later. */
10637 if (maybe_lt (bitpos
, 0))
10639 gcc_checking_assert (offset
== NULL_TREE
);
10640 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10641 bitpos
= num_trailing_bits (bitpos
);
10644 /* If we have either an offset, a BLKmode result, or a reference
10645 outside the underlying object, we must force it to memory.
10646 Such a case can occur in Ada if we have unchecked conversion
10647 of an expression from a scalar type to an aggregate type or
10648 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10649 passed a partially uninitialized object or a view-conversion
10650 to a larger size. */
10651 must_force_mem
= (offset
10652 || mode1
== BLKmode
10653 || (mode
== BLKmode
10654 && !int_mode_for_size (bitsize
, 1).exists ())
10655 || maybe_gt (bitpos
+ bitsize
,
10656 GET_MODE_BITSIZE (mode2
)));
10658 /* Handle CONCAT first. */
10659 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10661 if (known_eq (bitpos
, 0)
10662 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10663 && COMPLEX_MODE_P (mode1
)
10664 && COMPLEX_MODE_P (GET_MODE (op0
))
10665 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10666 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10669 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10670 if (mode1
!= GET_MODE (op0
))
10673 for (int i
= 0; i
< 2; i
++)
10675 rtx op
= read_complex_part (op0
, i
!= 0);
10676 if (GET_CODE (op
) == SUBREG
)
10677 op
= force_reg (GET_MODE (op
), op
);
10678 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10684 if (!REG_P (op
) && !MEM_P (op
))
10685 op
= force_reg (GET_MODE (op
), op
);
10686 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10690 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10694 if (known_eq (bitpos
, 0)
10695 && known_eq (bitsize
,
10696 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10697 && maybe_ne (bitsize
, 0))
10699 op0
= XEXP (op0
, 0);
10700 mode2
= GET_MODE (op0
);
10702 else if (known_eq (bitpos
,
10703 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10704 && known_eq (bitsize
,
10705 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10706 && maybe_ne (bitpos
, 0)
10707 && maybe_ne (bitsize
, 0))
10709 op0
= XEXP (op0
, 1);
10711 mode2
= GET_MODE (op0
);
10714 /* Otherwise force into memory. */
10715 must_force_mem
= 1;
10718 /* If this is a constant, put it in a register if it is a legitimate
10719 constant and we don't need a memory reference. */
10720 if (CONSTANT_P (op0
)
10721 && mode2
!= BLKmode
10722 && targetm
.legitimate_constant_p (mode2
, op0
)
10723 && !must_force_mem
)
10724 op0
= force_reg (mode2
, op0
);
10726 /* Otherwise, if this is a constant, try to force it to the constant
10727 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10728 is a legitimate constant. */
10729 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10730 op0
= validize_mem (memloc
);
10732 /* Otherwise, if this is a constant or the object is not in memory
10733 and need be, put it there. */
10734 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10736 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10737 emit_move_insn (memloc
, op0
);
10739 clear_mem_expr
= true;
10744 machine_mode address_mode
;
10745 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10748 gcc_assert (MEM_P (op0
));
10750 address_mode
= get_address_mode (op0
);
10751 if (GET_MODE (offset_rtx
) != address_mode
)
10753 /* We cannot be sure that the RTL in offset_rtx is valid outside
10754 of a memory address context, so force it into a register
10755 before attempting to convert it to the desired mode. */
10756 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10757 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10760 /* See the comment in expand_assignment for the rationale. */
10761 if (mode1
!= VOIDmode
10762 && maybe_ne (bitpos
, 0)
10763 && maybe_gt (bitsize
, 0)
10764 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10765 && multiple_p (bitpos
, bitsize
)
10766 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10767 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10769 op0
= adjust_address (op0
, mode1
, bytepos
);
10773 op0
= offset_address (op0
, offset_rtx
,
10774 highest_pow2_factor (offset
));
10777 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10778 record its alignment as BIGGEST_ALIGNMENT. */
10780 && known_eq (bitpos
, 0)
10782 && is_aligning_offset (offset
, tem
))
10783 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10785 /* Don't forget about volatility even if this is a bitfield. */
10786 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10788 if (op0
== orig_op0
)
10789 op0
= copy_rtx (op0
);
10791 MEM_VOLATILE_P (op0
) = 1;
10794 /* In cases where an aligned union has an unaligned object
10795 as a field, we might be extracting a BLKmode value from
10796 an integer-mode (e.g., SImode) object. Handle this case
10797 by doing the extract into an object as wide as the field
10798 (which we know to be the width of a basic mode), then
10799 storing into memory, and changing the mode to BLKmode. */
10800 if (mode1
== VOIDmode
10801 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10802 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10803 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10804 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10805 && modifier
!= EXPAND_CONST_ADDRESS
10806 && modifier
!= EXPAND_INITIALIZER
10807 && modifier
!= EXPAND_MEMORY
)
10808 /* If the bitfield is volatile and the bitsize
10809 is narrower than the access size of the bitfield,
10810 we need to extract bitfields from the access. */
10811 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10812 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10813 && mode1
!= BLKmode
10814 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10815 /* If the field isn't aligned enough to fetch as a memref,
10816 fetch it as a bit field. */
10817 || (mode1
!= BLKmode
10819 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10820 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10821 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10822 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10823 && modifier
!= EXPAND_MEMORY
10824 && ((modifier
== EXPAND_CONST_ADDRESS
10825 || modifier
== EXPAND_INITIALIZER
)
10827 : targetm
.slow_unaligned_access (mode1
,
10829 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10830 /* If the type and the field are a constant size and the
10831 size of the type isn't the same size as the bitfield,
10832 we must use bitfield operations. */
10833 || (known_size_p (bitsize
)
10834 && TYPE_SIZE (TREE_TYPE (exp
))
10835 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10836 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10839 machine_mode ext_mode
= mode
;
10841 if (ext_mode
== BLKmode
10842 && ! (target
!= 0 && MEM_P (op0
)
10844 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10845 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10847 if (ext_mode
== BLKmode
)
10850 target
= assign_temp (type
, 1, 1);
10852 /* ??? Unlike the similar test a few lines below, this one is
10853 very likely obsolete. */
10854 if (known_eq (bitsize
, 0))
10857 /* In this case, BITPOS must start at a byte boundary and
10858 TARGET, if specified, must be a MEM. */
10859 gcc_assert (MEM_P (op0
)
10860 && (!target
|| MEM_P (target
)));
10862 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10863 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10864 emit_block_move (target
,
10865 adjust_address (op0
, VOIDmode
, bytepos
),
10866 gen_int_mode (bytesize
, Pmode
),
10867 (modifier
== EXPAND_STACK_PARM
10868 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10873 /* If we have nothing to extract, the result will be 0 for targets
10874 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10875 return 0 for the sake of consistency, as reading a zero-sized
10876 bitfield is valid in Ada and the value is fully specified. */
10877 if (known_eq (bitsize
, 0))
10880 op0
= validize_mem (op0
);
10882 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10883 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10885 /* If the result has a record type and the extraction is done in
10886 an integral mode, then the field may be not aligned on a byte
10887 boundary; in this case, if it has reverse storage order, it
10888 needs to be extracted as a scalar field with reverse storage
10889 order and put back into memory order afterwards. */
10890 if (TREE_CODE (type
) == RECORD_TYPE
10891 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10892 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10894 gcc_checking_assert (known_ge (bitpos
, 0));
10895 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10896 (modifier
== EXPAND_STACK_PARM
10897 ? NULL_RTX
: target
),
10898 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10900 /* If the result has a record type and the mode of OP0 is an
10901 integral mode then, if BITSIZE is narrower than this mode
10902 and this is for big-endian data, we must put the field
10903 into the high-order bits. And we must also put it back
10904 into memory order if it has been previously reversed. */
10905 scalar_int_mode op0_mode
;
10906 if (TREE_CODE (type
) == RECORD_TYPE
10907 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10909 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10911 gcc_checking_assert (known_le (bitsize
, size
));
10912 if (maybe_lt (bitsize
, size
)
10913 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10914 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10915 size
- bitsize
, op0
, 1);
10918 op0
= flip_storage_order (op0_mode
, op0
);
10921 /* If the result type is BLKmode, store the data into a temporary
10922 of the appropriate type, but with the mode corresponding to the
10923 mode for the data we have (op0's mode). */
10924 if (mode
== BLKmode
)
10927 = assign_stack_temp_for_type (ext_mode
,
10928 GET_MODE_BITSIZE (ext_mode
),
10930 emit_move_insn (new_rtx
, op0
);
10931 op0
= copy_rtx (new_rtx
);
10932 PUT_MODE (op0
, BLKmode
);
10938 /* If the result is BLKmode, use that to access the object
10940 if (mode
== BLKmode
)
10943 /* Get a reference to just this component. */
10944 bytepos
= bits_to_bytes_round_down (bitpos
);
10945 if (modifier
== EXPAND_CONST_ADDRESS
10946 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10947 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
10949 op0
= adjust_address (op0
, mode1
, bytepos
);
10951 if (op0
== orig_op0
)
10952 op0
= copy_rtx (op0
);
10954 /* Don't set memory attributes if the base expression is
10955 SSA_NAME that got expanded as a MEM. In that case, we should
10956 just honor its original memory attributes. */
10957 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10958 set_mem_attributes (op0
, exp
, 0);
10960 if (REG_P (XEXP (op0
, 0)))
10961 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10963 /* If op0 is a temporary because the original expressions was forced
10964 to memory, clear MEM_EXPR so that the original expression cannot
10965 be marked as addressable through MEM_EXPR of the temporary. */
10966 if (clear_mem_expr
)
10967 set_mem_expr (op0
, NULL_TREE
);
10969 MEM_VOLATILE_P (op0
) |= volatilep
;
10972 && modifier
!= EXPAND_MEMORY
10973 && modifier
!= EXPAND_WRITE
)
10974 op0
= flip_storage_order (mode1
, op0
);
10976 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10977 || modifier
== EXPAND_CONST_ADDRESS
10978 || modifier
== EXPAND_INITIALIZER
)
10982 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10984 convert_move (target
, op0
, unsignedp
);
10989 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10992 /* All valid uses of __builtin_va_arg_pack () are removed during
10994 if (CALL_EXPR_VA_ARG_PACK (exp
))
10995 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10997 tree fndecl
= get_callee_fndecl (exp
), attr
;
11000 /* Don't diagnose the error attribute in thunks, those are
11001 artificially created. */
11002 && !CALL_FROM_THUNK_P (exp
)
11003 && (attr
= lookup_attribute ("error",
11004 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11006 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11007 error ("%Kcall to %qs declared with attribute error: %s", exp
,
11008 identifier_to_locale (ident
),
11009 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11012 /* Don't diagnose the warning attribute in thunks, those are
11013 artificially created. */
11014 && !CALL_FROM_THUNK_P (exp
)
11015 && (attr
= lookup_attribute ("warning",
11016 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11018 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11019 warning_at (tree_nonartificial_location (exp
),
11020 OPT_Wattribute_warning
,
11021 "%Kcall to %qs declared with attribute warning: %s",
11022 exp
, identifier_to_locale (ident
),
11023 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11026 /* Check for a built-in function. */
11027 if (fndecl
&& fndecl_built_in_p (fndecl
))
11029 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11030 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11033 return expand_call (exp
, target
, ignore
);
11035 case VIEW_CONVERT_EXPR
:
11038 /* If we are converting to BLKmode, try to avoid an intermediate
11039 temporary by fetching an inner memory reference. */
11040 if (mode
== BLKmode
11041 && poly_int_tree_p (TYPE_SIZE (type
))
11042 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11043 && handled_component_p (treeop0
))
11045 machine_mode mode1
;
11046 poly_int64 bitsize
, bitpos
, bytepos
;
11048 int unsignedp
, reversep
, volatilep
= 0;
11050 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11051 &unsignedp
, &reversep
, &volatilep
);
11054 /* ??? We should work harder and deal with non-zero offsets. */
11056 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11058 && known_size_p (bitsize
)
11059 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11061 /* See the normal_inner_ref case for the rationale. */
11063 = expand_expr_real (tem
,
11064 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11065 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11067 && modifier
!= EXPAND_STACK_PARM
11068 ? target
: NULL_RTX
),
11070 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11073 if (MEM_P (orig_op0
))
11077 /* Get a reference to just this component. */
11078 if (modifier
== EXPAND_CONST_ADDRESS
11079 || modifier
== EXPAND_SUM
11080 || modifier
== EXPAND_INITIALIZER
)
11081 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11083 op0
= adjust_address (op0
, mode
, bytepos
);
11085 if (op0
== orig_op0
)
11086 op0
= copy_rtx (op0
);
11088 set_mem_attributes (op0
, treeop0
, 0);
11089 if (REG_P (XEXP (op0
, 0)))
11090 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11092 MEM_VOLATILE_P (op0
) |= volatilep
;
11098 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11099 NULL
, inner_reference_p
);
11101 /* If the input and output modes are both the same, we are done. */
11102 if (mode
== GET_MODE (op0
))
11104 /* If neither mode is BLKmode, and both modes are the same size
11105 then we can use gen_lowpart. */
11106 else if (mode
!= BLKmode
11107 && GET_MODE (op0
) != BLKmode
11108 && known_eq (GET_MODE_PRECISION (mode
),
11109 GET_MODE_PRECISION (GET_MODE (op0
)))
11110 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11112 if (GET_CODE (op0
) == SUBREG
)
11113 op0
= force_reg (GET_MODE (op0
), op0
);
11114 temp
= gen_lowpart_common (mode
, op0
);
11119 if (!REG_P (op0
) && !MEM_P (op0
))
11120 op0
= force_reg (GET_MODE (op0
), op0
);
11121 op0
= gen_lowpart (mode
, op0
);
11124 /* If both types are integral, convert from one mode to the other. */
11125 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11126 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11127 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11128 /* If the output type is a bit-field type, do an extraction. */
11129 else if (reduce_bit_field
)
11130 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11131 TYPE_UNSIGNED (type
), NULL_RTX
,
11132 mode
, mode
, false, NULL
);
11133 /* As a last resort, spill op0 to memory, and reload it in a
11135 else if (!MEM_P (op0
))
11137 /* If the operand is not a MEM, force it into memory. Since we
11138 are going to be changing the mode of the MEM, don't call
11139 force_const_mem for constants because we don't allow pool
11140 constants to change mode. */
11141 tree inner_type
= TREE_TYPE (treeop0
);
11143 gcc_assert (!TREE_ADDRESSABLE (exp
));
11145 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11147 = assign_stack_temp_for_type
11148 (TYPE_MODE (inner_type
),
11149 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11151 emit_move_insn (target
, op0
);
11155 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11156 output type is such that the operand is known to be aligned, indicate
11157 that it is. Otherwise, we need only be concerned about alignment for
11158 non-BLKmode results. */
11161 enum insn_code icode
;
11163 if (modifier
!= EXPAND_WRITE
11164 && modifier
!= EXPAND_MEMORY
11165 && !inner_reference_p
11167 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11169 /* If the target does have special handling for unaligned
11170 loads of mode then use them. */
11171 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11172 != CODE_FOR_nothing
)
11176 op0
= adjust_address (op0
, mode
, 0);
11177 /* We've already validated the memory, and we're creating a
11178 new pseudo destination. The predicates really can't
11180 reg
= gen_reg_rtx (mode
);
11182 /* Nor can the insn generator. */
11183 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11187 else if (STRICT_ALIGNMENT
)
11189 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11190 poly_uint64 temp_size
= mode_size
;
11191 if (GET_MODE (op0
) != BLKmode
)
11192 temp_size
= upper_bound (temp_size
,
11193 GET_MODE_SIZE (GET_MODE (op0
)));
11195 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11196 rtx new_with_op0_mode
11197 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11199 gcc_assert (!TREE_ADDRESSABLE (exp
));
11201 if (GET_MODE (op0
) == BLKmode
)
11203 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11204 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11205 (modifier
== EXPAND_STACK_PARM
11206 ? BLOCK_OP_CALL_PARM
11207 : BLOCK_OP_NORMAL
));
11210 emit_move_insn (new_with_op0_mode
, op0
);
11216 op0
= adjust_address (op0
, mode
, 0);
11223 tree lhs
= treeop0
;
11224 tree rhs
= treeop1
;
11225 gcc_assert (ignore
);
11227 /* Check for |= or &= of a bitfield of size one into another bitfield
11228 of size 1. In this case, (unless we need the result of the
11229 assignment) we can do this more efficiently with a
11230 test followed by an assignment, if necessary.
11232 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11233 things change so we do, this code should be enhanced to
11235 if (TREE_CODE (lhs
) == COMPONENT_REF
11236 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11237 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11238 && TREE_OPERAND (rhs
, 0) == lhs
11239 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11240 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11241 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11243 rtx_code_label
*label
= gen_label_rtx ();
11244 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11245 profile_probability prob
= profile_probability::uninitialized ();
11247 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
11249 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
11250 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11252 do_pending_stack_adjust ();
11253 emit_label (label
);
11257 expand_assignment (lhs
, rhs
, false);
11262 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11264 case REALPART_EXPR
:
11265 op0
= expand_normal (treeop0
);
11266 return read_complex_part (op0
, false);
11268 case IMAGPART_EXPR
:
11269 op0
= expand_normal (treeop0
);
11270 return read_complex_part (op0
, true);
11277 /* Expanded in cfgexpand.c. */
11278 gcc_unreachable ();
11280 case TRY_CATCH_EXPR
:
11282 case EH_FILTER_EXPR
:
11283 case TRY_FINALLY_EXPR
:
11284 /* Lowered by tree-eh.c. */
11285 gcc_unreachable ();
11287 case WITH_CLEANUP_EXPR
:
11288 case CLEANUP_POINT_EXPR
:
11290 case CASE_LABEL_EXPR
:
11295 case COMPOUND_EXPR
:
11296 case PREINCREMENT_EXPR
:
11297 case PREDECREMENT_EXPR
:
11298 case POSTINCREMENT_EXPR
:
11299 case POSTDECREMENT_EXPR
:
11302 case COMPOUND_LITERAL_EXPR
:
11303 /* Lowered by gimplify.c. */
11304 gcc_unreachable ();
11307 /* Function descriptors are not valid except for as
11308 initialization constants, and should not be expanded. */
11309 gcc_unreachable ();
11311 case WITH_SIZE_EXPR
:
11312 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11313 have pulled out the size to use in whatever context it needed. */
11314 return expand_expr_real (treeop0
, original_target
, tmode
,
11315 modifier
, alt_rtl
, inner_reference_p
);
11318 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11322 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11323 signedness of TYPE), possibly returning the result in TARGET.
11324 TYPE is known to be a partial integer type. */
11326 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11328 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11329 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11331 /* For constant values, reduce using build_int_cst_type. */
11332 poly_int64 const_exp
;
11333 if (poly_int_rtx_p (exp
, &const_exp
))
11335 tree t
= build_int_cst_type (type
, const_exp
);
11336 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11338 else if (TYPE_UNSIGNED (type
))
11340 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11341 rtx mask
= immed_wide_int_const
11342 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11343 return expand_and (mode
, exp
, mask
, target
);
11347 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11348 int count
= GET_MODE_PRECISION (mode
) - prec
;
11349 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11350 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11354 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11355 when applied to the address of EXP produces an address known to be
11356 aligned more than BIGGEST_ALIGNMENT. */
11359 is_aligning_offset (const_tree offset
, const_tree exp
)
11361 /* Strip off any conversions. */
11362 while (CONVERT_EXPR_P (offset
))
11363 offset
= TREE_OPERAND (offset
, 0);
11365 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11366 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11367 if (TREE_CODE (offset
) != BIT_AND_EXPR
11368 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11369 || compare_tree_int (TREE_OPERAND (offset
, 1),
11370 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11371 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11374 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11375 It must be NEGATE_EXPR. Then strip any more conversions. */
11376 offset
= TREE_OPERAND (offset
, 0);
11377 while (CONVERT_EXPR_P (offset
))
11378 offset
= TREE_OPERAND (offset
, 0);
11380 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11383 offset
= TREE_OPERAND (offset
, 0);
11384 while (CONVERT_EXPR_P (offset
))
11385 offset
= TREE_OPERAND (offset
, 0);
11387 /* This must now be the address of EXP. */
11388 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11391 /* Return the tree node if an ARG corresponds to a string constant or zero
11392 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11393 non-constant) offset in bytes within the string that ARG is accessing.
11394 If MEM_SIZE is non-zero the storage size of the memory is returned.
11395 If DECL is non-zero the constant declaration is returned if available. */
11398 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11403 /* Non-constant index into the character array in an ARRAY_REF
11404 expression or null. */
11405 tree varidx
= NULL_TREE
;
11407 poly_int64 base_off
= 0;
11409 if (TREE_CODE (arg
) == ADDR_EXPR
)
11411 arg
= TREE_OPERAND (arg
, 0);
11413 if (TREE_CODE (arg
) == ARRAY_REF
)
11415 tree idx
= TREE_OPERAND (arg
, 1);
11416 if (TREE_CODE (idx
) != INTEGER_CST
)
11418 /* From a pointer (but not array) argument extract the variable
11419 index to prevent get_addr_base_and_unit_offset() from failing
11420 due to it. Use it later to compute the non-constant offset
11421 into the string and return it to the caller. */
11423 ref
= TREE_OPERAND (arg
, 0);
11425 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11428 if (!integer_zerop (array_ref_low_bound (arg
)))
11431 if (!integer_onep (array_ref_element_size (arg
)))
11435 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11437 || (TREE_CODE (array
) != VAR_DECL
11438 && TREE_CODE (array
) != CONST_DECL
11439 && TREE_CODE (array
) != STRING_CST
))
11442 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11444 tree arg0
= TREE_OPERAND (arg
, 0);
11445 tree arg1
= TREE_OPERAND (arg
, 1);
11448 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
11451 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
11457 /* Avoid pointers to arrays (see bug 86622). */
11458 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11459 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11460 && !(decl
&& !*decl
)
11461 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11462 && mem_size
&& tree_fits_uhwi_p (*mem_size
)
11463 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11466 tree type
= TREE_TYPE (offset
);
11467 arg1
= fold_convert (type
, arg1
);
11468 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11473 else if (TREE_CODE (arg
) == SSA_NAME
)
11475 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
11476 if (!is_gimple_assign (stmt
))
11479 tree rhs1
= gimple_assign_rhs1 (stmt
);
11480 tree_code code
= gimple_assign_rhs_code (stmt
);
11481 if (code
== ADDR_EXPR
)
11482 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
11483 else if (code
!= POINTER_PLUS_EXPR
)
11487 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
11489 /* Avoid pointers to arrays (see bug 86622). */
11490 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
11491 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
11492 && !(decl
&& !*decl
)
11493 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11494 && mem_size
&& tree_fits_uhwi_p (*mem_size
)
11495 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11498 tree rhs2
= gimple_assign_rhs2 (stmt
);
11499 tree type
= TREE_TYPE (offset
);
11500 rhs2
= fold_convert (type
, rhs2
);
11501 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
11506 else if (DECL_P (arg
))
11511 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11514 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11517 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11518 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11519 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11522 offset
= fold_convert (sizetype
, varidx
);
11525 if (TREE_CODE (array
) == STRING_CST
)
11527 *ptr_offset
= fold_convert (sizetype
, offset
);
11529 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11532 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
11533 >= TREE_STRING_LENGTH (array
));
11537 if (!VAR_P (array
) && TREE_CODE (array
) != CONST_DECL
)
11540 tree init
= ctor_for_folding (array
);
11542 /* Handle variables initialized with string literals. */
11543 if (!init
|| init
== error_mark_node
)
11545 if (TREE_CODE (init
) == CONSTRUCTOR
)
11547 /* Convert the 64-bit constant offset to a wider type to avoid
11550 if (!base_off
.is_constant (&wioff
))
11553 wioff
*= BITS_PER_UNIT
;
11554 if (!wi::fits_uhwi_p (wioff
))
11557 base_off
= wioff
.to_uhwi ();
11558 unsigned HOST_WIDE_INT fieldoff
= 0;
11559 init
= fold_ctor_reference (NULL_TREE
, init
, base_off
, 0, array
,
11561 HOST_WIDE_INT cstoff
;
11562 if (!base_off
.is_constant (&cstoff
))
11565 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11566 tree off
= build_int_cst (sizetype
, cstoff
);
11568 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11576 *ptr_offset
= offset
;
11578 tree eltype
= TREE_TYPE (init
);
11579 tree initsize
= TYPE_SIZE_UNIT (eltype
);
11581 *mem_size
= initsize
;
11586 if (TREE_CODE (init
) == INTEGER_CST
11587 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
11588 || TYPE_MAIN_VARIANT (eltype
) == char_type_node
))
11590 /* For a reference to (address of) a single constant character,
11591 store the native representation of the character in CHARBUF.
11592 If the reference is to an element of an array or a member
11593 of a struct, only consider narrow characters until ctors
11594 for wide character arrays are transformed to STRING_CSTs
11595 like those for narrow arrays. */
11596 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
11597 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
11600 /* Construct a string literal with elements of ELTYPE and
11601 the representation above. Then strip
11602 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11603 init
= build_string_literal (len
, (char *)charbuf
, eltype
);
11604 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
11608 if (TREE_CODE (init
) != STRING_CST
)
11611 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
11616 /* Compute the modular multiplicative inverse of A modulo M
11617 using extended Euclid's algorithm. Assumes A and M are coprime. */
11619 mod_inv (const wide_int
&a
, const wide_int
&b
)
11621 /* Verify the assumption. */
11622 gcc_checking_assert (wi::eq_p (wi::gcd (a
, b
), 1));
11624 unsigned int p
= a
.get_precision () + 1;
11625 gcc_checking_assert (b
.get_precision () + 1 == p
);
11626 wide_int c
= wide_int::from (a
, p
, UNSIGNED
);
11627 wide_int d
= wide_int::from (b
, p
, UNSIGNED
);
11628 wide_int x0
= wide_int::from (0, p
, UNSIGNED
);
11629 wide_int x1
= wide_int::from (1, p
, UNSIGNED
);
11631 if (wi::eq_p (b
, 1))
11632 return wide_int::from (1, p
, UNSIGNED
);
11634 while (wi::gt_p (c
, 1, UNSIGNED
))
11637 wide_int q
= wi::divmod_trunc (c
, d
, UNSIGNED
, &d
);
11640 x0
= wi::sub (x1
, wi::mul (q
, x0
));
11643 if (wi::lt_p (x1
, 0, SIGNED
))
11648 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11649 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11650 for C2 > 0 to x & C3 == C2
11651 for C2 < 0 to x & C3 == (C2 & C3). */
11653 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11655 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11656 tree treeop0
= gimple_assign_rhs1 (stmt
);
11657 tree treeop1
= gimple_assign_rhs2 (stmt
);
11658 tree type
= TREE_TYPE (*arg0
);
11659 scalar_int_mode mode
;
11660 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11662 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11663 || TYPE_PRECISION (type
) <= 1
11664 || TYPE_UNSIGNED (type
)
11665 /* Signed x % c == 0 should have been optimized into unsigned modulo
11667 || integer_zerop (*arg1
)
11668 /* If c is known to be non-negative, modulo will be expanded as unsigned
11670 || get_range_pos_neg (treeop0
) == 1)
11673 /* x % c == d where d < 0 && d <= -c should be always false. */
11674 if (tree_int_cst_sgn (*arg1
) == -1
11675 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
11678 int prec
= TYPE_PRECISION (type
);
11679 wide_int w
= wi::to_wide (treeop1
) - 1;
11680 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
11681 tree c3
= wide_int_to_tree (type
, w
);
11683 if (tree_int_cst_sgn (*arg1
) == -1)
11684 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
11686 rtx op0
= expand_normal (treeop0
);
11687 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11689 bool speed_p
= optimize_insn_for_speed_p ();
11691 do_pending_stack_adjust ();
11693 location_t loc
= gimple_location (stmt
);
11694 struct separate_ops ops
;
11695 ops
.code
= TRUNC_MOD_EXPR
;
11696 ops
.location
= loc
;
11697 ops
.type
= TREE_TYPE (treeop0
);
11700 ops
.op2
= NULL_TREE
;
11702 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11704 rtx_insn
*moinsns
= get_insns ();
11707 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11708 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11709 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11711 ops
.code
= BIT_AND_EXPR
;
11712 ops
.location
= loc
;
11713 ops
.type
= TREE_TYPE (treeop0
);
11716 ops
.op2
= NULL_TREE
;
11718 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11720 rtx_insn
*muinsns
= get_insns ();
11723 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11724 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
11725 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
11727 if (mocost
<= mucost
)
11729 emit_insn (moinsns
);
11730 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11734 emit_insn (muinsns
);
11735 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
11740 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
11742 (X - C2) * C3 <= C4 (or >), where
11743 C3 is modular multiplicative inverse of C1 and 1<<prec and
11744 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
11745 if C2 > ((1<<prec) - 1) % C1).
11746 If C1 is even, S = ctz (C1) and C2 is 0, use
11747 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
11748 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
11750 For signed (X % C1) == 0 if C1 is odd to (all operations in it
11752 (X * C3) + C4 <= 2 * C4, where
11753 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
11754 C4 is ((1<<(prec - 1) - 1) / C1).
11755 If C1 is even, S = ctz(C1), use
11756 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
11757 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
11758 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
11760 See the Hacker's Delight book, section 10-17. */
11762 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11764 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
11765 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
11770 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11774 tree treeop0
= gimple_assign_rhs1 (stmt
);
11775 tree treeop1
= gimple_assign_rhs2 (stmt
);
11776 if (TREE_CODE (treeop0
) != SSA_NAME
11777 || TREE_CODE (treeop1
) != INTEGER_CST
11778 /* Don't optimize the undefined behavior case x % 0;
11779 x % 1 should have been optimized into zero, punt if
11780 it makes it here for whatever reason;
11781 x % -c should have been optimized into x % c. */
11782 || compare_tree_int (treeop1
, 2) <= 0
11783 /* Likewise x % c == d where d >= c should be always false. */
11784 || tree_int_cst_le (treeop1
, *arg1
))
11787 /* Unsigned x % pow2 is handled right already, for signed
11788 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
11789 if (integer_pow2p (treeop1
))
11790 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
11792 tree type
= TREE_TYPE (*arg0
);
11793 scalar_int_mode mode
;
11794 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11796 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11797 || TYPE_PRECISION (type
) <= 1)
11800 signop sgn
= UNSIGNED
;
11801 /* If both operands are known to have the sign bit clear, handle
11802 even the signed modulo case as unsigned. treeop1 is always
11803 positive >= 2, checked above. */
11804 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
11807 if (!TYPE_UNSIGNED (type
))
11809 if (tree_int_cst_sgn (*arg1
) == -1)
11811 type
= unsigned_type_for (type
);
11812 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
11816 int prec
= TYPE_PRECISION (type
);
11817 wide_int w
= wi::to_wide (treeop1
);
11818 int shift
= wi::ctz (w
);
11819 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
11820 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
11821 If C1 is odd, we can handle all cases by subtracting
11822 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
11823 e.g. by testing for overflow on the subtraction, punt on that for now
11825 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
11829 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
11830 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
11834 imm_use_iterator imm_iter
;
11835 use_operand_p use_p
;
11836 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
11838 gimple
*use_stmt
= USE_STMT (use_p
);
11839 /* Punt if treeop0 is used in the same bb in a division
11840 or another modulo with the same divisor. We should expect
11841 the division and modulo combined together. */
11842 if (use_stmt
== stmt
11843 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
11845 if (!is_gimple_assign (use_stmt
)
11846 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
11847 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
11849 if (gimple_assign_rhs1 (use_stmt
) != treeop0
11850 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
11855 w
= wi::lrshift (w
, shift
);
11856 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
11857 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
11858 wide_int m
= wide_int::from (mod_inv (a
, b
), prec
, UNSIGNED
);
11859 tree c3
= wide_int_to_tree (type
, m
);
11860 tree c5
= NULL_TREE
;
11862 if (sgn
== UNSIGNED
)
11864 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
11865 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
11866 otherwise use < or subtract one from C4. E.g. for
11867 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
11868 x % 3U == 1 already needs to be
11869 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
11870 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
11873 d
= wi::lrshift (d
, shift
);
11877 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
11879 d
= wi::lshift (e
, 1);
11882 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
11883 d
= wi::lrshift (e
, shift
- 1);
11885 c5
= wide_int_to_tree (type
, e
);
11887 tree c4
= wide_int_to_tree (type
, d
);
11889 rtx op0
= expand_normal (treeop0
);
11890 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11892 bool speed_p
= optimize_insn_for_speed_p ();
11894 do_pending_stack_adjust ();
11896 location_t loc
= gimple_location (stmt
);
11897 struct separate_ops ops
;
11898 ops
.code
= TRUNC_MOD_EXPR
;
11899 ops
.location
= loc
;
11900 ops
.type
= TREE_TYPE (treeop0
);
11903 ops
.op2
= NULL_TREE
;
11905 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11907 rtx_insn
*moinsns
= get_insns ();
11910 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11911 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11912 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11914 tree t
= fold_convert_loc (loc
, type
, treeop0
);
11915 if (!integer_zerop (*arg1
))
11916 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
11917 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
11919 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
11922 tree s
= build_int_cst (NULL_TREE
, shift
);
11923 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
11927 rtx mur
= expand_normal (t
);
11928 rtx_insn
*muinsns
= get_insns ();
11931 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11932 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
11933 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
11935 if (mocost
<= mucost
)
11937 emit_insn (moinsns
);
11938 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11942 emit_insn (muinsns
);
11943 *arg0
= make_tree (type
, mur
);
11945 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
11948 /* Generate code to calculate OPS, and exploded expression
11949 using a store-flag instruction and return an rtx for the result.
11950 OPS reflects a comparison.
11952 If TARGET is nonzero, store the result there if convenient.
11954 Return zero if there is no suitable set-flag instruction
11955 available on this machine.
11957 Once expand_expr has been called on the arguments of the comparison,
11958 we are committed to doing the store flag, since it is not safe to
11959 re-evaluate the expression. We emit the store-flag insn by calling
11960 emit_store_flag, but only expand the arguments if we have a reason
11961 to believe that emit_store_flag will be successful. If we think that
11962 it will, but it isn't, we have to simulate the store-flag with a
11963 set/jump/set sequence. */
11966 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11968 enum rtx_code code
;
11969 tree arg0
, arg1
, type
;
11970 machine_mode operand_mode
;
11973 rtx subtarget
= target
;
11974 location_t loc
= ops
->location
;
11979 /* Don't crash if the comparison was erroneous. */
11980 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11983 type
= TREE_TYPE (arg0
);
11984 operand_mode
= TYPE_MODE (type
);
11985 unsignedp
= TYPE_UNSIGNED (type
);
11987 /* We won't bother with BLKmode store-flag operations because it would mean
11988 passing a lot of information to emit_store_flag. */
11989 if (operand_mode
== BLKmode
)
11992 /* We won't bother with store-flag operations involving function pointers
11993 when function pointers must be canonicalized before comparisons. */
11994 if (targetm
.have_canonicalize_funcptr_for_compare ()
11995 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
11996 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
11997 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
11998 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
12004 /* For vector typed comparisons emit code to generate the desired
12005 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
12006 expander for this. */
12007 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
12009 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
12010 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
12011 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
12012 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
12015 tree if_true
= constant_boolean_node (true, ops
->type
);
12016 tree if_false
= constant_boolean_node (false, ops
->type
);
12017 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
12022 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12023 into (x - C2) * C3 < C4. */
12024 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
12025 && TREE_CODE (arg0
) == SSA_NAME
12026 && TREE_CODE (arg1
) == INTEGER_CST
)
12028 enum tree_code code
= maybe_optimize_mod_cmp (ops
->code
, &arg0
, &arg1
);
12029 if (code
!= ops
->code
)
12031 struct separate_ops nops
= *ops
;
12032 nops
.code
= ops
->code
= code
;
12035 nops
.type
= TREE_TYPE (arg0
);
12036 return do_store_flag (&nops
, target
, mode
);
12040 /* Get the rtx comparison code to use. We know that EXP is a comparison
12041 operation of some type. Some comparisons against 1 and -1 can be
12042 converted to comparisons with zero. Do so here so that the tests
12043 below will be aware that we have a comparison with zero. These
12044 tests will not catch constants in the first operand, but constants
12045 are rarely passed as the first operand. */
12056 if (integer_onep (arg1
))
12057 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
12059 code
= unsignedp
? LTU
: LT
;
12062 if (! unsignedp
&& integer_all_onesp (arg1
))
12063 arg1
= integer_zero_node
, code
= LT
;
12065 code
= unsignedp
? LEU
: LE
;
12068 if (! unsignedp
&& integer_all_onesp (arg1
))
12069 arg1
= integer_zero_node
, code
= GE
;
12071 code
= unsignedp
? GTU
: GT
;
12074 if (integer_onep (arg1
))
12075 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
12077 code
= unsignedp
? GEU
: GE
;
12080 case UNORDERED_EXPR
:
12106 gcc_unreachable ();
12109 /* Put a constant second. */
12110 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
12111 || TREE_CODE (arg0
) == FIXED_CST
)
12113 std::swap (arg0
, arg1
);
12114 code
= swap_condition (code
);
12117 /* If this is an equality or inequality test of a single bit, we can
12118 do this by shifting the bit being tested to the low-order bit and
12119 masking the result with the constant 1. If the condition was EQ,
12120 we xor it with 1. This does not require an scc insn and is faster
12121 than an scc insn even if we have it.
12123 The code to make this transformation was moved into fold_single_bit_test,
12124 so we just call into the folder and expand its result. */
12126 if ((code
== NE
|| code
== EQ
)
12127 && integer_zerop (arg1
)
12128 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12130 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12132 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12134 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12135 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12136 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12137 gimple_assign_rhs1 (srcstmt
),
12138 gimple_assign_rhs2 (srcstmt
));
12139 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12141 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12145 if (! get_subtarget (target
)
12146 || GET_MODE (subtarget
) != operand_mode
)
12149 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12152 target
= gen_reg_rtx (mode
);
12154 /* Try a cstore if possible. */
12155 return emit_store_flag_force (target
, code
, op0
, op1
,
12156 operand_mode
, unsignedp
,
12157 (TYPE_PRECISION (ops
->type
) == 1
12158 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12161 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12162 0 otherwise (i.e. if there is no casesi instruction).
12164 DEFAULT_PROBABILITY is the probability of jumping to the default
12167 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12168 rtx table_label
, rtx default_label
, rtx fallback_label
,
12169 profile_probability default_probability
)
12171 struct expand_operand ops
[5];
12172 scalar_int_mode index_mode
= SImode
;
12173 rtx op1
, op2
, index
;
12175 if (! targetm
.have_casesi ())
12178 /* The index must be some form of integer. Convert it to SImode. */
12179 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12180 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12182 rtx rangertx
= expand_normal (range
);
12184 /* We must handle the endpoints in the original mode. */
12185 index_expr
= build2 (MINUS_EXPR
, index_type
,
12186 index_expr
, minval
);
12187 minval
= integer_zero_node
;
12188 index
= expand_normal (index_expr
);
12190 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12191 omode
, 1, default_label
,
12192 default_probability
);
12193 /* Now we can safely truncate. */
12194 index
= convert_to_mode (index_mode
, index
, 0);
12198 if (omode
!= index_mode
)
12200 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12201 index_expr
= fold_convert (index_type
, index_expr
);
12204 index
= expand_normal (index_expr
);
12207 do_pending_stack_adjust ();
12209 op1
= expand_normal (minval
);
12210 op2
= expand_normal (range
);
12212 create_input_operand (&ops
[0], index
, index_mode
);
12213 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12214 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12215 create_fixed_operand (&ops
[3], table_label
);
12216 create_fixed_operand (&ops
[4], (default_label
12218 : fallback_label
));
12219 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12223 /* Attempt to generate a tablejump instruction; same concept. */
12224 /* Subroutine of the next function.
12226 INDEX is the value being switched on, with the lowest value
12227 in the table already subtracted.
12228 MODE is its expected mode (needed if INDEX is constant).
12229 RANGE is the length of the jump table.
12230 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12232 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12233 index value is out of range.
12234 DEFAULT_PROBABILITY is the probability of jumping to
12235 the default label. */
12238 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12239 rtx default_label
, profile_probability default_probability
)
12243 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12244 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12246 /* Do an unsigned comparison (in the proper mode) between the index
12247 expression and the value which represents the length of the range.
12248 Since we just finished subtracting the lower bound of the range
12249 from the index expression, this comparison allows us to simultaneously
12250 check that the original index expression value is both greater than
12251 or equal to the minimum value of the range and less than or equal to
12252 the maximum value of the range. */
12255 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12256 default_label
, default_probability
);
12258 /* If index is in range, it must fit in Pmode.
12259 Convert to Pmode so we can index with it. */
12262 unsigned int width
;
12264 /* We know the value of INDEX is between 0 and RANGE. If we have a
12265 sign-extended subreg, and RANGE does not have the sign bit set, then
12266 we have a value that is valid for both sign and zero extension. In
12267 this case, we get better code if we sign extend. */
12268 if (GET_CODE (index
) == SUBREG
12269 && SUBREG_PROMOTED_VAR_P (index
)
12270 && SUBREG_PROMOTED_SIGNED_P (index
)
12271 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12272 <= HOST_BITS_PER_WIDE_INT
)
12273 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12274 index
= convert_to_mode (Pmode
, index
, 0);
12276 index
= convert_to_mode (Pmode
, index
, 1);
12279 /* Don't let a MEM slip through, because then INDEX that comes
12280 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12281 and break_out_memory_refs will go to work on it and mess it up. */
12282 #ifdef PIC_CASE_VECTOR_ADDRESS
12283 if (flag_pic
&& !REG_P (index
))
12284 index
= copy_to_mode_reg (Pmode
, index
);
12287 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12288 GET_MODE_SIZE, because this indicates how large insns are. The other
12289 uses should all be Pmode, because they are addresses. This code
12290 could fail if addresses and insns are not the same size. */
12291 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12292 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12294 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12295 gen_rtx_LABEL_REF (Pmode
, table_label
));
12297 #ifdef PIC_CASE_VECTOR_ADDRESS
12299 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12302 index
= memory_address (CASE_VECTOR_MODE
, index
);
12303 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12304 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12305 convert_move (temp
, vector
, 0);
12307 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12309 /* If we are generating PIC code or if the table is PC-relative, the
12310 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12311 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12316 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12317 rtx table_label
, rtx default_label
,
12318 profile_probability default_probability
)
12322 if (! targetm
.have_tablejump ())
12325 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12326 fold_convert (index_type
, index_expr
),
12327 fold_convert (index_type
, minval
));
12328 index
= expand_normal (index_expr
);
12329 do_pending_stack_adjust ();
12331 do_tablejump (index
, TYPE_MODE (index_type
),
12332 convert_modes (TYPE_MODE (index_type
),
12333 TYPE_MODE (TREE_TYPE (range
)),
12334 expand_normal (range
),
12335 TYPE_UNSIGNED (TREE_TYPE (range
))),
12336 table_label
, default_label
, default_probability
);
12340 /* Return a CONST_VECTOR rtx representing vector mask for
12341 a VECTOR_CST of booleans. */
12343 const_vector_mask_from_tree (tree exp
)
12345 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12346 machine_mode inner
= GET_MODE_INNER (mode
);
12348 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12349 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12350 unsigned int count
= builder
.encoded_nelts ();
12351 for (unsigned int i
= 0; i
< count
; ++i
)
12353 tree elt
= VECTOR_CST_ELT (exp
, i
);
12354 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12355 if (integer_zerop (elt
))
12356 builder
.quick_push (CONST0_RTX (inner
));
12357 else if (integer_onep (elt
)
12358 || integer_minus_onep (elt
))
12359 builder
.quick_push (CONSTM1_RTX (inner
));
12361 gcc_unreachable ();
12363 return builder
.build ();
12366 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
12367 Return a constant scalar rtx of mode MODE in which bit X is set if element
12368 X of EXP is nonzero. */
12370 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
12372 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
12375 /* The result has a fixed number of bits so the input must too. */
12376 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
12377 for (unsigned int i
= 0; i
< nunits
; ++i
)
12379 elt
= VECTOR_CST_ELT (exp
, i
);
12380 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12381 if (integer_all_onesp (elt
))
12382 res
= wi::set_bit (res
, i
);
12384 gcc_assert (integer_zerop (elt
));
12387 return immed_wide_int_const (res
, mode
);
12390 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12392 const_vector_from_tree (tree exp
)
12394 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12396 if (initializer_zerop (exp
))
12397 return CONST0_RTX (mode
);
12399 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12400 return const_vector_mask_from_tree (exp
);
12402 machine_mode inner
= GET_MODE_INNER (mode
);
12404 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12405 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12406 unsigned int count
= builder
.encoded_nelts ();
12407 for (unsigned int i
= 0; i
< count
; ++i
)
12409 tree elt
= VECTOR_CST_ELT (exp
, i
);
12410 if (TREE_CODE (elt
) == REAL_CST
)
12411 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12413 else if (TREE_CODE (elt
) == FIXED_CST
)
12414 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12417 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12420 return builder
.build ();
12423 /* Build a decl for a personality function given a language prefix. */
12426 build_personality_function (const char *lang
)
12428 const char *unwind_and_version
;
12432 switch (targetm_common
.except_unwind_info (&global_options
))
12437 unwind_and_version
= "_sj0";
12441 unwind_and_version
= "_v0";
12444 unwind_and_version
= "_seh0";
12447 gcc_unreachable ();
12450 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12452 type
= build_function_type_list (integer_type_node
, integer_type_node
,
12453 long_long_unsigned_type_node
,
12454 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12455 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12456 get_identifier (name
), type
);
12457 DECL_ARTIFICIAL (decl
) = 1;
12458 DECL_EXTERNAL (decl
) = 1;
12459 TREE_PUBLIC (decl
) = 1;
12461 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12462 are the flags assigned by targetm.encode_section_info. */
12463 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12468 /* Extracts the personality function of DECL and returns the corresponding
12472 get_personality_function (tree decl
)
12474 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12475 enum eh_personality_kind pk
;
12477 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12478 if (pk
== eh_personality_none
)
12482 && pk
== eh_personality_any
)
12483 personality
= lang_hooks
.eh_personality ();
12485 if (pk
== eh_personality_lang
)
12486 gcc_assert (personality
!= NULL_TREE
);
12488 return XEXP (DECL_RTL (personality
), 0);
12491 /* Returns a tree for the size of EXP in bytes. */
12494 tree_expr_size (const_tree exp
)
12497 && DECL_SIZE_UNIT (exp
) != 0)
12498 return DECL_SIZE_UNIT (exp
);
12500 return size_in_bytes (TREE_TYPE (exp
));
12503 /* Return an rtx for the size in bytes of the value of EXP. */
12506 expr_size (tree exp
)
12510 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12511 size
= TREE_OPERAND (exp
, 1);
12514 size
= tree_expr_size (exp
);
12516 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12519 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12522 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12523 if the size can vary or is larger than an integer. */
12525 static HOST_WIDE_INT
12526 int_expr_size (tree exp
)
12530 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12531 size
= TREE_OPERAND (exp
, 1);
12534 size
= tree_expr_size (exp
);
12538 if (size
== 0 || !tree_fits_shwi_p (size
))
12541 return tree_to_shwi (size
);