1 2018-01-12 Richard Biener <rguenther@suse.de>
4 * dwarf2out.c (gen_variable_die): Do not reset old_die for
7 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
10 * config/rx/rx.c (rx_is_restricted_memory_address):
13 2018-01-12 Richard Biener <rguenther@suse.de>
15 PR tree-optimization/80846
16 * target.def (split_reduction): New target hook.
17 * targhooks.c (default_split_reduction): New function.
18 * targhooks.h (default_split_reduction): Declare.
19 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
20 target requests first reduce vectors by combining low and high
22 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
23 (get_vectype_for_scalar_type_and_size): Export.
24 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
25 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
26 * doc/tm.texi: Regenerate.
27 * config/i386/i386.c (ix86_split_reduction): Implement
28 TARGET_VECTORIZE_SPLIT_REDUCTION.
30 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
33 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
34 in PIC mode except for TARGET_VXWORKS_RTP.
35 * config/sparc/sparc.c: Include cfgrtl.h.
36 (TARGET_INIT_PIC_REG): Define.
37 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
38 (sparc_pic_register_p): New predicate.
39 (sparc_legitimate_address_p): Use it.
40 (sparc_legitimize_pic_address): Likewise.
41 (sparc_delegitimize_address): Likewise.
42 (sparc_mode_dependent_address_p): Likewise.
43 (gen_load_pcrel_sym): Remove 4th parameter.
44 (load_got_register): Adjust call to above. Remove obsolete stuff.
45 (sparc_expand_prologue): Do not call load_got_register here.
46 (sparc_flat_expand_prologue): Likewise.
47 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
48 (sparc_use_pseudo_pic_reg): New function.
49 (sparc_init_pic_reg): Likewise.
50 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
51 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
53 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
55 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
56 Add item for branch_cost.
58 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
60 PR rtl-optimization/83565
61 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
62 not extend the result to a larger mode for rotate operations.
63 (num_sign_bit_copies1): Likewise.
65 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
68 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
70 Use values-Xc.o for -pedantic.
71 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
73 2018-01-12 Martin Liska <mliska@suse.cz>
76 * ipa-devirt.c (final_warning_record::grow_type_warnings):
78 (possible_polymorphic_call_targets): Use it.
79 (ipa_devirt): Likewise.
81 2018-01-12 Martin Liska <mliska@suse.cz>
83 * profile-count.h (enum profile_quality): Use 0 as invalid
84 enum value of profile_quality.
86 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
88 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
91 2018-01-12 Richard Biener <rguenther@suse.de>
93 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
94 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
95 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
97 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
99 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
101 * configure.ac (--with-long-double-format): Add support for the
102 configuration option to change the default long double format on
104 * config.gcc (powerpc*-linux*-*): Likewise.
105 * configure: Regenerate.
106 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
107 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
108 used without modification.
110 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
112 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
113 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
114 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
115 MISC_BUILTIN_SPEC_BARRIER.
116 (rs6000_init_builtins): Likewise.
117 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
119 (speculation_barrier): New define_insn.
120 * doc/extend.texi: Document __builtin_speculation_barrier.
122 2018-01-11 Jakub Jelinek <jakub@redhat.com>
125 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
126 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
127 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
129 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
130 integral modes instead of "ss" and "sd".
131 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
132 vectors with 32-bit and 64-bit elements.
133 (vecdupssescalarmodesuffix): New mode attribute.
134 (vec_dup<mode>): Use it.
136 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
139 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
140 frame if argument is passed on stack.
142 2018-01-11 Jakub Jelinek <jakub@redhat.com>
145 * ree.c (combine_reaching_defs): Optimize also
146 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
147 reg2=any_extend(exp); reg1=reg2;, formatting fix.
149 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
152 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
154 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
157 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
158 after they are computed.
160 2018-01-11 Bin Cheng <bin.cheng@arm.com>
162 PR tree-optimization/83695
163 * gimple-loop-linterchange.cc
164 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
165 reset cached scev information after interchange.
166 (pass_linterchange::execute): Remove call to scev_reset_htab.
168 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
170 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
171 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
172 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
173 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
174 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
175 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
176 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
177 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
178 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
179 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
180 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
181 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
182 (V_lane_reg): Likewise.
183 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
185 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
186 (vfmal_lane_low<mode>_intrinsic,
187 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
188 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
189 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
190 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
191 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
192 vfmsl_lane_high<mode>_intrinsic): New define_insns.
194 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
196 * config/arm/arm-cpus.in (fp16fml): New feature.
197 (ALL_SIMD): Add fp16fml.
198 (armv8.2-a): Add fp16fml as an option.
199 (armv8.3-a): Likewise.
200 (armv8.4-a): Add fp16fml as part of fp16.
201 * config/arm/arm.h (TARGET_FP16FML): Define.
202 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
204 * config/arm/arm-modes.def (V2HF): Define.
205 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
206 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
207 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
208 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
209 vfmsl_low, vfmsl_high): New set of builtins.
210 * config/arm/iterators.md (PLUSMINUS): New code iterator.
211 (vfml_op): New code attribute.
212 (VFMLHALVES): New int iterator.
213 (VFML, VFMLSEL): New mode attributes.
214 (V_reg): Define mapping for V2HF.
215 (V_hi, V_lo): New mode attributes.
216 (VF_constraint): Likewise.
217 (vfml_half, vfml_half_selector): New int attributes.
218 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
220 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
221 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
223 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
224 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
225 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
226 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
228 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
229 Document new effective target and option set.
231 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
233 * config/arm/arm-cpus.in (armv8_4): New feature.
234 (ARMv8_4a): New fgroup.
235 (armv8.4-a): New arch.
236 * config/arm/arm-tables.opt: Regenerate.
237 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
238 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
239 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
240 Add matching rules for -march=armv8.4-a and extensions.
241 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
243 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
246 * config/rx/rx.md (BW): New mode attribute.
247 (sync_lock_test_and_setsi): Add mode suffix to insn output.
249 2018-01-11 Richard Biener <rguenther@suse.de>
251 PR tree-optimization/83435
252 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
253 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
254 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
256 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
257 Alan Hayward <alan.hayward@arm.com>
258 David Sherwood <david.sherwood@arm.com>
260 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
262 (aarch64_classify_address): Initialize it. Track polynomial offsets.
263 (aarch64_print_address_internal): Use it to check for a zero offset.
265 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
266 Alan Hayward <alan.hayward@arm.com>
267 David Sherwood <david.sherwood@arm.com>
269 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
270 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
271 Return a poly_int64 rather than a HOST_WIDE_INT.
272 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
273 rather than a HOST_WIDE_INT.
274 * config/aarch64/aarch64.h (aarch64_frame): Protect with
275 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
276 hard_fp_offset, frame_size, initial_adjust, callee_offset and
277 final_offset from HOST_WIDE_INT to poly_int64.
278 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
279 to_constant when getting the number of units in an Advanced SIMD
281 (aarch64_builtin_vectorized_function): Check for a constant number
283 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
285 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
286 attribute instead of GET_MODE_NUNITS.
287 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
288 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
289 GET_MODE_SIZE for fixed-size registers.
290 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
291 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
292 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
293 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
294 (aarch64_print_operand, aarch64_print_address_internal)
295 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
296 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
297 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
298 Handle polynomial GET_MODE_SIZE.
299 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
300 wider than SImode without modification.
301 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
302 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
303 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
304 passing and returning SVE modes.
305 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
307 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
308 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
309 (aarch64_allocate_and_probe_stack_space): Likewise.
310 (aarch64_layout_frame): Cope with polynomial offsets.
311 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
312 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
314 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
315 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
316 poly_int64 rather than a HOST_WIDE_INT.
317 (aarch64_get_separate_components, aarch64_process_components)
318 (aarch64_expand_prologue, aarch64_expand_epilogue)
319 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
320 (aarch64_anchor_offset): New function, split out from...
321 (aarch64_legitimize_address): ...here.
322 (aarch64_builtin_vectorization_cost): Handle polynomial
323 TYPE_VECTOR_SUBPARTS.
324 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
326 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
327 number of elements from the PARALLEL rather than the mode.
328 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
329 rather than GET_MODE_BITSIZE.
330 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
331 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
332 (aarch64_expand_vec_perm_const_1): Handle polynomial
333 d->perm.length () and d->perm elements.
334 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
335 Apply to_constant to d->perm elements.
336 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
337 polynomial CONST_VECTOR_NUNITS.
338 (aarch64_move_pointer): Take amount as a poly_int64 rather
340 (aarch64_progress_pointer): Avoid temporary variable.
341 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
342 the mode attribute instead of GET_MODE.
344 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
345 Alan Hayward <alan.hayward@arm.com>
346 David Sherwood <david.sherwood@arm.com>
348 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
349 x exists before using it.
350 (aarch64_add_constant_internal): Rename to...
351 (aarch64_add_offset_1): ...this. Replace regnum with separate
352 src and dest rtxes. Handle the case in which they're different,
353 including when the offset is zero. Replace scratchreg with an rtx.
354 Use 2 additions if there is no spare register into which we can
355 move a 16-bit constant.
356 (aarch64_add_constant): Delete.
357 (aarch64_add_offset): Replace reg with separate src and dest
358 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
359 Use aarch64_add_offset_1.
360 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
361 an rtx rather than an int. Take the delta as a poly_int64
362 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
363 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
364 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
365 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
366 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
368 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
369 aarch64_add_constant.
371 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
373 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
374 Use scalar_float_mode.
376 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
378 * config/aarch64/aarch64-simd.md
379 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
380 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
381 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
382 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
383 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
384 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
385 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
386 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
387 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
388 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
390 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
393 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
394 targ_options->x_arm_arch_string is non NULL.
396 2018-01-11 Tamar Christina <tamar.christina@arm.com>
398 * config/aarch64/aarch64.h
399 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
401 2018-01-11 Sudakshina Das <sudi.das@arm.com>
404 * expmed.c (emit_store_flag_force): Swap if const op0
405 and change VOIDmode to mode of op0.
407 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
409 PR rtl-optimization/83761
410 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
411 than bytes to mode_for_size.
413 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
416 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
417 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
420 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
423 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
425 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
426 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
429 2018-01-10 Michael Collison <michael.collison@arm.com>
431 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
432 * config/aarch64/aarch64-option-extension.def: Add
433 AARCH64_OPT_EXTENSION of 'fp16fml'.
434 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
435 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
436 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
437 * config/aarch64/constraints.md (Ui7): New constraint.
438 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
439 (VFMLA_SEL_W): Ditto.
442 (VFMLA16_LOW): New int iterator.
443 (VFMLA16_HIGH): Ditto.
444 (UNSPEC_FMLAL): New unspec.
445 (UNSPEC_FMLSL): Ditto.
446 (UNSPEC_FMLAL2): Ditto.
447 (UNSPEC_FMLSL2): Ditto.
448 (f16mac): New code attribute.
449 * config/aarch64/aarch64-simd-builtins.def
450 (aarch64_fmlal_lowv2sf): Ditto.
451 (aarch64_fmlsl_lowv2sf): Ditto.
452 (aarch64_fmlalq_lowv4sf): Ditto.
453 (aarch64_fmlslq_lowv4sf): Ditto.
454 (aarch64_fmlal_highv2sf): Ditto.
455 (aarch64_fmlsl_highv2sf): Ditto.
456 (aarch64_fmlalq_highv4sf): Ditto.
457 (aarch64_fmlslq_highv4sf): Ditto.
458 (aarch64_fmlal_lane_lowv2sf): Ditto.
459 (aarch64_fmlsl_lane_lowv2sf): Ditto.
460 (aarch64_fmlal_laneq_lowv2sf): Ditto.
461 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
462 (aarch64_fmlalq_lane_lowv4sf): Ditto.
463 (aarch64_fmlsl_lane_lowv4sf): Ditto.
464 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
465 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
466 (aarch64_fmlal_lane_highv2sf): Ditto.
467 (aarch64_fmlsl_lane_highv2sf): Ditto.
468 (aarch64_fmlal_laneq_highv2sf): Ditto.
469 (aarch64_fmlsl_laneq_highv2sf): Ditto.
470 (aarch64_fmlalq_lane_highv4sf): Ditto.
471 (aarch64_fmlsl_lane_highv4sf): Ditto.
472 (aarch64_fmlalq_laneq_highv4sf): Ditto.
473 (aarch64_fmlsl_laneq_highv4sf): Ditto.
474 * config/aarch64/aarch64-simd.md:
475 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
476 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
477 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
478 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
479 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
480 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
481 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
482 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
483 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
484 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
485 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
486 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
487 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
488 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
489 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
490 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
491 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
492 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
493 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
494 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
495 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
496 (vfmlsl_low_u32): Ditto.
497 (vfmlalq_low_u32): Ditto.
498 (vfmlslq_low_u32): Ditto.
499 (vfmlal_high_u32): Ditto.
500 (vfmlsl_high_u32): Ditto.
501 (vfmlalq_high_u32): Ditto.
502 (vfmlslq_high_u32): Ditto.
503 (vfmlal_lane_low_u32): Ditto.
504 (vfmlsl_lane_low_u32): Ditto.
505 (vfmlal_laneq_low_u32): Ditto.
506 (vfmlsl_laneq_low_u32): Ditto.
507 (vfmlalq_lane_low_u32): Ditto.
508 (vfmlslq_lane_low_u32): Ditto.
509 (vfmlalq_laneq_low_u32): Ditto.
510 (vfmlslq_laneq_low_u32): Ditto.
511 (vfmlal_lane_high_u32): Ditto.
512 (vfmlsl_lane_high_u32): Ditto.
513 (vfmlal_laneq_high_u32): Ditto.
514 (vfmlsl_laneq_high_u32): Ditto.
515 (vfmlalq_lane_high_u32): Ditto.
516 (vfmlslq_lane_high_u32): Ditto.
517 (vfmlalq_laneq_high_u32): Ditto.
518 (vfmlslq_laneq_high_u32): Ditto.
519 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
520 (AARCH64_FL_FOR_ARCH8_4): New.
521 (AARCH64_ISA_F16FML): New ISA flag.
522 (TARGET_F16FML): New feature flag for fp16fml.
523 (doc/invoke.texi): Document new fp16fml option.
525 2018-01-10 Michael Collison <michael.collison@arm.com>
527 * config/aarch64/aarch64-builtins.c:
528 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
529 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
530 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
531 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
532 (AARCH64_ISA_SHA3): New ISA flag.
533 (TARGET_SHA3): New feature flag for sha3.
534 * config/aarch64/iterators.md (sha512_op): New int attribute.
535 (CRYPTO_SHA512): New int iterator.
536 (UNSPEC_SHA512H): New unspec.
537 (UNSPEC_SHA512H2): Ditto.
538 (UNSPEC_SHA512SU0): Ditto.
539 (UNSPEC_SHA512SU1): Ditto.
540 * config/aarch64/aarch64-simd-builtins.def
541 (aarch64_crypto_sha512hqv2di): New builtin.
542 (aarch64_crypto_sha512h2qv2di): Ditto.
543 (aarch64_crypto_sha512su0qv2di): Ditto.
544 (aarch64_crypto_sha512su1qv2di): Ditto.
545 (aarch64_eor3qv8hi): Ditto.
546 (aarch64_rax1qv2di): Ditto.
547 (aarch64_xarqv2di): Ditto.
548 (aarch64_bcaxqv8hi): Ditto.
549 * config/aarch64/aarch64-simd.md:
550 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
551 (aarch64_crypto_sha512su0qv2di): Ditto.
552 (aarch64_crypto_sha512su1qv2di): Ditto.
553 (aarch64_eor3qv8hi): Ditto.
554 (aarch64_rax1qv2di): Ditto.
555 (aarch64_xarqv2di): Ditto.
556 (aarch64_bcaxqv8hi): Ditto.
557 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
558 (vsha512h2q_u64): Ditto.
559 (vsha512su0q_u64): Ditto.
560 (vsha512su1q_u64): Ditto.
565 * config/arm/types.md (crypto_sha512): New type attribute.
566 (crypto_sha3): Ditto.
567 (doc/invoke.texi): Document new sha3 option.
569 2018-01-10 Michael Collison <michael.collison@arm.com>
571 * config/aarch64/aarch64-builtins.c:
572 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
573 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
574 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
575 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
576 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
577 (AARCH64_ISA_SM4): New ISA flag.
578 (TARGET_SM4): New feature flag for sm4.
579 * config/aarch64/aarch64-simd-builtins.def
580 (aarch64_sm3ss1qv4si): Ditto.
581 (aarch64_sm3tt1aq4si): Ditto.
582 (aarch64_sm3tt1bq4si): Ditto.
583 (aarch64_sm3tt2aq4si): Ditto.
584 (aarch64_sm3tt2bq4si): Ditto.
585 (aarch64_sm3partw1qv4si): Ditto.
586 (aarch64_sm3partw2qv4si): Ditto.
587 (aarch64_sm4eqv4si): Ditto.
588 (aarch64_sm4ekeyqv4si): Ditto.
589 * config/aarch64/aarch64-simd.md:
590 (aarch64_sm3ss1qv4si): Ditto.
591 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
592 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
593 (aarch64_sm4eqv4si): Ditto.
594 (aarch64_sm4ekeyqv4si): Ditto.
595 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
597 (CRYPTO_SM3TT): Ditto.
598 (CRYPTO_SM3PART): Ditto.
599 (UNSPEC_SM3SS1): New unspec.
600 (UNSPEC_SM3TT1A): Ditto.
601 (UNSPEC_SM3TT1B): Ditto.
602 (UNSPEC_SM3TT2A): Ditto.
603 (UNSPEC_SM3TT2B): Ditto.
604 (UNSPEC_SM3PARTW1): Ditto.
605 (UNSPEC_SM3PARTW2): Ditto.
606 (UNSPEC_SM4E): Ditto.
607 (UNSPEC_SM4EKEY): Ditto.
608 * config/aarch64/constraints.md (Ui2): New constraint.
609 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
610 * config/arm/types.md (crypto_sm3): New type attribute.
612 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
613 (vsm3tt1aq_u32): Ditto.
614 (vsm3tt1bq_u32): Ditto.
615 (vsm3tt2aq_u32): Ditto.
616 (vsm3tt2bq_u32): Ditto.
617 (vsm3partw1q_u32): Ditto.
618 (vsm3partw2q_u32): Ditto.
620 (vsm4ekeyq_u32): Ditto.
621 (doc/invoke.texi): Document new sm4 option.
623 2018-01-10 Michael Collison <michael.collison@arm.com>
625 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
626 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
627 (AARCH64_FL_FOR_ARCH8_4): New.
628 (AARCH64_FL_V8_4): New flag.
629 (doc/invoke.texi): Document new armv8.4-a option.
631 2018-01-10 Michael Collison <michael.collison@arm.com>
633 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
634 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
635 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
636 * config/aarch64/aarch64-option-extension.def: Add
637 AARCH64_OPT_EXTENSION of 'sha2'.
638 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
639 (crypto): Disable sha2 and aes if crypto disabled.
640 (crypto): Enable aes and sha2 if enabled.
641 (simd): Disable sha2 and aes if simd disabled.
642 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
644 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
645 (TARGET_SHA2): New feature flag for sha2.
646 (TARGET_AES): New feature flag for aes.
647 * config/aarch64/aarch64-simd.md:
648 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
649 conditional on TARGET_AES.
650 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
651 (aarch64_crypto_sha1hsi): Make pattern conditional
653 (aarch64_crypto_sha1hv4si): Ditto.
654 (aarch64_be_crypto_sha1hv4si): Ditto.
655 (aarch64_crypto_sha1su1v4si): Ditto.
656 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
657 (aarch64_crypto_sha1su0v4si): Ditto.
658 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
659 (aarch64_crypto_sha256su0v4si): Ditto.
660 (aarch64_crypto_sha256su1v4si): Ditto.
661 (doc/invoke.texi): Document new aes and sha2 options.
663 2018-01-10 Martin Sebor <msebor@redhat.com>
665 PR tree-optimization/83781
666 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
669 2018-01-11 Martin Sebor <msebor@gmail.com>
670 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
672 PR tree-optimization/83501
673 PR tree-optimization/81703
675 * tree-ssa-strlen.c (get_string_cst): Rename...
676 (get_string_len): ...to this. Handle global constants.
677 (handle_char_store): Adjust.
679 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
680 Jim Wilson <jimw@sifive.com>
682 * config/riscv/riscv-protos.h (riscv_output_return): New.
683 * config/riscv/riscv.c (struct machine_function): New naked_p field.
684 (riscv_attribute_table, riscv_output_return),
685 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
686 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
687 (riscv_compute_frame_info): Only compute frame->mask if not a naked
689 (riscv_expand_prologue): Add early return for naked function.
690 (riscv_expand_epilogue): Likewise.
691 (riscv_function_ok_for_sibcall): Return false for naked function.
692 (riscv_set_current_function): New.
693 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
694 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
695 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
696 * doc/extend.texi (RISC-V Function Attributes): New.
698 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
700 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
701 check for 128-bit long double before checking TCmode.
702 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
703 128-bit long doubles before checking TFmode or TCmode.
704 (FLOAT128_IBM_P): Likewise.
706 2018-01-10 Martin Sebor <msebor@redhat.com>
708 PR tree-optimization/83671
709 * builtins.c (c_strlen): Unconditionally return zero for the empty
711 Use -Warray-bounds for warnings.
712 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
713 for non-constant array indices with COMPONENT_REF, arrays of
714 arrays, and pointers to arrays.
715 (gimple_fold_builtin_strlen): Determine and set length range for
716 non-constant character arrays.
718 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
721 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
724 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
726 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
728 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
731 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
732 VECTOR_MEM_ALTIVEC_OR_VSX_P.
733 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
734 indexed_or_indirect_operand predicate.
735 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
736 (*vsx_le_perm_load_v8hi): Likewise.
737 (*vsx_le_perm_load_v16qi): Likewise.
738 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
739 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
740 (*vsx_le_perm_store_v8hi): Likewise.
741 (*vsx_le_perm_store_v16qi): Likewise.
742 (eight unnamed splitters): Likewise.
744 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
746 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
747 * config/rs6000/emmintrin.h: Likewise.
748 * config/rs6000/mmintrin.h: Likewise.
749 * config/rs6000/xmmintrin.h: Likewise.
751 2018-01-10 David Malcolm <dmalcolm@redhat.com>
754 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
756 * tree.c (tree_nop_conversion): Return true for location wrapper
758 (maybe_wrap_with_location): New function.
759 (selftest::check_strip_nops): New function.
760 (selftest::test_location_wrappers): New function.
761 (selftest::tree_c_tests): Call it.
762 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
763 (maybe_wrap_with_location): New decl.
764 (EXPR_LOCATION_WRAPPER_P): New macro.
765 (location_wrapper_p): New inline function.
766 (tree_strip_any_location_wrapper): New inline function.
768 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
771 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
772 stack_realign_offset for the largest alignment of stack slot
774 (ix86_find_max_used_stack_alignment): New function.
775 (ix86_finalize_stack_frame_flags): Use it. Set
776 max_used_stack_alignment if we don't realign stack.
777 * config/i386/i386.h (machine_function): Add
778 max_used_stack_alignment.
780 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
782 * config/arm/arm.opt (-mbranch-cost): New option.
783 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
786 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
789 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
790 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
792 2018-01-10 Richard Biener <rguenther@suse.de>
795 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
796 early out so it also covers the case where we have a non-NULL
799 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
801 PR tree-optimization/83753
802 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
803 for non-strided grouped accesses if the number of elements is 1.
805 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
808 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
809 * i386.h (TARGET_USE_GATHER): Define.
810 * x86-tune.def (X86_TUNE_USE_GATHER): New.
812 2018-01-10 Martin Liska <mliska@suse.cz>
815 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
816 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
818 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
819 CLEANUP_NO_PARTITIONING is not set.
821 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
823 * doc/rtl.texi: Remove documentation of (const ...) wrappers
824 for vectors, as a partial revert of r254296.
825 * rtl.h (const_vec_p): Delete.
826 (const_vec_duplicate_p): Don't test for vector CONSTs.
827 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
828 * expmed.c (make_tree): Likewise.
831 * common.md (E, F): Use CONSTANT_P instead of checking for
833 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
834 checking for CONST_VECTOR.
836 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
839 * predict.c (force_edge_cold): Handle in more sane way edges
842 2018-01-09 Carl Love <cel@us.ibm.com>
844 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
846 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
847 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
848 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
849 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
850 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
851 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
852 * config/rs6000/rs6000-protos.h: Add extern defition for
853 rs6000_generate_float2_double_code.
854 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
856 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
857 (float2_v2df): Add define_expand.
859 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
862 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
863 op_mode in the force_to_mode call.
865 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
867 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
868 instead of checking each element individually.
869 (aarch64_evpc_uzp): Likewise.
870 (aarch64_evpc_zip): Likewise.
871 (aarch64_evpc_ext): Likewise.
872 (aarch64_evpc_rev): Likewise.
873 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
874 instead of checking each element individually. Return true without
876 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
877 whether all selected elements come from the same input, instead of
878 checking each element individually. Remove calls to gen_rtx_REG,
879 start_sequence and end_sequence and instead assert that no rtl is
882 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
884 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
885 order of HIGH and CONST checks.
887 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
889 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
890 if the destination isn't an SSA_NAME.
892 2018-01-09 Richard Biener <rguenther@suse.de>
894 PR tree-optimization/83668
895 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
897 (canonicalize_loop_form): ... here, renamed from ...
898 (canonicalize_loop_closed_ssa_form): ... this and amended to
899 swap successor edges for loop exit blocks to make us use
900 the RPO order we need for initial schedule generation.
902 2018-01-09 Joseph Myers <joseph@codesourcery.com>
904 PR tree-optimization/64811
905 * match.pd: When optimizing comparisons with Inf, avoid
906 introducing or losing exceptions from comparisons with NaN.
908 2018-01-09 Martin Liska <mliska@suse.cz>
911 * asan.c (shadow_mem_size): Add gcc_assert.
913 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
915 Don't save registers in main().
918 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
919 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
920 * config/avr/avr.c (avr_set_current_function): Don't error if
921 naked, OS_task or OS_main are specified at the same time.
922 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
924 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
926 * common/config/avr/avr-common.c (avr_option_optimization_table):
927 Switch on -mmain-is-OS_task for optimizing compilations.
929 2018-01-09 Richard Biener <rguenther@suse.de>
931 PR tree-optimization/83572
932 * graphite.c: Include cfganal.h.
933 (graphite_transform_loops): Connect infinite loops to exit
934 and remove fake edges at the end.
936 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
938 * ipa-inline.c (edge_badness): Revert accidental checkin.
940 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
943 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
944 symbols; not inline clones.
946 2018-01-09 Jakub Jelinek <jakub@redhat.com>
949 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
950 hard registers. Formatting fixes.
952 PR preprocessor/83722
953 * gcc.c (try_generate_repro): Pass
954 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
955 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
958 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
959 Kito Cheng <kito.cheng@gmail.com>
961 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
962 (riscv_leaf_function_p): Delete.
963 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
965 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
967 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
969 (do_ifelse): New function.
970 (do_isel): New function.
971 (do_sub3): New function.
972 (do_add3): New function.
973 (do_load_mask_compare): New function.
974 (do_overlap_load_compare): New function.
975 (expand_compare_loop): New function.
976 (expand_block_compare): Call expand_compare_loop() when appropriate.
977 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
979 (-mblock-compare-inline-loop-limit): New option.
981 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
984 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
985 Reverse order of second and third operands in first alternative.
986 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
987 of first and second elements in UNSPEC_VPERMR vector.
988 (altivec_expand_vec_perm_le): Likewise.
990 2017-01-08 Jeff Law <law@redhat.com>
992 PR rtl-optimizatin/81308
993 * tree-switch-conversion.c (cfg_altered): New file scoped static.
994 (process_switch): If group_case_labels makes a change, then set
996 (pass_convert_switch::execute): If a switch is converted, then
997 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
999 PR rtl-optimization/81308
1000 * recog.c (split_all_insns): Conditionally cleanup the CFG after
1003 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
1005 PR target/83663 - Revert r255946
1006 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
1007 generation for cases where splatting a value is not useful.
1008 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
1009 across a vec_duplicate and a paradoxical subreg forming a vector
1010 mode to a vec_concat.
1012 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1014 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
1015 -march=armv8.3-a variants.
1016 * config/arm/t-multilib: Likewise.
1017 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
1019 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
1021 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
1023 (cceq_ior_compare_complement): Give it a name so I can use it, and
1024 change boolean_or_operator predicate to boolean_operator so it can
1025 be used to generate a crand.
1026 (eqne): New code iterator.
1027 (bd/bd_neg): New code_attrs.
1028 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
1029 a single define_insn.
1030 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
1031 decrement (bdnzt/bdnzf/bdzt/bdzf).
1032 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
1033 with the new names of the branch decrement patterns, and added the
1034 names of the branch decrement conditional patterns.
1036 2018-01-08 Richard Biener <rguenther@suse.de>
1038 PR tree-optimization/83563
1039 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
1042 2018-01-08 Richard Biener <rguenther@suse.de>
1045 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
1047 2018-01-08 Richard Biener <rguenther@suse.de>
1049 PR tree-optimization/83685
1050 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
1051 references to abnormals.
1053 2018-01-08 Richard Biener <rguenther@suse.de>
1056 * dwarf2out.c (output_indirect_strings): Handle empty
1057 skeleton_debug_str_hash.
1058 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
1060 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1062 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
1063 (emit_store_direct): Likewise.
1064 (arc_trampoline_adjust_address): Likewise.
1065 (arc_asm_trampoline_template): New function.
1066 (arc_initialize_trampoline): Use asm_trampoline_template.
1067 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
1068 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
1069 * config/arc/arc.md (flush_icache): Delete pattern.
1071 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1073 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
1074 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
1077 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1080 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
1081 by not USED_FOR_TARGET.
1082 (make_pass_resolve_sw_modes): Likewise.
1084 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1086 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
1089 2018-01-08 Richard Biener <rguenther@suse.de>
1092 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
1094 2018-01-08 Richard Biener <rguenther@suse.de>
1097 * match.pd ((t * 2) / 2) -> t): Add missing :c.
1099 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
1102 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
1103 basic blocks with a small number of successors.
1104 (convert_control_dep_chain_into_preds): Improve handling of
1106 (dump_predicates): Split apart into...
1107 (dump_pred_chain): ...here...
1108 (dump_pred_info): ...and here.
1109 (can_one_predicate_be_invalidated_p): Add debugging printfs.
1110 (can_chain_union_be_invalidated_p): Improve check for invalidation
1112 (uninit_uses_cannot_happen): Avoid unnecessary if
1113 convert_control_dep_chain_into_preds yielded nothing.
1115 2018-01-06 Martin Sebor <msebor@redhat.com>
1117 PR tree-optimization/83640
1118 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
1119 subtracting negative offset from size.
1120 (builtin_access::overlap): Adjust offset bounds of the access to fall
1121 within the size of the object if possible.
1123 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
1125 PR rtl-optimization/83699
1126 * expmed.c (extract_bit_field_1): Restrict the vector usage of
1127 extract_bit_field_as_subreg to cases in which the extracted
1128 value is also a vector.
1130 * lra-constraints.c (process_alt_operands): Test for the equivalence
1131 substitutions when detecting a possible reload cycle.
1133 2018-01-06 Jakub Jelinek <jakub@redhat.com>
1136 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
1137 by default if flag_selective_schedling{,2}. Formatting fixes.
1139 PR rtl-optimization/83682
1140 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
1141 if it has non-VECTOR_MODE element mode.
1142 (vec_duplicate_p): Likewise.
1145 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
1146 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
1148 2018-01-05 Jakub Jelinek <jakub@redhat.com>
1151 * config/i386/i386-builtin.def
1152 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
1153 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
1154 Require also OPTION_MASK_ISA_AVX512F in addition to
1155 OPTION_MASK_ISA_GFNI.
1156 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
1157 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
1158 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
1159 to OPTION_MASK_ISA_GFNI.
1160 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
1161 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
1162 OPTION_MASK_ISA_AVX512BW.
1163 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
1164 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
1165 addition to OPTION_MASK_ISA_GFNI.
1166 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
1167 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
1168 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
1169 to OPTION_MASK_ISA_GFNI.
1170 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
1171 a requirement for all ISAs rather than any of them with a few
1173 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
1175 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
1176 bitmasks to be enabled with 3 exceptions, instead of requiring any
1177 enabled ISA with lots of exceptions.
1178 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
1179 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
1180 Change avx512bw in isa attribute to avx512f.
1181 * config/i386/sgxintrin.h: Add license boilerplate.
1182 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
1183 to __AVX512F__ and __AVX512VL to __AVX512VL__.
1184 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
1185 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
1187 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
1188 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
1189 temporarily sse2 rather than sse if not enabled already.
1192 * config/i386/sse.md (VI248_VLBW): Rename to ...
1193 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
1194 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
1195 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
1196 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
1197 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
1198 mode iterator instead of VI248_VLBW.
1200 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
1202 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
1203 (record_modified): Skip clobbers; add debug output.
1204 (param_change_prob): Use sreal frequencies.
1206 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
1208 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
1209 punt for user-aligned variables.
1211 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
1213 * tree-chrec.c (chrec_contains_symbols): Return true for
1216 2018-01-05 Sudakshina Das <sudi.das@arm.com>
1219 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
1220 of (x|y) == x for BICS pattern.
1222 2018-01-05 Jakub Jelinek <jakub@redhat.com>
1224 PR tree-optimization/83605
1225 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
1226 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
1229 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
1231 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
1232 * config/epiphany/rtems.h: New file.
1234 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1235 Uros Bizjak <ubizjak@gmail.com>
1238 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
1239 QIreg_operand instead of register_operand predicate.
1240 * config/i386/i386.c (ix86_rop_should_change_byte_p,
1241 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
1242 comments instead of -fmitigate[-_]rop.
1244 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1247 * cgraphunit.c (symbol_table::compile): Switch to text_section
1248 before calling assembly_start debug hook.
1249 * run-rtl-passes.c (run_rtl_passes): Likewise.
1252 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1254 * tree-vrp.c (extract_range_from_binary_expr_1): Check
1255 range_int_cst_p rather than !symbolic_range_p before calling
1256 extract_range_from_multiplicative_op_1.
1258 2017-01-04 Jeff Law <law@redhat.com>
1260 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
1261 redundant test in assertion.
1263 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1265 * doc/rtl.texi: Document machine_mode wrapper classes.
1267 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1269 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
1272 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1274 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
1275 the VEC_PERM_EXPR fold to fail.
1277 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1280 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
1281 to switched_sections.
1283 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1286 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
1289 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
1292 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
1293 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
1295 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1298 * cfgexpand.c (expand_dbeug_expr) <case BIT_FIELD_REF>: Punt if mode
1299 is BLKmode and bitpos not zero or mode change is needed.
1301 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1304 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
1307 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
1310 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
1311 instead of MULT rtx. Update all corresponding splitters.
1313 (*ssub<modesuffix>): Ditto.
1315 (*cmp_sadd_di): Update split patterns.
1316 (*cmp_sadd_si): Ditto.
1317 (*cmp_sadd_sidi): Ditto.
1318 (*cmp_ssub_di): Ditto.
1319 (*cmp_ssub_si): Ditto.
1320 (*cmp_ssub_sidi): Ditto.
1321 * config/alpha/predicates.md (const23_operand): New predicate.
1322 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
1323 Look for ASHIFT, not MULT inner operand.
1324 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
1326 2018-01-04 Martin Liska <mliska@suse.cz>
1328 PR gcov-profile/83669
1329 * gcov.c (output_intermediate_file): Add version to intermediate
1331 * doc/gcov.texi: Document new field 'version' in intermediate
1332 file format. Fix location of '-k' option of gcov command.
1334 2018-01-04 Martin Liska <mliska@suse.cz>
1337 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
1339 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1341 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
1343 2018-01-03 Martin Sebor <msebor@redhat.com>
1345 PR tree-optimization/83655
1346 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
1347 checking calls with invalid arguments.
1349 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1351 * tree-vect-stmts.c (vect_get_store_rhs): New function.
1352 (vectorizable_mask_load_store): Delete.
1353 (vectorizable_call): Return false for masked loads and stores.
1354 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
1355 instead of gimple_assign_rhs1.
1356 (vectorizable_load): Handle IFN_MASK_LOAD.
1357 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
1359 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1361 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
1363 (vectorizable_mask_load_store): ...here.
1364 (vectorizable_load): ...and here.
1366 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1368 * tree-vect-stmts.c (vect_build_all_ones_mask)
1369 (vect_build_zero_merge_argument): New functions, split out from...
1370 (vectorizable_load): ...here.
1372 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1374 * tree-vect-stmts.c (vect_check_store_rhs): New function,
1376 (vectorizable_mask_load_store): ...here.
1377 (vectorizable_store): ...and here.
1379 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1381 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
1383 (vectorizable_mask_load_store): ...here.
1385 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1387 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
1388 (vect_model_store_cost): Take a vec_load_store_type instead of a
1390 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
1391 (vect_model_store_cost): Take a vec_load_store_type instead of a
1393 (vectorizable_mask_load_store): Update accordingly.
1394 (vectorizable_store): Likewise.
1395 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
1397 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1399 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
1400 IFN_MASK_LOAD calls here rather than...
1401 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
1403 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1404 Alan Hayward <alan.hayward@arm.com>
1405 David Sherwood <david.sherwood@arm.com>
1407 * expmed.c (extract_bit_field_1): For vector extracts,
1408 fall back to extract_bit_field_as_subreg if vec_extract
1411 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1412 Alan Hayward <alan.hayward@arm.com>
1413 David Sherwood <david.sherwood@arm.com>
1415 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
1416 they are variable or constant sized.
1417 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
1418 slots for constant-sized data.
1420 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1421 Alan Hayward <alan.hayward@arm.com>
1422 David Sherwood <david.sherwood@arm.com>
1424 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
1425 handling COND_EXPRs with boolean comparisons, try to find a better
1426 basis for the mask type than the boolean itself.
1428 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1430 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
1431 is calculated and how it can be overridden.
1432 * genmodes.c (max_bitsize_mode_any_mode): New variable.
1433 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
1435 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
1438 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1439 Alan Hayward <alan.hayward@arm.com>
1440 David Sherwood <david.sherwood@arm.com>
1442 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
1443 Remove the mode argument.
1444 (aarch64_simd_valid_immediate): Remove the mode and inverse
1446 * config/aarch64/iterators.md (bitsize): New iterator.
1447 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
1448 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
1449 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
1450 aarch64_simd_valid_immediate.
1451 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
1452 (aarch64_reg_or_bic_imm): Likewise.
1453 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
1454 with an insn_type enum and msl with a modifier_type enum.
1455 Replace element_width with a scalar_mode. Change the shift
1456 to unsigned int. Add constructors for scalar_float_mode and
1457 scalar_int_mode elements.
1458 (aarch64_vect_float_const_representable_p): Delete.
1459 (aarch64_can_const_movi_rtx_p)
1460 (aarch64_simd_scalar_immediate_valid_for_move)
1461 (aarch64_simd_make_constant): Update call to
1462 aarch64_simd_valid_immediate.
1463 (aarch64_advsimd_valid_immediate_hs): New function.
1464 (aarch64_advsimd_valid_immediate): Likewise.
1465 (aarch64_simd_valid_immediate): Remove mode and inverse
1466 arguments. Rewrite to use the above. Use const_vec_duplicate_p
1467 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
1468 and aarch64_float_const_representable_p on the result.
1469 (aarch64_output_simd_mov_immediate): Remove mode argument.
1470 Update call to aarch64_simd_valid_immediate and use of
1471 simd_immediate_info.
1472 (aarch64_output_scalar_simd_mov_immediate): Update call
1475 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1476 Alan Hayward <alan.hayward@arm.com>
1477 David Sherwood <david.sherwood@arm.com>
1479 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
1480 (mode_nunits): Likewise CONST_MODE_NUNITS.
1481 * machmode.def (ADJUST_NUNITS): Document.
1482 * genmodes.c (mode_data::need_nunits_adj): New field.
1483 (blank_mode): Update accordingly.
1484 (adj_nunits): New variable.
1485 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
1487 (emit_mode_size_inline): Set need_bytesize_adj for all modes
1488 listed in adj_nunits.
1489 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
1490 listed in adj_nunits. Don't emit case statements for such modes.
1491 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
1492 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
1493 nothing if adj_nunits is nonnull.
1494 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
1495 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
1496 (emit_mode_fbit): Update use of print_maybe_const_decl.
1497 (emit_move_size): Likewise. Treat the array as non-const
1499 (emit_mode_adjustments): Handle adj_nunits.
1501 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1503 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
1504 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
1505 (VECTOR_MODES): Use it.
1506 (make_vector_modes): Take the prefix as an argument.
1508 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1509 Alan Hayward <alan.hayward@arm.com>
1510 David Sherwood <david.sherwood@arm.com>
1512 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
1513 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
1514 for MODE_VECTOR_BOOL.
1515 * machmode.def (VECTOR_BOOL_MODE): Document.
1516 * genmodes.c (VECTOR_BOOL_MODE): New macro.
1517 (make_vector_bool_mode): New function.
1518 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
1520 * lto-streamer-in.c (lto_input_mode_table): Likewise.
1521 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
1523 * stor-layout.c (int_mode_for_mode): Likewise.
1524 * tree.c (build_vector_type_for_mode): Likewise.
1525 * varasm.c (output_constant_pool_2): Likewise.
1526 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
1527 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
1528 for MODE_VECTOR_BOOL.
1529 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
1530 of mode class checks.
1531 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
1532 instead of a list of mode class checks.
1533 (expand_vector_scalar_condition): Likewise.
1534 (type_for_widest_vector_mode): Handle BImode as an inner mode.
1536 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1537 Alan Hayward <alan.hayward@arm.com>
1538 David Sherwood <david.sherwood@arm.com>
1540 * machmode.h (mode_size): Change from unsigned short to
1542 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
1543 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
1544 or if measurement_type is not polynomial.
1545 (fixed_size_mode::includes_p): Check for constant-sized modes.
1546 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
1547 return a poly_uint16 rather than an unsigned short.
1548 (emit_mode_size): Change the type of mode_size from unsigned short
1549 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
1550 (emit_mode_adjustments): Cope with polynomial vector sizes.
1551 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
1553 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
1555 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
1556 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
1557 * caller-save.c (setup_save_areas): Likewise.
1558 (replace_reg_with_saved_mem): Likewise.
1559 * calls.c (emit_library_call_value_1): Likewise.
1560 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
1561 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
1562 (gen_lowpart_for_combine): Likewise.
1563 * convert.c (convert_to_integer_1): Likewise.
1564 * cse.c (equiv_constant, cse_insn): Likewise.
1565 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
1566 (cselib_subst_to_values): Likewise.
1567 * dce.c (word_dce_process_block): Likewise.
1568 * df-problems.c (df_word_lr_mark_ref): Likewise.
1569 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
1570 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
1571 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
1572 (rtl_for_decl_location): Likewise.
1573 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
1574 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
1575 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
1576 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
1577 (expand_expr_real_1): Likewise.
1578 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
1579 (pad_below): Likewise.
1580 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
1581 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
1582 * ira.c (get_subreg_tracking_sizes): Likewise.
1583 * ira-build.c (ira_create_allocno_objects): Likewise.
1584 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
1585 (ira_sort_regnos_for_alter_reg): Likewise.
1586 * ira-costs.c (record_operand_costs): Likewise.
1587 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
1588 (resolve_simple_move): Likewise.
1589 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
1590 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
1591 (lra_constraints): Likewise.
1592 (CONST_POOL_OK_P): Reject variable-sized modes.
1593 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
1594 (add_pseudo_to_slot, lra_spill): Likewise.
1595 * omp-low.c (omp_clause_aligned_alignment): Likewise.
1596 * optabs-query.c (get_best_extraction_insn): Likewise.
1597 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
1598 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
1599 (expand_mult_highpart, valid_multiword_target_p): Likewise.
1600 * recog.c (offsettable_address_addr_space_p): Likewise.
1601 * regcprop.c (maybe_mode_change): Likewise.
1602 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
1603 * regrename.c (build_def_use): Likewise.
1604 * regstat.c (dump_reg_info): Likewise.
1605 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
1606 (find_reloads, find_reloads_subreg_address): Likewise.
1607 * reload1.c (eliminate_regs_1): Likewise.
1608 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
1609 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
1610 (simplify_binary_operation_1, simplify_subreg): Likewise.
1611 * targhooks.c (default_function_arg_padding): Likewise.
1612 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
1613 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
1614 (verify_gimple_assign_ternary): Likewise.
1615 * tree-inline.c (estimate_move_cost): Likewise.
1616 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
1617 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
1618 (get_address_cost_ainc): Likewise.
1619 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
1620 (vect_supportable_dr_alignment): Likewise.
1621 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
1622 (vectorizable_reduction): Likewise.
1623 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
1624 (vectorizable_operation, vectorizable_load): Likewise.
1625 * tree.c (build_same_sized_truth_vector_type): Likewise.
1626 * valtrack.c (cleanup_auto_inc_dec): Likewise.
1627 * var-tracking.c (emit_note_insn_var_location): Likewise.
1628 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
1629 (ADDR_VEC_ALIGN): Likewise.
1631 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1632 Alan Hayward <alan.hayward@arm.com>
1633 David Sherwood <david.sherwood@arm.com>
1635 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
1637 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
1638 or if measurement_type is polynomial.
1639 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
1640 * combine.c (make_extraction): Likewise.
1641 * dse.c (find_shift_sequence): Likewise.
1642 * dwarf2out.c (mem_loc_descriptor): Likewise.
1643 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
1644 (extract_bit_field, extract_low_bits): Likewise.
1645 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
1646 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
1647 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
1648 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
1649 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
1650 * reload.c (find_reloads): Likewise.
1651 * reload1.c (alter_reg): Likewise.
1652 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
1653 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
1654 * tree-if-conv.c (predicate_mem_writes): Likewise.
1655 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
1656 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
1657 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
1658 * valtrack.c (dead_debug_insert_temp): Likewise.
1659 * varasm.c (mergeable_constant_section): Likewise.
1660 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
1662 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1663 Alan Hayward <alan.hayward@arm.com>
1664 David Sherwood <david.sherwood@arm.com>
1666 * expr.c (expand_assignment): Cope with polynomial mode sizes
1667 when assigning to a CONCAT.
1669 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1670 Alan Hayward <alan.hayward@arm.com>
1671 David Sherwood <david.sherwood@arm.com>
1673 * machmode.h (mode_precision): Change from unsigned short to
1675 (mode_to_precision): Return a poly_uint16 rather than an unsigned
1677 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
1678 or if measurement_type is not polynomial.
1679 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
1680 in which the mode is already known to be a scalar_int_mode.
1681 * genmodes.c (emit_mode_precision): Change the type of mode_precision
1682 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
1684 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
1685 for GET_MODE_PRECISION.
1686 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
1687 for GET_MODE_PRECISION.
1688 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
1690 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
1691 (expand_field_assignment, make_extraction): Likewise.
1692 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
1693 (get_last_value): Likewise.
1694 * convert.c (convert_to_integer_1): Likewise.
1695 * cse.c (cse_insn): Likewise.
1696 * expr.c (expand_expr_real_1): Likewise.
1697 * lra-constraints.c (simplify_operand_subreg): Likewise.
1698 * optabs-query.c (can_atomic_load_p): Likewise.
1699 * optabs.c (expand_atomic_load): Likewise.
1700 (expand_atomic_store): Likewise.
1701 * ree.c (combine_reaching_defs): Likewise.
1702 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
1703 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
1704 * tree.h (type_has_mode_precision_p): Likewise.
1705 * ubsan.c (instrument_si_overflow): Likewise.
1707 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1708 Alan Hayward <alan.hayward@arm.com>
1709 David Sherwood <david.sherwood@arm.com>
1711 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
1712 polynomial numbers of units.
1713 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
1714 (valid_vector_subparts_p): New function.
1715 (build_vector_type): Remove temporary shim and take the number
1716 of units as a poly_uint64 rather than an int.
1717 (build_opaque_vector_type): Take the number of units as a
1718 poly_uint64 rather than an int.
1719 * tree.c (build_vector_from_ctor): Handle polynomial
1720 TYPE_VECTOR_SUBPARTS.
1721 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
1722 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
1723 (build_vector_from_val): If the number of units is variable,
1724 use build_vec_duplicate_cst for constant operands and
1725 VEC_DUPLICATE_EXPR otherwise.
1726 (make_vector_type): Remove temporary is_constant ().
1727 (build_vector_type, build_opaque_vector_type): Take the number of
1728 units as a poly_uint64 rather than an int.
1729 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
1731 * cfgexpand.c (expand_debug_expr): Likewise.
1732 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
1733 (store_constructor, expand_expr_real_1): Likewise.
1734 (const_scalar_mask_from_tree): Likewise.
1735 * fold-const-call.c (fold_const_reduction): Likewise.
1736 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
1737 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
1738 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
1739 (fold_relational_const): Likewise.
1740 (native_interpret_vector): Likewise. Change the size from an
1741 int to an unsigned int.
1742 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
1743 TYPE_VECTOR_SUBPARTS.
1744 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
1745 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
1746 duplicating a non-constant operand into a variable-length vector.
1747 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
1748 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
1749 * ipa-icf.c (sem_variable::equals): Likewise.
1750 * match.pd: Likewise.
1751 * omp-simd-clone.c (simd_clone_subparts): Likewise.
1752 * print-tree.c (print_node): Likewise.
1753 * stor-layout.c (layout_type): Likewise.
1754 * targhooks.c (default_builtin_vectorization_cost): Likewise.
1755 * tree-cfg.c (verify_gimple_comparison): Likewise.
1756 (verify_gimple_assign_binary): Likewise.
1757 (verify_gimple_assign_ternary): Likewise.
1758 (verify_gimple_assign_single): Likewise.
1759 * tree-pretty-print.c (dump_generic_node): Likewise.
1760 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
1761 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
1762 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
1763 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
1764 (vect_shift_permute_load_chain): Likewise.
1765 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
1766 (expand_vector_condition, optimize_vector_constructor): Likewise.
1767 (lower_vec_perm, get_compute_type): Likewise.
1768 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
1769 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
1770 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
1771 (vect_recog_mask_conversion_pattern): Likewise.
1772 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
1773 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
1774 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
1775 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
1776 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
1777 (vectorizable_shift, vectorizable_operation, vectorizable_store)
1778 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
1779 (supportable_widening_operation): Likewise.
1780 (supportable_narrowing_operation): Likewise.
1781 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
1783 * varasm.c (output_constant): Likewise.
1785 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1786 Alan Hayward <alan.hayward@arm.com>
1787 David Sherwood <david.sherwood@arm.com>
1789 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
1790 so that both the length == 3 and length != 3 cases set up their
1791 own permute vectors. Add comments explaining why we know the
1792 number of elements is constant.
1793 (vect_permute_load_chain): Likewise.
1795 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1796 Alan Hayward <alan.hayward@arm.com>
1797 David Sherwood <david.sherwood@arm.com>
1799 * machmode.h (mode_nunits): Change from unsigned char to
1801 (ONLY_FIXED_SIZE_MODES): New macro.
1802 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
1803 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
1804 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
1806 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
1807 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
1808 or if measurement_type is not polynomial.
1809 * genmodes.c (ZERO_COEFFS): New macro.
1810 (emit_mode_nunits_inline): Make mode_nunits_inline return a
1812 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
1813 Use ZERO_COEFFS when emitting initializers.
1814 * data-streamer.h (bp_pack_poly_value): New function.
1815 (bp_unpack_poly_value): Likewise.
1816 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
1817 for GET_MODE_NUNITS.
1818 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
1819 for GET_MODE_NUNITS.
1820 * tree.c (make_vector_type): Remove temporary shim and make
1821 the real function take the number of units as a poly_uint64
1823 (build_vector_type_for_mode): Handle polynomial nunits.
1824 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
1825 * emit-rtl.c (const_vec_series_p_1): Likewise.
1826 (gen_rtx_CONST_VECTOR): Likewise.
1827 * fold-const.c (test_vec_duplicate_folding): Likewise.
1828 * genrecog.c (validate_pattern): Likewise.
1829 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
1830 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
1831 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
1832 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
1833 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
1834 * rtlanal.c (subreg_get_info): Likewise.
1835 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
1836 (vect_grouped_load_supported): Likewise.
1837 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
1838 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
1839 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
1840 (simplify_const_unary_operation, simplify_binary_operation_1)
1841 (simplify_const_binary_operation, simplify_ternary_operation)
1842 (test_vector_ops_duplicate, test_vector_ops): Likewise.
1843 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
1844 instead of CONST_VECTOR_NUNITS.
1845 * varasm.c (output_constant_pool_2): Likewise.
1846 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
1847 explicit-encoded elements in the XVEC for variable-length vectors.
1849 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1851 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
1853 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1854 Alan Hayward <alan.hayward@arm.com>
1855 David Sherwood <david.sherwood@arm.com>
1857 * coretypes.h (fixed_size_mode): Declare.
1858 (fixed_size_mode_pod): New typedef.
1859 * builtins.h (target_builtins::x_apply_args_mode)
1860 (target_builtins::x_apply_result_mode): Change type to
1861 fixed_size_mode_pod.
1862 * builtins.c (apply_args_size, apply_result_size, result_vector)
1863 (expand_builtin_apply_args_1, expand_builtin_apply)
1864 (expand_builtin_return): Update accordingly.
1866 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1868 * cse.c (hash_rtx_cb): Hash only the encoded elements.
1869 * cselib.c (cselib_hash_rtx): Likewise.
1870 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
1871 CONST_VECTOR encoding.
1873 2017-01-03 Jakub Jelinek <jakub@redhat.com>
1874 Jeff Law <law@redhat.com>
1877 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
1878 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
1879 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
1880 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
1883 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
1884 explicitly probe *sp in a noreturn function if there were any callee
1885 register saves or frame pointer is needed.
1887 2018-01-03 Jakub Jelinek <jakub@redhat.com>
1890 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
1891 BLKmode for ternary, binary or unary expressions.
1894 * var-tracking.c (delete_vta_debug_insn): New inline function.
1895 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
1896 insns from get_insns () to NULL instead of each bb separately.
1897 Use delete_vta_debug_insn. No longer static.
1898 (vt_debug_insns_local, variable_tracking_main_1): Adjust
1899 delete_vta_debug_insns callers.
1900 * rtl.h (delete_vta_debug_insns): Declare.
1901 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
1902 instead of variable_tracking_main.
1904 2018-01-03 Martin Sebor <msebor@redhat.com>
1906 PR tree-optimization/83603
1907 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
1908 arguments past the endof the argument list in functions declared
1909 without a prototype.
1910 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
1911 Avoid checking when arguments are null.
1913 2018-01-03 Martin Sebor <msebor@redhat.com>
1916 * doc/extend.texi (attribute const): Fix a typo.
1917 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
1918 issuing -Wsuggest-attribute for void functions.
1920 2018-01-03 Martin Sebor <msebor@redhat.com>
1922 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
1923 offset_int::from instead of wide_int::to_shwi.
1924 (maybe_diag_overlap): Remove assertion.
1925 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
1926 * gimple-ssa-sprintf.c (format_directive): Same.
1927 (parse_directive): Same.
1928 (sprintf_dom_walker::compute_format_length): Same.
1929 (try_substitute_return_value): Same.
1931 2017-01-03 Jeff Law <law@redhat.com>
1934 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
1935 non-constant residual for zero at runtime and avoid probing in
1936 that case. Reorganize code for trailing problem to mirror handling
1939 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1941 PR tree-optimization/83501
1942 * tree-ssa-strlen.c (get_string_cst): New.
1943 (handle_char_store): Call get_string_cst.
1945 2018-01-03 Martin Liska <mliska@suse.cz>
1947 PR tree-optimization/83593
1948 * tree-ssa-strlen.c: Include tree-cfg.h.
1949 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
1950 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
1951 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
1953 (strlen_dom_walker::before_dom_children): Call
1954 gimple_purge_dead_eh_edges. Dump tranformation with details
1956 (strlen_dom_walker::before_dom_children): Update call by adding
1957 new argument cleanup_eh.
1958 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
1960 2018-01-03 Martin Liska <mliska@suse.cz>
1963 * cif-code.def (VARIADIC_THUNK): New enum value.
1964 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
1967 2018-01-03 Jan Beulich <jbeulich@suse.com>
1969 * sse.md (mov<mode>_internal): Tighten condition for when to use
1970 vmovdqu<ssescalarsize> for TI and OI modes.
1972 2018-01-03 Jakub Jelinek <jakub@redhat.com>
1974 Update copyright years.
1976 2018-01-03 Martin Liska <mliska@suse.cz>
1979 * ipa-visibility.c (function_and_variable_visibility): Skip
1980 functions with noipa attribure.
1982 2018-01-03 Jakub Jelinek <jakub@redhat.com>
1984 * gcc.c (process_command): Update copyright notice dates.
1985 * gcov-dump.c (print_version): Ditto.
1986 * gcov.c (print_version): Ditto.
1987 * gcov-tool.c (print_version): Ditto.
1988 * gengtype.c (create_file): Ditto.
1989 * doc/cpp.texi: Bump @copying's copyright year.
1990 * doc/cppinternals.texi: Ditto.
1991 * doc/gcc.texi: Ditto.
1992 * doc/gccint.texi: Ditto.
1993 * doc/gcov.texi: Ditto.
1994 * doc/install.texi: Ditto.
1995 * doc/invoke.texi: Ditto.
1997 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1999 * vector-builder.h (vector_builder::m_full_nelts): Change from
2000 unsigned int to poly_uint64.
2001 (vector_builder::full_nelts): Update prototype accordingly.
2002 (vector_builder::new_vector): Likewise.
2003 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
2004 (vector_builder::operator ==): Likewise.
2005 (vector_builder::finalize): Likewise.
2006 * int-vector-builder.h (int_vector_builder::int_vector_builder):
2007 Take the number of elements as a poly_uint64 rather than an
2009 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
2010 from unsigned int to poly_uint64.
2011 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
2012 (vec_perm_indices::new_vector): Likewise.
2013 (vec_perm_indices::length): Likewise.
2014 (vec_perm_indices::nelts_per_input): Likewise.
2015 (vec_perm_indices::input_nelts): Likewise.
2016 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
2017 number of elements per input as a poly_uint64 rather than an
2018 unsigned int. Use the original encoding for variable-length
2019 vectors, rather than clamping each individual element.
2020 For the second and subsequent elements in each pattern,
2021 clamp the step and base before clamping their sum.
2022 (vec_perm_indices::series_p): Handle polynomial element counts.
2023 (vec_perm_indices::all_in_range_p): Likewise.
2024 (vec_perm_indices_to_tree): Likewise.
2025 (vec_perm_indices_to_rtx): Likewise.
2026 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
2027 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
2028 (tree_vector_builder::new_binary_operation): Handle polynomial
2029 element counts. Return false if we need to know the number
2030 of elements at compile time.
2031 * fold-const.c (fold_vec_perm): Punt if the number of elements
2032 isn't known at compile time.
2034 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2036 * vec-perm-indices.h (vec_perm_builder): Change element type
2037 from HOST_WIDE_INT to poly_int64.
2038 (vec_perm_indices::element_type): Update accordingly.
2039 (vec_perm_indices::clamp): Handle polynomial element_types.
2040 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
2041 (vec_perm_indices::all_in_range_p): Likewise.
2042 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
2044 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
2045 polynomial vec_perm_indices element types.
2046 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
2047 * fold-const.c (fold_vec_perm): Likewise.
2048 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
2049 * tree-vect-generic.c (lower_vec_perm): Likewise.
2050 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
2051 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
2052 element type to HOST_WIDE_INT.
2054 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2055 Alan Hayward <alan.hayward@arm.com>
2056 David Sherwood <david.sherwood@arm.com>
2058 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
2059 rather than an int. Use plus_constant.
2060 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
2061 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
2063 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2064 Alan Hayward <alan.hayward@arm.com>
2065 David Sherwood <david.sherwood@arm.com>
2067 * calls.c (emit_call_1, expand_call): Change struct_value_size from
2068 a HOST_WIDE_INT to a poly_int64.
2070 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2071 Alan Hayward <alan.hayward@arm.com>
2072 David Sherwood <david.sherwood@arm.com>
2074 * calls.c (load_register_parameters): Cope with polynomial
2075 mode sizes. Require a constant size for BLKmode parameters
2076 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
2077 forces a parameter to be padded at the lsb end in order to
2078 fill a complete number of words, require the parameter size
2079 to be ordered wrt UNITS_PER_WORD.
2081 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2082 Alan Hayward <alan.hayward@arm.com>
2083 David Sherwood <david.sherwood@arm.com>
2085 * reload1.c (spill_stack_slot_width): Change element type
2086 from unsigned int to poly_uint64_pod.
2087 (alter_reg): Treat mode sizes as polynomial.
2089 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2090 Alan Hayward <alan.hayward@arm.com>
2091 David Sherwood <david.sherwood@arm.com>
2093 * reload.c (complex_word_subreg_p): New function.
2094 (reload_inner_reg_of_subreg, push_reload): Use it.
2096 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2097 Alan Hayward <alan.hayward@arm.com>
2098 David Sherwood <david.sherwood@arm.com>
2100 * lra-constraints.c (process_alt_operands): Reject matched
2101 operands whose sizes aren't ordered.
2102 (match_reload): Refer to this check here.
2104 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2105 Alan Hayward <alan.hayward@arm.com>
2106 David Sherwood <david.sherwood@arm.com>
2108 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
2109 that the mode size is in the set {1, 2, 4, 8, 16}.
2111 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2112 Alan Hayward <alan.hayward@arm.com>
2113 David Sherwood <david.sherwood@arm.com>
2115 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
2116 Use plus_constant instead of gen_rtx_PLUS.
2118 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2119 Alan Hayward <alan.hayward@arm.com>
2120 David Sherwood <david.sherwood@arm.com>
2122 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
2123 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
2124 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
2125 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
2126 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
2127 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
2128 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
2129 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
2130 * config/i386/i386.c (ix86_push_rounding): ...this new function.
2131 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
2133 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
2134 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
2135 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
2136 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
2137 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
2138 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
2139 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
2140 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
2141 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
2142 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
2144 * expr.c (emit_move_resolve_push): Treat the input and result
2145 of PUSH_ROUNDING as a poly_int64.
2146 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
2147 (emit_push_insn): Likewise.
2148 * lra-eliminations.c (mark_not_eliminable): Likewise.
2149 * recog.c (push_operand): Likewise.
2150 * reload1.c (elimination_effects): Likewise.
2151 * rtlanal.c (nonzero_bits1): Likewise.
2152 * calls.c (store_one_arg): Likewise. Require the padding to be
2153 known at compile time.
2155 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2156 Alan Hayward <alan.hayward@arm.com>
2157 David Sherwood <david.sherwood@arm.com>
2159 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
2160 Use plus_constant instead of gen_rtx_PLUS.
2162 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2163 Alan Hayward <alan.hayward@arm.com>
2164 David Sherwood <david.sherwood@arm.com>
2166 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
2169 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2170 Alan Hayward <alan.hayward@arm.com>
2171 David Sherwood <david.sherwood@arm.com>
2173 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
2174 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
2175 via stack temporaries. Treat the mode size as polynomial too.
2177 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2178 Alan Hayward <alan.hayward@arm.com>
2179 David Sherwood <david.sherwood@arm.com>
2181 * expr.c (expand_expr_real_2): When handling conversions involving
2182 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
2183 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
2184 as a poly_uint64 too.
2186 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2187 Alan Hayward <alan.hayward@arm.com>
2188 David Sherwood <david.sherwood@arm.com>
2190 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
2192 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2193 Alan Hayward <alan.hayward@arm.com>
2194 David Sherwood <david.sherwood@arm.com>
2196 * combine.c (can_change_dest_mode): Handle polynomial
2197 REGMODE_NATURAL_SIZE.
2198 * expmed.c (store_bit_field_1): Likewise.
2199 * expr.c (store_constructor): Likewise.
2200 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
2201 and polynomial REGMODE_NATURAL_SIZE.
2202 (gen_lowpart_common): Likewise.
2203 * reginfo.c (record_subregs_of_mode): Likewise.
2204 * rtlanal.c (read_modify_subreg_p): Likewise.
2206 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2207 Alan Hayward <alan.hayward@arm.com>
2208 David Sherwood <david.sherwood@arm.com>
2210 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
2211 numbers of elements.
2213 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2214 Alan Hayward <alan.hayward@arm.com>
2215 David Sherwood <david.sherwood@arm.com>
2217 * match.pd: Cope with polynomial numbers of vector elements.
2219 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2220 Alan Hayward <alan.hayward@arm.com>
2221 David Sherwood <david.sherwood@arm.com>
2223 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
2224 in a POINTER_PLUS_EXPR.
2226 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2227 Alan Hayward <alan.hayward@arm.com>
2228 David Sherwood <david.sherwood@arm.com>
2230 * omp-simd-clone.c (simd_clone_subparts): New function.
2231 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
2232 (ipa_simd_modify_function_body): Likewise.
2234 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2235 Alan Hayward <alan.hayward@arm.com>
2236 David Sherwood <david.sherwood@arm.com>
2238 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
2239 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
2240 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
2241 (expand_vector_condition, vector_element): Likewise.
2242 (subparts_gt): New function.
2243 (get_compute_type): Use subparts_gt.
2244 (count_type_subparts): Delete.
2245 (expand_vector_operations_1): Use subparts_gt instead of
2246 count_type_subparts.
2248 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2249 Alan Hayward <alan.hayward@arm.com>
2250 David Sherwood <david.sherwood@arm.com>
2252 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
2253 (vect_compile_time_alias): ...this new function. Do the calculation
2254 on poly_ints rather than trees.
2255 (vect_prune_runtime_alias_test_list): Update call accordingly.
2257 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2258 Alan Hayward <alan.hayward@arm.com>
2259 David Sherwood <david.sherwood@arm.com>
2261 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
2263 (vect_schedule_slp_instance): Likewise.
2265 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2266 Alan Hayward <alan.hayward@arm.com>
2267 David Sherwood <david.sherwood@arm.com>
2269 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
2270 constant and extern definitions for variable-length vectors.
2271 (vect_get_constant_vectors): Note that the number of units
2272 is known to be constant.
2274 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2275 Alan Hayward <alan.hayward@arm.com>
2276 David Sherwood <david.sherwood@arm.com>
2278 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
2279 of units as polynomial. Choose between WIDE and NARROW based
2282 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2283 Alan Hayward <alan.hayward@arm.com>
2284 David Sherwood <david.sherwood@arm.com>
2286 * tree-vect-stmts.c (simd_clone_subparts): New function.
2287 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
2289 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2290 Alan Hayward <alan.hayward@arm.com>
2291 David Sherwood <david.sherwood@arm.com>
2293 * tree-vect-stmts.c (vectorizable_call): Treat the number of
2294 vectors as polynomial. Use build_index_vector for
2297 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2298 Alan Hayward <alan.hayward@arm.com>
2299 David Sherwood <david.sherwood@arm.com>
2301 * tree-vect-stmts.c (get_load_store_type): Treat the number of
2302 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
2303 for variable-length vectors.
2304 (vectorizable_mask_load_store): Treat the number of units as
2305 polynomial, asserting that it is constant if the condition has
2306 already been enforced.
2307 (vectorizable_store, vectorizable_load): Likewise.
2309 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2310 Alan Hayward <alan.hayward@arm.com>
2311 David Sherwood <david.sherwood@arm.com>
2313 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
2314 of units as polynomial. Punt if we can't tell at compile time
2315 which vector contains the final result.
2317 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2318 Alan Hayward <alan.hayward@arm.com>
2319 David Sherwood <david.sherwood@arm.com>
2321 * tree-vect-loop.c (vectorizable_induction): Treat the number
2322 of units as polynomial. Punt on SLP inductions. Use an integer
2323 VEC_SERIES_EXPR for variable-length integer reductions. Use a
2324 cast of such a series for variable-length floating-point
2327 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2328 Alan Hayward <alan.hayward@arm.com>
2329 David Sherwood <david.sherwood@arm.com>
2331 * tree.h (build_index_vector): Declare.
2332 * tree.c (build_index_vector): New function.
2333 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
2334 of units as polynomial, forcibly converting it to a constant if
2335 vectorizable_reduction has already enforced the condition.
2336 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
2337 to create a {1,2,3,...} vector.
2338 (vectorizable_reduction): Treat the number of units as polynomial.
2339 Choose vectype_in based on the largest scalar element size rather
2340 than the smallest number of units. Enforce the restrictions
2343 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2344 Alan Hayward <alan.hayward@arm.com>
2345 David Sherwood <david.sherwood@arm.com>
2347 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
2348 number of units as polynomial.
2350 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2351 Alan Hayward <alan.hayward@arm.com>
2352 David Sherwood <david.sherwood@arm.com>
2354 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
2355 * target.def (autovectorize_vector_sizes): Return the vector sizes
2356 by pointer, using vector_sizes rather than a bitmask.
2357 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
2358 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
2359 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
2361 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
2362 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
2363 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
2364 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
2365 * omp-general.c (omp_max_vf): Likewise.
2366 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2367 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
2368 * tree-vect-loop.c (vect_analyze_loop): Likewise.
2369 * tree-vect-slp.c (vect_slp_bb): Likewise.
2370 * doc/tm.texi: Regenerate.
2371 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
2373 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
2374 the vector size as a poly_uint64 rather than an unsigned int.
2375 (current_vector_size): Change from an unsigned int to a poly_uint64.
2376 (get_vectype_for_scalar_type): Update accordingly.
2377 * tree.h (build_truth_vector_type): Take the size and number of
2378 units as a poly_uint64 rather than an unsigned int.
2379 (build_vector_type): Add a temporary overload that takes
2380 the number of units as a poly_uint64 rather than an unsigned int.
2381 * tree.c (make_vector_type): Likewise.
2382 (build_truth_vector_type): Take the number of units as a poly_uint64
2383 rather than an unsigned int.
2385 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2386 Alan Hayward <alan.hayward@arm.com>
2387 David Sherwood <david.sherwood@arm.com>
2389 * target.def (get_mask_mode): Take the number of units and length
2390 as poly_uint64s rather than unsigned ints.
2391 * targhooks.h (default_get_mask_mode): Update accordingly.
2392 * targhooks.c (default_get_mask_mode): Likewise.
2393 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
2394 * doc/tm.texi: Regenerate.
2396 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2397 Alan Hayward <alan.hayward@arm.com>
2398 David Sherwood <david.sherwood@arm.com>
2400 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
2401 * omp-general.c (omp_max_vf): Likewise.
2402 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
2403 (expand_omp_simd): Handle polynomial safelen.
2404 * omp-low.c (omplow_simd_context): Add a default constructor.
2405 (omplow_simd_context::max_vf): Change from int to poly_uint64.
2406 (lower_rec_simd_input_clauses): Update accordingly.
2407 (lower_rec_input_clauses): Likewise.
2409 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2410 Alan Hayward <alan.hayward@arm.com>
2411 David Sherwood <david.sherwood@arm.com>
2413 * tree-vectorizer.h (vect_nunits_for_cost): New function.
2414 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
2415 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
2416 (vect_analyze_slp_cost): Likewise.
2417 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
2418 (vect_model_load_cost): Likewise.
2420 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2421 Alan Hayward <alan.hayward@arm.com>
2422 David Sherwood <david.sherwood@arm.com>
2424 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
2425 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
2426 from an unsigned int * to a poly_uint64_pod *.
2427 (calculate_unrolling_factor): New function.
2428 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
2430 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2431 Alan Hayward <alan.hayward@arm.com>
2432 David Sherwood <david.sherwood@arm.com>
2434 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
2435 from an unsigned int to a poly_uint64.
2436 (_loop_vec_info::slp_unrolling_factor): Likewise.
2437 (_loop_vec_info::vectorization_factor): Change from an int
2439 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
2440 (vect_get_num_vectors): New function.
2441 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
2442 (vect_get_num_copies): Use vect_get_num_vectors.
2443 (vect_analyze_data_ref_dependences): Change max_vf from an int *
2444 to an unsigned int *.
2445 (vect_analyze_data_refs): Change min_vf from an int * to a
2447 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
2448 than an unsigned HOST_WIDE_INT.
2449 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
2450 (vect_analyze_data_ref_dependence): Change max_vf from an int *
2451 to an unsigned int *.
2452 (vect_analyze_data_ref_dependences): Likewise.
2453 (vect_compute_data_ref_alignment): Handle polynomial vf.
2454 (vect_enhance_data_refs_alignment): Likewise.
2455 (vect_prune_runtime_alias_test_list): Likewise.
2456 (vect_shift_permute_load_chain): Likewise.
2457 (vect_supportable_dr_alignment): Likewise.
2458 (dependence_distance_ge_vf): Take the vectorization factor as a
2459 poly_uint64 rather than an unsigned HOST_WIDE_INT.
2460 (vect_analyze_data_refs): Change min_vf from an int * to a
2462 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
2463 vfm1 as a poly_uint64 rather than an int. Make the same change
2464 for the returned bound_scalar.
2465 (vect_gen_vector_loop_niters): Handle polynomial vf.
2466 (vect_do_peeling): Likewise. Update call to
2467 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
2468 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
2470 * tree-vect-loop.c (vect_determine_vectorization_factor)
2471 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
2472 (vect_get_known_peeling_cost): Likewise.
2473 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
2474 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
2475 (vect_transform_loop): Likewise. Use the lowest possible VF when
2476 updating the upper bounds of the loop.
2477 (vect_min_worthwhile_factor): Make static. Return an unsigned int
2479 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
2480 polynomial unroll factors.
2481 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
2482 (vect_make_slp_decision): Likewise.
2483 (vect_supported_load_permutation_p): Likewise, and polynomial
2485 (vect_analyze_slp_cost): Handle polynomial vf.
2486 (vect_slp_analyze_node_operations): Likewise.
2487 (vect_slp_analyze_bb_1): Likewise.
2488 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
2489 than an unsigned HOST_WIDE_INT.
2490 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
2491 (vectorizable_load): Handle polynomial vf.
2492 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
2494 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
2496 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2497 Alan Hayward <alan.hayward@arm.com>
2498 David Sherwood <david.sherwood@arm.com>
2500 * match.pd: Handle bit operations involving three constants
2501 and try to fold one pair.
2503 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2505 * tree-vect-loop-manip.c: Include gimple-fold.h.
2506 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
2507 niters_maybe_zero parameters. Handle other cases besides a step of 1.
2508 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
2509 Add a path that uses a step of VF instead of 1, but disable it
2511 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
2512 and niters_no_overflow parameters. Update calls to
2513 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
2514 Create a new SSA name if the latter choses to use a ste other
2515 than zero, and return it via niters_vector_mult_vf_var.
2516 * tree-vect-loop.c (vect_transform_loop): Update calls to
2517 vect_do_peeling, vect_gen_vector_loop_niters and
2518 slpeel_make_loop_iterate_ntimes.
2519 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
2520 (vect_gen_vector_loop_niters): Update declarations after above changes.
2522 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
2524 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
2525 128-bit round to integer instructions.
2526 (ceil<mode>2): Likewise.
2527 (btrunc<mode>2): Likewise.
2528 (round<mode>2): Likewise.
2530 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2532 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
2533 unaligned VSX load/store on P8/P9.
2534 (expand_block_clear): Allow the use of unaligned VSX
2535 load/store on P8/P9.
2537 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2539 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
2541 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
2542 swap associated with both a load and a store.
2544 2018-01-02 Andrew Waterman <andrew@sifive.com>
2546 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
2547 * config/riscv/riscv.md (clear_cache): Use it.
2549 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
2551 * web.c: Remove out-of-date comment.
2553 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2555 * expr.c (fixup_args_size_notes): Check that any existing
2556 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
2557 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
2558 (emit_single_push_insn): ...here.
2560 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2562 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
2563 (const_vector_encoded_nelts): New function.
2564 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
2565 (const_vector_int_elt, const_vector_elt): Declare.
2566 * emit-rtl.c (const_vector_int_elt_1): New function.
2567 (const_vector_elt): Likewise.
2568 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
2569 of CONST_VECTOR_ELT.
2571 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2573 * expr.c: Include rtx-vector-builder.h.
2574 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
2575 directly on the tree encoding.
2576 (const_vector_from_tree): Likewise.
2577 * optabs.c: Include rtx-vector-builder.h.
2578 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
2579 sequence of "u" values.
2580 * vec-perm-indices.c: Include rtx-vector-builder.h.
2581 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
2582 directly on the vec_perm_indices encoding.
2584 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2586 * doc/rtl.texi (const_vector): Describe new encoding scheme.
2587 * Makefile.in (OBJS): Add rtx-vector-builder.o.
2588 * rtx-vector-builder.h: New file.
2589 * rtx-vector-builder.c: Likewise.
2590 * rtl.h (rtx_def::u2): Add a const_vector field.
2591 (CONST_VECTOR_NPATTERNS): New macro.
2592 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
2593 (CONST_VECTOR_DUPLICATE_P): Likewise.
2594 (CONST_VECTOR_STEPPED_P): Likewise.
2595 (CONST_VECTOR_ENCODED_ELT): Likewise.
2596 (const_vec_duplicate_p): Check for a duplicated vector encoding.
2597 (unwrap_const_vec_duplicate): Likewise.
2598 (const_vec_series_p): Check for a non-duplicated vector encoding.
2599 Say that the function only returns true for integer vectors.
2600 * emit-rtl.c: Include rtx-vector-builder.h.
2601 (gen_const_vec_duplicate_1): Delete.
2602 (gen_const_vector): Call gen_const_vec_duplicate instead of
2603 gen_const_vec_duplicate_1.
2604 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
2605 (gen_const_vec_duplicate): Use rtx_vector_builder.
2606 (gen_const_vec_series): Likewise.
2607 (gen_rtx_CONST_VECTOR): Likewise.
2608 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
2609 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
2610 Build a new vector rather than modifying a CONST_VECTOR in-place.
2611 (handle_special_swappables): Update call accordingly.
2612 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
2613 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
2614 Build a new vector rather than modifying a CONST_VECTOR in-place.
2615 (handle_special_swappables): Update call accordingly.
2617 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2619 * simplify-rtx.c (simplify_const_binary_operation): Use
2620 CONST_VECTOR_ELT instead of XVECEXP.
2622 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2624 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
2625 the selector elements to be different from the data elements
2626 if the selector is a VECTOR_CST.
2627 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
2628 ssizetype for the selector.
2630 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2632 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
2633 before testing each element individually.
2634 * tree-vect-generic.c (lower_vec_perm): Likewise.
2636 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2638 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
2639 * selftest-run-tests.c (selftest::run_tests): Call it.
2640 * vector-builder.h (vector_builder::operator ==): New function.
2641 (vector_builder::operator !=): Likewise.
2642 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
2643 (vec_perm_indices::all_from_input_p): New function.
2644 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
2645 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
2646 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
2647 instead of reading the VECTOR_CST directly. Detect whether both
2648 vector inputs are the same before constructing the vec_perm_indices,
2649 and update the number of inputs argument accordingly. Use the
2650 utility functions added above. Only construct sel2 if we need to.
2652 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2654 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
2655 the broadcast of the low byte.
2656 (expand_mult_highpart): Use an explicit encoding for the permutes.
2657 * optabs-query.c (can_mult_highpart_p): Likewise.
2658 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
2659 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2660 (vectorizable_bswap): Likewise.
2661 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
2662 explicit encoding for the power-of-2 permutes.
2663 (vect_permute_store_chain): Likewise.
2664 (vect_grouped_load_supported): Likewise.
2665 (vect_permute_load_chain): Likewise.
2667 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2669 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
2670 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
2671 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
2672 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
2673 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
2674 (vect_gen_perm_mask_any): Likewise.
2676 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2678 * int-vector-builder.h: New file.
2679 * vec-perm-indices.h: Include int-vector-builder.h.
2680 (vec_perm_indices): Redefine as an int_vector_builder.
2681 (auto_vec_perm_indices): Delete.
2682 (vec_perm_builder): Redefine as a stand-alone class.
2683 (vec_perm_indices::vec_perm_indices): New function.
2684 (vec_perm_indices::clamp): Likewise.
2685 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
2686 (vec_perm_indices::new_vector): New function.
2687 (vec_perm_indices::new_expanded_vector): Update for new
2688 vec_perm_indices class.
2689 (vec_perm_indices::rotate_inputs): New function.
2690 (vec_perm_indices::all_in_range_p): Operate directly on the
2691 encoded form, without computing elided elements.
2692 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
2693 encoding. Update for new vec_perm_indices class.
2694 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
2695 the given vec_perm_builder.
2696 (expand_vec_perm_var): Update vec_perm_builder constructor.
2697 (expand_mult_highpart): Use vec_perm_builder instead of
2698 auto_vec_perm_indices.
2699 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
2700 vec_perm_indices instead of auto_vec_perm_indices. Use a single
2701 or double series encoding as appropriate.
2702 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
2703 vec_perm_indices instead of auto_vec_perm_indices.
2704 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2705 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
2706 (vect_permute_store_chain): Likewise.
2707 (vect_grouped_load_supported): Likewise.
2708 (vect_permute_load_chain): Likewise.
2709 (vect_shift_permute_load_chain): Likewise.
2710 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
2711 (vect_transform_slp_perm_load): Likewise.
2712 (vect_schedule_slp_instance): Likewise.
2713 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2714 (vectorizable_mask_load_store): Likewise.
2715 (vectorizable_bswap): Likewise.
2716 (vectorizable_store): Likewise.
2717 (vectorizable_load): Likewise.
2718 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
2719 vec_perm_indices instead of auto_vec_perm_indices. Use
2720 tree_to_vec_perm_builder to read the vector from a tree.
2721 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
2722 vec_perm_builder instead of a vec_perm_indices.
2723 (have_whole_vector_shift): Use vec_perm_builder and
2724 vec_perm_indices instead of auto_vec_perm_indices. Leave the
2725 truncation to calc_vec_perm_mask_for_shift.
2726 (vect_create_epilog_for_reduction): Likewise.
2727 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
2728 from auto_vec_perm_indices to vec_perm_indices.
2729 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
2730 instead of changing individual elements.
2731 (aarch64_vectorize_vec_perm_const): Use new_vector to install
2732 the vector in d.perm.
2733 * config/arm/arm.c (expand_vec_perm_d::perm): Change
2734 from auto_vec_perm_indices to vec_perm_indices.
2735 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
2736 instead of changing individual elements.
2737 (arm_vectorize_vec_perm_const): Use new_vector to install
2738 the vector in d.perm.
2739 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
2740 Update vec_perm_builder constructor.
2741 (rs6000_expand_interleave): Likewise.
2742 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
2743 (rs6000_expand_interleave): Likewise.
2745 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2747 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
2748 to qimode could truncate the indices.
2749 * optabs.c (expand_vec_perm_var): Likewise.
2751 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2753 * Makefile.in (OBJS): Add vec-perm-indices.o.
2754 * vec-perm-indices.h: New file.
2755 * vec-perm-indices.c: Likewise.
2756 * target.h (vec_perm_indices): Replace with a forward class
2758 (auto_vec_perm_indices): Move to vec-perm-indices.h.
2759 * optabs.h: Include vec-perm-indices.h.
2760 (expand_vec_perm): Delete.
2761 (selector_fits_mode_p, expand_vec_perm_var): Declare.
2762 (expand_vec_perm_const): Declare.
2763 * target.def (vec_perm_const_ok): Replace with...
2764 (vec_perm_const): ...this new hook.
2765 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
2766 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
2767 * doc/tm.texi: Regenerate.
2768 * optabs.def (vec_perm_const): Delete.
2769 * doc/md.texi (vec_perm_const): Likewise.
2770 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
2771 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
2772 expand_vec_perm for constant permutation vectors. Assert that
2773 the mode of variable permutation vectors is the integer equivalent
2774 of the mode that is being permuted.
2775 * optabs-query.h (selector_fits_mode_p): Declare.
2776 * optabs-query.c: Include vec-perm-indices.h.
2777 (selector_fits_mode_p): New function.
2778 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
2779 is defined, instead of checking whether the vec_perm_const_optab
2780 exists. Use targetm.vectorize.vec_perm_const instead of
2781 targetm.vectorize.vec_perm_const_ok. Check whether the indices
2782 fit in the vector mode before using a variable permute.
2783 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
2784 vec_perm_indices instead of an rtx.
2785 (expand_vec_perm): Replace with...
2786 (expand_vec_perm_const): ...this new function. Take the selector
2787 as a vec_perm_indices rather than an rtx. Also take the mode of
2788 the selector. Update call to shift_amt_for_vec_perm_mask.
2789 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
2790 Use vec_perm_indices::new_expanded_vector to expand the original
2791 selector into bytes. Check whether the indices fit in the vector
2792 mode before using a variable permute.
2793 (expand_vec_perm_var): Make global.
2794 (expand_mult_highpart): Use expand_vec_perm_const.
2795 * fold-const.c: Includes vec-perm-indices.h.
2796 * tree-ssa-forwprop.c: Likewise.
2797 * tree-vect-data-refs.c: Likewise.
2798 * tree-vect-generic.c: Likewise.
2799 * tree-vect-loop.c: Likewise.
2800 * tree-vect-slp.c: Likewise.
2801 * tree-vect-stmts.c: Likewise.
2802 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
2804 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
2805 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
2806 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
2807 (aarch64_vectorize_vec_perm_const): ...this new function.
2808 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
2809 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
2810 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
2811 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
2812 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
2813 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
2814 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
2816 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
2817 check for NEON modes.
2818 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
2819 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
2820 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
2821 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
2823 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
2824 the old VEC_PERM_CONST conditions.
2825 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
2826 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
2827 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
2828 (ia64_vectorize_vec_perm_const_ok): Merge into...
2829 (ia64_vectorize_vec_perm_const): ...this new function.
2830 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
2831 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
2832 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
2833 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
2834 * config/mips/mips.c (mips_expand_vec_perm_const)
2835 (mips_vectorize_vec_perm_const_ok): Merge into...
2836 (mips_vectorize_vec_perm_const): ...this new function.
2837 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
2838 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
2839 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
2840 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
2841 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
2842 (rs6000_expand_vec_perm_const): Delete.
2843 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
2845 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
2846 (altivec_expand_vec_perm_const_le): Take each operand individually.
2847 Operate on constant selectors rather than rtxes.
2848 (altivec_expand_vec_perm_const): Likewise. Update call to
2849 altivec_expand_vec_perm_const_le.
2850 (rs6000_expand_vec_perm_const): Delete.
2851 (rs6000_vectorize_vec_perm_const_ok): Delete.
2852 (rs6000_vectorize_vec_perm_const): New function.
2853 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
2854 an element count and rtx array.
2855 (rs6000_expand_extract_even): Update call accordingly.
2856 (rs6000_expand_interleave): Likewise.
2857 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
2858 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
2859 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
2860 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
2861 (rs6000_expand_vec_perm_const): Delete.
2862 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
2863 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
2864 (altivec_expand_vec_perm_const_le): Take each operand individually.
2865 Operate on constant selectors rather than rtxes.
2866 (altivec_expand_vec_perm_const): Likewise. Update call to
2867 altivec_expand_vec_perm_const_le.
2868 (rs6000_expand_vec_perm_const): Delete.
2869 (rs6000_vectorize_vec_perm_const_ok): Delete.
2870 (rs6000_vectorize_vec_perm_const): New function. Remove stray
2871 reference to the SPE evmerge intructions.
2872 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
2873 an element count and rtx array.
2874 (rs6000_expand_extract_even): Update call accordingly.
2875 (rs6000_expand_interleave): Likewise.
2876 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
2877 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
2879 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
2881 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2883 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
2884 vector mode and that that mode matches the mode of the data
2886 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
2887 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
2888 directly using expand_vec_perm_1 when forcing selectors into
2890 (expand_vec_perm_var): New function, split out from expand_vec_perm.
2892 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2894 * optabs-query.h (can_vec_perm_p): Delete.
2895 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
2896 * optabs-query.c (can_vec_perm_p): Split into...
2897 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
2898 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
2899 particular selector is valid.
2900 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2901 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
2902 (vect_grouped_load_supported): Likewise.
2903 (vect_shift_permute_load_chain): Likewise.
2904 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
2905 (vect_transform_slp_perm_load): Likewise.
2906 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2907 (vectorizable_bswap): Likewise.
2908 (vect_gen_perm_mask_checked): Likewise.
2909 * fold-const.c (fold_ternary_loc): Likewise. Don't take
2910 implementations of variable permutation vectors into account
2911 when deciding which selector to use.
2912 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
2913 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
2914 with a false third argument.
2915 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
2916 to test whether the constant selector is valid and can_vec_perm_var_p
2917 to test whether a variable selector is valid.
2919 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2921 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
2922 * optabs-query.c (can_vec_perm_p): Likewise.
2923 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
2924 instead of vec_perm_indices.
2925 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
2926 (vect_gen_perm_mask_checked): Likewise,
2927 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
2928 (vect_gen_perm_mask_checked): Likewise,
2930 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
2932 * optabs-query.h (qimode_for_vec_perm): Declare.
2933 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
2934 (qimode_for_vec_perm): ...this new function.
2935 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
2937 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2939 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
2940 does not have a conditional at the top.
2942 2018-01-02 Richard Biener <rguenther@suse.de>
2944 * ipa-inline.c (big_speedup_p): Fix expression.
2946 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
2949 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
2952 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
2956 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
2957 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
2958 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
2959 cond_taken_branch_cost 3->4.
2961 2018-01-01 Jakub Jelinek <jakub@redhat.com>
2963 PR tree-optimization/83581
2964 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
2965 TODO_cleanup_cfg if any changes have been made.
2968 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
2969 convert_modes if target mode has the right side, but different mode
2973 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
2974 last argument when extracting from CONCAT. If either from_real or
2975 from_imag is NULL, use expansion through memory. If result is not
2976 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
2977 the parts directly to inner mode, if even that fails, use expansion
2981 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
2982 check for bswap in mode rather than HImode and use that in expand_unop
2985 Copyright (C) 2018 Free Software Foundation, Inc.
2987 Copying and distribution of this file, with or without modification,
2988 are permitted in any medium without royalty provided the copyright
2989 notice and this notice are preserved.