RISC-V: Support highpart register overlap for widen vx/vf instructions
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / base / pr112431-24.c
blob603e2941cd30812081379bc6196a4fc0104b8949
1 /* { dg-do compile } */
2 /* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
4 #include "riscv_vector.h"
6 size_t __attribute__ ((noinline))
7 sumation (size_t sum0, size_t sum1, size_t sum2, size_t sum3)
9 return sum0 + sum1 + sum2 + sum3;
12 size_t
13 foo (char const *buf, size_t len)
15 size_t sum = 0;
16 size_t vl = __riscv_vsetvlmax_e8m8 ();
17 size_t step = vl * 4;
18 const char *it = buf, *end = buf + len;
19 for (; it + step <= end;)
21 vint8m4_t v0 = __riscv_vle8_v_i8m4 ((void *) it, vl);
22 it += vl;
23 vint8m4_t v1 = __riscv_vle8_v_i8m4 ((void *) it, vl);
24 it += vl;
25 vint8m4_t v2 = __riscv_vle8_v_i8m4 ((void *) it, vl);
26 it += vl;
27 vint8m4_t v3 = __riscv_vle8_v_i8m4 ((void *) it, vl);
28 it += vl;
30 asm volatile("nop" ::: "memory");
31 vint16m8_t vw0 = __riscv_vwadd_vx_i16m8 (v0, 66, vl);
32 vint16m8_t vw1 = __riscv_vwadd_vx_i16m8 (v1, 66, vl);
33 vint16m8_t vw2 = __riscv_vwadd_vx_i16m8 (v2, 66, vl);
34 vint16m8_t vw3 = __riscv_vwadd_vx_i16m8 (v3, 66, vl);
36 asm volatile("nop" ::: "memory");
37 size_t sum0 = __riscv_vmv_x_s_i16m8_i16 (vw0);
38 size_t sum1 = __riscv_vmv_x_s_i16m8_i16 (vw1);
39 size_t sum2 = __riscv_vmv_x_s_i16m8_i16 (vw2);
40 size_t sum3 = __riscv_vmv_x_s_i16m8_i16 (vw3);
42 sum += sumation (sum0, sum1, sum2, sum3);
44 return sum;
47 size_t
48 foo2 (char const *buf, size_t len)
50 size_t sum = 0;
51 size_t vl = __riscv_vsetvlmax_e8m8 ();
52 size_t step = vl * 4;
53 const char *it = buf, *end = buf + len;
54 for (; it + step <= end;)
56 vint8m4_t v0 = __riscv_vle8_v_i8m4 ((void *) it, vl);
57 it += vl;
58 vint8m4_t v1 = __riscv_vle8_v_i8m4 ((void *) it, vl);
59 it += vl;
60 vint8m4_t v2 = __riscv_vle8_v_i8m4 ((void *) it, vl);
61 it += vl;
62 vint8m4_t v3 = __riscv_vle8_v_i8m4 ((void *) it, vl);
63 it += vl;
65 asm volatile("nop" ::: "memory");
66 vint16m8_t vw0 = __riscv_vwmulsu_vx_i16m8 (v0, 66, vl);
67 vint16m8_t vw1 = __riscv_vwmulsu_vx_i16m8 (v1, 66, vl);
68 vint16m8_t vw2 = __riscv_vwmulsu_vx_i16m8 (v2, 66, vl);
69 vint16m8_t vw3 = __riscv_vwmulsu_vx_i16m8 (v3, 66, vl);
71 asm volatile("nop" ::: "memory");
72 size_t sum0 = __riscv_vmv_x_s_i16m8_i16 (vw0);
73 size_t sum1 = __riscv_vmv_x_s_i16m8_i16 (vw1);
74 size_t sum2 = __riscv_vmv_x_s_i16m8_i16 (vw2);
75 size_t sum3 = __riscv_vmv_x_s_i16m8_i16 (vw3);
77 sum += sumation (sum0, sum1, sum2, sum3);
79 return sum;
82 /* { dg-final { scan-assembler-not {vmv1r} } } */
83 /* { dg-final { scan-assembler-not {vmv2r} } } */
84 /* { dg-final { scan-assembler-not {vmv4r} } } */
85 /* { dg-final { scan-assembler-not {vmv8r} } } */
86 /* { dg-final { scan-assembler-not {csrr} } } */