* emit-rtl.c (gen_lowpart_common): Suppress last change if __complex__.
[official-gcc.git] / gcc / emit-rtl.c
blob394c14a05808f3b9e812ddae0d96c5e4d8196e1c
1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-96, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
37 #include "config.h"
38 #ifdef __STDC__
39 #include <stdarg.h>
40 #else
41 #include <varargs.h>
42 #endif
43 #include "rtl.h"
44 #include "tree.h"
45 #include "flags.h"
46 #include "except.h"
47 #include "function.h"
48 #include "expr.h"
49 #include "regs.h"
50 #include "hard-reg-set.h"
51 #include "insn-config.h"
52 #include "real.h"
53 #include "obstack.h"
55 #include "bytecode.h"
56 #include "machmode.h"
57 #include "bc-opcode.h"
58 #include "bc-typecd.h"
59 #include "bc-optab.h"
60 #include "bc-emit.h"
62 #include <stdio.h>
64 /* Opcode names */
65 #ifdef BCDEBUG_PRINT_CODE
66 char *opcode_name[] =
68 #include "bc-opname.h"
70 "***END***"
72 #endif
75 /* Commonly used modes. */
77 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
78 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
79 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
81 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
82 After rtl generation, it is 1 plus the largest register number used. */
84 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
86 /* This is *not* reset after each function. It gives each CODE_LABEL
87 in the entire compilation a unique label number. */
89 static int label_num = 1;
91 /* Lowest label number in current function. */
93 static int first_label_num;
95 /* Highest label number in current function.
96 Zero means use the value of label_num instead.
97 This is nonzero only when belatedly compiling an inline function. */
99 static int last_label_num;
101 /* Value label_num had when set_new_first_and_last_label_number was called.
102 If label_num has not changed since then, last_label_num is valid. */
104 static int base_label_num;
106 /* Nonzero means do not generate NOTEs for source line numbers. */
108 static int no_line_numbers;
110 /* Commonly used rtx's, so that we only need space for one copy.
111 These are initialized once for the entire compilation.
112 All of these except perhaps the floating-point CONST_DOUBLEs
113 are unique; no other rtx-object will be equal to any of these. */
115 rtx pc_rtx; /* (PC) */
116 rtx cc0_rtx; /* (CC0) */
117 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
118 rtx const0_rtx; /* (CONST_INT 0) */
119 rtx const1_rtx; /* (CONST_INT 1) */
120 rtx const2_rtx; /* (CONST_INT 2) */
121 rtx constm1_rtx; /* (CONST_INT -1) */
122 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
124 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
125 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
126 record a copy of const[012]_rtx. */
128 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
130 REAL_VALUE_TYPE dconst0;
131 REAL_VALUE_TYPE dconst1;
132 REAL_VALUE_TYPE dconst2;
133 REAL_VALUE_TYPE dconstm1;
135 /* All references to the following fixed hard registers go through
136 these unique rtl objects. On machines where the frame-pointer and
137 arg-pointer are the same register, they use the same unique object.
139 After register allocation, other rtl objects which used to be pseudo-regs
140 may be clobbered to refer to the frame-pointer register.
141 But references that were originally to the frame-pointer can be
142 distinguished from the others because they contain frame_pointer_rtx.
144 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
145 tricky: until register elimination has taken place hard_frame_pointer_rtx
146 should be used if it is being set, and frame_pointer_rtx otherwise. After
147 register elimination hard_frame_pointer_rtx should always be used.
148 On machines where the two registers are same (most) then these are the
149 same.
151 In an inline procedure, the stack and frame pointer rtxs may not be
152 used for anything else. */
153 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
154 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
155 rtx hard_frame_pointer_rtx; /* (REG:Pmode HARD_FRAME_POINTER_REGNUM) */
156 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
157 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
158 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
159 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
160 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
161 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
163 /* This is used to implement __builtin_return_address for some machines.
164 See for instance the MIPS port. */
165 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
167 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
168 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
169 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
170 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
172 /* We make one copy of (const_int C) where C is in
173 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
174 to save space during the compilation and simplify comparisons of
175 integers. */
177 #define MAX_SAVED_CONST_INT 64
179 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
181 /* The ends of the doubly-linked chain of rtl for the current function.
182 Both are reset to null at the start of rtl generation for the function.
184 start_sequence saves both of these on `sequence_stack' along with
185 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
187 static rtx first_insn = NULL;
188 static rtx last_insn = NULL;
190 /* RTL_EXPR within which the current sequence will be placed. Use to
191 prevent reuse of any temporaries within the sequence until after the
192 RTL_EXPR is emitted. */
194 tree sequence_rtl_expr = NULL;
196 /* INSN_UID for next insn emitted.
197 Reset to 1 for each function compiled. */
199 static int cur_insn_uid = 1;
201 /* Line number and source file of the last line-number NOTE emitted.
202 This is used to avoid generating duplicates. */
204 static int last_linenum = 0;
205 static char *last_filename = 0;
207 /* A vector indexed by pseudo reg number. The allocated length
208 of this vector is regno_pointer_flag_length. Since this
209 vector is needed during the expansion phase when the total
210 number of registers in the function is not yet known,
211 it is copied and made bigger when necessary. */
213 char *regno_pointer_flag;
214 int regno_pointer_flag_length;
216 /* Indexed by pseudo register number, if nonzero gives the known alignment
217 for that pseudo (if regno_pointer_flag is set).
218 Allocated in parallel with regno_pointer_flag. */
219 char *regno_pointer_align;
221 /* Indexed by pseudo register number, gives the rtx for that pseudo.
222 Allocated in parallel with regno_pointer_flag. */
224 rtx *regno_reg_rtx;
226 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
227 Each element describes one pending sequence.
228 The main insn-chain is saved in the last element of the chain,
229 unless the chain is empty. */
231 struct sequence_stack *sequence_stack;
233 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
234 shortly thrown away. We use two mechanisms to prevent this waste:
236 First, we keep a list of the expressions used to represent the sequence
237 stack in sequence_element_free_list.
239 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
240 rtvec for use by gen_sequence. One entry for each size is sufficient
241 because most cases are calls to gen_sequence followed by immediately
242 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
243 destructive on the insn in it anyway and hence can't be redone.
245 We do not bother to save this cached data over nested function calls.
246 Instead, we just reinitialize them. */
248 #define SEQUENCE_RESULT_SIZE 5
250 static struct sequence_stack *sequence_element_free_list;
251 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
253 /* During RTL generation, we also keep a list of free INSN rtl codes. */
254 static rtx free_insn;
256 extern int rtx_equal_function_value_matters;
258 /* Filename and line number of last line-number note,
259 whether we actually emitted it or not. */
260 extern char *emit_filename;
261 extern int emit_lineno;
263 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
265 ** This routine generates an RTX of the size specified by
266 ** <code>, which is an RTX code. The RTX structure is initialized
267 ** from the arguments <element1> through <elementn>, which are
268 ** interpreted according to the specific RTX type's format. The
269 ** special machine mode associated with the rtx (if any) is specified
270 ** in <mode>.
272 ** gen_rtx can be invoked in a way which resembles the lisp-like
273 ** rtx it will generate. For example, the following rtx structure:
275 ** (plus:QI (mem:QI (reg:SI 1))
276 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
278 ** ...would be generated by the following C code:
280 ** gen_rtx (PLUS, QImode,
281 ** gen_rtx (MEM, QImode,
282 ** gen_rtx (REG, SImode, 1)),
283 ** gen_rtx (MEM, QImode,
284 ** gen_rtx (PLUS, SImode,
285 ** gen_rtx (REG, SImode, 2),
286 ** gen_rtx (REG, SImode, 3)))),
289 /*VARARGS2*/
291 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
293 #ifndef __STDC__
294 enum rtx_code code;
295 enum machine_mode mode;
296 #endif
297 va_list p;
298 register int i; /* Array indices... */
299 register char *fmt; /* Current rtx's format... */
300 register rtx rt_val; /* RTX to return to caller... */
302 VA_START (p, mode);
304 #ifndef __STDC__
305 code = va_arg (p, enum rtx_code);
306 mode = va_arg (p, enum machine_mode);
307 #endif
309 if (code == CONST_INT)
311 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
313 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
314 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
316 if (const_true_rtx && arg == STORE_FLAG_VALUE)
317 return const_true_rtx;
319 rt_val = rtx_alloc (code);
320 INTVAL (rt_val) = arg;
322 else if (code == REG)
324 int regno = va_arg (p, int);
326 /* In case the MD file explicitly references the frame pointer, have
327 all such references point to the same frame pointer. This is used
328 during frame pointer elimination to distinguish the explicit
329 references to these registers from pseudos that happened to be
330 assigned to them.
332 If we have eliminated the frame pointer or arg pointer, we will
333 be using it as a normal register, for example as a spill register.
334 In such cases, we might be accessing it in a mode that is not
335 Pmode and therefore cannot use the pre-allocated rtx.
337 Also don't do this when we are making new REGs in reload,
338 since we don't want to get confused with the real pointers. */
340 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
341 && ! reload_in_progress)
342 return frame_pointer_rtx;
343 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
344 if (hard_frame_pointer_rtx && regno == HARD_FRAME_POINTER_REGNUM
345 && mode == Pmode && ! reload_in_progress)
346 return hard_frame_pointer_rtx;
347 #endif
348 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
349 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
350 && ! reload_in_progress)
351 return arg_pointer_rtx;
352 #endif
353 #ifdef RETURN_ADDRESS_POINTER_REGNUM
354 if (return_address_pointer_rtx && regno == RETURN_ADDRESS_POINTER_REGNUM
355 && mode == Pmode && ! reload_in_progress)
356 return return_address_pointer_rtx;
357 #endif
358 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
359 && ! reload_in_progress)
360 return stack_pointer_rtx;
361 else
363 rt_val = rtx_alloc (code);
364 rt_val->mode = mode;
365 REGNO (rt_val) = regno;
366 return rt_val;
369 else
371 rt_val = rtx_alloc (code); /* Allocate the storage space. */
372 rt_val->mode = mode; /* Store the machine mode... */
374 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
375 for (i = 0; i < GET_RTX_LENGTH (code); i++)
377 switch (*fmt++)
379 case '0': /* Unused field. */
380 break;
382 case 'i': /* An integer? */
383 XINT (rt_val, i) = va_arg (p, int);
384 break;
386 case 'w': /* A wide integer? */
387 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
388 break;
390 case 's': /* A string? */
391 XSTR (rt_val, i) = va_arg (p, char *);
392 break;
394 case 'e': /* An expression? */
395 case 'u': /* An insn? Same except when printing. */
396 XEXP (rt_val, i) = va_arg (p, rtx);
397 break;
399 case 'E': /* An RTX vector? */
400 XVEC (rt_val, i) = va_arg (p, rtvec);
401 break;
403 default:
404 abort ();
408 va_end (p);
409 return rt_val; /* Return the new RTX... */
412 /* gen_rtvec (n, [rt1, ..., rtn])
414 ** This routine creates an rtvec and stores within it the
415 ** pointers to rtx's which are its arguments.
418 /*VARARGS1*/
419 rtvec
420 gen_rtvec VPROTO((int n, ...))
422 #ifndef __STDC__
423 int n;
424 #endif
425 int i;
426 va_list p;
427 rtx *vector;
429 VA_START (p, n);
431 #ifndef __STDC__
432 n = va_arg (p, int);
433 #endif
435 if (n == 0)
436 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
438 vector = (rtx *) alloca (n * sizeof (rtx));
440 for (i = 0; i < n; i++)
441 vector[i] = va_arg (p, rtx);
442 va_end (p);
444 return gen_rtvec_v (n, vector);
447 rtvec
448 gen_rtvec_v (n, argp)
449 int n;
450 rtx *argp;
452 register int i;
453 register rtvec rt_val;
455 if (n == 0)
456 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
458 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
460 for (i = 0; i < n; i++)
461 rt_val->elem[i].rtx = *argp++;
463 return rt_val;
466 rtvec
467 gen_rtvec_vv (n, argp)
468 int n;
469 rtunion *argp;
471 register int i;
472 register rtvec rt_val;
474 if (n == 0)
475 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
477 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
479 for (i = 0; i < n; i++)
480 rt_val->elem[i].rtx = (argp++)->rtx;
482 return rt_val;
485 /* Generate a REG rtx for a new pseudo register of mode MODE.
486 This pseudo is assigned the next sequential register number. */
489 gen_reg_rtx (mode)
490 enum machine_mode mode;
492 register rtx val;
494 /* Don't let anything called by or after reload create new registers
495 (actually, registers can't be created after flow, but this is a good
496 approximation). */
498 if (reload_in_progress || reload_completed)
499 abort ();
501 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
502 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
504 /* For complex modes, don't make a single pseudo.
505 Instead, make a CONCAT of two pseudos.
506 This allows noncontiguous allocation of the real and imaginary parts,
507 which makes much better code. Besides, allocating DCmode
508 pseudos overstrains reload on some machines like the 386. */
509 rtx realpart, imagpart;
510 int size = GET_MODE_UNIT_SIZE (mode);
511 enum machine_mode partmode
512 = mode_for_size (size * BITS_PER_UNIT,
513 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
514 ? MODE_FLOAT : MODE_INT),
517 realpart = gen_reg_rtx (partmode);
518 imagpart = gen_reg_rtx (partmode);
519 return gen_rtx (CONCAT, mode, realpart, imagpart);
522 /* Make sure regno_pointer_flag and regno_reg_rtx are large
523 enough to have an element for this pseudo reg number. */
525 if (reg_rtx_no == regno_pointer_flag_length)
527 rtx *new1;
528 char *new =
529 (char *) savealloc (regno_pointer_flag_length * 2);
530 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
531 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
532 regno_pointer_flag = new;
534 new = (char *) savealloc (regno_pointer_flag_length * 2);
535 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
536 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
537 regno_pointer_align = new;
539 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
540 bcopy ((char *) regno_reg_rtx, (char *) new1,
541 regno_pointer_flag_length * sizeof (rtx));
542 bzero ((char *) &new1[regno_pointer_flag_length],
543 regno_pointer_flag_length * sizeof (rtx));
544 regno_reg_rtx = new1;
546 regno_pointer_flag_length *= 2;
549 val = gen_rtx (REG, mode, reg_rtx_no);
550 regno_reg_rtx[reg_rtx_no++] = val;
551 return val;
554 /* Identify REG (which may be a CONCAT) as a user register. */
556 void
557 mark_user_reg (reg)
558 rtx reg;
560 if (GET_CODE (reg) == CONCAT)
562 REG_USERVAR_P (XEXP (reg, 0)) = 1;
563 REG_USERVAR_P (XEXP (reg, 1)) = 1;
565 else if (GET_CODE (reg) == REG)
566 REG_USERVAR_P (reg) = 1;
567 else
568 abort ();
571 /* Identify REG as a probable pointer register and show its alignment
572 as ALIGN, if nonzero. */
574 void
575 mark_reg_pointer (reg, align)
576 rtx reg;
577 int align;
579 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
581 if (align)
582 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
585 /* Return 1 plus largest pseudo reg number used in the current function. */
588 max_reg_num ()
590 return reg_rtx_no;
593 /* Return 1 + the largest label number used so far in the current function. */
596 max_label_num ()
598 if (last_label_num && label_num == base_label_num)
599 return last_label_num;
600 return label_num;
603 /* Return first label number used in this function (if any were used). */
606 get_first_label_num ()
608 return first_label_num;
611 /* Return a value representing some low-order bits of X, where the number
612 of low-order bits is given by MODE. Note that no conversion is done
613 between floating-point and fixed-point values, rather, the bit
614 representation is returned.
616 This function handles the cases in common between gen_lowpart, below,
617 and two variants in cse.c and combine.c. These are the cases that can
618 be safely handled at all points in the compilation.
620 If this is not a case we can handle, return 0. */
623 gen_lowpart_common (mode, x)
624 enum machine_mode mode;
625 register rtx x;
627 int word = 0;
629 if (GET_MODE (x) == mode)
630 return x;
632 /* MODE must occupy no more words than the mode of X. */
633 if (GET_MODE (x) != VOIDmode
634 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
635 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
636 / UNITS_PER_WORD)))
637 return 0;
639 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
640 word = ((GET_MODE_SIZE (GET_MODE (x))
641 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
642 / UNITS_PER_WORD);
644 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
645 && (GET_MODE_CLASS (mode) == MODE_INT
646 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
648 /* If we are getting the low-order part of something that has been
649 sign- or zero-extended, we can either just use the object being
650 extended or make a narrower extension. If we want an even smaller
651 piece than the size of the object being extended, call ourselves
652 recursively.
654 This case is used mostly by combine and cse. */
656 if (GET_MODE (XEXP (x, 0)) == mode)
657 return XEXP (x, 0);
658 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
659 return gen_lowpart_common (mode, XEXP (x, 0));
660 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
661 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
663 else if (GET_CODE (x) == SUBREG
664 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
665 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
666 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
667 ? SUBREG_REG (x)
668 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
669 else if (GET_CODE (x) == REG)
671 /* If the register is not valid for MODE, return 0. If we don't
672 do this, there is no way to fix up the resulting REG later.
673 But we do do this if the current REG is not valid for its
674 mode. This latter is a kludge, but is required due to the
675 way that parameters are passed on some machines, most
676 notably Sparc. */
677 if (REGNO (x) < FIRST_PSEUDO_REGISTER
678 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
679 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
680 return 0;
681 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
682 /* integrate.c can't handle parts of a return value register. */
683 && (! REG_FUNCTION_VALUE_P (x)
684 || ! rtx_equal_function_value_matters)
685 #ifdef CLASS_CANNOT_CHANGE_SIZE
686 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
687 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
688 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
689 && (TEST_HARD_REG_BIT
690 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
691 REGNO (x))))
692 #endif
693 /* We want to keep the stack, frame, and arg pointers
694 special. */
695 && x != frame_pointer_rtx
696 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
697 && x != arg_pointer_rtx
698 #endif
699 && x != stack_pointer_rtx)
700 return gen_rtx (REG, mode, REGNO (x) + word);
701 else
702 return gen_rtx (SUBREG, mode, x, word);
704 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
705 from the low-order part of the constant. */
706 else if ((GET_MODE_CLASS (mode) == MODE_INT
707 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
708 && GET_MODE (x) == VOIDmode
709 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
711 /* If MODE is twice the host word size, X is already the desired
712 representation. Otherwise, if MODE is wider than a word, we can't
713 do this. If MODE is exactly a word, return just one CONST_INT.
714 If MODE is smaller than a word, clear the bits that don't belong
715 in our mode, unless they and our sign bit are all one. So we get
716 either a reasonable negative value or a reasonable unsigned value
717 for this mode. */
719 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
720 return x;
721 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
722 return 0;
723 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
724 return (GET_CODE (x) == CONST_INT ? x
725 : GEN_INT (CONST_DOUBLE_LOW (x)));
726 else
728 /* MODE must be narrower than HOST_BITS_PER_INT. */
729 int width = GET_MODE_BITSIZE (mode);
730 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
731 : CONST_DOUBLE_LOW (x));
733 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
734 != ((HOST_WIDE_INT) (-1) << (width - 1))))
735 val &= ((HOST_WIDE_INT) 1 << width) - 1;
737 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
738 : GEN_INT (val));
742 /* If X is an integral constant but we want it in floating-point, it
743 must be the case that we have a union of an integer and a floating-point
744 value. If the machine-parameters allow it, simulate that union here
745 and return the result. The two-word and single-word cases are
746 different. */
748 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
749 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
750 || flag_pretend_float)
751 && GET_MODE_CLASS (mode) == MODE_FLOAT
752 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
753 && GET_CODE (x) == CONST_INT
754 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
755 #ifdef REAL_ARITHMETIC
757 REAL_VALUE_TYPE r;
758 HOST_WIDE_INT i;
760 i = INTVAL (x);
761 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
762 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
764 #else
766 union {HOST_WIDE_INT i; float d; } u;
768 u.i = INTVAL (x);
769 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
771 #endif
772 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
773 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
774 || flag_pretend_float)
775 && GET_MODE_CLASS (mode) == MODE_FLOAT
776 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
777 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
778 && GET_MODE (x) == VOIDmode
779 && (sizeof (double) * HOST_BITS_PER_CHAR
780 == 2 * HOST_BITS_PER_WIDE_INT))
781 #ifdef REAL_ARITHMETIC
783 REAL_VALUE_TYPE r;
784 HOST_WIDE_INT i[2];
785 HOST_WIDE_INT low, high;
787 if (GET_CODE (x) == CONST_INT)
788 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
789 else
790 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
792 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
793 target machine. */
794 if (WORDS_BIG_ENDIAN)
795 i[0] = high, i[1] = low;
796 else
797 i[0] = low, i[1] = high;
799 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
800 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
802 #else
804 union {HOST_WIDE_INT i[2]; double d; } u;
805 HOST_WIDE_INT low, high;
807 if (GET_CODE (x) == CONST_INT)
808 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
809 else
810 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
812 #ifdef HOST_WORDS_BIG_ENDIAN
813 u.i[0] = high, u.i[1] = low;
814 #else
815 u.i[0] = low, u.i[1] = high;
816 #endif
818 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
820 #endif
822 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
823 same as sizeof (double), such as the alpha. We only handle the
824 REAL_ARITHMETIC case, which is easy. Testing HOST_BITS_PER_WIDE_INT
825 is not strictly necessary, but is done to restrict this code to cases
826 where it is known to work. */
827 #ifdef REAL_ARITHMETIC
828 else if (mode == SFmode
829 && GET_CODE (x) == CONST_INT
830 && GET_MODE_BITSIZE (mode) * 2 == HOST_BITS_PER_WIDE_INT)
832 REAL_VALUE_TYPE r;
833 HOST_WIDE_INT i;
835 i = INTVAL (x);
836 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
837 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
839 #endif
841 /* Similarly, if this is converting a floating-point value into a
842 single-word integer. Only do this is the host and target parameters are
843 compatible. */
845 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
846 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
847 || flag_pretend_float)
848 && (GET_MODE_CLASS (mode) == MODE_INT
849 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
850 && GET_CODE (x) == CONST_DOUBLE
851 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
852 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
853 return operand_subword (x, word, 0, GET_MODE (x));
855 /* Similarly, if this is converting a floating-point value into a
856 two-word integer, we can do this one word at a time and make an
857 integer. Only do this is the host and target parameters are
858 compatible. */
860 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
861 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
862 || flag_pretend_float)
863 && (GET_MODE_CLASS (mode) == MODE_INT
864 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
865 && GET_CODE (x) == CONST_DOUBLE
866 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
867 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
869 rtx lowpart
870 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
871 rtx highpart
872 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
874 if (lowpart && GET_CODE (lowpart) == CONST_INT
875 && highpart && GET_CODE (highpart) == CONST_INT)
876 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
879 /* Otherwise, we can't do this. */
880 return 0;
883 /* Return the real part (which has mode MODE) of a complex value X.
884 This always comes at the low address in memory. */
887 gen_realpart (mode, x)
888 enum machine_mode mode;
889 register rtx x;
891 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
892 return XEXP (x, 0);
893 else if (WORDS_BIG_ENDIAN)
894 return gen_highpart (mode, x);
895 else
896 return gen_lowpart (mode, x);
899 /* Return the imaginary part (which has mode MODE) of a complex value X.
900 This always comes at the high address in memory. */
903 gen_imagpart (mode, x)
904 enum machine_mode mode;
905 register rtx x;
907 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
908 return XEXP (x, 1);
909 else if (WORDS_BIG_ENDIAN)
910 return gen_lowpart (mode, x);
911 else
912 return gen_highpart (mode, x);
915 /* Return 1 iff X, assumed to be a SUBREG,
916 refers to the real part of the complex value in its containing reg.
917 Complex values are always stored with the real part in the first word,
918 regardless of WORDS_BIG_ENDIAN. */
921 subreg_realpart_p (x)
922 rtx x;
924 if (GET_CODE (x) != SUBREG)
925 abort ();
927 return SUBREG_WORD (x) == 0;
930 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
931 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
932 least-significant part of X.
933 MODE specifies how big a part of X to return;
934 it usually should not be larger than a word.
935 If X is a MEM whose address is a QUEUED, the value may be so also. */
938 gen_lowpart (mode, x)
939 enum machine_mode mode;
940 register rtx x;
942 rtx result = gen_lowpart_common (mode, x);
944 if (result)
945 return result;
946 else if (GET_CODE (x) == REG)
948 /* Must be a hard reg that's not valid in MODE. */
949 result = gen_lowpart_common (mode, copy_to_reg (x));
950 if (result == 0)
951 abort ();
952 return result;
954 else if (GET_CODE (x) == MEM)
956 /* The only additional case we can do is MEM. */
957 register int offset = 0;
958 if (WORDS_BIG_ENDIAN)
959 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
960 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
962 if (BYTES_BIG_ENDIAN)
963 /* Adjust the address so that the address-after-the-data
964 is unchanged. */
965 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
966 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
968 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
970 else
971 abort ();
974 /* Like `gen_lowpart', but refer to the most significant part.
975 This is used to access the imaginary part of a complex number. */
978 gen_highpart (mode, x)
979 enum machine_mode mode;
980 register rtx x;
982 /* This case loses if X is a subreg. To catch bugs early,
983 complain if an invalid MODE is used even in other cases. */
984 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
985 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
986 abort ();
987 if (GET_CODE (x) == CONST_DOUBLE
988 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
989 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
990 #endif
992 return gen_rtx (CONST_INT, VOIDmode,
993 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
994 else if (GET_CODE (x) == CONST_INT)
995 return const0_rtx;
996 else if (GET_CODE (x) == MEM)
998 register int offset = 0;
999 if (! WORDS_BIG_ENDIAN)
1000 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1001 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1003 if (! BYTES_BIG_ENDIAN
1004 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1005 offset -= (GET_MODE_SIZE (mode)
1006 - MIN (UNITS_PER_WORD,
1007 GET_MODE_SIZE (GET_MODE (x))));
1009 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1011 else if (GET_CODE (x) == SUBREG)
1013 /* The only time this should occur is when we are looking at a
1014 multi-word item with a SUBREG whose mode is the same as that of the
1015 item. It isn't clear what we would do if it wasn't. */
1016 if (SUBREG_WORD (x) != 0)
1017 abort ();
1018 return gen_highpart (mode, SUBREG_REG (x));
1020 else if (GET_CODE (x) == REG)
1022 int word = 0;
1024 if (! WORDS_BIG_ENDIAN
1025 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
1026 word = ((GET_MODE_SIZE (GET_MODE (x))
1027 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1028 / UNITS_PER_WORD);
1031 * ??? This fails miserably for complex values being passed in registers
1032 * where the sizeof the real and imaginary part are not equal to the
1033 * sizeof SImode. FIXME
1036 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1037 /* integrate.c can't handle parts of a return value register. */
1038 && (! REG_FUNCTION_VALUE_P (x)
1039 || ! rtx_equal_function_value_matters)
1040 /* We want to keep the stack, frame, and arg pointers special. */
1041 && x != frame_pointer_rtx
1042 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1043 && x != arg_pointer_rtx
1044 #endif
1045 && x != stack_pointer_rtx)
1046 return gen_rtx (REG, mode, REGNO (x) + word);
1047 else
1048 return gen_rtx (SUBREG, mode, x, word);
1050 else
1051 abort ();
1054 /* Return 1 iff X, assumed to be a SUBREG,
1055 refers to the least significant part of its containing reg.
1056 If X is not a SUBREG, always return 1 (it is its own low part!). */
1059 subreg_lowpart_p (x)
1060 rtx x;
1062 if (GET_CODE (x) != SUBREG)
1063 return 1;
1064 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1065 return 0;
1067 if (WORDS_BIG_ENDIAN
1068 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1069 return (SUBREG_WORD (x)
1070 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1071 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1072 / UNITS_PER_WORD));
1074 return SUBREG_WORD (x) == 0;
1077 /* Return subword I of operand OP.
1078 The word number, I, is interpreted as the word number starting at the
1079 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1080 otherwise it is the high-order word.
1082 If we cannot extract the required word, we return zero. Otherwise, an
1083 rtx corresponding to the requested word will be returned.
1085 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1086 reload has completed, a valid address will always be returned. After
1087 reload, if a valid address cannot be returned, we return zero.
1089 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1090 it is the responsibility of the caller.
1092 MODE is the mode of OP in case it is a CONST_INT. */
1095 operand_subword (op, i, validate_address, mode)
1096 rtx op;
1097 int i;
1098 int validate_address;
1099 enum machine_mode mode;
1101 HOST_WIDE_INT val;
1102 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1104 if (mode == VOIDmode)
1105 mode = GET_MODE (op);
1107 if (mode == VOIDmode)
1108 abort ();
1110 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1111 if (mode != BLKmode
1112 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1113 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1114 return 0;
1116 /* If OP is already an integer word, return it. */
1117 if (GET_MODE_CLASS (mode) == MODE_INT
1118 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1119 return op;
1121 /* If OP is a REG or SUBREG, we can handle it very simply. */
1122 if (GET_CODE (op) == REG)
1124 /* If the register is not valid for MODE, return 0. If we don't
1125 do this, there is no way to fix up the resulting REG later. */
1126 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1127 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1128 return 0;
1129 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1130 || (REG_FUNCTION_VALUE_P (op)
1131 && rtx_equal_function_value_matters)
1132 /* We want to keep the stack, frame, and arg pointers
1133 special. */
1134 || op == frame_pointer_rtx
1135 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1136 || op == arg_pointer_rtx
1137 #endif
1138 || op == stack_pointer_rtx)
1139 return gen_rtx (SUBREG, word_mode, op, i);
1140 else
1141 return gen_rtx (REG, word_mode, REGNO (op) + i);
1143 else if (GET_CODE (op) == SUBREG)
1144 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1145 else if (GET_CODE (op) == CONCAT)
1147 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1148 if (i < partwords)
1149 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1150 return operand_subword (XEXP (op, 1), i - partwords,
1151 validate_address, mode);
1154 /* Form a new MEM at the requested address. */
1155 if (GET_CODE (op) == MEM)
1157 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1158 rtx new;
1160 if (validate_address)
1162 if (reload_completed)
1164 if (! strict_memory_address_p (word_mode, addr))
1165 return 0;
1167 else
1168 addr = memory_address (word_mode, addr);
1171 new = gen_rtx (MEM, word_mode, addr);
1173 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1174 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1175 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1177 return new;
1180 /* The only remaining cases are when OP is a constant. If the host and
1181 target floating formats are the same, handling two-word floating
1182 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1183 are defined as returning one or two 32 bit values, respectively,
1184 and not values of BITS_PER_WORD bits. */
1185 #ifdef REAL_ARITHMETIC
1186 /* The output is some bits, the width of the target machine's word.
1187 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1188 host can't. */
1189 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1190 && GET_MODE_CLASS (mode) == MODE_FLOAT
1191 && GET_MODE_BITSIZE (mode) == 64
1192 && GET_CODE (op) == CONST_DOUBLE)
1194 long k[2];
1195 REAL_VALUE_TYPE rv;
1197 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1198 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1200 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1201 which the words are written depends on the word endianness.
1203 ??? This is a potential portability problem and should
1204 be fixed at some point. */
1205 if (BITS_PER_WORD == 32)
1206 return GEN_INT ((HOST_WIDE_INT) k[i]);
1207 #if HOST_BITS_PER_WIDE_INT > 32
1208 else if (BITS_PER_WORD >= 64 && i == 0)
1209 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1210 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1211 #endif
1212 else if (BITS_PER_WORD == 16)
1214 long value;
1215 value = k[i >> 1];
1216 if ((i & 0x1) == 0)
1217 value >>= 16;
1218 value &= 0xffff;
1219 return GEN_INT ((HOST_WIDE_INT) value);
1221 else
1222 abort ();
1224 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1225 && GET_MODE_CLASS (mode) == MODE_FLOAT
1226 && GET_MODE_BITSIZE (mode) > 64
1227 && GET_CODE (op) == CONST_DOUBLE)
1229 long k[4];
1230 REAL_VALUE_TYPE rv;
1232 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1233 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1235 if (BITS_PER_WORD == 32)
1236 return GEN_INT ((HOST_WIDE_INT) k[i]);
1238 #else /* no REAL_ARITHMETIC */
1239 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1240 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1241 || flag_pretend_float)
1242 && GET_MODE_CLASS (mode) == MODE_FLOAT
1243 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1244 && GET_CODE (op) == CONST_DOUBLE)
1246 /* The constant is stored in the host's word-ordering,
1247 but we want to access it in the target's word-ordering. Some
1248 compilers don't like a conditional inside macro args, so we have two
1249 copies of the return. */
1250 #ifdef HOST_WORDS_BIG_ENDIAN
1251 return GEN_INT (i == WORDS_BIG_ENDIAN
1252 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1253 #else
1254 return GEN_INT (i != WORDS_BIG_ENDIAN
1255 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1256 #endif
1258 #endif /* no REAL_ARITHMETIC */
1260 /* Single word float is a little harder, since single- and double-word
1261 values often do not have the same high-order bits. We have already
1262 verified that we want the only defined word of the single-word value. */
1263 #ifdef REAL_ARITHMETIC
1264 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1265 && GET_MODE_BITSIZE (mode) == 32
1266 && GET_CODE (op) == CONST_DOUBLE)
1268 long l;
1269 REAL_VALUE_TYPE rv;
1271 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1272 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1273 return GEN_INT ((HOST_WIDE_INT) l);
1275 #else
1276 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1277 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1278 || flag_pretend_float)
1279 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1280 && GET_MODE_CLASS (mode) == MODE_FLOAT
1281 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1282 && GET_CODE (op) == CONST_DOUBLE)
1284 double d;
1285 union {float f; HOST_WIDE_INT i; } u;
1287 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1289 u.f = d;
1290 return GEN_INT (u.i);
1292 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1293 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1294 || flag_pretend_float)
1295 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1296 && GET_MODE_CLASS (mode) == MODE_FLOAT
1297 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1298 && GET_CODE (op) == CONST_DOUBLE)
1300 double d;
1301 union {double d; HOST_WIDE_INT i; } u;
1303 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1305 u.d = d;
1306 return GEN_INT (u.i);
1308 #endif /* no REAL_ARITHMETIC */
1310 /* The only remaining cases that we can handle are integers.
1311 Convert to proper endianness now since these cases need it.
1312 At this point, i == 0 means the low-order word.
1314 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1315 in general. However, if OP is (const_int 0), we can just return
1316 it for any word. */
1318 if (op == const0_rtx)
1319 return op;
1321 if (GET_MODE_CLASS (mode) != MODE_INT
1322 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1323 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1324 return 0;
1326 if (WORDS_BIG_ENDIAN)
1327 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1329 /* Find out which word on the host machine this value is in and get
1330 it from the constant. */
1331 val = (i / size_ratio == 0
1332 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1333 : (GET_CODE (op) == CONST_INT
1334 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1336 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1337 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1338 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1339 & (((HOST_WIDE_INT) 1
1340 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1342 return GEN_INT (val);
1345 /* Similar to `operand_subword', but never return 0. If we can't extract
1346 the required subword, put OP into a register and try again. If that fails,
1347 abort. We always validate the address in this case. It is not valid
1348 to call this function after reload; it is mostly meant for RTL
1349 generation.
1351 MODE is the mode of OP, in case it is CONST_INT. */
1354 operand_subword_force (op, i, mode)
1355 rtx op;
1356 int i;
1357 enum machine_mode mode;
1359 rtx result = operand_subword (op, i, 1, mode);
1361 if (result)
1362 return result;
1364 if (mode != BLKmode && mode != VOIDmode)
1365 op = force_reg (mode, op);
1367 result = operand_subword (op, i, 1, mode);
1368 if (result == 0)
1369 abort ();
1371 return result;
1374 /* Given a compare instruction, swap the operands.
1375 A test instruction is changed into a compare of 0 against the operand. */
1377 void
1378 reverse_comparison (insn)
1379 rtx insn;
1381 rtx body = PATTERN (insn);
1382 rtx comp;
1384 if (GET_CODE (body) == SET)
1385 comp = SET_SRC (body);
1386 else
1387 comp = SET_SRC (XVECEXP (body, 0, 0));
1389 if (GET_CODE (comp) == COMPARE)
1391 rtx op0 = XEXP (comp, 0);
1392 rtx op1 = XEXP (comp, 1);
1393 XEXP (comp, 0) = op1;
1394 XEXP (comp, 1) = op0;
1396 else
1398 rtx new = gen_rtx (COMPARE, VOIDmode,
1399 CONST0_RTX (GET_MODE (comp)), comp);
1400 if (GET_CODE (body) == SET)
1401 SET_SRC (body) = new;
1402 else
1403 SET_SRC (XVECEXP (body, 0, 0)) = new;
1407 /* Return a memory reference like MEMREF, but with its mode changed
1408 to MODE and its address changed to ADDR.
1409 (VOIDmode means don't change the mode.
1410 NULL for ADDR means don't change the address.) */
1413 change_address (memref, mode, addr)
1414 rtx memref;
1415 enum machine_mode mode;
1416 rtx addr;
1418 rtx new;
1420 if (GET_CODE (memref) != MEM)
1421 abort ();
1422 if (mode == VOIDmode)
1423 mode = GET_MODE (memref);
1424 if (addr == 0)
1425 addr = XEXP (memref, 0);
1427 /* If reload is in progress or has completed, ADDR must be valid.
1428 Otherwise, we can call memory_address to make it valid. */
1429 if (reload_completed || reload_in_progress)
1431 if (! memory_address_p (mode, addr))
1432 abort ();
1434 else
1435 addr = memory_address (mode, addr);
1437 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1438 return memref;
1440 new = gen_rtx (MEM, mode, addr);
1441 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1442 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1443 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1444 return new;
1447 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1450 gen_label_rtx ()
1452 register rtx label;
1454 label = (output_bytecode
1455 ? gen_rtx (CODE_LABEL, VOIDmode, NULL, bc_get_bytecode_label ())
1456 : gen_rtx (CODE_LABEL, VOIDmode, 0, NULL_RTX,
1457 NULL_RTX, label_num++, NULL_PTR));
1459 LABEL_NUSES (label) = 0;
1460 return label;
1463 /* For procedure integration. */
1465 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1466 from a permanent obstack when the opportunity arises. */
1469 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1470 last_labelno, max_parm_regnum, max_regnum, args_size,
1471 pops_args, stack_slots, forced_labels, function_flags,
1472 outgoing_args_size, original_arg_vector,
1473 original_decl_initial, regno_rtx, regno_flag,
1474 regno_align)
1475 rtx first_insn, first_parm_insn;
1476 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1477 int pops_args;
1478 rtx stack_slots;
1479 rtx forced_labels;
1480 int function_flags;
1481 int outgoing_args_size;
1482 rtvec original_arg_vector;
1483 rtx original_decl_initial;
1484 rtvec regno_rtx;
1485 char *regno_flag;
1486 char *regno_align;
1488 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1489 cur_insn_uid++, NULL_RTX,
1490 first_insn, first_parm_insn,
1491 first_labelno, last_labelno,
1492 max_parm_regnum, max_regnum, args_size, pops_args,
1493 stack_slots, forced_labels, function_flags,
1494 outgoing_args_size, original_arg_vector,
1495 original_decl_initial,
1496 regno_rtx, regno_flag, regno_align);
1497 return header;
1500 /* Install new pointers to the first and last insns in the chain.
1501 Also, set cur_insn_uid to one higher than the last in use.
1502 Used for an inline-procedure after copying the insn chain. */
1504 void
1505 set_new_first_and_last_insn (first, last)
1506 rtx first, last;
1508 rtx insn;
1510 first_insn = first;
1511 last_insn = last;
1512 cur_insn_uid = 0;
1514 for (insn = first; insn; insn = NEXT_INSN (insn))
1515 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1517 cur_insn_uid++;
1520 /* Set the range of label numbers found in the current function.
1521 This is used when belatedly compiling an inline function. */
1523 void
1524 set_new_first_and_last_label_num (first, last)
1525 int first, last;
1527 base_label_num = label_num;
1528 first_label_num = first;
1529 last_label_num = last;
1532 /* Save all variables describing the current status into the structure *P.
1533 This is used before starting a nested function. */
1535 void
1536 save_emit_status (p)
1537 struct function *p;
1539 p->reg_rtx_no = reg_rtx_no;
1540 p->first_label_num = first_label_num;
1541 p->first_insn = first_insn;
1542 p->last_insn = last_insn;
1543 p->sequence_rtl_expr = sequence_rtl_expr;
1544 p->sequence_stack = sequence_stack;
1545 p->cur_insn_uid = cur_insn_uid;
1546 p->last_linenum = last_linenum;
1547 p->last_filename = last_filename;
1548 p->regno_pointer_flag = regno_pointer_flag;
1549 p->regno_pointer_align = regno_pointer_align;
1550 p->regno_pointer_flag_length = regno_pointer_flag_length;
1551 p->regno_reg_rtx = regno_reg_rtx;
1554 /* Restore all variables describing the current status from the structure *P.
1555 This is used after a nested function. */
1557 void
1558 restore_emit_status (p)
1559 struct function *p;
1561 int i;
1563 reg_rtx_no = p->reg_rtx_no;
1564 first_label_num = p->first_label_num;
1565 last_label_num = 0;
1566 first_insn = p->first_insn;
1567 last_insn = p->last_insn;
1568 sequence_rtl_expr = p->sequence_rtl_expr;
1569 sequence_stack = p->sequence_stack;
1570 cur_insn_uid = p->cur_insn_uid;
1571 last_linenum = p->last_linenum;
1572 last_filename = p->last_filename;
1573 regno_pointer_flag = p->regno_pointer_flag;
1574 regno_pointer_align = p->regno_pointer_align;
1575 regno_pointer_flag_length = p->regno_pointer_flag_length;
1576 regno_reg_rtx = p->regno_reg_rtx;
1578 /* Clear our cache of rtx expressions for start_sequence and
1579 gen_sequence. */
1580 sequence_element_free_list = 0;
1581 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1582 sequence_result[i] = 0;
1584 free_insn = 0;
1587 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1588 It does not work to do this twice, because the mark bits set here
1589 are not cleared afterwards. */
1591 void
1592 unshare_all_rtl (insn)
1593 register rtx insn;
1595 for (; insn; insn = NEXT_INSN (insn))
1596 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1597 || GET_CODE (insn) == CALL_INSN)
1599 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1600 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1601 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1604 /* Make sure the addresses of stack slots found outside the insn chain
1605 (such as, in DECL_RTL of a variable) are not shared
1606 with the insn chain.
1608 This special care is necessary when the stack slot MEM does not
1609 actually appear in the insn chain. If it does appear, its address
1610 is unshared from all else at that point. */
1612 copy_rtx_if_shared (stack_slot_list);
1615 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1616 Recursively does the same for subexpressions. */
1619 copy_rtx_if_shared (orig)
1620 rtx orig;
1622 register rtx x = orig;
1623 register int i;
1624 register enum rtx_code code;
1625 register char *format_ptr;
1626 int copied = 0;
1628 if (x == 0)
1629 return 0;
1631 code = GET_CODE (x);
1633 /* These types may be freely shared. */
1635 switch (code)
1637 case REG:
1638 case QUEUED:
1639 case CONST_INT:
1640 case CONST_DOUBLE:
1641 case SYMBOL_REF:
1642 case CODE_LABEL:
1643 case PC:
1644 case CC0:
1645 case SCRATCH:
1646 /* SCRATCH must be shared because they represent distinct values. */
1647 return x;
1649 case CONST:
1650 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1651 a LABEL_REF, it isn't sharable. */
1652 if (GET_CODE (XEXP (x, 0)) == PLUS
1653 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1654 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1655 return x;
1656 break;
1658 case INSN:
1659 case JUMP_INSN:
1660 case CALL_INSN:
1661 case NOTE:
1662 case BARRIER:
1663 /* The chain of insns is not being copied. */
1664 return x;
1666 case MEM:
1667 /* A MEM is allowed to be shared if its address is constant
1668 or is a constant plus one of the special registers. */
1669 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1670 || XEXP (x, 0) == virtual_stack_vars_rtx
1671 || XEXP (x, 0) == virtual_incoming_args_rtx)
1672 return x;
1674 if (GET_CODE (XEXP (x, 0)) == PLUS
1675 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1676 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1677 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1679 /* This MEM can appear in more than one place,
1680 but its address better not be shared with anything else. */
1681 if (! x->used)
1682 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1683 x->used = 1;
1684 return x;
1688 /* This rtx may not be shared. If it has already been seen,
1689 replace it with a copy of itself. */
1691 if (x->used)
1693 register rtx copy;
1695 copy = rtx_alloc (code);
1696 bcopy ((char *) x, (char *) copy,
1697 (sizeof (*copy) - sizeof (copy->fld)
1698 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1699 x = copy;
1700 copied = 1;
1702 x->used = 1;
1704 /* Now scan the subexpressions recursively.
1705 We can store any replaced subexpressions directly into X
1706 since we know X is not shared! Any vectors in X
1707 must be copied if X was copied. */
1709 format_ptr = GET_RTX_FORMAT (code);
1711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1713 switch (*format_ptr++)
1715 case 'e':
1716 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1717 break;
1719 case 'E':
1720 if (XVEC (x, i) != NULL)
1722 register int j;
1723 int len = XVECLEN (x, i);
1725 if (copied && len > 0)
1726 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1727 for (j = 0; j < len; j++)
1728 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1730 break;
1733 return x;
1736 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1737 to look for shared sub-parts. */
1739 void
1740 reset_used_flags (x)
1741 rtx x;
1743 register int i, j;
1744 register enum rtx_code code;
1745 register char *format_ptr;
1747 if (x == 0)
1748 return;
1750 code = GET_CODE (x);
1752 /* These types may be freely shared so we needn't do any resetting
1753 for them. */
1755 switch (code)
1757 case REG:
1758 case QUEUED:
1759 case CONST_INT:
1760 case CONST_DOUBLE:
1761 case SYMBOL_REF:
1762 case CODE_LABEL:
1763 case PC:
1764 case CC0:
1765 return;
1767 case INSN:
1768 case JUMP_INSN:
1769 case CALL_INSN:
1770 case NOTE:
1771 case LABEL_REF:
1772 case BARRIER:
1773 /* The chain of insns is not being copied. */
1774 return;
1777 x->used = 0;
1779 format_ptr = GET_RTX_FORMAT (code);
1780 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1782 switch (*format_ptr++)
1784 case 'e':
1785 reset_used_flags (XEXP (x, i));
1786 break;
1788 case 'E':
1789 for (j = 0; j < XVECLEN (x, i); j++)
1790 reset_used_flags (XVECEXP (x, i, j));
1791 break;
1796 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1797 Return X or the rtx for the pseudo reg the value of X was copied into.
1798 OTHER must be valid as a SET_DEST. */
1801 make_safe_from (x, other)
1802 rtx x, other;
1804 while (1)
1805 switch (GET_CODE (other))
1807 case SUBREG:
1808 other = SUBREG_REG (other);
1809 break;
1810 case STRICT_LOW_PART:
1811 case SIGN_EXTEND:
1812 case ZERO_EXTEND:
1813 other = XEXP (other, 0);
1814 break;
1815 default:
1816 goto done;
1818 done:
1819 if ((GET_CODE (other) == MEM
1820 && ! CONSTANT_P (x)
1821 && GET_CODE (x) != REG
1822 && GET_CODE (x) != SUBREG)
1823 || (GET_CODE (other) == REG
1824 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1825 || reg_mentioned_p (other, x))))
1827 rtx temp = gen_reg_rtx (GET_MODE (x));
1828 emit_move_insn (temp, x);
1829 return temp;
1831 return x;
1834 /* Emission of insns (adding them to the doubly-linked list). */
1836 /* Return the first insn of the current sequence or current function. */
1839 get_insns ()
1841 return first_insn;
1844 /* Return the last insn emitted in current sequence or current function. */
1847 get_last_insn ()
1849 return last_insn;
1852 /* Specify a new insn as the last in the chain. */
1854 void
1855 set_last_insn (insn)
1856 rtx insn;
1858 if (NEXT_INSN (insn) != 0)
1859 abort ();
1860 last_insn = insn;
1863 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1866 get_last_insn_anywhere ()
1868 struct sequence_stack *stack;
1869 if (last_insn)
1870 return last_insn;
1871 for (stack = sequence_stack; stack; stack = stack->next)
1872 if (stack->last != 0)
1873 return stack->last;
1874 return 0;
1877 /* Return a number larger than any instruction's uid in this function. */
1880 get_max_uid ()
1882 return cur_insn_uid;
1885 /* Return the next insn. If it is a SEQUENCE, return the first insn
1886 of the sequence. */
1889 next_insn (insn)
1890 rtx insn;
1892 if (insn)
1894 insn = NEXT_INSN (insn);
1895 if (insn && GET_CODE (insn) == INSN
1896 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1897 insn = XVECEXP (PATTERN (insn), 0, 0);
1900 return insn;
1903 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1904 of the sequence. */
1907 previous_insn (insn)
1908 rtx insn;
1910 if (insn)
1912 insn = PREV_INSN (insn);
1913 if (insn && GET_CODE (insn) == INSN
1914 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1915 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1918 return insn;
1921 /* Return the next insn after INSN that is not a NOTE. This routine does not
1922 look inside SEQUENCEs. */
1925 next_nonnote_insn (insn)
1926 rtx insn;
1928 while (insn)
1930 insn = NEXT_INSN (insn);
1931 if (insn == 0 || GET_CODE (insn) != NOTE)
1932 break;
1935 return insn;
1938 /* Return the previous insn before INSN that is not a NOTE. This routine does
1939 not look inside SEQUENCEs. */
1942 prev_nonnote_insn (insn)
1943 rtx insn;
1945 while (insn)
1947 insn = PREV_INSN (insn);
1948 if (insn == 0 || GET_CODE (insn) != NOTE)
1949 break;
1952 return insn;
1955 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1956 or 0, if there is none. This routine does not look inside
1957 SEQUENCEs. */
1960 next_real_insn (insn)
1961 rtx insn;
1963 while (insn)
1965 insn = NEXT_INSN (insn);
1966 if (insn == 0 || GET_CODE (insn) == INSN
1967 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1968 break;
1971 return insn;
1974 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1975 or 0, if there is none. This routine does not look inside
1976 SEQUENCEs. */
1979 prev_real_insn (insn)
1980 rtx insn;
1982 while (insn)
1984 insn = PREV_INSN (insn);
1985 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1986 || GET_CODE (insn) == JUMP_INSN)
1987 break;
1990 return insn;
1993 /* Find the next insn after INSN that really does something. This routine
1994 does not look inside SEQUENCEs. Until reload has completed, this is the
1995 same as next_real_insn. */
1998 next_active_insn (insn)
1999 rtx insn;
2001 while (insn)
2003 insn = NEXT_INSN (insn);
2004 if (insn == 0
2005 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2006 || (GET_CODE (insn) == INSN
2007 && (! reload_completed
2008 || (GET_CODE (PATTERN (insn)) != USE
2009 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2010 break;
2013 return insn;
2016 /* Find the last insn before INSN that really does something. This routine
2017 does not look inside SEQUENCEs. Until reload has completed, this is the
2018 same as prev_real_insn. */
2021 prev_active_insn (insn)
2022 rtx insn;
2024 while (insn)
2026 insn = PREV_INSN (insn);
2027 if (insn == 0
2028 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2029 || (GET_CODE (insn) == INSN
2030 && (! reload_completed
2031 || (GET_CODE (PATTERN (insn)) != USE
2032 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2033 break;
2036 return insn;
2039 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2042 next_label (insn)
2043 rtx insn;
2045 while (insn)
2047 insn = NEXT_INSN (insn);
2048 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2049 break;
2052 return insn;
2055 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2058 prev_label (insn)
2059 rtx insn;
2061 while (insn)
2063 insn = PREV_INSN (insn);
2064 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2065 break;
2068 return insn;
2071 #ifdef HAVE_cc0
2072 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2073 and REG_CC_USER notes so we can find it. */
2075 void
2076 link_cc0_insns (insn)
2077 rtx insn;
2079 rtx user = next_nonnote_insn (insn);
2081 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2082 user = XVECEXP (PATTERN (user), 0, 0);
2084 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
2085 REG_NOTES (user));
2086 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
2089 /* Return the next insn that uses CC0 after INSN, which is assumed to
2090 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2091 applied to the result of this function should yield INSN).
2093 Normally, this is simply the next insn. However, if a REG_CC_USER note
2094 is present, it contains the insn that uses CC0.
2096 Return 0 if we can't find the insn. */
2099 next_cc0_user (insn)
2100 rtx insn;
2102 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2104 if (note)
2105 return XEXP (note, 0);
2107 insn = next_nonnote_insn (insn);
2108 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2109 insn = XVECEXP (PATTERN (insn), 0, 0);
2111 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2112 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2113 return insn;
2115 return 0;
2118 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2119 note, it is the previous insn. */
2122 prev_cc0_setter (insn)
2123 rtx insn;
2125 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2126 rtx link;
2128 if (note)
2129 return XEXP (note, 0);
2131 insn = prev_nonnote_insn (insn);
2132 if (! sets_cc0_p (PATTERN (insn)))
2133 abort ();
2135 return insn;
2137 #endif
2139 /* Try splitting insns that can be split for better scheduling.
2140 PAT is the pattern which might split.
2141 TRIAL is the insn providing PAT.
2142 LAST is non-zero if we should return the last insn of the sequence produced.
2144 If this routine succeeds in splitting, it returns the first or last
2145 replacement insn depending on the value of LAST. Otherwise, it
2146 returns TRIAL. If the insn to be returned can be split, it will be. */
2149 try_split (pat, trial, last)
2150 rtx pat, trial;
2151 int last;
2153 rtx before = PREV_INSN (trial);
2154 rtx after = NEXT_INSN (trial);
2155 rtx seq = split_insns (pat, trial);
2156 int has_barrier = 0;
2157 rtx tem;
2159 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2160 We may need to handle this specially. */
2161 if (after && GET_CODE (after) == BARRIER)
2163 has_barrier = 1;
2164 after = NEXT_INSN (after);
2167 if (seq)
2169 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2170 The latter case will normally arise only when being done so that
2171 it, in turn, will be split (SFmode on the 29k is an example). */
2172 if (GET_CODE (seq) == SEQUENCE)
2174 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2175 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2176 increment the usage count so we don't delete the label. */
2177 int i;
2179 if (GET_CODE (trial) == JUMP_INSN)
2180 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2181 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2183 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2185 if (JUMP_LABEL (trial))
2186 LABEL_NUSES (JUMP_LABEL (trial))++;
2189 tem = emit_insn_after (seq, before);
2191 delete_insn (trial);
2192 if (has_barrier)
2193 emit_barrier_after (tem);
2195 /* Recursively call try_split for each new insn created; by the
2196 time control returns here that insn will be fully split, so
2197 set LAST and continue from the insn after the one returned.
2198 We can't use next_active_insn here since AFTER may be a note.
2199 Ignore deleted insns, which can be occur if not optimizing. */
2200 for (tem = NEXT_INSN (before); tem != after;
2201 tem = NEXT_INSN (tem))
2202 if (! INSN_DELETED_P (tem))
2203 tem = try_split (PATTERN (tem), tem, 1);
2205 /* Avoid infinite loop if the result matches the original pattern. */
2206 else if (rtx_equal_p (seq, pat))
2207 return trial;
2208 else
2210 PATTERN (trial) = seq;
2211 INSN_CODE (trial) = -1;
2212 try_split (seq, trial, last);
2215 /* Return either the first or the last insn, depending on which was
2216 requested. */
2217 return last ? prev_active_insn (after) : next_active_insn (before);
2220 return trial;
2223 /* Make and return an INSN rtx, initializing all its slots.
2224 Store PATTERN in the pattern slots. */
2227 make_insn_raw (pattern)
2228 rtx pattern;
2230 register rtx insn;
2232 /* If in RTL generation phase, see if FREE_INSN can be used. */
2233 if (free_insn != 0 && rtx_equal_function_value_matters)
2235 insn = free_insn;
2236 free_insn = NEXT_INSN (free_insn);
2237 PUT_CODE (insn, INSN);
2239 else
2240 insn = rtx_alloc (INSN);
2242 INSN_UID (insn) = cur_insn_uid++;
2243 PATTERN (insn) = pattern;
2244 INSN_CODE (insn) = -1;
2245 LOG_LINKS (insn) = NULL;
2246 REG_NOTES (insn) = NULL;
2248 return insn;
2251 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2253 static rtx
2254 make_jump_insn_raw (pattern)
2255 rtx pattern;
2257 register rtx insn;
2259 insn = rtx_alloc (JUMP_INSN);
2260 INSN_UID (insn) = cur_insn_uid++;
2262 PATTERN (insn) = pattern;
2263 INSN_CODE (insn) = -1;
2264 LOG_LINKS (insn) = NULL;
2265 REG_NOTES (insn) = NULL;
2266 JUMP_LABEL (insn) = NULL;
2268 return insn;
2271 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2273 static rtx
2274 make_call_insn_raw (pattern)
2275 rtx pattern;
2277 register rtx insn;
2279 insn = rtx_alloc (CALL_INSN);
2280 INSN_UID (insn) = cur_insn_uid++;
2282 PATTERN (insn) = pattern;
2283 INSN_CODE (insn) = -1;
2284 LOG_LINKS (insn) = NULL;
2285 REG_NOTES (insn) = NULL;
2286 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2288 return insn;
2291 /* Add INSN to the end of the doubly-linked list.
2292 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2294 void
2295 add_insn (insn)
2296 register rtx insn;
2298 PREV_INSN (insn) = last_insn;
2299 NEXT_INSN (insn) = 0;
2301 if (NULL != last_insn)
2302 NEXT_INSN (last_insn) = insn;
2304 if (NULL == first_insn)
2305 first_insn = insn;
2307 last_insn = insn;
2310 /* Add INSN into the doubly-linked list after insn AFTER. This and
2311 the next should be the only functions called to insert an insn once
2312 delay slots have been filled since only they know how to update a
2313 SEQUENCE. */
2315 void
2316 add_insn_after (insn, after)
2317 rtx insn, after;
2319 rtx next = NEXT_INSN (after);
2321 if (optimize && INSN_DELETED_P (after))
2322 abort ();
2324 NEXT_INSN (insn) = next;
2325 PREV_INSN (insn) = after;
2327 if (next)
2329 PREV_INSN (next) = insn;
2330 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2331 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2333 else if (last_insn == after)
2334 last_insn = insn;
2335 else
2337 struct sequence_stack *stack = sequence_stack;
2338 /* Scan all pending sequences too. */
2339 for (; stack; stack = stack->next)
2340 if (after == stack->last)
2342 stack->last = insn;
2343 break;
2346 if (stack == 0)
2347 abort ();
2350 NEXT_INSN (after) = insn;
2351 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2353 rtx sequence = PATTERN (after);
2354 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2358 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2359 the previous should be the only functions called to insert an insn once
2360 delay slots have been filled since only they know how to update a
2361 SEQUENCE. */
2363 void
2364 add_insn_before (insn, before)
2365 rtx insn, before;
2367 rtx prev = PREV_INSN (before);
2369 if (optimize && INSN_DELETED_P (before))
2370 abort ();
2372 PREV_INSN (insn) = prev;
2373 NEXT_INSN (insn) = before;
2375 if (prev)
2377 NEXT_INSN (prev) = insn;
2378 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2380 rtx sequence = PATTERN (prev);
2381 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2384 else if (first_insn == before)
2385 first_insn = insn;
2386 else
2388 struct sequence_stack *stack = sequence_stack;
2389 /* Scan all pending sequences too. */
2390 for (; stack; stack = stack->next)
2391 if (before == stack->first)
2393 stack->first = insn;
2394 break;
2397 if (stack == 0)
2398 abort ();
2401 PREV_INSN (before) = insn;
2402 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2403 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2406 /* Delete all insns made since FROM.
2407 FROM becomes the new last instruction. */
2409 void
2410 delete_insns_since (from)
2411 rtx from;
2413 if (from == 0)
2414 first_insn = 0;
2415 else
2416 NEXT_INSN (from) = 0;
2417 last_insn = from;
2420 /* This function is deprecated, please use sequences instead.
2422 Move a consecutive bunch of insns to a different place in the chain.
2423 The insns to be moved are those between FROM and TO.
2424 They are moved to a new position after the insn AFTER.
2425 AFTER must not be FROM or TO or any insn in between.
2427 This function does not know about SEQUENCEs and hence should not be
2428 called after delay-slot filling has been done. */
2430 void
2431 reorder_insns (from, to, after)
2432 rtx from, to, after;
2434 /* Splice this bunch out of where it is now. */
2435 if (PREV_INSN (from))
2436 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2437 if (NEXT_INSN (to))
2438 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2439 if (last_insn == to)
2440 last_insn = PREV_INSN (from);
2441 if (first_insn == from)
2442 first_insn = NEXT_INSN (to);
2444 /* Make the new neighbors point to it and it to them. */
2445 if (NEXT_INSN (after))
2446 PREV_INSN (NEXT_INSN (after)) = to;
2448 NEXT_INSN (to) = NEXT_INSN (after);
2449 PREV_INSN (from) = after;
2450 NEXT_INSN (after) = from;
2451 if (after == last_insn)
2452 last_insn = to;
2455 /* Return the line note insn preceding INSN. */
2457 static rtx
2458 find_line_note (insn)
2459 rtx insn;
2461 if (no_line_numbers)
2462 return 0;
2464 for (; insn; insn = PREV_INSN (insn))
2465 if (GET_CODE (insn) == NOTE
2466 && NOTE_LINE_NUMBER (insn) >= 0)
2467 break;
2469 return insn;
2472 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2473 of the moved insns when debugging. This may insert a note between AFTER
2474 and FROM, and another one after TO. */
2476 void
2477 reorder_insns_with_line_notes (from, to, after)
2478 rtx from, to, after;
2480 rtx from_line = find_line_note (from);
2481 rtx after_line = find_line_note (after);
2483 reorder_insns (from, to, after);
2485 if (from_line == after_line)
2486 return;
2488 if (from_line)
2489 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2490 NOTE_LINE_NUMBER (from_line),
2491 after);
2492 if (after_line)
2493 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2494 NOTE_LINE_NUMBER (after_line),
2495 to);
2498 /* Emit an insn of given code and pattern
2499 at a specified place within the doubly-linked list. */
2501 /* Make an instruction with body PATTERN
2502 and output it before the instruction BEFORE. */
2505 emit_insn_before (pattern, before)
2506 register rtx pattern, before;
2508 register rtx insn = before;
2510 if (GET_CODE (pattern) == SEQUENCE)
2512 register int i;
2514 for (i = 0; i < XVECLEN (pattern, 0); i++)
2516 insn = XVECEXP (pattern, 0, i);
2517 add_insn_before (insn, before);
2519 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2520 sequence_result[XVECLEN (pattern, 0)] = pattern;
2522 else
2524 insn = make_insn_raw (pattern);
2525 add_insn_before (insn, before);
2528 return insn;
2531 /* Make an instruction with body PATTERN and code JUMP_INSN
2532 and output it before the instruction BEFORE. */
2535 emit_jump_insn_before (pattern, before)
2536 register rtx pattern, before;
2538 register rtx insn;
2540 if (GET_CODE (pattern) == SEQUENCE)
2541 insn = emit_insn_before (pattern, before);
2542 else
2544 insn = make_jump_insn_raw (pattern);
2545 add_insn_before (insn, before);
2548 return insn;
2551 /* Make an instruction with body PATTERN and code CALL_INSN
2552 and output it before the instruction BEFORE. */
2555 emit_call_insn_before (pattern, before)
2556 register rtx pattern, before;
2558 register rtx insn;
2560 if (GET_CODE (pattern) == SEQUENCE)
2561 insn = emit_insn_before (pattern, before);
2562 else
2564 insn = make_call_insn_raw (pattern);
2565 add_insn_before (insn, before);
2566 PUT_CODE (insn, CALL_INSN);
2569 return insn;
2572 /* Make an insn of code BARRIER
2573 and output it before the insn AFTER. */
2576 emit_barrier_before (before)
2577 register rtx before;
2579 register rtx insn = rtx_alloc (BARRIER);
2581 INSN_UID (insn) = cur_insn_uid++;
2583 add_insn_before (insn, before);
2584 return insn;
2587 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2590 emit_note_before (subtype, before)
2591 int subtype;
2592 rtx before;
2594 register rtx note = rtx_alloc (NOTE);
2595 INSN_UID (note) = cur_insn_uid++;
2596 NOTE_SOURCE_FILE (note) = 0;
2597 NOTE_LINE_NUMBER (note) = subtype;
2599 add_insn_before (note, before);
2600 return note;
2603 /* Make an insn of code INSN with body PATTERN
2604 and output it after the insn AFTER. */
2607 emit_insn_after (pattern, after)
2608 register rtx pattern, after;
2610 register rtx insn = after;
2612 if (GET_CODE (pattern) == SEQUENCE)
2614 register int i;
2616 for (i = 0; i < XVECLEN (pattern, 0); i++)
2618 insn = XVECEXP (pattern, 0, i);
2619 add_insn_after (insn, after);
2620 after = insn;
2622 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2623 sequence_result[XVECLEN (pattern, 0)] = pattern;
2625 else
2627 insn = make_insn_raw (pattern);
2628 add_insn_after (insn, after);
2631 return insn;
2634 /* Similar to emit_insn_after, except that line notes are to be inserted so
2635 as to act as if this insn were at FROM. */
2637 void
2638 emit_insn_after_with_line_notes (pattern, after, from)
2639 rtx pattern, after, from;
2641 rtx from_line = find_line_note (from);
2642 rtx after_line = find_line_note (after);
2643 rtx insn = emit_insn_after (pattern, after);
2645 if (from_line)
2646 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2647 NOTE_LINE_NUMBER (from_line),
2648 after);
2650 if (after_line)
2651 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2652 NOTE_LINE_NUMBER (after_line),
2653 insn);
2656 /* Make an insn of code JUMP_INSN with body PATTERN
2657 and output it after the insn AFTER. */
2660 emit_jump_insn_after (pattern, after)
2661 register rtx pattern, after;
2663 register rtx insn;
2665 if (GET_CODE (pattern) == SEQUENCE)
2666 insn = emit_insn_after (pattern, after);
2667 else
2669 insn = make_jump_insn_raw (pattern);
2670 add_insn_after (insn, after);
2673 return insn;
2676 /* Make an insn of code BARRIER
2677 and output it after the insn AFTER. */
2680 emit_barrier_after (after)
2681 register rtx after;
2683 register rtx insn = rtx_alloc (BARRIER);
2685 INSN_UID (insn) = cur_insn_uid++;
2687 add_insn_after (insn, after);
2688 return insn;
2691 /* Emit the label LABEL after the insn AFTER. */
2694 emit_label_after (label, after)
2695 rtx label, after;
2697 /* This can be called twice for the same label
2698 as a result of the confusion that follows a syntax error!
2699 So make it harmless. */
2700 if (INSN_UID (label) == 0)
2702 INSN_UID (label) = cur_insn_uid++;
2703 add_insn_after (label, after);
2706 return label;
2709 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2712 emit_note_after (subtype, after)
2713 int subtype;
2714 rtx after;
2716 register rtx note = rtx_alloc (NOTE);
2717 INSN_UID (note) = cur_insn_uid++;
2718 NOTE_SOURCE_FILE (note) = 0;
2719 NOTE_LINE_NUMBER (note) = subtype;
2720 add_insn_after (note, after);
2721 return note;
2724 /* Emit a line note for FILE and LINE after the insn AFTER. */
2727 emit_line_note_after (file, line, after)
2728 char *file;
2729 int line;
2730 rtx after;
2732 register rtx note;
2734 if (no_line_numbers && line > 0)
2736 cur_insn_uid++;
2737 return 0;
2740 note = rtx_alloc (NOTE);
2741 INSN_UID (note) = cur_insn_uid++;
2742 NOTE_SOURCE_FILE (note) = file;
2743 NOTE_LINE_NUMBER (note) = line;
2744 add_insn_after (note, after);
2745 return note;
2748 /* Make an insn of code INSN with pattern PATTERN
2749 and add it to the end of the doubly-linked list.
2750 If PATTERN is a SEQUENCE, take the elements of it
2751 and emit an insn for each element.
2753 Returns the last insn emitted. */
2756 emit_insn (pattern)
2757 rtx pattern;
2759 rtx insn = last_insn;
2761 if (GET_CODE (pattern) == SEQUENCE)
2763 register int i;
2765 for (i = 0; i < XVECLEN (pattern, 0); i++)
2767 insn = XVECEXP (pattern, 0, i);
2768 add_insn (insn);
2770 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2771 sequence_result[XVECLEN (pattern, 0)] = pattern;
2773 else
2775 insn = make_insn_raw (pattern);
2776 add_insn (insn);
2779 return insn;
2782 /* Emit the insns in a chain starting with INSN.
2783 Return the last insn emitted. */
2786 emit_insns (insn)
2787 rtx insn;
2789 rtx last = 0;
2791 while (insn)
2793 rtx next = NEXT_INSN (insn);
2794 add_insn (insn);
2795 last = insn;
2796 insn = next;
2799 return last;
2802 /* Emit the insns in a chain starting with INSN and place them in front of
2803 the insn BEFORE. Return the last insn emitted. */
2806 emit_insns_before (insn, before)
2807 rtx insn;
2808 rtx before;
2810 rtx last = 0;
2812 while (insn)
2814 rtx next = NEXT_INSN (insn);
2815 add_insn_before (insn, before);
2816 last = insn;
2817 insn = next;
2820 return last;
2823 /* Emit the insns in a chain starting with FIRST and place them in back of
2824 the insn AFTER. Return the last insn emitted. */
2827 emit_insns_after (first, after)
2828 register rtx first;
2829 register rtx after;
2831 register rtx last;
2832 register rtx after_after;
2834 if (!after)
2835 abort ();
2837 if (!first)
2838 return first;
2840 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2841 continue;
2843 after_after = NEXT_INSN (after);
2845 NEXT_INSN (after) = first;
2846 PREV_INSN (first) = after;
2847 NEXT_INSN (last) = after_after;
2848 if (after_after)
2849 PREV_INSN (after_after) = last;
2851 if (after == last_insn)
2852 last_insn = last;
2853 return last;
2856 /* Make an insn of code JUMP_INSN with pattern PATTERN
2857 and add it to the end of the doubly-linked list. */
2860 emit_jump_insn (pattern)
2861 rtx pattern;
2863 if (GET_CODE (pattern) == SEQUENCE)
2864 return emit_insn (pattern);
2865 else
2867 register rtx insn = make_jump_insn_raw (pattern);
2868 add_insn (insn);
2869 return insn;
2873 /* Make an insn of code CALL_INSN with pattern PATTERN
2874 and add it to the end of the doubly-linked list. */
2877 emit_call_insn (pattern)
2878 rtx pattern;
2880 if (GET_CODE (pattern) == SEQUENCE)
2881 return emit_insn (pattern);
2882 else
2884 register rtx insn = make_call_insn_raw (pattern);
2885 add_insn (insn);
2886 PUT_CODE (insn, CALL_INSN);
2887 return insn;
2891 /* Add the label LABEL to the end of the doubly-linked list. */
2894 emit_label (label)
2895 rtx label;
2897 /* This can be called twice for the same label
2898 as a result of the confusion that follows a syntax error!
2899 So make it harmless. */
2900 if (INSN_UID (label) == 0)
2902 INSN_UID (label) = cur_insn_uid++;
2903 add_insn (label);
2905 return label;
2908 /* Make an insn of code BARRIER
2909 and add it to the end of the doubly-linked list. */
2912 emit_barrier ()
2914 register rtx barrier = rtx_alloc (BARRIER);
2915 INSN_UID (barrier) = cur_insn_uid++;
2916 add_insn (barrier);
2917 return barrier;
2920 /* Make an insn of code NOTE
2921 with data-fields specified by FILE and LINE
2922 and add it to the end of the doubly-linked list,
2923 but only if line-numbers are desired for debugging info. */
2926 emit_line_note (file, line)
2927 char *file;
2928 int line;
2930 if (output_bytecode)
2932 /* FIXME: for now we do nothing, but eventually we will have to deal with
2933 debugging information. */
2934 return 0;
2937 emit_filename = file;
2938 emit_lineno = line;
2940 #if 0
2941 if (no_line_numbers)
2942 return 0;
2943 #endif
2945 return emit_note (file, line);
2948 /* Make an insn of code NOTE
2949 with data-fields specified by FILE and LINE
2950 and add it to the end of the doubly-linked list.
2951 If it is a line-number NOTE, omit it if it matches the previous one. */
2954 emit_note (file, line)
2955 char *file;
2956 int line;
2958 register rtx note;
2960 if (line > 0)
2962 if (file && last_filename && !strcmp (file, last_filename)
2963 && line == last_linenum)
2964 return 0;
2965 last_filename = file;
2966 last_linenum = line;
2969 if (no_line_numbers && line > 0)
2971 cur_insn_uid++;
2972 return 0;
2975 note = rtx_alloc (NOTE);
2976 INSN_UID (note) = cur_insn_uid++;
2977 NOTE_SOURCE_FILE (note) = file;
2978 NOTE_LINE_NUMBER (note) = line;
2979 add_insn (note);
2980 return note;
2983 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2986 emit_line_note_force (file, line)
2987 char *file;
2988 int line;
2990 last_linenum = -1;
2991 return emit_line_note (file, line);
2994 /* Cause next statement to emit a line note even if the line number
2995 has not changed. This is used at the beginning of a function. */
2997 void
2998 force_next_line_note ()
3000 last_linenum = -1;
3003 /* Return an indication of which type of insn should have X as a body.
3004 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3006 enum rtx_code
3007 classify_insn (x)
3008 rtx x;
3010 if (GET_CODE (x) == CODE_LABEL)
3011 return CODE_LABEL;
3012 if (GET_CODE (x) == CALL)
3013 return CALL_INSN;
3014 if (GET_CODE (x) == RETURN)
3015 return JUMP_INSN;
3016 if (GET_CODE (x) == SET)
3018 if (SET_DEST (x) == pc_rtx)
3019 return JUMP_INSN;
3020 else if (GET_CODE (SET_SRC (x)) == CALL)
3021 return CALL_INSN;
3022 else
3023 return INSN;
3025 if (GET_CODE (x) == PARALLEL)
3027 register int j;
3028 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3029 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3030 return CALL_INSN;
3031 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3032 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3033 return JUMP_INSN;
3034 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3035 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3036 return CALL_INSN;
3038 return INSN;
3041 /* Emit the rtl pattern X as an appropriate kind of insn.
3042 If X is a label, it is simply added into the insn chain. */
3045 emit (x)
3046 rtx x;
3048 enum rtx_code code = classify_insn (x);
3050 if (code == CODE_LABEL)
3051 return emit_label (x);
3052 else if (code == INSN)
3053 return emit_insn (x);
3054 else if (code == JUMP_INSN)
3056 register rtx insn = emit_jump_insn (x);
3057 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3058 return emit_barrier ();
3059 return insn;
3061 else if (code == CALL_INSN)
3062 return emit_call_insn (x);
3063 else
3064 abort ();
3067 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3069 void
3070 start_sequence ()
3072 struct sequence_stack *tem;
3074 if (sequence_element_free_list)
3076 /* Reuse a previously-saved struct sequence_stack. */
3077 tem = sequence_element_free_list;
3078 sequence_element_free_list = tem->next;
3080 else
3081 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3083 tem->next = sequence_stack;
3084 tem->first = first_insn;
3085 tem->last = last_insn;
3086 tem->sequence_rtl_expr = sequence_rtl_expr;
3088 sequence_stack = tem;
3090 first_insn = 0;
3091 last_insn = 0;
3094 /* Similarly, but indicate that this sequence will be placed in
3095 T, an RTL_EXPR. */
3097 void
3098 start_sequence_for_rtl_expr (t)
3099 tree t;
3101 start_sequence ();
3103 sequence_rtl_expr = t;
3106 /* Set up the insn chain starting with FIRST
3107 as the current sequence, saving the previously current one. */
3109 void
3110 push_to_sequence (first)
3111 rtx first;
3113 rtx last;
3115 start_sequence ();
3117 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3119 first_insn = first;
3120 last_insn = last;
3123 /* Set up the outer-level insn chain
3124 as the current sequence, saving the previously current one. */
3126 void
3127 push_topmost_sequence ()
3129 struct sequence_stack *stack, *top;
3131 start_sequence ();
3133 for (stack = sequence_stack; stack; stack = stack->next)
3134 top = stack;
3136 first_insn = top->first;
3137 last_insn = top->last;
3138 sequence_rtl_expr = top->sequence_rtl_expr;
3141 /* After emitting to the outer-level insn chain, update the outer-level
3142 insn chain, and restore the previous saved state. */
3144 void
3145 pop_topmost_sequence ()
3147 struct sequence_stack *stack, *top;
3149 for (stack = sequence_stack; stack; stack = stack->next)
3150 top = stack;
3152 top->first = first_insn;
3153 top->last = last_insn;
3154 /* ??? Why don't we save sequence_rtl_expr here? */
3156 end_sequence ();
3159 /* After emitting to a sequence, restore previous saved state.
3161 To get the contents of the sequence just made,
3162 you must call `gen_sequence' *before* calling here. */
3164 void
3165 end_sequence ()
3167 struct sequence_stack *tem = sequence_stack;
3169 first_insn = tem->first;
3170 last_insn = tem->last;
3171 sequence_rtl_expr = tem->sequence_rtl_expr;
3172 sequence_stack = tem->next;
3174 tem->next = sequence_element_free_list;
3175 sequence_element_free_list = tem;
3178 /* Return 1 if currently emitting into a sequence. */
3181 in_sequence_p ()
3183 return sequence_stack != 0;
3186 /* Generate a SEQUENCE rtx containing the insns already emitted
3187 to the current sequence.
3189 This is how the gen_... function from a DEFINE_EXPAND
3190 constructs the SEQUENCE that it returns. */
3193 gen_sequence ()
3195 rtx result;
3196 rtx tem;
3197 int i;
3198 int len;
3200 /* Count the insns in the chain. */
3201 len = 0;
3202 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3203 len++;
3205 /* If only one insn, return its pattern rather than a SEQUENCE.
3206 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3207 the case of an empty list.) */
3208 if (len == 1
3209 && ! RTX_FRAME_RELATED_P (first_insn)
3210 && (GET_CODE (first_insn) == INSN
3211 || GET_CODE (first_insn) == JUMP_INSN
3212 /* Don't discard the call usage field. */
3213 || (GET_CODE (first_insn) == CALL_INSN
3214 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3216 NEXT_INSN (first_insn) = free_insn;
3217 free_insn = first_insn;
3218 return PATTERN (first_insn);
3221 /* Put them in a vector. See if we already have a SEQUENCE of the
3222 appropriate length around. */
3223 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3224 sequence_result[len] = 0;
3225 else
3227 /* Ensure that this rtl goes in saveable_obstack, since we may
3228 cache it. */
3229 push_obstacks_nochange ();
3230 rtl_in_saveable_obstack ();
3231 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
3232 pop_obstacks ();
3235 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3236 XVECEXP (result, 0, i) = tem;
3238 return result;
3241 /* Initialize data structures and variables in this file
3242 before generating rtl for each function. */
3244 void
3245 init_emit ()
3247 int i;
3249 first_insn = NULL;
3250 last_insn = NULL;
3251 sequence_rtl_expr = NULL;
3252 cur_insn_uid = 1;
3253 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3254 last_linenum = 0;
3255 last_filename = 0;
3256 first_label_num = label_num;
3257 last_label_num = 0;
3258 sequence_stack = NULL;
3260 /* Clear the start_sequence/gen_sequence cache. */
3261 sequence_element_free_list = 0;
3262 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3263 sequence_result[i] = 0;
3264 free_insn = 0;
3266 /* Init the tables that describe all the pseudo regs. */
3268 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3270 regno_pointer_flag
3271 = (char *) savealloc (regno_pointer_flag_length);
3272 bzero (regno_pointer_flag, regno_pointer_flag_length);
3274 regno_pointer_align
3275 = (char *) savealloc (regno_pointer_flag_length);
3276 bzero (regno_pointer_align, regno_pointer_flag_length);
3278 regno_reg_rtx
3279 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3280 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3282 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3283 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3284 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3285 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3286 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3288 /* Indicate that the virtual registers and stack locations are
3289 all pointers. */
3290 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3291 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3292 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3293 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3295 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3296 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3297 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3298 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3300 #ifdef STACK_BOUNDARY
3301 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3302 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3303 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3304 = STACK_BOUNDARY / BITS_PER_UNIT;
3305 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3307 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3308 = STACK_BOUNDARY / BITS_PER_UNIT;
3309 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3310 = STACK_BOUNDARY / BITS_PER_UNIT;
3311 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3312 = STACK_BOUNDARY / BITS_PER_UNIT;
3313 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3314 = STACK_BOUNDARY / BITS_PER_UNIT;
3315 #endif
3317 #ifdef INIT_EXPANDERS
3318 INIT_EXPANDERS;
3319 #endif
3322 /* Create some permanent unique rtl objects shared between all functions.
3323 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3325 void
3326 init_emit_once (line_numbers)
3327 int line_numbers;
3329 int i;
3330 enum machine_mode mode;
3332 no_line_numbers = ! line_numbers;
3334 sequence_stack = NULL;
3336 /* Compute the word and byte modes. */
3338 byte_mode = VOIDmode;
3339 word_mode = VOIDmode;
3341 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3342 mode = GET_MODE_WIDER_MODE (mode))
3344 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3345 && byte_mode == VOIDmode)
3346 byte_mode = mode;
3348 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3349 && word_mode == VOIDmode)
3350 word_mode = mode;
3353 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3355 /* Create the unique rtx's for certain rtx codes and operand values. */
3357 pc_rtx = gen_rtx (PC, VOIDmode);
3358 cc0_rtx = gen_rtx (CC0, VOIDmode);
3360 /* Don't use gen_rtx here since gen_rtx in this case
3361 tries to use these variables. */
3362 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3364 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
3365 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3366 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3369 /* These four calls obtain some of the rtx expressions made above. */
3370 const0_rtx = GEN_INT (0);
3371 const1_rtx = GEN_INT (1);
3372 const2_rtx = GEN_INT (2);
3373 constm1_rtx = GEN_INT (-1);
3375 /* This will usually be one of the above constants, but may be a new rtx. */
3376 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
3378 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3379 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3380 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3381 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3383 for (i = 0; i <= 2; i++)
3385 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3386 mode = GET_MODE_WIDER_MODE (mode))
3388 rtx tem = rtx_alloc (CONST_DOUBLE);
3389 union real_extract u;
3391 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3392 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3394 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3395 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3396 PUT_MODE (tem, mode);
3398 const_tiny_rtx[i][(int) mode] = tem;
3401 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3403 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3404 mode = GET_MODE_WIDER_MODE (mode))
3405 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3407 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3408 mode != VOIDmode;
3409 mode = GET_MODE_WIDER_MODE (mode))
3410 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3413 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3414 mode = GET_MODE_WIDER_MODE (mode))
3415 const_tiny_rtx[0][(int) mode] = const0_rtx;
3417 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
3418 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
3420 if (HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM)
3421 hard_frame_pointer_rtx = frame_pointer_rtx;
3422 else
3423 hard_frame_pointer_rtx = gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM);
3425 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3426 arg_pointer_rtx = frame_pointer_rtx;
3427 else if (HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3428 arg_pointer_rtx = hard_frame_pointer_rtx;
3429 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
3430 arg_pointer_rtx = stack_pointer_rtx;
3431 else
3432 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
3434 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3435 return_address_pointer_rtx = gen_rtx (REG, Pmode,
3436 RETURN_ADDRESS_POINTER_REGNUM);
3437 #endif
3439 /* Create the virtual registers. Do so here since the following objects
3440 might reference them. */
3442 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
3443 VIRTUAL_INCOMING_ARGS_REGNUM);
3444 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
3445 VIRTUAL_STACK_VARS_REGNUM);
3446 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
3447 VIRTUAL_STACK_DYNAMIC_REGNUM);
3448 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
3449 VIRTUAL_OUTGOING_ARGS_REGNUM);
3451 #ifdef STRUCT_VALUE
3452 struct_value_rtx = STRUCT_VALUE;
3453 #else
3454 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
3455 #endif
3457 #ifdef STRUCT_VALUE_INCOMING
3458 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3459 #else
3460 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3461 struct_value_incoming_rtx
3462 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3463 #else
3464 struct_value_incoming_rtx = struct_value_rtx;
3465 #endif
3466 #endif
3468 #ifdef STATIC_CHAIN_REGNUM
3469 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
3471 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3472 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3473 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3474 else
3475 #endif
3476 static_chain_incoming_rtx = static_chain_rtx;
3477 #endif
3479 #ifdef STATIC_CHAIN
3480 static_chain_rtx = STATIC_CHAIN;
3482 #ifdef STATIC_CHAIN_INCOMING
3483 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3484 #else
3485 static_chain_incoming_rtx = static_chain_rtx;
3486 #endif
3487 #endif
3489 #ifdef PIC_OFFSET_TABLE_REGNUM
3490 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);
3491 #endif